Merge branch 'bugfix/ulp_p4_eco5_fixes' into 'master'

fix(lp-core): fixed rtc mem conflict on p4 eco5 between app and ULP

Closes IDF-14422

See merge request espressif/esp-idf!43544
This commit is contained in:
Marius Vikhammer
2025-11-21 09:40:45 +08:00
13 changed files with 11 additions and 46 deletions
@@ -32,12 +32,6 @@
#define SRAM_HIGH_END SRAM_HIGH_START + SRAM_HIGH_SIZE
#endif
#if CONFIG_P4_REV3_MSPI_CRASH_AFTER_POWER_UP_WORKAROUND
#define MSPI_WORKAROUND_SIZE CONFIG_P4_REV3_MSPI_WORKAROUND_SIZE
#else
#define MSPI_WORKAROUND_SIZE 0x0
#endif
#define IDROM_SEG_SIZE (CONFIG_MMU_PAGE_SIZE << 10)
#define LP_ROM_DRAM_START 0x5010fa80 // Value taken from ROM elf, includes LP ROM stack
+6
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@@ -74,6 +74,12 @@
#define RESERVE_RTC_MEM (ESP_BOOTLOADER_RESERVE_RTC + RTC_TIMER_RESERVE_RTC)
#endif
#if CONFIG_P4_REV3_MSPI_CRASH_AFTER_POWER_UP_WORKAROUND
#define MSPI_WORKAROUND_SIZE CONFIG_P4_REV3_MSPI_WORKAROUND_SIZE
#else
#define MSPI_WORKAROUND_SIZE 0x0
#endif
#endif // SOC_RTC_MEM_SUPPORTED
#define QUOTED_STRING(STRING) #STRING
+3 -1
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@@ -9,11 +9,13 @@
#if CONFIG_ESP_ROM_HAS_LP_ROM
/* With LP-ROM memory layout is different due to LP ROM stack/data */
#define ULP_MEM_START_ADDRESS SOC_RTC_DRAM_LOW + RESERVE_RTC_MEM
/* For P4 ECO5 we also reserve some RTC MEM at the first for MSPI workaround */
#define ULP_MEM_START_ADDRESS SOC_RTC_DRAM_LOW + RESERVE_RTC_MEM + MSPI_WORKAROUND_SIZE
#else
#define ULP_MEM_START_ADDRESS (SOC_RTC_DRAM_LOW)
#endif
#define ALIGN_DOWN(SIZE, AL) (SIZE & ~(AL - 1))
/* Ensure the end where the shared memory starts is aligned to 8 bytes
if updating this also update the same in ulp_lp_core_memory_shared.c
@@ -5,17 +5,10 @@ components/ulp/test_apps/lp_core/lp_core_basic_tests:
- if: SOC_LP_CORE_SUPPORTED != 1
- if: CONFIG_NAME == "xtal" and SOC_CLK_LP_FAST_SUPPORT_XTAL != 1
- if: CONFIG_NAME == "lp_vad" and SOC_LP_VAD_SUPPORTED != 1
- if: IDF_TARGET == "esp32p4"
temporary: true
reason: p4 rev3 migration # TODO: IDF-14368
components/ulp/test_apps/lp_core/lp_core_hp_uart:
disable:
- if: SOC_LP_CORE_SUPPORTED != 1
disable_test:
- if: IDF_TARGET == "esp32p4"
temporary: true
reason: p4 rev3 migration # TODO: IDF-14422
components/ulp/test_apps/ulp_fsm:
enable:
@@ -1,3 +1,3 @@
| Supported Targets | ESP32-C5 | ESP32-C6 |
| ----------------- | -------- | -------- |
| Supported Targets | ESP32-C5 | ESP32-C6 | ESP32-P4 |
| ----------------- | -------- | -------- | -------- |
@@ -8,7 +8,6 @@ from pytest_embedded_idf.utils import soc_filtered_targets
@pytest.mark.generic
@idf_parametrize('target', soc_filtered_targets('SOC_LP_CORE_SUPPORTED == 1'), indirect=['target'])
@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='p4 rev3 migration # TODO: IDF-14422')
def test_lp_core_hp_uart_print(dut: Dut) -> None:
dut.expect_exact('Press ENTER to see the list of tests')
dut.write('"lp-print can output to hp-uart"')
@@ -19,7 +18,6 @@ def test_lp_core_hp_uart_print(dut: Dut) -> None:
@pytest.mark.generic
@idf_parametrize('target', soc_filtered_targets('SOC_LP_CORE_SUPPORTED == 1'), indirect=['target'])
@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='p4 rev3 migration # TODO: IDF-14422')
def test_lp_core_panic(dut: Dut) -> None:
dut.expect_exact('Press ENTER to see the list of tests')
dut.write('"LP-Core panic"')
@@ -31,7 +29,6 @@ def test_lp_core_panic(dut: Dut) -> None:
@pytest.mark.generic
@idf_parametrize('target', soc_filtered_targets('SOC_LP_CORE_SUPPORTED == 1'), indirect=['target'])
@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='p4 rev3 migration # TODO: IDF-14422')
def test_lp_core_shared_mem(dut: Dut) -> None:
dut.expect_exact('Press ENTER to see the list of tests')
dut.write('"LP-Core Shared-mem"')
@@ -50,7 +47,6 @@ def test_lp_core_shared_mem(dut: Dut) -> None:
@pytest.mark.generic
@idf_parametrize('target', ['esp32p4'], indirect=['target'])
@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='p4 rev3 migration # TODO: IDF-14422')
def test_lp_core_lp_rom(dut: Dut) -> None:
dut.expect_exact('Press ENTER to see the list of tests')
dut.write('"LP-Core LP-ROM"')
-20
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@@ -303,10 +303,6 @@ examples/system/task_watchdog:
examples/system/ulp/lp_core/build_system:
enable:
- if: SOC_LP_CORE_SUPPORTED == 1
disable_test:
- if: IDF_TARGET == "esp32p4"
temporary: true
reason: p4 rev3 migration # TODO: IDF-14422
depends_components:
- ulp
@@ -327,10 +323,6 @@ examples/system/ulp/lp_core/gpio:
examples/system/ulp/lp_core/gpio_intr_pulse_counter:
enable:
- if: (SOC_LP_CORE_SUPPORTED == 1) and (SOC_ULP_LP_UART_SUPPORTED == 1 and SOC_DEEP_SLEEP_SUPPORTED == 1)
disable_test:
- if: IDF_TARGET == "esp32p4"
temporary: true
reason: p4 rev3 migration # TODO: IDF-14422
depends_components:
- ulp
@@ -343,20 +335,12 @@ examples/system/ulp/lp_core/gpio_wakeup:
examples/system/ulp/lp_core/inter_cpu_critical_section/:
enable:
- if: SOC_LP_CORE_SUPPORTED == 1
disable_test:
- if: IDF_TARGET == "esp32p4"
temporary: true
reason: p4 rev3 migration # TODO: IDF-14422
depends_components:
- ulp
examples/system/ulp/lp_core/interrupt:
enable:
- if: SOC_LP_CORE_SUPPORTED == 1
disable_test:
- if: IDF_TARGET == "esp32p4"
temporary: true
reason: p4 rev3 migration # TODO: IDF-14422
depends_components:
- ulp
@@ -375,10 +359,6 @@ examples/system/ulp/lp_core/lp_i2c:
examples/system/ulp/lp_core/lp_mailbox:
enable:
- if: SOC_LP_CORE_SUPPORTED == 1
disable_test:
- if: IDF_TARGET == "esp32p4"
temporary: true
reason: p4 rev3 migration # TODO: IDF-14422
depends_components:
- ulp
@@ -7,6 +7,5 @@ from pytest_embedded_idf.utils import idf_parametrize
@pytest.mark.generic
@idf_parametrize('target', ['esp32c5', 'esp32c6', 'esp32p4'], indirect=['target'])
@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='p4 rev3 migration # TODO: IDF-14422')
def test_lp_core_build_sys(dut: IdfDut) -> None:
dut.expect('Sum calculated by ULP using external library func: 11')
@@ -9,7 +9,6 @@ from pytest_embedded_idf.utils import idf_parametrize
@pytest.mark.generic
@idf_parametrize('target', ['esp32c6', 'esp32p4'], indirect=['target'])
@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='p4 rev3 migration # TODO: IDF-14422')
def test_lp_core_pcnt(dut: Dut) -> None:
res = dut.expect(r'ULP will wake up processor after every (\d+) pulses')
wakeup_limit = res.group(1).decode('utf-8')
@@ -16,7 +16,6 @@ def test_lp_core_critical_section_main_1_task(dut: Dut) -> None:
@pytest.mark.generic
@idf_parametrize('target', ['esp32p4'], indirect=['target'])
@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='p4 rev3 migration # TODO: IDF-14422')
def test_lp_core_critical_section_main_2_tasks(dut: Dut) -> None:
dut.expect("LP CPU's increment starts, shared counter = 0")
dut.expect(r'core 0 started, cnt = \d+')
@@ -7,6 +7,5 @@ from pytest_embedded_idf.utils import idf_parametrize
@pytest.mark.generic
@idf_parametrize('target', ['esp32c5', 'esp32c6', 'esp32p4'], indirect=['target'])
@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='p4 rev3 migration # TODO: IDF-14422')
def test_lp_core_intr(dut: Dut) -> None:
dut.expect('Triggered 10 interrupts on the LP-Core, LP-Core received 10 interrupts')
@@ -7,7 +7,6 @@ from pytest_embedded_idf.utils import idf_parametrize
@pytest.mark.generic
@idf_parametrize('target', ['supported_targets'], indirect=['target'])
@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='p4 rev3 migration # TODO: IDF-14422')
def test_lp_mailbox(dut: Dut) -> None:
# Wait for LP core to be loaded and running
dut.expect_exact('LP Mailbox initialized successfully')
@@ -7,6 +7,5 @@ from pytest_embedded_idf.utils import idf_parametrize
@pytest.mark.generic
@idf_parametrize('target', ['esp32p4'], indirect=['target'])
@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='p4 rev3 migration # TODO: IDF-14422')
def test_rtc_mem_reserve(dut: Dut) -> None:
dut.run_all_single_board_cases()