forked from espressif/esp-idf
Merge branch 'bugfix/ulp_p4_eco5_fixes' into 'master'
fix(lp-core): fixed rtc mem conflict on p4 eco5 between app and ULP Closes IDF-14422 See merge request espressif/esp-idf!43544
This commit is contained in:
@@ -32,12 +32,6 @@
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#define SRAM_HIGH_END SRAM_HIGH_START + SRAM_HIGH_SIZE
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#endif
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#if CONFIG_P4_REV3_MSPI_CRASH_AFTER_POWER_UP_WORKAROUND
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#define MSPI_WORKAROUND_SIZE CONFIG_P4_REV3_MSPI_WORKAROUND_SIZE
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#else
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#define MSPI_WORKAROUND_SIZE 0x0
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#endif
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#define IDROM_SEG_SIZE (CONFIG_MMU_PAGE_SIZE << 10)
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#define LP_ROM_DRAM_START 0x5010fa80 // Value taken from ROM elf, includes LP ROM stack
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@@ -74,6 +74,12 @@
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#define RESERVE_RTC_MEM (ESP_BOOTLOADER_RESERVE_RTC + RTC_TIMER_RESERVE_RTC)
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#endif
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#if CONFIG_P4_REV3_MSPI_CRASH_AFTER_POWER_UP_WORKAROUND
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#define MSPI_WORKAROUND_SIZE CONFIG_P4_REV3_MSPI_WORKAROUND_SIZE
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#else
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#define MSPI_WORKAROUND_SIZE 0x0
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#endif
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#endif // SOC_RTC_MEM_SUPPORTED
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#define QUOTED_STRING(STRING) #STRING
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@@ -9,11 +9,13 @@
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#if CONFIG_ESP_ROM_HAS_LP_ROM
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/* With LP-ROM memory layout is different due to LP ROM stack/data */
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#define ULP_MEM_START_ADDRESS SOC_RTC_DRAM_LOW + RESERVE_RTC_MEM
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/* For P4 ECO5 we also reserve some RTC MEM at the first for MSPI workaround */
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#define ULP_MEM_START_ADDRESS SOC_RTC_DRAM_LOW + RESERVE_RTC_MEM + MSPI_WORKAROUND_SIZE
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#else
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#define ULP_MEM_START_ADDRESS (SOC_RTC_DRAM_LOW)
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#endif
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#define ALIGN_DOWN(SIZE, AL) (SIZE & ~(AL - 1))
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/* Ensure the end where the shared memory starts is aligned to 8 bytes
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if updating this also update the same in ulp_lp_core_memory_shared.c
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@@ -5,17 +5,10 @@ components/ulp/test_apps/lp_core/lp_core_basic_tests:
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- if: SOC_LP_CORE_SUPPORTED != 1
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- if: CONFIG_NAME == "xtal" and SOC_CLK_LP_FAST_SUPPORT_XTAL != 1
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- if: CONFIG_NAME == "lp_vad" and SOC_LP_VAD_SUPPORTED != 1
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- if: IDF_TARGET == "esp32p4"
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temporary: true
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reason: p4 rev3 migration # TODO: IDF-14368
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components/ulp/test_apps/lp_core/lp_core_hp_uart:
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disable:
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- if: SOC_LP_CORE_SUPPORTED != 1
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disable_test:
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- if: IDF_TARGET == "esp32p4"
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temporary: true
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reason: p4 rev3 migration # TODO: IDF-14422
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components/ulp/test_apps/ulp_fsm:
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enable:
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@@ -1,3 +1,3 @@
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| Supported Targets | ESP32-C5 | ESP32-C6 |
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| ----------------- | -------- | -------- |
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| Supported Targets | ESP32-C5 | ESP32-C6 | ESP32-P4 |
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| ----------------- | -------- | -------- | -------- |
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@@ -8,7 +8,6 @@ from pytest_embedded_idf.utils import soc_filtered_targets
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@pytest.mark.generic
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@idf_parametrize('target', soc_filtered_targets('SOC_LP_CORE_SUPPORTED == 1'), indirect=['target'])
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@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='p4 rev3 migration # TODO: IDF-14422')
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def test_lp_core_hp_uart_print(dut: Dut) -> None:
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dut.expect_exact('Press ENTER to see the list of tests')
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dut.write('"lp-print can output to hp-uart"')
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@@ -19,7 +18,6 @@ def test_lp_core_hp_uart_print(dut: Dut) -> None:
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@pytest.mark.generic
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@idf_parametrize('target', soc_filtered_targets('SOC_LP_CORE_SUPPORTED == 1'), indirect=['target'])
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@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='p4 rev3 migration # TODO: IDF-14422')
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def test_lp_core_panic(dut: Dut) -> None:
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dut.expect_exact('Press ENTER to see the list of tests')
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dut.write('"LP-Core panic"')
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@@ -31,7 +29,6 @@ def test_lp_core_panic(dut: Dut) -> None:
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@pytest.mark.generic
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@idf_parametrize('target', soc_filtered_targets('SOC_LP_CORE_SUPPORTED == 1'), indirect=['target'])
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@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='p4 rev3 migration # TODO: IDF-14422')
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def test_lp_core_shared_mem(dut: Dut) -> None:
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dut.expect_exact('Press ENTER to see the list of tests')
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dut.write('"LP-Core Shared-mem"')
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@@ -50,7 +47,6 @@ def test_lp_core_shared_mem(dut: Dut) -> None:
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@pytest.mark.generic
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@idf_parametrize('target', ['esp32p4'], indirect=['target'])
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@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='p4 rev3 migration # TODO: IDF-14422')
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def test_lp_core_lp_rom(dut: Dut) -> None:
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dut.expect_exact('Press ENTER to see the list of tests')
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dut.write('"LP-Core LP-ROM"')
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@@ -303,10 +303,6 @@ examples/system/task_watchdog:
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examples/system/ulp/lp_core/build_system:
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enable:
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- if: SOC_LP_CORE_SUPPORTED == 1
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disable_test:
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- if: IDF_TARGET == "esp32p4"
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temporary: true
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reason: p4 rev3 migration # TODO: IDF-14422
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depends_components:
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- ulp
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@@ -327,10 +323,6 @@ examples/system/ulp/lp_core/gpio:
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examples/system/ulp/lp_core/gpio_intr_pulse_counter:
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enable:
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- if: (SOC_LP_CORE_SUPPORTED == 1) and (SOC_ULP_LP_UART_SUPPORTED == 1 and SOC_DEEP_SLEEP_SUPPORTED == 1)
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disable_test:
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- if: IDF_TARGET == "esp32p4"
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temporary: true
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reason: p4 rev3 migration # TODO: IDF-14422
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depends_components:
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- ulp
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@@ -343,20 +335,12 @@ examples/system/ulp/lp_core/gpio_wakeup:
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examples/system/ulp/lp_core/inter_cpu_critical_section/:
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enable:
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- if: SOC_LP_CORE_SUPPORTED == 1
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disable_test:
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- if: IDF_TARGET == "esp32p4"
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temporary: true
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reason: p4 rev3 migration # TODO: IDF-14422
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depends_components:
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- ulp
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examples/system/ulp/lp_core/interrupt:
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enable:
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- if: SOC_LP_CORE_SUPPORTED == 1
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disable_test:
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- if: IDF_TARGET == "esp32p4"
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temporary: true
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reason: p4 rev3 migration # TODO: IDF-14422
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depends_components:
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- ulp
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@@ -375,10 +359,6 @@ examples/system/ulp/lp_core/lp_i2c:
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examples/system/ulp/lp_core/lp_mailbox:
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enable:
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- if: SOC_LP_CORE_SUPPORTED == 1
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disable_test:
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- if: IDF_TARGET == "esp32p4"
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temporary: true
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reason: p4 rev3 migration # TODO: IDF-14422
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depends_components:
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- ulp
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@@ -7,6 +7,5 @@ from pytest_embedded_idf.utils import idf_parametrize
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@pytest.mark.generic
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@idf_parametrize('target', ['esp32c5', 'esp32c6', 'esp32p4'], indirect=['target'])
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@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='p4 rev3 migration # TODO: IDF-14422')
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def test_lp_core_build_sys(dut: IdfDut) -> None:
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dut.expect('Sum calculated by ULP using external library func: 11')
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@@ -9,7 +9,6 @@ from pytest_embedded_idf.utils import idf_parametrize
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@pytest.mark.generic
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@idf_parametrize('target', ['esp32c6', 'esp32p4'], indirect=['target'])
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@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='p4 rev3 migration # TODO: IDF-14422')
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def test_lp_core_pcnt(dut: Dut) -> None:
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res = dut.expect(r'ULP will wake up processor after every (\d+) pulses')
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wakeup_limit = res.group(1).decode('utf-8')
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-1
@@ -16,7 +16,6 @@ def test_lp_core_critical_section_main_1_task(dut: Dut) -> None:
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@pytest.mark.generic
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@idf_parametrize('target', ['esp32p4'], indirect=['target'])
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@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='p4 rev3 migration # TODO: IDF-14422')
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def test_lp_core_critical_section_main_2_tasks(dut: Dut) -> None:
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dut.expect("LP CPU's increment starts, shared counter = 0")
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dut.expect(r'core 0 started, cnt = \d+')
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@@ -7,6 +7,5 @@ from pytest_embedded_idf.utils import idf_parametrize
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@pytest.mark.generic
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@idf_parametrize('target', ['esp32c5', 'esp32c6', 'esp32p4'], indirect=['target'])
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@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='p4 rev3 migration # TODO: IDF-14422')
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def test_lp_core_intr(dut: Dut) -> None:
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dut.expect('Triggered 10 interrupts on the LP-Core, LP-Core received 10 interrupts')
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@@ -7,7 +7,6 @@ from pytest_embedded_idf.utils import idf_parametrize
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@pytest.mark.generic
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@idf_parametrize('target', ['supported_targets'], indirect=['target'])
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@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='p4 rev3 migration # TODO: IDF-14422')
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def test_lp_mailbox(dut: Dut) -> None:
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# Wait for LP core to be loaded and running
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dut.expect_exact('LP Mailbox initialized successfully')
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@@ -7,6 +7,5 @@ from pytest_embedded_idf.utils import idf_parametrize
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@pytest.mark.generic
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@idf_parametrize('target', ['esp32p4'], indirect=['target'])
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@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='p4 rev3 migration # TODO: IDF-14422')
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def test_rtc_mem_reserve(dut: Dut) -> None:
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dut.run_all_single_board_cases()
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