forked from espressif/esp-idf
i2s_legacy_test: fix the clock test issue
This commit is contained in:
@@ -804,6 +804,8 @@ static esp_err_t i2s_calculate_clock(i2s_port_t i2s_num, i2s_hal_clock_info_t *c
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/* Calculate clock for common mode */
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ESP_RETURN_ON_ERROR(i2s_calculate_common_clock(i2s_num, clk_info), TAG, "Common clock calculate failed");
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ESP_LOGD(TAG, "[sclk] %d [mclk] %d [mclk_div] %d [bclk] %d [bclk_div] %d",
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clk_info->sclk, clk_info->mclk, clk_info->mclk_div, clk_info->bclk, clk_info->bclk_div);
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return ESP_OK;
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}
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@@ -367,7 +367,7 @@ TEST_CASE("I2S_thread_concurrent_safety_test", "[i2s]")
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static uint32_t get_start_index(uint16_t *buf, uint32_t len, uint32_t start_val)
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{
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uint32_t i = 0;
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for (i = 0; i < len; i++) {
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for (i = 100; i < len; i++) {
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if (buf[i] == start_val) {
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printf("%d %d %d %d %d %d %d %d\n",
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buf[i], buf[i+1], buf[i+2], buf[i+3],
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@@ -394,6 +394,8 @@ TEST_CASE("I2S_mono_stereo_loopback_test", "[i2s]")
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i2s_chan_handle_t tx_handle;
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i2s_chan_handle_t rx_handle;
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bool is_failed = false;
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i2s_chan_config_t chan_cfg = I2S_CHANNEL_DEFAULT_CONFIG(I2S_NUM_0, I2S_ROLE_MASTER);
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chan_cfg.dma_desc_num = 8;
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chan_cfg.dma_frame_num = 128;
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@@ -454,7 +456,11 @@ TEST_CASE("I2S_mono_stereo_loopback_test", "[i2s]")
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printf("Data start index: %d\n", index);
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TEST_ASSERT(index < READ_BUF_LEN / 2 - 50);
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for (int16_t j = 1; j < 100; j += 2) {
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TEST_ASSERT_EQUAL_INT16(r_buf[index++], j);
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if (r_buf[index++] != j) {
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printf("rx right mono test failed\n");
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is_failed = true;
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goto err;
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}
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}
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printf("rx right mono test passed\n");
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@@ -483,7 +489,11 @@ TEST_CASE("I2S_mono_stereo_loopback_test", "[i2s]")
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printf("Data start index: %d\n", index);
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TEST_ASSERT(index < READ_BUF_LEN / 2 - 50);
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for (int16_t j = 2; j < 100; j += 2) {
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TEST_ASSERT_EQUAL_INT16(r_buf[index++], j);
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if (r_buf[index++] != j) {
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printf("rx left mono test failed\n");
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is_failed = true;
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goto err;
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}
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}
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printf("rx left mono test passed\n");
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@@ -506,7 +516,11 @@ TEST_CASE("I2S_mono_stereo_loopback_test", "[i2s]")
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printf("Data start index: %d\n", index);
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TEST_ASSERT(index < READ_BUF_LEN / 2 - 100);
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for (int16_t j = 1; j < 100; j ++) {
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TEST_ASSERT_EQUAL_INT16(r_buf[index++], j); // receive all number
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if (r_buf[index++] != j) {
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printf("tx/rx stereo test failed\n");
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is_failed = true;
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goto err;
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}
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}
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printf("tx/rx stereo test passed\n");
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@@ -528,19 +542,30 @@ TEST_CASE("I2S_mono_stereo_loopback_test", "[i2s]")
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}
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printf("Data start index: %d\n", index);
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TEST_ASSERT(index < READ_BUF_LEN / 2 - 200);
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for (int16_t j = 1; j < 100; j ++) {
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TEST_ASSERT_EQUAL_INT16(r_buf[index], j);
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index += 2;
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for (int16_t j = 1; j < 100; j ++, index += 2) {
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if (r_buf[index] != j) {
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printf("tx mono rx stereo test failed\n");
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is_failed = true;
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goto err;
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}
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}
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printf("tx mono rx stereo test passed\n");
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#endif
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err:
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if (is_failed) {
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for (int i = 0; i < READ_BUF_LEN / 2; i++) {
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printf("%x ", r_buf[i]);
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}
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printf("\n");
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}
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free(w_buf);
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free(r_buf);
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TEST_ESP_OK(i2s_channel_disable(tx_handle));
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TEST_ESP_OK(i2s_channel_disable(rx_handle));
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TEST_ESP_OK(i2s_del_channel(tx_handle));
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TEST_ESP_OK(i2s_del_channel(rx_handle));
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TEST_ASSERT_FALSE(is_failed);
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}
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TEST_CASE("I2S_memory_leak_test", "[i2s]")
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@@ -29,6 +29,9 @@
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#include "driver/pulse_cnt.h"
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#include "soc/pcnt_periph.h"
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#endif
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#ifdef CONFIG_PM_ENABLE
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#include "esp_pm.h"
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#endif
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#include "../../test_inc/test_i2s.h"
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@@ -854,6 +857,14 @@ static void i2s_test_common_sample_rate(i2s_port_t id)
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32000, 44100, 48000, 64000, 88200, 96000,
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128000, 144000, 196000};
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int real_pulse = 0;
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// Acquire the PM lock incase Dynamic Frequency Scaling(DFS) lower the frequency
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#ifdef CONFIG_PM_ENABLE
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esp_pm_lock_handle_t pm_lock;
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esp_pm_lock_type_t pm_type = ESP_PM_APB_FREQ_MAX;
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TEST_ESP_OK(esp_pm_lock_create(pm_type, 0, "legacy_i2s_test", &pm_lock));
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esp_pm_lock_acquire(pm_lock);
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#endif
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for (int i = 0; i < 15; i++) {
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int expt_pulse = (int16_t)((float)test_freq[i] * (TEST_I2S_PERIOD_MS / 1000.0));
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TEST_ESP_OK(i2s_set_clk(id, test_freq[i], SAMPLE_BITS, I2S_CHANNEL_STEREO));
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@@ -868,6 +879,10 @@ static void i2s_test_common_sample_rate(i2s_port_t id)
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// Check if the error between real pulse number and expected pulse number is within 1%
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TEST_ASSERT_INT_WITHIN(expt_pulse * 0.01, expt_pulse, real_pulse);
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}
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#ifdef CONFIG_PM_ENABLE
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esp_pm_lock_release(pm_lock);
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esp_pm_lock_delete(pm_lock);
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#endif
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TEST_ESP_OK(pcnt_del_channel(pcnt_chan));
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TEST_ESP_OK(pcnt_unit_stop(pcnt_unit));
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TEST_ESP_OK(pcnt_unit_disable(pcnt_unit));
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@@ -3,4 +3,3 @@ CONFIG_FREERTOS_USE_TICKLESS_IDLE=y
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CONFIG_COMPILER_OPTIMIZATION_SIZE=y
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CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_SIZE=y
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CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT=y
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CONFIG_I2S_ISR_IRAM_SAFE=y
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