feedc0de/esp-idf
1
0
Fork 0
forked from espressif/esp-idf
Code Pull Requests Activity

refactor(gpio): improve gpio_get_io_config API

Browse Source
This commit is contained in:
Song Ruo Jing
2025-01-14 19:47:18 +08:00
parent 3a8d065908
commit a6ac2bb322
15 changed files with 159 additions and 465 deletions
Download Patch File Download Diff File Expand all files Collapse all files

14
components/esp_driver_gpio/include/driver/gpio.h
View File

@@ -594,23 +594,13 @@ esp_err_t gpio_dump_io_configuration(FILE *out_stream, uint64_t io_bit_mask);
* @brief Get the configuration for an IO * @brief Get the configuration for an IO
* *
* @param gpio_num GPIO number * @param gpio_num GPIO number
* @param pu Pointer to accept the status of pull-up enabled or not, passing in NULL if this info is unwanted * @param[out] out_io_config Pointer to the structure that saves the specific IO configuration
* @param pd Pointer to accept the status of pull-down enabled or not, passing in NULL if this info is unwanted
* @param ie Pointer to accept the status of input enabled or not, passing in NULL if this info is unwanted
* @param oe Pointer to accept the status of output enabled or not, passing in NULL if this info is unwanted
* @param od Pointer to accept the status of open-drain enabled or not, passing in NULL if this info is unwanted
* @param drv Pointer to accept the value of drive strength, passing in NULL if this info is unwanted
* @param fun_sel Pointer to accept the value of IOMUX function selection, passing in NULL if this info is unwanted
* @param sig_out Pointer to accept the index of outputting peripheral signal, passing in NULL if this info is unwanted
* @param slp_sel Pointer to accept the status of pin sleep mode enabled or not, passing in NULL if this info is unwanted
* *
* @return * @return
* - ESP_OK Success * - ESP_OK Success
* - ESP_ERR_INVALID_ARG Parameter error * - ESP_ERR_INVALID_ARG Parameter error
*/ */
esp_err_t gpio_get_io_config(gpio_num_t gpio_num, esp_err_t gpio_get_io_config(gpio_num_t gpio_num, gpio_io_config_t *out_io_config);
bool *pu, bool *pd, bool *ie, bool *oe, bool *od, uint32_t *drv,
uint32_t *fun_sel, uint32_t *sig_out, bool *slp_sel);
#ifdef __cplusplus #ifdef __cplusplus
} }

46
components/esp_driver_gpio/src/gpio.c
View File

@@ -1064,24 +1064,18 @@ esp_err_t gpio_deep_sleep_wakeup_disable(gpio_num_t gpio_num)
} }
#endif // SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP && SOC_DEEP_SLEEP_SUPPORTED #endif // SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP && SOC_DEEP_SLEEP_SUPPORTED
esp_err_t gpio_get_io_config(gpio_num_t gpio_num, esp_err_t gpio_get_io_config(gpio_num_t gpio_num, gpio_io_config_t *out_io_config)
bool *pu, bool *pd, bool *ie, bool *oe, bool *od, uint32_t *drv,
uint32_t *fun_sel, uint32_t *sig_out, bool *slp_sel)
{ {
GPIO_CHECK(GPIO_IS_VALID_GPIO(gpio_num), "GPIO number error", ESP_ERR_INVALID_ARG); GPIO_CHECK(GPIO_IS_VALID_GPIO(gpio_num), "GPIO number error", ESP_ERR_INVALID_ARG);
gpio_hal_get_io_config(gpio_context.gpio_hal, gpio_num, pu, pd, ie, oe, od, drv, fun_sel, sig_out, slp_sel); ESP_RETURN_ON_FALSE(out_io_config, ESP_ERR_INVALID_ARG, GPIO_TAG, "out_io_config is a null pointer");
gpio_hal_get_io_config(gpio_context.gpio_hal, gpio_num, out_io_config);
#if !SOC_GPIO_SUPPORT_RTC_INDEPENDENT && SOC_RTCIO_PIN_COUNT > 0 #if !SOC_GPIO_SUPPORT_RTC_INDEPENDENT && SOC_RTCIO_PIN_COUNT > 0
if (rtc_gpio_is_valid_gpio(gpio_num)) { if (rtc_gpio_is_valid_gpio(gpio_num)) {
int rtcio_num = rtc_io_number_get(gpio_num); int rtcio_num = rtc_io_number_get(gpio_num);
if (pu) { out_io_config->pu = rtcio_hal_is_pullup_enabled(rtcio_num);
*pu = rtcio_hal_is_pullup_enabled(rtcio_num); out_io_config->pd = rtcio_hal_is_pulldown_enabled(rtcio_num);
} out_io_config->drv = rtcio_hal_get_drive_capability(rtcio_num);
if (pd) {
*pd = rtcio_hal_is_pulldown_enabled(rtcio_num);
}
if (drv) {
*drv = rtcio_hal_get_drive_capability(rtcio_num);
}
} }
#endif #endif
return ESP_OK; return ESP_OK;
@@ -1097,25 +1091,17 @@ esp_err_t gpio_dump_io_configuration(FILE *out_stream, uint64_t io_bit_mask)
uint32_t gpio_num = __builtin_ffsll(io_bit_mask) - 1; uint32_t gpio_num = __builtin_ffsll(io_bit_mask) - 1;
io_bit_mask &= ~(1ULL << gpio_num); io_bit_mask &= ~(1ULL << gpio_num);
bool pu = 0; gpio_io_config_t io_config = {};
bool pd = 0; gpio_get_io_config(gpio_num, &io_config);
bool ie = 0;
bool oe = 0;
bool od = 0;
bool slp_sel = 0;
uint32_t drv = 0;
uint32_t fun_sel = 0;
uint32_t sig_out = 0;
gpio_get_io_config(gpio_num, &pu, &pd, &ie, &oe, &od, &drv, &fun_sel, &sig_out, &slp_sel);
fprintf(out_stream, "IO[%"PRIu32"]%s -\n", gpio_num, esp_gpio_is_reserved(BIT64(gpio_num)) ? " **RESERVED**" : ""); fprintf(out_stream, "IO[%"PRIu32"]%s -\n", gpio_num, esp_gpio_is_reserved(BIT64(gpio_num)) ? " **RESERVED**" : "");
fprintf(out_stream, " Pullup: %d, Pulldown: %d, DriveCap: %"PRIu32"\n", pu, pd, drv); fprintf(out_stream, " Pullup: %d, Pulldown: %d, DriveCap: %"PRIu32"\n", io_config.pu, io_config.pd, (uint32_t)io_config.drv);
fprintf(out_stream, " InputEn: %d, OutputEn: %d, OpenDrain: %d\n", ie, oe, od); fprintf(out_stream, " InputEn: %d, OutputEn: %d, OpenDrain: %d\n", io_config.ie, io_config.oe, io_config.od);
fprintf(out_stream, " FuncSel: %"PRIu32" (%s)\n", fun_sel, (fun_sel == PIN_FUNC_GPIO) ? "GPIO" : "IOMUX"); fprintf(out_stream, " FuncSel: %"PRIu32" (%s)\n", io_config.fun_sel, (io_config.fun_sel == PIN_FUNC_GPIO) ? "GPIO" : "IOMUX");
if (oe && fun_sel == PIN_FUNC_GPIO) { if (io_config.oe && io_config.fun_sel == PIN_FUNC_GPIO) {
fprintf(out_stream, " GPIO Matrix SigOut ID: %"PRIu32"%s\n", sig_out, (sig_out == SIG_GPIO_OUT_IDX) ? " (simple GPIO output)" : ""); fprintf(out_stream, " GPIO Matrix SigOut ID: %"PRIu32"%s\n", io_config.sig_out, (io_config.sig_out == SIG_GPIO_OUT_IDX) ? " (simple GPIO output)" : "");
} }
if (ie && fun_sel == PIN_FUNC_GPIO) { if (io_config.ie && io_config.fun_sel == PIN_FUNC_GPIO) {
uint32_t cnt = 0; uint32_t cnt = 0;
fprintf(out_stream, " GPIO Matrix SigIn ID:"); fprintf(out_stream, " GPIO Matrix SigIn ID:");
for (int i = 0; i < SIG_GPIO_OUT_IDX; i++) { for (int i = 0; i < SIG_GPIO_OUT_IDX; i++) {
@@ -1129,7 +1115,7 @@ esp_err_t gpio_dump_io_configuration(FILE *out_stream, uint64_t io_bit_mask)
} }
fprintf(out_stream, "\n"); fprintf(out_stream, "\n");
} }
fprintf(out_stream, " SleepSelEn: %d\n", slp_sel); fprintf(out_stream, " SleepSelEn: %d\n", io_config.slp_sel);
fprintf(out_stream, "\n"); fprintf(out_stream, "\n");
} }
fprintf(out_stream, "=================IO DUMP End=================\n"); fprintf(out_stream, "=================IO DUMP End=================\n");

50
components/hal/esp32/include/hal/gpio_ll.h
View File

@@ -47,50 +47,22 @@ extern const uint8_t GPIO_PIN_MUX_REG_OFFSET[SOC_GPIO_PIN_COUNT];
* *
* @param hw Peripheral GPIO hardware instance address. * @param hw Peripheral GPIO hardware instance address.
* @param gpio_num GPIO number * @param gpio_num GPIO number
* @param pu Pull-up enabled or not * @param[out] io_config Pointer to the structure that saves the specific IO configuration
* @param pd Pull-down enabled or not
* @param ie Input enabled or not
* @param oe Output enabled or not
* @param od Open-drain enabled or not
* @param drv Drive strength value
* @param fun_sel IOMUX function selection value
* @param sig_out Outputting peripheral signal index
* @param slp_sel Pin sleep mode enabled or not
*/ */
static inline void gpio_ll_get_io_config(gpio_dev_t *hw, uint32_t gpio_num, static inline void gpio_ll_get_io_config(gpio_dev_t *hw, uint32_t gpio_num, gpio_io_config_t *io_config)
bool *pu, bool *pd, bool *ie, bool *oe, bool *od, uint32_t *drv,
uint32_t *fun_sel, uint32_t *sig_out, bool *slp_sel)
{ {
uint32_t bit_shift = (gpio_num < 32) ? gpio_num : (gpio_num - 32); uint32_t bit_shift = (gpio_num < 32) ? gpio_num : (gpio_num - 32);
uint32_t bit_mask = 1 << bit_shift; uint32_t bit_mask = 1 << bit_shift;
uint32_t iomux_reg_val = REG_READ(GPIO_PIN_MUX_REG[gpio_num]); uint32_t iomux_reg_val = REG_READ(GPIO_PIN_MUX_REG[gpio_num]);
if (pu) { io_config->pu = (iomux_reg_val & FUN_PU_M) >> FUN_PU_S;
*pu = (iomux_reg_val & FUN_PU_M) >> FUN_PU_S; io_config->pd = (iomux_reg_val & FUN_PD_M) >> FUN_PD_S;
} io_config->ie = (iomux_reg_val & FUN_IE_M) >> FUN_IE_S;
if (pd) { io_config->oe = (((gpio_num < 32) ? hw->enable : hw->enable1.val) & bit_mask) >> bit_shift;
*pd = (iomux_reg_val & FUN_PD_M) >> FUN_PD_S; io_config->od = hw->pin[gpio_num].pad_driver;
} io_config->drv = (gpio_drive_cap_t)((iomux_reg_val & FUN_DRV_M) >> FUN_DRV_S);
if (ie) { io_config->fun_sel = (iomux_reg_val & MCU_SEL_M) >> MCU_SEL_S;
*ie = (iomux_reg_val & FUN_IE_M) >> FUN_IE_S; io_config->sig_out = hw->func_out_sel_cfg[gpio_num].func_sel;
} io_config->slp_sel = (iomux_reg_val & SLP_SEL_M) >> SLP_SEL_S;
if (oe) {
*oe = (((gpio_num < 32) ? hw->enable : hw->enable1.val) & bit_mask) >> bit_shift;
}
if (od) {
*od = hw->pin[gpio_num].pad_driver;
}
if (drv) {
*drv = (iomux_reg_val & FUN_DRV_M) >> FUN_DRV_S;
}
if (fun_sel) {
*fun_sel = (iomux_reg_val & MCU_SEL_M) >> MCU_SEL_S;
}
if (sig_out) {
*sig_out = hw->func_out_sel_cfg[gpio_num].func_sel;
}
if (slp_sel) {
*slp_sel = (iomux_reg_val & SLP_SEL_M) >> SLP_SEL_S;
}
} }
/** /**

50
components/hal/esp32c2/include/hal/gpio_ll.h
View File

@@ -38,49 +38,21 @@ extern "C" {
* *
* @param hw Peripheral GPIO hardware instance address. * @param hw Peripheral GPIO hardware instance address.
* @param gpio_num GPIO number * @param gpio_num GPIO number
* @param pu Pull-up enabled or not * @param[out] io_config Pointer to the structure that saves the specific IO configuration
* @param pd Pull-down enabled or not
* @param ie Input enabled or not
* @param oe Output enabled or not
* @param od Open-drain enabled or not
* @param drv Drive strength value
* @param fun_sel IOMUX function selection value
* @param sig_out Outputting peripheral signal index
* @param slp_sel Pin sleep mode enabled or not
*/ */
static inline void gpio_ll_get_io_config(gpio_dev_t *hw, uint32_t gpio_num, static inline void gpio_ll_get_io_config(gpio_dev_t *hw, uint32_t gpio_num, gpio_io_config_t *io_config)
bool *pu, bool *pd, bool *ie, bool *oe, bool *od, uint32_t *drv,
uint32_t *fun_sel, uint32_t *sig_out, bool *slp_sel)
{ {
uint32_t bit_mask = 1 << gpio_num; uint32_t bit_mask = 1 << gpio_num;
uint32_t iomux_reg_val = REG_READ(GPIO_PIN_MUX_REG[gpio_num]); uint32_t iomux_reg_val = REG_READ(GPIO_PIN_MUX_REG[gpio_num]);
if (pu) { io_config->pu = (iomux_reg_val & FUN_PU_M) >> FUN_PU_S;
*pu = (iomux_reg_val & FUN_PU_M) >> FUN_PU_S; io_config->pd = (iomux_reg_val & FUN_PD_M) >> FUN_PD_S;
} io_config->ie = (iomux_reg_val & FUN_IE_M) >> FUN_IE_S;
if (pd) { io_config->oe = (hw->enable.val & bit_mask) >> gpio_num;
*pd = (iomux_reg_val & FUN_PD_M) >> FUN_PD_S; io_config->od = hw->pin[gpio_num].pad_driver;
} io_config->drv = (gpio_drive_cap_t)((iomux_reg_val & FUN_DRV_M) >> FUN_DRV_S);
if (ie) { io_config->fun_sel = (iomux_reg_val & MCU_SEL_M) >> MCU_SEL_S;
*ie = (iomux_reg_val & FUN_IE_M) >> FUN_IE_S; io_config->sig_out = HAL_FORCE_READ_U32_REG_FIELD(hw->func_out_sel_cfg[gpio_num], out_sel);
} io_config->slp_sel = (iomux_reg_val & SLP_SEL_M) >> SLP_SEL_S;
if (oe) {
*oe = (hw->enable.val & bit_mask) >> gpio_num;
}
if (od) {
*od = hw->pin[gpio_num].pad_driver;
}
if (drv) {
*drv = (iomux_reg_val & FUN_DRV_M) >> FUN_DRV_S;
}
if (fun_sel) {
*fun_sel = (iomux_reg_val & MCU_SEL_M) >> MCU_SEL_S;
}
if (sig_out) {
*sig_out = HAL_FORCE_READ_U32_REG_FIELD(hw->func_out_sel_cfg[gpio_num], out_sel);
}
if (slp_sel) {
*slp_sel = (iomux_reg_val & SLP_SEL_M) >> SLP_SEL_S;
}
} }
/** /**

50
components/hal/esp32c3/include/hal/gpio_ll.h
View File

@@ -741,49 +741,21 @@ static inline bool gpio_ll_deepsleep_wakeup_is_enabled(gpio_dev_t *hw, uint32_t
* *
* @param hw Peripheral GPIO hardware instance address. * @param hw Peripheral GPIO hardware instance address.
* @param gpio_num GPIO number * @param gpio_num GPIO number
* @param pu Pull-up enabled or not * @param[out] io_config Pointer to the structure that saves the specific IO configuration
* @param pd Pull-down enabled or not
* @param ie Input enabled or not
* @param oe Output enabled or not
* @param od Open-drain enabled or not
* @param drv Drive strength value
* @param fun_sel IOMUX function selection value
* @param sig_out Outputting peripheral signal index
* @param slp_sel Pin sleep mode enabled or not
*/ */
static inline void gpio_ll_get_io_config(gpio_dev_t *hw, uint32_t gpio_num, static inline void gpio_ll_get_io_config(gpio_dev_t *hw, uint32_t gpio_num, gpio_io_config_t *io_config)
bool *pu, bool *pd, bool *ie, bool *oe, bool *od, uint32_t *drv,
uint32_t *fun_sel, uint32_t *sig_out, bool *slp_sel)
{ {
uint32_t bit_mask = 1 << gpio_num; uint32_t bit_mask = 1 << gpio_num;
uint32_t iomux_reg_val = REG_READ(GPIO_PIN_MUX_REG[gpio_num]); uint32_t iomux_reg_val = REG_READ(GPIO_PIN_MUX_REG[gpio_num]);
if (pu) { io_config->pu = (iomux_reg_val & FUN_PU_M) >> FUN_PU_S;
*pu = (iomux_reg_val & FUN_PU_M) >> FUN_PU_S; io_config->pd = (iomux_reg_val & FUN_PD_M) >> FUN_PD_S;
} io_config->ie = (iomux_reg_val & FUN_IE_M) >> FUN_IE_S;
if (pd) { io_config->oe = (hw->enable.val & bit_mask) >> gpio_num;
*pd = (iomux_reg_val & FUN_PD_M) >> FUN_PD_S; io_config->od = hw->pin[gpio_num].pad_driver;
} gpio_ll_get_drive_capability(hw, gpio_num, &(io_config->drv)); // specific workaround in the LL
if (ie) { io_config->fun_sel = (iomux_reg_val & MCU_SEL_M) >> MCU_SEL_S;
*ie = (iomux_reg_val & FUN_IE_M) >> FUN_IE_S; io_config->sig_out = HAL_FORCE_READ_U32_REG_FIELD(hw->func_out_sel_cfg[gpio_num], out_sel);
} io_config->slp_sel = (iomux_reg_val & SLP_SEL_M) >> SLP_SEL_S;
if (oe) {
*oe = (hw->enable.val & bit_mask) >> gpio_num;
}
if (od) {
*od = hw->pin[gpio_num].pad_driver;
}
if (drv) {
gpio_ll_get_drive_capability(hw, gpio_num, (gpio_drive_cap_t *)drv); // specific workaround in the LL
}
if (fun_sel) {
*fun_sel = (iomux_reg_val & MCU_SEL_M) >> MCU_SEL_S;
}
if (sig_out) {
*sig_out = HAL_FORCE_READ_U32_REG_FIELD(hw->func_out_sel_cfg[gpio_num], out_sel);
}
if (slp_sel) {
*slp_sel = (iomux_reg_val & SLP_SEL_M) >> SLP_SEL_S;
}
} }
#ifdef __cplusplus #ifdef __cplusplus

50
components/hal/esp32c5/include/hal/gpio_ll.h
View File

@@ -42,47 +42,19 @@ extern "C" {
* *
* @param hw Peripheral GPIO hardware instance address. * @param hw Peripheral GPIO hardware instance address.
* @param gpio_num GPIO number * @param gpio_num GPIO number
* @param pu Pull-up enabled or not * @param[out] io_config Pointer to the structure that saves the specific IO configuration
* @param pd Pull-down enabled or not
* @param ie Input enabled or not
* @param oe Output enabled or not
* @param od Open-drain enabled or not
* @param drv Drive strength value
* @param fun_sel IOMUX function selection value
* @param sig_out Outputting peripheral signal index
* @param slp_sel Pin sleep mode enabled or not
*/ */
static inline void gpio_ll_get_io_config(gpio_dev_t *hw, uint32_t gpio_num, static inline void gpio_ll_get_io_config(gpio_dev_t *hw, uint32_t gpio_num, gpio_io_config_t *io_config)
bool *pu, bool *pd, bool *ie, bool *oe, bool *od, uint32_t *drv,
uint32_t *fun_sel, uint32_t *sig_out, bool *slp_sel)
{ {
if (pu) { io_config->pu = IO_MUX.gpio[gpio_num].fun_wpu;
*pu = IO_MUX.gpio[gpio_num].fun_wpu; io_config->pd = IO_MUX.gpio[gpio_num].fun_wpd;
} io_config->ie = IO_MUX.gpio[gpio_num].fun_ie;
if (pd) { io_config->oe = (hw->enable.val & (1 << gpio_num)) >> gpio_num;
*pd = IO_MUX.gpio[gpio_num].fun_wpd; io_config->od = hw->pin[gpio_num].pad_driver;
} io_config->drv = (gpio_drive_cap_t)IO_MUX.gpio[gpio_num].fun_drv;
if (ie) { io_config->fun_sel = IO_MUX.gpio[gpio_num].mcu_sel;
*ie = IO_MUX.gpio[gpio_num].fun_ie; io_config->sig_out = hw->func_out_sel_cfg[gpio_num].out_sel;
} io_config->slp_sel = IO_MUX.gpio[gpio_num].slp_sel;
if (oe) {
*oe = (hw->enable.val & (1 << gpio_num)) >> gpio_num;
}
if (od) {
*od = hw->pin[gpio_num].pad_driver;
}
if (drv) {
*drv = IO_MUX.gpio[gpio_num].fun_drv;
}
if (fun_sel) {
*fun_sel = IO_MUX.gpio[gpio_num].mcu_sel;
}
if (sig_out) {
*sig_out = hw->func_out_sel_cfg[gpio_num].out_sel;
}
if (slp_sel) {
*slp_sel = IO_MUX.gpio[gpio_num].slp_sel;
}
} }
/** /**

50
components/hal/esp32c6/include/hal/gpio_ll.h
View File

@@ -43,49 +43,21 @@ extern "C" {
* *
* @param hw Peripheral GPIO hardware instance address. * @param hw Peripheral GPIO hardware instance address.
* @param gpio_num GPIO number * @param gpio_num GPIO number
* @param pu Pull-up enabled or not * @param[out] io_config Pointer to the structure that saves the specific IO configuration
* @param pd Pull-down enabled or not
* @param ie Input enabled or not
* @param oe Output enabled or not
* @param od Open-drain enabled or not
* @param drv Drive strength value
* @param fun_sel IOMUX function selection value
* @param sig_out Outputting peripheral signal index
* @param slp_sel Pin sleep mode enabled or not
*/ */
static inline void gpio_ll_get_io_config(gpio_dev_t *hw, uint32_t gpio_num, static inline void gpio_ll_get_io_config(gpio_dev_t *hw, uint32_t gpio_num, gpio_io_config_t *io_config)
bool *pu, bool *pd, bool *ie, bool *oe, bool *od, uint32_t *drv,
uint32_t *fun_sel, uint32_t *sig_out, bool *slp_sel)
{ {
uint32_t bit_mask = 1 << gpio_num; uint32_t bit_mask = 1 << gpio_num;
uint32_t iomux_reg_val = REG_READ(IO_MUX_GPIO0_REG + (gpio_num * 4)); uint32_t iomux_reg_val = REG_READ(IO_MUX_GPIO0_REG + (gpio_num * 4));
if (pu) { io_config->pu = (iomux_reg_val & FUN_PU_M) >> FUN_PU_S;
*pu = (iomux_reg_val & FUN_PU_M) >> FUN_PU_S; io_config->pd = (iomux_reg_val & FUN_PD_M) >> FUN_PD_S;
} io_config->ie = (iomux_reg_val & FUN_IE_M) >> FUN_IE_S;
if (pd) { io_config->oe = (hw->enable.val & bit_mask) >> gpio_num;
*pd = (iomux_reg_val & FUN_PD_M) >> FUN_PD_S; io_config->od = hw->pin[gpio_num].pad_driver;
} io_config->drv = (gpio_drive_cap_t)((iomux_reg_val & FUN_DRV_M) >> FUN_DRV_S);
if (ie) { io_config->fun_sel = (iomux_reg_val & MCU_SEL_M) >> MCU_SEL_S;
*ie = (iomux_reg_val & FUN_IE_M) >> FUN_IE_S; io_config->sig_out = HAL_FORCE_READ_U32_REG_FIELD(hw->func_out_sel_cfg[gpio_num], out_sel);
} io_config->slp_sel = (iomux_reg_val & SLP_SEL_M) >> SLP_SEL_S;
if (oe) {
*oe = (hw->enable.val & bit_mask) >> gpio_num;
}
if (od) {
*od = hw->pin[gpio_num].pad_driver;
}
if (drv) {
*drv = (iomux_reg_val & FUN_DRV_M) >> FUN_DRV_S;
}
if (fun_sel) {
*fun_sel = (iomux_reg_val & MCU_SEL_M) >> MCU_SEL_S;
}
if (sig_out) {
*sig_out = HAL_FORCE_READ_U32_REG_FIELD(hw->func_out_sel_cfg[gpio_num], out_sel);
}
if (slp_sel) {
*slp_sel = (iomux_reg_val & SLP_SEL_M) >> SLP_SEL_S;
}
} }
/** /**

50
components/hal/esp32c61/include/hal/gpio_ll.h
View File

@@ -43,47 +43,19 @@ extern "C" {
* *
* @param hw Peripheral GPIO hardware instance address. * @param hw Peripheral GPIO hardware instance address.
* @param gpio_num GPIO number * @param gpio_num GPIO number
* @param pu Pull-up enabled or not * @param[out] io_config Pointer to the structure that saves the specific IO configuration
* @param pd Pull-down enabled or not
* @param ie Input enabled or not
* @param oe Output enabled or not
* @param od Open-drain enabled or not
* @param drv Drive strength value
* @param fun_sel IOMUX function selection value
* @param sig_out Outputting peripheral signal index
* @param slp_sel Pin sleep mode enabled or not
*/ */
static inline void gpio_ll_get_io_config(gpio_dev_t *hw, uint32_t gpio_num, static inline void gpio_ll_get_io_config(gpio_dev_t *hw, uint32_t gpio_num, gpio_io_config_t *io_config)
bool *pu, bool *pd, bool *ie, bool *oe, bool *od, uint32_t *drv,
uint32_t *fun_sel, uint32_t *sig_out, bool *slp_sel)
{ {
if (pu) { io_config->pu = IO_MUX.gpion[gpio_num].gpion_fun_wpu;
*pu = IO_MUX.gpion[gpio_num].gpion_fun_wpu; io_config->pd = IO_MUX.gpion[gpio_num].gpion_fun_wpd;
} io_config->ie = IO_MUX.gpion[gpio_num].gpion_fun_ie;
if (pd) { io_config->oe = (hw->enable.val & (1 << gpio_num)) >> gpio_num;
*pd = IO_MUX.gpion[gpio_num].gpion_fun_wpd; io_config->od = hw->pinn[gpio_num].pinn_pad_driver;
} io_config->drv = (gpio_drive_cap_t)IO_MUX.gpion[gpio_num].gpion_fun_drv;
if (ie) { io_config->fun_sel = IO_MUX.gpion[gpio_num].gpion_mcu_sel;
*ie = IO_MUX.gpion[gpio_num].gpion_fun_ie; io_config->sig_out = hw->funcn_out_sel_cfg[gpio_num].funcn_out_sel;
} io_config->slp_sel = IO_MUX.gpion[gpio_num].gpion_slp_sel;
if (oe) {
*oe = (hw->enable.val & (1 << gpio_num)) >> gpio_num;
}
if (od) {
*od = hw->pinn[gpio_num].pinn_pad_driver;
}
if (drv) {
*drv = IO_MUX.gpion[gpio_num].gpion_fun_drv;
}
if (fun_sel) {
*fun_sel = IO_MUX.gpion[gpio_num].gpion_mcu_sel;
}
if (sig_out) {
*sig_out = hw->funcn_out_sel_cfg[gpio_num].funcn_out_sel;
}
if (slp_sel) {
*slp_sel = IO_MUX.gpion[gpio_num].gpion_slp_sel;
}
} }
/** /**

50
components/hal/esp32h2/include/hal/gpio_ll.h
View File

@@ -43,49 +43,21 @@ extern "C" {
* *
* @param hw Peripheral GPIO hardware instance address. * @param hw Peripheral GPIO hardware instance address.
* @param gpio_num GPIO number * @param gpio_num GPIO number
* @param pu Pull-up enabled or not * @param[out] io_config Pointer to the structure that saves the specific IO configuration
* @param pd Pull-down enabled or not
* @param ie Input enabled or not
* @param oe Output enabled or not
* @param od Open-drain enabled or not
* @param drv Drive strength value
* @param fun_sel IOMUX function selection value
* @param sig_out Outputting peripheral signal index
* @param slp_sel Pin sleep mode enabled or not
*/ */
static inline void gpio_ll_get_io_config(gpio_dev_t *hw, uint32_t gpio_num, static inline void gpio_ll_get_io_config(gpio_dev_t *hw, uint32_t gpio_num, gpio_io_config_t *io_config)
bool *pu, bool *pd, bool *ie, bool *oe, bool *od, uint32_t *drv,
uint32_t *fun_sel, uint32_t *sig_out, bool *slp_sel)
{ {
uint32_t bit_mask = 1 << gpio_num; uint32_t bit_mask = 1 << gpio_num;
uint32_t iomux_reg_val = REG_READ(IO_MUX_GPIO0_REG + (gpio_num * 4)); uint32_t iomux_reg_val = REG_READ(IO_MUX_GPIO0_REG + (gpio_num * 4));
if (pu) { io_config->pu = (iomux_reg_val & FUN_PU_M) >> FUN_PU_S;
*pu = (iomux_reg_val & FUN_PU_M) >> FUN_PU_S; io_config->pd = (iomux_reg_val & FUN_PD_M) >> FUN_PD_S;
} io_config->ie = (iomux_reg_val & FUN_IE_M) >> FUN_IE_S;
if (pd) { io_config->oe = (hw->enable.val & bit_mask) >> gpio_num;
*pd = (iomux_reg_val & FUN_PD_M) >> FUN_PD_S; io_config->od = hw->pin[gpio_num].pad_driver;
} io_config->drv = (gpio_drive_cap_t)((iomux_reg_val & FUN_DRV_M) >> FUN_DRV_S);
if (ie) { io_config->fun_sel = (iomux_reg_val & MCU_SEL_M) >> MCU_SEL_S;
*ie = (iomux_reg_val & FUN_IE_M) >> FUN_IE_S; io_config->sig_out = HAL_FORCE_READ_U32_REG_FIELD(hw->func_out_sel_cfg[gpio_num], out_sel);
} io_config->slp_sel = (iomux_reg_val & SLP_SEL_M) >> SLP_SEL_S;
if (oe) {
*oe = (hw->enable.val & bit_mask) >> gpio_num;
}
if (od) {
*od = hw->pin[gpio_num].pad_driver;
}
if (drv) {
*drv = (iomux_reg_val & FUN_DRV_M) >> FUN_DRV_S;
}
if (fun_sel) {
*fun_sel = (iomux_reg_val & MCU_SEL_M) >> MCU_SEL_S;
}
if (sig_out) {
*sig_out = HAL_FORCE_READ_U32_REG_FIELD(hw->func_out_sel_cfg[gpio_num], out_sel);
}
if (slp_sel) {
*slp_sel = (iomux_reg_val & SLP_SEL_M) >> SLP_SEL_S;
}
} }
/** /**

32
components/hal/esp32h21/include/hal/gpio_ll.h
View File

@@ -45,31 +45,21 @@ extern "C" {
* *
* @param hw Peripheral GPIO hardware instance address. * @param hw Peripheral GPIO hardware instance address.
* @param gpio_num GPIO number * @param gpio_num GPIO number
* @param pu Pull-up enabled or not * @param[out] io_config Pointer to the structure that saves the specific IO configuration
* @param pd Pull-down enabled or not
* @param ie Input enabled or not
* @param oe Output enabled or not
* @param od Open-drain enabled or not
* @param drv Drive strength value
* @param fun_sel IOMUX function selection value
* @param sig_out Outputting peripheral signal index
* @param slp_sel Pin sleep mode enabled or not
*/ */
static inline void gpio_ll_get_io_config(gpio_dev_t *hw, uint32_t gpio_num, static inline void gpio_ll_get_io_config(gpio_dev_t *hw, uint32_t gpio_num, gpio_io_config_t *io_config)
bool *pu, bool *pd, bool *ie, bool *oe, bool *od, uint32_t *drv,
uint32_t *fun_sel, uint32_t *sig_out, bool *slp_sel)
{ {
uint32_t bit_mask = 1 << gpio_num; uint32_t bit_mask = 1 << gpio_num;
uint32_t iomux_reg_val = REG_READ(IO_MUX_GPIO0_REG + (gpio_num * 4)); uint32_t iomux_reg_val = REG_READ(IO_MUX_GPIO0_REG + (gpio_num * 4));
*pu = (iomux_reg_val & FUN_PU_M) >> FUN_PU_S; io_config->pu = (iomux_reg_val & FUN_PU_M) >> FUN_PU_S;
*pd = (iomux_reg_val & FUN_PD_M) >> FUN_PD_S; io_config->pd = (iomux_reg_val & FUN_PD_M) >> FUN_PD_S;
*ie = (iomux_reg_val & FUN_IE_M) >> FUN_IE_S; io_config->ie = (iomux_reg_val & FUN_IE_M) >> FUN_IE_S;
*oe = (hw->enable.val & bit_mask) >> gpio_num; io_config->oe = (hw->enable.val & bit_mask) >> gpio_num;
*od = hw->pinn[gpio_num].pinn_pad_driver; io_config->od = hw->pinn[gpio_num].pinn_pad_driver;
*drv = (iomux_reg_val & FUN_DRV_M) >> FUN_DRV_S; io_config->drv = (gpio_drive_cap_t)((iomux_reg_val & FUN_DRV_M) >> FUN_DRV_S);
*fun_sel = (iomux_reg_val & MCU_SEL_M) >> MCU_SEL_S; io_config->fun_sel = (iomux_reg_val & MCU_SEL_M) >> MCU_SEL_S;
*sig_out = hw->funcn_out_sel_cfg[gpio_num].funcn_out_sel; io_config->sig_out = hw->funcn_out_sel_cfg[gpio_num].funcn_out_sel;
*slp_sel = (iomux_reg_val & SLP_SEL_M) >> SLP_SEL_S; io_config->slp_sel = (iomux_reg_val & SLP_SEL_M) >> SLP_SEL_S;
} }
/** /**

50
components/hal/esp32p4/include/hal/gpio_ll.h
View File

@@ -49,49 +49,21 @@ extern "C" {
* *
* @param hw Peripheral GPIO hardware instance address. * @param hw Peripheral GPIO hardware instance address.
* @param gpio_num GPIO number * @param gpio_num GPIO number
* @param pu Pull-up enabled or not * @param[out] io_config Pointer to the structure that saves the specific IO configuration
* @param pd Pull-down enabled or not
* @param ie Input enabled or not
* @param oe Output enabled or not
* @param od Open-drain enabled or not
* @param drv Drive strength value
* @param fun_sel IOMUX function selection value
* @param sig_out Outputting peripheral signal index
* @param slp_sel Pin sleep mode enabled or not
*/ */
static inline void gpio_ll_get_io_config(gpio_dev_t *hw, uint32_t gpio_num, static inline void gpio_ll_get_io_config(gpio_dev_t *hw, uint32_t gpio_num, gpio_io_config_t *io_config)
bool *pu, bool *pd, bool *ie, bool *oe, bool *od, uint32_t *drv,
uint32_t *fun_sel, uint32_t *sig_out, bool *slp_sel)
{ {
uint32_t bit_shift = (gpio_num < 32) ? gpio_num : (gpio_num - 32); uint32_t bit_shift = (gpio_num < 32) ? gpio_num : (gpio_num - 32);
uint32_t bit_mask = 1 << bit_shift; uint32_t bit_mask = 1 << bit_shift;
if (pu) { io_config->pu = IO_MUX.gpio[gpio_num].fun_wpu;
*pu = IO_MUX.gpio[gpio_num].fun_wpu; io_config->pd = IO_MUX.gpio[gpio_num].fun_wpd;
} io_config->ie = IO_MUX.gpio[gpio_num].fun_ie;
if (pd) { io_config->oe = (((gpio_num < 32) ? hw->enable.val : hw->enable1.val) & bit_mask) >> bit_shift;
*pd = IO_MUX.gpio[gpio_num].fun_wpd; io_config->od = hw->pin[gpio_num].pad_driver;
} io_config->drv = (gpio_drive_cap_t)IO_MUX.gpio[gpio_num].fun_drv;
if (ie) { io_config->fun_sel = IO_MUX.gpio[gpio_num].mcu_sel;
*ie = IO_MUX.gpio[gpio_num].fun_ie; io_config->sig_out = hw->func_out_sel_cfg[gpio_num].out_sel;
} io_config->slp_sel = IO_MUX.gpio[gpio_num].slp_sel;
if (oe) {
*oe = (((gpio_num < 32) ? hw->enable.val : hw->enable1.val) & bit_mask) >> bit_shift;
}
if (od) {
*od = hw->pin[gpio_num].pad_driver;
}
if (drv) {
*drv = IO_MUX.gpio[gpio_num].fun_drv;
}
if (fun_sel) {
*fun_sel = IO_MUX.gpio[gpio_num].mcu_sel;
}
if (sig_out) {
*sig_out = hw->func_out_sel_cfg[gpio_num].out_sel;
}
if (slp_sel) {
*slp_sel = IO_MUX.gpio[gpio_num].slp_sel;
}
} }
/** /**

50
components/hal/esp32s2/include/hal/gpio_ll.h
View File

@@ -37,50 +37,22 @@ extern "C" {
* *
* @param hw Peripheral GPIO hardware instance address. * @param hw Peripheral GPIO hardware instance address.
* @param gpio_num GPIO number * @param gpio_num GPIO number
* @param pu Pull-up enabled or not * @param[out] io_config Pointer to the structure that saves the specific IO configuration
* @param pd Pull-down enabled or not
* @param ie Input enabled or not
* @param oe Output enabled or not
* @param od Open-drain enabled or not
* @param drv Drive strength value
* @param fun_sel IOMUX function selection value
* @param sig_out Outputting peripheral signal index
* @param slp_sel Pin sleep mode enabled or not
*/ */
static inline void gpio_ll_get_io_config(gpio_dev_t *hw, uint32_t gpio_num, static inline void gpio_ll_get_io_config(gpio_dev_t *hw, uint32_t gpio_num, gpio_io_config_t *io_config)
bool *pu, bool *pd, bool *ie, bool *oe, bool *od, uint32_t *drv,
uint32_t *fun_sel, uint32_t *sig_out, bool *slp_sel)
{ {
uint32_t bit_shift = (gpio_num < 32) ? gpio_num : (gpio_num - 32); uint32_t bit_shift = (gpio_num < 32) ? gpio_num : (gpio_num - 32);
uint32_t bit_mask = 1 << bit_shift; uint32_t bit_mask = 1 << bit_shift;
uint32_t iomux_reg_val = REG_READ(GPIO_PIN_MUX_REG[gpio_num]); uint32_t iomux_reg_val = REG_READ(GPIO_PIN_MUX_REG[gpio_num]);
if (pu) { io_config->pu = (iomux_reg_val & FUN_PU_M) >> FUN_PU_S;
*pu = (iomux_reg_val & FUN_PU_M) >> FUN_PU_S; io_config->pd = (iomux_reg_val & FUN_PD_M) >> FUN_PD_S;
} io_config->ie = (iomux_reg_val & FUN_IE_M) >> FUN_IE_S;
if (pd) { io_config->oe = (((gpio_num < 32) ? hw->enable : hw->enable1.val) & bit_mask) >> bit_shift;
*pd = (iomux_reg_val & FUN_PD_M) >> FUN_PD_S; io_config->od = hw->pin[gpio_num].pad_driver;
} io_config->drv = (gpio_drive_cap_t)((iomux_reg_val & FUN_DRV_M) >> FUN_DRV_S);
if (ie) { io_config->fun_sel = (iomux_reg_val & MCU_SEL_M) >> MCU_SEL_S;
*ie = (iomux_reg_val & FUN_IE_M) >> FUN_IE_S; io_config->sig_out = hw->func_out_sel_cfg[gpio_num].func_sel;
} io_config->slp_sel = (iomux_reg_val & SLP_SEL_M) >> SLP_SEL_S;
if (oe) {
*oe = (((gpio_num < 32) ? hw->enable : hw->enable1.val) & bit_mask) >> bit_shift;
}
if (od) {
*od = hw->pin[gpio_num].pad_driver;
}
if (drv) {
*drv = (iomux_reg_val & FUN_DRV_M) >> FUN_DRV_S;
}
if (fun_sel) {
*fun_sel = (iomux_reg_val & MCU_SEL_M) >> MCU_SEL_S;
}
if (sig_out) {
*sig_out = hw->func_out_sel_cfg[gpio_num].func_sel;
}
if (slp_sel) {
*slp_sel = (iomux_reg_val & SLP_SEL_M) >> SLP_SEL_S;
}
} }
/** /**

50
components/hal/esp32s3/include/hal/gpio_ll.h
View File

@@ -705,50 +705,22 @@ static inline void gpio_ll_sleep_output_enable(gpio_dev_t *hw, uint32_t gpio_num
* *
* @param hw Peripheral GPIO hardware instance address. * @param hw Peripheral GPIO hardware instance address.
* @param gpio_num GPIO number * @param gpio_num GPIO number
* @param pu Pull-up enabled or not * @param[out] io_config Pointer to the structure that saves the specific IO configuration
* @param pd Pull-down enabled or not
* @param ie Input enabled or not
* @param oe Output enabled or not
* @param od Open-drain enabled or not
* @param drv Drive strength value
* @param fun_sel IOMUX function selection value
* @param sig_out Outputting peripheral signal index
* @param slp_sel Pin sleep mode enabled or not
*/ */
static inline void gpio_ll_get_io_config(gpio_dev_t *hw, uint32_t gpio_num, static inline void gpio_ll_get_io_config(gpio_dev_t *hw, uint32_t gpio_num, gpio_io_config_t *io_config)
bool *pu, bool *pd, bool *ie, bool *oe, bool *od, uint32_t *drv,
uint32_t *fun_sel, uint32_t *sig_out, bool *slp_sel)
{ {
uint32_t bit_shift = (gpio_num < 32) ? gpio_num : (gpio_num - 32); uint32_t bit_shift = (gpio_num < 32) ? gpio_num : (gpio_num - 32);
uint32_t bit_mask = 1 << bit_shift; uint32_t bit_mask = 1 << bit_shift;
uint32_t iomux_reg_val = REG_READ(GPIO_PIN_MUX_REG[gpio_num]); uint32_t iomux_reg_val = REG_READ(GPIO_PIN_MUX_REG[gpio_num]);
if (pu) { io_config->pu = (iomux_reg_val & FUN_PU_M) >> FUN_PU_S;
*pu = (iomux_reg_val & FUN_PU_M) >> FUN_PU_S; io_config->pd = (iomux_reg_val & FUN_PD_M) >> FUN_PD_S;
} io_config->ie = (iomux_reg_val & FUN_IE_M) >> FUN_IE_S;
if (pd) { io_config->oe = (((gpio_num < 32) ? hw->enable : hw->enable1.val) & bit_mask) >> bit_shift;
*pd = (iomux_reg_val & FUN_PD_M) >> FUN_PD_S; io_config->od = hw->pin[gpio_num].pad_driver;
} gpio_ll_get_drive_capability(hw, gpio_num, &(io_config->drv)); // specific workaround in the LL
if (ie) { io_config->fun_sel = (iomux_reg_val & MCU_SEL_M) >> MCU_SEL_S;
*ie = (iomux_reg_val & FUN_IE_M) >> FUN_IE_S; io_config->sig_out = hw->func_out_sel_cfg[gpio_num].func_sel;
} io_config->slp_sel = (iomux_reg_val & SLP_SEL_M) >> SLP_SEL_S;
if (oe) {
*oe = (((gpio_num < 32) ? hw->enable : hw->enable1.val) & bit_mask) >> bit_shift;
}
if (od) {
*od = hw->pin[gpio_num].pad_driver;
}
if (drv) {
gpio_ll_get_drive_capability(hw, gpio_num, (gpio_drive_cap_t *)drv); // specific workaround in the LL
}
if (fun_sel) {
*fun_sel = (iomux_reg_val & MCU_SEL_M) >> MCU_SEL_S;
}
if (sig_out) {
*sig_out = hw->func_out_sel_cfg[gpio_num].func_sel;
}
if (slp_sel) {
*slp_sel = (iomux_reg_val & SLP_SEL_M) >> SLP_SEL_S;
}
} }
#ifdef __cplusplus #ifdef __cplusplus

13
components/hal/include/hal/gpio_hal.h
View File

@@ -39,18 +39,9 @@ typedef struct {
* *
* @param hal Context of the HAL layer * @param hal Context of the HAL layer
* @param gpio_num GPIO number * @param gpio_num GPIO number
* @param pu Pointer to accept the status of pull-up enabled or not * @param[out] out_io_config Pointer to the structure that saves the specific IO configuration
* @param pd Pointer to accept the status of pull-down enabled or not
* @param ie Pointer to accept the status of input enabled or not
* @param oe Pointer to accept the status of output enabled or not
* @param od Pointer to accept the status of open-drain enabled or not
* @param drv Pointer to accept the value of drive strength
* @param fun_sel Pointer to accept the value of IOMUX function selection
* @param sig_out Pointer to accept the index of outputting peripheral signal
* @param slp_sel Pointer to accept the status of pin sleep mode enabled or not
*/ */
#define gpio_hal_get_io_config(hal, gpio_num, pu, pd, ie, oe, od, drv, fun_sel, sig_out, slp_sel) \ #define gpio_hal_get_io_config(hal, gpio_num, out_io_config) gpio_ll_get_io_config((hal)->dev, gpio_num, out_io_config)
gpio_ll_get_io_config((hal)->dev, gpio_num, pu, pd, ie, oe, od, drv, fun_sel, sig_out, slp_sel)
/** /**
* @brief Enable pull-up on GPIO. * @brief Enable pull-up on GPIO.

19
components/hal/include/hal/gpio_types.h
View File

@@ -1,11 +1,13 @@
/* /*
* SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD * SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */
#pragma once #pragma once
#include <stdbool.h>
#include <stdint.h>
#include "soc/soc_caps.h" #include "soc/soc_caps.h"
#include "soc/gpio_num.h" #include "soc/gpio_num.h"
#include "esp_bit_defs.h" #include "esp_bit_defs.h"
@@ -140,6 +142,21 @@ typedef enum {
} gpio_hys_ctrl_mode_t; } gpio_hys_ctrl_mode_t;
#endif #endif
/**
* @brief Structure that contains the configuration of an IO
*/
typedef struct {
uint32_t fun_sel; /*!< Value of IOMUX function selection */
uint32_t sig_out; /*!< Index of the outputting peripheral signal */
gpio_drive_cap_t drv; /*!< Value of drive strength */
bool pu; /*!< Status of pull-up enabled or not */
bool pd; /*!< Status of pull-down enabled or not */
bool ie; /*!< Status of input enabled or not */
bool oe; /*!< Status of output enabled or not */
bool od; /*!< Status of open-drain enabled or not */
bool slp_sel; /*!< Status of pin sleep mode enabled or not */
} gpio_io_config_t;
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif