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Merge branch 'bugfix/esp_rom_gpio_connect_out_signal_patch_v5.0' into 'release/v5.0'

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fix(gpio): patched esp_rom_gpio_connect_out_signal for esp32 and esp32s2 (v5.0)

See merge request espressif/esp-idf!35943
This commit is contained in:
morris
2025-01-24 11:16:51 +08:00
parent 245fb725f2 d555ea2b00
commit a7b8aed433
5 changed files with 40 additions and 18 deletions
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7
components/driver/uart.c
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@@ -650,21 +650,22 @@ esp_err_t uart_set_pin(uart_port_t uart_num, int tx_io_num, int rx_io_num, int r
/* In the following statements, if the io_num is negative, no need to configure anything. */
if (tx_io_num >= 0 && !uart_try_set_iomux_pin(uart_num, tx_io_num, SOC_UART_TX_PIN_IDX)) {
gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[tx_io_num], PIN_FUNC_GPIO);
gpio_set_level(tx_io_num, 1);
esp_rom_gpio_connect_out_signal(tx_io_num, UART_PERIPH_SIGNAL(uart_num, SOC_UART_TX_PIN_IDX), 0, 0);
// output enable is set inside esp_rom_gpio_connect_out_signal func after the signal is connected
// (output enabled too early may cause unnecessary level change at the pad)
}
if (rx_io_num >= 0 && !uart_try_set_iomux_pin(uart_num, rx_io_num, SOC_UART_RX_PIN_IDX)) {
gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[rx_io_num], PIN_FUNC_GPIO);
gpio_set_pull_mode(rx_io_num, GPIO_PULLUP_ONLY);
gpio_set_pull_mode(rx_io_num, GPIO_PULLUP_ONLY); // This does not consider that RX signal can be read inverted by configuring the hardware (i.e. idle is at low level). However, it is only a weak pullup, the TX at the other end can always drive the line.
gpio_set_direction(rx_io_num, GPIO_MODE_INPUT);
esp_rom_gpio_connect_in_signal(rx_io_num, UART_PERIPH_SIGNAL(uart_num, SOC_UART_RX_PIN_IDX), 0);
}
if (rts_io_num >= 0 && !uart_try_set_iomux_pin(uart_num, rts_io_num, SOC_UART_RTS_PIN_IDX)) {
gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[rts_io_num], PIN_FUNC_GPIO);
gpio_set_direction(rts_io_num, GPIO_MODE_OUTPUT);
esp_rom_gpio_connect_out_signal(rts_io_num, UART_PERIPH_SIGNAL(uart_num, SOC_UART_RTS_PIN_IDX), 0, 0);
// output enable is set inside esp_rom_gpio_connect_out_signal func after the signal is connected
}
if (cts_io_num >= 0 && !uart_try_set_iomux_pin(uart_num, cts_io_num, SOC_UART_CTS_PIN_IDX)) {

3
components/esp_rom/CMakeLists.txt
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@@ -19,7 +19,8 @@ else()
"patches/esp_rom_uart.c"
"patches/esp_rom_spiflash.c"
"patches/esp_rom_regi2c.c"
"patches/esp_rom_efuse.c")
"patches/esp_rom_efuse.c"
"patches/esp_rom_gpio.c")
if(CONFIG_HEAP_TLSF_USE_ROM_IMPL AND (CONFIG_ESP_ROM_TLSF_CHECK_PATCH OR CONFIG_HEAP_TLSF_CHECK_PATCH))
# This file shall be included in the build if TLSF in ROM is activated

19
components/esp_rom/include/esp_rom_gpio.h
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@@ -1,16 +1,8 @@
// Copyright 2010-2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2010-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
@@ -74,6 +66,7 @@ void esp_rom_gpio_connect_in_signal(uint32_t gpio_num, uint32_t signal_idx, bool
* @brief Combine a peripheral signal which tagged as output attribute with a GPIO.
*
* @note There's no limitation on the number of signals that a GPIO can combine with.
* @note Internally, the signal will be connected first, then output will be enabled on the pad.
*
* @param gpio_num GPIO number
* @param signal_idx Peripheral signal index (tagged as output attribute)

28
components/esp_rom/patches/esp_rom_gpio.c Normal file
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@@ -0,0 +1,28 @@
/*
* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "sdkconfig.h"
#include "esp_attr.h"
#include "esp_rom_gpio.h"
#include "soc/gpio_reg.h"
#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2
// On such targets, the ROM code for this function enabled output for the pad first, and then connected the signal
// This could result in an undesired glitch at the pad
IRAM_ATTR void esp_rom_gpio_connect_out_signal(uint32_t gpio_num, uint32_t signal_idx, bool out_inv, bool oen_inv)
{
uint32_t value = signal_idx << GPIO_FUNC0_OUT_SEL_S;
if (out_inv) {
value |= GPIO_FUNC0_OUT_INV_SEL_M;
}
if (oen_inv) {
value |= GPIO_FUNC0_OEN_INV_SEL_M;
}
REG_WRITE(GPIO_FUNC0_OUT_SEL_CFG_REG + (gpio_num * 4), value);
REG_WRITE(GPIO_ENABLE_W1TS_REG, (1 << gpio_num));
}
#endif

1
tools/ci/check_copyright_ignore.txt
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@@ -564,7 +564,6 @@ components/esp_rom/include/esp32s3/rom/sha.h
components/esp_rom/include/esp32s3/rom/tjpgd.h
components/esp_rom/include/esp32s3/rom/uart.h
components/esp_rom/include/esp_rom_crc.h
components/esp_rom/include/esp_rom_gpio.h
components/esp_rom/include/esp_rom_uart.h
components/esp_rom/include/linux/soc/reset_reasons.h
components/esp_rom/linux/esp_rom_crc.c