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feat(ulp): LP Timer interrupt support

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This commit adds support for the LP Timer interrupt to be used by the LP
Core.

Merges https://github.com/espressif/esp-idf/pull/15717
This commit is contained in:
jath03
2025-04-08 19:04:41 -07:00
committed by Sudeep Mohanty
parent 53e84d9729
commit a9eba4058e
7 changed files with 52 additions and 1 deletions
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5
components/hal/esp32c5/include/hal/lp_timer_ll.h
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@ -73,6 +73,11 @@ FORCE_INLINE_ATTR void lp_timer_ll_clear_lp_intsts_mask(lp_timer_dev_t *dev, uin
dev->lp_int_clr.val = mask;
}
FORCE_INLINE_ATTR void lp_timer_ll_lp_alarm_intr_enable(lp_timer_dev_t *dev, bool enable)
{
dev->lp_int_ena.main_timer_lp_int_ena = enable;
}
#ifdef __cplusplus
}
#endif

7
components/hal/esp32c6/include/hal/lp_timer_ll.h
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -73,6 +73,11 @@ FORCE_INLINE_ATTR void lp_timer_ll_clear_lp_intsts_mask(lp_timer_dev_t *dev, uin
dev->lp_int_clr.val = mask;
}
FORCE_INLINE_ATTR void lp_timer_ll_lp_alarm_intr_enable(lp_timer_dev_t *dev, bool enable)
{
dev->lp_int_en.alarm = enable;
}
#ifdef __cplusplus
}
#endif

5
components/hal/esp32c61/include/hal/lp_timer_ll.h
View File

@ -73,6 +73,11 @@ FORCE_INLINE_ATTR void lp_timer_ll_clear_lp_intsts_mask(lp_timer_dev_t *dev, uin
dev->lp_int_clr.val = mask;
}
FORCE_INLINE_ATTR void lp_timer_ll_lp_alarm_intr_enable(lp_timer_dev_t *dev, bool enable)
{
dev->lp_int_ena.main_timer_lp_int_ena = enable;
}
#ifdef __cplusplus
}
#endif

5
components/hal/esp32h2/include/hal/lp_timer_ll.h
View File

@ -57,6 +57,11 @@ FORCE_INLINE_ATTR void lp_timer_ll_clear_overflow_intr_status(lp_timer_dev_t *de
dev->int_clr.overflow = 1;
}
FORCE_INLINE_ATTR void lp_timer_ll_lp_alarm_intr_enable(lp_timer_dev_t *dev, bool enable)
{
dev->lp_int_en.alarm = enable;
}
#ifdef __cplusplus
}
#endif

5
components/hal/esp32p4/include/hal/lp_timer_ll.h
View File

@ -73,6 +73,11 @@ FORCE_INLINE_ATTR void lp_timer_ll_clear_lp_intsts_mask(lp_timer_dev_t *dev, uin
dev->lp_int_clr.val = mask;
}
FORCE_INLINE_ATTR void lp_timer_ll_lp_alarm_intr_enable(lp_timer_dev_t *dev, bool enable)
{
dev->lp_int_ena.main_timer_lp_int_ena = enable;
}
#ifdef __cplusplus
}
#endif

14
components/ulp/lp_core/lp_core/include/ulp_lp_core_utils.h
View File

@ -104,6 +104,20 @@ void ulp_lp_core_sw_intr_enable(bool enable);
*/
void ulp_lp_core_sw_intr_clear(void);
#if SOC_LP_TIMER_SUPPORTED
/**
* @brief Enable the LP Timer interrupt
*
*/
void ulp_lp_core_lp_timer_intr_enable(bool enable);
/**
* @brief Clear the interrupt status for the LP Timer interrupt
*
*/
void ulp_lp_core_lp_timer_intr_clear(void);
#endif
/**
* @brief Puts the CPU into a wait state until an interrupt is triggered
*

12
components/ulp/lp_core/lp_core/lp_core_utils.c
View File

@ -191,6 +191,18 @@ void ulp_lp_core_sw_intr_clear(void)
pmu_ll_lp_clear_sw_intr_status(&PMU);
}
#if SOC_LP_TIMER_SUPPORTED
void ulp_lp_core_lp_timer_intr_enable(bool enable)
{
lp_timer_ll_lp_alarm_intr_enable(&LP_TIMER, enable);
}
void ulp_lp_core_lp_timer_intr_clear(void)
{
lp_timer_ll_clear_lp_alarm_intr_status(&LP_TIMER);
}
#endif
void ulp_lp_core_wait_for_intr(void)
{
asm volatile("wfi");