forked from espressif/esp-idf
feat(cpu): Configure panic exception generation using asm illegal instruction
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@ -461,9 +461,12 @@ void IRAM_ATTR __attribute__((noreturn, no_sanitize_undefined)) panic_abort(cons
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#endif
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#endif
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ESP_COMPILER_DIAGNOSTIC_PUSH_IGNORE("-Wanalyzer-null-dereference")
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*((volatile int *) 0) = 0; // NOLINT(clang-analyzer-core.NullDereference) should be an invalid operation on targets
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ESP_COMPILER_DIAGNOSTIC_POP("-Wanalyzer-null-dereference")
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#ifdef __XTENSA__
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asm("ill"); // should be an invalid operation on xtensa targets
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#elif __riscv
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asm("unimp"); // should be an invalid operation on RISC-V targets
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#endif
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while (1);
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}
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@ -1050,9 +1050,9 @@ def _test_coredump_summary(dut: PanicTestDut, flash_encrypted: bool, coredump_en
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dut.expect_elf_sha256('App ELF file SHA256: ')
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dut.expect_exact('Crashed task: main')
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if dut.is_xtensa:
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dut.expect_exact('Exception cause: 29')
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dut.expect_exact('Exception cause: 0')
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else:
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dut.expect_exact('Exception cause: 7')
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dut.expect_exact('Exception cause: 2')
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dut.expect(PANIC_ABORT_PREFIX + r'assert failed:[\s\w()]*?\s[.\w/]*\.(?:c|cpp|h|hpp):\d.*$')
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