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fix(ci): improve rtc_clk test stability on esp32 32k xtal

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This commit is contained in:
Song Ruo Jing
2025-11-21 20:35:37 +08:00
parent 5ca9827894
commit c10ddb0f52
1 changed files with 2 additions and 0 deletions
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components/esp_hw_support/test_apps/rtc_clk/main/test_rtc_clk.c
+2
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@@ -263,6 +263,7 @@ static void start_freq(soc_rtc_slow_clk_src_t required_src, uint32_t start_delay
printf("PASS");
}
printf(" [calibration val = %"PRIu32"] \n", esp_clk_slowclk_cal_get());
rtc_clk_slow_src_set(SOC_RTC_SLOW_CLK_SRC_DEFAULT);
stop_rtc_external_quartz();
esp_rom_delay_us(500000);
}
@@ -304,6 +305,7 @@ TEST_CASE("Test starting external RTC quartz", "[rtc_clk][test_env=xtal32k]")
} else {
printf("PASS\n");
}
rtc_clk_slow_src_set(SOC_RTC_SLOW_CLK_SRC_DEFAULT);
stop_rtc_external_quartz();
esp_rom_delay_us(100000);
}