forked from espressif/esp-idf
feat(sdspi): support sdspi on c5
This commit is contained in:
@@ -33,6 +33,10 @@ menu "SDMMC Test Board Configuration"
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bool "ESP32-P4 Function EV Board"
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depends on IDF_TARGET_ESP32P4
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config SDMMC_BOARD_ESP32C5_BREAKOUT
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bool "ESP32-C5 breakout board"
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depends on IDF_TARGET_ESP32C5
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config SDMMC_BOARD_CUSTOM_SD
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depends on SOC_SDMMC_HOST_SUPPORTED
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bool "Custom SD (choose pins)"
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@@ -133,6 +137,8 @@ menu "SDMMC Test Board Configuration"
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config SDMMC_BOARD_CUSTOM_UNUSED
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int "GPIO not routed on the board"
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default 34 if IDF_TARGET_ESP32P4
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default 8 if IDF_TARGET_ESP32C5
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default -1
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endmenu
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@@ -346,6 +346,34 @@ static const sdmmc_test_board_info_t s_board_info = {
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},
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};
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#elif CONFIG_SDMMC_BOARD_ESP32C5_BREAKOUT
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static const sdmmc_test_board_info_t s_board_info = {
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.name = "ESP32-C5 breakout board",
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.slot = {
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{
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.slot_exists = false
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},
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{
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.slot_exists = true,
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.bus_width = 1,
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.clk = 5,
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.cmd_mosi = 4,
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.d0_miso = 6,
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.d1 = GPIO_NUM_NC,
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.d2 = GPIO_NUM_NC,
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.d3_cs = 1,
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.d4 = GPIO_NUM_NC,
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.d5 = GPIO_NUM_NC,
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.d6 = GPIO_NUM_NC,
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.d7 = GPIO_NUM_NC,
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.cd = CONFIG_SDMMC_BOARD_CUSTOM_CD,
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.wp = CONFIG_SDMMC_BOARD_CUSTOM_WP,
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.unused_pin = CONFIG_SDMMC_BOARD_CUSTOM_UNUSED,
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}
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},
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};
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#elif CONFIG_SDMMC_BOARD_CUSTOM_SD
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static const sdmmc_test_board_info_t s_board_info = {
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@@ -2,9 +2,8 @@ components/esp_driver_sdspi/test_apps/sdspi:
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disable:
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- if: SOC_GPSPI_SUPPORTED != 1
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disable_test:
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- if: SOC_GPSPI_SUPPORTED == 1
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temporary: true
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reason: will add runners later # TODO: IDF-8747
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- if: IDF_TARGET not in ["esp32", "esp32c3", "esp32c5", "esp32p4"]
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reason: needs special runner, select few typical targets for testing
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depends_components:
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- sdmmc
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- esp_driver_sdspi
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@@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@@ -11,6 +11,8 @@
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#include "sdmmc_test_board.h"
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#include "sdmmc_test_begin_end_spi.h"
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#include "sdmmc_test_cd_wp_common.h"
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#include "sd_pwr_ctrl.h"
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#include "sd_pwr_ctrl_by_on_chip_ldo.h"
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TEST_CASE("CD input works in SPI mode", "[sdspi]")
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{
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@@ -22,6 +24,18 @@ TEST_CASE("CD input works in SPI mode", "[sdspi]")
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sdmmc_test_board_get_config_sdspi(slot, &config, &bus_config, &dev_config);
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const int test_gpio = sdmmc_test_board_get_slot_info(slot)->unused_pin;
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dev_config.gpio_cd = test_gpio;
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#if SOC_SDMMC_IO_POWER_EXTERNAL
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#define SDMMC_PWR_LDO_CHANNEL 4
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sd_pwr_ctrl_ldo_config_t ldo_config = {
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.ldo_chan_id = SDMMC_PWR_LDO_CHANNEL,
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};
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sd_pwr_ctrl_handle_t pwr_ctrl_handle = NULL;
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TEST_ESP_OK(sd_pwr_ctrl_new_on_chip_ldo(&ldo_config, &pwr_ctrl_handle));
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config.pwr_ctrl_handle = pwr_ctrl_handle;
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#endif
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sdmmc_test_board_card_power_set(true);
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TEST_ESP_OK(spi_bus_initialize(dev_config.host_id, &bus_config, SPI_DMA_CH_AUTO));
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TEST_ESP_OK(sdspi_host_init());
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@@ -31,9 +45,11 @@ TEST_CASE("CD input works in SPI mode", "[sdspi]")
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sdmmc_test_cd_input(test_gpio, &config);
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TEST_ESP_OK(sdspi_host_remove_device(handle));
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TEST_ESP_OK(sdspi_host_deinit());
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TEST_ESP_OK(spi_bus_free(SDSPI_DEFAULT_HOST));
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sdmmc_test_board_card_power_set(false);
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TEST_ESP_OK(sd_pwr_ctrl_del_on_chip_ldo(pwr_ctrl_handle));
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}
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TEST_CASE("WP input works in SPI mode", "[sdspi]")
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@@ -48,6 +64,16 @@ TEST_CASE("WP input works in SPI mode", "[sdspi]")
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dev_config.gpio_wp = test_gpio;
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sdmmc_test_board_card_power_set(true);
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TEST_ESP_OK(spi_bus_initialize(dev_config.host_id, &bus_config, SPI_DMA_CH_AUTO));
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#if SOC_SDMMC_IO_POWER_EXTERNAL
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#define SDMMC_PWR_LDO_CHANNEL 4
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sd_pwr_ctrl_ldo_config_t ldo_config = {
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.ldo_chan_id = SDMMC_PWR_LDO_CHANNEL,
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};
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sd_pwr_ctrl_handle_t pwr_ctrl_handle = NULL;
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TEST_ESP_OK(sd_pwr_ctrl_new_on_chip_ldo(&ldo_config, &pwr_ctrl_handle));
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config.pwr_ctrl_handle = pwr_ctrl_handle;
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#endif
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TEST_ESP_OK(sdspi_host_init());
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TEST_ESP_OK(sdspi_host_init_device(&dev_config, &handle));
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@@ -55,7 +81,9 @@ TEST_CASE("WP input works in SPI mode", "[sdspi]")
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sdmmc_test_wp_input(test_gpio, &config);
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TEST_ESP_OK(sdspi_host_remove_device(handle));
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TEST_ESP_OK(sdspi_host_deinit());
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TEST_ESP_OK(spi_bus_free(SDSPI_DEFAULT_HOST));
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sdmmc_test_board_card_power_set(false);
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TEST_ESP_OK(sd_pwr_ctrl_del_on_chip_ldo(pwr_ctrl_handle));
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}
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@@ -1,7 +1,12 @@
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# SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
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# SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
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# SPDX-License-Identifier: CC0-1.0
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import pytest
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from pytest_embedded_idf import IdfDut
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@pytest.mark.esp32
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@pytest.mark.esp32c3
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@pytest.mark.esp32c5
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@pytest.mark.sdcard_spimode
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def test_sdspi(dut: IdfDut) -> None:
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dut.run_all_single_board_cases(reset=True)
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@@ -0,0 +1 @@
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CONFIG_SDMMC_BOARD_ESP32C5_BREAKOUT=y
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@@ -62,9 +62,7 @@ api-reference/storage/mass_mfg.rst
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api-reference/storage/fatfsgen.rst
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api-reference/storage/index.rst
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api-reference/storage/nvs_partition_parse.rst
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api-reference/peripherals/sdspi_share.rst
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api-reference/peripherals/twai.rst
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api-reference/peripherals/sdspi_host.rst
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api-reference/peripherals/gptimer.rst
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api-reference/peripherals/touch_element.rst
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api-reference/peripherals/lcd.rst
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@@ -139,9 +139,8 @@ examples/storage/sd_card/sdspi:
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disable:
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- if: SOC_GPSPI_SUPPORTED != 1
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disable_test:
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- if: IDF_TARGET not in ["esp32", "esp32c3"]
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temporary: true
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reason: lack of runners
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- if: IDF_TARGET not in ["esp32", "esp32c3", "esp32c5", "esp32p4"]
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reason: needs special runner, select few typical targets for testing
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examples/storage/semihost_vfs:
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depends_components:
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@@ -19,7 +19,7 @@ menu "SD SPI Example Configuration"
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default 35 if IDF_TARGET_ESP32S2
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default 35 if IDF_TARGET_ESP32S3
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default 5 if IDF_TARGET_ESP32H2
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default 11 if IDF_TARGET_ESP32P4
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default 48 if IDF_TARGET_ESP32P4
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default 4 # C3 and others
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config EXAMPLE_PIN_MISO
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@@ -28,7 +28,7 @@ menu "SD SPI Example Configuration"
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default 37 if IDF_TARGET_ESP32S2
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default 37 if IDF_TARGET_ESP32S3
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default 0 if IDF_TARGET_ESP32H2
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default 13 if IDF_TARGET_ESP32P4
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default 47 if IDF_TARGET_ESP32P4
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default 6 # C3 and others
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config EXAMPLE_PIN_CLK
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@@ -37,7 +37,7 @@ menu "SD SPI Example Configuration"
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default 36 if IDF_TARGET_ESP32S2
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default 36 if IDF_TARGET_ESP32S3
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default 4 if IDF_TARGET_ESP32H2
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default 12 if IDF_TARGET_ESP32P4
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default 53 if IDF_TARGET_ESP32P4
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default 5 # C3 and others
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config EXAMPLE_PIN_CS
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@@ -45,7 +45,7 @@ menu "SD SPI Example Configuration"
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default 13 if IDF_TARGET_ESP32
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default 34 if IDF_TARGET_ESP32S2
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default 34 if IDF_TARGET_ESP32S3
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default 10 if IDF_TARGET_ESP32P4
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default 33 if IDF_TARGET_ESP32P4
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default 1 # C3 and others
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config EXAMPLE_DEBUG_PIN_CONNECTIONS
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@@ -8,7 +8,8 @@ from pytest_embedded import Dut
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@pytest.mark.esp32
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@pytest.mark.esp32c3 # no runner available at the moment
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@pytest.mark.esp32c3
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@pytest.mark.esp32c5
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@pytest.mark.sdcard_spimode
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def test_examples_sd_card_sdspi(dut: Dut) -> None:
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dut.expect('example: Initializing SD card', timeout=20)
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