feat(sdspi): support sdspi on c5

This commit is contained in:
Armando
2024-08-08 16:23:30 +08:00
parent d215fa6cdb
commit c13f35a7cf
10 changed files with 80 additions and 15 deletions

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@@ -33,6 +33,10 @@ menu "SDMMC Test Board Configuration"
bool "ESP32-P4 Function EV Board"
depends on IDF_TARGET_ESP32P4
config SDMMC_BOARD_ESP32C5_BREAKOUT
bool "ESP32-C5 breakout board"
depends on IDF_TARGET_ESP32C5
config SDMMC_BOARD_CUSTOM_SD
depends on SOC_SDMMC_HOST_SUPPORTED
bool "Custom SD (choose pins)"
@@ -133,6 +137,8 @@ menu "SDMMC Test Board Configuration"
config SDMMC_BOARD_CUSTOM_UNUSED
int "GPIO not routed on the board"
default 34 if IDF_TARGET_ESP32P4
default 8 if IDF_TARGET_ESP32C5
default -1
endmenu

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@@ -346,6 +346,34 @@ static const sdmmc_test_board_info_t s_board_info = {
},
};
#elif CONFIG_SDMMC_BOARD_ESP32C5_BREAKOUT
static const sdmmc_test_board_info_t s_board_info = {
.name = "ESP32-C5 breakout board",
.slot = {
{
.slot_exists = false
},
{
.slot_exists = true,
.bus_width = 1,
.clk = 5,
.cmd_mosi = 4,
.d0_miso = 6,
.d1 = GPIO_NUM_NC,
.d2 = GPIO_NUM_NC,
.d3_cs = 1,
.d4 = GPIO_NUM_NC,
.d5 = GPIO_NUM_NC,
.d6 = GPIO_NUM_NC,
.d7 = GPIO_NUM_NC,
.cd = CONFIG_SDMMC_BOARD_CUSTOM_CD,
.wp = CONFIG_SDMMC_BOARD_CUSTOM_WP,
.unused_pin = CONFIG_SDMMC_BOARD_CUSTOM_UNUSED,
}
},
};
#elif CONFIG_SDMMC_BOARD_CUSTOM_SD
static const sdmmc_test_board_info_t s_board_info = {

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@@ -2,9 +2,8 @@ components/esp_driver_sdspi/test_apps/sdspi:
disable:
- if: SOC_GPSPI_SUPPORTED != 1
disable_test:
- if: SOC_GPSPI_SUPPORTED == 1
temporary: true
reason: will add runners later # TODO: IDF-8747
- if: IDF_TARGET not in ["esp32", "esp32c3", "esp32c5", "esp32p4"]
reason: needs special runner, select few typical targets for testing
depends_components:
- sdmmc
- esp_driver_sdspi

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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -11,6 +11,8 @@
#include "sdmmc_test_board.h"
#include "sdmmc_test_begin_end_spi.h"
#include "sdmmc_test_cd_wp_common.h"
#include "sd_pwr_ctrl.h"
#include "sd_pwr_ctrl_by_on_chip_ldo.h"
TEST_CASE("CD input works in SPI mode", "[sdspi]")
{
@@ -22,6 +24,18 @@ TEST_CASE("CD input works in SPI mode", "[sdspi]")
sdmmc_test_board_get_config_sdspi(slot, &config, &bus_config, &dev_config);
const int test_gpio = sdmmc_test_board_get_slot_info(slot)->unused_pin;
dev_config.gpio_cd = test_gpio;
#if SOC_SDMMC_IO_POWER_EXTERNAL
#define SDMMC_PWR_LDO_CHANNEL 4
sd_pwr_ctrl_ldo_config_t ldo_config = {
.ldo_chan_id = SDMMC_PWR_LDO_CHANNEL,
};
sd_pwr_ctrl_handle_t pwr_ctrl_handle = NULL;
TEST_ESP_OK(sd_pwr_ctrl_new_on_chip_ldo(&ldo_config, &pwr_ctrl_handle));
config.pwr_ctrl_handle = pwr_ctrl_handle;
#endif
sdmmc_test_board_card_power_set(true);
TEST_ESP_OK(spi_bus_initialize(dev_config.host_id, &bus_config, SPI_DMA_CH_AUTO));
TEST_ESP_OK(sdspi_host_init());
@@ -31,9 +45,11 @@ TEST_CASE("CD input works in SPI mode", "[sdspi]")
sdmmc_test_cd_input(test_gpio, &config);
TEST_ESP_OK(sdspi_host_remove_device(handle));
TEST_ESP_OK(sdspi_host_deinit());
TEST_ESP_OK(spi_bus_free(SDSPI_DEFAULT_HOST));
sdmmc_test_board_card_power_set(false);
TEST_ESP_OK(sd_pwr_ctrl_del_on_chip_ldo(pwr_ctrl_handle));
}
TEST_CASE("WP input works in SPI mode", "[sdspi]")
@@ -48,6 +64,16 @@ TEST_CASE("WP input works in SPI mode", "[sdspi]")
dev_config.gpio_wp = test_gpio;
sdmmc_test_board_card_power_set(true);
TEST_ESP_OK(spi_bus_initialize(dev_config.host_id, &bus_config, SPI_DMA_CH_AUTO));
#if SOC_SDMMC_IO_POWER_EXTERNAL
#define SDMMC_PWR_LDO_CHANNEL 4
sd_pwr_ctrl_ldo_config_t ldo_config = {
.ldo_chan_id = SDMMC_PWR_LDO_CHANNEL,
};
sd_pwr_ctrl_handle_t pwr_ctrl_handle = NULL;
TEST_ESP_OK(sd_pwr_ctrl_new_on_chip_ldo(&ldo_config, &pwr_ctrl_handle));
config.pwr_ctrl_handle = pwr_ctrl_handle;
#endif
TEST_ESP_OK(sdspi_host_init());
TEST_ESP_OK(sdspi_host_init_device(&dev_config, &handle));
@@ -55,7 +81,9 @@ TEST_CASE("WP input works in SPI mode", "[sdspi]")
sdmmc_test_wp_input(test_gpio, &config);
TEST_ESP_OK(sdspi_host_remove_device(handle));
TEST_ESP_OK(sdspi_host_deinit());
TEST_ESP_OK(spi_bus_free(SDSPI_DEFAULT_HOST));
sdmmc_test_board_card_power_set(false);
TEST_ESP_OK(sd_pwr_ctrl_del_on_chip_ldo(pwr_ctrl_handle));
}

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@@ -1,7 +1,12 @@
# SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
# SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
# SPDX-License-Identifier: CC0-1.0
import pytest
from pytest_embedded_idf import IdfDut
@pytest.mark.esp32
@pytest.mark.esp32c3
@pytest.mark.esp32c5
@pytest.mark.sdcard_spimode
def test_sdspi(dut: IdfDut) -> None:
dut.run_all_single_board_cases(reset=True)

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@@ -0,0 +1 @@
CONFIG_SDMMC_BOARD_ESP32C5_BREAKOUT=y

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@@ -62,9 +62,7 @@ api-reference/storage/mass_mfg.rst
api-reference/storage/fatfsgen.rst
api-reference/storage/index.rst
api-reference/storage/nvs_partition_parse.rst
api-reference/peripherals/sdspi_share.rst
api-reference/peripherals/twai.rst
api-reference/peripherals/sdspi_host.rst
api-reference/peripherals/gptimer.rst
api-reference/peripherals/touch_element.rst
api-reference/peripherals/lcd.rst

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@@ -139,9 +139,8 @@ examples/storage/sd_card/sdspi:
disable:
- if: SOC_GPSPI_SUPPORTED != 1
disable_test:
- if: IDF_TARGET not in ["esp32", "esp32c3"]
temporary: true
reason: lack of runners
- if: IDF_TARGET not in ["esp32", "esp32c3", "esp32c5", "esp32p4"]
reason: needs special runner, select few typical targets for testing
examples/storage/semihost_vfs:
depends_components:

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@@ -19,7 +19,7 @@ menu "SD SPI Example Configuration"
default 35 if IDF_TARGET_ESP32S2
default 35 if IDF_TARGET_ESP32S3
default 5 if IDF_TARGET_ESP32H2
default 11 if IDF_TARGET_ESP32P4
default 48 if IDF_TARGET_ESP32P4
default 4 # C3 and others
config EXAMPLE_PIN_MISO
@@ -28,7 +28,7 @@ menu "SD SPI Example Configuration"
default 37 if IDF_TARGET_ESP32S2
default 37 if IDF_TARGET_ESP32S3
default 0 if IDF_TARGET_ESP32H2
default 13 if IDF_TARGET_ESP32P4
default 47 if IDF_TARGET_ESP32P4
default 6 # C3 and others
config EXAMPLE_PIN_CLK
@@ -37,7 +37,7 @@ menu "SD SPI Example Configuration"
default 36 if IDF_TARGET_ESP32S2
default 36 if IDF_TARGET_ESP32S3
default 4 if IDF_TARGET_ESP32H2
default 12 if IDF_TARGET_ESP32P4
default 53 if IDF_TARGET_ESP32P4
default 5 # C3 and others
config EXAMPLE_PIN_CS
@@ -45,7 +45,7 @@ menu "SD SPI Example Configuration"
default 13 if IDF_TARGET_ESP32
default 34 if IDF_TARGET_ESP32S2
default 34 if IDF_TARGET_ESP32S3
default 10 if IDF_TARGET_ESP32P4
default 33 if IDF_TARGET_ESP32P4
default 1 # C3 and others
config EXAMPLE_DEBUG_PIN_CONNECTIONS

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@@ -8,7 +8,8 @@ from pytest_embedded import Dut
@pytest.mark.esp32
@pytest.mark.esp32c3 # no runner available at the moment
@pytest.mark.esp32c3
@pytest.mark.esp32c5
@pytest.mark.sdcard_spimode
def test_examples_sd_card_sdspi(dut: Dut) -> None:
dut.expect('example: Initializing SD card', timeout=20)