forked from espressif/esp-idf
rtcio: Add a test case to test RTCIO's hold ability after deep sleep wakeup
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@@ -271,4 +271,52 @@ TEST_CASE("RTCIO output hold test", "[rtcio]")
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ESP_LOGI(TAG, "RTCIO hold test over");
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}
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#endif
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// It is not necessary to test every rtcio pin, it will take too much ci testing time for deep sleep
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// Only tests on s_test_map[TEST_RTCIO_DEEP_SLEEP_PIN_INDEX] pin
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// (ESP32: IO25, ESP32S2: IO6) these pads' default configuration is low level
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#define TEST_RTCIO_DEEP_SLEEP_PIN_INDEX 5
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static void rtcio_deep_sleep_hold_test_first_stage(void)
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{
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printf("configure rtcio pin to hold during deep sleep");
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int io_num = s_test_map[TEST_RTCIO_DEEP_SLEEP_PIN_INDEX];
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TEST_ESP_OK(esp_sleep_enable_timer_wakeup(2000000));
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gpio_config_t io_conf = {
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.intr_type = GPIO_INTR_DISABLE,
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.mode = GPIO_MODE_INPUT_OUTPUT,
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.pin_bit_mask = (1ULL << io_num),
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.pull_down_en = 0,
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.pull_up_en = 0,
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};
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gpio_config(&io_conf);
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gpio_set_level(io_num, 1);
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// Enable global persistence
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TEST_ESP_OK(gpio_hold_en(io_num));
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esp_deep_sleep_start();
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}
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static void rtcio_deep_sleep_hold_test_second_stage(void)
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{
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int io_num = s_test_map[TEST_RTCIO_DEEP_SLEEP_PIN_INDEX];
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// Check reset reason is waking up from deepsleep
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TEST_ASSERT_EQUAL(ESP_RST_DEEPSLEEP, esp_reset_reason());
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// Pin should stay at high level after the deep sleep
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TEST_ASSERT_EQUAL_INT(1, gpio_get_level(io_num));
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gpio_hold_dis(io_num);
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}
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/*
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* Test rtcio hold function during deep sleep.
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* This test case can only check the hold state after waking up from deep sleep
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* If you want to check that the rtcio hold function works properly during deep sleep,
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* please use logic analyzer or oscillscope
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*/
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TEST_CASE_MULTIPLE_STAGES("RTCIO_deep_sleep_output_hold_test", "[rtcio]",
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rtcio_deep_sleep_hold_test_first_stage,
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rtcio_deep_sleep_hold_test_second_stage)
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#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3, ESP32C3)
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