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ci(adc): enable P4 ADC test and correct ADC performance thresh

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This commit is contained in:
gaoxu
2024-10-28 09:46:51 +08:00
parent 0c82649db0
commit cfa487b4e0
9 changed files with 21 additions and 19 deletions
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5
components/driver/test_apps/legacy_adc_driver/main/test_legacy_adc.c
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@@ -11,6 +11,7 @@
#include "driver/gpio.h" #include "driver/gpio.h"
#include "driver/rtc_io.h" #include "driver/rtc_io.h"
#include "soc/adc_periph.h" #include "soc/adc_periph.h"
#include "hal/adc_ll.h"
#define ADC_GET_IO_NUM(unit, channel) (adc_channel_io_map[unit][channel]) #define ADC_GET_IO_NUM(unit, channel) (adc_channel_io_map[unit][channel])
@@ -68,7 +69,7 @@
#define ADC_TEST_HIGH_THRESH 200 #define ADC_TEST_HIGH_THRESH 200
#elif CONFIG_IDF_TARGET_ESP32P4 #elif CONFIG_IDF_TARGET_ESP32P4
#define ADC_TEST_LOW_VAL 3100 #define ADC_TEST_LOW_VAL 2152
#define ADC_TEST_LOW_THRESH 200 #define ADC_TEST_LOW_THRESH 200
#define ADC_TEST_HIGH_VAL 4095 #define ADC_TEST_HIGH_VAL 4095
@@ -110,7 +111,7 @@ void test_adc_set_io_level(adc_unit_t unit, adc_channel_t channel, bool level)
{ {
TEST_ASSERT(channel < SOC_ADC_CHANNEL_NUM(unit) && "invalid channel"); TEST_ASSERT(channel < SOC_ADC_CHANNEL_NUM(unit) && "invalid channel");
#if SOC_ADC_DIG_CTRL_SUPPORTED && !SOC_ADC_RTC_CTRL_SUPPORTED #if !ADC_LL_RTC_GPIO_SUPPORTED
uint32_t io_num = ADC_GET_IO_NUM(unit, channel); uint32_t io_num = ADC_GET_IO_NUM(unit, channel);
TEST_ESP_OK(gpio_set_pull_mode(io_num, (level ? GPIO_PULLUP_ONLY : GPIO_PULLDOWN_ONLY))); TEST_ESP_OK(gpio_set_pull_mode(io_num, (level ? GPIO_PULLUP_ONLY : GPIO_PULLDOWN_ONLY)));
#else #else

3
components/esp_adc/test_apps/.build-test-rules.yml
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@@ -5,9 +5,6 @@ components/esp_adc/test_apps/adc:
- if: SOC_ADC_SUPPORTED != 1 - if: SOC_ADC_SUPPORTED != 1
- if: CONFIG_NAME == "gdma_iram_safe" and IDF_TARGET in ["esp32", "esp32s2", "esp32c2"] - if: CONFIG_NAME == "gdma_iram_safe" and IDF_TARGET in ["esp32", "esp32s2", "esp32c2"]
disable_test: disable_test:
- if: IDF_TARGET == "esp32p4"
temporary: true
reason: not runners for ESP32P4 ADC # TODO: IDF-9573
- if: IDF_TARGET == "esp32c61" - if: IDF_TARGET == "esp32c61"
temporary: true temporary: true
reason: not runners for ESP32C61 ADC reason: not runners for ESP32C61 ADC

20
components/esp_adc/test_apps/adc/main/test_adc.c
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@@ -80,35 +80,35 @@ TEST_CASE("ADC oneshot high/low test", "[adc_oneshot]")
test_adc_set_io_level(ADC_UNIT_1, ADC1_TEST_CHAN0, 0); test_adc_set_io_level(ADC_UNIT_1, ADC1_TEST_CHAN0, 0);
TEST_ESP_OK(adc_oneshot_read(adc1_handle, ADC1_TEST_CHAN0, &adc_raw[0][0])); TEST_ESP_OK(adc_oneshot_read(adc1_handle, ADC1_TEST_CHAN0, &adc_raw[0][0]));
ESP_LOGI(TAG_CH[0][0], "raw data: %d", adc_raw[0][0]); ESP_LOGI(TAG_CH[0][0], "low raw data: %d", adc_raw[0][0]);
TEST_ASSERT_INT_WITHIN(ADC_TEST_LOW_THRESH, ADC_TEST_LOW_VAL, adc_raw[0][0]); TEST_ASSERT_INT_WITHIN(ADC_TEST_LOW_THRESH, ADC_TEST_LOW_VAL, adc_raw[0][0]);
test_adc_set_io_level(ADC_UNIT_1, ADC1_TEST_CHAN1, 1); test_adc_set_io_level(ADC_UNIT_1, ADC1_TEST_CHAN1, 0);
TEST_ESP_OK(adc_oneshot_read(adc1_handle, ADC1_TEST_CHAN1, &adc_raw[0][1])); TEST_ESP_OK(adc_oneshot_read(adc1_handle, ADC1_TEST_CHAN1, &adc_raw[0][1]));
ESP_LOGI(TAG_CH[0][1], "raw data: %d", adc_raw[0][1]); ESP_LOGI(TAG_CH[0][1], "low raw data: %d", adc_raw[0][1]);
TEST_ASSERT_INT_WITHIN(ADC_TEST_HIGH_THRESH, ADC_TEST_HIGH_VAL, adc_raw[0][1]); TEST_ASSERT_INT_WITHIN(ADC_TEST_LOW_THRESH, ADC_TEST_LOW_VAL, adc_raw[0][1]);
#if ADC_TEST_ONESHOT_HIGH_LOW_TEST_ADC2 #if ADC_TEST_ONESHOT_HIGH_LOW_TEST_ADC2
test_adc_set_io_level(ADC_UNIT_2, ADC2_TEST_CHAN0, 0); test_adc_set_io_level(ADC_UNIT_2, ADC2_TEST_CHAN0, 0);
TEST_ESP_OK(adc_oneshot_read(adc2_handle, ADC2_TEST_CHAN0, &adc_raw[1][0])); TEST_ESP_OK(adc_oneshot_read(adc2_handle, ADC2_TEST_CHAN0, &adc_raw[1][0]));
ESP_LOGI(TAG_CH[1][0], "raw data: %d", adc_raw[1][0]); ESP_LOGI(TAG_CH[1][0], "low raw data: %d", adc_raw[1][0]);
TEST_ASSERT_INT_WITHIN(ADC_TEST_LOW_THRESH, ADC_TEST_LOW_VAL, adc_raw[1][0]); TEST_ASSERT_INT_WITHIN(ADC_TEST_LOW_THRESH, ADC_TEST_LOW_VAL, adc_raw[1][0]);
#endif //#if ADC_TEST_ONESHOT_HIGH_LOW_TEST_ADC2 #endif //#if ADC_TEST_ONESHOT_HIGH_LOW_TEST_ADC2
test_adc_set_io_level(ADC_UNIT_1, ADC1_TEST_CHAN0, 1); test_adc_set_io_level(ADC_UNIT_1, ADC1_TEST_CHAN0, 1);
TEST_ESP_OK(adc_oneshot_read(adc1_handle, ADC1_TEST_CHAN0, &adc_raw[0][0])); TEST_ESP_OK(adc_oneshot_read(adc1_handle, ADC1_TEST_CHAN0, &adc_raw[0][0]));
ESP_LOGI(TAG_CH[0][0], "raw data: %d", adc_raw[0][0]); ESP_LOGI(TAG_CH[0][0], "high raw data: %d", adc_raw[0][0]);
TEST_ASSERT_INT_WITHIN(ADC_TEST_HIGH_THRESH, ADC_TEST_HIGH_VAL, adc_raw[0][0]); TEST_ASSERT_INT_WITHIN(ADC_TEST_HIGH_THRESH, ADC_TEST_HIGH_VAL, adc_raw[0][0]);
test_adc_set_io_level(ADC_UNIT_1, ADC1_TEST_CHAN1, 0); test_adc_set_io_level(ADC_UNIT_1, ADC1_TEST_CHAN1, 1);
TEST_ESP_OK(adc_oneshot_read(adc1_handle, ADC1_TEST_CHAN1, &adc_raw[0][1])); TEST_ESP_OK(adc_oneshot_read(adc1_handle, ADC1_TEST_CHAN1, &adc_raw[0][1]));
ESP_LOGI(TAG_CH[0][1], "raw data: %d", adc_raw[0][1]); ESP_LOGI(TAG_CH[0][1], "high raw data: %d", adc_raw[0][1]);
TEST_ASSERT_INT_WITHIN(ADC_TEST_LOW_THRESH, ADC_TEST_LOW_VAL, adc_raw[0][1]); TEST_ASSERT_INT_WITHIN(ADC_TEST_HIGH_THRESH, ADC_TEST_HIGH_VAL, adc_raw[0][1]);
#if ADC_TEST_ONESHOT_HIGH_LOW_TEST_ADC2 #if ADC_TEST_ONESHOT_HIGH_LOW_TEST_ADC2
test_adc_set_io_level(ADC_UNIT_2, ADC2_TEST_CHAN0, 1); test_adc_set_io_level(ADC_UNIT_2, ADC2_TEST_CHAN0, 1);
TEST_ESP_OK(adc_oneshot_read(adc2_handle, ADC2_TEST_CHAN0, &adc_raw[1][0])); TEST_ESP_OK(adc_oneshot_read(adc2_handle, ADC2_TEST_CHAN0, &adc_raw[1][0]));
ESP_LOGI(TAG_CH[1][0], "raw data: %d", adc_raw[1][0]); ESP_LOGI(TAG_CH[1][0], "high raw data: %d", adc_raw[1][0]);
TEST_ASSERT_INT_WITHIN(ADC_TEST_HIGH_THRESH, ADC_TEST_HIGH_VAL, adc_raw[1][0]); TEST_ASSERT_INT_WITHIN(ADC_TEST_HIGH_THRESH, ADC_TEST_HIGH_VAL, adc_raw[1][0]);
#endif //#if ADC_TEST_ONESHOT_HIGH_LOW_TEST_ADC2 #endif //#if ADC_TEST_ONESHOT_HIGH_LOW_TEST_ADC2

1
components/esp_adc/test_apps/adc/main/test_adc_performance.c
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@@ -219,6 +219,7 @@ static float test_adc_continuous_std(adc_atten_t atten, bool filter_en, int filt
s_reset_array((1 << SOC_ADC_DIGI_MAX_BITWIDTH)); s_reset_array((1 << SOC_ADC_DIGI_MAX_BITWIDTH));
TEST_ESP_OK(adc_continuous_start(handle)); TEST_ESP_OK(adc_continuous_start(handle));
ulTaskNotifyTake(pdTRUE, portMAX_DELAY);
int remain_count = ADC_TEST_CNT; int remain_count = ADC_TEST_CNT;
while (remain_count) { while (remain_count) {
ulTaskNotifyTake(pdTRUE, portMAX_DELAY); ulTaskNotifyTake(pdTRUE, portMAX_DELAY);

2
components/esp_adc/test_apps/adc/main/test_common_adc.c
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@@ -121,7 +121,7 @@ void test_adc_set_io_middle(adc_unit_t unit, adc_channel_t channel)
uint32_t io_num = ADC_GET_IO_NUM(unit, channel); uint32_t io_num = ADC_GET_IO_NUM(unit, channel);
#if SOC_ADC_DIG_CTRL_SUPPORTED && !SOC_ADC_RTC_CTRL_SUPPORTED #if !ADC_LL_RTC_GPIO_SUPPORTED
TEST_ESP_OK(gpio_set_pull_mode(io_num, GPIO_PULLUP_PULLDOWN)); TEST_ESP_OK(gpio_set_pull_mode(io_num, GPIO_PULLUP_PULLDOWN));
#else #else
TEST_ESP_OK(rtc_gpio_init(io_num)); TEST_ESP_OK(rtc_gpio_init(io_num));

2
components/esp_adc/test_apps/adc/main/test_common_adc.h
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@@ -88,7 +88,7 @@ extern "C" {
#define ADC_TEST_HIGH_THRESH 200 #define ADC_TEST_HIGH_THRESH 200
#elif CONFIG_IDF_TARGET_ESP32P4 #elif CONFIG_IDF_TARGET_ESP32P4
#define ADC_TEST_LOW_VAL 3100 #define ADC_TEST_LOW_VAL 2152
#define ADC_TEST_LOW_THRESH 200 #define ADC_TEST_LOW_THRESH 200
#define ADC_TEST_HIGH_VAL 4095 #define ADC_TEST_HIGH_VAL 4095

2
components/esp_adc/test_apps/adc/pytest_adc.py
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@@ -11,6 +11,7 @@ from pytest_embedded import Dut
@pytest.mark.esp32c6 @pytest.mark.esp32c6
@pytest.mark.esp32h2 @pytest.mark.esp32h2
@pytest.mark.esp32c5 @pytest.mark.esp32c5
@pytest.mark.esp32p4
@pytest.mark.adc @pytest.mark.adc
@pytest.mark.parametrize('config', [ @pytest.mark.parametrize('config', [
'iram_safe', 'iram_safe',
@@ -42,6 +43,7 @@ def test_adc_esp32c2_xtal_26mhz(dut: Dut) -> None:
@pytest.mark.esp32c6 @pytest.mark.esp32c6
@pytest.mark.esp32h2 @pytest.mark.esp32h2
@pytest.mark.esp32c5 @pytest.mark.esp32c5
@pytest.mark.esp32p4
@pytest.mark.adc @pytest.mark.adc
@pytest.mark.parametrize('config', [ @pytest.mark.parametrize('config', [
'gdma_iram_safe', 'gdma_iram_safe',

1
components/hal/include/hal/adc_types.h
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@@ -124,6 +124,7 @@ typedef enum {
ADC_DIGI_IIR_FILTER_COEFF_4, ///< The filter coefficient is 4 ADC_DIGI_IIR_FILTER_COEFF_4, ///< The filter coefficient is 4
ADC_DIGI_IIR_FILTER_COEFF_8, ///< The filter coefficient is 8 ADC_DIGI_IIR_FILTER_COEFF_8, ///< The filter coefficient is 8
ADC_DIGI_IIR_FILTER_COEFF_16, ///< The filter coefficient is 16 ADC_DIGI_IIR_FILTER_COEFF_16, ///< The filter coefficient is 16
ADC_DIGI_IIR_FILTER_COEFF_32, ///< The filter coefficient is 32
ADC_DIGI_IIR_FILTER_COEFF_64, ///< The filter coefficient is 64 ADC_DIGI_IIR_FILTER_COEFF_64, ///< The filter coefficient is 64
} adc_digi_iir_filter_coeff_t; } adc_digi_iir_filter_coeff_t;

4
components/ulp/test_apps/lp_core/lp_core_basic_tests/main/test_lp_core_adc.c
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@@ -21,8 +21,8 @@ extern const uint8_t lp_core_main_adc_bin_end[] asm("_binary_lp_core_test_app_
#if CONFIG_IDF_TARGET_ESP32P4 #if CONFIG_IDF_TARGET_ESP32P4
// Threshold values picked up empirically after manual testing // Threshold values picked up empirically after manual testing
#define ADC_TEST_LOW_VAL 1500 #define ADC_TEST_LOW_VAL 2160
#define ADC_TEST_HIGH_VAL 2000 #define ADC_TEST_HIGH_VAL 4090
#else #else
#error "ADC threshold values not defined" #error "ADC threshold values not defined"
#endif #endif