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Merge branch 'bugfix/fix_disassembler_interpreting_padding_v4.1' into 'release/v4.1'

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(Xtensa) Build: add .xt.prop and .xt.lit to the compiled ELF file (backport v4.1)

See merge request espressif/esp-idf!19614
This commit is contained in:
Jiang Jiang Jian
2022-11-09 18:57:05 +08:00
parent 6f45916ffe ffd60dd1ef
commit d1b3b6a577
4 changed files with 76 additions and 0 deletions
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19
components/bootloader/subproject/main/ld/esp32/bootloader.ld
View File

@@ -177,4 +177,23 @@ SECTIONS
_etext = .;
} > iram_seg
/** This section will be used by the debugger and disassembler to get more information
* about raw data present in the code.
* Indeed, it may be required to add some padding at some points in the code
* in order to align a branch/jump destination on a particular bound.
* Padding these instructions will generate null bytes that shall be
* interpreted as data, and not code by the debugger or disassembler.
* This section will only be present in the ELF file, not in the final binary
* For more details, check GCC-212
*/
.xt.prop 0 :
{
KEEP (*(.xt.prop .gnu.linkonce.prop.*))
}
.xt.lit 0 :
{
KEEP (*(.xt.lit .gnu.linkonce.p.*))
}
}

19
components/bootloader/subproject/main/ld/esp32s2beta/bootloader.ld
View File

@@ -169,4 +169,23 @@ SECTIONS
_etext = .;
} > iram_seg
/** This section will be used by the debugger and disassembler to get more information
* about raw data present in the code.
* Indeed, it may be required to add some padding at some points in the code
* in order to align a branch/jump destination on a particular bound.
* Padding these instructions will generate null bytes that shall be
* interpreted as data, and not code by the debugger or disassembler.
* This section will only be present in the ELF file, not in the final binary
* For more details, check GCC-212
*/
.xt.prop 0 :
{
KEEP (*(.xt.prop .gnu.linkonce.prop.*))
}
.xt.lit 0 :
{
KEEP (*(.xt.lit .gnu.linkonce.p.*))
}
}

19
components/esp32/ld/esp32.project.ld.in
View File

@@ -355,6 +355,25 @@ SECTIONS
. = ALIGN (8);
_heap_start = ABSOLUTE(.);
} > dram0_0_seg
/** This section will be used by the debugger and disassembler to get more information
* about raw data present in the code.
* Indeed, it may be required to add some padding at some points in the code
* in order to align a branch/jump destination on a particular bound.
* Padding these instructions will generate null bytes that shall be
* interpreted as data, and not code by the debugger or disassembler.
* This section will only be present in the ELF file, not in the final binary
* For more details, check GCC-212
*/
.xt.prop 0 :
{
KEEP (*(.xt.prop .gnu.linkonce.prop.*))
}
.xt.lit 0 :
{
KEEP (*(.xt.lit .gnu.linkonce.p.*))
}
}
ASSERT(((_iram_text_end - ORIGIN(iram0_0_seg)) <= LENGTH(iram0_0_seg)),

19
components/esp32s2beta/ld/esp32s2beta.project.ld.in
View File

@@ -338,4 +338,23 @@ SECTIONS
*/
_flash_cache_start = ABSOLUTE(0);
} >iram0_2_seg
/** This section will be used by the debugger and disassembler to get more information
* about raw data present in the code.
* Indeed, it may be required to add some padding at some points in the code
* in order to align a branch/jump destination on a particular bound.
* Padding these instructions will generate null bytes that shall be
* interpreted as data, and not code by the debugger or disassembler.
* This section will only be present in the ELF file, not in the final binary
* For more details, check GCC-212
*/
.xt.prop 0 :
{
KEEP (*(.xt.prop .gnu.linkonce.prop.*))
}
.xt.lit 0 :
{
KEEP (*(.xt.lit .gnu.linkonce.p.*))
}
}