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feat(hal):graudate the LCD hal driver into a new component

Browse Source 
- Introduced new HAL components for LCD and MIPI DSI, including:
  - `lcd_hal.c` and `lcd_hal.h` for LCD hardware abstraction layer.
  - `mipi_dsi_hal.c` and `mipi_dsi_hal.h` for MIPI DSI hardware
abstraction layer.
  - Peripheral connection definitions in `lcd_periph.c` and
`lcd_periph.h`.
  - Added necessary types and utility functions in `lcd_types.h` and
`mipi_dsi_types.h`.

- Updated CMakeLists to include the new HAL components in the build
system.
- Removed legacy references to LCD and MIPI DSI in the HAL and SOC
CMakeLists.
This commit is contained in:
morris
2025-10-20 11:17:43 +08:00
parent 8e1ebcad18
commit d4d8b09ced
78 changed files with 558 additions and 648 deletions
Download Patch File Download Diff File Expand all files Collapse all files
components/esp_driver_i2s/i2s_common.c
+2 -2
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@@ -32,7 +32,7 @@
#include "hal/cache_ll.h"
#endif
#if SOC_MODULE_SUPPORT(I2S, ADC_DAC)
#if I2S_LL_GET(ADC_DAC_CAPABLE)
#include "hal/adc_ll.h"
#endif
#if SOC_I2S_SUPPORTS_APLL
@@ -255,7 +255,7 @@ static i2s_controller_t *i2s_acquire_controller_obj(int id)
i2s_obj = pre_alloc;
g_i2s.controller[id] = i2s_obj;
portEXIT_CRITICAL(&g_i2s.spinlock);
#if SOC_MODULE_SUPPORT(I2S, ADC_DAC)
#if I2S_LL_GET(ADC_DAC_CAPABLE)
if (id == I2S_NUM_0) {
adc_ll_digi_set_data_source(0);
}
components/esp_hal_lcd/CMakeLists.txt
+31
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@@ -0,0 +1,31 @@
idf_build_get_property(target IDF_TARGET)
if(${target} STREQUAL "linux")
return() # This component is not supported by the POSIX/Linux simulator
endif()
set(srcs)
set(public_include "include")
if(EXISTS "${CMAKE_CURRENT_LIST_DIR}/${target}/include")
list(APPEND public_include "${target}/include")
endif()
if(CONFIG_SOC_LCDCAM_I80_LCD_SUPPORTED OR CONFIG_SOC_LCDCAM_RGB_LCD_SUPPORTED)
list(APPEND srcs "lcd_hal.c")
endif()
if(CONFIG_SOC_MIPI_DSI_SUPPORTED)
list(APPEND srcs "mipi_dsi_hal.c")
endif()
if(CONFIG_SOC_I2S_I80_LCD_SUPPORTED OR CONFIG_SOC_LCDCAM_I80_LCD_SUPPORTED OR CONFIG_SOC_LCDCAM_RGB_LCD_SUPPORTED)
list(APPEND srcs "${target}/lcd_periph.c")
endif()
if(CONFIG_SOC_MIPI_DSI_SUPPORTED)
list(APPEND srcs "${target}/mipi_dsi_periph.c")
endif()
idf_component_register(SRCS ${srcs}
INCLUDE_DIRS ${public_include}
REQUIRES soc hal)
components/esp_hal_lcd/esp32/lcd_periph.c
+71
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@@ -0,0 +1,71 @@
/*
* SPDX-FileCopyrightText: 2021-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "hal/lcd_periph.h"
#include "soc/gpio_sig_map.h"
const soc_lcd_i2s_signal_desc_t soc_lcd_i2s_signals[2] = {
[0] = {
.irq_id = ETS_I2S0_INTR_SOURCE,
.data_sigs = {
I2S0O_DATA_OUT0_IDX,
I2S0O_DATA_OUT1_IDX,
I2S0O_DATA_OUT2_IDX,
I2S0O_DATA_OUT3_IDX,
I2S0O_DATA_OUT4_IDX,
I2S0O_DATA_OUT5_IDX,
I2S0O_DATA_OUT6_IDX,
I2S0O_DATA_OUT7_IDX,
I2S0O_DATA_OUT8_IDX,
I2S0O_DATA_OUT9_IDX,
I2S0O_DATA_OUT10_IDX,
I2S0O_DATA_OUT11_IDX,
I2S0O_DATA_OUT12_IDX,
I2S0O_DATA_OUT13_IDX,
I2S0O_DATA_OUT14_IDX,
I2S0O_DATA_OUT15_IDX,
I2S0O_DATA_OUT16_IDX,
I2S0O_DATA_OUT17_IDX,
I2S0O_DATA_OUT18_IDX,
I2S0O_DATA_OUT19_IDX,
I2S0O_DATA_OUT20_IDX,
I2S0O_DATA_OUT21_IDX,
I2S0O_DATA_OUT22_IDX,
I2S0O_DATA_OUT23_IDX,
},
.wr_sig = I2S0O_WS_OUT_IDX,
},
[1] = {
.irq_id = ETS_I2S1_INTR_SOURCE,
.data_sigs = {
I2S1O_DATA_OUT0_IDX,
I2S1O_DATA_OUT1_IDX,
I2S1O_DATA_OUT2_IDX,
I2S1O_DATA_OUT3_IDX,
I2S1O_DATA_OUT4_IDX,
I2S1O_DATA_OUT5_IDX,
I2S1O_DATA_OUT6_IDX,
I2S1O_DATA_OUT7_IDX,
I2S1O_DATA_OUT8_IDX,
I2S1O_DATA_OUT9_IDX,
I2S1O_DATA_OUT10_IDX,
I2S1O_DATA_OUT11_IDX,
I2S1O_DATA_OUT12_IDX,
I2S1O_DATA_OUT13_IDX,
I2S1O_DATA_OUT14_IDX,
I2S1O_DATA_OUT15_IDX,
I2S1O_DATA_OUT16_IDX,
I2S1O_DATA_OUT17_IDX,
I2S1O_DATA_OUT18_IDX,
I2S1O_DATA_OUT19_IDX,
I2S1O_DATA_OUT20_IDX,
I2S1O_DATA_OUT21_IDX,
I2S1O_DATA_OUT22_IDX,
I2S1O_DATA_OUT23_IDX,
},
.wr_sig = I2S1O_WS_OUT_IDX,
}
};
components/hal/esp32p4/include/hal/lcd_ll.h → components/esp_hal_lcd/esp32p4/include/hal/lcd_ll.h
+6
View File
@@ -16,6 +16,12 @@
#include "hal/config.h"
#include "soc/hp_sys_clkrst_struct.h"
#define LCD_LL_GET(_attr) LCD_LL_ ## _attr
#define LCD_LL_RGB_BUS_WIDTH 24
#define LCD_LL_RGB_PANEL_NUM 1
#define LCD_LL_I80_BUS_WIDTH 24
#define LCD_LL_I80_BUS_NUM 1
#ifdef __cplusplus
extern "C" {
#endif
components/hal/esp32p4/include/hal/mipi_dsi_brg_ll.h → components/esp_hal_lcd/esp32p4/include/hal/mipi_dsi_brg_ll.h
View File
components/hal/esp32p4/include/hal/mipi_dsi_host_ll.h → components/esp_hal_lcd/esp32p4/include/hal/mipi_dsi_host_ll.h
View File
components/hal/esp32p4/include/hal/mipi_dsi_ll.h → components/esp_hal_lcd/esp32p4/include/hal/mipi_dsi_ll.h
+3 -1
View File
@@ -15,7 +15,9 @@
#include "hal/mipi_dsi_brg_ll.h"
#include "hal/mipi_dsi_phy_ll.h"
#define MIPI_DSI_LL_NUM_BUS 1 // support only 1 MIPI DSI bus
#define MIPI_DSI_LL_GET(_attr) MIPI_DSI_LL_ ## _attr
#define MIPI_DSI_LL_BUS_NUM 1 // support only 1 MIPI DSI bus
#define MIPI_DSI_LL_MAX_DATA_LANES 2 // support up to 2 data lanes
#ifdef __cplusplus
components/hal/esp32p4/include/hal/mipi_dsi_phy_ll.h → components/esp_hal_lcd/esp32p4/include/hal/mipi_dsi_phy_ll.h
View File
components/esp_hal_lcd/esp32p4/lcd_periph.c
+82
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@@ -0,0 +1,82 @@
/*
* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "hal/lcd_periph.h"
#include "soc/gpio_sig_map.h"
const soc_lcd_i80_signal_desc_t soc_lcd_i80_signals[1] = {
[0] = {
.module = PERIPH_LCD_CAM_MODULE,
.irq_id = ETS_LCD_CAM_INTR_SOURCE,
.data_sigs = {
LCD_DATA_OUT_PAD_OUT0_IDX,
LCD_DATA_OUT_PAD_OUT1_IDX,
LCD_DATA_OUT_PAD_OUT2_IDX,
LCD_DATA_OUT_PAD_OUT3_IDX,
LCD_DATA_OUT_PAD_OUT4_IDX,
LCD_DATA_OUT_PAD_OUT5_IDX,
LCD_DATA_OUT_PAD_OUT6_IDX,
LCD_DATA_OUT_PAD_OUT7_IDX,
LCD_DATA_OUT_PAD_OUT8_IDX,
LCD_DATA_OUT_PAD_OUT9_IDX,
LCD_DATA_OUT_PAD_OUT10_IDX,
LCD_DATA_OUT_PAD_OUT11_IDX,
LCD_DATA_OUT_PAD_OUT12_IDX,
LCD_DATA_OUT_PAD_OUT13_IDX,
LCD_DATA_OUT_PAD_OUT14_IDX,
LCD_DATA_OUT_PAD_OUT15_IDX,
LCD_DATA_OUT_PAD_OUT16_IDX,
LCD_DATA_OUT_PAD_OUT17_IDX,
LCD_DATA_OUT_PAD_OUT18_IDX,
LCD_DATA_OUT_PAD_OUT19_IDX,
LCD_DATA_OUT_PAD_OUT20_IDX,
LCD_DATA_OUT_PAD_OUT21_IDX,
LCD_DATA_OUT_PAD_OUT22_IDX,
LCD_DATA_OUT_PAD_OUT23_IDX,
},
.cs_sig = LCD_CS_PAD_OUT_IDX,
.dc_sig = LCD_DC_PAD_OUT_IDX,
.wr_sig = LCD_PCLK_PAD_OUT_IDX
}
};
const soc_lcd_rgb_signal_desc_t soc_lcd_rgb_signals[1] = {
[0] = {
.module = PERIPH_LCD_CAM_MODULE,
.irq_id = ETS_LCD_CAM_INTR_SOURCE,
.data_sigs = {
LCD_DATA_OUT_PAD_OUT0_IDX,
LCD_DATA_OUT_PAD_OUT1_IDX,
LCD_DATA_OUT_PAD_OUT2_IDX,
LCD_DATA_OUT_PAD_OUT3_IDX,
LCD_DATA_OUT_PAD_OUT4_IDX,
LCD_DATA_OUT_PAD_OUT5_IDX,
LCD_DATA_OUT_PAD_OUT6_IDX,
LCD_DATA_OUT_PAD_OUT7_IDX,
LCD_DATA_OUT_PAD_OUT8_IDX,
LCD_DATA_OUT_PAD_OUT9_IDX,
LCD_DATA_OUT_PAD_OUT10_IDX,
LCD_DATA_OUT_PAD_OUT11_IDX,
LCD_DATA_OUT_PAD_OUT12_IDX,
LCD_DATA_OUT_PAD_OUT13_IDX,
LCD_DATA_OUT_PAD_OUT14_IDX,
LCD_DATA_OUT_PAD_OUT15_IDX,
LCD_DATA_OUT_PAD_OUT16_IDX,
LCD_DATA_OUT_PAD_OUT17_IDX,
LCD_DATA_OUT_PAD_OUT18_IDX,
LCD_DATA_OUT_PAD_OUT19_IDX,
LCD_DATA_OUT_PAD_OUT20_IDX,
LCD_DATA_OUT_PAD_OUT21_IDX,
LCD_DATA_OUT_PAD_OUT22_IDX,
LCD_DATA_OUT_PAD_OUT23_IDX,
},
.hsync_sig = LCD_H_SYNC_PAD_OUT_IDX,
.vsync_sig = LCD_V_SYNC_PAD_OUT_IDX,
.pclk_sig = LCD_PCLK_PAD_OUT_IDX,
.de_sig = LCD_H_ENABLE_PAD_OUT_IDX,
.disp_sig = SIG_GPIO_OUT_IDX,
}
};
components/soc/esp32p4/mipi_dsi_periph.c → components/esp_hal_lcd/esp32p4/mipi_dsi_periph.c
+1 -1
View File
@@ -4,7 +4,7 @@
* SPDX-License-Identifier: Apache-2.0
*/
#include "soc/mipi_dsi_periph.h"
#include "hal/mipi_dsi_periph.h"
#include "soc/interrupts.h"
const soc_mipi_dsi_phy_pll_freq_range_t soc_mipi_dsi_phy_pll_ranges[] = {
components/esp_hal_lcd/esp32s2/lcd_periph.c
+41
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@@ -0,0 +1,41 @@
/*
* SPDX-FileCopyrightText: 2021-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "hal/lcd_periph.h"
#include "soc/gpio_sig_map.h"
const soc_lcd_i2s_signal_desc_t soc_lcd_i2s_signals[1] = {
[0] = {
.irq_id = ETS_I2S0_INTR_SOURCE,
.data_sigs = {
I2S0O_DATA_OUT0_IDX,
I2S0O_DATA_OUT1_IDX,
I2S0O_DATA_OUT2_IDX,
I2S0O_DATA_OUT3_IDX,
I2S0O_DATA_OUT4_IDX,
I2S0O_DATA_OUT5_IDX,
I2S0O_DATA_OUT6_IDX,
I2S0O_DATA_OUT7_IDX,
I2S0O_DATA_OUT8_IDX,
I2S0O_DATA_OUT9_IDX,
I2S0O_DATA_OUT10_IDX,
I2S0O_DATA_OUT11_IDX,
I2S0O_DATA_OUT12_IDX,
I2S0O_DATA_OUT13_IDX,
I2S0O_DATA_OUT14_IDX,
I2S0O_DATA_OUT15_IDX,
I2S0O_DATA_OUT16_IDX,
I2S0O_DATA_OUT17_IDX,
I2S0O_DATA_OUT18_IDX,
I2S0O_DATA_OUT19_IDX,
I2S0O_DATA_OUT20_IDX,
I2S0O_DATA_OUT21_IDX,
I2S0O_DATA_OUT22_IDX,
I2S0O_DATA_OUT23_IDX,
},
.wr_sig = I2S0O_WS_OUT_IDX,
}
};
components/hal/esp32s3/include/hal/lcd_ll.h → components/esp_hal_lcd/esp32s3/include/hal/lcd_ll.h
+6
View File
@@ -15,6 +15,12 @@
#include "hal/lcd_types.h"
#include "soc/system_struct.h"
#define LCD_LL_GET(_attr) LCD_LL_ ## _attr
#define LCD_LL_RGB_BUS_WIDTH 16
#define LCD_LL_RGB_PANEL_NUM 1
#define LCD_LL_I80_BUS_WIDTH 16
#define LCD_LL_I80_BUS_NUM 1
#ifdef __cplusplus
extern "C" {
#endif
components/esp_hal_lcd/esp32s3/lcd_periph.c
+66
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@@ -0,0 +1,66 @@
/*
* SPDX-FileCopyrightText: 2021-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "hal/lcd_periph.h"
#include "soc/gpio_sig_map.h"
const soc_lcd_i80_signal_desc_t soc_lcd_i80_signals[1] = {
[0] = {
.module = PERIPH_LCD_CAM_MODULE,
.irq_id = ETS_LCD_CAM_INTR_SOURCE,
.data_sigs = {
LCD_DATA_OUT0_IDX,
LCD_DATA_OUT1_IDX,
LCD_DATA_OUT2_IDX,
LCD_DATA_OUT3_IDX,
LCD_DATA_OUT4_IDX,
LCD_DATA_OUT5_IDX,
LCD_DATA_OUT6_IDX,
LCD_DATA_OUT7_IDX,
LCD_DATA_OUT8_IDX,
LCD_DATA_OUT9_IDX,
LCD_DATA_OUT10_IDX,
LCD_DATA_OUT11_IDX,
LCD_DATA_OUT12_IDX,
LCD_DATA_OUT13_IDX,
LCD_DATA_OUT14_IDX,
LCD_DATA_OUT15_IDX,
},
.cs_sig = LCD_CS_IDX,
.dc_sig = LCD_DC_IDX,
.wr_sig = LCD_PCLK_IDX
}
};
const soc_lcd_rgb_signal_desc_t soc_lcd_rgb_signals[1] = {
[0] = {
.module = PERIPH_LCD_CAM_MODULE,
.irq_id = ETS_LCD_CAM_INTR_SOURCE,
.data_sigs = {
LCD_DATA_OUT0_IDX,
LCD_DATA_OUT1_IDX,
LCD_DATA_OUT2_IDX,
LCD_DATA_OUT3_IDX,
LCD_DATA_OUT4_IDX,
LCD_DATA_OUT5_IDX,
LCD_DATA_OUT6_IDX,
LCD_DATA_OUT7_IDX,
LCD_DATA_OUT8_IDX,
LCD_DATA_OUT9_IDX,
LCD_DATA_OUT10_IDX,
LCD_DATA_OUT11_IDX,
LCD_DATA_OUT12_IDX,
LCD_DATA_OUT13_IDX,
LCD_DATA_OUT14_IDX,
LCD_DATA_OUT15_IDX,
},
.hsync_sig = LCD_H_SYNC_IDX,
.vsync_sig = LCD_V_SYNC_IDX,
.pclk_sig = LCD_PCLK_IDX,
.de_sig = LCD_H_ENABLE_IDX,
.disp_sig = SIG_GPIO_OUT_IDX,
}
};
components/hal/include/hal/lcd_hal.h → components/esp_hal_lcd/include/hal/lcd_hal.h
View File
components/esp_hal_lcd/include/hal/lcd_periph.h
+66
View File
@@ -0,0 +1,66 @@
/*
* SPDX-FileCopyrightText: 2021-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
#include "soc/soc_caps.h"
#include "soc/periph_defs.h"
#include "soc/regdma.h"
#if SOC_HAS(I2S)
#include "hal/i2s_ll.h"
#endif
#if SOC_HAS(LCDCAM_I80_LCD) || SOC_HAS(LCDCAM_RGB_LCD)
#include "hal/lcd_ll.h"
#endif
#if SOC_HAS(PAU)
#include "soc/retention_periph_defs.h"
#endif
#ifdef __cplusplus
extern "C" {
#endif
#if SOC_HAS(LCDCAM_RGB_LCD)
typedef struct {
const shared_periph_module_t module;
const int irq_id;
const int data_sigs[LCD_LL_GET(RGB_BUS_WIDTH)];
const int hsync_sig;
const int vsync_sig;
const int pclk_sig;
const int de_sig;
const int disp_sig;
} soc_lcd_rgb_signal_desc_t;
extern const soc_lcd_rgb_signal_desc_t soc_lcd_rgb_signals[LCD_LL_GET(RGB_PANEL_NUM)];
#endif // SOC_HAS(LCDCAM_RGB_LCD)
#if SOC_HAS(LCDCAM_I80_LCD)
typedef struct {
const shared_periph_module_t module;
const int irq_id;
const int data_sigs[LCD_LL_GET(I80_BUS_WIDTH)];
const int cs_sig;
const int dc_sig;
const int wr_sig;
} soc_lcd_i80_signal_desc_t;
extern const soc_lcd_i80_signal_desc_t soc_lcd_i80_signals[LCD_LL_GET(I80_BUS_NUM)];
#endif // SOC_HAS(LCDCAM_I80_LCD)
#if SOC_HAS(I2S_I80_LCD)
typedef struct {
const int irq_id;
const int data_sigs[I2S_LL_GET(BUS_WIDTH)];
const int wr_sig;
} soc_lcd_i2s_signal_desc_t;
extern const soc_lcd_i2s_signal_desc_t soc_lcd_i2s_signals[I2S_LL_GET(INST_NUM)];
#endif // SOC_HAS(I2S_I80_LCD)
#ifdef __cplusplus
}
#endif
components/hal/include/hal/lcd_types.h → components/esp_hal_lcd/include/hal/lcd_types.h
+2 -3
View File
@@ -14,14 +14,14 @@
extern "C" {
#endif
#if SOC_I2S_SUPPORTS_LCD_CAMERA || SOC_LCDCAM_SUPPORTED
#if SOC_HAS(I2S_I80_LCD) || SOC_HAS(LCDCAM_I80_LCD) || SOC_HAS(LCDCAM_RGB_LCD)
/**
* @brief LCD clock source
*/
typedef soc_periph_lcd_clk_src_t lcd_clock_source_t;
#else
typedef int lcd_clock_source_t;
#endif // SOC_I2S_SUPPORTS_LCD_CAMERA || SOC_LCDCAM_SUPPORTED
#endif
/**
* @brief RGB data endian
@@ -84,7 +84,6 @@ typedef enum {
LCD_YUV_CONV_STD_BT709 = COLOR_CONV_STD_RGB_YUV_BT709, /*!< YUV<->RGB conversion standard: BT.709 */
} lcd_yuv_conv_std_t;
/**
* @brief YUV422 packing order
*/
components/hal/include/hal/mipi_dsi_hal.h → components/esp_hal_lcd/include/hal/mipi_dsi_hal.h
View File
components/soc/include/soc/mipi_dsi_periph.h → components/esp_hal_lcd/include/hal/mipi_dsi_periph.h
+5 -5
View File
@@ -8,10 +8,10 @@
#include <stdint.h>
#include <stddef.h>
#include "soc/soc_caps_full.h"
// helper macros to access module attributes
#define SOC_MIPI_DSI_ATTR(_attr) SOC_MODULE_ATTR(MIPI_DSI, _attr)
#include "soc/soc_caps.h"
#if SOC_HAS(MIPI_DSI)
#include "hal/mipi_dsi_ll.h"
#endif
#ifdef __cplusplus
extern "C" {
@@ -35,7 +35,7 @@ typedef struct {
const int brg_irq_id; // interrupt source ID for MIPI DSI Bridge
} soc_mipi_dsi_signal_desc_t;
extern const soc_mipi_dsi_signal_desc_t soc_mipi_dsi_signals[SOC_MIPI_DSI_ATTR(INST_NUM)];
extern const soc_mipi_dsi_signal_desc_t soc_mipi_dsi_signals[MIPI_DSI_LL_GET(BUS_NUM)];
#endif // SOC_HAS(MIPI_DSI)
components/hal/include/hal/mipi_dsi_types.h → components/esp_hal_lcd/include/hal/mipi_dsi_types.h
View File
components/hal/lcd_hal.c → components/esp_hal_lcd/lcd_hal.c
View File
components/hal/mipi_dsi_hal.c → components/esp_hal_lcd/mipi_dsi_hal.c
+1 -1
View File
@@ -10,7 +10,7 @@
#include "hal/mipi_dsi_ll.h"
#include "hal/assert.h"
#include "hal/log.h"
#include "soc/mipi_dsi_periph.h"
#include "hal/mipi_dsi_periph.h"
HAL_LOG_ATTR_TAG(TAG, "dsi_hal");
components/esp_lcd/CMakeLists.txt
+3 -3
View File
@@ -11,7 +11,7 @@ set(srcs "src/esp_lcd_common.c"
"src/esp_lcd_panel_ops.c")
set(includes "include" "interface")
set(priv_requires "esp_mm" "esp_psram" "esp_pm" "esp_driver_i2s")
set(public_requires "esp_driver_gpio" "esp_driver_i2c" "esp_driver_spi" "esp_driver_parlio")
set(public_requires "esp_driver_gpio" "esp_driver_i2c" "esp_driver_spi" "esp_driver_parlio" "esp_hal_lcd")
if(CONFIG_SOC_DMA2D_SUPPORTED)
list(APPEND srcs "src/esp_async_fbcpy.c")
@@ -25,11 +25,11 @@ if(CONFIG_SOC_GPSPI_SUPPORTED)
list(APPEND srcs "spi/esp_lcd_panel_io_spi.c")
endif()
if(CONFIG_SOC_I2S_SUPPORTS_LCD_CAMERA)
if(CONFIG_SOC_I2S_I80_LCD_SUPPORTED)
list(APPEND srcs "i80/esp_lcd_panel_io_i2s.c")
endif()
if(CONFIG_SOC_PARLIO_SUPPORT_SPI_LCD)
if(CONFIG_SOC_PARLIO_LCD_SUPPORTED)
list(APPEND srcs "parl/esp_lcd_panel_io_parl.c")
endif()
components/esp_lcd/dsi/esp_lcd_mipi_dsi_bus.c
+1 -1
View File
@@ -25,7 +25,7 @@ esp_err_t esp_lcd_new_dsi_bus(const esp_lcd_dsi_bus_config_t *bus_config, esp_lc
// And each PHY has its own associated PINs, which is not changeable.
// So user HAS TO specify the bus ID by themselves, according to their PCB design.
int bus_id = bus_config->bus_id;
ESP_RETURN_ON_FALSE(bus_id >= 0 && bus_id < MIPI_DSI_LL_NUM_BUS, ESP_ERR_INVALID_ARG, TAG, "invalid bus ID %d", bus_id);
ESP_RETURN_ON_FALSE(bus_id >= 0 && bus_id < MIPI_DSI_LL_GET(BUS_NUM), ESP_ERR_INVALID_ARG, TAG, "invalid bus ID %d", bus_id);
esp_lcd_dsi_bus_t *dsi_bus = heap_caps_calloc(1, sizeof(esp_lcd_dsi_bus_t), DSI_MEM_ALLOC_CAPS);
ESP_RETURN_ON_FALSE(dsi_bus, ESP_ERR_NO_MEM, TAG, "no memory for DSI bus");
dsi_bus->bus_id = bus_id;
components/esp_lcd/dsi/mipi_dsi_priv.h
+1 -1
View File
@@ -12,7 +12,7 @@
// Set the maximum log level for gptimer driver
#define LOG_LOCAL_LEVEL ESP_LOG_VERBOSE
#endif
#include "soc/mipi_dsi_periph.h"
#include "hal/mipi_dsi_periph.h"
#include "freertos/FreeRTOS.h"
#include "freertos/task.h"
#include "freertos/semphr.h"
components/esp_lcd/i80/esp_lcd_panel_io_i2s.c
+16 -16
View File
@@ -100,7 +100,7 @@ esp_err_t esp_lcd_new_i80_bus(const esp_lcd_i80_bus_config_t *bus_config, esp_lc
ESP_GOTO_ON_FALSE(bus_config->bus_width == 8 || bus_config->bus_width == 16, ESP_ERR_INVALID_ARG, err,
TAG, "invalid bus width:%d", bus_config->bus_width);
size_t max_transfer_bytes = (bus_config->max_transfer_bytes + 3) & ~0x03; // align up to 4 bytes
#if SOC_I2S_ATTR(TRANS_SIZE_ALIGN_WORD)
#if I2S_LL_GET(TRANS_SIZE_ALIGN_WORD)
// double the size of the internal DMA buffer if bus_width is 8,
// because one I2S FIFO (4 bytes) will only contain two bytes of valid data
max_transfer_bytes = max_transfer_bytes * 16 / bus_config->bus_width + 4;
@@ -120,17 +120,17 @@ esp_err_t esp_lcd_new_i80_bus(const esp_lcd_i80_bus_config_t *bus_config, esp_lc
ESP_GOTO_ON_ERROR(gdma_new_link_list(&dma_link_config, &bus->dma_link), err, TAG, "create DMA link list failed");
bus->bus_id = -1;
bus->max_transfer_bytes = max_transfer_bytes;
#if SOC_I2S_ATTR(TRANS_SIZE_ALIGN_WORD)
#if I2S_LL_GET(TRANS_SIZE_ALIGN_WORD)
// transform format for LCD commands, parameters and color data, so we need a big buffer
bus->format_buffer = heap_caps_calloc(1, max_transfer_bytes, MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT | MALLOC_CAP_DMA);
#else
// only transform format for LCD parameters, buffer size depends on specific LCD, set at compile time
bus->format_buffer = heap_caps_calloc(1, LCD_I80_IO_FORMAT_BUF_SIZE, MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT | MALLOC_CAP_DMA);
#endif // SOC_I2S_ATTR(TRANS_SIZE_ALIGN_WORD)
#endif // I2S_LL_GET(TRANS_SIZE_ALIGN_WORD)
ESP_GOTO_ON_FALSE(bus->format_buffer, ESP_ERR_NO_MEM, err, TAG, "no mem for format buffer");
// LCD mode can't work with other modes at the same time, we need to register the driver object to the I2S platform
int bus_id = -1;
for (int i = 0; i < SOC_LCD_I80_BUSES; i++) {
for (int i = 0; i < I2S_LL_GET(INST_NUM); i++) {
if (i2s_platform_acquire_occupation(I2S_CTLR_HP, i, "esp_lcd_panel_io_i2s") == ESP_OK) {
bus_id = i;
break;
@@ -155,7 +155,7 @@ esp_err_t esp_lcd_new_i80_bus(const esp_lcd_i80_bus_config_t *bus_config, esp_lc
// install interrupt service, (I2S LCD mode only uses the "TX Unit", which leaves "RX Unit" for other purpose)
// So the interrupt should also be able to share with other functionality
int isr_flags = LCD_I80_INTR_ALLOC_FLAGS | ESP_INTR_FLAG_SHARED | ESP_INTR_FLAG_LOWMED;
ret = esp_intr_alloc_intrstatus(lcd_periph_i2s_signals.buses[bus->bus_id].irq_id, isr_flags,
ret = esp_intr_alloc_intrstatus(soc_lcd_i2s_signals[bus->bus_id].irq_id, isr_flags,
(uint32_t)i2s_ll_get_intr_status_reg(bus->hal.dev),
I2S_LL_EVENT_TX_EOF, i2s_lcd_default_isr_handler, bus, &bus->intr);
ESP_GOTO_ON_ERROR(ret, err, TAG, "install interrupt failed");
@@ -372,7 +372,7 @@ static void i2s_lcd_prepare_cmd_buffer(lcd_i80_trans_descriptor_t *trans_desc, c
int end = i80_device->lcd_cmd_bits / 8 - 1;
lcd_com_reverse_buffer_bytes(from, start, end);
}
#if SOC_I2S_ATTR(TRANS_SIZE_ALIGN_WORD)
#if I2S_LL_GET(TRANS_SIZE_ALIGN_WORD)
uint8_t *to = bus->format_buffer;
int cmd_cycle = i80_device->lcd_cmd_bits / bus->bus_width;
if (cmd_cycle * bus->bus_width < i80_device->lcd_cmd_bits) {
@@ -410,7 +410,7 @@ static void i2s_lcd_prepare_param_buffer(lcd_i80_trans_descriptor_t *trans_desc,
lcd_com_reverse_buffer_bytes(from, start, end);
}
}
#if SOC_I2S_ATTR(TRANS_SIZE_ALIGN_WORD)
#if I2S_LL_GET(TRANS_SIZE_ALIGN_WORD)
uint8_t *to = bus->format_buffer;
int param_cycle = i80_device->lcd_param_bits / bus->bus_width;
if (param_cycle * bus->bus_width < i80_device->lcd_param_bits) {
@@ -452,7 +452,7 @@ static void i2s_lcd_prepare_param_buffer(lcd_i80_trans_descriptor_t *trans_desc,
static void i2s_lcd_prepare_color_buffer(lcd_i80_trans_descriptor_t *trans_desc, const void *color, size_t color_size)
{
#if SOC_I2S_ATTR(TRANS_SIZE_ALIGN_WORD)
#if I2S_LL_GET(TRANS_SIZE_ALIGN_WORD)
lcd_panel_io_i80_t *i80_device = trans_desc->i80_device;
esp_lcd_i80_bus_t *bus = i80_device->bus;
uint8_t *from = (uint8_t *)color;
@@ -509,7 +509,7 @@ static esp_err_t panel_io_i80_tx_param(esp_lcd_panel_io_t *io, int lcd_cmd, cons
trans_desc->i80_device = next_device;
trans_desc->trans_done_cb = NULL; // no callback for command transfer
bus->cur_trans = trans_desc;
#if SOC_I2S_ATTR(TRANS_SIZE_ALIGN_WORD)
#if I2S_LL_GET(TRANS_SIZE_ALIGN_WORD)
// switch to I2S 32bits mode, one WS cycle <=> one I2S FIFO
i2s_ll_tx_set_bits_mod(bus->hal.dev, 32);
#endif
@@ -589,7 +589,7 @@ static esp_err_t panel_io_i80_tx_color(esp_lcd_panel_io_t *io, int lcd_cmd, cons
trans_desc->i80_device = next_device;
trans_desc->trans_done_cb = NULL; // no callback for command transfer
bus->cur_trans = trans_desc;
#if SOC_I2S_ATTR(TRANS_SIZE_ALIGN_WORD)
#if I2S_LL_GET(TRANS_SIZE_ALIGN_WORD)
// switch to I2S 32bits mode, one WS cycle <=> one I2S FIFO
i2s_ll_tx_set_bits_mod(bus->hal.dev, 32);
#endif
@@ -680,15 +680,15 @@ static esp_err_t i2s_lcd_configure_gpio(esp_lcd_i80_bus_handle_t bus, const esp_
for (size_t i = 0; i < bus_config->bus_width; i++) {
gpio_func_sel(bus_config->data_gpio_nums[i], PIN_FUNC_GPIO);
// the esp_rom_gpio_connect_out_signal function will also help enable the output path properly
#if SOC_I2S_ATTR(TRANS_SIZE_ALIGN_WORD)
esp_rom_gpio_connect_out_signal(bus_config->data_gpio_nums[i], lcd_periph_i2s_signals.buses[bus_id].data_sigs[i + 8], false, false);
#if I2S_LL_GET(TRANS_SIZE_ALIGN_WORD)
esp_rom_gpio_connect_out_signal(bus_config->data_gpio_nums[i], soc_lcd_i2s_signals[bus_id].data_sigs[i + 8], false, false);
#else
esp_rom_gpio_connect_out_signal(bus_config->data_gpio_nums[i], lcd_periph_i2s_signals.buses[bus_id].data_sigs[i + SOC_I2S_ATTR(MAX_DATA_WIDTH) - bus_config->bus_width], false, false);
esp_rom_gpio_connect_out_signal(bus_config->data_gpio_nums[i], soc_lcd_i2s_signals[bus_id].data_sigs[i + I2S_LL_GET(BUS_WIDTH) - bus_config->bus_width], false, false);
#endif
}
// WR signal (pclk)
gpio_func_sel(bus_config->wr_gpio_num, PIN_FUNC_GPIO);
esp_rom_gpio_connect_out_signal(bus_config->wr_gpio_num, lcd_periph_i2s_signals.buses[bus_id].wr_sig, true, false);
esp_rom_gpio_connect_out_signal(bus_config->wr_gpio_num, soc_lcd_i2s_signals[bus_id].wr_sig, true, false);
// DC signal is controlled by software, set as general purpose IO
gpio_func_sel(bus_config->dc_gpio_num, PIN_FUNC_GPIO);
gpio_output_enable(bus_config->dc_gpio_num);
@@ -731,7 +731,7 @@ static void lcd_i80_switch_devices(lcd_panel_io_i80_t *cur_device, lcd_panel_io_
}
// the WR signal (a.k.a the PCLK) generated by I2S is low level in idle stage
// but most of 8080 LCDs require the WR line to be in high level during idle stage
esp_rom_gpio_connect_out_signal(bus->wr_gpio_num, lcd_periph_i2s_signals.buses[bus->bus_id].wr_sig, !next_device->flags.pclk_idle_low, false);
esp_rom_gpio_connect_out_signal(bus->wr_gpio_num, soc_lcd_i2s_signals[bus->bus_id].wr_sig, !next_device->flags.pclk_idle_low, false);
}
bus->cur_device = next_device;
}
@@ -800,7 +800,7 @@ static IRAM_ATTR void i2s_lcd_default_isr_handler(void *args)
}
};
gdma_link_mount_buffers(bus->dma_link, 0, &mount_config, 1, NULL);
#if SOC_I2S_ATTR(TRANS_SIZE_ALIGN_WORD)
#if I2S_LL_GET(TRANS_SIZE_ALIGN_WORD)
// switch to I2S 16bits mode, two WS cycle <=> one I2S FIFO
i2s_ll_tx_set_bits_mod(bus->hal.dev, 16);
#endif
components/esp_lcd/i80/esp_lcd_panel_io_i80.c
+8 -8
View File
@@ -137,7 +137,7 @@ esp_err_t esp_lcd_new_i80_bus(const esp_lcd_i80_bus_config_t *bus_config, esp_lc
ESP_GOTO_ON_FALSE(bus_id >= 0, ESP_ERR_NOT_FOUND, err, TAG, "no free i80 bus slot");
bus->bus_id = bus_id;
// enable APB to access LCD registers
PERIPH_RCC_ACQUIRE_ATOMIC(lcd_periph_i80_signals.buses[bus_id].module, ref_count) {
PERIPH_RCC_ACQUIRE_ATOMIC(soc_lcd_i80_signals[bus_id].module, ref_count) {
if (ref_count == 0) {
lcd_ll_enable_bus_clock(bus_id, true);
lcd_ll_reset_register(bus_id);
@@ -162,7 +162,7 @@ esp_err_t esp_lcd_new_i80_bus(const esp_lcd_i80_bus_config_t *bus_config, esp_lc
// install interrupt service, (LCD peripheral shares the same interrupt source with Camera peripheral with different mask)
// interrupt is disabled by default
int isr_flags = LCD_I80_INTR_ALLOC_FLAGS | ESP_INTR_FLAG_SHARED | ESP_INTR_FLAG_LOWMED;
ret = esp_intr_alloc_intrstatus(lcd_periph_i80_signals.buses[bus_id].irq_id, isr_flags,
ret = esp_intr_alloc_intrstatus(soc_lcd_i80_signals[bus_id].irq_id, isr_flags,
(uint32_t)lcd_ll_get_interrupt_status_reg(bus->hal.dev),
LCD_LL_EVENT_I80, i80_lcd_default_isr_handler, bus, &bus->intr);
ESP_GOTO_ON_ERROR(ret, err, TAG, "install interrupt failed");
@@ -214,7 +214,7 @@ err:
gdma_del_link_list(bus->dma_link);
}
if (bus->bus_id >= 0) {
PERIPH_RCC_RELEASE_ATOMIC(lcd_periph_i80_signals.buses[bus->bus_id].module, ref_count) {
PERIPH_RCC_RELEASE_ATOMIC(soc_lcd_i80_signals[bus->bus_id].module, ref_count) {
if (ref_count == 0) {
lcd_ll_enable_bus_clock(bus->bus_id, false);
}
@@ -241,7 +241,7 @@ esp_err_t esp_lcd_del_i80_bus(esp_lcd_i80_bus_handle_t bus)
ESP_GOTO_ON_FALSE(LIST_EMPTY(&bus->device_list), ESP_ERR_INVALID_STATE, err, TAG, "device list not empty");
int bus_id = bus->bus_id;
lcd_com_remove_device(LCD_COM_DEVICE_TYPE_I80, bus_id);
PERIPH_RCC_RELEASE_ATOMIC(lcd_periph_i80_signals.buses[bus_id].module, ref_count) {
PERIPH_RCC_RELEASE_ATOMIC(soc_lcd_i80_signals[bus_id].module, ref_count) {
if (ref_count == 0) {
lcd_ll_enable_bus_clock(bus_id, false);
}
@@ -646,14 +646,14 @@ static esp_err_t lcd_i80_bus_configure_gpio(esp_lcd_i80_bus_handle_t bus, const
for (size_t i = 0; i < bus_config->bus_width; i++) {
gpio_func_sel(bus_config->data_gpio_nums[i], PIN_FUNC_GPIO);
// the esp_rom_gpio_connect_out_signal function will also help enable the output path properly
esp_rom_gpio_connect_out_signal(bus_config->data_gpio_nums[i], lcd_periph_i80_signals.buses[bus_id].data_sigs[i], false, false);
esp_rom_gpio_connect_out_signal(bus_config->data_gpio_nums[i], soc_lcd_i80_signals[bus_id].data_sigs[i], false, false);
}
// D/C signal
gpio_func_sel(bus_config->dc_gpio_num, PIN_FUNC_GPIO);
esp_rom_gpio_connect_out_signal(bus_config->dc_gpio_num, lcd_periph_i80_signals.buses[bus_id].dc_sig, false, false);
esp_rom_gpio_connect_out_signal(bus_config->dc_gpio_num, soc_lcd_i80_signals[bus_id].dc_sig, false, false);
// WR signal (PCLK)
gpio_func_sel(bus_config->wr_gpio_num, PIN_FUNC_GPIO);
esp_rom_gpio_connect_out_signal(bus_config->wr_gpio_num, lcd_periph_i80_signals.buses[bus_id].wr_sig, false, false);
esp_rom_gpio_connect_out_signal(bus_config->wr_gpio_num, soc_lcd_i80_signals[bus_id].wr_sig, false, false);
return ESP_OK;
}
@@ -720,7 +720,7 @@ static void lcd_i80_switch_devices(lcd_panel_io_i80_t *cur_device, lcd_panel_io_
}
if (next_device->cs_gpio_num >= 0) {
// connect CS signal to the new device
esp_rom_gpio_connect_out_signal(next_device->cs_gpio_num, lcd_periph_i80_signals.buses[bus->bus_id].cs_sig,
esp_rom_gpio_connect_out_signal(next_device->cs_gpio_num, soc_lcd_i80_signals[bus->bus_id].cs_sig,
next_device->flags.cs_active_high, false);
}
}
components/esp_lcd/i80/i80_io_priv.h
+1 -1
View File
@@ -39,7 +39,7 @@
#include "esp_private/gdma_link.h"
#include "esp_private/esp_dma_utils.h"
#include "esp_private/gpio.h"
#include "soc/lcd_periph.h"
#include "hal/lcd_periph.h"
#include "soc/io_mux_reg.h"
#include "soc/gpio_sig_map.h"
components/esp_lcd/linker.lf
+7 -2
View File
@@ -23,9 +23,14 @@ entries:
gdma: gdma_start (noflash)
gdma_link: gdma_link_get_head_addr (noflash)
[mapping:esp_lcd_rgb_hal]
[mapping:esp_lcd_rgb_hal_common]
archive: libhal.a
entries:
if LCD_RGB_ISR_IRAM_SAFE = y:
lcd_hal: lcd_hal_cal_pclk_freq (noflash)
hal_utils: hal_utils_calc_clk_div_frac_fast (noflash)
[mapping:esp_lcd_rgb_hal]
archive: libesp_hal_lcd.a
entries:
if LCD_RGB_ISR_IRAM_SAFE = y:
lcd_hal: lcd_hal_cal_pclk_freq (noflash)
components/esp_lcd/parl/esp_lcd_panel_io_parl.c
+1 -1
View File
@@ -27,7 +27,7 @@
#include "esp_check.h"
#include "esp_heap_caps.h"
#include "soc/soc_caps.h"
#include "soc/lcd_periph.h"
#include "hal/lcd_periph.h"
#include "hal/gpio_hal.h"
#include "driver/gpio.h"
#include "driver/parlio_tx.h"
components/esp_lcd/priv_include/esp_lcd_common.h
+3 -3
View File
@@ -11,7 +11,7 @@
#include "hal/dma_types.h"
#include "esp_intr_alloc.h"
#include "esp_heap_caps.h"
#if SOC_LCDCAM_SUPPORTED
#if SOC_HAS(LCDCAM_I80_LCD) || SOC_HAS(LCDCAM_RGB_LCD)
#include "hal/lcd_hal.h"
#endif
@@ -35,7 +35,7 @@ extern "C" {
#define LCD_DMA_DESCRIPTOR_BUFFER_MAX_SIZE 4095
#if SOC_LCDCAM_SUPPORTED
#if SOC_HAS(LCDCAM_I80_LCD) || SOC_HAS(LCDCAM_RGB_LCD)
typedef enum {
LCD_COM_DEVICE_TYPE_I80,
@@ -58,7 +58,7 @@ int lcd_com_register_device(lcd_com_device_type_t device_type, void *device_obj)
* @param member_id member ID
*/
void lcd_com_remove_device(lcd_com_device_type_t device_type, int member_id);
#endif // SOC_LCDCAM_SUPPORTED
#endif // SOC_HAS(LCDCAM_I80_LCD) || SOC_HAS(LCDCAM_RGB_LCD)
/**
* @brief Reverse the bytes in the buffer
components/esp_lcd/rgb/esp_lcd_panel_rgb.c
+13 -13
View File
@@ -39,7 +39,7 @@
#include "esp_lcd_common.h"
#include "esp_cache.h"
#include "esp_memory_utils.h"
#include "soc/lcd_periph.h"
#include "hal/lcd_periph.h"
#include "soc/io_mux_reg.h"
#include "hal/lcd_hal.h"
#include "hal/lcd_ll.h"
@@ -127,7 +127,7 @@ struct esp_rgb_panel_t {
gpio_num_t de_gpio_num; // GPIO used for DE signal, set to -1 if it's not used
gpio_num_t pclk_gpio_num; // GPIO used for PCLK signal, set to -1 if it's not used
gpio_num_t disp_gpio_num; // GPIO used for display control signal, set to -1 if it's not used
gpio_num_t data_gpio_nums[SOC_LCDCAM_RGB_DATA_WIDTH]; // GPIOs used for data lines, we keep these GPIOs for action like "invert_color"
gpio_num_t data_gpio_nums[LCD_LL_GET(RGB_BUS_WIDTH)]; // GPIOs used for data lines, we keep these GPIOs for action like "invert_color"
uint64_t gpio_reserve_mask; // GPIOs reserved by this panel, used to revoke the GPIO reservation when the panel is deleted
uint32_t src_clk_hz; // Peripheral source clock resolution
esp_lcd_rgb_timing_t timings; // RGB timing parameters (e.g. pclk, sync pulse, porch width)
@@ -210,7 +210,7 @@ static esp_err_t lcd_rgb_panel_destroy(esp_rgb_panel_t *rgb_panel)
lcd_ll_enable_clock(rgb_panel->hal.dev, false);
}
if (rgb_panel->panel_id >= 0) {
PERIPH_RCC_RELEASE_ATOMIC(lcd_periph_rgb_signals.panels[rgb_panel->panel_id].module, ref_count) {
PERIPH_RCC_RELEASE_ATOMIC(soc_lcd_rgb_signals[rgb_panel->panel_id].module, ref_count) {
if (ref_count == 0) {
lcd_ll_enable_bus_clock(rgb_panel->panel_id, false);
}
@@ -266,7 +266,7 @@ esp_err_t esp_lcd_new_rgb_panel(const esp_lcd_rgb_panel_config_t *rgb_panel_conf
esp_rgb_panel_t *rgb_panel = NULL;
ESP_RETURN_ON_FALSE(rgb_panel_config && ret_panel, ESP_ERR_INVALID_ARG, TAG, "invalid parameter");
size_t data_width = rgb_panel_config->data_width;
ESP_RETURN_ON_FALSE((data_width > 0) && (data_width <= SOC_LCDCAM_RGB_DATA_WIDTH) && ((data_width % 8) == 0), ESP_ERR_INVALID_ARG,
ESP_RETURN_ON_FALSE((data_width > 0) && (data_width <= LCD_LL_GET(RGB_BUS_WIDTH)) && ((data_width % 8) == 0), ESP_ERR_INVALID_ARG,
TAG, "unsupported data width %d", data_width);
ESP_RETURN_ON_FALSE(!(rgb_panel_config->flags.double_fb && rgb_panel_config->flags.no_fb),
ESP_ERR_INVALID_ARG, TAG, "double_fb conflicts with no_fb");
@@ -321,7 +321,7 @@ esp_err_t esp_lcd_new_rgb_panel(const esp_lcd_rgb_panel_config_t *rgb_panel_conf
rgb_panel->panel_id = panel_id;
// enable APB to access LCD registers
PERIPH_RCC_ACQUIRE_ATOMIC(lcd_periph_rgb_signals.panels[panel_id].module, ref_count) {
PERIPH_RCC_ACQUIRE_ATOMIC(soc_lcd_rgb_signals[panel_id].module, ref_count) {
if (ref_count == 0) {
lcd_ll_enable_bus_clock(panel_id, true);
lcd_ll_reset_register(panel_id);
@@ -342,7 +342,7 @@ esp_err_t esp_lcd_new_rgb_panel(const esp_lcd_rgb_panel_config_t *rgb_panel_conf
lcd_ll_reset(rgb_panel->hal.dev);
// install interrupt service, (LCD peripheral shares the interrupt source with Camera by different mask)
int isr_flags = LCD_RGB_INTR_ALLOC_FLAGS | ESP_INTR_FLAG_SHARED | ESP_INTR_FLAG_LOWMED;
ret = esp_intr_alloc_intrstatus(lcd_periph_rgb_signals.panels[panel_id].irq_id, isr_flags,
ret = esp_intr_alloc_intrstatus(soc_lcd_rgb_signals[panel_id].irq_id, isr_flags,
(uint32_t)lcd_ll_get_interrupt_status_reg(rgb_panel->hal.dev),
LCD_LL_EVENT_RGB, rgb_lcd_default_isr_handler, rgb_panel, &rgb_panel->intr);
ESP_GOTO_ON_ERROR(ret, err, TAG, "install interrupt failed");
@@ -711,7 +711,7 @@ static esp_err_t rgb_panel_invert_color(esp_lcd_panel_t *panel, bool invert_colo
// inverting the data line by GPIO matrix
for (int i = 0; i < rgb_panel->data_width; i++) {
if (rgb_panel->data_gpio_nums[i] >= 0) {
esp_rom_gpio_connect_out_signal(rgb_panel->data_gpio_nums[i], lcd_periph_rgb_signals.panels[panel_id].data_sigs[i],
esp_rom_gpio_connect_out_signal(rgb_panel->data_gpio_nums[i], soc_lcd_rgb_signals[panel_id].data_sigs[i],
invert_color_data, false);
}
}
@@ -766,36 +766,36 @@ static esp_err_t lcd_rgb_panel_configure_gpio(esp_rgb_panel_t *rgb_panel, const
for (size_t i = 0; i < panel_config->data_width; i++) {
if (GPIO_IS_VALID_OUTPUT_GPIO(panel_config->data_gpio_nums[i])) {
gpio_matrix_output(panel_config->data_gpio_nums[i],
lcd_periph_rgb_signals.panels[panel_id].data_sigs[i], false, false);
soc_lcd_rgb_signals[panel_id].data_sigs[i], false, false);
gpio_reserve_mask |= (1ULL << panel_config->data_gpio_nums[i]);
}
}
if (GPIO_IS_VALID_OUTPUT_GPIO(panel_config->hsync_gpio_num)) {
gpio_matrix_output(panel_config->hsync_gpio_num,
lcd_periph_rgb_signals.panels[panel_id].hsync_sig, false, false);
soc_lcd_rgb_signals[panel_id].hsync_sig, false, false);
gpio_reserve_mask |= (1ULL << panel_config->hsync_gpio_num);
}
if (GPIO_IS_VALID_OUTPUT_GPIO(panel_config->vsync_gpio_num)) {
gpio_matrix_output(panel_config->vsync_gpio_num,
lcd_periph_rgb_signals.panels[panel_id].vsync_sig, false, false);
soc_lcd_rgb_signals[panel_id].vsync_sig, false, false);
gpio_reserve_mask |= (1ULL << panel_config->vsync_gpio_num);
}
// PCLK may not be necessary in some cases (i.e. VGA output)
if (GPIO_IS_VALID_OUTPUT_GPIO(panel_config->pclk_gpio_num)) {
gpio_matrix_output(panel_config->pclk_gpio_num,
lcd_periph_rgb_signals.panels[panel_id].pclk_sig, false, false);
soc_lcd_rgb_signals[panel_id].pclk_sig, false, false);
gpio_reserve_mask |= (1ULL << panel_config->pclk_gpio_num);
}
// DE signal might not be necessary for some RGB LCD
if (GPIO_IS_VALID_OUTPUT_GPIO(panel_config->de_gpio_num)) {
gpio_matrix_output(panel_config->de_gpio_num,
lcd_periph_rgb_signals.panels[panel_id].de_sig, false, false);
soc_lcd_rgb_signals[panel_id].de_sig, false, false);
gpio_reserve_mask |= (1ULL << panel_config->de_gpio_num);
}
// disp enable GPIO is optional, it is a general purpose output GPIO
if (GPIO_IS_VALID_OUTPUT_GPIO(panel_config->disp_gpio_num)) {
gpio_matrix_output(panel_config->disp_gpio_num,
lcd_periph_rgb_signals.panels[panel_id].disp_sig, false, false);
soc_lcd_rgb_signals[panel_id].disp_sig, false, false);
gpio_reserve_mask |= (1ULL << panel_config->disp_gpio_num);
}
components/esp_lcd/rgb/include/esp_lcd_panel_rgb.h
+3 -1
View File
@@ -11,6 +11,8 @@
#include "esp_lcd_types.h"
#include "soc/soc_caps.h"
#define ESP_LCD_RGB_BUS_WIDTH_MAX 24
#ifdef __cplusplus
extern "C" {
#endif
@@ -148,7 +150,7 @@ typedef struct {
gpio_num_t de_gpio_num; /*!< GPIO used for DE signal, set to -1 if it's not used */
gpio_num_t pclk_gpio_num; /*!< GPIO used for PCLK signal, set to -1 if it's not used */
gpio_num_t disp_gpio_num; /*!< GPIO used for display control signal, set to -1 if it's not used */
gpio_num_t data_gpio_nums[SOC_LCDCAM_RGB_DATA_WIDTH]; /*!< GPIOs used for data lines */
gpio_num_t data_gpio_nums[ESP_LCD_RGB_BUS_WIDTH_MAX]; /*!< GPIOs used for data lines */
struct {
uint32_t disp_active_low: 1; /*!< If this flag is enabled, a low level of display control signal can turn the screen on; vice versa */
uint32_t refresh_on_demand: 1; /*!< If this flag is enabled, the host only refresh the frame buffer in `esp_lcd_panel_draw_bitmap` and `esp_lcd_rgb_panel_refresh`. */
components/esp_lcd/src/esp_lcd_common.c
+6 -6
View File
@@ -7,15 +7,15 @@
#include "freertos/FreeRTOS.h"
#include "soc/soc_caps.h"
#include "esp_lcd_common.h"
#if SOC_LCDCAM_SUPPORTED
#if SOC_HAS(LCDCAM_I80_LCD) || SOC_HAS(LCDCAM_RGB_LCD)
#include "hal/lcd_ll.h"
#include "hal/lcd_hal.h"
typedef struct esp_lcd_platform_t {
portMUX_TYPE spinlock; // spinlock used to protect platform level resources
union {
void *panels[SOC_LCDCAM_RGB_NUM_PANELS]; // array of RGB LCD panel instances
void *buses[SOC_LCDCAM_I80_NUM_BUSES]; // array of i80 bus instances
void *panels[LCD_LL_GET(RGB_PANEL_NUM)]; // array of RGB LCD panel instances
void *buses[LCD_LL_GET(I80_BUS_NUM)]; // array of i80 bus instances
}; // LCD peripheral can only work under either RGB mode or intel 8080 mode
} esp_lcd_platform_t;
@@ -30,7 +30,7 @@ int lcd_com_register_device(lcd_com_device_type_t device_type, void *device_obj)
switch (device_type) {
case LCD_COM_DEVICE_TYPE_I80:
// search for a bus slot then register to platform
for (int i = 0; (i < SOC_LCDCAM_I80_NUM_BUSES) && (member_id == -1); i++) {
for (int i = 0; (i < LCD_LL_GET(I80_BUS_NUM)) && (member_id == -1); i++) {
portENTER_CRITICAL(&s_lcd_platform.spinlock);
if (!s_lcd_platform.buses[i]) {
s_lcd_platform.buses[i] = device_obj;
@@ -41,7 +41,7 @@ int lcd_com_register_device(lcd_com_device_type_t device_type, void *device_obj)
break;
case LCD_COM_DEVICE_TYPE_RGB:
// search for a panel slot then register to platform
for (int i = 0; (i < SOC_LCDCAM_RGB_NUM_PANELS) && (member_id == -1); i++) {
for (int i = 0; (i < LCD_LL_GET(RGB_PANEL_NUM)) && (member_id == -1); i++) {
portENTER_CRITICAL(&s_lcd_platform.spinlock);
if (!s_lcd_platform.panels[i]) {
s_lcd_platform.panels[i] = device_obj;
@@ -77,4 +77,4 @@ void lcd_com_remove_device(lcd_com_device_type_t device_type, int member_id)
break;
}
}
#endif // SOC_LCDCAM_SUPPORTED
#endif // SOC_HAS(LCDCAM_I80_LCD) || SOC_HAS(LCDCAM_RGB_LCD)
components/esp_lcd/test_apps/.build-test-rules.yml
+1 -1
View File
@@ -33,7 +33,7 @@ components/esp_lcd/test_apps/parlio_lcd:
- esp_lcd
- esp_driver_parlio
disable:
- if: SOC_PARLIO_SUPPORT_SPI_LCD != 1
- if: SOC_PARLIO_LCD_SUPPORTED != 1
components/esp_lcd/test_apps/rgb_lcd:
depends_components:
components/esp_lcd/test_apps/i80_lcd/main/test_i80_lcd_panel.c
+10 -7
View File
@@ -19,8 +19,9 @@
#include "driver/gpio.h"
#include "test_i80_board.h"
#if SOC_I2S_SUPPORTS_LCD_CAMERA
#if SOC_HAS(I2S_I80_LCD)
#include "driver/i2s_std.h"
#include "hal/i2s_ll.h"
TEST_CASE("i80_and_i2s_driver_co-existence", "[lcd][i2s]")
{
@@ -50,9 +51,11 @@ TEST_CASE("i80_and_i2s_driver_co-existence", "[lcd][i2s]")
TEST_ASSERT_EQUAL(ESP_ERR_NOT_FOUND, i2s_new_channel(&chan_cfg, &tx_handle, NULL));
TEST_ESP_OK(esp_lcd_del_i80_bus(i80_bus));
}
#endif // SOC_I2S_SUPPORTS_LCD_CAMERA
#endif // SOC_HAS(I2S_I80_LCD)
#if SOC_LCDCAM_I80_LCD_SUPPORTED
#include "hal/lcd_ll.h"
TEST_CASE("lcd_i80_device_swap_color_bytes", "[lcd]")
{
esp_lcd_i80_bus_handle_t i80_bus = NULL;
@@ -178,10 +181,10 @@ TEST_CASE("lcd_i80_device_clock_mode", "[lcd]")
TEST_CASE("lcd_i80_bus_and_device_allocation", "[lcd]")
{
#if SOC_I2S_SUPPORTS_LCD_CAMERA
#define TEST_NUM_LCD_I80_BUSES SOC_LCD_I80_BUSES
#elif SOC_LCDCAM_I80_LCD_SUPPORTED
#define TEST_NUM_LCD_I80_BUSES SOC_LCDCAM_I80_NUM_BUSES
#if SOC_HAS(I2S_I80_LCD)
#define TEST_NUM_LCD_I80_BUSES I2S_LL_GET(INST_NUM)
#elif SOC_HAS(LCDCAM_I80_LCD)
#define TEST_NUM_LCD_I80_BUSES LCD_LL_GET(I80_BUS_NUM)
#endif
esp_lcd_i80_bus_handle_t i80_buses[TEST_NUM_LCD_I80_BUSES] = {};
esp_lcd_i80_bus_config_t bus_config = {
@@ -461,7 +464,7 @@ TEST_CASE("lcd_panel_with_i80_interface_(st7789, 8bits)", "[lcd]")
}
// TODO: support the test on I2S LCD (IDF-7202)
#if !SOC_I2S_SUPPORTS_LCD_CAMERA
#if !SOC_HAS(I2S_I80_LCD)
TEST_CASE("i80_lcd_send_colors_to_fixed_region", "[lcd]")
{
int x_start = 100;
components/esp_lcd/test_apps/rgb_lcd/main/CMakeLists.txt
+2 -5
View File
@@ -1,9 +1,6 @@
set(srcs "test_app_main.c"
"test_rgb_panel.c")
if(CONFIG_SOC_LCD_SUPPORT_RGB_YUV_CONV)
list(APPEND srcs "test_yuv_rgb_conv.c")
endif()
"test_rgb_panel.c"
"test_yuv_rgb_conv.c")
# In order for the cases defined by `TEST_CASE` to be linked into the final elf,
# the component can be registered as WHOLE_ARCHIVE
components/esp_system/CMakeLists.txt
+1
View File
@@ -80,6 +80,7 @@ else()
# IDF-13980
esp_hal_i2c
esp_hal_wdt
esp_hal_lcd
LDFRAGMENTS "linker.lf" "app.lf")
add_subdirectory(port)
components/hal/CMakeLists.txt
-8
View File
@@ -148,14 +148,6 @@ elseif(NOT BOOTLOADER_BUILD)
endif()
endif()
if(CONFIG_SOC_LCDCAM_SUPPORTED)
list(APPEND srcs "lcd_hal.c")
endif()
if(CONFIG_SOC_MIPI_DSI_SUPPORTED)
list(APPEND srcs "mipi_dsi_hal.c")
endif()
if(CONFIG_SOC_MIPI_CSI_SUPPORTED)
list(APPEND srcs "mipi_csi_hal.c")
endif()
components/hal/esp32/include/hal/i2s_ll.h
+11 -12
View File
@@ -22,6 +22,11 @@
#include "hal/i2s_types.h"
#include "hal/hal_utils.h"
#define I2S_LL_GET(_attr) I2S_LL_ ## _attr
#define I2S_LL_BUS_WIDTH 24
#define I2S_LL_INST_NUM 2
#define I2S_LL_TRANS_SIZE_ALIGN_WORD 1 // I2S DMA transfer size must be aligned to word
#define I2S_LL_ADC_DAC_CAPABLE 1 // I2S supports to connect to ADC / DAC converters
#ifdef __cplusplus
extern "C" {
@@ -761,8 +766,7 @@ static inline void i2s_ll_rx_enable_msb_shift(i2s_dev_t *hw, bool msb_shift_enab
static inline void i2s_ll_tx_select_pdm_slot(i2s_dev_t *hw, i2s_pdm_slot_mask_t slot_mask, bool is_mono)
{
if (is_mono) {
switch (slot_mask)
{
switch (slot_mask) {
case I2S_PDM_SLOT_RIGHT:
hw->conf_chan.tx_chan_mod = 3;
break;
@@ -776,8 +780,7 @@ static inline void i2s_ll_tx_select_pdm_slot(i2s_dev_t *hw, i2s_pdm_slot_mask_t
break;
}
} else {
switch (slot_mask)
{
switch (slot_mask) {
case I2S_PDM_SLOT_RIGHT:
hw->conf_chan.tx_chan_mod = 1;
break;
@@ -799,8 +802,7 @@ static inline void i2s_ll_tx_select_pdm_slot(i2s_dev_t *hw, i2s_pdm_slot_mask_t
*/
static inline void i2s_ll_rx_select_pdm_slot(i2s_dev_t *hw, i2s_pdm_slot_mask_t slot_mask)
{
switch (slot_mask)
{
switch (slot_mask) {
case I2S_PDM_SLOT_RIGHT:
hw->conf_chan.rx_chan_mod = 1;
break;
@@ -825,8 +827,7 @@ static inline void i2s_ll_rx_select_pdm_slot(i2s_dev_t *hw, i2s_pdm_slot_mask_t
static inline void i2s_ll_tx_select_std_slot(i2s_dev_t *hw, i2s_std_slot_mask_t slot_mask, bool is_mono)
{
if (is_mono) {
switch (slot_mask)
{
switch (slot_mask) {
case I2S_STD_SLOT_RIGHT:
hw->conf_chan.tx_chan_mod = 3;
break;
@@ -840,8 +841,7 @@ static inline void i2s_ll_tx_select_std_slot(i2s_dev_t *hw, i2s_std_slot_mask_t
break;
}
} else {
switch (slot_mask)
{
switch (slot_mask) {
case I2S_STD_SLOT_RIGHT:
hw->conf_chan.tx_chan_mod = 1;
break;
@@ -866,8 +866,7 @@ static inline void i2s_ll_tx_select_std_slot(i2s_dev_t *hw, i2s_std_slot_mask_t
*/
static inline void i2s_ll_rx_select_std_slot(i2s_dev_t *hw, i2s_std_slot_mask_t slot_mask, bool is_msb_right)
{
switch (slot_mask)
{
switch (slot_mask) {
case I2S_STD_SLOT_RIGHT:
hw->conf_chan.rx_chan_mod = is_msb_right ? 1 : 2;
break;
components/hal/esp32c3/include/hal/i2s_ll.h
+1
View File
@@ -21,6 +21,7 @@
#include "hal/i2s_types.h"
#include "hal/hal_utils.h"
#define I2S_LL_GET(_attr) I2S_LL_ ## _attr
#ifdef __cplusplus
extern "C" {
components/hal/esp32c5/include/hal/i2s_ll.h
+1
View File
@@ -23,6 +23,7 @@
#include "hal/i2s_types.h"
#include "hal/hal_utils.h"
#define I2S_LL_GET(_attr) I2S_LL_ ## _attr
#ifdef __cplusplus
extern "C" {
components/hal/esp32c6/include/hal/i2s_ll.h
+1
View File
@@ -22,6 +22,7 @@
#include "hal/i2s_types.h"
#include "hal/hal_utils.h"
#define I2S_LL_GET(_attr) I2S_LL_ ## _attr
#ifdef __cplusplus
extern "C" {
components/hal/esp32c61/include/hal/i2s_ll.h
+1
View File
@@ -23,6 +23,7 @@
#include "hal/i2s_types.h"
#include "hal/hal_utils.h"
#define I2S_LL_GET(_attr) I2S_LL_ ## _attr
#ifdef __cplusplus
extern "C" {
components/hal/esp32h2/include/hal/i2s_ll.h
+1
View File
@@ -22,6 +22,7 @@
#include "hal/i2s_types.h"
#include "hal/hal_utils.h"
#define I2S_LL_GET(_attr) I2S_LL_ ## _attr
#ifdef __cplusplus
extern "C" {
components/hal/esp32h4/include/hal/i2s_ll.h
+1
View File
@@ -23,6 +23,7 @@
#include "hal/i2s_types.h"
#include "hal/hal_utils.h"
#define I2S_LL_GET(_attr) I2S_LL_ ## _attr
#ifdef __cplusplus
extern "C" {
components/hal/esp32p4/include/hal/i2s_ll.h
+1
View File
@@ -25,6 +25,7 @@
#include "hal/hal_utils.h"
#include "hal/config.h"
#define I2S_LL_GET(_attr) I2S_LL_ ## _attr
#ifdef __cplusplus
extern "C" {
components/hal/esp32s2/include/hal/i2s_ll.h
+7 -6
View File
@@ -25,6 +25,10 @@
#include "hal/assert.h"
#define I2S_LL_GET(_attr) I2S_LL_ ## _attr
#define I2S_LL_BUS_WIDTH 24
#define I2S_LL_INST_NUM 1
#ifdef __cplusplus
extern "C" {
#endif
@@ -857,8 +861,7 @@ static inline void i2s_ll_rx_enable_msb_shift(i2s_dev_t *hw, bool msb_shift_enab
static inline void i2s_ll_tx_select_std_slot(i2s_dev_t *hw, i2s_std_slot_mask_t slot_mask, bool is_mono)
{
if (is_mono) {
switch (slot_mask)
{
switch (slot_mask) {
case I2S_STD_SLOT_RIGHT:
hw->conf_chan.tx_chan_mod = 3;
break;
@@ -872,8 +875,7 @@ static inline void i2s_ll_tx_select_std_slot(i2s_dev_t *hw, i2s_std_slot_mask_t
break;
}
} else {
switch (slot_mask)
{
switch (slot_mask) {
case I2S_STD_SLOT_RIGHT:
hw->conf_chan.tx_chan_mod = 1;
break;
@@ -897,8 +899,7 @@ static inline void i2s_ll_tx_select_std_slot(i2s_dev_t *hw, i2s_std_slot_mask_t
*/
static inline void i2s_ll_rx_select_std_slot(i2s_dev_t *hw, i2s_std_slot_mask_t slot_mask, bool is_msb_right)
{
switch (slot_mask)
{
switch (slot_mask) {
case I2S_STD_SLOT_RIGHT:
hw->conf_chan.rx_chan_mod = is_msb_right ? 1 : 2;
break;
components/hal/esp32s3/include/hal/i2s_ll.h
+1
View File
@@ -21,6 +21,7 @@
#include "hal/i2s_types.h"
#include "hal/hal_utils.h"
#define I2S_LL_GET(_attr) I2S_LL_ ## _attr
#ifdef __cplusplus
extern "C" {
components/soc/CMakeLists.txt
-8
View File
@@ -124,14 +124,6 @@ if(CONFIG_SOC_TEMP_SENSOR_SUPPORTED)
list(APPEND srcs "${target_folder}/temperature_sensor_periph.c")
endif()
if(CONFIG_SOC_LCDCAM_SUPPORTED OR CONFIG_SOC_I2S_SUPPORTS_LCD_CAMERA)
list(APPEND srcs "${target_folder}/lcd_periph.c")
endif()
if(CONFIG_SOC_MIPI_DSI_SUPPORTED)
list(APPEND srcs "${target_folder}/mipi_dsi_periph.c")
endif()
if(CONFIG_SOC_MIPI_CSI_SUPPORTED)
list(APPEND srcs "${target_folder}/mipi_csi_periph.c")
endif()
components/soc/esp32/include/soc/Kconfig.soc_caps.in
+8 -16
View File
@@ -87,6 +87,14 @@ config SOC_I2S_SUPPORTED
bool
default y
config SOC_I2S_I80_LCD_SUPPORTED
bool
default y
config SOC_LCD_I80_SUPPORTED
bool
default y
config SOC_RMT_SUPPORTED
bool
default y
@@ -419,22 +427,6 @@ config SOC_I2S_PDM_MAX_RX_LINES
int
default 1
config SOC_I2S_SUPPORTS_LCD_CAMERA
bool
default y
config SOC_LCD_I80_SUPPORTED
bool
default y
config SOC_LCD_I80_BUSES
int
default 2
config SOC_LCD_I80_BUS_WIDTH
int
default 24
config SOC_LEDC_HAS_TIMER_SPECIFIC_MUX
bool
default y
components/soc/esp32/include/soc/soc_caps.h
+2 -7
View File
@@ -87,6 +87,8 @@
#define SOC_RTC_SLOW_MEM_SUPPORTED 1
#define SOC_RTC_MEM_SUPPORTED 1
#define SOC_I2S_SUPPORTED 1
#define SOC_I2S_I80_LCD_SUPPORTED 1
#define SOC_LCD_I80_SUPPORTED 1
#define SOC_RMT_SUPPORTED 1
#define SOC_SDM_SUPPORTED 1
#define SOC_GPSPI_SUPPORTED 1
@@ -226,13 +228,6 @@
#define SOC_I2S_SUPPORTS_PDM2PCM (1) // Support to input PDM format but read PCM format data with the help of PDM to PCM filter
#define SOC_I2S_PDM_MAX_TX_LINES (1U)
#define SOC_I2S_PDM_MAX_RX_LINES (1U)
#define SOC_I2S_SUPPORTS_LCD_CAMERA (1)
/*-------------------------- LCD CAPS ----------------------------------------*/
/* Notes: On esp32, LCD intel 8080 timing is generated by I2S peripheral */
#define SOC_LCD_I80_SUPPORTED (1) /*!< Intel 8080 LCD is supported */
#define SOC_LCD_I80_BUSES (2) /*!< Both I2S0/1 have LCD mode */
#define SOC_LCD_I80_BUS_WIDTH (24) /*!< Intel 8080 bus width */
/*-------------------------- LEDC CAPS ---------------------------------------*/
#define SOC_LEDC_HAS_TIMER_SPECIFIC_MUX (1)
components/soc/esp32/include/soc/soc_caps_full.h
-3
View File
@@ -22,9 +22,6 @@
/*------------------------------- I2S ---------------------------------------*/
// helper macros to access module attributes
#define _SOC_CAPS_I2S_INST_NUM 2 // Number of I2S instances
#define _SOC_CAPS_I2S_MAX_DATA_WIDTH 24 // Maximum data line width of I2S
#define _SOC_CAPS_I2S_TRANS_SIZE_ALIGN_WORD 1 // I2S DMA transfer size must be aligned to word
#define _SOC_CAPS_I2S_SUPPORT_ADC_DAC 1 // I2S supports to connect to ADC / DAC converters
/*------------------------------- Touch Sensor ------------------------------------*/
#define _SOC_CAPS_TOUCH_CHAN_NUM 10 // Number of touch sensor channels
components/soc/esp32/lcd_periph.c
-74
View File
@@ -1,74 +0,0 @@
/*
* SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "soc/soc.h"
#include "soc/lcd_periph.h"
#include "soc/gpio_sig_map.h"
const lcd_i2s_signal_conn_t lcd_periph_i2s_signals = {
.buses = {
[0] = {
.irq_id = ETS_I2S0_INTR_SOURCE,
.data_sigs = {
I2S0O_DATA_OUT0_IDX,
I2S0O_DATA_OUT1_IDX,
I2S0O_DATA_OUT2_IDX,
I2S0O_DATA_OUT3_IDX,
I2S0O_DATA_OUT4_IDX,
I2S0O_DATA_OUT5_IDX,
I2S0O_DATA_OUT6_IDX,
I2S0O_DATA_OUT7_IDX,
I2S0O_DATA_OUT8_IDX,
I2S0O_DATA_OUT9_IDX,
I2S0O_DATA_OUT10_IDX,
I2S0O_DATA_OUT11_IDX,
I2S0O_DATA_OUT12_IDX,
I2S0O_DATA_OUT13_IDX,
I2S0O_DATA_OUT14_IDX,
I2S0O_DATA_OUT15_IDX,
I2S0O_DATA_OUT16_IDX,
I2S0O_DATA_OUT17_IDX,
I2S0O_DATA_OUT18_IDX,
I2S0O_DATA_OUT19_IDX,
I2S0O_DATA_OUT20_IDX,
I2S0O_DATA_OUT21_IDX,
I2S0O_DATA_OUT22_IDX,
I2S0O_DATA_OUT23_IDX,
},
.wr_sig = I2S0O_WS_OUT_IDX,
},
[1] = {
.irq_id = ETS_I2S1_INTR_SOURCE,
.data_sigs = {
I2S1O_DATA_OUT0_IDX,
I2S1O_DATA_OUT1_IDX,
I2S1O_DATA_OUT2_IDX,
I2S1O_DATA_OUT3_IDX,
I2S1O_DATA_OUT4_IDX,
I2S1O_DATA_OUT5_IDX,
I2S1O_DATA_OUT6_IDX,
I2S1O_DATA_OUT7_IDX,
I2S1O_DATA_OUT8_IDX,
I2S1O_DATA_OUT9_IDX,
I2S1O_DATA_OUT10_IDX,
I2S1O_DATA_OUT11_IDX,
I2S1O_DATA_OUT12_IDX,
I2S1O_DATA_OUT13_IDX,
I2S1O_DATA_OUT14_IDX,
I2S1O_DATA_OUT15_IDX,
I2S1O_DATA_OUT16_IDX,
I2S1O_DATA_OUT17_IDX,
I2S1O_DATA_OUT18_IDX,
I2S1O_DATA_OUT19_IDX,
I2S1O_DATA_OUT20_IDX,
I2S1O_DATA_OUT21_IDX,
I2S1O_DATA_OUT22_IDX,
I2S1O_DATA_OUT23_IDX,
},
.wr_sig = I2S1O_WS_OUT_IDX,
}
}
};
components/soc/esp32c5/include/soc/Kconfig.soc_caps.in
+4 -4
View File
@@ -55,6 +55,10 @@ config SOC_PARLIO_SUPPORTED
bool
default y
config SOC_PARLIO_LCD_SUPPORTED
bool
default y
config SOC_ASYNC_MEMCPY_SUPPORTED
bool
default y
@@ -971,10 +975,6 @@ config SOC_PARLIO_SUPPORT_SLEEP_RETENTION
bool
default y
config SOC_PARLIO_SUPPORT_SPI_LCD
bool
default y
config SOC_PARLIO_SUPPORT_I80_LCD
bool
default y
components/soc/esp32c5/include/soc/soc_caps.h
+1 -1
View File
@@ -36,6 +36,7 @@
#define SOC_TWAI_SUPPORTED 1
#define SOC_ETM_SUPPORTED 1
#define SOC_PARLIO_SUPPORTED 1
#define SOC_PARLIO_LCD_SUPPORTED 1
#define SOC_ASYNC_MEMCPY_SUPPORTED 1
#define SOC_USB_SERIAL_JTAG_SUPPORTED 1
#define SOC_TEMP_SENSOR_SUPPORTED 1
@@ -383,7 +384,6 @@
#define SOC_PARLIO_TX_SUPPORT_LOOP_TRANSMISSION 1 /*!< Support loop transmission */
#define SOC_PARLIO_TX_SUPPORT_EOF_FROM_DMA 1 /*!< Support to treat DMA EOF as TX unit EOF */
#define SOC_PARLIO_SUPPORT_SLEEP_RETENTION 1 /*!< Support back up registers before sleep */
#define SOC_PARLIO_SUPPORT_SPI_LCD 1 /*!< Support to drive SPI interfaced LCD */
#define SOC_PARLIO_SUPPORT_I80_LCD 1 /*!< Support to drive I80 interfaced LCD */
/*--------------------------- MPI CAPS ---------------------------------------*/
components/soc/esp32h2/include/soc/Kconfig.soc_caps.in
+4 -4
View File
@@ -119,6 +119,10 @@ config SOC_PARLIO_SUPPORTED
bool
default y
config SOC_PARLIO_LCD_SUPPORTED
bool
default y
config SOC_GPSPI_SUPPORTED
bool
default y
@@ -899,10 +903,6 @@ config SOC_PARLIO_SUPPORT_SLEEP_RETENTION
bool
default y
config SOC_PARLIO_SUPPORT_SPI_LCD
bool
default y
config SOC_MPI_MEM_BLOCKS_NUM
int
default 4
components/soc/esp32h2/include/soc/soc_caps.h
+1 -1
View File
@@ -68,6 +68,7 @@
#define SOC_ETM_SUPPORTED 1
#define SOC_RMT_SUPPORTED 1
#define SOC_PARLIO_SUPPORTED 1
#define SOC_PARLIO_LCD_SUPPORTED 1
#define SOC_GPSPI_SUPPORTED 1
#define SOC_LEDC_SUPPORTED 1
#define SOC_I2C_SUPPORTED 1
@@ -369,7 +370,6 @@
#define SOC_PARLIO_TRANS_BIT_ALIGN 1 /*!< Support bit alignment in transaction */
#define SOC_PARLIO_TX_SUPPORT_LOOP_TRANSMISSION 1 /*!< Support loop transmission. Note, 1 data-width loop transmission only avliable in chip version above 1.2 */
#define SOC_PARLIO_SUPPORT_SLEEP_RETENTION 1 /*!< Support back up registers before sleep */
#define SOC_PARLIO_SUPPORT_SPI_LCD 1 /*!< Support to drive SPI interfaced LCD */
/*--------------------------- MPI CAPS ---------------------------------------*/
#define SOC_MPI_MEM_BLOCKS_NUM (4)
components/soc/esp32p4/include/soc/Kconfig.soc_caps.in
+12 -36
View File
@@ -51,10 +51,6 @@ config SOC_PCNT_SUPPORTED
bool
default y
config SOC_LCDCAM_SUPPORTED
bool
default y
config SOC_LCDCAM_CAM_SUPPORTED
bool
default y
@@ -67,6 +63,14 @@ config SOC_LCDCAM_RGB_LCD_SUPPORTED
bool
default y
config SOC_LCD_I80_SUPPORTED
bool
default y
config SOC_LCD_RGB_SUPPORTED
bool
default y
config SOC_MIPI_CSI_SUPPORTED
bool
default y
@@ -91,6 +95,10 @@ config SOC_PARLIO_SUPPORTED
bool
default y
config SOC_PARLIO_LCD_SUPPORTED
bool
default y
config SOC_ASYNC_MEMCPY_SUPPORTED
bool
default y
@@ -1191,34 +1199,6 @@ config SOC_RMT_SUPPORT_SLEEP_RETENTION
bool
default y
config SOC_LCD_I80_SUPPORTED
bool
default y
config SOC_LCD_RGB_SUPPORTED
bool
default y
config SOC_LCDCAM_I80_NUM_BUSES
int
default 1
config SOC_LCDCAM_I80_BUS_WIDTH
int
default 24
config SOC_LCDCAM_RGB_NUM_PANELS
int
default 1
config SOC_LCDCAM_RGB_DATA_WIDTH
int
default 24
config SOC_LCD_SUPPORT_RGB_YUV_CONV
bool
default y
config SOC_MCPWM_GROUPS
int
default 2
@@ -1339,10 +1319,6 @@ config SOC_PARLIO_SUPPORT_SLEEP_RETENTION
bool
default y
config SOC_PARLIO_SUPPORT_SPI_LCD
bool
default y
config SOC_PARLIO_SUPPORT_I80_LCD
bool
default y
components/soc/esp32p4/include/soc/soc_caps.h
+6 -15
View File
@@ -35,16 +35,18 @@
#define SOC_DMA2D_SUPPORTED 1
#define SOC_GPTIMER_SUPPORTED 1
#define SOC_PCNT_SUPPORTED 1
#define SOC_LCDCAM_SUPPORTED 1
#define SOC_LCDCAM_CAM_SUPPORTED 1 // support the camera driver based on the LCD_CAM peripheral
#define SOC_LCDCAM_I80_LCD_SUPPORTED 1 // support the Intel 8080 bus driver based on the LCD_CAM peripheral
#define SOC_LCDCAM_RGB_LCD_SUPPORTED 1 // support the RGB LCD driver based on the LCD_CAM peripheral
#define SOC_LCDCAM_CAM_SUPPORTED 1
#define SOC_LCDCAM_I80_LCD_SUPPORTED 1
#define SOC_LCDCAM_RGB_LCD_SUPPORTED 1
#define SOC_LCD_I80_SUPPORTED 1
#define SOC_LCD_RGB_SUPPORTED 1
#define SOC_MIPI_CSI_SUPPORTED 1
#define SOC_MIPI_DSI_SUPPORTED 1
#define SOC_MCPWM_SUPPORTED 1
#define SOC_TWAI_SUPPORTED 1
#define SOC_ETM_SUPPORTED 1
#define SOC_PARLIO_SUPPORTED 1
#define SOC_PARLIO_LCD_SUPPORTED 1
#define SOC_ASYNC_MEMCPY_SUPPORTED 1
#define SOC_EMAC_SUPPORTED 1
#define SOC_USB_OTG_SUPPORTED 1
@@ -433,16 +435,6 @@
#define SOC_RMT_SUPPORT_DMA 1 /*!< RMT peripheral can connect to DMA channel */
#define SOC_RMT_SUPPORT_SLEEP_RETENTION 1 /*!< The sleep retention feature can help back up RMT registers before sleep */
/*-------------------------- LCD CAPS ----------------------------------------*/
/* I80 bus and RGB timing generator can't work at the same time in the LCD_CAM peripheral */
#define SOC_LCD_I80_SUPPORTED 1 /*!< support intel 8080 driver */
#define SOC_LCD_RGB_SUPPORTED 1 /*!< RGB LCD is supported */
#define SOC_LCDCAM_I80_NUM_BUSES 1U /*!< LCD_CAM peripheral provides one LCD Intel 8080 bus */
#define SOC_LCDCAM_I80_BUS_WIDTH 24 /*!< Intel 8080 bus max data width */
#define SOC_LCDCAM_RGB_NUM_PANELS 1U /*!< Support one RGB LCD panel */
#define SOC_LCDCAM_RGB_DATA_WIDTH 24 /*!< Number of LCD data lines */
#define SOC_LCD_SUPPORT_RGB_YUV_CONV 1 /*!< Support color format conversion between RGB and YUV */
/*-------------------------- MCPWM CAPS --------------------------------------*/
#define SOC_MCPWM_GROUPS (2U) ///< 2 MCPWM groups on the chip (i.e., the number of independent MCPWM peripherals)
#define SOC_MCPWM_TIMERS_PER_GROUP (3) ///< The number of timers that each group has
@@ -484,7 +476,6 @@
#define SOC_PARLIO_TRANS_BIT_ALIGN 1 /*!< Support bit alignment in transaction */
#define SOC_PARLIO_TX_SUPPORT_LOOP_TRANSMISSION 1 /*!< Support loop transmission */
#define SOC_PARLIO_SUPPORT_SLEEP_RETENTION 1 /*!< Support back up registers before sleep */
#define SOC_PARLIO_SUPPORT_SPI_LCD 1 /*!< Support to drive SPI interfaced LCD */
#define SOC_PARLIO_SUPPORT_I80_LCD 1 /*!< Support to drive I80 interfaced LCD */
/*--------------------------- MPI CAPS ---------------------------------------*/
components/soc/esp32p4/include/soc/soc_caps_full.h
-3
View File
@@ -27,9 +27,6 @@
#define _SOC_CAPS_ETM_INST_NUM 1 // Number of ETM instances
#define _SOC_CAPS_ETM_CHANS_PER_INST 50 // Number of channels in each ETM instance
/*--------------------------- MIPI DSI -------------------------------------------*/
#define _SOC_CAPS_MIPI_DSI_INST_NUM 1 // Number of MIPI DSI instances
/*------------------------------- I2S ---------------------------------------*/
// helper macros to access module attributes
#define _SOC_CAPS_I2S_INST_NUM 3 // Number of I2S instances
components/soc/esp32p4/lcd_periph.c
-90
View File
@@ -1,90 +0,0 @@
/*
* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "soc/lcd_periph.h"
#include "soc/gpio_sig_map.h"
#if SOC_LCDCAM_I80_LCD_SUPPORTED
const lcd_i80_signal_conn_t lcd_periph_i80_signals = {
.buses = {
[0] = {
.module = PERIPH_LCD_CAM_MODULE,
.irq_id = ETS_LCD_CAM_INTR_SOURCE,
.data_sigs = {
LCD_DATA_OUT_PAD_OUT0_IDX,
LCD_DATA_OUT_PAD_OUT1_IDX,
LCD_DATA_OUT_PAD_OUT2_IDX,
LCD_DATA_OUT_PAD_OUT3_IDX,
LCD_DATA_OUT_PAD_OUT4_IDX,
LCD_DATA_OUT_PAD_OUT5_IDX,
LCD_DATA_OUT_PAD_OUT6_IDX,
LCD_DATA_OUT_PAD_OUT7_IDX,
LCD_DATA_OUT_PAD_OUT8_IDX,
LCD_DATA_OUT_PAD_OUT9_IDX,
LCD_DATA_OUT_PAD_OUT10_IDX,
LCD_DATA_OUT_PAD_OUT11_IDX,
LCD_DATA_OUT_PAD_OUT12_IDX,
LCD_DATA_OUT_PAD_OUT13_IDX,
LCD_DATA_OUT_PAD_OUT14_IDX,
LCD_DATA_OUT_PAD_OUT15_IDX,
LCD_DATA_OUT_PAD_OUT16_IDX,
LCD_DATA_OUT_PAD_OUT17_IDX,
LCD_DATA_OUT_PAD_OUT18_IDX,
LCD_DATA_OUT_PAD_OUT19_IDX,
LCD_DATA_OUT_PAD_OUT20_IDX,
LCD_DATA_OUT_PAD_OUT21_IDX,
LCD_DATA_OUT_PAD_OUT22_IDX,
LCD_DATA_OUT_PAD_OUT23_IDX,
},
.cs_sig = LCD_CS_PAD_OUT_IDX,
.dc_sig = LCD_DC_PAD_OUT_IDX,
.wr_sig = LCD_PCLK_PAD_OUT_IDX
}
}
};
#endif // SOC_LCDCAM_I80_LCD_SUPPORTED
#if SOC_LCDCAM_RGB_LCD_SUPPORTED
const lcd_rgb_signal_conn_t lcd_periph_rgb_signals = {
.panels = {
[0] = {
.module = PERIPH_LCD_CAM_MODULE,
.irq_id = ETS_LCD_CAM_INTR_SOURCE,
.data_sigs = {
LCD_DATA_OUT_PAD_OUT0_IDX,
LCD_DATA_OUT_PAD_OUT1_IDX,
LCD_DATA_OUT_PAD_OUT2_IDX,
LCD_DATA_OUT_PAD_OUT3_IDX,
LCD_DATA_OUT_PAD_OUT4_IDX,
LCD_DATA_OUT_PAD_OUT5_IDX,
LCD_DATA_OUT_PAD_OUT6_IDX,
LCD_DATA_OUT_PAD_OUT7_IDX,
LCD_DATA_OUT_PAD_OUT8_IDX,
LCD_DATA_OUT_PAD_OUT9_IDX,
LCD_DATA_OUT_PAD_OUT10_IDX,
LCD_DATA_OUT_PAD_OUT11_IDX,
LCD_DATA_OUT_PAD_OUT12_IDX,
LCD_DATA_OUT_PAD_OUT13_IDX,
LCD_DATA_OUT_PAD_OUT14_IDX,
LCD_DATA_OUT_PAD_OUT15_IDX,
LCD_DATA_OUT_PAD_OUT16_IDX,
LCD_DATA_OUT_PAD_OUT17_IDX,
LCD_DATA_OUT_PAD_OUT18_IDX,
LCD_DATA_OUT_PAD_OUT19_IDX,
LCD_DATA_OUT_PAD_OUT20_IDX,
LCD_DATA_OUT_PAD_OUT21_IDX,
LCD_DATA_OUT_PAD_OUT22_IDX,
LCD_DATA_OUT_PAD_OUT23_IDX,
},
.hsync_sig = LCD_H_SYNC_PAD_OUT_IDX,
.vsync_sig = LCD_V_SYNC_PAD_OUT_IDX,
.pclk_sig = LCD_PCLK_PAD_OUT_IDX,
.de_sig = LCD_H_ENABLE_PAD_OUT_IDX,
.disp_sig = SIG_GPIO_OUT_IDX,
}
}
};
#endif // SOC_LCDCAM_RGB_LCD_SUPPORTED
components/soc/esp32s2/include/soc/Kconfig.soc_caps.in
+8 -16
View File
@@ -111,6 +111,14 @@ config SOC_I2S_SUPPORTED
bool
default y
config SOC_I2S_I80_LCD_SUPPORTED
bool
default y
config SOC_LCD_I80_SUPPORTED
bool
default y
config SOC_RMT_SUPPORTED
bool
default y
@@ -459,22 +467,6 @@ config SOC_I2S_SUPPORTS_APLL
bool
default y
config SOC_I2S_SUPPORTS_LCD_CAMERA
bool
default y
config SOC_LCD_I80_SUPPORTED
bool
default y
config SOC_LCD_I80_BUSES
int
default 1
config SOC_LCD_I80_BUS_WIDTH
int
default 24
config SOC_LEDC_HAS_TIMER_SPECIFIC_MUX
bool
default y
components/soc/esp32s2/include/soc/soc_caps.h
+2 -7
View File
@@ -70,6 +70,8 @@
#define SOC_PSRAM_DMA_CAPABLE 1
#define SOC_XT_WDT_SUPPORTED 1
#define SOC_I2S_SUPPORTED 1
#define SOC_I2S_I80_LCD_SUPPORTED 1
#define SOC_LCD_I80_SUPPORTED 1
#define SOC_RMT_SUPPORTED 1
#define SOC_SDM_SUPPORTED 1
#define SOC_GPSPI_SUPPORTED 1
@@ -215,13 +217,6 @@
// ESP32-S2 has 1 I2S
#define SOC_I2S_HW_VERSION_1 (1)
#define SOC_I2S_SUPPORTS_APLL (1)
#define SOC_I2S_SUPPORTS_LCD_CAMERA (1)
/*-------------------------- LCD CAPS ----------------------------------------*/
/* Notes: On esp32-s2, LCD intel 8080 timing is generated by I2S peripheral */
#define SOC_LCD_I80_SUPPORTED (1) /*!< Intel 8080 LCD is supported */
#define SOC_LCD_I80_BUSES (1U) /*!< Only I2S0 has LCD mode */
#define SOC_LCD_I80_BUS_WIDTH (24) /*!< Intel 8080 bus width */
/*-------------------------- LEDC CAPS ---------------------------------------*/
#define SOC_LEDC_HAS_TIMER_SPECIFIC_MUX (1)
components/soc/esp32s2/include/soc/soc_caps_full.h
-2
View File
@@ -26,8 +26,6 @@
/*------------------------------- I2S ---------------------------------------*/
// helper macros to access module attributes
#define _SOC_CAPS_I2S_INST_NUM 1 // Number of I2S instances
#define _SOC_CAPS_I2S_MAX_DATA_WIDTH 24
#define _SOC_CAPS_I2S_SUPPORT_DMA_EQUAL 1
/*------------------------------- Touch Sensor ------------------------------------*/
#define _SOC_CAPS_TOUCH_CHAN_NUM 15 // Number of touch sensor channels
components/soc/esp32s2/lcd_periph.c
-43
View File
@@ -1,43 +0,0 @@
/*
* SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "soc/lcd_periph.h"
#include "soc/gpio_sig_map.h"
const lcd_i2s_signal_conn_t lcd_periph_i2s_signals = {
.buses = {
[0] = {
.irq_id = ETS_I2S0_INTR_SOURCE,
.data_sigs = {
I2S0O_DATA_OUT0_IDX,
I2S0O_DATA_OUT1_IDX,
I2S0O_DATA_OUT2_IDX,
I2S0O_DATA_OUT3_IDX,
I2S0O_DATA_OUT4_IDX,
I2S0O_DATA_OUT5_IDX,
I2S0O_DATA_OUT6_IDX,
I2S0O_DATA_OUT7_IDX,
I2S0O_DATA_OUT8_IDX,
I2S0O_DATA_OUT9_IDX,
I2S0O_DATA_OUT10_IDX,
I2S0O_DATA_OUT11_IDX,
I2S0O_DATA_OUT12_IDX,
I2S0O_DATA_OUT13_IDX,
I2S0O_DATA_OUT14_IDX,
I2S0O_DATA_OUT15_IDX,
I2S0O_DATA_OUT16_IDX,
I2S0O_DATA_OUT17_IDX,
I2S0O_DATA_OUT18_IDX,
I2S0O_DATA_OUT19_IDX,
I2S0O_DATA_OUT20_IDX,
I2S0O_DATA_OUT21_IDX,
I2S0O_DATA_OUT22_IDX,
I2S0O_DATA_OUT23_IDX,
},
.wr_sig = I2S0O_WS_OUT_IDX,
}
}
};
components/soc/esp32s3/include/soc/Kconfig.soc_caps.in
+8 -48
View File
@@ -43,10 +43,6 @@ config SOC_GPTIMER_SUPPORTED
bool
default y
config SOC_LCDCAM_SUPPORTED
bool
default y
config SOC_LCDCAM_CAM_SUPPORTED
bool
default y
@@ -59,6 +55,14 @@ config SOC_LCDCAM_RGB_LCD_SUPPORTED
bool
default y
config SOC_LCD_I80_SUPPORTED
bool
default y
config SOC_LCD_RGB_SUPPORTED
bool
default y
config SOC_MCPWM_SUPPORTED
bool
default y
@@ -727,50 +731,6 @@ config SOC_RMT_SUPPORT_DMA
bool
default y
config SOC_LCD_I80_SUPPORTED
bool
default y
config SOC_LCD_RGB_SUPPORTED
bool
default y
config SOC_LCD_I80_BUSES
int
default 1
config SOC_LCD_RGB_PANELS
int
default 1
config SOC_LCD_I80_BUS_WIDTH
int
default 16
config SOC_LCD_RGB_DATA_WIDTH
int
default 16
config SOC_LCD_SUPPORT_RGB_YUV_CONV
bool
default y
config SOC_LCDCAM_I80_NUM_BUSES
int
default 1
config SOC_LCDCAM_I80_BUS_WIDTH
int
default 16
config SOC_LCDCAM_RGB_NUM_PANELS
int
default 1
config SOC_LCDCAM_RGB_DATA_WIDTH
int
default 16
config SOC_RTC_CNTL_CPU_PD_DMA_BUS_WIDTH
int
default 128
components/soc/esp32s3/include/soc/soc_caps.h
+3 -16
View File
@@ -38,10 +38,11 @@
#define SOC_UHCI_SUPPORTED 1
#define SOC_AHB_GDMA_SUPPORTED 1
#define SOC_GPTIMER_SUPPORTED 1
#define SOC_LCDCAM_SUPPORTED 1
#define SOC_LCDCAM_CAM_SUPPORTED 1 // support the camera driver based on the LCD_CAM peripheral
#define SOC_LCDCAM_CAM_SUPPORTED 1
#define SOC_LCDCAM_I80_LCD_SUPPORTED 1
#define SOC_LCDCAM_RGB_LCD_SUPPORTED 1
#define SOC_LCD_I80_SUPPORTED 1
#define SOC_LCD_RGB_SUPPORTED 1
#define SOC_MCPWM_SUPPORTED 1
#define SOC_DEDICATED_GPIO_SUPPORTED 1
#define SOC_CACHE_SUPPORT_WRAP 1
@@ -286,20 +287,6 @@
#define SOC_RMT_SUPPORT_APB 1 /*!< Support set APB as the RMT clock source */
#define SOC_RMT_SUPPORT_DMA 1 /*!< RMT peripheral can connect to DMA channel */
/*-------------------------- LCD CAPS ----------------------------------------*/
/* Notes: On esp32-s3, I80 bus and RGB timing generator can't work at the same time */
#define SOC_LCD_I80_SUPPORTED (1) /*!< Intel 8080 LCD is supported */
#define SOC_LCD_RGB_SUPPORTED (1) /*!< RGB LCD is supported */
#define SOC_LCD_I80_BUSES (1U) /*!< Has one LCD Intel 8080 bus */
#define SOC_LCD_RGB_PANELS (1U) /*!< Support one RGB LCD panel */
#define SOC_LCD_I80_BUS_WIDTH (16) /*!< Intel 8080 bus width */
#define SOC_LCD_RGB_DATA_WIDTH (16) /*!< Number of LCD data lines */
#define SOC_LCD_SUPPORT_RGB_YUV_CONV (1) /*!< Support color format conversion between RGB and YUV */
#define SOC_LCDCAM_I80_NUM_BUSES (1U) /*!< LCD_CAM peripheral provides one LCD Intel 8080 bus */
#define SOC_LCDCAM_I80_BUS_WIDTH (16) /*!< Intel 8080 bus max data width */
#define SOC_LCDCAM_RGB_NUM_PANELS (1U) /*!< LCD_CAM peripheral provides one RGB panel */
#define SOC_LCDCAM_RGB_DATA_WIDTH (16) /*!< RGB panel max data width */
/*-------------------------- RTC CAPS --------------------------------------*/
#define SOC_RTC_CNTL_CPU_PD_DMA_BUS_WIDTH (128)
#define SOC_RTC_CNTL_CPU_PD_REG_FILE_NUM (549)
components/soc/esp32s3/lcd_periph.c
-70
View File
@@ -1,70 +0,0 @@
/*
* SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "soc/lcd_periph.h"
#include "soc/gpio_sig_map.h"
const lcd_i80_signal_conn_t lcd_periph_i80_signals = {
.buses = {
[0] = {
.module = PERIPH_LCD_CAM_MODULE,
.irq_id = ETS_LCD_CAM_INTR_SOURCE,
.data_sigs = {
LCD_DATA_OUT0_IDX,
LCD_DATA_OUT1_IDX,
LCD_DATA_OUT2_IDX,
LCD_DATA_OUT3_IDX,
LCD_DATA_OUT4_IDX,
LCD_DATA_OUT5_IDX,
LCD_DATA_OUT6_IDX,
LCD_DATA_OUT7_IDX,
LCD_DATA_OUT8_IDX,
LCD_DATA_OUT9_IDX,
LCD_DATA_OUT10_IDX,
LCD_DATA_OUT11_IDX,
LCD_DATA_OUT12_IDX,
LCD_DATA_OUT13_IDX,
LCD_DATA_OUT14_IDX,
LCD_DATA_OUT15_IDX,
},
.cs_sig = LCD_CS_IDX,
.dc_sig = LCD_DC_IDX,
.wr_sig = LCD_PCLK_IDX
}
}
};
const lcd_rgb_signal_conn_t lcd_periph_rgb_signals = {
.panels = {
[0] = {
.module = PERIPH_LCD_CAM_MODULE,
.irq_id = ETS_LCD_CAM_INTR_SOURCE,
.data_sigs = {
LCD_DATA_OUT0_IDX,
LCD_DATA_OUT1_IDX,
LCD_DATA_OUT2_IDX,
LCD_DATA_OUT3_IDX,
LCD_DATA_OUT4_IDX,
LCD_DATA_OUT5_IDX,
LCD_DATA_OUT6_IDX,
LCD_DATA_OUT7_IDX,
LCD_DATA_OUT8_IDX,
LCD_DATA_OUT9_IDX,
LCD_DATA_OUT10_IDX,
LCD_DATA_OUT11_IDX,
LCD_DATA_OUT12_IDX,
LCD_DATA_OUT13_IDX,
LCD_DATA_OUT14_IDX,
LCD_DATA_OUT15_IDX,
},
.hsync_sig = LCD_H_SYNC_IDX,
.vsync_sig = LCD_V_SYNC_IDX,
.pclk_sig = LCD_PCLK_IDX,
.de_sig = LCD_H_ENABLE_IDX,
.disp_sig = SIG_GPIO_OUT_IDX,
}
}
};
components/soc/include/soc/lcd_periph.h
-63
View File
@@ -1,63 +0,0 @@
/*
* SPDX-FileCopyrightText: 2021-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
#include "soc/soc_caps.h"
#include "soc/periph_defs.h"
#include "soc/soc_caps_full.h"
#ifdef __cplusplus
extern "C" {
#endif
#if SOC_LCDCAM_I80_LCD_SUPPORTED
typedef struct {
struct {
const shared_periph_module_t module;
const int irq_id;
const int data_sigs[SOC_LCDCAM_I80_BUS_WIDTH];
const int cs_sig;
const int dc_sig;
const int wr_sig;
} buses[SOC_LCDCAM_I80_NUM_BUSES];
} lcd_i80_signal_conn_t;
extern const lcd_i80_signal_conn_t lcd_periph_i80_signals;
#endif // SOC_LCDCAM_I80_LCD_SUPPORTED
#if SOC_LCDCAM_RGB_LCD_SUPPORTED
typedef struct {
struct {
const shared_periph_module_t module;
const int irq_id;
const int data_sigs[SOC_LCDCAM_RGB_DATA_WIDTH];
const int hsync_sig;
const int vsync_sig;
const int pclk_sig;
const int de_sig;
const int disp_sig;
} panels[SOC_LCDCAM_RGB_NUM_PANELS];
} lcd_rgb_signal_conn_t;
extern const lcd_rgb_signal_conn_t lcd_periph_rgb_signals;
#endif // SOC_LCDCAM_RGB_LCD_SUPPORTED
#if SOC_I2S_SUPPORTS_LCD_CAMERA
typedef struct {
struct {
const int irq_id;
const int data_sigs[SOC_MODULE_ATTR(I2S, MAX_DATA_WIDTH)];
const int wr_sig;
} buses[SOC_LCD_I80_BUSES];
} lcd_i2s_signal_conn_t;
extern const lcd_i2s_signal_conn_t lcd_periph_i2s_signals;
#endif // SOC_I2S_SUPPORTS_LCD_CAMERA
#ifdef __cplusplus
}
#endif
docs/conf_common.py
+1 -1
View File
@@ -348,7 +348,7 @@ conditional_include_dict = {
'SOC_DEDICATED_GPIO_SUPPORTED': DEDIC_GPIO_DOCS,
'SOC_LCD_I80_SUPPORTED': I80_LCD_DOCS,
'SOC_LCD_RGB_SUPPORTED': RGB_LCD_DOCS,
'SOC_PARLIO_SUPPORT_SPI_LCD': PARLIO_LCD_DOCS,
'SOC_PARLIO_LCD_SUPPORTED': PARLIO_LCD_DOCS,
'SOC_MIPI_DSI_SUPPORTED': DSI_LCD_DOCS,
'SOC_SPIRAM_SUPPORTED': SPIRAM_DOCS,
'SOC_PARLIO_SUPPORTED': PARLIO_DOCS,
docs/doxygen/Doxyfile
+1 -1
View File
@@ -165,6 +165,7 @@ INPUT = \
$(PROJECT_PATH)/components/esp_event/include/esp_event.h \
$(PROJECT_PATH)/components/esp_hal_timg/include/hal/timer_types.h \
$(PROJECT_PATH)/components/esp_hal_i2c/include/hal/i2c_types.h \
$(PROJECT_PATH)/components/esp_hal_lcd/include/hal/lcd_types.h \
$(PROJECT_PATH)/components/esp_hal_mspi/include/hal/esp_flash_err.h \
$(PROJECT_PATH)/components/esp_hal_mspi/include/hal/spi_flash_types.h \
$(PROJECT_PATH)/components/esp_http_client/include/esp_http_client.h \
@@ -256,7 +257,6 @@ INPUT = \
$(PROJECT_PATH)/components/hal/include/hal/dac_types.h \
$(PROJECT_PATH)/components/hal/include/hal/gpio_types.h \
$(PROJECT_PATH)/components/hal/include/hal/i2s_types.h \
$(PROJECT_PATH)/components/hal/include/hal/lcd_types.h \
$(PROJECT_PATH)/components/hal/include/hal/ledc_types.h \
$(PROJECT_PATH)/components/hal/include/hal/mcpwm_types.h \
$(PROJECT_PATH)/components/hal/include/hal/parlio_types.h \
docs/en/api-reference/peripherals/i2s.rst
+2 -2
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@@ -249,14 +249,14 @@ In standard mode, there are always two sound channels, i.e., the left and right
.. wavedrom:: /../_static/diagrams/i2s/tdm_pcm_long.json
.. only:: SOC_I2S_SUPPORTS_LCD_CAMERA
.. only:: esp32 or esp32s2
LCD/Camera Mode
^^^^^^^^^^^^^^^
LCD/Camera mode is only supported on I2S0 over a parallel bus. For LCD mode, I2S0 should work at master TX mode. For camera mode, I2S0 should work at slave RX mode. These two modes are not implemented by the I2S driver. Please refer to :doc:`/api-reference/peripherals/lcd/i80_lcd` for details about the LCD implementation. For more information, see **{IDF_TARGET_NAME} Technical Reference Manual** > **I2S Controller (I2S)** > LCD Mode [`PDF <{IDF_TARGET_TRM_EN_URL}#camlcdctrl>`__].
.. only:: SOC_I2S_SUPPORTS_ADC_DAC
.. only:: esp32
ADC/DAC Mode
^^^^^^^^^^^^
docs/en/api-reference/peripherals/lcd/index.rst
+2 -2
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@@ -32,7 +32,7 @@ This document will discuss how to create the control plane and data plane, as me
:SOC_LCD_I80_SUPPORTED: i80_lcd
:SOC_LCD_RGB_SUPPORTED: rgb_lcd
:SOC_MIPI_DSI_SUPPORTED: dsi_lcd
:SOC_PARLIO_SUPPORT_SPI_LCD: parl_lcd
:SOC_PARLIO_LCD_SUPPORTED: parl_lcd
.. note::
@@ -85,7 +85,7 @@ Application Example
:SOC_LCD_RGB_SUPPORTED: * :example:`peripherals/lcd/rgb_panel` demonstrates how to install an RGB panel driver, display a scatter chart on the screen based on the LVGL library.
:SOC_I2C_SUPPORTED: * :example:`peripherals/lcd/i2c_oled` demonstrates how to use the SSD1306 panel driver from the `esp_lcd` component to facilitate the porting of LVGL library and display a scrolling text on the OLED screen.
:SOC_MIPI_DSI_SUPPORTED: * :example:`peripherals/lcd/mipi_dsi` demonstrates the general process of installing a MIPI DSI LCD driver, and displays a LVGL widget on the screen.
:SOC_PARLIO_SUPPORT_SPI_LCD: * :example:`peripherals/lcd/parlio_simulate` demonstrates how to use Parallel IO peripheral to drive an SPI or I80 Interfaced LCD.
:SOC_PARLIO_LCD_SUPPORTED: * :example:`peripherals/lcd/parlio_simulate` demonstrates how to use Parallel IO peripheral to drive an SPI or I80 Interfaced LCD.
API Reference
docs/en/api-reference/peripherals/parlio/parlio_tx.rst
+1 -1
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@@ -410,7 +410,7 @@ Application Examples
- :example:`peripherals/parlio/parlio_tx/simple_rgb_led_matrix` demonstrates how to use the TX unit driver of {IDF_TARGET_NAME} to support HUB75 interface RGB LED matrix panels and use the LVGL library to display simple UI elements.
:SOC_PARLIO_TX_SUPPORT_LOOP_TRANSMISSION: - :example:`peripherals/parlio/parlio_tx/advanced_rgb_led_matrix` demonstrates how to use the infinite loop transmission feature of the TX unit of {IDF_TARGET_NAME} to support HUB75 interface RGB LED matrix panels. Compared to the simple_rgb_led_matrix example, it does not require manual loop scanning and is more flexible.
:SOC_PARLIO_SUPPORT_SPI_LCD: - :example:`peripherals/lcd/parlio_simulate` demonstrates how to use the TX unit driver of the parallel IO peripheral to drive screens with SPI or I80 interfaces.
:SOC_PARLIO_LCD_SUPPORTED: - :example:`peripherals/lcd/parlio_simulate` demonstrates how to use the TX unit driver of the parallel IO peripheral to drive screens with SPI or I80 interfaces.
API Reference
-------------
docs/zh_CN/api-reference/peripherals/i2s.rst
+2 -2
View File
@@ -249,14 +249,14 @@ ESP32-C61 I2S 0 I2S 0 无 I2S 0 I2S 0 无
.. wavedrom:: /../_static/diagrams/i2s/tdm_pcm_long.json
.. only:: SOC_I2S_SUPPORTS_LCD_CAMERA
.. only:: esp32 or esp32s2
LCD/摄像头模式
^^^^^^^^^^^^^^^
LCD/摄像头模式只支持在 I2S0 上通过并行总线运行。在 LCD 模式下，I2S0 应当设置为主机 TX 模式；在摄像头模式下，I2S0 应当设置为从机 RX 模式。这两种模式不是由 I2S 驱动实现的，关于 LCD 模式的实现，请参阅 :doc:`/api-reference/peripherals/lcd/i80_lcd`。更多信息请参考 **{IDF_TARGET_NAME} 技术参考手册** > **I2S 控制器 (I2S)** > LCD 模式 [`PDF <{IDF_TARGET_TRM_EN_URL}#camlcdctrl>`__]。
.. only:: SOC_I2S_SUPPORTS_ADC_DAC
.. only:: esp32
ADC/DAC 模式
^^^^^^^^^^^^^
docs/zh_CN/api-reference/peripherals/lcd/index.rst
+2 -2
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@@ -32,7 +32,7 @@ LCD 通常由两个主要平面组成：
:SOC_LCD_I80_SUPPORTED: i80_lcd
:SOC_LCD_RGB_SUPPORTED: rgb_lcd
:SOC_MIPI_DSI_SUPPORTED: dsi_lcd
:SOC_PARLIO_SUPPORT_SPI_LCD: parl_lcd
:SOC_PARLIO_LCD_SUPPORTED: parl_lcd
.. note::
@@ -85,7 +85,7 @@ LCD 数据面板操作
:SOC_LCD_RGB_SUPPORTED: * :example:`peripherals/lcd/rgb_panel` 展示了如何安装 RGB 面板驱动程序，并基于 LVGL 库在屏幕上显示散点图。
:SOC_I2C_SUPPORTED: * :example:`peripherals/lcd/i2c_oled` 演示了如何使用 `esp_lcd` 组件中的 SSD1306 面板驱动来简化移植 LVGL 库，并在 OLED 屏幕上显示滚动文本。
:SOC_MIPI_DSI_SUPPORTED: * :example:`peripherals/lcd/mipi_dsi` 演示了如何安装 MIPI DSI LCD 驱动程序，并在屏幕上显示一个 LVGL 小部件。
:SOC_PARLIO_SUPPORT_SPI_LCD: * :example:`peripherals/lcd/parlio_simulate` 演示了如何使用 Parallel IO 外设驱动 SPI 或 I80 接口的屏幕。
:SOC_PARLIO_LCD_SUPPORTED: * :example:`peripherals/lcd/parlio_simulate` 演示了如何使用 Parallel IO 外设驱动 SPI 或 I80 接口的屏幕。
API 参考
docs/zh_CN/api-reference/peripherals/parlio/parlio_tx.rst
+1 -1
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@@ -410,7 +410,7 @@ TX 单元可以选择各种不同的时钟源，其中外部时钟源较为特
- :example:`peripherals/parlio/parlio_tx/simple_rgb_led_matrix` 演示了如何使用 {IDF_TARGET_NAME} 的 TX 单元驱动支持 HUB75 接口的 RGB LED 矩阵板，并使用 LVGL 库来展示简单的 UI 元素。
:SOC_PARLIO_TX_SUPPORT_LOOP_TRANSMISSION: - :example:`peripherals/parlio/parlio_tx/advanced_rgb_led_matrix` 演示了如何使用 {IDF_TARGET_NAME} 的 TX 单元的无限循环发送特性支持 HUB75 接口的 RGB LED 矩阵板。相比 simple_rgb_led_matrix 示例，不需要手动执行循环扫描，使用更加灵活。
:SOC_PARLIO_SUPPORT_SPI_LCD: - :example:`peripherals/lcd/parlio_simulate` 演示了如何使用并行 IO 外设的 TX 单元驱动 SPI 或 I80 接口的屏幕。
:SOC_PARLIO_LCD_SUPPORTED: - :example:`peripherals/lcd/parlio_simulate` 演示了如何使用并行 IO 外设的 TX 单元驱动 SPI 或 I80 接口的屏幕。
API 参考
-------------
examples/peripherals/.build-test-rules.yml
+1 -1
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@@ -241,7 +241,7 @@ examples/peripherals/lcd/mipi_dsi:
examples/peripherals/lcd/parlio_simulate:
disable:
- if: SOC_PARLIO_SUPPORT_SPI_LCD != 1
- if: SOC_PARLIO_LCD_SUPPORTED != 1
depends_components:
- esp_lcd
- esp_driver_parlio