forked from espressif/esp-idf
feature: support configuration of sleep clock calibration frequency
This commit is contained in:
@@ -150,7 +150,7 @@
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static esp_deep_sleep_cb_t s_dslp_cb[MAX_DSLP_HOOKS]={0};
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/**
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* Internal structure which holds all requested deep sleep parameters
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* Internal structure which holds all requested sleep parameters
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*/
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typedef struct {
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struct {
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@@ -180,6 +180,8 @@ typedef struct {
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} sleep_config_t;
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static uint32_t s_lightsleep_cnt = 0;
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_Static_assert(22 >= SOC_RTCIO_PIN_COUNT, "Chip has more RTCIOs than 22, should increase ext1_rtc_gpio_mask field size");
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static sleep_config_t s_config = {
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@@ -703,7 +705,7 @@ static uint32_t IRAM_ATTR esp_sleep_start(uint32_t pd_flags, esp_sleep_mode_t mo
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// re-enable UART output
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resume_uarts();
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s_lightsleep_cnt++;
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return result;
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}
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@@ -903,8 +905,13 @@ esp_err_t esp_light_sleep_start(void)
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s_config.rtc_clk_cal_period = rtc_clk_cal_cycling(RTC_CAL_RTC_MUX, RTC_CLK_SRC_CAL_CYCLES);
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esp_clk_slowclk_cal_set(s_config.rtc_clk_cal_period);
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#else
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s_config.rtc_clk_cal_period = rtc_clk_cal(RTC_CAL_RTC_MUX, RTC_CLK_SRC_CAL_CYCLES);
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esp_clk_slowclk_cal_set(s_config.rtc_clk_cal_period);
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#if CONFIG_PM_ENABLE
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if (s_lightsleep_cnt % CONFIG_PM_LIGHTSLEEP_RTC_OSC_CAL_INTERVAL == 0)
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#endif
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{
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s_config.rtc_clk_cal_period = rtc_clk_cal(RTC_CAL_RTC_MUX, RTC_CLK_SRC_CAL_CYCLES);
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esp_clk_slowclk_cal_set(s_config.rtc_clk_cal_period);
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}
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#endif
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/*
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@@ -916,7 +923,12 @@ esp_err_t esp_light_sleep_start(void)
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*/
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#if SOC_PMU_SUPPORTED
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s_config.fast_clk_cal_period = rtc_clk_cal(RTC_CAL_RC_FAST, FAST_CLK_SRC_CAL_CYCLES);
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#if CONFIG_PM_ENABLE
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if (s_lightsleep_cnt % CONFIG_PM_LIGHTSLEEP_RTC_OSC_CAL_INTERVAL == 0)
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#endif
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{
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s_config.fast_clk_cal_period = rtc_clk_cal(RTC_CAL_RC_FAST, FAST_CLK_SRC_CAL_CYCLES);
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}
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int sleep_time_sw_adjustment = LIGHT_SLEEP_TIME_OVERHEAD_US + sleep_time_overhead_in + s_config.sleep_time_overhead_out;
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int sleep_time_hw_adjustment = pmu_sleep_calculate_hw_wait_time(pd_flags, s_config.rtc_clk_cal_period, s_config.fast_clk_cal_period);
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s_config.sleep_time_adjustment = sleep_time_sw_adjustment + sleep_time_hw_adjustment;
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@@ -93,6 +93,20 @@ menu "Power Management"
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This option is invisible to users, and it is only used for ci testing,
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enabling it in the application will increase the sleep and wake-up time overhead
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config PM_LIGHTSLEEP_RTC_OSC_CAL_INTERVAL
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int "Calibrate the RTC_FAST/SLOW clock every N times of light sleep"
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default 1
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depends on PM_ENABLE
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range 1 128
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help
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The value of this option determines the calibration interval of the RTC_FAST/SLOW clock during sleep when
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power management is enabled. When it is configured as N, the RTC_FAST/SLOW clock will be calibrated
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every N times of lightsleep.
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Decreasing this value will increase the time the chip is in the active state, thereby increasing the
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average power consumption of the chip.
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Increasing this value can reduce the average power consumption, but when the external environment changes
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drastically and the chip RTC_FAST/SLOW oscillator frequency drifts, it may cause system instability.
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config PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP
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bool "Power down CPU in light sleep"
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depends on IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32S3 || IDF_TARGET_ESP32C6
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