Merge branch 'bugfix/esp32_app_cpu_core_cache_access_err' into 'release/v4.3'

esp32: fix cache access error exception for APP CPU core

See merge request espressif/esp-idf!15586
This commit is contained in:
Mahavir Jain
2021-10-22 09:10:22 +00:00

View File

@@ -131,6 +131,15 @@ static volatile bool s_resume_cores;
// If CONFIG_SPIRAM_IGNORE_NOTFOUND is set and external RAM is not found or errors out on testing, this is set to false.
bool g_spiram_ok = true;
static void core_intr_matrix_clear(void)
{
uint32_t core_id = cpu_hal_get_core_id();
for (int i = 0; i < ETS_MAX_INTR_SOURCE; i++) {
intr_matrix_set(core_id, i, ETS_INVALID_INUM);
}
}
#if !CONFIG_ESP_SYSTEM_SINGLE_CORE_MODE
void startup_resume_other_cores(void)
{
@@ -164,6 +173,9 @@ void IRAM_ATTR call_start_cpu1(void)
s_cpu_up[1] = true;
ESP_EARLY_LOGI(TAG, "App cpu up.");
// Clear interrupt matrix for APP CPU core
core_intr_matrix_clear();
//Take care putting stuff here: if asked, FreeRTOS will happily tell you the scheduler
//has started, but it isn't active *on this CPU* yet.
esp_cache_err_int_init();
@@ -234,16 +246,6 @@ static void start_other_core(void)
}
#endif // !CONFIG_ESP_SYSTEM_SINGLE_CORE_MODE
static void intr_matrix_clear(void)
{
for (int i = 0; i < ETS_MAX_INTR_SOURCE; i++) {
intr_matrix_set(0, i, ETS_INVALID_INUM);
#if !CONFIG_ESP_SYSTEM_SINGLE_CORE_MODE
intr_matrix_set(1, i, ETS_INVALID_INUM);
#endif
}
}
/*
* We arrive here after the bootloader finished loading the program from flash. The hardware is mostly uninitialized,
* and the app CPU is in reset. We do have a stack, so we can do the initialization in C.
@@ -447,7 +449,8 @@ void IRAM_ATTR call_start_cpu0(void)
// and default RTC-backed system time provider.
g_startup_time = esp_rtc_get_time_us();
intr_matrix_clear();
// Clear interrupt matrix for PRO CPU core
core_intr_matrix_clear();
#ifdef CONFIG_ESP_CONSOLE_UART
uint32_t clock_hz = rtc_clk_apb_freq_get();