forked from espressif/esp-idf
refactor(startup): move key manager specific code to esp_security component
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@@ -6,17 +6,44 @@
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#include "esp_private/startup_internal.h"
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#include "sdkconfig.h"
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#include "soc/soc_caps.h"
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#include "esp_crypto_clk.h"
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#include "esp_efuse.h"
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#include "esp_efuse_table.h"
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#include "esp_security_priv.h"
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#include "esp_err.h"
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#if SOC_KEY_MANAGER_ECDSA_KEY_DEPLOY || SOC_KEY_MANAGER_FE_KEY_DEPLOY
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#include "hal/key_mgr_ll.h"
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#endif
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__attribute__((unused)) static const char *TAG = "esp_security";
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static void esp_key_mgr_init(void)
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{
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// The following operation makes the Key Manager to use eFuse key for ECDSA and XTS-AES operation by default
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// This is to keep the default behavior same as the other chips
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// If the Key Manager configuration is already locked then following operation does not have any effect
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#if SOC_KEY_MANAGER_ECDSA_KEY_DEPLOY || SOC_KEY_MANAGER_FE_KEY_DEPLOY
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// Enable key manager clock
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// Using ll APIs which do not require critical section
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_key_mgr_ll_enable_bus_clock(true);
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_key_mgr_ll_enable_peripheral_clock(true);
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while (key_mgr_ll_get_state() != ESP_KEY_MGR_STATE_IDLE) {
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};
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#if SOC_KEY_MANAGER_ECDSA_KEY_DEPLOY
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key_mgr_ll_set_key_usage(ESP_KEY_MGR_ECDSA_KEY, ESP_KEY_MGR_USE_EFUSE_KEY);
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#endif
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#if SOC_KEY_MANAGER_FE_KEY_DEPLOY
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key_mgr_ll_set_key_usage(ESP_KEY_MGR_XTS_AES_128_KEY, ESP_KEY_MGR_USE_EFUSE_KEY);
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#endif
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#endif /* SOC_KEY_MANAGER_ECDSA_KEY_DEPLOY || SOC_KEY_MANAGER_FE_KEY_DEPLOY */
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}
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ESP_SYSTEM_INIT_FN(esp_security_init, SECONDARY, BIT(0), 103)
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{
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esp_crypto_clk_init();
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esp_key_mgr_init();
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#if CONFIG_ESP_CRYPTO_DPA_PROTECTION_AT_STARTUP
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esp_crypto_dpa_protection_startup();
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#endif
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@@ -71,10 +71,6 @@
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#include "soc/hp_sys_clkrst_reg.h"
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#endif
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#if SOC_KEY_MANAGER_ECDSA_KEY_DEPLOY || SOC_KEY_MANAGER_FE_KEY_DEPLOY
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#include "hal/key_mgr_ll.h"
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#endif
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#include "esp_private/rtc_clk.h"
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#if SOC_INT_CLIC_SUPPORTED
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@@ -319,22 +315,6 @@ static void start_other_core(void)
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}
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#endif
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// The following operation makes the Key Manager to use eFuse key for ECDSA and XTS-AES operation by default
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// This is to keep the default behavior same as the other chips
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// If the Key Manager configuration is already locked then following operation does not have any effect
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#if SOC_KEY_MANAGER_ECDSA_KEY_DEPLOY || SOC_KEY_MANAGER_FE_KEY_DEPLOY
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// Enable key manager clock
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// Using ll APIs which do not require critical section
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_key_mgr_ll_enable_bus_clock(true);
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_key_mgr_ll_enable_peripheral_clock(true);
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#if SOC_KEY_MANAGER_ECDSA_KEY_DEPLOY
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key_mgr_ll_set_key_usage(ESP_KEY_MGR_ECDSA_KEY, ESP_KEY_MGR_USE_EFUSE_KEY);
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#endif
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#if SOC_KEY_MANAGER_FE_KEY_DEPLOY
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key_mgr_ll_set_key_usage(ESP_KEY_MGR_XTS_AES_128_KEY, ESP_KEY_MGR_USE_EFUSE_KEY);
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#endif
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#endif /* SOC_KEY_MANAGER_ECDSA_KEY_DEPLOY || SOC_KEY_MANAGER_FE_KEY_DEPLOY */
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ets_set_appcpu_boot_addr((uint32_t)call_start_cpu1);
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bool cpus_up = false;
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