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Merge branch 'refactor/gpio_reset_pin' into 'master'

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refactor(gpio): simplified gpio_reset_pin function to not call gpio_configure

Closes IDFGH-14846 and IDFGH-14880

See merge request espressif/esp-idf!37814
This commit is contained in:
Song Ruo Jing
2025-03-26 16:56:27 +08:00
parent 465ff85d2b cbf7a66030
commit f3625b0fb0
3 changed files with 21 additions and 19 deletions
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10
components/esp_driver_gpio/include/driver/gpio.h
View File

@@ -71,15 +71,13 @@ typedef struct {
esp_err_t gpio_config(const gpio_config_t *pGPIOConfig);
/**
* @brief Reset an gpio to default state (select gpio function, enable pullup and disable input and output).
* @brief Reset a GPIO to a certain state (select gpio function, enable pullup and disable input and output).
*
* @param gpio_num GPIO number.
*
* @note This function also configures the IOMUX for this pin to the GPIO
* function, and disconnects any other peripheral output configured via GPIO
* Matrix.
*
* @return Always return ESP_OK.
* @return
* - ESP_OK Success
* - ESP_ERR_INVALID_ARG Parameter error
*/
esp_err_t gpio_reset_pin(gpio_num_t gpio_num);

4
components/esp_driver_gpio/include/esp_private/gpio.h
View File

@@ -83,7 +83,7 @@ esp_err_t gpio_output_disable(gpio_num_t gpio_num);
* - ESP_OK Success
* - ESP_ERR_INVALID_ARG GPIO number error
*/
esp_err_t gpio_od_disable(gpio_num_t gpio_num);
esp_err_t gpio_od_enable(gpio_num_t gpio_num);
/**
* @brief Disable open-drain for an IO
@@ -94,7 +94,7 @@ esp_err_t gpio_od_disable(gpio_num_t gpio_num);
* - ESP_OK Success
* - ESP_ERR_INVALID_ARG GPIO number error
*/
esp_err_t gpio_od_enable(gpio_num_t gpio_num);
esp_err_t gpio_od_disable(gpio_num_t gpio_num);
/**
* @brief Configure the pin to be used for analog purpose (such as ADC, touch, etc.)

26
components/esp_driver_gpio/src/gpio.c
View File

@@ -401,7 +401,7 @@ esp_err_t gpio_config(const gpio_config_t *pGPIOConfig)
gpio_pulldown_dis(io_num);
}
ESP_LOGI(GPIO_TAG, "GPIO[%"PRIu32"]| InputEn: %d| OutputEn: %d| OpenDrain: %d| Pullup: %d| Pulldown: %d| Intr:%d ", io_num, input_en, output_en, od_en, pu_en, pd_en, pGPIOConfig->intr_type);
ESP_LOGD(GPIO_TAG, "GPIO[%"PRIu32"]| InputEn: %d| OutputEn: %d| OpenDrain: %d| Pullup: %d| Pulldown: %d| Intr:%d ", io_num, input_en, output_en, od_en, pu_en, pd_en, pGPIOConfig->intr_type);
gpio_set_intr_type(io_num, pGPIOConfig->intr_type);
if (pGPIOConfig->intr_type) {
@@ -455,16 +455,20 @@ esp_err_t gpio_config_as_analog(gpio_num_t gpio_num)
esp_err_t gpio_reset_pin(gpio_num_t gpio_num)
{
assert(GPIO_IS_VALID_GPIO(gpio_num));
gpio_config_t cfg = {
.pin_bit_mask = BIT64(gpio_num),
.mode = GPIO_MODE_DISABLE,
//for powersave reasons, the GPIO should not be floating, select pullup
.pull_up_en = true,
.pull_down_en = false,
.intr_type = GPIO_INTR_DISABLE,
};
gpio_config(&cfg);
GPIO_CHECK(GPIO_IS_VALID_GPIO(gpio_num), "GPIO number error", ESP_ERR_INVALID_ARG);
gpio_intr_disable(gpio_num);
// for powersave reasons, the GPIO should not be floating, select pullup
gpio_pullup_en(gpio_num);
gpio_pulldown_dis(gpio_num);
gpio_input_disable(gpio_num);
gpio_output_disable(gpio_num);
#if SOC_RTCIO_PIN_COUNT > 0
if (rtc_gpio_is_valid_gpio(gpio_num)) {
rtc_gpio_deinit(gpio_num);
}
#endif
gpio_hal_func_sel(gpio_context.gpio_hal, gpio_num, PIN_FUNC_GPIO);
esp_gpio_revoke(BIT64(gpio_num));
return ESP_OK;
}