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325 Commits

Author SHA1 Message Date
Jiang Jiang Jian
c5cb44d813 Merge branch 'bugfix/fix_some_wifi_bugs_0427_v4.1' into 'release/v4.1'
wifi: backport some wifi fixes 0427 (v4.1)

See merge request espressif/esp-idf!8496
2020-04-29 23:39:58 +08:00
zhangyanjiao
43d8950682 wifi changes:
1. fix the bug for softAP update second channel wrong
2. change wifi_scan_time_t from union to struct
3. query country code wrong when policy change from manual to auto
2020-04-29 17:27:00 +08:00
Jiang Jiang Jian
d4e700e744 Merge branch 'bugfix/coex_fix_wifi_performance_when_ble_conn_v4.1' into 'release/v4.1'
Coexistence: Add coexist API to enable BLE connection dynamic priority

See merge request espressif/esp-idf!8467
2020-04-29 17:24:30 +08:00
baohongde
ddaa9d4523 Coexistence: Add coexist API to enable BLE connection dynamic priority 2020-04-29 13:57:59 +08:00
Angus Gratton
fadbfdadf4 Merge branch 'bugfix/make_to_cmake_msys_py3_v4.1' into 'release/v4.1'
tools: Make Unicode from subprocess result in the CMake convert script (v4.1)

See merge request espressif/esp-idf!8543
2020-04-29 13:44:10 +08:00
Jiang Jiang Jian
6366c20858 Merge branch 'bugfix/pmf_cert_fixes_backport_v4.1' into 'release/v4.1'
PMF cert fixes (backport v4.1)

See merge request espressif/esp-idf!8469
2020-04-29 11:58:49 +08:00
Nachiket Kukade
27ec86cd8e esp_wifi: Update wifi lib
Backports PMF Certification fixes -
1. Check return status of decrypt operation. Fixes 5.3.3.1.
2. Allow PMF negotiation for WPA2-Enterprise. Fixes 5.3.3.2, 5.3.3.4.
3. Add NULL check on key before encrypting PMF, fixes crash.

Closes WIFI-2251
2020-04-29 01:47:32 +00:00
Roland Dobai
3b3050b09f tools: Make Unicode from subprocess result in the CMake convert script
Fixes an issue with Python 3 in MSYS where it fails while trying to join
paths where one part is Unicode (default string on Python3) and the
second part are bytes (returned by the subprocess call).

Closes https://github.com/espressif/esp-idf/issues/5189
2020-04-28 15:22:07 +02:00
Jiang Jiang Jian
69c8d9211f Merge branch 'bugfix/supplicant_disable_tls_v1.2_backport_v4.1' into 'release/v4.1'
Disable TLS v1.2 (backport v4.1)

See merge request espressif/esp-idf!8536
2020-04-28 16:22:26 +08:00
Nachiket Kukade
6254bf443e wpa_supplicant: Disable TLSv1.2 by default
Some Enterprise Authentication Servers do not support TLS v1.2.
Move this option to Menuconfig and disable by default.
2020-04-28 10:46:59 +05:30
Jiang Jiang Jian
198953df8f Merge branch 'fixbug/tcp_kill_state_assert_for_v4.1' into 'release/v4.1'
lw-ip:fixbug for tcp kill state assert(backport 4.1)

See merge request espressif/esp-idf!8452
2020-04-28 11:43:37 +08:00
Jiang Jiang Jian
87fa7af6b7 Merge branch 'bugfix/pm_dump_locks_v4.1' into 'release/v4.1'
esp_pm: esp_pm_dump_locks: don't print from a critical section (backport v4.1)

See merge request espressif/esp-idf!8353
2020-04-28 11:41:21 +08:00
Michael (XIAO Xufeng)
e558b2237d Merge branch 'bugfix/mcpwm_period_error_v4.1' into 'release/v4.1'
bugfix(mcpwm_period_error): fix the issue of wrong period (backport v4.1)

See merge request espressif/esp-idf!7735
2020-04-27 18:06:15 +08:00
Jiang Jiang Jian
9a389162ab Merge branch 'fixbug/set_dhcp_time_fail_for_v4.1' into 'release/v4.1'
lw-ip:fixbug for set dhcp time fail for 4.1(backport4.1)

See merge request espressif/esp-idf!8426
2020-04-27 16:48:58 +08:00
espressif
7d934dafb8 mcpwm: fix the issue of wrong period (backport v4.1) 2020-04-24 21:10:14 +08:00
Angus Gratton
6c9864ce86 Merge branch 'fix/ci_example_test_prov_v4.1' into 'release/v4.1'
CI: Fix prov example test exception handle (v4.1)

See merge request espressif/esp-idf!8439
2020-04-24 16:13:02 +08:00
Angus Gratton
4952b3baed Merge branch 'bugfix/ci_unterminated_sdkconfig_defaults_v4.1' into 'release/v4.1'
CI: Add EOL to sdkconfig.defaults before adding sdkconfig.ci (v4.1)

See merge request espressif/esp-idf!8456
2020-04-24 16:12:31 +08:00
Roland Dobai
ee234472c1 CI: Add EOL to sdkconfig.defaults before adding sdkconfig.ci 2020-04-23 16:54:16 +02:00
xueyunfei
c50952ebaf fixbug for tcp kill state assert 2020-04-23 15:58:29 +08:00
Angus Gratton
20085a0fcd Merge branch 'bugfix/ci_partition_table_detection_v4.1' into 'release/v4.1'
CI: Fix partition table detection if "partition" is in the project name (v4.1)

See merge request espressif/esp-idf!8431
2020-04-23 11:36:58 +08:00
Shivani Tipnis
19449289d0 CI: Fix prov example test cryptography package version exception handling 2020-04-23 00:47:41 +05:30
Roland Dobai
f5645cc9d8 CI: Fix partition table detection if "partition" is in the project name 2020-04-22 10:04:36 +02:00
xueyunfei
0c92ca5175 fixbug for set dhcp time fail for 4.1 2020-04-22 11:13:01 +08:00
Angus Gratton
a41bcacf31 Merge branch 'bugfix/ppp_enable_ipv6_v4.1' into 'release/v4.1'
esp-netif: make the IPv6 configurable for PPP netifs (v4.1)

See merge request espressif/esp-idf!8200
2020-04-21 12:36:00 +08:00
Angus Gratton
f4243de752 Merge branch 'bugfix/error_on_building_in_idf_path_v4.1' into 'release/v4.1'
cmake: Error out when building in IDF_PATH dir (v4.1)

See merge request espressif/esp-idf!8297
2020-04-20 15:04:33 +08:00
Angus Gratton
e9c6f119de Merge branch 'bugfix/make_system_using_rom_time_funcs_v4.1' into 'release/v4.1'
esp_rom: Fix esp32.rom.newlib-time.ld should includes all time ROM functions/data (v4.1)

See merge request espressif/esp-idf!8365
2020-04-17 14:14:13 +08:00
Angus Gratton
1ea008d22e Merge branch 'feature/add_rtc_xtal_cal_retry_option_v4.1' into 'release/v4.1'
esp32: Add a Kconfig option - Number of attempts to repeat 32k XTAL calibration (v4.1)

See merge request espressif/esp-idf!7931
2020-04-16 15:25:03 +08:00
Jiang Jiang Jian
585d53dfa8 Merge branch 'bugfix/fix_errors_with_mbedtls_disabled_v4.1' into 'release/v4.1'
wpa_supplicant: Fix compilation errors when USE_MBEDTLS is disabled. (v4.1)

See merge request espressif/esp-idf!8356
2020-04-16 14:59:35 +08:00
Jiang Jiang Jian
1f480f4570 Merge branch 'bugfix/fix_API_esp_wifi_stop_crash_issue_v4.1' into 'release/v4.1'
bugfix: fix esp_wifi_stop crash issue (backport v4.1)

See merge request espressif/esp-idf!8329
2020-04-16 14:58:00 +08:00
Angus Gratton
d10ad9a4b1 Merge branch 'bufgix/esp_ota_get_app_elf_sha256_v4.1' into 'release/v4.1'
app_update: Fix case when elf file SHA256 should be printed by panic handler while cache is disabled (v4.1)

See merge request espressif/esp-idf!8366
2020-04-16 14:32:21 +08:00
Angus Gratton
0effd9b257 Merge branch 'bugfix/efuse_get_coding_scheme_and_ut_v4.1' into 'release/v4.1'
efuse: Fix get_coding_scheme() using ESP_EARLY_LOG* instead of ESP_LOG* (v4.1)

See merge request espressif/esp-idf!8360
2020-04-16 14:29:12 +08:00
Marius Vikhammer
0c4e55e3bd app_update: fix test failure for get_app_elf_sha256 test
Commit fc03161f updated esp_ota_get_app_elf_sha256 to store and return
X number of bytes of the hash, but the test case still expected 64 bytes.

Updated test case to use CONFIG value for expected length.
2020-04-15 21:09:57 +08:00
KonstantinKondrashov
a2a71fc68f app_update: Fix case when elf file SHA256 should be printed by panic handler while cache is disabled
Closes: IDF-1342
2020-04-15 21:05:58 +08:00
KonstantinKondrashov
ae063d96c2 esp_rom: Fix esp32.rom.newlib-time.ld should includes all time ROM functions/data
- Added UT
Closes: https://github.com/espressif/esp-idf/issues/4925
2020-04-15 20:59:24 +08:00
KonstantinKondrashov
3948065c24 efuse: Using IDF_ENV_FPGA in UTs 2020-04-15 19:43:07 +08:00
KonstantinKondrashov
33eab40f2a efuse/esp32s2: Fix get_coding_scheme() when CONFIG_SECURE_FLASH_ENC_ENABLED and LOG_LEVEL is Debug 2020-04-15 19:36:47 +08:00
KonstantinKondrashov
f59ef5e6ef efuse/esp32: Fix get_coding_scheme() when CONFIG_SECURE_FLASH_ENC_ENABLED and LOG_LEVEL is Debug
Closes: https://github.com/espressif/esp-idf/issues/4862
2020-04-15 19:36:45 +08:00
Sagar Bijwe
b7ae3ff9bd wpa_supplicant: Fix compilation errors when USE_MBEDTLS is disabled.
This is a regression from earlier commit related to TLSV12 which used
sha functions that are currently declared static.
Solution: Follow upstream code structure and resolve the errors.
2020-04-15 15:33:59 +05:30
KonstantinKondrashov
a2a89fb95d esp32: Add a Kconfig option- Number of attempts to repeat 32k XTAL calibration
Closes: IDF-1479
2020-04-15 16:34:57 +08:00
Ivan Grokhotkov
ffe0cca423 esp_pm: esp_pm_dump_locks: don't print from a critical section
Closes https://github.com/espressif/esp-idf/issues/1917
2020-04-15 08:47:37 +02:00
Jiang Jiang Jian
b3410b9210 Merge branch 'bugfix/coredump_no_ext_stacks_v4.1' into 'release/v4.1'
core dump: don't allow core dumps to Flash if PSRAM is used for stacks (backport v4.1)

See merge request espressif/esp-idf!8228
2020-04-15 13:25:26 +08:00
Jiang Jiang Jian
b08b0f0949 Merge branch 'bugfix/psram_single_bit_error_v4.1' into 'release/v4.1'
psram: support psram 2T mode to fix single bit error (backport v4.1)

See merge request espressif/esp-idf!8327
2020-04-15 13:24:21 +08:00
Jiang Jiang Jian
f646cdd6a8 Merge branch 'nimble/fix_ble_hs_reset_v4.1' into 'release/v4.1'
NimBLE: Reset master and slave states on host reset and few minor fixes  (backport v4.1)

See merge request espressif/esp-idf!8216
2020-04-15 13:23:59 +08:00
Jiang Jiang Jian
445f727e7a Merge branch 'bugfix/fix_supplicant_tlsv12_v4.1' into 'release/v4.1'
wpa_supplicant: Fix wpa_supplicant TLS 1.2 issues (v4.1)

See merge request espressif/esp-idf!8202
2020-04-15 13:06:42 +08:00
Angus Gratton
e1562311bf Merge branch 'bugfix/logging_compilation_fix_anti_rollback_v4.1' into 'release/v4.1'
Minor fix logging issue hindering compilation on anti rollback. (v4.1)

See merge request espressif/esp-idf!8302
2020-04-14 16:36:29 +08:00
Sagar Bijwe
afc1362ea6 wpa_supplicant: Fix wpa_supplicant TLS 1.2 issues
1) Fixed compilation issues.
2) Added tlsprf.c from upstream
3) Enabled SHA256 in supplicant compilation.
2020-04-13 16:39:59 +00:00
Krzysztof Budzynski
5a09cfe70a Merge branch 'bugfix/uart_echo_readme_v4.1' into 'release/v4.1'
example: Remove duplicate commands and invalid serial port information (v4.1)

See merge request espressif/esp-idf!8335
2020-04-14 00:33:50 +08:00
Roland Dobai
858f4745fd example: Remove duplicate commands and invalid serial port information
Closes https://github.com/espressif/esp-idf/issues/5049
2020-04-13 15:16:11 +02:00
ronghulin
d880672076 bugfix: fix esp_wifi_stop crash issue 2020-04-13 16:05:48 +08:00
chenjianqiang
90a8945930 psram: support psram 2T mode to fix single bit error
1. add enable PSRAM 2T mode function
2. abort when himem and 2T mode are enabled meanwhile
3. set SPIRAM_2T_MODE as "n" by default, enable it when needed
2020-04-13 14:26:45 +08:00
Jiang Jiang Jian
34b9e6c677 Merge branch 'feat/ble_mesh_ble_adv_simultaneously_v4.1' into 'release/v4.1'
ble_mesh: Support BLE advertising simultaneously (v4.1)

See merge request espressif/esp-idf!8315
2020-04-10 21:07:19 +08:00
lly
1ac44aa202 ble_mesh: Support BLE advertising simultaneously 2020-04-10 17:34:06 +08:00
Island
7053737110 Merge branch 'bugfix/ble_mesh_add_test_function_v4.1' into 'release/v4.1'
ble_mesh: Add ble mesh white list test function (v4.1)

See merge request espressif/esp-idf!8158
2020-04-10 17:29:38 +08:00
Prasad Alatkar
acb92c225f NimBLE: Minor fix in esp_nimble_cfg and bleprph README (backport v4.1) 2020-04-09 16:05:14 +05:30
Prasad Alatkar
072d01da2f NimBLE: Reset master and slave states on host reset and fix build failure (backport v4.1) 2020-04-09 16:05:04 +05:30
Supreet Deshpande
87d68ebb98 Fixes logging issue hindering compilation on anti rollback. 2020-04-09 12:04:20 +05:30
lly
89f7e62011 ble_mesh: Add ble mesh white list test function
Using the ble mesh white list test functions, a node can choose to
only receive mesh messages from a specific node and relay the
messages for it. Messages from other nodes will be ignored.
2020-04-09 06:03:59 +00:00
Ivan Grokhotkov
4fe18a9258 Merge branch 'bugfix/IDFGH-2910_v4.1' into 'release/v4.1'
NVS: bugfix - iterator skipping version 1 blobs (v4.1)

See merge request espressif/esp-idf!8191
2020-04-09 05:45:49 +08:00
Ivan Grokhotkov
51c32997b1 Merge branch 'feature/idfpy_add_baud_parameter_to_monitor_v4.1' into 'release/v4.1'
idf.py: add monitor-baud option to monitor command (v4.1)

See merge request espressif/esp-idf!7458
2020-04-09 05:44:41 +08:00
Renz Bagaporo
40af109144 cmake: error out on building in IDF_PATH root dir 2020-04-08 19:51:35 +08:00
Mahavir Jain
ec5c123ef7 Merge branch 'bugfix/size_calculation_in_ota_v4.1' into 'release/v4.1'
Fix size calculation to erase partition range for OTA image (v4.1)

See merge request espressif/esp-idf!8266
2020-04-06 18:03:41 +08:00
Shubham Kulkarni
4573688862 esp_ota_ops.c: Fix size calculation to erase partition range for OTA image
Closes https://github.com/espressif/esp-idf/issues/4953
2020-04-06 13:39:01 +05:30
Ivan Grokhotkov
cd301cc324 core dump: don't allow core dumps to Flash if PSRAM is used for stacks
It is not possible to write to Flash when the stack is located in
PSRAM, and it is not possible to write PSRAM buffers into Flash when
malloc can not be used.
2020-04-02 23:43:20 +02:00
Jiang Jiang Jian
9a1c5a903f Merge branch 'bugfix/btdm_backports_v4.1_0328' into 'release/v4.1'
Bugfix/btdm backports v4.1 0328

See merge request espressif/esp-idf!8150
2020-04-02 22:47:49 +08:00
Sergei Silnov
655e201b1c idf.py: add monitor-baud option to monitor command 2020-04-01 15:11:20 +02:00
Jiang Jiang Jian
5e09d473c7 Merge branch 'bugfix/btdm_dont_dequeue_the_command_queue_v4.1' into 'release/v4.1'
component/bt: fix don't dequeue the command queue after process the read_by_type_req(backport v4.1)

See merge request espressif/esp-idf!8181
2020-04-01 19:06:55 +08:00
Anton Maklakov
bf7f40007a Merge branch 'ci/build_bootloader_configs_v4.1' into 'release/v4.1'
ci: Fix CI testing of bootloader configs (v4.1)

See merge request espressif/esp-idf!8195
2020-04-01 15:07:48 +08:00
David Cermak
a2c55e2c37 examples: common connect code to ignore GOT_IP6_EVENT if comes from unrelated netif 2020-04-01 08:52:55 +02:00
David Cermak
4b59f7e2c7 mdns: limit the GOT_IP6_EVENT to only known network interfaces 2020-04-01 08:52:54 +02:00
David Cermak
716298f8e3 esp-netif-ppp: support for posting GOT_IP event for IPv6 2020-04-01 08:52:54 +02:00
Francesco Giancane
38060c0b58 examples: pppos_client: update sdkconfig.defaults
As per discussion in #4782, IPV6 link local negotiation by default is
disabled.

Signed-off-by: Francesco Giancane <francesco.giancane@accenture.com>
2020-04-01 08:52:54 +02:00
Francesco Giancane
3c01f68a78 lwip: make IPV6 link-local support over PPP configurable
Make the link local negotiation for IPV6 in PPP optional and
configurable.
This is because some modems do not support the IPV6 negotiation and
sending IPV6CP frames would in some cases break the network
configuration phase, resulting in a timeout during the Phase Network.

Please note that this does not disable the IPV6 support for the outgoing
communication (IPV6 is still enabled even if this option is not
selected) but just for the local link between lwIP and modem.

Signed-off-by: Francesco Giancane <francesco.giancane@accenture.com>

Merges https://github.com/espressif/esp-idf/pull/4782
Closes https://github.com/espressif/esp-idf/issues/1065
2020-04-01 08:52:54 +02:00
Angus Gratton
a5bf353e3f Merge branch 'backport/malloc_zero_return_null_v4.1' into 'release/v4.1'
backport/malloc_zero_return_null_v4.1

See merge request espressif/esp-idf!8146
2020-04-01 14:41:33 +08:00
Angus Gratton
51b7247033 unit test app: Use the new config names for DEBUG/RELEASE configs
Also build the bootloader to the same config level as the app
2020-04-01 16:30:22 +11:00
Angus Gratton
52dcf1c180 ci: Build all bootloader configs when building the bootloader app
CI regression in 26efc5a6d0
2020-04-01 16:22:20 +11:00
Jakob Hasse
26379f7d3e NVS: bugfix - iterator skipping version 1 blobs
Closes https://github.com/espressif/esp-idf/issues/4954
2020-04-01 11:16:28 +08:00
Angus Gratton
8dc421c7e1 Merge branch 'bugfix/secure_boot_v2_wrdis_v4.1' into 'release/v4.1'
secure boot v2: esp32: Prevent read disabling additional efuses (v4.1)

See merge request espressif/esp-idf!8179
2020-04-01 10:53:06 +08:00
xiewenxiang
79590d2e21 component/bt: fix don't dequeue the command queue after process the read_by_type_req 2020-03-31 16:27:08 +08:00
Angus Gratton
c17d55eb9b esp32: Enable flash encryption by setting FLASH_CRYPT_CNT to max
Previous method was to write-protect this efuse, however on ECO3
the write protect field also covers the UART_DOWNLOAD_DIS efuse.

Doing it this way keeps the possibility of disabling UART download
mode, later.
2020-03-31 17:31:59 +11:00
Angus Gratton
7c34711c07 docs: secure boot v2: Add a note about maximum bootloader size 2020-03-31 17:31:58 +11:00
Angus Gratton
cf8dd62fc4 secure boot v2: esp32: Prevent read disabling additional efuses
Also reduce the number of eFuse write cycles during first boot when
Secure Boot and/or Flash Encryption are enabled.
2020-03-31 17:31:56 +11:00
Angus Gratton
f96d28172b Merge branch 'bugfix/monitor_encrypted_target_v4.1' into 'release/v4.1'
tools: Fix flashing encrypted binaries from IDF Monitor (v4.1)

See merge request espressif/esp-idf!8126
2020-03-31 13:09:55 +08:00
Jiang Jiang Jian
f538b63458 Merge branch 'bugfix/fix_airkiss_bug_v4.1' into 'release/v4.1'
fix the bug for Airkiss (backport  v4.1)

See merge request espressif/esp-idf!8121
2020-03-31 00:07:51 +08:00
Jiang Jiang Jian
6c7895fbac Merge branch 'bugfix/backport_some_wifi_bugs_0326_v4.1' into 'release/v4.1'
esp_wifi: backport some WiFi bugs 0326 (backport v4.1)

See merge request espressif/esp-idf!8149
2020-03-31 00:03:25 +08:00
baohongde
a8494b68e1 components/coex: Fix wakeup delay with DFS 2020-03-28 20:12:21 +08:00
liu zhifu
8367bc4571 esp_wifi: backport some WiFi bugs
1. Fix WiFi log print level
2. Optimize WiFi/BT coexist sleep
   - If any data tx/rx in WiFi slice, fore wakeup next TBTT
   - Increase active timeout time to coex TBTT interval to avoid sleep in WiFi slice
2020-03-28 18:13:31 +08:00
gengyuchao
374e9b32d4 bugfix/fix_controller_disable_re_enable_crash 2020-03-28 17:14:37 +08:00
Felipe Neves
7fdc9571ba multi_heap: ensure that malloc(0) return NULL pointer in any poisoning configuration 2020-03-27 14:27:45 -03:00
Mahavir Jain
f9f42a9d90 Merge branch 'fix/wifi_provisioning_uuid_v4.1' into 'release/v4.1'
Wifi_provisioning: Change service_uuid to non standard 128 bit UUID and add retries in test script (backport v4.1)

See merge request espressif/esp-idf!8081
2020-03-27 22:54:10 +08:00
Roland Dobai
820ed5c7f1 tools: Fix flashing encrypted binaries from IDF Monitor 2020-03-27 09:43:26 +01:00
Jiang Jiang Jian
69147fc4ec Merge branch 'feat/ble_mesh_vnd_model_example_v4.1' into 'release/v4.1'
Feat/ble mesh vnd model example (v4.1)

See merge request espressif/esp-idf!8001
2020-03-27 14:08:13 +08:00
zhangyanjiao
88f8f91d40 fix the bug for Airkiss
Closes https://github.com/espressif/esp-idf/issues/3362
2020-03-26 21:12:52 +08:00
Angus Gratton
06337f1034 Merge branch 'bugfix/cmake_bugfixes_v4.1' into 'release/v4.1'
CMake-related bugfixes (v4.1)

See merge request espressif/esp-idf!8067
2020-03-26 16:29:55 +08:00
Prasad Alatkar
40f66c3117 Wifi_provisioning_mgr_test: Allow three attempts to connect to AP before concluding provisioning failure 2020-03-26 05:04:52 +00:00
Prasad Alatkar
db1111ef79 Wifi_provisioning_ble: Change service_uuid to non standard 128 bit UUID
- Modifies UUIDs in scheme_ble, manager example and esp_prov tool to custom 128
  bit UUID
2020-03-26 05:04:52 +00:00
Jiang Jiang Jian
dbaf0f1e93 Merge branch 'bugfix/backport_some_wifi_bugs_0323_v4.1' into 'release/v4.1'
esp_wifi: Backport some wifi bugs 0323 (backport v4.1)

See merge request espressif/esp-idf!8086
2020-03-25 15:11:32 +08:00
Jiang Jiang Jian
906280e767 Merge branch 'optimization/TCPv6_connect_for_v4.1' into 'release/v4.1'
lw-ip:optimization TCPv6 connect for 4.1

See merge request espressif/esp-idf!8048
2020-03-24 15:25:27 +08:00
xiehang
55abe2eba8 esp_wifi: Fix ESP32S2 wifi log not printing 2020-03-24 15:05:05 +08:00
xiehang
fbe215f3c0 esp_wifi: backport some wifi bugs 0323
1.Reduce wifi bin size
2.Add TX packets size check
3.Fix scan get rssi error
4.Return fail when setting AP's channel out of range
2020-03-24 15:05:00 +08:00
Mahavir Jain
6e0b8af978 Merge branch 'feature/upgrade_mbedtls_to_v4.1' into 'release/v4.1'
mbedtls: upgrade to release v2.16.5 (v4.1)

See merge request espressif/esp-idf!7986
2020-03-24 13:46:00 +08:00
Mahavir Jain
b8fe1fdf27 bootloader_support: initialize mbedtls_ctr_drbg_context per mbedtls v2.16.5 requirement
In commit 02d2903e39, mbedtls was
updated to release v2.16.5, where it was made mandatory to initialize
mbedtls_ctr_drbg_context before using same. It was fixed in wpa supplicant
but missed out in secure boot v2 verification code. This commit
fixes that.
2020-03-23 11:22:20 +05:30
Mahavir Jain
355a210a38 mbedtls: upgrade to release v2.16.5
For detailed release notes please refer to:
https://tls.mbed.org/tech-updates/releases/mbedtls-2.16.5-and-2.7.14-released

Closes: IDFGH-2638
Closes: https://github.com/espressif/esp-idf/issues/4716
2020-03-23 11:22:02 +05:30
Sagar Bijwe
5c4f7948d4 wpa_supplicant: Fix SAE test-case failure on mbedtls version udpate
Problem:
mbedtls_ctr_drbg_context was initialized in crypto_ec_point_mul. This
was okay in releases before 2.16.4 as entropy_len used to get set to
MBEDTLS_CTR_DRBG_ENTROPY_LEN in function mbedtls_ctr_drbg_seed. The
function is now changed to set the length to
MBEDTLS_CTR_DRBG_ENTROPY_LEN if previous length is 0 and hence the bug.

Solution:
Initialize mbedtls_ctr_drbg_context in crypto_ec_point_mul.
2020-03-23 11:22:02 +05:30
Renz Bagaporo
bc81db3676 cmake: show error message on encrypted flash targets without proper config 2020-03-22 20:44:23 +08:00
Renz Christian Bagaporo
737215c50f cmake: utility to create a failing target 2020-03-22 20:01:33 +08:00
Renz Bagaporo
2925b5f42b examples: split source files for one of the ulp examples 2020-03-22 20:00:21 +08:00
Renz Bagaporo
cc95d14d80 ulp: fix ulp external project args
Closes https://github.com/espressif/esp-idf/issues/4713
2020-03-22 20:00:21 +08:00
Renz Christian Bagaporo
1717232f11 ulp: use quotes when specifying files for embedding ulp binaries 2020-03-22 19:59:50 +08:00
Renz Bagaporo
98742664e8 ci: add test for partition_table target 2020-03-22 19:58:48 +08:00
Renz Christian Bagaporo
2aba19e00d partition_table: output partition table info for partition_table target 2020-03-22 19:58:48 +08:00
He Yin Ling
9f024df9e5 Merge branch 'bugfix/modify_ble_mesh_command_for_v4.1' into 'release/v4.1'
ble mesh: update ble mesh console example  (backport v4.1)

See merge request espressif/esp-idf!8042
2020-03-22 18:36:29 +08:00
Chen Sheng
af3c81b68a ble mesh: update ble mesh console example (backport v4.1) 2020-03-22 18:36:26 +08:00
Jiang Jiang Jian
bac92d579f Merge branch 'bugfix/send_ok_when_sta_disconnect_for_v4.1' into 'release/v4.1'
lw-ip:bugfix for TCPv6 send ok when sta disconnect for v4.1

See merge request espressif/esp-idf!8025
2020-03-21 15:15:49 +08:00
Jiang Jiang Jian
b445b59c5e Merge branch 'bugfix/wep40_key_parsing_bug_v4.1' into 'release/v4.1'
Bugfix/wep40 key parsing bug v4.1

See merge request espressif/esp-idf!7990
2020-03-20 17:33:50 +08:00
xueyunfei
9b31a2e7f9 optimization TCPv6 connect for 4.1 2020-03-20 15:04:31 +08:00
Jiang Jiang Jian
71ffae5d6e Merge branch 'bugfix/hfp_github_issues_v4.1' into 'release/v4.1'
Bugfix for HFP and some Github issue. v4.1

See merge request espressif/esp-idf!7975
2020-03-20 13:21:33 +08:00
xueyunfei
c092f9b881 bugfix for TCPv6 send ok when sta disconnect 2020-03-19 14:14:13 +08:00
kapil.gupta
582a493739 wpa_supplicant: Add parsing support for WEP40 key
WEP key is passed as ascii key without "", add parsing support
in supplicant for this.
2020-03-18 13:40:05 +00:00
Angus Gratton
2976f5daea Merge branch 'bugfix/ci_handle_retried_jobs_v4.1' into 'release/v4.1'
ci: add find job id argument job status (backport v4.1)

See merge request espressif/esp-idf!7953
2020-03-18 16:03:18 +08:00
Angus Gratton
4414e829de Merge branch 'backport/feat/secure_boot_v2_v41' into 'release/v4.1'
Backport/feat/secure boot v2 v41

See merge request espressif/esp-idf!7854
2020-03-18 15:35:53 +08:00
Island
e4704e0875 Merge branch 'bugfix/ble_mesh_nimble_adapt_deinit_v4.1' into 'release/v4.1'
ble_mesh: Fix ble mesh nimble host deinit (v4.1)

See merge request espressif/esp-idf!8004
2020-03-18 12:32:21 +08:00
weitianhua
f5fc735711 Bugfix for HFP and some Github issue.
1. Bugfix for AG audio crash (change the return position)
2. Fix the error macro name and error return in hfp_hf demo
3. Fix the annotation error using UTF-8 ' (from Github)
4. Change or remove the log in SCO related code region.
5. Correct error of introduction of a function.
2020-03-18 04:06:24 +00:00
lly
7815cd9ff4 ble_mesh: Fix ble mesh nimble host deinit 2020-03-17 16:18:50 +08:00
lly
da113cdfa8 ble_mesh: Add ESP BLE Mesh vendor models example 2020-03-17 15:54:53 +08:00
lly
48e6195506 ble_mesh: Rename ble_mesh_vendor_models to common_vendor_models 2020-03-17 15:54:40 +08:00
Jiang Jiang Jian
1cdea40bba Merge branch 'bugfix/ble_mesh_miscellaneous_fix_v4.1' into 'release/v4.1'
Bugfix/ble mesh miscellaneous fix (v4.1)

See merge request espressif/esp-idf!7969
2020-03-17 15:34:19 +08:00
Jiang Jiang Jian
3d462d7d81 Merge branch 'bugfix/compiler_err_when_performance_optimization_enabled_v4.1' into 'release/v4.1'
Bugfix/compiler err when performance optimization enabled v4.1

See merge request espressif/esp-idf!7977
2020-03-17 13:54:06 +08:00
weitianhua
aa6347339c Remove (x2) variable in BCM_STRNCPY_S and BCM_STRCPY_S when performance optimization enabled 2020-03-14 14:41:16 +08:00
weitianhua
8488f292c2 Fix mem_start uninitialized error when compiler optimization performance enabled 2020-03-14 14:41:06 +08:00
lly
6431a5e185 ble_mesh: Move dev_role to the end of model_pub 2020-03-13 19:24:49 +08:00
lly
27b28c0249 ble_mesh: Use the right netkey during iv update 2020-03-13 19:24:45 +08:00
lly
b29bc240a7 ble_mesh: Use the right net_idx & app_idx for publish 2020-03-13 19:24:37 +08:00
lly
940e87c0da ble_mesh: Check buf->ref before unref the buffer 2020-03-13 19:24:32 +08:00
lly
60eaca9637 ble_mesh: Fix mesh memory use-after-free issue 2020-03-13 19:24:27 +08:00
lly
e01333514d ble_mesh: Add ble mesh deinit in btc task 2020-03-13 19:24:23 +08:00
lly
f0519c674f ble_mesh: Free beacon timer when deinit mesh 2020-03-13 19:24:18 +08:00
lly
de9186b908 ble_mesh: Use lock for mesh timer operations 2020-03-13 19:24:12 +08:00
Angus Gratton
5cd45a6d80 secure boot: Fix anti-fault value if hash is shorter than curve
(Not actually a problem with SBV1 anti-fault as hash size == curve size in this case.)
2020-03-13 14:01:45 +05:30
He Yin Ling
1fa6db757d ci: add find job id argument job status:
if we retry failed job, we will have 2 jobs with same name in one pipeline. we need to use status to find the retried job instead of failed job.
2020-03-12 09:56:33 +08:00
Ivan Grokhotkov
7f84669054 Merge branch 'bugfix/from_github_v4.1' into 'release/v4.1'
Fixes from Github (backport v4.1)

See merge request espressif/esp-idf!7920
2020-03-11 21:49:19 +08:00
Jiang Jiang Jian
e82ac041cd Merge branch 'bugfix/select_waiting_assert_for_v4.1' into 'release/v4.1'
lw-ip:fix bug for after udp close select_waiting assert for v4.1

See merge request espressif/esp-idf!7919
2020-03-11 20:45:35 +08:00
xueyunfei
47f9c0e301 fix bug for after udp close select_waiting assert for v4.1 2020-03-11 10:06:43 +00:00
Mahavir Jain
d09a43fc1e Merge branch 'bugfix/ota_with_redirection_v4.1' into 'release/v4.1'
esp_https_ota in sync with master (v4.1)

See merge request espressif/esp-idf!7914
2020-03-11 14:46:25 +08:00
Ivan Grokhotkov
a003bcde29 Merge branch 'bugfix/idfpygenerator_v4.1' into 'release/v4.1'
tools: fix idf.py to be able to select a generator for build (v4.1)

See merge request espressif/esp-idf!7917
2020-03-10 22:22:47 +08:00
Michael (XIAO Xufeng)
492065463d Merge branch 'bugfix/put_spihost_handle_in_sram_v4.1' into 'release/v4.1'
spi: always put spihost handle in SRAM (backport v4.1)

See merge request espressif/esp-idf!7901
2020-03-10 14:22:32 +08:00
khuynh
85c15812c9 fix markdown table formatting
fixed markdown for a table in
`examples/peripherals/temp_sensor_esp32s2/README.md`

Merges https://github.com/espressif/esp-idf/pull/4609
2020-03-09 11:25:54 +01:00
Alexander Borsuk
ba43902fb8 Fixes compilation error on verbose level (IDFGH-2439)
Closes #4552

Merges https://github.com/espressif/esp-idf/pull/4786
2020-03-09 11:25:54 +01:00
Rusty Eddy
eda9d8ffa8 Added semi-colon to esp_event_loop_create(...)
Title sums it up.

Merges https://github.com/espressif/esp-idf/pull/4711
2020-03-09 11:17:08 +01:00
Mooli Tayer
f4c84ea2b2 Fix typo
Merges https://github.com/espressif/esp-idf/pull/4752
2020-03-09 11:17:08 +01:00
Jiang Jiang Jian
fefd64fa83 Merge branch 'Bugfix/netconn_marked_close_crash_for_v4.1' into 'release/v4.1'
lw-ip:fix bug for netconn marked close crash for v4.1

See merge request espressif/esp-idf!7896
2020-03-09 16:36:39 +08:00
Shubham Kulkarni
70b1ab76e8 esp_https_ota.c: Add errno check for WiFi disconnection while performing OTA 2020-03-09 13:26:36 +05:30
Shubham Kulkarni
6bc77d79a6 OTA: Add fix in case of URL redirection and a test case of URL redirection
Closes https://github.com/espressif/esp-idf/issues/4780
2020-03-09 13:26:36 +05:30
Shubham Kulkarni
4c09dc6270 OTA: Fixed OTA with chunked servers and added example_test with chunked server 2020-03-09 13:26:36 +05:30
Roland Dobai
570653bc7b tools: fix idf.py to be able to select a generator for build 2020-03-09 08:42:14 +01:00
Angus Gratton
2241dda536 Merge branch 'feature/netif_ppp_authtype_none_v4.1' into 'release/v4.1'
esp-netif: PPPoS fixes (v4.1)

See merge request espressif/esp-idf!7849
2020-03-09 13:34:16 +08:00
Michael (XIAO Xufeng)
a559d55379 Merge branch 'bugfix/spiflash_read_psram_v4.1' into 'release/v4.1'
spi_flash: Fix over-allocation and OOM crash when reading from SPI flash to PSRAM buffers (v4.1)

See merge request espressif/esp-idf!7877
2020-03-09 11:13:29 +08:00
Angus Gratton
c99eac2f0b Merge branch 'bugfix/aligned_alloc_without_poisoning_v4.1' into 'release/v4.1'
bugfix/heap: Make aligned alloc and aligned free available to all heap poisoning configurations (v4.1)

See merge request espressif/esp-idf!7898
2020-03-09 11:05:24 +08:00
xueyunfei
a1764ec5b0 fix bug for netconn marked close crash for v4.1 2020-03-09 02:54:20 +00:00
Felipe Neves
5ce7ec848c heap: pushed down all the aligned_alloc / free implementation 2020-03-08 23:17:05 +00:00
Felipe Neves
15cdd2859a heap: added aligned alloc implementation on multi_heap layer 2020-03-08 23:17:05 +00:00
Krzysztof Budzynski
a0abb4dfdc Merge branch 'bugfix/docs_ulp_reg_rd_wr_instructions_v4.1' into 'release/v4.1'
Correct ULP REG_WR and REG_RD instruction for ESP32

See merge request espressif/esp-idf!7869
2020-03-06 19:08:30 +08:00
Krzysztof Budzynski
f5b678f7ba Correct ULP REG_WR and REG_RD instruction for ESP32 2020-03-06 19:08:29 +08:00
morris
1af819d19b spi: always put spihost handle in SRAM
Closes https://github.com/espressif/esp-idf/issues/4635
2020-03-06 17:36:44 +08:00
Angus Gratton
408d1d9f93 Merge branch 'bugfix/cmake_convert_whitespace_v4.1' into 'release/v4.1'
cmake: Minor convert_to_cmake.py fixes (v4.1)

See merge request espressif/esp-idf!7875
2020-03-06 14:58:14 +08:00
Angus Gratton
f70dcd9ab5 Merge branch 'bugfix/modem_ppp_close_fix_4.1' into 'release/v4.1'
esp_modem.c: post PPP stop event when requested (v4.1)

See merge request espressif/esp-idf!7882
2020-03-06 14:31:06 +08:00
Michael (XIAO Xufeng)
a251485359 Merge branch 'bugfix/clean_pcnt_i2s_public_header_v4.1' into 'release/v4.1'
driver: clean pcnt.h i2s.h (backport v4.1)

See merge request espressif/esp-idf!7839
2020-03-06 14:05:33 +08:00
Jiang Jiang Jian
ee86ee0094 Merge branch 'feature/wpa3_testcases_support_v4.1' into 'release/v4.1'
esp_wifi: Support for additional WPA3 testcases (Backport v4.1)

See merge request espressif/esp-idf!7880
2020-03-06 12:23:43 +08:00
Anton Maklakov
5dbabae9dc Merge branch 'nimble/host_based_rpa_v4.1' into 'release/v4.1'
NimBLE: Support Host based privacy (RPA) feature in NimBLE host (backport v4.1)

See merge request espressif/esp-idf!7887
2020-03-06 11:02:22 +08:00
Prasad Alatkar
48fe9dfce7 NimBLE: Add Host based privacy (RPA) feature support (v4.1)
- This feature removes dependency on controller to use privacy (RPA)

Closes BT-519
2020-03-06 11:02:22 +08:00
Angus Gratton
5f2d918437 bootloader: Set the bootloader optimization level separately to the app
Change the default bootloader config to -Os to save size.

This is a useful feature because it allows switching between debug
and release configs in the app without also needing to account for a
size change in the bootloader.
2020-03-06 01:16:04 +05:30
Angus Gratton
32756b165e bootloader: Add fault injection resistance to Secure Boot bootloader verification
Goal is that multiple faults would be required to bypass a boot-time signature check.

- Also strengthens some address range checks for safe app memory addresses
- Change pre-enable logic to also check the bootloader signature before enabling SBV2 on ESP32

Add some additional checks for invalid sections:

- Sections only partially in DRAM or IRAM are invalid
- If a section is in D/IRAM, allow the possibility only some is in D/IRAM
- Only pass sections that are entirely in the same type of RTC memory region
2020-03-06 01:16:04 +05:30
Angus Gratton
74b299c4c7 secure boot: Encrypt the bootloader signature when enabling flash encryption + secure boot v2 2020-03-06 01:16:04 +05:30
Supreet Deshpande
27e9cb785a feat/secure_boot_v2: Adding docs for secure boot v2 ESP32-ECO3 2020-03-06 01:16:04 +05:30
Supreet Deshpande
60fed38c0f feat/secure_boot_v2: Adding secure boot v2 support for ESP32-ECO3 2020-03-06 01:16:04 +05:30
Ivan Grokhotkov
a66955b36a Merge branch 'bugfix/cmake_generators_v4.1' into 'release/v4.1'
tools: Force the order of cmake generators (v4.1)

See merge request espressif/esp-idf!7848
2020-03-05 20:17:32 +08:00
Jiang Jiang Jian
535b378869 Merge branch 'nimble/make_msys_1_configurable_v4.1' into 'release/v4.1'
NimBLE: Fix check for static random address & add MSYS_1 in menuconfig (backport v4.1)

See merge request espressif/esp-idf!7864
2020-03-05 18:00:28 +08:00
Prasad Alatkar
e36b3e0d04 NimBLE: Fix check for static random address & add MSYS_1 in menuconfig (v4.1)
Closes BT-522 & BT-523
2020-03-05 18:00:27 +08:00
Francesco Giancane
2afafe890a esp_modem.c: post PPP stop event when requested
When library users call esp_stop_ppp(), it is expected that the PPP link
is closed and the DCE is moved into command mode.

If the STOP event is not posted into the event loop, then the PPP stack
would not be turned off, resulting in the impossibility to switch into
command mode, as the modem is still sending PPP binary data.

Signed-off-by: Francesco Giancane <francesco.giancane@accenture.com>

Merges https://github.com/espressif/esp-idf/pull/4642
2020-03-05 09:23:21 +01:00
Mahavir Jain
e7c8a36d46 Merge branch 'bugfix/esp_tls_blocking_timeout_v4.1' into 'release/v4.1'
esp-tls: add timeout for blocking connection (v4.1)

See merge request espressif/esp-idf!7395
2020-03-05 16:06:35 +08:00
Island
0e21d1e372 Merge branch 'nimble/misc_host_flow_ctrl_changes_v4.1' into 'release/v4.1'
NimBLE: Misc changes in host flow control, ble_gap_unpair, ble_hs_hci_rx_evt, memory management & example (backport v4.1)

See merge request espressif/esp-idf!7857
2020-03-05 14:54:39 +08:00
Jiang Jiang Jian
96cd373265 Merge branch 'bugfix/btdm_assert_when_create_connection_cancel_v4.1' into 'release/v4.1'
components/bt: Fix assert when create conntion cancel

See merge request espressif/esp-idf!7817
2020-03-05 14:53:18 +08:00
Nachiket Kukade
00f0cdcc92 esp_wifi: Support for additional WPA3 testcases
1. Anti-Clogging Token Request support
2. Return correct status from SAE modules for invalid scenarios
3. Add PMK Caching support for WPA3
2020-03-05 12:15:03 +05:30
Angus Gratton
425486223e spi_flash: Remove 16KB free internal heap limit for esp_flash_read() into PSRAM
Allocation of the temporary internal buffer will now repeat until a small enough buffer can be
allocated, and only fail if less than a 256 byte block of internal RAM is free.

Adds unit test for the same, and generic test utility for creating memory pressure.
2020-03-05 17:10:22 +11:00
Angus Gratton
d6026823fa spi_flash: Fix over-allocation and OOM crash when reading from SPI flash to PSRAM buffers
Previously would try allocate buffer of minimum size 16KB not maximum size 16KB, causing
out of memory errors for any large reads, or if less than 16KB contiguous free heap.

Also, if using legacy API and internal allocation failed then implementation would abort()
instead of returning the error to the caller.

Added test for using large buffers in PSRAM.

Closes https://github.com/espressif/esp-idf/issues/4769

Also reported on forum: https://esp32.com/viewtopic.php?f=13&t=14304&p=55972
2020-03-05 17:10:22 +11:00
Angus Gratton
c57ba38d67 cmake: Add warnings that convert_to_cmake.py doesn't calculate component requirements
Any component which requires another component will need this manually
added to its CMakeLists.txt file.
2020-03-05 17:06:13 +11:00
Angus Gratton
250e219279 cmake: convert_to_cmake: Fix possible whitespace issues
As reported on forum:
https://esp32.com/viewtopic.php?f=2&t=13565&p=53476#p53453

split() with no arg will match any whitespace sequence not just
a single space, so takes care of case where two spaces are
inserted in the variable value.
2020-03-05 17:06:13 +11:00
David Cermak
233d4b94bd esp_tls: fail connection if esp_tls_conn_new() timeouts 2020-03-04 15:15:40 +00:00
David Cermak
d19c1c4b3c esp_tls: added connection timeout to esp_tls_conn_new_sync() 2020-03-04 15:15:40 +00:00
Jiang Jiang Jian
e7a33878bb Merge branch 'bugfix/backport_some_wifi_issues_0302' into 'release/v4.1'
esp_wifi: backport some wifi issues 0302 (backport v4.1)

See merge request espressif/esp-idf!7826
2020-03-04 15:36:31 +08:00
Hrishikesh Dhayagude
74c528d836 NimBLE: Use dynamic buffers instead of static memory.
The NimBLE host buffers that consume a significant amount of memory are
now allocated dynamically.
The advantage is that, the memory can be reclaimed in cases where BLE
is turned off and not required for the current boot cycle
2020-03-04 12:01:53 +05:30
Prasad Alatkar
c55689ca18 NimBLE: Misc changes in host flow control, ble_gap_unpair, ble_hs_hci_rx_evt & example (v4.1)
- Add menuconfig option for NimBLE host flow control
- Include changes in `blecent` example from upstream PR!702
- add ble_hs_lock in ble_gap_unpair Upstream PR!584
- ble_hs_hci_rx_evt, upstream PR!738

Closes https://github.com/espressif/esp-idf/issues/4243
2020-03-04 11:35:47 +05:30
Jiang Jiang Jian
b8c2fedec9 Merge branch 'bugfix/add_hostname_in_discover_packet_for_v4.1' into 'release/v4.1'
lw-ip:add host name in discover packet for v4.1

See merge request espressif/esp-idf!7842
2020-03-04 11:24:42 +08:00
David Cermak
23c5770156 esp_netif_lwip_ppp: fix posting ip-event data
Closes https://github.com/espressif/esp-idf/issues/4634
2020-03-03 15:00:37 +01:00
Axel Lin
4c668ff3d3 esp_netif_lwip_ppp: Allow esp_netif_ppp_set_auth set auth_type with NETIF_PPP_AUTHTYPE_NONE
The ppp_set_auth() is guard by #if PPP_AUTH_SUPPORT in lwIP, so
make it consistent. This also simplify the code a bit because the code
in #if PAP_SUPPORT guard and #if CHAP_SUPPORT guard are exactly the same.

Once NETIF_PPP_AUTHTYPE_NONE added to esp_netif_auth_type_t, it also allows
setting NETIF_PPP_AUTHTYPE_NONE with this change.

Signed-off-by: Axel Lin <axel.lin@gmail.com>

Merges https://github.com/espressif/esp-idf/pull/4639
2020-03-03 15:00:37 +01:00
Axel Lin
4a623798f1 esp_netif_ppp: Add NETIF_PPP_AUTHTYPE_NONE to esp_netif_auth_type_t
To allow setting auth_type to PPPAUTHTYPE_NONE, add NETIF_PPP_AUTHTYPE_NONE
to esp_netif_auth_type_t.
So even PAP/CHAP are enabled in lwIP, the application still can set
auth_type to PPPAUTHTYPE_NONE.

Signed-off-by: Axel Lin <axel.lin@gmail.com>
2020-03-03 15:00:37 +01:00
Roland Dobai
0f191c3366 tools: Force the order of cmake generators 2020-03-03 11:39:59 +01:00
morris
077d68c752 driver: clean pcnt.h i2s.h 2020-03-03 18:12:11 +08:00
xiehang
4d10eb20db esp_wifi: fix some WiFi bugs
Fix following WiFi bugs:
1. Fix crashing during shared WEP connection
2. Remove log "age_bss: null bss
3. Add WiFi stop checking at the beginning of wifi deinit api
4. Fix espnow crash
5. Fix the bug for setting channel when WiFi is no NULL mode
6. Adjust scheme percent when BT is in connected status
7. Fix WiFi stop leads to memory leak
8. Place the Vendor Specific Element at the end of WiFi packet
2020-03-03 14:49:36 +08:00
xueyunfei
94327c10ed add host name in discover packet for v4.1 2020-03-03 14:25:47 +08:00
Jiang Jiang Jian
328c659cd3 Merge branch 'feat/ble_mesh_update_4.1' into 'release/v4.1'
Feat/ble mesh update 4.1

See merge request espressif/esp-idf!7798
2020-03-02 15:33:05 +08:00
lly
8e34adb94c ble_mesh: Calc incomplete timeout based on msg info 2020-03-02 02:08:13 +00:00
lly
7d41eb6f52 ble_mesh: Start the timer when starting to send the client message 2020-03-02 02:08:13 +00:00
lly
2a014db549 ble_mesh: No timeout for client message to non-unicast address 2020-03-02 02:08:13 +00:00
lly
6c207ea6d2 ble_mesh: Unify client application and lower transport layer timeout 2020-03-02 02:08:13 +00:00
lly
2611e23bd2 ble_mesh: Allow maximum 377 octets payload 2020-03-02 02:08:13 +00:00
lly
4b2ef7303e ble_mesh: Reset transport info when node is removed 2020-03-02 02:08:13 +00:00
lly
21af266a11 ble_mesh: Provisioner ignores msg from removed node 2020-03-02 02:08:13 +00:00
lly
711c8472fc ble_mesh: Miscellaneous modifications
1. Add an API to set Provisioner static oob value
2. Add an API to deinit BLE Mesh stack
3. Add an API to set Provisioner unicast address
4. Add an API to provision devices with fixed address
5. Add an API to store node composition data
6. Add an API to get node with device uuid
7. Add an API to get node with unicast address
8. Add an API to delete node with device uuid
9. Add an API to delete node with unicast address
10. Add an API for Provisioner to update local AppKey
11. Add an API for Provisioner to update local NetKey
12. Support Provisioner persistent functionality
13. Fix Provisioner entering IV Update procedure
14. Fix an issue which may cause client failing to send msg
15. Use bt_mesh.flags to indicate device role
16. Remove several useless macros
17. Callback RSSI of received mesh provisioning packets
18. Modify the Provisioner disable function
19. Change some log level from debug to info
20. Add parameters to Provisioner bind AppKey completion event
21. Fix node ignoring relay messages issue
22. Support using a specific partition for BLE Mesh
23. Fix compile warning when proxy related macros are disabled
24. Clean up BLE Mesh stack included header files
25. NULL can be input if client message needs no parameters
26. Fix compile warning when BT log is disabled
27. Initilize BLE Mesh stack local variables
28. Support using PSRAM for BLE Mesh mutex, queue and task
29. Add a menuconfig option to enable using memory from PSRAM
30. Clean up sdkconfig.defaults of BLE Mesh examples
2020-03-02 02:08:13 +00:00
Krzysztof Budzynski
df06f7d715 Merge branch 'bugfix/doc_remove_cmake_defconfig_v4.1' into 'release/v4.1'
Doc: replace defconfig with reconfigure (v4.1)

See merge request espressif/esp-idf!7687
2020-03-02 05:09:38 +08:00
Jiang Jiang Jian
a280f0a9ba Merge branch 'bugfix/IPV6_multicast_adress_error_for_v4.1' into 'release/v4.1'
lw-ip:fix ipv6 bug when input the wrong broadcast for v4.1

See merge request espressif/esp-idf!7804
2020-02-29 17:06:56 +08:00
Jiang Jiang Jian
9177f5d32e Merge branch 'feature/doc_feedback_links_v4.1' into 'release/v4.1'
docs: Include feedback link in footer (v4.1)

See merge request espressif/esp-idf!7820
2020-02-29 16:57:49 +08:00
Michael (XIAO Xufeng)
4045dc8508 Merge branch 'bugfix/nec_example_v4.1' into 'release/v4.1'
bugfix in NEC example and low level function  (v4.1)

See merge request espressif/esp-idf!7635
2020-02-29 02:56:12 +08:00
Krzysztof
f4f2724a4e Include feedback link in footer 2020-02-29 00:32:35 +08:00
baohongde
dbc0a9b3f4 components/bt: Fix assert when create conntion cancel 2020-02-28 20:23:39 +08:00
Jiang Jiang Jian
83fc174310 Merge branch 'bugfix/btdm_div_by_zero_in_slp_clk_conversion_for_v4.1' into 'release/v4.1'
bugfix/btdm_div_by_zero_in_slp_clk_conversion_for_v4.1(backport v4.1)

See merge request espressif/esp-idf!7786
2020-02-28 17:19:41 +08:00
wangmengyang
6fad6eb9f1 component/bt: set non-zero initial value for bt sleep clock cycle to avoid div-by-zero error in function "btdm_us_2_lpcycles" when BT modem sleep is not enabled 2020-02-28 14:08:47 +08:00
xueyunfei
9c5067a998 fix ipv6 bug when input the wrong broadcast for v4.1 2020-02-27 17:13:03 +08:00
Krzysztof Budzynski
3b16089cb2 Merge branch 'bugfix/doc_python3_v4.1' into 'release/v4.1'
Docs: Encourage to use Python 3 (v4.1)

See merge request espressif/esp-idf!7782
2020-02-27 01:48:23 +08:00
Roland Dobai
de3eed647f Docs: Encourage to used Python 3 2020-02-26 09:11:13 +01:00
Michael (XIAO Xufeng)
c4654298ce Merge branch 'bugfix/add_missing_ledc_set_pin_declaration_v4.1' into 'release/v4.1'
Bugfix: Add missing ledc_set_pin declaration in led.h (v4.1)

See merge request espressif/esp-idf!7372
2020-02-26 15:20:40 +08:00
Jiang Jiang Jian
9c8c6b5cd5 Merge branch 'bugfix/sntp_init_can_run_before_net_connection_v4.1' into 'release/v4.1'
lw_ip: Add to sys_arch_protect() a check that the mutex is created before use if not then creates it (v4.1)

See merge request espressif/esp-idf!7756
2020-02-26 11:30:09 +08:00
Jiang Jiang Jian
dc8701601d Merge branch 'bugfix/esp_netif_pppos_dce_off_v4.1' into 'release/v4.1'
pppos_client: Fix power_down dce immediately after got IP (v4.1)

See merge request espressif/esp-idf!7398
2020-02-26 11:29:18 +08:00
Jiang Jiang Jian
402a118299 Merge branch 'bugfix/btdm_check_EXT_CRYS_state_for_sleep_clk_for_v4.1' into 'release/v4.1'
bugfix/btdm_check_EXT_CRYS_state_for_sleep_clk(backport v4.1)

See merge request espressif/esp-idf!7748
2020-02-25 17:55:31 +08:00
KonstantinKondrashov
5487700bf1 lwip: Add to sys_arch_protect() a check that the mutex is created before use if not then creates it
Closes: https://github.com/espressif/esp-idf/issues/944
Closes: https://github.com/espressif/esp-idf/issues/3931
Closes: WIFI-1019
2020-02-24 15:48:27 +08:00
wangmengyang
cd492747e1 component/bt: fall back to main XTAL as Bluetooth sleep clock when EXT 32K CRYS is configured but not detected 2020-02-24 12:22:35 +08:00
Jiang Jiang Jian
9cdbda325a Merge branch 'bugfix/btdm_backports_v4.1_0220' into 'release/v4.1'
components/bt: backports to release/v4.1

See merge request espressif/esp-idf!7716
2020-02-21 14:57:16 +08:00
Jiang Jiang Jian
9bf147515c Merge branch 'bugfix/fix_sniffer_bug_caused_by_mode_switch_v4.1' into 'release/v4.1'
Fix sniffer bug caused by mode switch  (backport v4.1)

See merge request espressif/esp-idf!7690
2020-02-21 14:53:56 +08:00
Jiang Jiang Jian
3a9750746f Merge branch 'bugfix/add_option_to_ipv6_stateless_address_configuration_v4.1' into 'release/v4.1'
lw-ip: Add option to ipv6 stateless address configuration (backport v4.1)

See merge request espressif/esp-idf!7699
2020-02-21 14:53:32 +08:00
Mahavir Jain
0809136836 Merge branch 'bugfix/esp_log_timestamp_v4.1' into 'release/v4.1'
Use proper API to get Tick Count is esp_log_timestamp (v4.1)

See merge request espressif/esp-idf!7717
2020-02-20 21:11:10 +08:00
Shubham Kulkarni
124b735ac5 log: Check for ISR context and use proper API to get Tick Count 2020-02-20 15:38:08 +05:30
baohongde
a74d85945a components/bt: backports to release/v4.1
Fix bugs about role switch
Fix watchdog timeout when sleep enabled and crash without enabling sw coex
Fix ble crash issue triggered by ble event irq miss(0x20000)
Future events scheduling error in case of wifi and bluetooth.
2020-02-20 17:53:40 +08:00
xiehang
ce4334f4bf lwip: Enable IPv6 stateless address autoconfiguration 2020-02-20 14:44:49 +08:00
Jiang Jiang Jian
5c217d8bb6 Merge branch 'bugfix/coex_a2dp_stuck_after_creating_another_connection_v4.1' into 'release/v4.1'
components/coex: Fix a2dp stuck after creating another connection

See merge request espressif/esp-idf!7662
2020-02-20 14:16:53 +08:00
Jiang Jiang Jian
0664f82431 Merge branch 'bugfix/coex_fix_misspell_in_kconfig_v4.1' into 'release/v4.1'
components/coex: Fix misspell in Kconfig

See merge request espressif/esp-idf!7671
2020-02-20 14:15:53 +08:00
xiehang
0350ea5744 esp_wifi: Small refactor for ic_set_vif 2020-02-20 12:22:52 +08:00
Sergei Silnov
145682b854 Doc: replace defconfig with reconfigure
Closes https://github.com/espressif/esp-idf/issues/3965
2020-02-19 17:06:43 +01:00
baohongde
1e54e5ddef components/coex: Fix misspell in Kconfig 2020-02-19 11:43:53 +08:00
Angus Gratton
3f4da83520 Merge branch 'bugfix/kconfig_cmake_escape_v4.1' into 'release/v4.1'
confgen.py: Escape special characters for cmake (v4.1)

See merge request espressif/esp-idf!7645
2020-02-19 08:00:53 +08:00
Jiang Jiang Jian
8609b3730d Merge branch 'bugfix/unified_prov_bluedroid_v4.1' into 'release/v4.1'
Unified Provisioning - BLE: Fix characteristics read response issue (backport v4.1)

See merge request espressif/esp-idf!7652
2020-02-18 20:57:22 +08:00
Jiang Jiang Jian
e8d33e4faf Merge branch 'bugfix/ble_mesh_fix_compile_error_with_cpp_4.1' into 'release/v4.1'
ble_mesh: Fix compile error with c++ files (v4.1)

See merge request espressif/esp-idf!7583
2020-02-18 20:43:51 +08:00
baohongde
8908d52efa components/coex: Fix a2dp stuck after creating another connection 2020-02-18 20:13:41 +08:00
Hrishikesh Dhayagude
5a244bc935 Unified Provisioning - BLE: Fix characteristics read response issue
Fix the issue when number of bytes to be read is an exact multiple of [MTU-1]
2020-02-18 15:11:51 +05:30
Roland Dobai
ea35218d2a confgen.py: Escape special characters for cmake
Closes https://github.com/espressif/esp-idf/issues/4751
2020-02-18 09:55:30 +01:00
Ivan Grokhotkov
d01af529f6 Merge branch 'bugfix/idf_tools_pylauncher_v4.1' into 'release/v4.1'
idf_tools.py: fix typo in __PYVENV_LAUNCHER__ env variable name (backport v4.1)

See merge request espressif/esp-idf!7478
2020-02-18 16:24:56 +08:00
Jiang Jiang Jian
3b86e7e099 Merge branch 'bugfix/change_hci_task_size_back_v4.1' into 'release/v4.1'
components/bt: change HCI task size back

See merge request espressif/esp-idf!7568
2020-02-18 12:52:10 +08:00
morris
bd8baba0dc rmt: fix missing 0x in rmt_ll.h
Closes https://github.com/espressif/esp-idf/issues/4760
2020-02-18 10:54:03 +08:00
DeeFuse
8954c989f4 Update ir_builder_rmt_nec.c
fixes standard protocol mode wich would fail due to integer promotion in inversion

Merges https://github.com/espressif/esp-idf/pull/4750
2020-02-18 10:53:49 +08:00
DeeFuse
f6c90adb42 Update ir_protocols_main.c
RMT write should be non-blocking to wait the correct time for sending the repeat frame
2020-02-18 10:53:37 +08:00
Ivan Grokhotkov
a0ebe4d18c Merge branch 'bugfix/ulp_s2_linux_32bit_v4.1' into 'release/v4.1'
tools: mark ULP toolchain as not available on 32-bit Linux (backport v4.1)

See merge request espressif/esp-idf!7476
2020-02-15 00:53:04 +08:00
Ivan Grokhotkov
eb11a748e7 Merge branch 'feature/idf_docker_updates_v4.1' into 'release/v4.1'
Enable ccache and use newer CMake in Docker image (backport v4.1)

See merge request espressif/esp-idf!7481
2020-02-15 00:52:47 +08:00
Ivan Grokhotkov
c8e605cd71 Merge branch 'bugfix/idf_fullclean_loses_target_v4.1' into 'release/v4.1'
idf.py: guess IDF_TARGET from sdkconfig/sdkconfig.defaults, error out if IDF_TARGET is inconsistent (backport v4.1)

See merge request espressif/esp-idf!7601
2020-02-15 00:52:22 +08:00
Ivan Grokhotkov
0f9e14de9a Merge branch 'bugfix/smtp_strict_prototypes_fix_v4.1' into 'release/v4.1'
ci: re-add the lost PEDANTIC_{C,CXX}FLAGS in CMake example builds (backport v4.1)

See merge request espressif/esp-idf!7599
2020-02-15 00:52:02 +08:00
Jiang Jiang Jian
73fd009d40 Merge branch 'bugfix/btdm_hfp_ag_crash_in_unknown_at_cmd_v4.1' into 'release/v4.1'
components/bt: Fix connection fail and crash when receive unknown AT cmd

See merge request espressif/esp-idf!7405
2020-02-14 19:46:49 +08:00
Ivan Grokhotkov
17afd49e01 Merge branch 'bugfix/doc_sphinxcontrib_dep_v4.1' into 'release/v4.1'
Docs: Fix sphinxcontrib dependencies

See merge request espressif/esp-idf!7598
2020-02-14 17:21:07 +08:00
Ivan Grokhotkov
8cdb2538d3 Merge branch 'bugfix/win_tools_installer_fixes_v4.1' into 'release/v4.1'
docs: Windows tools installer release v2.3 (v4.1)

See merge request espressif/esp-idf!7560
2020-02-14 17:16:02 +08:00
Jiang Jiang Jian
cbd24259b2 Merge branch 'bugfix/btdm_error_type_in_config_eir_evt_v4.1' into 'release/v4.1'
components/bt: Fix error EIR type in config eir event

See merge request espressif/esp-idf!7406
2020-02-14 16:38:25 +08:00
Jiang Jiang Jian
9aa61d634b Merge branch 'bugfix/wifi_clear_phy_status_when_cpu_start_v4.1' into 'release/v4.1'
soc: clear PHY status when cpu start (backport v4.1)

See merge request espressif/esp-idf!7590
2020-02-14 11:34:38 +08:00
Ivan Grokhotkov
e547329935 ci: fix build system test on macOS
Replaces ${var^^} expansion supported with Bash >= 4 with 'tr'
2020-02-13 19:11:17 +01:00
Ivan Grokhotkov
6ae3311f48 idf.py: fail and show instructions on IDF_TARGET mismatch
Closes IDF-869
2020-02-13 19:10:41 +01:00
Ivan Grokhotkov
1adf837577 docs: update build system guide on setting IDF_TARGET 2020-02-13 19:10:41 +01:00
Ivan Grokhotkov
b76a10dd4f idf.py: guess IDF_TARGET from sdkconfig if CMakeCache doesn't exist
This solves the issue that target is changed to the default one after
idf.py fullclean.

Also allow setting the default target using sdkconfig.defaults, e.g.
CONFIG_IDF_TARGET="esp32s2"

Closes IDF-1040
2020-02-13 19:05:10 +01:00
Ivan Grokhotkov
911f931ccb ci: re-add the lost PEDANTIC_{C,CXX}FLAGS in CMake example builds 2020-02-13 18:51:56 +01:00
Roland Dobai
c74521f06d Docs: Fix sphinxcontrib dependencies 2020-02-13 14:50:31 +01:00
Xia Xiaotian
317f0d496a soc: clear PHY status when cpu start 2020-02-13 14:25:32 +08:00
Jiang Jiang Jian
ca735340f9 Merge branch 'bugfix/ble_mesh_utf_8_comma_4.1' into 'release/v4.1'
ble_mesh: Kconfig included a UTF-8 comma (v4.1)

See merge request espressif/esp-idf!7575
2020-02-13 11:12:17 +08:00
lly
45af9bf3ec ble_mesh: Fix compile error with c++ files 2020-02-13 09:46:54 +08:00
Ivan Grokhotkov
cdd3f6e8e7 Merge branch 'bugfix/spiffs_case_when_use_mtime_is_not_set_v4.1' into 'release/v4.1'
spiffs: Fix for case when CONFIG_SPIFFS_USE_MTIME is not defined (v4.1)

See merge request espressif/esp-idf!7573
2020-02-13 07:04:44 +08:00
lly
7acdc2f7fc ble_mesh: Kconfig included a UTF-8 comma 2020-02-12 18:25:43 +08:00
KonstantinKondrashov
c6c18ef2e8 spiffs: Fix for case when CONFIG_SPIFFS_USE_MTIME is not defined
Closes: 2c793cef06
2020-02-12 18:12:58 +08:00
Ivan Grokhotkov
9eec899f49 Merge branch 'bugfix/ci_no_attempts_no_custom_toolchain_url_v4.1' into 'release/v4.1'
ci: no stage attempts variables, no custom toolchain url (backport v4.1)

See merge request espressif/esp-idf!7543
2020-02-12 17:55:37 +08:00
Ivan Grokhotkov
549d026dc3 Merge branch 'bugfix/idf_tools_virtualenv_v4.1' into 'release/v4.1'
idf_tools.py: fix install-python-env failure with virtualenv 20.0.0 (backport v4.1)

See merge request espressif/esp-idf!7552
2020-02-12 17:32:15 +08:00
blueMoods
9ebdcf5b37 components/bt: change HCI task size back 2020-02-12 16:32:56 +08:00
Jiang Jiang Jian
a0d7dd770c Merge branch 'feature/esp32_5p0_backport_v4p1' into 'release/v4.1'
code optimize backport to v4.1

See merge request espressif/esp-idf!7558
2020-02-12 15:20:18 +08:00
june
21c1682a7a backport code optimize, mr !7409 2020-02-12 11:50:52 +08:00
Ivan Grokhotkov
4541e065e4 docs: update version of IDF tools installer for windows to v2.3 2020-02-12 10:26:34 +11:00
Ivan Grokhotkov
81298c3f70 idf_tools.py: fix install-python-env failure with virtualenv 20.0.0
--no-site-packages is the default behavior since virtualenv 1.7
(released in Nov 2011). This option was removed in virtualenv 20.0.
2020-02-11 09:43:27 +01:00
Angus Gratton
33069f3133 Merge branch 'bugfix/part_gen_subtype_fix_v4.1' into 'release/v4.1'
partition_table: Fix subtype in gen_esp32part.py (v4.1)

See merge request espressif/esp-idf!7535
2020-02-11 12:06:41 +08:00
Angus Gratton
04f589b1c7 Merge branch 'bugfix/remove_cjson_test_file_from_cmake_build_v4.1' into 'release/v4.1'
cJSON: include only source file objects for cmake build (v4.1)

See merge request espressif/esp-idf!7545
2020-02-11 11:57:26 +08:00
Angus Gratton
901ae4d11c Merge branch 'bugfix/newlib_nano_lib_linking_v4.1' into 'release/v4.1'
esp_rom: link newlib nano from ROM only if SPIRAM cache workaround is disabled (v4.1)

See merge request espressif/esp-idf!7544
2020-02-11 11:56:11 +08:00
Mahavir Jain
bdf8df61c0 Merge branch 'bugfix/stage_two_bootloader_linking_v4.1' into 'release/v4.1'
Fixes accessing some files from 2nd part of the bootloader. (v4.1)

See merge request espressif/esp-idf!7541
2020-02-10 20:54:34 +08:00
Mahavir Jain
d41f3cc759 cJSON: include only source file objects for cmake build
Test file can cause build issues in some cases, since it has its own main() function
2020-02-10 17:32:14 +05:30
Mahavir Jain
1ae9541176 esp_rom: link newlib nano from ROM only if SPIRAM cache workaround is disabled 2020-02-10 17:30:25 +05:30
Anton Maklakov
224c221ddd ci: remove using IDF_XTENSA_TOOLCHAIN_URL because there are idf_tools.json and multi-target support 2020-02-10 18:46:42 +07:00
Anton Maklakov
2ad0e78210 ci: Use ARTIFACT_DOWNLOAD_ATTEMPTS and others from the project settings 2020-02-10 18:46:37 +07:00
Supreet Deshpande
546cf10c5d Fixes accessing some files from 2nd part of the bootloader. 2020-02-10 16:33:02 +05:30
boarchuz
994e632a59 Fix subtype in PartitionTable.find_by_type
Fix ptype->subtype

Closes https://github.com/espressif/esp-idf/pull/4723
2020-02-10 08:37:10 +01:00
Angus Gratton
5799999e41 Merge branch 'bugfix/esp_timer_stucks_into_esp_timer_impl_set_alarm_v4.1' into 'release/v4.1'
esp_timer/esp32: Fix esp_timer_impl_set_alarm() when CPU and APB freqs are changed (v4.1)

See merge request espressif/esp-idf!7507
2020-02-10 13:43:05 +08:00
Angus Gratton
4e1c41c7e1 Merge branch 'bugfix/doc_nwdiag_v4.1' into 'release/v4.1'
docs: Fix nwdiag dependency for documentation build (v4.1)

See merge request espressif/esp-idf!7515
2020-02-07 06:29:23 +08:00
Roland Dobai
371565be3e docs: Fix nwdiag dependency for documentation build 2020-02-06 17:51:47 +01:00
KonstantinKondrashov
12353ff3d8 esp_timer/esp32: Fix case when alarm_reg > counter_reg but FRC_TIMER_INT_STATUS is not set
Closes: WIFI-1576
Closes: https://github.com/espressif/esp-idf/issues/2954
2020-02-06 14:43:40 +08:00
Angus Gratton
fc1119331a Merge branch 'bugfix/wps_config_init_v4.1' into 'release/v4.1'
WPS_CONFIG_INIT_DEFAULT(type) error

See merge request espressif/esp-idf!7443
2020-02-06 14:07:19 +08:00
Hrudaynath Dhabe
7d30c6d799 WPS_CONFIG_INIT_DEFAULT(type) error 2020-02-06 14:07:14 +08:00
Angus Gratton
73384c1b52 Merge branch 'bugfix/idf_monitor_usbser_sys_v4.1' into 'release/v4.1'
tools: work around usbser.sys bug in IDF monitor (v4.1)

See merge request espressif/esp-idf!7469
2020-01-31 15:59:59 +08:00
Axel Lin
c67c3aa14e pppos_client: Fix power_down dce immediately after got IP
This was accidently commited bug when convert to use esp-netif, fix it.

Fixes: 25913af2cc ("pppos_client: udated example code to use esp-netif in PPP configuration")
Signed-off-by: Axel Lin <axel.lin@gmail.com>

Merges https://github.com/espressif/esp-idf/pull/4618
2020-01-30 12:00:23 +00:00
Ivan Grokhotkov
70dee9f4bb tools/docker: enable ccache by default 2020-01-30 12:09:08 +01:00
Ivan Grokhotkov
bf6e745ac0 tools/docker: install CMake version provided in tools.json
Closes https://github.com/espressif/esp-idf/issues/4644
Closes IDFGH-2559
2020-01-30 12:09:08 +01:00
Ivan Grokhotkov
e89392596c idf_tools.py: fix typo in __PYVENV_LAUNCHER__ env variable name
Fixes the workaround added in 9279b72a6.
2020-01-30 11:51:59 +01:00
Ivan Grokhotkov
a8bec381bc tools: mark ULP toolchain as not available on 32-bit Linux
Also install ULP toolchain by default on ARM Linux.

Closes https://github.com/espressif/esp-idf/issues/4621
2020-01-30 11:49:39 +01:00
Ivan Grokhotkov
4f46828464 Merge branch 'bugfix/http_client_chunked_test_v4.1' into 'release/v4.1'
http_client: fix example test to expect -1 as content-len for chunked transfer (v4.1)

See merge request espressif/esp-idf!7456
2020-01-30 18:35:49 +08:00
Rosa Elena Veiga Otero
15011e0d16 tools: work around usbser.sys bug in idf_monitor
implemented workaround in idf_monitor for known usbser.sys bug which
causes changes in RTS signal to only be sent if DTR signal also changes.
Works by forcing a dummy change in DTR signal (re-assigning its current
value, as it has previously been done in the flashing tool)

Closes https://github.com/espressif/esp-idf/pull/4676
2020-01-29 10:23:24 +01:00
David Cermak
7261e72ef7 http_client: fix example test to expect -1 as content-len for chunked transfer 2020-01-27 10:36:32 +01:00
Angus Gratton
aedf89237f Merge branch 'bugfix/select_driver_not_installed_v4.1' into 'release/v4.1'
VFS: Check in select() if the UART driver is installed or not (v4.1)

See merge request espressif/esp-idf!7416
2020-01-22 11:55:09 +08:00
Angus Gratton
7848dd949f Merge branch 'bugfix/backport_several_ethernet_bugfix' into 'release/v4.1'
Ethenret driver bugfix and optimization (4.1)

See merge request espressif/esp-idf!7427
2020-01-22 11:54:51 +08:00
Angus Gratton
ba26fdba4c Merge branch 'fix/ci_target_test_v4.1' into 'release/v4.1'
ci: Fix target variable default value (backport v4.1)

See merge request espressif/esp-idf!7425
2020-01-22 11:48:30 +08:00
morris
1a3bb06916 ethernet: always put eth_driver handle in SRAM
Closes https://github.com/espressif/esp-idf/issues/4635
2020-01-21 21:45:24 +08:00
morris
274b0b8d8a ethernet: work with cache disabled
add ETH_MAC_FLAG_WORK_WITH_CACHE_DISABLE flag, make ethenret driver
possible to work when cache disabled

Closes https://github.com/espressif/esp-idf/issues/4406
2020-01-21 21:45:04 +08:00
Shivani Tipnis
9dcb48b86b ci: Fix target variable default value
(cherry picked from commit 3748e06108bd3067b36c3b605feb6aaf438d98eb)
2020-01-21 17:55:23 +05:30
Mahavir Jain
ee42e3d714 Merge branch 'nimble/example_update_doc_v4.1' into 'release/v4.1'
NimBLE: Update the documentation link in the examples (v4.1)

See merge request espressif/esp-idf!7367
2020-01-21 17:56:32 +08:00
Roland Dobai
c2a4dd0c68 VFS: Check in select() if the UART driver is installed or not
Closes https://github.com/espressif/esp-idf/issues/4627
2020-01-21 10:04:38 +01:00
Jiang Jiang Jian
3733c9f8e5 Merge branch 'bugfix/btdm_hci_timeout_v4.1' into 'release/v4.1'
Bugfix/btdm hci timeout v4.1

See merge request espressif/esp-idf!7339
2020-01-21 10:33:46 +08:00
baohongde
38ff669727 components/bt: Fix error EIR type in config eir event 2020-01-20 21:47:23 +08:00
baohongde
c324e7a435 components/bt: Fix connection fail and crash when receive unknown AT cmd 2020-01-20 21:43:23 +08:00
Jiang Jiang Jian
c62d5e942e Merge branch 'bugfix/enable_ipv6_address_autoconfig_v4.1' into 'release/v4.1'
lw-ip: Enable IPv6 stateless address autoconfiguration (backport v4.1)

See merge request espressif/esp-idf!7381
2020-01-20 21:09:19 +08:00
Tian Hao
3e4e538087 fix bug sleep may cause HCI timeout
When Host run different cpu and sleep enable, it may cause hci
timeout about 10s.
2020-01-20 17:41:28 +08:00
xiehang
b99a39535b lwip: Enable IPv6 stateless address autoconfiguration 2020-01-20 08:26:00 +00:00
Tian Hao
f6523748fc fix Kconfig use mistake cause some config not effect
1. Fix bluedroid task pinned_to_core un-effected
2. other minor sdkconfig bugs
2020-01-20 15:24:41 +08:00
Jiang Jiang Jian
09b4bb5eba Merge branch 'bugfix/backport_some_wifi_bugs_0120_v4.1' into 'release/v4.1'
Bugfix/backport some wifi bugs 0120 v4.1

See merge request espressif/esp-idf!7390
2020-01-20 13:56:00 +08:00
Jiang Jiang Jian
e751c59d5d Merge branch 'bugfix/backport_some_controller_bugs_0120_v4.1' into 'release/v4.1'
Bugfix/backport some controller bugs 0120 v4.1

See merge request espressif/esp-idf!7391
2020-01-20 13:55:40 +08:00
June
c0e1f83a91 esp32 5p0 new features support 2020-01-20 12:18:55 +08:00
weitianhua
fd61f75db9 hfp disconn issue for bridgera 2020-01-20 12:18:26 +08:00
xiehang
abe0225ef5 esp_wifi:Fix double recycle bar crash issue 2020-01-20 12:10:48 +08:00
Hrudaynath Dhabe
b530b26e1b esp_wifi: esp_wifi_sta_get_ap_info function returns actual values of group cipher and pairwise cipher 2020-01-20 12:10:06 +08:00
Angus Gratton
51e208533e Merge branch 'bugfix/update_kconfiglib_v4.1' into 'release/v4.1'
tools: Update kconfiglib to 13.7.1 (v4.1)

See merge request espressif/esp-idf!7340
2020-01-20 09:23:10 +08:00
Paul Abbott
c014d32193 Bugfix(LEDC): Add missing ledc_set_pin declaration in led.h 2020-01-17 10:19:15 +08:00
Hrishikesh Dhayagude
19980ace1f NimBLE: Update the documentation link in the examples 2020-01-16 18:00:18 +05:30
3616 changed files with 106890 additions and 573654 deletions

View File

@@ -141,17 +141,15 @@ exclude =
__pycache__,
# submodules
components/bootloader/subproject/components/micro-ecc/micro-ecc,
components/bt/host/nimble/nimble,
components/esptool_py/esptool,
components/expat/expat,
components/json/cJSON,
components/libsodium/libsodium,
components/mbedtls/mbedtls,
components/nghttp/nghttp2,
components/tinyusb,
components/bt/host/nimble/nimble,
components/unity/unity,
examples/build_system/cmake/import_lib/main/lib/tinyxml2,
examples/peripherals/secure_element/atecc608_ecdsa/components/esp-cryptoauthlib,
# other third-party libraries
tools/kconfig_new/kconfiglib.py,
tools/kconfig_new/menuconfig.py,
@@ -164,4 +162,4 @@ exclude =
components/wifi_provisioning/python/wifi_config_pb2.py,
components/wifi_provisioning/python/wifi_constants_pb2.py,
components/esp_local_ctrl/python/esp_local_ctrl_pb2.py,
examples/provisioning/legacy/custom_config/components/custom_provisioning/python/custom_config_pb2.py,
examples/provisioning/custom_config/components/custom_provisioning/python/custom_config_pb2.py,

View File

@@ -38,7 +38,7 @@ If the issue cannot be solved after the steps before, please follow these instru
- Development Kit: [ESP32-Wrover-Kit|ESP32-DevKitC|ESP32-PICO-Kit|ESP32-LyraT|ESP32-LyraTD-MSC|none]
- Kit version (for WroverKit/PicoKit/DevKitC): [v1|v2|v3|v4]
- Module or chip used: [ESP32-WROOM-32|ESP32-WROOM-32D|ESP32-WROOM-32U|ESP32-WROVER|ESP32-WROVER-I|ESP32-WROVER-B|ESP32-WROVER-IB|ESP32-SOLO-1|ESP32-PICO-D4|ESP32]
- IDF version (run ``git describe`` to find it):
- IDF version (run ``git describe --tags`` to find it):
// v3.2-dev-1148-g96cd3b75c
- Build System: [Make|CMake|idf.py]
- Compiler version (run ``xtensa-esp32-elf-gcc --version`` to find it):

View File

@@ -13,7 +13,7 @@ jobs:
runs-on: ubuntu-latest
strategy:
matrix:
python-version: [2.7, 3.5, 3.6, 3.7, 3.8]
python-version: [2.7, 3.5, 3.6, 3.7]
steps:
- name: Checkout
@@ -24,10 +24,9 @@ jobs:
python-version: ${{ matrix.python-version }}
- name: Install dependencies
run: |
export IDF_PATH=${GITHUB_WORKSPACE}
pip install --upgrade pip
pip install -r requirements.txt
- name: Lint with flake8
run: |
pip install flake8
flake8 . --config=.flake8 --benchmark
flake8 . --config=.flake8

19
.gitignore vendored
View File

@@ -27,7 +27,13 @@ examples/**/sdkconfig.old
examples/**/build
# Doc build artifacts
docs/_build/
docs/*/_build/
docs/*/doxygen-warning-log.txt
docs/*/sphinx-warning-log.txt
docs/*/sphinx-warning-log-sanitized.txt
docs/*/xml/
docs/*/xml_in/
docs/*/man/
docs/doxygen_sqlite3.db
# Downloaded font files
@@ -40,15 +46,6 @@ tools/unit-test-app/sdkconfig.old
tools/unit-test-app/build
tools/unit-test-app/builds
tools/unit-test-app/output
tools/unit-test-app/test_configs
# Unit Test CMake compile log folder
log_ut_cmake
# test application build files
tools/test_apps/**/build
tools/test_apps/**/sdkconfig
tools/test_apps/**/sdkconfig.old
# IDF monitor test
tools/test_idf_monitor/outputs
@@ -82,4 +79,4 @@ flake8_output.txt
build
# lock files for examples and components
dependencies.lock
dependencies.lock

View File

@@ -6,19 +6,7 @@ stages:
- target_test
- post_check
- deploy
- post_deploy
# pipelines will not be created in such two cases:
# 1. MR push
# 2. push not on "master/release" branches, and not tagged
# This behavior could be changed after the `rules: changes` feature is implemented
workflow:
rules:
- if: '$CI_PIPELINE_SOURCE == "merge_request_event"'
when: never
- if: '$CI_COMMIT_REF_NAME != "master" && $CI_COMMIT_BRANCH !~ /^release\/v/ && $CI_COMMIT_TAG !~ /^v\d+\.\d+(\.\d+)?($|-)/ && $CI_PIPELINE_SOURCE == "push"'
when: never
- when: always
- post_check
variables:
# System environment
@@ -45,23 +33,19 @@ variables:
# tell build system do not check submodule update as we download archive instead of clone
IDF_SKIP_CHECK_SUBMODULES: 1
UNIT_TEST_BUILD_SYSTEM: cmake
EXAMPLE_TEST_BUILD_SYSTEM: cmake
IDF_PATH: "$CI_PROJECT_DIR"
BATCH_BUILD: "1"
V: "0"
APPLY_BOT_FILTER_SCRIPT: "$CI_PROJECT_DIR/tools/ci/apply_bot_filter.py"
CHECKOUT_REF_SCRIPT: "$CI_PROJECT_DIR/tools/ci/checkout_project_ref.py"
# Docker images
# Docker images
BOT_DOCKER_IMAGE_TAG: ":latest"
# target test config file, used by assign test job
# target test config file, used by assign test job
CI_TARGET_TEST_CONFIG_FILE: "$CI_PROJECT_DIR/tools/ci/config/target-test.yml"
# target test repo parameters
TEST_ENV_CONFIG_REPO: "https://gitlab-ci-token:${BOT_TOKEN}@${CI_SERVER_HOST}:${CI_SERVER_PORT}/qa/ci-test-runner-configs.git"
CI_AUTO_TEST_SCRIPT_REPO_URL: "https://gitlab-ci-token:${BOT_TOKEN}@${CI_SERVER_HOST}:${CI_SERVER_PORT}/qa/auto_test_script.git"
CI_AUTO_TEST_SCRIPT_REPO_BRANCH: "ci/v3.1"
# Versioned esp-idf-doc env image to use for all document building jobs
ESP_IDF_DOC_ENV_IMAGE: "$CI_DOCKER_REGISTRY/esp-idf-doc-env:v7"
# before each job, we need to check if this job is filtered by bot stage/job filter
@@ -69,9 +53,6 @@ variables:
python $APPLY_BOT_FILTER_SCRIPT || exit 0
.setup_tools_unless_target_test: &setup_tools_unless_target_test |
if [[ -n "$IDF_DONT_USE_MIRRORS" ]]; then
export IDF_MIRROR_PREFIX_MAP=
fi
if [[ "$SETUP_TOOLS" == "1" || "$CI_JOB_STAGE" != "target_test" ]]; then
tools/idf_tools.py --non-interactive install && eval "$(tools/idf_tools.py --non-interactive export)" || exit 1
fi
@@ -93,6 +74,7 @@ before_script:
# Set some options and environment for CI
- source tools/ci/configure_ci_environment.sh
- *setup_tools_unless_target_test
- *fetch_submodules
# used for check scripts which we want to run unconditionally
@@ -129,14 +111,7 @@ before_script:
tags:
- host_test
dependencies: []
extends: .before_script_lesser
.python_lint_template:
stage: pre_check
image: $CI_DOCKER_REGISTRY/esp32-ci-env$BOT_DOCKER_IMAGE_TAG
tags:
- host_test
dependencies: []
extends: .before_script_lesser_nofilter
.macos_build_template:
stage: build
@@ -145,17 +120,8 @@ before_script:
dependencies: []
before_script:
- *apply_bot_filter
- $IDF_PATH/tools/idf_tools.py install-python-env
# On macOS, these tools need to be installed
- $IDF_PATH/tools/idf_tools.py --non-interactive install cmake ninja
# This adds tools (compilers) and the version-specific Python environment to PATH
- *setup_tools_unless_target_test
# Install packages required by CI scripts into IDF Python environment
- pip install -r $IDF_PATH/tools/ci/python_packages/ttfw_idf/requirements.txt
- source tools/ci/configure_ci_environment.sh
# Part of tools/ci/setup_python.sh; we don't use pyenv on macOS, so can't run the rest of the script.
- export PYTHONPATH="$IDF_PATH/tools:$IDF_PATH/tools/ci/python_packages:$PYTHONPATH"
- *fetch_submodules
include:
- '/tools/ci/config/pre_check.yml'
@@ -165,4 +131,3 @@ include:
- '/tools/ci/config/target-test.yml'
- '/tools/ci/config/post_check.yml'
- '/tools/ci/config/deploy.yml'
- '/tools/ci/config/post_deploy.yml'

7
.gitmodules vendored
View File

@@ -79,10 +79,3 @@
path = components/esp_wifi/lib
url = ../../espressif/esp32-wifi-lib.git
[submodule "components/tinyusb/tinyusb"]
path = components/tinyusb/tinyusb
url = ../../espressif/tinyusb.git
[submodule "examples/peripherals/secure_element/atecc608_ecdsa/components/esp-cryptoauthlib"]
path = examples/peripherals/secure_element/atecc608_ecdsa/components/esp-cryptoauthlib
url = ../../espressif/esp-cryptoauthlib.git

View File

@@ -6,7 +6,7 @@ We welcome contributions to the esp-idf project!
How to Contribute
-----------------
Contributions to esp-idf - fixing bugs, adding features, adding documentation - are welcome. We accept contributions via `Github Pull Requests <https://help.github.com/en/github/collaborating-with-issues-and-pull-requests/about-pull-requests>`_.
Contributions to esp-idf - fixing bugs, adding features, adding documentation - are welcome. We accept contributions via `Github Pull Requests <https://help.github.com/articles/about-pull-requests/>`_.
Before Contributing
-------------------
@@ -27,7 +27,7 @@ Before sending us a Pull Request, please consider this list of points:
* Example contributions are also welcome. Please check the :doc:`creating-examples` guide for these.
* If the contribution contains multiple commits, are they grouped together into logical changes (one major change per pull request)? Are any commits with names like "fixed typo" `squashed into previous commits <https://eli.thegreenplace.net/2014/02/19/squashing-github-pull-requests-into-a-single-commit/>`_?
* If the contribution contains multiple commits, are they grouped together into logical changes (one major change per pull request)? Are any commits with names like "fixed typo" `squashed into previous commits <http://eli.thegreenplace.net/2014/02/19/squashing-github-pull-requests-into-a-single-commit/>`_?
* If you're unsure about any of these points, please open the Pull Request anyhow and then ask us for feedback.

13
Kconfig
View File

@@ -24,22 +24,23 @@ mainmenu "Espressif IoT Development Framework Configuration"
bool
default "y" if IDF_TARGET="esp32"
config IDF_TARGET_ESP32S2
config IDF_TARGET_ESP32S2BETA
bool
default "y" if IDF_TARGET="esp32s2"
default "y" if IDF_TARGET="esp32s2beta"
select FREERTOS_UNICORE
config IDF_FIRMWARE_CHIP_ID
hex
default 0x0000 if IDF_TARGET_ESP32
default 0x0002 if IDF_TARGET_ESP32S2
# note: S2 beta uses Chip ID 0 still, S2 will use 0x0002
default 0x0000 if IDF_TARGET_ESP32S2BETA
default 0xFFFF
menu "SDK tool configuration"
config SDK_TOOLPREFIX
string "Compiler toolchain path/prefix"
default "xtensa-esp32-elf-" if IDF_TARGET_ESP32
default "xtensa-esp32s2-elf-" if IDF_TARGET_ESP32S2
default "xtensa-esp32s2-elf-" if IDF_TARGET_ESP32S2BETA
help
The prefix/path that is used to call the toolchain. The default setting assumes
a crosstool-ng gcc setup that is in your PATH.
@@ -133,8 +134,8 @@ mainmenu "Espressif IoT Development Framework Configuration"
CONFIG_APP_BUILD_TYPE_ELF_RAM=y
CONFIG_VFS_SUPPORT_TERMIOS=
CONFIG_NEWLIB_NANO_FORMAT=y
CONFIG_ESP_SYSTEM_PANIC_PRINT_HALT=y
CONFIG_ESP_DEBUG_STUBS_ENABLE=
CONFIG_ESP32_PANIC_PRINT_HALT=y
CONFIG_ESP32_DEBUG_STUBS_ENABLE=
CONFIG_ESP_ERR_TO_NAME_LOOKUP=

View File

@@ -2,7 +2,9 @@
* [中文版](./README_CN.md)
ESP-IDF is the official development framework for the **ESP32** and **ESP32-S** Series SoCs provided for Windows, Linux and macOS.
[![Documentation Status](https://readthedocs.com/projects/espressif-esp-idf/badge/?version=latest)](https://docs.espressif.com/projects/esp-idf/en/latest/?badge=latest)
ESP-IDF is the official development framework for the [ESP32](https://espressif.com/en/products/hardware/esp32/overview) chip.
# Developing With ESP-IDF
@@ -10,12 +12,8 @@ ESP-IDF is the official development framework for the **ESP32** and **ESP32-S**
See setup guides for detailed instructions to set up the ESP-IDF:
| Chip | Getting Started Guides for ESP-IDF |
|:----:|:----|
| <img src="docs/_static/chip-esp32.svg" height="85" alt="ESP32"> | <ul><li>[stable](https://docs.espressif.com/projects/esp-idf/en/stable/get-started/) version</li><li>[latest (master branch)](https://docs.espressif.com/projects/esp-idf/en/latest/get-started/) version</li></ul> |
| <img src="docs/_static/chip-esp32-s2.svg" height="100" alt="ESP32-S2"> | <ul><li>[latest (master branch)](https://docs.espressif.com/projects/esp-idf/en/latest/esp32s2/get-started/) version</li></ul> |
**Note:** Each ESP-IDF release has its own documentation. Please see Section [Versions](https://docs.espressif.com/projects/esp-idf/en/latest/esp32/versions.html) how to find documentation and how to checkout specific release of ESP-IDF.
* [Getting Started Guide for the stable ESP-IDF version](https://docs.espressif.com/projects/esp-idf/en/stable/get-started/)
* [Getting Started Guide for the latest (master branch) ESP-IDF version](https://docs.espressif.com/projects/esp-idf/en/latest/get-started/)
### Non-GitHub forks
@@ -39,16 +37,25 @@ See the Getting Started guide links above for a detailed setup guide. This is a
## Setup Build Environment
(See the Getting Started guide listed above for a full list of required steps with more details.)
(See Getting Started guide for a full list of required steps with details.)
* Install host build dependencies mentioned in the Getting Started guide.
* Run the install script to set up the build environment. The options include `install.bat` or `install.ps1` for Windows, and `install.sh` or `install.fish` for Unix shells.
* Run the export script on Windows (`export.bat`) or source it on Unix (`source export.sh`) in every shell environment before using ESP-IDF.
* Install host build dependencies mentioned in Getting Started guide.
* Add `tools/` directory to the PATH
* Run `python -m pip install -r requirements.txt` to install Python dependencies
## Configuring the Project
* `idf.py set-target <chip_name>` sets the target of the project to `<chip_name>`. Run `idf.py set-target` without any arguments to see a list of supported targets.
* `idf.py menuconfig` opens a text-based configuration menu where you can configure the project.
`idf.py menuconfig`
* Opens a text-based configuration menu for the project.
* Use up & down arrow keys to navigate the menu.
* Use Enter key to go into a submenu, Escape key to go out or to exit.
* Type `?` to see a help screen. Enter key exits the help screen.
* Use Space key, or `Y` and `N` keys to enable (Yes) and disable (No) configuration items with checkboxes "`[*]`"
* Pressing `?` while highlighting a configuration item displays help about that item.
* Type `/` to search the configuration items.
Once done configuring, press Escape multiple times to exit and say "Yes" to save the new configuration when prompted.
## Compiling the Project
@@ -70,7 +77,7 @@ You don't need to run `idf.py build` before running `idf.py flash`, `idf.py flas
## Viewing Serial Output
The `idf.py monitor` target uses the [idf_monitor tool](https://docs.espressif.com/projects/esp-idf/en/latest/get-started/idf-monitor.html) to display serial output from ESP32 or ESP32-S Series SoCs. idf_monitor also has a range of features to decode crash output and interact with the device. [Check the documentation page for details](https://docs.espressif.com/projects/esp-idf/en/latest/get-started/idf-monitor.html).
The `idf.py monitor` target uses the [idf_monitor tool](https://docs.espressif.com/projects/esp-idf/en/latest/get-started/idf-monitor.html) to display serial output from the ESP32. idf_monitor also has a range of features to decode crash output and interact with the device. [Check the documentation page for details](https://docs.espressif.com/projects/esp-idf/en/latest/get-started/idf-monitor.html).
Exit the monitor by typing Ctrl-].

View File

@@ -2,7 +2,9 @@
* [English Version](./README.md)
ESP-IDF 是由乐鑫官方推出的针对 **ESP32****ESP32-S2** 系列芯片的开发框架。
[![Documentation Status](https://readthedocs.com/projects/espressif-esp-idf/badge/?version=latest)](https://docs.espressif.com/projects/esp-idf/zh_CN/latest/?badge=latest)
ESP-IDF 是由乐鑫官方推出的针对 [ESP32](https://espressif.com/en/products/hardware/esp32/overview) 系列芯片的开发框架。
# 使用 ESP-IDF 进行开发
@@ -10,13 +12,8 @@ ESP-IDF 是由乐鑫官方推出的针对 **ESP32** 和 **ESP32-S2** 系列芯
请参阅如下指南搭建 ESP-IDF 的开发环境:
| 芯片 | ESP-IDF 入门指南 |
|:----:|:----|
| <img src="docs/_static/chip-esp32.svg" height="85" alt="ESP32"> | <ul><li>[稳定](https://docs.espressif.com/projects/esp-idf/zh_CN/stable/get-started/) 版</li><li>[最新master 分支)](https://docs.espressif.com/projects/esp-idf/zh_CN/latest/get-started/) 版本</li></ul> |
| <img src="docs/_static/chip-esp32-s2.svg" height="100" alt="ESP32-S2"> | <ul><li>[最新master 分支)](https://docs.espressif.com/projects/esp-idf/zh_CN/latest/esp32s2/get-started/) 版本</li></ul> |
**注意:** 每个 ESP-IDF 版本都有其对应的文档。 请参阅 [版本](https://docs.espressif.com/projects/esp-idf/zh_CN/latest/esp32/versions.html) 部分如何查找文档以及如何检出ESP-IDF的特定发行版。
* [ESP-IDF 稳定版本的入门指南](https://docs.espressif.com/projects/esp-idf/en/stable/get-started/)
* [ESP-IDF 开发版本master 分支)的入门指南](https://docs.espressif.com/projects/esp-idf/en/latest/get-started/)
### 非 GitHub 分叉的 ESP-IDF 项目
@@ -77,7 +74,7 @@ ESP-IDF 中的子模块采用相对路径([详见 .gitmodules 文件](.gitmodu
## 观察串口输入
`idf.py monitor` 会调用 [idf_monitor 工具](https://docs.espressif.com/projects/esp-idf/en/latest/get-started/idf-monitor.html)来显示 ESP32 和 ESP32-S2 的串口输出。`idf_monitor` 还包含一系列的功能来解析程序崩溃后的输出结果并与设备进行交互。更多详细内容,请参阅[文档](https://docs.espressif.com/projects/esp-idf/en/latest/get-started/idf-monitor.html).
`idf.py monitor` 会调用 [idf_monitor 工具](https://docs.espressif.com/projects/esp-idf/en/latest/get-started/idf-monitor.html)来显示 ESP32 的串口输出。`idf_monitor` 还包含一系列的功能来解析程序崩溃后的输出结果并与设备进行交互。更多详细内容,请参阅[文档](https://docs.espressif.com/projects/esp-idf/en/latest/get-started/idf-monitor.html).
输入 `Ctrl-]` 可退出监视器。

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@@ -39,4 +39,4 @@ target_compile_options(${COMPONENT_LIB} PRIVATE "-fno-profile-arcs" "-fno-test-c
# Force app_trace to also appear later than gcov in link line
idf_component_get_property(app_trace app_trace COMPONENT_LIB)
target_link_libraries(${COMPONENT_LIB} INTERFACE $<TARGET_FILE:${app_trace}> gcov $<TARGET_FILE:${app_trace}> c)
target_link_libraries(${COMPONENT_LIB} INTERFACE $<TARGET_FILE:${app_trace}> gcov $<TARGET_FILE:${app_trace}> ${LIBC})

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@@ -158,7 +158,7 @@
#include <sys/param.h>
#include "soc/soc.h"
#include "soc/dport_reg.h"
#if CONFIG_IDF_TARGET_ESP32S2
#if CONFIG_IDF_TARGET_ESP32S2BETA
#include "soc/sensitive_reg.h"
#endif
#include "eri.h"
@@ -210,7 +210,7 @@ const static char *TAG = "esp_apptrace";
#define TRACEMEM_MUX_BLK0_ONLY 1
#define TRACEMEM_MUX_BLK1_ONLY 2
#define TRACEMEM_MUX_PROBLK1_APPBLK0 3
#elif CONFIG_IDF_TARGET_ESP32S2
#elif CONFIG_IDF_TARGET_ESP32S2BETA
#define TRACEMEM_MUX_BLK0_NUM 19
#define TRACEMEM_MUX_BLK1_NUM 20
#define TRACEMEM_BLK_NUM2ADDR(_n_) (0x3FFB8000UL + 0x4000UL*((_n_)-4))
@@ -244,7 +244,7 @@ static volatile uint8_t *s_trax_blocks[] = {
(volatile uint8_t *) 0x3FFFC000,
(volatile uint8_t *) 0x3FFF8000
};
#elif CONFIG_IDF_TARGET_ESP32S2
#elif CONFIG_IDF_TARGET_ESP32S2BETA
static volatile uint8_t *s_trax_blocks[] = {
(volatile uint8_t *)TRACEMEM_BLK_NUM2ADDR(TRACEMEM_MUX_BLK0_NUM),
(volatile uint8_t *)TRACEMEM_BLK_NUM2ADDR(TRACEMEM_MUX_BLK1_NUM)
@@ -435,7 +435,7 @@ static inline void esp_apptrace_trax_select_memory_block(int block_num)
// select memory block to be exposed to the TRAX module (accessed by host)
#if CONFIG_IDF_TARGET_ESP32
DPORT_WRITE_PERI_REG(DPORT_TRACEMEM_MUX_MODE_REG, block_num ? TRACEMEM_MUX_BLK0_ONLY : TRACEMEM_MUX_BLK1_ONLY);
#elif CONFIG_IDF_TARGET_ESP32S2
#elif CONFIG_IDF_TARGET_ESP32S2BETA
DPORT_WRITE_PERI_REG(DPORT_PMS_OCCUPY_3_REG, block_num ? BIT(TRACEMEM_MUX_BLK0_NUM-4) : BIT(TRACEMEM_MUX_BLK1_NUM-4));
#endif
}

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@@ -18,8 +18,8 @@
#include "sdkconfig.h"
#if CONFIG_IDF_TARGET_ESP32
#include "esp32/clk.h"
#elif CONFIG_IDF_TARGET_ESP32S2
#include "esp32s2/clk.h"
#elif CONFIG_IDF_TARGET_ESP32S2BETA
#include "esp32s2beta/clk.h"
#endif
///////////////////////////////////////////////////////////////////////////////

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@@ -23,11 +23,11 @@
#include "soc/timer_periph.h"
#include "esp_app_trace.h"
#include "esp_private/dbg_stubs.h"
#include "hal/wdt_hal.h"
#include "hal/timer_ll.h"
#if CONFIG_IDF_TARGET_ESP32
#include "esp32/rom/libc_stubs.h"
#elif CONFIG_IDF_TARGET_ESP32S2
#include "esp32s2/rom/libc_stubs.h"
#elif CONFIG_IDF_TARGET_ESP32S2BETA
#include "esp32s2beta/rom/libc_stubs.h"
#endif
#if CONFIG_APPTRACE_GCOV_ENABLE
@@ -68,12 +68,8 @@ static int esp_dbg_stub_gcov_dump_do(void)
int ret = ESP_OK;
FILE* old_stderr = stderr;
FILE* old_stdout = stdout;
static struct syscall_stub_table *old_tables[portNUM_PROCESSORS];
struct syscall_stub_table* old_table = syscall_table_ptr_pro;
old_tables[0] = syscall_table_ptr_pro;
#if portNUM_PROCESSORS > 1
old_tables[1] = syscall_table_ptr_app;
#endif
ESP_EARLY_LOGV(TAG, "Alloc apptrace down buf %d bytes", ESP_GCOV_DOWN_BUF_SIZE);
void *down_buf = malloc(ESP_GCOV_DOWN_BUF_SIZE);
if (down_buf == NULL) {
@@ -84,14 +80,12 @@ static int esp_dbg_stub_gcov_dump_do(void)
esp_apptrace_down_buffer_config(down_buf, ESP_GCOV_DOWN_BUF_SIZE);
ESP_EARLY_LOGV(TAG, "Dump data...");
// incase of dual-core chip APP and PRO CPUs share the same table, so it is safe to save only PRO's table
memcpy(&s_gcov_stub_table, syscall_table_ptr_pro, sizeof(s_gcov_stub_table));
memcpy(&s_gcov_stub_table, old_table, sizeof(s_gcov_stub_table));
s_gcov_stub_table._lock_acquire_recursive = &gcov_stub_lock_acquire_recursive;
s_gcov_stub_table._lock_release_recursive = &gcov_stub_lock_release_recursive;
s_gcov_stub_table._lock_try_acquire_recursive = &gcov_stub_lock_try_acquire_recursive,
syscall_table_ptr_pro = &s_gcov_stub_table;
#if portNUM_PROCESSORS > 1
syscall_table_ptr_app = &s_gcov_stub_table;
#endif
stderr = (FILE*) &__sf_fake_stderr;
stdout = (FILE*) &__sf_fake_stdout;
__gcov_dump();
@@ -99,10 +93,8 @@ static int esp_dbg_stub_gcov_dump_do(void)
__gcov_reset();
stdout = old_stdout;
stderr = old_stderr;
syscall_table_ptr_pro = old_tables[0];
#if portNUM_PROCESSORS > 1
syscall_table_ptr_app = old_tables[1];
#endif
syscall_table_ptr_pro = old_table;
ESP_EARLY_LOGV(TAG, "Free apptrace down buf");
free(down_buf);
ESP_EARLY_LOGV(TAG, "Finish file transfer session");
@@ -110,7 +102,6 @@ static int esp_dbg_stub_gcov_dump_do(void)
if (ret != ESP_OK) {
ESP_EARLY_LOGE(TAG, "Failed to send files transfer stop cmd (%d)!", ret);
}
ESP_EARLY_LOGV(TAG, "exit %d", ret);
return ret;
}
@@ -142,16 +133,14 @@ void esp_gcov_dump(void)
esp_cpu_stall(other_core);
#endif
while (!esp_apptrace_host_is_connected(ESP_APPTRACE_DEST_TRAX)) {
wdt_hal_context_t twdt = {.inst = WDT_MWDT0, .mwdt_dev = &TIMERG0};
wdt_hal_context_t iwdt = {.inst = WDT_MWDT1, .mwdt_dev = &TIMERG1};
//Feed the Task Watchdog (TG0) to prevent it from timing out
wdt_hal_write_protect_disable(&twdt);
wdt_hal_feed(&twdt);
wdt_hal_write_protect_enable(&twdt);
//Likewise, feed the Interrupt Watchdog (TG1) to prevent a reboot
wdt_hal_write_protect_disable(&iwdt);
wdt_hal_feed(&iwdt);
wdt_hal_write_protect_enable(&iwdt);
// to avoid complains that task watchdog got triggered for other tasks
timer_ll_wdt_set_protect(&TIMERG0, false);
timer_ll_wdt_feed(&TIMERG0);
timer_ll_wdt_set_protect(&TIMERG0, true);
// to avoid reboot on INT_WDT
timer_ll_wdt_set_protect(&TIMERG1, false);
timer_ll_wdt_feed(&TIMERG1);
timer_ll_wdt_set_protect(&TIMERG1, true);
}
esp_dbg_stub_gcov_dump_do();
@@ -164,9 +153,7 @@ void esp_gcov_dump(void)
void *gcov_rtio_fopen(const char *path, const char *mode)
{
ESP_EARLY_LOGV(TAG, "%s '%s' '%s'", __FUNCTION__, path, mode);
void *f = esp_apptrace_fopen(ESP_APPTRACE_DEST_TRAX, path, mode);
ESP_EARLY_LOGV(TAG, "%s ret %p", __FUNCTION__, f);
return f;
return esp_apptrace_fopen(ESP_APPTRACE_DEST_TRAX, path, mode);
}
int gcov_rtio_fclose(void *stream)

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@@ -5,24 +5,12 @@ function(idf_create_coverage_report report_dir)
set(gcov_tool ${CONFIG_SDK_TOOLPREFIX}gcov)
idf_build_get_property(project_name PROJECT_NAME)
add_custom_target(pre-cov-report
add_custom_target(lcov-report
COMMENT "Generating coverage report in: ${report_dir}"
COMMAND ${CMAKE_COMMAND} -E echo "Using gcov: ${gcov_tool}"
COMMAND ${CMAKE_COMMAND} -E make_directory ${report_dir}/html
)
add_custom_target(lcov-report
COMMENT "WARNING: lcov-report is deprecated. Please use gcovr-report instead."
COMMAND lcov --gcov-tool ${gcov_tool} -c -d ${CMAKE_CURRENT_BINARY_DIR} -o ${report_dir}/${project_name}.info
COMMAND genhtml -o ${report_dir}/html ${report_dir}/${project_name}.info
DEPENDS pre-cov-report
)
add_custom_target(gcovr-report
COMMAND gcovr -r ${project_dir} --gcov-executable ${gcov_tool} -s --html-details ${report_dir}/html/index.html
WORKING_DIRECTORY ${CMAKE_CURRENT_BINARY_DIR}
DEPENDS pre-cov-report
)
COMMAND genhtml -o ${report_dir}/html ${report_dir}/${project_name}.info)
endfunction()
# idf_clean_coverage_report
@@ -32,4 +20,4 @@ function(idf_clean_coverage_report report_dir)
add_custom_target(cov-data-clean
COMMENT "Clean coverage report in: ${report_dir}"
COMMAND ${CMAKE_COMMAND} -E remove_directory ${report_dir})
endfunction()
endfunction()

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@@ -66,9 +66,9 @@ Revision: $Rev: 3734 $
#if CONFIG_IDF_TARGET_ESP32
#include "esp32/rom/ets_sys.h"
#include "esp32/clk.h"
#elif CONFIG_IDF_TARGET_ESP32S2
#include "esp32s2/rom/ets_sys.h"
#include "esp32s2/clk.h"
#elif CONFIG_IDF_TARGET_ESP32S2BETA
#include "esp32s2beta/rom/ets_sys.h"
#include "esp32s2beta/clk.h"
#endif
#include "esp_app_trace.h"
#include "esp_app_trace_util.h"
@@ -78,9 +78,9 @@ Revision: $Rev: 3734 $
#if CONFIG_IDF_TARGET_ESP32
#include "esp32/rom/ets_sys.h"
#include "esp32/clk.h"
#elif CONFIG_IDF_TARGET_ESP32S2
#include "esp32s2/rom/ets_sys.h"
#include "esp32s2/clk.h"
#elif CONFIG_IDF_TARGET_ESP32S2BETA
#include "esp32s2beta/rom/ets_sys.h"
#include "esp32s2beta/clk.h"
#endif
@@ -140,7 +140,7 @@ extern const SEGGER_SYSVIEW_OS_API SYSVIEW_X_OS_TraceAPI;
// CCOUNT is incremented at CPU frequency
#if CONFIG_IDF_TARGET_ESP32
#define SYSVIEW_TIMESTAMP_FREQ (CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ * 1000000)
#elif CONFIG_IDF_TARGET_ESP32S2
#elif CONFIG_IDF_TARGET_ESP32S2BETA
#define SYSVIEW_TIMESTAMP_FREQ (CONFIG_ESP32S2_DEFAULT_CPU_FREQ_MHZ * 1000000)
#endif
#endif // TS_USE_CCOUNT

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@@ -20,8 +20,8 @@
#if CONFIG_IDF_TARGET_ESP32
#include "esp32/rom/ets_sys.h"
#elif CONFIG_IDF_TARGET_ESP32S2
#include "esp32s2/rom/ets_sys.h"
#elif CONFIG_IDF_TARGET_ESP32S2BETA
#include "esp32s2beta/rom/ets_sys.h"
#endif
#include "esp_app_trace.h"

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@@ -1,3 +1,3 @@
idf_component_register(SRC_DIRS "."
PRIV_INCLUDE_DIRS "."
PRIV_REQUIRES unity)
INCLUDE_DIRS "."
REQUIRES unity)

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@@ -7,18 +7,11 @@ idf_component_register(SRCS "esp_ota_ops.c"
# linker will ignore this structure as it has no other files depending on it.
target_link_libraries(${COMPONENT_LIB} INTERFACE "-u esp_app_desc")
if(CONFIG_APP_PROJECT_VER_FROM_CONFIG)
# Ignore current PROJECT_VER (which was set in __project_get_revision()).
# Gets the version from the CONFIG_APP_PROJECT_VER.
idf_build_set_property(PROJECT_VER "${CONFIG_APP_PROJECT_VER}")
endif()
# cut PROJECT_VER and PROJECT_NAME to required 32 characters.
idf_build_get_property(project_ver PROJECT_VER)
idf_build_get_property(project_name PROJECT_NAME)
string(SUBSTRING "${project_ver}" 0 31 PROJECT_VER_CUT)
string(SUBSTRING "${project_name}" 0 31 PROJECT_NAME_CUT)
message(STATUS "App \"${PROJECT_NAME_CUT}\" version: ${PROJECT_VER_CUT}")
set_source_files_properties(
SOURCE "esp_app_desc.c"
@@ -62,11 +55,6 @@ if(NOT BOOTLOADER_BUILD)
--partition-table-offset ${PARTITION_TABLE_OFFSET}
erase_otadata)
idf_component_get_property(main_args esptool_py FLASH_ARGS)
idf_component_get_property(sub_args esptool_py FLASH_SUB_ARGS)
esptool_py_flash_target(otadata-flash "${main_args}" "${sub_args}")
esptool_py_flash_target_image(otadata-flash otadata "${otadata_offset}" "${blank_otadata_file}")
esptool_py_flash_target_image(flash otadata "${otadata_offset}" "${blank_otadata_file}")
esptool_py_flash_project_args(otadata ${otadata_offset} "${blank_otadata_file}" FLASH_IN_PROJECT)
endif()
endif()

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@@ -22,20 +22,6 @@ menu "Application manager"
The PROJECT_NAME variable from the build system will not affect the firmware image.
This value will not be contained in the esp_app_desc structure.
config APP_PROJECT_VER_FROM_CONFIG
bool "Get the project version from Kconfig"
default n
help
If this is enabled, then config item APP_PROJECT_VER will be used for the variable PROJECT_VER.
Other ways to set PROJECT_VER will be ignored.
config APP_PROJECT_VER
string "Project version"
default "1"
depends on APP_PROJECT_VER_FROM_CONFIG
help
Project version
config APP_RETRIEVE_LEN_ELF_SHA
int "The length of APP ELF SHA is stored in RAM(chars)"
default 16

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@@ -8,49 +8,49 @@
COMPONENT_ADD_LDFLAGS += -u esp_app_desc
ifndef IS_BOOTLOADER_BUILD
# If ``CONFIG_APP_PROJECT_VER_FROM_CONFIG`` option is set, the value of ``CONFIG_APP_PROJECT_VER`` will be used
# Else, if ``PROJECT_VER`` variable set in project Makefile file, its value will be used.
# Else, if the ``$PROJECT_PATH/version.txt`` exists, its contents will be used as ``PROJECT_VER``.
# Else, if the project is located inside a Git repository, the output of git describe will be used.
# Otherwise, ``PROJECT_VER`` will be "1".
ifdef CONFIG_APP_PROJECT_VER_FROM_CONFIG
PROJECT_VER:= $(CONFIG_APP_PROJECT_VER)
else
ifneq ("${PROJECT_VER}", "")
PROJECT_VER:= $(PROJECT_VER)
else
ifneq ("$(wildcard ${PROJECT_PATH}/version.txt)","")
PROJECT_VER := $(shell cat ${PROJECT_PATH}/version.txt)
else
GIT_PROJECT_VER := $(shell cd ${PROJECT_PATH} && git describe --always --tags --dirty 2> /dev/null)
ifeq ("${GIT_PROJECT_VER}", "")
PROJECT_VER := "1"
$(info Project is not inside a git repository, or git repository has no commits)
$(info will not use 'git describe' to determine PROJECT_VER.)
else
PROJECT_VER:= $(GIT_PROJECT_VER)
endif # a git repository
endif # version.txt
endif # PROJECT_VER
endif # CONFIG_APP_PROJECT_VER_FROM_CONFIG
GET_PROJECT_VER ?=
ifeq ("${PROJECT_VER}", "")
ifeq ("$(wildcard ${PROJECT_PATH}/version.txt)","")
# cut PROJECT_VER and PROJECT_NAME to required 32 characters.
PROJECT_VER_CUT := $(shell echo "$(PROJECT_VER)" | cut -c 1-31)
PROJECT_NAME_CUT := $(shell echo "$(PROJECT_NAME)" | cut -c 1-31)
GET_PROJECT_VER := $(shell cd ${PROJECT_PATH} && git describe --always --tags --dirty 2> /dev/null)
ifeq ("${GET_PROJECT_VER}", "")
GET_PROJECT_VER := "1"
$(info Project is not inside a git repository, will not use 'git describe' to determine PROJECT_VER.)
endif
$(info App "$(PROJECT_NAME_CUT)" version: $(PROJECT_VER_CUT))
else
# read from version.txt
GET_PROJECT_VER := $(shell cat ${PROJECT_PATH}/version.txt)
endif
endif
# If ``PROJECT_VER`` variable set in project Makefile file, its value will be used.
# Else, if the ``$PROJECT_PATH/version.txt`` exists, its contents will be used as ``PROJECT_VER``.
# Else, if the project is located inside a Git repository, the output of git describe will be used.
# Otherwise, ``PROJECT_VER`` will be "1".
NEW_DEFINES:= "$(PROJECT_VER_CUT) $(PROJECT_NAME_CUT) $(IDF_VER)"
ifeq ("$(wildcard ${TMP_DEFINES})","")
OLD_DEFINES:= ""
else
OLD_DEFINES:= "$(shell cat $(TMP_DEFINES))"
endif
ifeq ("${PROJECT_VER}", "")
PROJECT_VER:= $(GET_PROJECT_VER)
else
PROJECT_VER:= $(PROJECT_VER)
endif
# If NEW_DEFINES (PROJECT_VER, PROJECT_NAME) were changed then rebuild only esp_app_desc.
ifneq (${NEW_DEFINES}, ${OLD_DEFINES})
$(shell echo $(NEW_DEFINES) > $(TMP_DEFINES); rm -f esp_app_desc.o;)
endif
# cut PROJECT_VER and PROJECT_NAME to required 32 characters.
PROJECT_VER_CUT := $(shell echo "$(PROJECT_VER)" | cut -c 1-31)
PROJECT_NAME_CUT := $(shell echo "$(PROJECT_NAME)" | cut -c 1-31)
esp_app_desc.o: CPPFLAGS += -D PROJECT_VER=\""$(PROJECT_VER_CUT)"\" -D PROJECT_NAME=\""$(PROJECT_NAME_CUT)"\"
endif # IS_BOOTLOADER_BUILD
$(info App "$(PROJECT_NAME_CUT)" version: $(PROJECT_VER_CUT))
NEW_DEFINES:= "$(PROJECT_VER_CUT) $(PROJECT_NAME_CUT) $(IDF_VER)"
ifeq ("$(wildcard ${TMP_DEFINES})","")
OLD_DEFINES:= ""
else
OLD_DEFINES:= "$(shell cat $(TMP_DEFINES))"
endif
# If NEW_DEFINES (PROJECT_VER, PROJECT_NAME) were changed then rebuild only esp_app_desc.
ifneq (${NEW_DEFINES}, ${OLD_DEFINES})
$(shell echo $(NEW_DEFINES) > $(TMP_DEFINES); rm -f esp_app_desc.o;)
endif
esp_app_desc.o: CPPFLAGS += -D PROJECT_VER=\""$(PROJECT_VER_CUT)"\" -D PROJECT_NAME=\""$(PROJECT_NAME_CUT)"\"
endif

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@@ -41,12 +41,6 @@
#include "esp_system.h"
#include "esp_efuse.h"
#ifdef CONFIG_IDF_TARGET_ESP32
#include "esp32/rom/crc.h"
#elif CONFIG_IDF_TARGET_ESP32S2
#include "esp32s2/rom/crc.h"
#include "esp32s2/rom/secure_boot.h"
#endif
#define SUB_TYPE_ID(i) (i & 0x0F)
@@ -256,43 +250,6 @@ esp_err_t esp_ota_write(esp_ota_handle_t handle, const void *data, size_t size)
return ESP_ERR_INVALID_ARG;
}
esp_err_t esp_ota_write_with_offset(esp_ota_handle_t handle, const void *data, size_t size, uint32_t offset)
{
const uint8_t *data_bytes = (const uint8_t *)data;
esp_err_t ret;
ota_ops_entry_t *it;
if (data == NULL) {
ESP_LOGE(TAG, "write data is invalid");
return ESP_ERR_INVALID_ARG;
}
// find ota handle in linked list
for (it = LIST_FIRST(&s_ota_ops_entries_head); it != NULL; it = LIST_NEXT(it, entries)) {
if (it->handle == handle) {
// must erase the partition before writing to it
assert(it->erased_size > 0 && "must erase the partition before writing to it");
/* esp_ota_write_with_offset is used to write data in non contiguous manner.
* Hence, unaligned data(less than 16 bytes) cannot be cached if flash encryption is enabled.
*/
if (esp_flash_encryption_enabled() && (size % 16)) {
ESP_LOGE(TAG, "Size should be 16byte aligned for flash encryption case");
return ESP_ERR_INVALID_ARG;
}
ret = esp_partition_write(it->part, offset, data_bytes, size);
if (ret == ESP_OK) {
it->wrote_size += size;
}
return ret;
}
}
// OTA handle is not found in linked list
ESP_LOGE(TAG,"OTA handle not found");
return ESP_ERR_INVALID_ARG;
}
esp_err_t esp_ota_end(esp_ota_handle_t handle)
{
ota_ops_entry_t *it;
@@ -864,24 +821,3 @@ esp_err_t esp_ota_erase_last_boot_app_partition(void)
return ESP_OK;
}
#if CONFIG_IDF_TARGET_ESP32S2 && CONFIG_SECURE_BOOT_V2_ENABLED
esp_err_t esp_ota_revoke_secure_boot_public_key(esp_ota_secure_boot_public_key_index_t index) {
if (!esp_secure_boot_enabled()) {
ESP_LOGE(TAG, "Secure boot v2 has not been enabled.");
return ESP_FAIL;
}
if (index != SECURE_BOOT_PUBLIC_KEY_INDEX_0 &&
index != SECURE_BOOT_PUBLIC_KEY_INDEX_1 &&
index != SECURE_BOOT_PUBLIC_KEY_INDEX_2) {
ESP_LOGE(TAG, "Invalid Index found for public key revocation %d.", index);
return ESP_ERR_INVALID_ARG;
}
ets_secure_boot_revoke_public_key_digest(index);
ESP_LOGI(TAG, "Revoked signature block %d.", index);
return ESP_OK;
}
#endif

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@@ -117,29 +117,6 @@ esp_err_t esp_ota_begin(const esp_partition_t* partition, size_t image_size, esp
*/
esp_err_t esp_ota_write(esp_ota_handle_t handle, const void* data, size_t size);
/**
* @brief Write OTA update data to partition
*
* This function can write data in non contiguous manner.
* If flash encryption is enabled, data should be 16 byte aligned.
*
* @param handle Handle obtained from esp_ota_begin
* @param data Data buffer to write
* @param size Size of data buffer in bytes
* @param offset Offset in flash partition
*
* @note While performing OTA, if the packets arrive out of order, esp_ota_write_with_offset() can be used to write data in non contiguous manner.
* Use of esp_ota_write_with_offset() in combination with esp_ota_write() is not recommended.
*
* @return
* - ESP_OK: Data was written to flash successfully.
* - ESP_ERR_INVALID_ARG: handle is invalid.
* - ESP_ERR_OTA_VALIDATE_FAILED: First byte of image contains invalid app image magic byte.
* - ESP_ERR_FLASH_OP_TIMEOUT or ESP_ERR_FLASH_OP_FAIL: Flash write failed.
* - ESP_ERR_OTA_SELECT_INFO_INVALID: OTA data partition has invalid contents
*/
esp_err_t esp_ota_write_with_offset(esp_ota_handle_t handle, const void *data, size_t size, uint32_t offset);
/**
* @brief Finish OTA update and validate newly written app image.
*
@@ -299,34 +276,6 @@ esp_err_t esp_ota_erase_last_boot_app_partition(void);
*/
bool esp_ota_check_rollback_is_possible(void);
#if CONFIG_IDF_TARGET_ESP32S2 && (CONFIG_SECURE_BOOT_V2_ENABLED || __DOXYGEN__)
/**
* Secure Boot V2 public key indexes.
*/
typedef enum {
SECURE_BOOT_PUBLIC_KEY_INDEX_0, /*!< Points to the 0th index of the Secure Boot v2 public key */
SECURE_BOOT_PUBLIC_KEY_INDEX_1, /*!< Points to the 1st index of the Secure Boot v2 public key */
SECURE_BOOT_PUBLIC_KEY_INDEX_2 /*!< Points to the 2nd index of the Secure Boot v2 public key */
} esp_ota_secure_boot_public_key_index_t;
/**
* @brief Revokes the old signature digest. To be called in the application after the rollback logic.
*
* Relevant for Secure boot v2 on ESP32-S2 where upto 3 key digests can be stored (Key #N-1, Key #N, Key #N+1).
* When key #N-1 used to sign an app is invalidated, an OTA update is to be sent with an app signed with key #N-1 & Key #N.
* After successfully booting the OTA app should call this function to revoke Key #N-1.
*
* @param index - The index of the signature block to be revoked
*
* @return
* - ESP_OK: If revocation is successful.
* - ESP_ERR_INVALID_ARG: If the index of the public key to be revoked is incorrect.
* - ESP_FAIL: If secure boot v2 has not been enabled.
*/
esp_err_t esp_ota_revoke_secure_boot_public_key(esp_ota_secure_boot_public_key_index_t index);
#endif /* CONFIG_IDF_TARGET_ESP32S2 */
#ifdef __cplusplus
}
#endif

View File

@@ -87,8 +87,9 @@ class OtatoolTarget():
seq = bytearray(self.otadata[start:start + 4])
crc = bytearray(self.otadata[start + 28:start + 32])
seq = struct.unpack('I', seq)
crc = struct.unpack('I', crc)
seq = struct.unpack('>I', seq)
crc = struct.unpack('>I', crc)
info.append(otadata_info(seq[0], crc[0]))
return info
@@ -107,7 +108,7 @@ class OtatoolTarget():
def is_otadata_info_valid(status):
seq = status.seq % (1 << 32)
crc = binascii.crc32(struct.pack('I', seq), 0xFFFFFFFF) % (1 << 32)
crc = hex(binascii.crc32(struct.pack("I", seq), 0xFFFFFFFF) % (1 << 32))
return seq < (int('0xFFFFFFFF', 16) % (1 << 32)) and status.crc == crc
partition_table = self.target.partition_table
@@ -218,8 +219,8 @@ def _read_otadata(target):
otadata_info = target._get_otadata_info()
print(' {:8s} \t {:8s} | \t {:8s} \t {:8s}'.format('OTA_SEQ', 'CRC', 'OTA_SEQ', 'CRC'))
print('Firmware: 0x{:08x} \t0x{:08x} | \t0x{:08x} \t 0x{:08x}'.format(otadata_info[0].seq, otadata_info[0].crc,
print(" {:8s} \t {:8s} | \t {:8s} \t {:8s}".format("OTA_SEQ", "CRC", "OTA_SEQ", "CRC"))
print("Firmware: 0x{:8x} \t0x{:8x} | \t0x{:8x} \t 0x{:8x}".format(otadata_info[0].seq, otadata_info[0].crc,
otadata_info[1].seq, otadata_info[1].crc))
@@ -248,10 +249,6 @@ def _erase_ota_partition(target, ota_id):
def main():
if sys.version_info[0] < 3:
print("WARNING: Support for Python 2 is deprecated and will be removed in future versions.", file=sys.stderr)
elif sys.version_info[0] == 3 and sys.version_info[1] < 6:
print("WARNING: Python 3 versions older than 3.6 are not supported.", file=sys.stderr)
global quiet
parser = argparse.ArgumentParser("ESP-IDF OTA Partitions Tool")

View File

@@ -1,4 +1,4 @@
idf_component_register(SRC_DIRS "."
PRIV_INCLUDE_DIRS "."
PRIV_REQUIRES unity test_utils app_update bootloader_support nvs_flash
INCLUDE_DIRS "."
REQUIRES unity test_utils app_update bootloader_support nvs_flash
)

View File

@@ -84,7 +84,7 @@ TEST_CASE("esp_ota_get_next_update_partition logic", "[ota]")
TEST_ASSERT_EQUAL_PTR(ota_0, p);
}
TEST_CASE("esp_ota_get_partition_description", "[ota]")
TEST_CASE("esp_ota_get_partition_description ", "[ota]")
{
const esp_partition_t *running = esp_ota_get_running_partition();
TEST_ASSERT_NOT_NULL(running);

View File

@@ -10,9 +10,9 @@
#if CONFIG_IDF_TARGET_ESP32
#include "esp32/rom/spi_flash.h"
#include "esp32/rom/rtc.h"
#elif CONFIG_IDF_TARGET_ESP32S2
#include "esp32s2/rom/spi_flash.h"
#include "esp32s2/rom/rtc.h"
#elif CONFIG_IDF_TARGET_ESP32S2BETA
#include "esp32s2beta/rom/spi_flash.h"
#include "esp32s2beta/rom/rtc.h"
#endif
#include "freertos/FreeRTOS.h"
@@ -48,34 +48,9 @@ static void copy_app_partition(esp_ota_handle_t update_handle, const esp_partiti
{
const void *partition_bin = NULL;
spi_flash_mmap_handle_t data_map;
ESP_LOGI(TAG, "start the copy process");
TEST_ESP_OK(esp_partition_mmap(curr_app, 0, curr_app->size, SPI_FLASH_MMAP_DATA, &partition_bin, &data_map));
TEST_ESP_OK(esp_ota_write(update_handle, (const void *)partition_bin, curr_app->size));
spi_flash_munmap(data_map);
ESP_LOGI(TAG, "finish the copy process");
}
/* @brief Copies a current app to next partition using handle.
*
* @param[in] update_handle - Handle of API ota.
* @param[in] cur_app - Current app.
*/
static void copy_app_partition_with_offset(esp_ota_handle_t update_handle, const esp_partition_t *curr_app)
{
const void *partition_bin = NULL;
spi_flash_mmap_handle_t data_map;
ESP_LOGI(TAG, "start the copy process");
uint32_t offset = 0, bytes_to_write = curr_app->size;
uint32_t write_bytes;
while (bytes_to_write > 0) {
write_bytes = (bytes_to_write > (4 * 1024)) ? (4 * 1024) : bytes_to_write;
TEST_ESP_OK(esp_partition_mmap(curr_app, offset, write_bytes, SPI_FLASH_MMAP_DATA, &partition_bin, &data_map));
TEST_ESP_OK(esp_ota_write_with_offset(update_handle, (const void *)partition_bin, write_bytes, offset));
spi_flash_munmap(data_map);
bytes_to_write -= write_bytes;
offset += write_bytes;
}
ESP_LOGI(TAG, "finish the copy process");
}
#if defined(CONFIG_BOOTLOADER_FACTORY_RESET) || defined(CONFIG_BOOTLOADER_APP_TEST)
@@ -128,26 +103,6 @@ static void copy_current_app_to_next_part(const esp_partition_t *cur_app_partiti
TEST_ESP_OK(esp_ota_set_boot_partition(next_app_partition));
}
/* @brief Copies a current app to next partition (OTA0-15) and then configure OTA data for a new boot partition.
*
* @param[in] cur_app_partition - Current app.
* @param[in] next_app_partition - Next app for boot.
*/
static void copy_current_app_to_next_part_with_offset(const esp_partition_t *cur_app_partition, const esp_partition_t *next_app_partition)
{
esp_ota_get_next_update_partition(NULL);
TEST_ASSERT_NOT_EQUAL(NULL, next_app_partition);
ESP_LOGI(TAG, "Writing to partition subtype %d at offset 0x%x", next_app_partition->subtype, next_app_partition->address);
esp_ota_handle_t update_handle = 0;
TEST_ESP_OK(esp_ota_begin(next_app_partition, OTA_SIZE_UNKNOWN, &update_handle));
copy_app_partition_with_offset(update_handle, cur_app_partition);
TEST_ESP_OK(esp_ota_end(update_handle));
TEST_ESP_OK(esp_ota_set_boot_partition(next_app_partition));
}
/* @brief Erase otadata partition
*/
static void erase_ota_data(void)
@@ -161,7 +116,6 @@ static void erase_ota_data(void)
*/
static void reboot_as_deep_sleep(void)
{
ESP_LOGI(TAG, "reboot as deep sleep");
esp_sleep_enable_timer_wakeup(2000);
esp_deep_sleep_start();
}
@@ -171,21 +125,10 @@ static void reboot_as_deep_sleep(void)
static void copy_current_app_to_next_part_and_reboot(void)
{
const esp_partition_t *cur_app = esp_ota_get_running_partition();
ESP_LOGI(TAG, "copy current app to next part");
copy_current_app_to_next_part(cur_app, get_next_update_partition());
reboot_as_deep_sleep();
}
/* @brief Copies a current app to next partition (OTA0-15) using esp_ota_write_with_offest(), after that ESP is rebooting and run this (the next) OTAx.
*/
static void copy_current_app_to_next_part_with_offset_and_reboot(void)
{
const esp_partition_t *cur_app = esp_ota_get_running_partition();
ESP_LOGI(TAG, "copy current app to next part");
copy_current_app_to_next_part_with_offset(cur_app, get_next_update_partition());
reboot_as_deep_sleep();
}
/* @brief Get running app.
*
* @return The next partition of OTA(OTA0-15).
@@ -313,7 +256,6 @@ static void start_test(void)
ESP_LOGI(TAG, "boot count 1 - reset");
boot_count = 1;
erase_ota_data();
ESP_LOGI(TAG, "ota_data erased");
reboot_as_deep_sleep();
}
@@ -793,32 +735,3 @@ static void test_erase_last_app_rollback(void)
// 4 Stage: run OTA1 -> check it -> erase OTA0 and rollback -> reboot
// 5 Stage: run factory -> check it -> erase OTA_DATA for next tests -> PASS
TEST_CASE_MULTIPLE_STAGES("Test erase_last_boot_app_partition. factory, OTA1, OTA0, factory", "[app_update][timeout=90][reset=DEEPSLEEP_RESET, DEEPSLEEP_RESET, DEEPSLEEP_RESET, SW_CPU_RESET]", start_test, test_erase_last_app_flow, test_erase_last_app_flow, test_erase_last_app_flow, test_erase_last_app_rollback);
static void test_flow6(void)
{
boot_count++;
ESP_LOGI(TAG, "boot count %d", boot_count);
const esp_partition_t *cur_app = get_running_firmware();
switch (boot_count) {
case 2:
ESP_LOGI(TAG, "Factory");
TEST_ASSERT_EQUAL(ESP_PARTITION_SUBTYPE_APP_FACTORY, cur_app->subtype);
copy_current_app_to_next_part_with_offset_and_reboot();
break;
case 3:
ESP_LOGI(TAG, "OTA0");
TEST_ASSERT_EQUAL(ESP_PARTITION_SUBTYPE_APP_OTA_0, cur_app->subtype);
mark_app_valid();
erase_ota_data();
break;
default:
erase_ota_data();
TEST_FAIL_MESSAGE("Unexpected stage");
break;
}
}
// 1 Stage: After POWER_RESET erase OTA_DATA for this test -> reboot through deep sleep.
// 2 Stage: run factory -> check it -> copy factory to OTA0 -> reboot --//--
// 3 Stage: run OTA0 -> check it -> erase OTA_DATA for next tests -> PASS
TEST_CASE_MULTIPLE_STAGES("Switching between factory, OTA0 using esp_ota_write_with_offset", "[app_update][timeout=90][reset=DEEPSLEEP_RESET, DEEPSLEEP_RESET]", start_test, test_flow6, test_flow6);

View File

@@ -5,17 +5,17 @@ if(BOOTLOADER_BUILD OR NOT CONFIG_APP_BUILD_BOOTLOADER)
return()
endif()
add_dependencies(bootloader partition_table_bin)
# When secure boot is enabled, do not flash bootloader along with invocation of `idf.py flash`
if(NOT CONFIG_SECURE_BOOT)
set(flash_bootloader FLASH_IN_PROJECT)
endif()
esptool_py_custom_target(bootloader-flash bootloader "bootloader")
esptool_py_flash_target_image(bootloader-flash bootloader "0x1000" "${BOOTLOADER_BUILD_DIR}/bootloader.bin")
# Set values used in flash_bootloader_args.in and generate flash file
# for bootloader
esptool_py_flash_project_args(bootloader 0x1000
${BOOTLOADER_BUILD_DIR}/bootloader.bin
${flash_bootloader}
FLASH_FILE_TEMPLATE flash_bootloader_args.in)
# Also attach an image to the project flash target
if(NOT CONFIG_SECURE_BOOT)
esptool_py_flash_target_image(flash bootloader "0x1000" "${BOOTLOADER_BUILD_DIR}/bootloader.bin")
endif()
esptool_py_custom_target(bootloader-flash bootloader "bootloader")
add_dependencies(bootloader partition_table)

View File

@@ -53,34 +53,20 @@ menu "Bootloader config"
default 4 if BOOTLOADER_LOG_LEVEL_DEBUG
default 5 if BOOTLOADER_LOG_LEVEL_VERBOSE
config BOOTLOADER_SPI_CUSTOM_WP_PIN
bool "Use custom SPI Flash WP Pin when flash pins set in eFuse (read help)"
depends on IDF_TARGET_ESP32 && (ESPTOOLPY_FLASHMODE_QIO || ESPTOOLPY_FLASHMODE_QOUT)
default y if BOOTLOADER_SPI_WP_PIN != 7 # backwards compatibility, can remove in IDF 5
default n
help
This setting is only used if the SPI flash pins have been overridden by setting the eFuses
SPI_PAD_CONFIG_xxx, and the SPI flash mode is QIO or QOUT.
When this is the case, the eFuse config only defines 3 of the 4 Quad I/O data pins. The WP pin (aka
ESP32 pin "SD_DATA_3" or SPI flash pin "IO2") is not specified in eFuse. The same pin is also used
for external SPIRAM if it is enabled.
If this config item is set to N (default), the correct WP pin will be automatically used for any
Espressif chip or module with integrated flash. If a custom setting is needed, set this config item to
Y and specify the GPIO number connected to the WP.
config BOOTLOADER_SPI_WP_PIN
int "Custom SPI Flash WP Pin"
int "SPI Flash WP Pin when customising pins via eFuse (read help)"
range 0 33
default 7
depends on IDF_TARGET_ESP32 && (ESPTOOLPY_FLASHMODE_QIO || ESPTOOLPY_FLASHMODE_QOUT)
#depends on BOOTLOADER_SPI_CUSTOM_WP_PIN # backwards compatibility, can uncomment in IDF 5
depends on ESPTOOLPY_FLASHMODE_QIO || ESPTOOLPY_FLASHMODE_QOUT
help
The option "Use custom SPI Flash WP Pin" must be set or this value is ignored
This value is ignored unless flash mode is set to QIO or QOUT *and* the SPI flash pins have been
overriden by setting the eFuses SPI_PAD_CONFIG_xxx.
If burning a customized set of SPI flash pins in eFuse and using QIO or QOUT mode for flash, set this
value to the GPIO number of the SPI flash WP pin.
When this is the case, the eFuse config only defines 3 of the 4 Quad I/O data pins. The WP pin (aka ESP32
pin "SD_DATA_3" or SPI flash pin "IO2") is not specified in eFuse. That pin number is compiled into the
bootloader instead.
The default value (GPIO 7) is correct for WP pin on ESP32-D2WD integrated flash.
choice BOOTLOADER_VDDSDIO_BOOST
bool "VDDSDIO LDO voltage"
@@ -245,11 +231,11 @@ menu "Bootloader config"
depends on BOOTLOADER_APP_ANTI_ROLLBACK
range 1 32 if IDF_TARGET_ESP32
default 32 if IDF_TARGET_ESP32
range 1 16 if IDF_TARGET_ESP32S2
default 16 if IDF_TARGET_ESP32S2
range 1 16 if IDF_TARGET_ESP32S2BETA
default 16 if IDF_TARGET_ESP32S2BETA
help
The size of the efuse secure version field.
Its length is limited to 32 bits for ESP32 and 16 bits for ESP32-S2.
Its length is limited to 32 bits for ESP32 and 16 bits for ESP32S2BETA.
This determines how many times the security version can be increased.
config BOOTLOADER_EFUSE_SECURE_VERSION_EMULATE
@@ -334,16 +320,6 @@ menu "Security features"
select MBEDTLS_ECDSA_C
depends on SECURE_SIGNED_ON_BOOT || SECURE_SIGNED_ON_UPDATE
config SECURE_BOOT_SUPPORTS_RSA
bool
default y
depends on ESP32_REV_MIN_3 || IDF_TARGET_ESP32S2
config SECURE_TARGET_HAS_SECURE_ROM_DL_MODE
bool
default y
depends on IDF_TARGET_ESP32S2
config SECURE_SIGNED_APPS_NO_SECURE_BOOT
bool "Require signed app images"
@@ -379,7 +355,7 @@ menu "Security features"
config SECURE_SIGNED_APPS_RSA_SCHEME
bool "RSA"
depends on SECURE_BOOT_SUPPORTS_RSA && SECURE_BOOT_V2_ENABLED
depends on ESP32_REV_MIN_3 && SECURE_BOOT_V2_ENABLED
help
Appends the RSA-3072 based Signature block to the application.
Refer to <Secure Boot Version 2 documentation link> before enabling.
@@ -443,9 +419,7 @@ menu "Security features"
config SECURE_BOOT_V2_ENABLED
bool "Enable Secure Boot version 2"
depends on SECURE_BOOT_SUPPORTS_RSA
select SECURE_ENABLE_SECURE_ROM_DL_MODE if !IDF_TARGET_ESP32 && !SECURE_INSECURE_ALLOW_DL_MODE && !SECURE_DISABLE_ROM_DL_MODE # NOERROR
select SECURE_DISABLE_ROM_DL_MODE if ESP32_REV_MIN_3 && !SECURE_INSECURE_ALLOW_DL_MODE
depends on ESP32_REV_MIN_3
help
Build a bootloader which enables Secure Boot version 2 on first boot.
Refer to Secure Boot V2 section of the ESP-IDF Programmer's Guide for this version before enabling.
@@ -565,7 +539,6 @@ menu "Security features"
config SECURE_FLASH_ENC_ENABLED
bool "Enable flash encryption on boot (READ DOCS FIRST)"
default N
select SPI_FLASH_ENABLE_ENCRYPTED_READ_WRITE
help
If this option is set, flash contents will be encrypted by the bootloader on first boot.
@@ -578,7 +551,7 @@ menu "Security features"
choice SECURE_FLASH_ENCRYPTION_KEYSIZE
bool "Size of generated AES-XTS key"
default SECURE_FLASH_ENCRYPTION_AES128
depends on IDF_TARGET_ESP32S2 && SECURE_FLASH_ENC_ENABLED
depends on IDF_TARGET_ESP32S2BETA && SECURE_FLASH_ENC_ENABLED
help
Size of generated AES-XTS key.
@@ -614,8 +587,6 @@ menu "Security features"
config SECURE_FLASH_ENCRYPTION_MODE_RELEASE
bool "Release"
select SECURE_ENABLE_SECURE_ROM_DL_MODE if SECURE_TARGET_HAS_SECURE_ROM_DL_MODE && !SECURE_DISABLE_ROM_DL_MODE # NOERROR
select PARTITION_TABLE_MD5 if !ESP32_COMPATIBLE_PRE_V3_1_BOOTLOADERS
endchoice
@@ -630,7 +601,7 @@ menu "Security features"
config SECURE_BOOT_ALLOW_ROM_BASIC
bool "Leave ROM BASIC Interpreter available on reset"
depends on (SECURE_BOOT_INSECURE || SECURE_FLASH_ENCRYPTION_MODE_DEVELOPMENT) && IDF_TARGET_ESP32
depends on SECURE_BOOT_INSECURE || SECURE_FLASH_ENCRYPTION_MODE_DEVELOPMENT
default N
help
By default, the BASIC ROM Console starts on reset if no valid bootloader is
@@ -681,19 +652,6 @@ menu "Security features"
key digest, causing an immediate denial of service and possibly allowing an additional fault
injection attack to bypass the signature protection.
config SECURE_INSECURE_ALLOW_DL_MODE
bool "Don't automatically restrict UART download mode"
depends on SECURE_BOOT_INSECURE && SECURE_BOOT_V2_ENABLED
default N
help
By default, enabling either flash encryption in release mode or secure boot will automatically
disable UART download mode on ESP32 ECO3, or enable secure download mode on newer chips.
This is recommended to reduce the attack surface of the chip.
To allow the full UART download mode to stay enabled, enable this option and ensure
the options SECURE_DISABLE_ROM_DL_MODE and SECURE_ENABLE_SECURE_ROM_DL_MODE are disabled as applicable.
This is not recommended.
config SECURE_FLASH_UART_BOOTLOADER_ALLOW_ENC
bool "Leave UART bootloader encryption enabled"
depends on SECURE_FLASH_ENCRYPTION_MODE_DEVELOPMENT
@@ -706,7 +664,7 @@ menu "Security features"
config SECURE_FLASH_UART_BOOTLOADER_ALLOW_DEC
bool "Leave UART bootloader decryption enabled"
depends on SECURE_FLASH_ENCRYPTION_MODE_DEVELOPMENT && IDF_TARGET_ESP32
depends on SECURE_FLASH_ENCRYPTION_MODE_DEVELOPMENT
default N
help
If not set (default), the bootloader will permanently disable UART bootloader decryption access on
@@ -740,48 +698,5 @@ menu "Security features"
the wrong device. The device needs to have flash encryption already enabled using espefuse.py.
endmenu # Potentially Insecure
config SECURE_DISABLE_ROM_DL_MODE
bool "Permanently disable ROM Download Mode"
depends on !IDF_TARGET_ESP32 || ESP32_REV_MIN_3
default n
help
If set, during startup the app will burn an eFuse bit to permanently disable the UART ROM
Download Mode. This prevents any future use of esptool.py, espefuse.py and similar tools.
Once disabled, if the SoC is booted with strapping pins set for ROM Download Mode
then an error is printed instead.
It is recommended to enable this option in any production application where Flash
Encryption and/or Secure Boot is enabled and access to Download Mode is not required.
It is also possible to permanently disable Download Mode by calling
esp_efuse_disable_rom_download_mode() at runtime.
config SECURE_ENABLE_SECURE_ROM_DL_MODE
bool "Permanently switch to ROM UART Secure Download mode"
depends on SECURE_TARGET_HAS_SECURE_ROM_DL_MODE && !SECURE_DISABLE_ROM_DL_MODE
help
If set, during startup the app will burn an eFuse bit to permanently switch the UART ROM
Download Mode into a separate Secure Download mode. This option can only work if
Download Mode is not already disabled by eFuse.
Secure Download mode limits the use of Download Mode functions to simple flash read,
write and erase operations, plus a command to return a summary of currently enabled
security features.
Secure Download mode is not compatible with the esptool.py flasher stub feature,
espefuse.py, read/writing memory or registers, encrypted download, or any other
features that interact with unsupported Download Mode commands.
Secure Download mode should be enabled in any application where Flash Encryption
and/or Secure Boot is enabled. Disabling this option does not immediately cancel
the benefits of the security features, but it increases the potential "attack
surface" for an attacker to try and bypass them with a successful physical attack.
It is also possible to enable secure download mode at runtime by calling
esp_efuse_enable_rom_secure_download_mode()
endmenu # Security features

View File

@@ -102,7 +102,7 @@ endif
bootloader: $(BOOTLOADER_DIGEST_BIN)
@echo $(SEPARATOR)
@echo "Bootloader built and secure digest generated. First time flash command is:"
@echo "$(ESPEFUSEPY) burn_key secure_boot_v1 $(SECURE_BOOTLOADER_KEY)"
@echo "$(ESPEFUSEPY) burn_key secure_boot $(SECURE_BOOTLOADER_KEY)"
@echo "$(ESPTOOLPY_WRITE_FLASH) $(BOOTLOADER_OFFSET) $(BOOTLOADER_BIN)"
@echo $(SEPARATOR)
@echo "To reflash the bootloader after initial flash:"

View File

@@ -0,0 +1,4 @@
--flash_mode ${ESPFLASHMODE}
--flash_size ${ESPFLASHSIZE}
--flash_freq ${ESPFLASHFREQ}
${OFFSET} ${IMAGE}

View File

@@ -29,16 +29,9 @@ project(bootloader)
idf_build_set_property(COMPILE_DEFINITIONS "-DBOOTLOADER_BUILD=1" APPEND)
idf_build_set_property(COMPILE_OPTIONS "-fno-stack-protector" APPEND)
idf_component_get_property(main_args esptool_py FLASH_ARGS)
idf_component_get_property(sub_args esptool_py FLASH_SUB_ARGS)
# String for printing flash command
string(REPLACE ";" " " esptoolpy_write_flash
"${ESPTOOLPY} --port=(PORT) --baud=(BAUD) ${main_args} "
"write_flash ${sub_args}")
string(REPLACE ";" " " espsecurepy "${ESPSECUREPY}")
string(REPLACE ";" " " espefusepy "${ESPEFUSEPY}")
set(esptoolpy_write_flash "${ESPTOOLPY_WRITE_FLASH_STR}")
if(CONFIG_SECURE_BOOTLOADER_REFLASHABLE)
if(CONFIG_SECURE_BOOTLOADER_KEY_ENCODING_192BIT)
@@ -92,20 +85,20 @@ endif()
if(CONFIG_SECURE_BOOT_V2_ENABLED)
if(CONFIG_SECURE_BOOT_BUILD_SIGNED_BINARIES)
get_filename_component(secure_boot_signing_key
get_filename_component(secure_boot_signing_key
"${SECURE_BOOT_SIGNING_KEY}" ABSOLUTE BASE_DIR "${project_dir}")
if(NOT EXISTS "${secure_boot_signing_key}")
message(FATAL_ERROR
"Secure Boot Signing Key Not found."
"\nGenerate the Secure Boot V2 RSA-PSS 3072 Key."
"\nTo generate one, you can use this command:"
"\n\t${espsecurepy} generate_signing_key --version 2 ${SECURE_BOOT_SIGNING_KEY}")
message(FATAL_ERROR
"Secure Boot Signing Key Not found."
"\nGenerate the Secure Boot V2 RSA-PSS 3072 Key."
"\nTo generate one, you can use this command:"
"\n\t${espsecurepy} generate_signing_key --version 2 ${SECURE_BOOT_SIGNING_KEY}")
endif()
set(bootloader_unsigned_bin "bootloader-unsigned.bin")
add_custom_command(OUTPUT ".signed_bin_timestamp"
COMMAND ${CMAKE_COMMAND} -E copy "${CMAKE_BINARY_DIR}/${PROJECT_BIN}" "${CMAKE_BINARY_DIR}/${bootloader_unsigned_bin}"
COMMAND cp "${CMAKE_BINARY_DIR}/${PROJECT_BIN}" "${CMAKE_BINARY_DIR}/${bootloader_unsigned_bin}"
COMMAND ${ESPSECUREPY} sign_data --version 2 --keyfile "${secure_boot_signing_key}"
-o "${CMAKE_BINARY_DIR}/${PROJECT_BIN}" "${CMAKE_BINARY_DIR}/${bootloader_unsigned_bin}"
COMMAND ${CMAKE_COMMAND} -E echo "Generated signed binary image ${build_dir}/${PROJECT_BIN}"
@@ -117,7 +110,7 @@ if(CONFIG_SECURE_BOOT_V2_ENABLED)
else()
add_custom_command(OUTPUT ".signed_bin_timestamp"
VERBATIM
COMMENT "Bootloader generated but not signed")
COMMENT "Bootloader generated but not signed")
endif()
add_custom_target (gen_signed_bootloader ALL DEPENDS "${build_dir}/.signed_bin_timestamp")
@@ -147,7 +140,7 @@ elseif(CONFIG_SECURE_BOOTLOADER_REFLASHABLE)
COMMAND ${CMAKE_COMMAND} -E echo
"Burn secure boot key to efuse using:"
COMMAND ${CMAKE_COMMAND} -E echo
"\t${espefusepy} burn_key secure_boot_v1 ${secure_bootloader_key}"
"\t${espefusepy} burn_key secure_boot ${secure_bootloader_key}"
COMMAND ${CMAKE_COMMAND} -E echo
"First time flash command is:"
COMMAND ${CMAKE_COMMAND} -E echo
@@ -166,24 +159,6 @@ elseif(CONFIG_SECURE_BOOTLOADER_REFLASHABLE)
"* Not recommended to re-use the same secure boot keyfile on multiple production devices."
DEPENDS gen_secure_bootloader_key gen_bootloader_digest_bin
VERBATIM)
elseif(CONFIG_SECURE_BOOT_V2_ENABLED AND CONFIG_IDF_TARGET_ESP32S2)
add_custom_command(TARGET bootloader.elf POST_BUILD
COMMAND ${CMAKE_COMMAND} -E echo
"=============================================================================="
COMMAND ${CMAKE_COMMAND} -E echo
"Bootloader built. Secure boot enabled, so bootloader not flashed automatically."
COMMAND ${CMAKE_COMMAND} -E echo
"To sign the bootloader with additional private keys."
COMMAND ${CMAKE_COMMAND} -E echo
"\t${espsecurepy} sign_data -k secure_boot_signing_key2.pem -v 2 --append_signatures -o signed_bootloader.bin build/bootloader/bootloader.bin"
COMMAND ${CMAKE_COMMAND} -E echo
"Secure boot enabled, so bootloader not flashed automatically."
COMMAND ${CMAKE_COMMAND} -E echo
"\t${esptoolpy_write_flash} ${BOOTLOADER_OFFSET} ${CMAKE_BINARY_DIR}/bootloader.bin"
COMMAND ${CMAKE_COMMAND} -E echo
"=============================================================================="
DEPENDS gen_signed_bootloader
VERBATIM)
elseif(CONFIG_SECURE_BOOT_V2_ENABLED)
add_custom_command(TARGET bootloader.elf POST_BUILD
COMMAND ${CMAKE_COMMAND} -E echo

View File

@@ -11,6 +11,8 @@ Linker file used to link the bootloader.
MEMORY
{
/* I/O */
dport0_seg (RW) : org = 0x3FF00000, len = 0x10
/* IRAM POOL1, used for APP CPU cache. Bootloader runs from here during the final stage of loading the app because APP CPU is still held in reset, the main app enables APP CPU cache */
iram_loader_seg (RWX) : org = 0x40078000, len = 0x8000 /* 32KB, APP CPU cache */
/* 63kB, IRAM. We skip the first 1k to prevent the entry point being
@@ -42,7 +44,6 @@ SECTIONS
*libbootloader_support.a:bootloader_common.*(.literal .text .literal.* .text.*)
*libbootloader_support.a:bootloader_flash.*(.literal .text .literal.* .text.*)
*libbootloader_support.a:bootloader_random.*(.literal .text .literal.* .text.*)
*libbootloader_support.a:bootloader_random*.*(.literal.bootloader_random_disable .text.bootloader_random_disable)
*libbootloader_support.a:bootloader_efuse_esp32.*(.literal .text .literal.* .text.*)
*libbootloader_support.a:bootloader_utility.*(.literal .text .literal.* .text.*)
*libbootloader_support.a:bootloader_sha.*(.literal .text .literal.* .text.*)
@@ -53,7 +54,7 @@ SECTIONS
*libbootloader_support.a:secure_boot_signatures.*(.literal .text .literal.* .text.*)
*libmicro-ecc.a:*.*(.literal .text .literal.* .text.*)
*libspi_flash.a:*.*(.literal .text .literal.* .text.*)
*libsoc.a:wdt_hal_iram.*(.literal .text .literal.* .text.*)
*libsoc.a:rtc_wdt.*(.literal .text .literal.* .text.*)
*libsoc.a:rtc_clk.*(.literal .text .literal.* .text.*)
*libefuse.a:*.*(.literal .text .literal.* .text.*)
*(.fini.literal)

View File

@@ -1,13 +0,0 @@
/*
* ESP32S2 ROM address table
* Generated for ROM with MD5sum: 0a2c7ec5109c17884606d23b47045796
*/
PROVIDE (ets_update_cpu_frequency = 0x4000d8a4);
PROVIDE (MD5Final = 0x4000530c);
PROVIDE (MD5Init = 0x4000526c);
PROVIDE (MD5Update = 0x4000528c);
/* bootloader will use following functions from xtensa hal library */
xthal_get_ccount = 0x4001aa90;
xthal_get_ccompare = 0x4001aabc;
xthal_set_ccompare = 0x4001aa98;

View File

@@ -1,13 +1,22 @@
/* Simplified memory map for the bootloader.
* Make sure the bootloader can load into main memory without overwriting itself.
*/
/*
Linker file used to link the bootloader.
*/
/* Simplified memory map for the bootloader
The main purpose is to make sure the bootloader can load into main memory
without overwriting itself.
*/
MEMORY
{
iram_seg (RWX) : org = 0x4004c000, len = 0x4000 /* SRAM Block 13 */
iram_loader_seg (RWX) : org = 0x40050000, len = 0x6000 /* SRAM Block 14 & part of 15 */
dram_seg (RW) : org = 0x3FFE6000, len = 0x4B00 /* Part SRAM Blocks 15 & 16, ROM static buffer starts at end of this region (reclaimed after app runs) */
/* I/O */
dport0_seg (RW) : org = 0x3FF00000, len = 0x10
iram_loader_seg (RWX) : org = 0x40062000, len = 0x4000 /* 16KB, IRAM */
iram_seg (RWX) : org = 0x40066000, len = 0x4000 /* 16KB, IRAM */
/* 8k at the end of DRAM, before ROM data & stack */
dram_seg (RW) : org = 0x3FFFA000, len = 0x2000
}
/* Default entry point: */
@@ -28,7 +37,6 @@ SECTIONS
*libbootloader_support.a:bootloader_common.*(.literal .text .literal.* .text.*)
*libbootloader_support.a:bootloader_flash.*(.literal .text .literal.* .text.*)
*libbootloader_support.a:bootloader_random.*(.literal .text .literal.* .text.*)
*libbootloader_support.a:bootloader_random*.*(.literal.bootloader_random_disable .text.bootloader_random_disable)
*libbootloader_support.a:bootloader_efuse_esp32s2.*(.literal .text .literal.* .text.*)
*libbootloader_support.a:bootloader_utility.*(.literal .text .literal.* .text.*)
*libbootloader_support.a:bootloader_sha.*(.literal .text .literal.* .text.*)
@@ -39,8 +47,7 @@ SECTIONS
*libbootloader_support.a:secure_boot_signatures.*(.literal .text .literal.* .text.*)
*libmicro-ecc.a:*.*(.literal .text .literal.* .text.*)
*libspi_flash.a:*.*(.literal .text .literal.* .text.*)
*libsoc.a:wdt_hal_iram.*(.literal .text .literal.* .text.*)
*libsoc.a:regi2c_ctrl.*(.literal .text .literal.* .text.*)
*libsoc.a:rtc_wdt.*(.literal .text .literal.* .text.*)
*libefuse.a:*.*(.literal .text .literal.* .text.*)
*(.fini.literal)
*(.fini)

View File

@@ -0,0 +1,14 @@
/*
* ESP32S2 ROM address table
* Generated for ROM with MD5sum: f054d40c5f6b9207d3827460a6f5748c
*/
PROVIDE ( ets_update_cpu_frequency = 0x4000d954 );
/* ToDo: Following address may need modification */
PROVIDE ( MD5Final = 0x400056e8 );
PROVIDE ( MD5Init = 0x40005648 );
PROVIDE ( MD5Update = 0x40005668 );
/* bootloader will use following functions from xtensa hal library */
xthal_get_ccount = 0x40015cbc;
xthal_get_ccompare = 0x40015ce8;
xthal_set_ccompare = 0x40015cc4;

View File

@@ -2,18 +2,20 @@ set(srcs
"src/bootloader_clock.c"
"src/bootloader_common.c"
"src/bootloader_flash.c"
"src/bootloader_mem.c"
"src/bootloader_random.c"
"src/bootloader_random_${IDF_TARGET}.c"
"src/bootloader_utility.c"
"src/esp_image_format.c"
"src/flash_encrypt.c"
"src/flash_partitions.c"
"src/flash_qio_mode.c"
"src/bootloader_flash_config_${IDF_TARGET}.c"
"src/bootloader_efuse_${IDF_TARGET}.c"
)
if(IDF_TARGET STREQUAL "esp32")
# Not supported on ESP32S2Beta yet
list(APPEND srcs "src/flash_encrypt.c")
endif()
if(BOOTLOADER_BUILD)
set(include_dirs "include" "include_bootloader")
set(priv_requires micro-ecc spi_flash efuse)

View File

@@ -19,9 +19,8 @@ ifndef IS_BOOTLOADER_BUILD
COMPONENT_OBJEXCLUDE := src/bootloader_init.o
endif
COMPONENT_OBJEXCLUDE += src/bootloader_flash_config_esp32s2.o \
src/bootloader_efuse_esp32s2.o \
src/bootloader_random_esp32s2.o
COMPONENT_OBJEXCLUDE += src/bootloader_flash_config_esp32s2beta.o \
src/bootloader_efuse_esp32s2beta.o
ifndef CONFIG_SECURE_SIGNED_APPS_ECDSA_SCHEME
ifndef CONFIG_SECURE_SIGNED_APPS_RSA_SCHEME

View File

@@ -19,8 +19,8 @@
// RESET_REASON is declared in rom/rtc.h
#if CONFIG_IDF_TARGET_ESP32
#include "esp32/rom/rtc.h"
#elif CONFIG_IDF_TARGET_ESP32S2
#include "esp32s2/rom/rtc.h"
#elif CONFIG_IDF_TARGET_ESP32S2BETA
#include "esp32s2beta/rom/rtc.h"
#endif
#ifdef __cplusplus

View File

@@ -14,7 +14,6 @@
#pragma once
#include "sdkconfig.h"
#include "esp_image_format.h"
#ifdef __cplusplus
@@ -28,14 +27,6 @@ extern "C" {
*/
void bootloader_flash_update_id(void);
/**
* @brief Update the flash size in g_rom_flashchip (global esp_rom_spiflash_chip_t structure).
*
* @param size The size to store, in bytes.
* @return None
*/
void bootloader_flash_update_size(uint32_t size);
/**
* @brief Set the flash CS setup and hold time.
*
@@ -75,22 +66,6 @@ void bootloader_flash_gpio_config(const esp_image_header_t* pfhdr);
*/
void bootloader_flash_dummy_config(const esp_image_header_t* pfhdr);
#ifdef CONFIG_IDF_TARGET_ESP32
/**
* @brief Return the pin number used for custom SPI flash and/or SPIRAM WP pin
*
* Can be determined by eFuse values in most cases, or overriden in configuration
*
* This value is only meaningful if the other SPI flash pins are overriden via eFuse.
*
* This value is only meaningful if flash is set to QIO or QOUT mode, or if
* SPIRAM is enabled.
*
* @return Pin number to use, or -1 if the default should be kept
*/
int bootloader_flash_get_wp_pin(void);
#endif
#ifdef __cplusplus
}
#endif

View File

@@ -1,24 +0,0 @@
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#pragma once
#ifdef __cplusplus
extern "C" {
#endif
void bootloader_init_mem(void);
#ifdef __cplusplus
}
#endif

View File

@@ -19,7 +19,6 @@
*/
typedef enum {
ESP_CHIP_ID_ESP32 = 0x0000, /*!< chip ID: ESP32 */
ESP_CHIP_ID_ESP32S2 = 0x0002, /*!< chip ID: ESP32S2 */
ESP_CHIP_ID_INVALID = 0xFFFF /*!< Invalid chip ID (we defined it to make sure the esp_chip_id_t is 2 bytes size) */
} __attribute__((packed)) esp_chip_id_t;

View File

@@ -52,7 +52,7 @@ static inline /** @cond */ IRAM_ATTR /** @endcond */ bool esp_flash_encryption_e
uint32_t flash_crypt_cnt;
#if CONFIG_IDF_TARGET_ESP32
flash_crypt_cnt = REG_GET_FIELD(EFUSE_BLK0_RDATA0_REG, EFUSE_RD_FLASH_CRYPT_CNT);
#elif CONFIG_IDF_TARGET_ESP32S2
#elif CONFIG_IDF_TARGET_ESP32S2BETA
flash_crypt_cnt = REG_GET_FIELD(EFUSE_RD_REPEAT_DATA1_REG, EFUSE_SPI_BOOT_CRYPT_CNT);
#endif
/* __builtin_parity is in flash, so we calculate parity inline */
@@ -128,10 +128,6 @@ esp_err_t esp_flash_encrypt_region(uint32_t src_addr, size_t data_length);
* is enabled but secure boot is not used. This should protect against
* serial re-flashing of an unauthorised code in absence of secure boot.
*
* @note On ESP32 V3 only, write protecting FLASH_CRYPT_CNT will also prevent
* disabling UART Download Mode. If both are wanted, call
* esp_efuse_disable_rom_download_mode() before calling this function.
*
*/
void esp_flash_write_protect_crypt_cnt(void);

View File

@@ -42,9 +42,6 @@ extern "C" {
#define PART_FLAG_ENCRYPTED (1<<0)
/* The md5sum value is found this many bytes after the ESP_PARTITION_MAGIC_MD5 offset */
#define ESP_PARTITION_MD5_OFFSET 16
/* Pre-partition table fixed flash offsets */
#define ESP_BOOTLOADER_DIGEST_OFFSET 0x0
#define ESP_BOOTLOADER_OFFSET 0x1000 /* Offset of bootloader image. Has matching value in bootloader KConfig.projbuild file. */

View File

@@ -169,14 +169,6 @@ esp_err_t esp_image_verify_bootloader(uint32_t *length);
*/
esp_err_t esp_image_verify_bootloader_data(esp_image_metadata_t *data);
/**
* @brief Get the flash size of the image
*
* @param app_flash_size The value configured in the image header
* @return Actual size, in bytes.
*/
int esp_image_get_flash_size(esp_image_flash_size_t app_flash_size);
typedef struct {
uint32_t drom_addr;

View File

@@ -19,8 +19,8 @@
#include "esp_image_format.h"
#include "sdkconfig.h"
#if CONFIG_IDF_TARGET_ESP32S2
#include "esp32s2/rom/efuse.h"
#if CONFIG_IDF_TARGET_ESP32S2BETA
#include "esp32s2beta/rom/efuse.h"
#else
#include "esp32/rom/secure_boot.h"
#endif
@@ -57,7 +57,7 @@ static inline bool esp_secure_boot_enabled(void)
#elif CONFIG_SECURE_BOOT_V2_ENABLED
return ets_use_secure_boot_v2();
#endif
#elif CONFIG_IDF_TARGET_ESP32S2
#elif CONFIG_IDF_TARGET_ESP32S2BETA
return ets_efuse_secure_boot_enabled();
#endif
return false; /* Secure Boot not enabled in menuconfig */

View File

@@ -16,14 +16,13 @@
#include "soc/rtc.h"
#include "soc/dport_reg.h"
#include "soc/efuse_periph.h"
#include "soc/rtc_cntl_reg.h"
#ifdef CONFIG_IDF_TARGET_ESP32
#include "esp32/rom/uart.h"
#include "esp32/rom/rtc.h"
#elif CONFIG_IDF_TARGET_ESP32S2
#include "esp32s2/rom/uart.h"
#include "esp32s2/rom/rtc.h"
#else
#include "esp32s2beta/rom/uart.h"
#include "esp32s2beta/rom/rtc.h"
#endif
void bootloader_clock_configure(void)
@@ -35,15 +34,15 @@ void bootloader_clock_configure(void)
// and will be done with the bootloader much earlier than UART FIFO is empty.
uart_tx_wait_idle(0);
/* Set CPU to 80MHz. Keep other clocks unmodified. */
int cpu_freq_mhz = 80;
#if CONFIG_IDF_TARGET_ESP32
/* On ESP32 rev 0, switching to 80/160 MHz if clock was previously set to
* 240 MHz may cause the chip to lock up (see section 3.5 of the errata
* document). For rev. 0, switch to 240 instead if it has been enabled
* previously.
*/
#if CONFIG_IDF_TARGET_ESP32
/* Set CPU to 80MHz. Keep other clocks unmodified. */
int cpu_freq_mhz = 80;
uint32_t chip_ver_reg = REG_READ(EFUSE_BLK0_RDATA3_REG);
if ((chip_ver_reg & EFUSE_RD_CHIP_VER_REV1_M) == 0 &&
DPORT_REG_GET_FIELD(DPORT_CPU_PER_CONF_REG, DPORT_CPUPERIOD_SEL) == DPORT_CPUPERIOD_SEL_240) {
@@ -54,9 +53,11 @@ void bootloader_clock_configure(void)
rtc_clk_config_t clk_cfg = RTC_CLK_CONFIG_DEFAULT();
#if CONFIG_IDF_TARGET_ESP32
clk_cfg.xtal_freq = CONFIG_ESP32_XTAL_FREQ;
#endif
/* ESP32-S2 doesn't have XTAL_FREQ choice, always 40MHz */
clk_cfg.cpu_freq_mhz = cpu_freq_mhz;
#elif CONFIG_IDF_TARGET_ESP32S2BETA
clk_cfg.xtal_freq = RTC_XTAL_FREQ_40M;
clk_cfg.cpu_freq = RTC_CPU_FREQ_80M;
#endif
clk_cfg.slow_freq = rtc_clk_slow_freq_get();
clk_cfg.fast_freq = rtc_clk_fast_freq_get();
rtc_clk_init(clk_cfg);
@@ -65,20 +66,11 @@ void bootloader_clock_configure(void)
* part of the start up time by enabling 32k XTAL early.
* App startup code will wait until the oscillator has started up.
*/
/* TODO: move the clock option into esp_system, so that this doesn't have
* to continue:
*/
#if CONFIG_ESP32_RTC_CLK_SRC_EXT_CRYS
#ifdef CONFIG_ESP32_RTC_CLK_SRC_EXT_CRYS
if (!rtc_clk_32k_enabled()) {
rtc_clk_32k_bootstrap(CONFIG_ESP32_RTC_XTAL_BOOTSTRAP_CYCLES);
}
#endif
#if CONFIG_ESP32S2_RTC_CLK_SRC_EXT_CRYS
if (!rtc_clk_32k_enabled()) {
rtc_clk_32k_bootstrap(0);
}
#endif
}
#ifdef BOOTLOADER_BUILD

View File

@@ -21,20 +21,18 @@
#include "esp32/rom/spi_flash.h"
#include "esp32/rom/crc.h"
#include "esp32/rom/gpio.h"
#elif CONFIG_IDF_TARGET_ESP32S2
#include "esp32s2/rom/spi_flash.h"
#include "esp32s2/rom/crc.h"
#include "esp32s2/rom/ets_sys.h"
#include "esp32s2/rom/gpio.h"
#elif CONFIG_IDF_TARGET_ESP32S2BETA
#include "esp32s2beta/rom/spi_flash.h"
#include "esp32s2beta/rom/crc.h"
#include "esp32s2beta/rom/ets_sys.h"
#include "esp32s2beta/rom/gpio.h"
#endif
#include "esp_flash_partitions.h"
#include "bootloader_flash.h"
#include "bootloader_common.h"
#include "bootloader_utility.h"
#include "soc/gpio_periph.h"
#include "soc/rtc.h"
#include "soc/efuse_reg.h"
#include "soc/soc_memory_layout.h"
#include "esp_image_format.h"
#include "bootloader_sha.h"
#include "sys/param.h"
@@ -189,7 +187,22 @@ esp_err_t bootloader_common_get_sha256_of_partition (uint32_t address, uint32_t
size = data.image_len;
}
// If image is type by data then hash is calculated for entire image.
return bootloader_sha256_flash_contents(address, size, out_sha_256);
const void *partition_bin = bootloader_mmap(address, size);
if (partition_bin == NULL) {
ESP_LOGE(TAG, "bootloader_mmap(0x%x, 0x%x) failed", address, size);
return ESP_FAIL;
}
bootloader_sha256_handle_t sha_handle = bootloader_sha256_start();
if (sha_handle == NULL) {
bootloader_munmap(partition_bin);
return ESP_ERR_NO_MEM;
}
bootloader_sha256_data(sha_handle, partition_bin, size);
bootloader_sha256_finish(sha_handle, out_sha_256);
bootloader_munmap(partition_bin);
return ESP_OK;
}
int bootloader_common_select_otadata(const esp_ota_select_entry_t *two_otadata, bool *valid_two_otadata, bool max)
@@ -235,15 +248,13 @@ esp_err_t bootloader_common_get_partition_description(const esp_partition_pos_t
return ESP_ERR_INVALID_ARG;
}
const uint32_t app_desc_offset = sizeof(esp_image_header_t) + sizeof(esp_image_segment_header_t);
const uint32_t mmap_size = app_desc_offset + sizeof(esp_app_desc_t);
const uint8_t *image = bootloader_mmap(partition->offset, mmap_size);
const uint8_t *image = bootloader_mmap(partition->offset, partition->size);
if (image == NULL) {
ESP_LOGE(TAG, "bootloader_mmap(0x%x, 0x%x) failed", partition->offset, mmap_size);
ESP_LOGE(TAG, "bootloader_mmap(0x%x, 0x%x) failed", partition->offset, partition->size);
return ESP_FAIL;
}
memcpy(app_desc, image + app_desc_offset, sizeof(esp_app_desc_t));
memcpy(app_desc, image + sizeof(esp_image_header_t) + sizeof(esp_image_segment_header_t), sizeof(esp_app_desc_t));
bootloader_munmap(image);
if (app_desc->magic_word != ESP_APP_DESC_MAGIC_WORD) {
@@ -296,18 +307,7 @@ RESET_REASON bootloader_common_get_reset_reason(int cpu_no)
#if defined( CONFIG_BOOTLOADER_SKIP_VALIDATE_IN_DEEP_SLEEP ) || defined( CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC )
#define RTC_RETAIN_MEM_ADDR (SOC_RTC_DRAM_HIGH - sizeof(rtc_retain_mem_t))
rtc_retain_mem_t *const rtc_retain_mem = (rtc_retain_mem_t *)RTC_RETAIN_MEM_ADDR;
#if !IS_BOOTLOADER_BUILD
/* The app needs to be told this memory is reserved, important if configured to use RTC memory as heap.
Note that keeping this macro here only works when other symbols in this file are referenced by the app, as
this feature is otherwise 100% part of the bootloader. However this seems to happen in all apps.
*/
SOC_RESERVE_MEMORY_REGION(RTC_RETAIN_MEM_ADDR, RTC_RETAIN_MEM_ADDR + sizeof(rtc_retain_mem_t), rtc_retain_mem);
#endif
rtc_retain_mem_t *const rtc_retain_mem = (rtc_retain_mem_t *)(SOC_RTC_DRAM_HIGH - sizeof(rtc_retain_mem_t));
static bool check_rtc_retain_mem(void)
{

View File

@@ -16,9 +16,14 @@
#include "bootloader_clock.h"
#include "bootloader_common.h"
int bootloader_clock_get_rated_freq_mhz()
{
/* No known limitation: all chips are 240MHz rated */
return 240;
}
uint8_t bootloader_common_get_chip_revision(void)
{
// should return the same value as esp_efuse_get_chip_ver()
/* No other revisions for ESP32-S2 */
/* No other revisions for ESP32-S2beta */
return 0;
}

View File

@@ -16,8 +16,8 @@
#include <bootloader_flash.h>
#include <esp_log.h>
#include <esp_flash_encrypt.h>
#if CONFIG_IDF_TARGET_ESP32S2
#include "esp32s2/rom/spi_flash.h"
#if CONFIG_IDF_TARGET_ESP32S2BETA
#include "esp32s2beta/rom/spi_flash.h"
#endif
#ifndef BOOTLOADER_BUILD
@@ -71,7 +71,7 @@ esp_err_t bootloader_flash_write(size_t dest_addr, void *src, size_t size, bool
if (write_encrypted) {
#if CONFIG_IDF_TARGET_ESP32
return spi_flash_write_encrypted(dest_addr, src, size);
#elif CONFIG_IDF_TARGET_ESP32S2
#elif CONFIG_IDF_TARGET_ESP32S2BETA
return SPI_Encrypt_Write(dest_addr, src, size);
#endif
} else {
@@ -91,14 +91,13 @@ esp_err_t bootloader_flash_erase_range(uint32_t start_addr, uint32_t size)
#else
/* Bootloader version, uses ROM functions only */
#include "soc/dport_reg.h"
#include <soc/dport_reg.h>
#if CONFIG_IDF_TARGET_ESP32
#include "esp32/rom/spi_flash.h"
#include "esp32/rom/cache.h"
#elif CONFIG_IDF_TARGET_ESP32S2
#include "esp32s2/rom/spi_flash.h"
#include "esp32s2/rom/cache.h"
#include "soc/cache_memory.h"
#include <esp32/rom/spi_flash.h>
#include <esp32/rom/cache.h>
#elif CONFIG_IDF_TARGET_ESP32S2BETA
#include <esp32s2beta/rom/spi_flash.h>
#include <esp32s2beta/rom/cache.h>
#endif
static const char *TAG = "bootloader_flash";
@@ -110,7 +109,7 @@ static const char *TAG = "bootloader_flash";
#define MMU_SIZE (0x320000)
#define MMU_BLOCK50_VADDR (MMU_BLOCK0_VADDR + MMU_SIZE)
#define FLASH_READ_VADDR MMU_BLOCK50_VADDR
#elif CONFIG_IDF_TARGET_ESP32S2
#elif CONFIG_IDF_TARGET_ESP32S2BETA
/* Use first 63 blocks in MMU for bootloader_mmap,
63th block for bootloader_flash_read
*/
@@ -121,7 +120,7 @@ static const char *TAG = "bootloader_flash";
#endif
#define MMU_FREE_PAGES (MMU_SIZE / FLASH_BLOCK_SIZE)
static bool mapped;
// Current bootloader mapping (ab)used for bootloader_read()
@@ -152,7 +151,7 @@ const void *bootloader_mmap(uint32_t src_addr, uint32_t size)
#if CONFIG_IDF_TARGET_ESP32
Cache_Read_Disable(0);
Cache_Flush(0);
#elif CONFIG_IDF_TARGET_ESP32S2
#elif CONFIG_IDF_TARGET_ESP32S2BETA
uint32_t autoload = Cache_Suspend_ICache();
Cache_Invalidate_ICache_All();
#endif
@@ -160,21 +159,21 @@ const void *bootloader_mmap(uint32_t src_addr, uint32_t size)
src_addr & MMU_FLASH_MASK, count, size, src_addr, src_addr_aligned );
#if CONFIG_IDF_TARGET_ESP32
int e = cache_flash_mmu_set(0, 0, MMU_BLOCK0_VADDR, src_addr_aligned, 64, count);
#elif CONFIG_IDF_TARGET_ESP32S2
int e = Cache_Ibus_MMU_Set(MMU_ACCESS_FLASH, MMU_BLOCK0_VADDR, src_addr_aligned, 64, count, 0);
#elif CONFIG_IDF_TARGET_ESP32S2BETA
int e = Cache_Ibus_MMU_Set(DPORT_MMU_ACCESS_FLASH, MMU_BLOCK0_VADDR, src_addr_aligned, 64, count, 0);
#endif
if (e != 0) {
ESP_LOGE(TAG, "cache_flash_mmu_set failed: %d\n", e);
#if CONFIG_IDF_TARGET_ESP32
Cache_Read_Enable(0);
#elif CONFIG_IDF_TARGET_ESP32S2
#elif CONFIG_IDF_TARGET_ESP32S2BETA
Cache_Resume_ICache(autoload);
#endif
return NULL;
}
#if CONFIG_IDF_TARGET_ESP32
Cache_Read_Enable(0);
#elif CONFIG_IDF_TARGET_ESP32S2
#elif CONFIG_IDF_TARGET_ESP32S2BETA
Cache_Resume_ICache(autoload);
#endif
@@ -191,7 +190,7 @@ void bootloader_munmap(const void *mapping)
Cache_Read_Disable(0);
Cache_Flush(0);
mmu_init(0);
#elif CONFIG_IDF_TARGET_ESP32S2
#elif CONFIG_IDF_TARGET_ESP32S2BETA
//TODO, save the autoload value.
Cache_Suspend_ICache();
Cache_Invalidate_ICache_All();
@@ -221,13 +220,13 @@ static esp_err_t bootloader_flash_read_no_decrypt(size_t src_addr, void *dest, s
#if CONFIG_IDF_TARGET_ESP32
Cache_Read_Disable(0);
Cache_Flush(0);
#elif CONFIG_IDF_TARGET_ESP32S2
#elif CONFIG_IDF_TARGET_ESP32S2BETA
uint32_t autoload = Cache_Suspend_ICache();
#endif
esp_rom_spiflash_result_t r = esp_rom_spiflash_read(src_addr, dest, size);
#if CONFIG_IDF_TARGET_ESP32
Cache_Read_Enable(0);
#elif CONFIG_IDF_TARGET_ESP32S2
#elif CONFIG_IDF_TARGET_ESP32S2BETA
Cache_Resume_ICache(autoload);
#endif
@@ -247,21 +246,21 @@ static esp_err_t bootloader_flash_read_allow_decrypt(size_t src_addr, void *dest
#if CONFIG_IDF_TARGET_ESP32
Cache_Read_Disable(0);
Cache_Flush(0);
#elif CONFIG_IDF_TARGET_ESP32S2
#elif CONFIG_IDF_TARGET_ESP32S2BETA
uint32_t autoload = Cache_Suspend_ICache();
Cache_Invalidate_ICache_All();
#endif
ESP_LOGD(TAG, "mmu set block paddr=0x%08x (was 0x%08x)", map_at, current_read_mapping);
#if CONFIG_IDF_TARGET_ESP32
int e = cache_flash_mmu_set(0, 0, FLASH_READ_VADDR, map_at, 64, 1);
#elif CONFIG_IDF_TARGET_ESP32S2
int e = Cache_Ibus_MMU_Set(MMU_ACCESS_FLASH, MMU_BLOCK63_VADDR, map_at, 64, 1, 0);
#elif CONFIG_IDF_TARGET_ESP32S2BETA
int e = Cache_Ibus_MMU_Set(DPORT_MMU_ACCESS_FLASH, FLASH_READ_VADDR, map_at, 64, 1, 0);
#endif
if (e != 0) {
ESP_LOGE(TAG, "cache_flash_mmu_set failed: %d\n", e);
#if CONFIG_IDF_TARGET_ESP32
Cache_Read_Enable(0);
#elif CONFIG_IDF_TARGET_ESP32S2
#elif CONFIG_IDF_TARGET_ESP32S2BETA
Cache_Resume_ICache(autoload);
#endif
return ESP_FAIL;
@@ -269,7 +268,7 @@ static esp_err_t bootloader_flash_read_allow_decrypt(size_t src_addr, void *dest
current_read_mapping = map_at;
#if CONFIG_IDF_TARGET_ESP32
Cache_Read_Enable(0);
#elif CONFIG_IDF_TARGET_ESP32S2
#elif CONFIG_IDF_TARGET_ESP32S2BETA
Cache_Resume_ICache(autoload);
#endif
}
@@ -326,7 +325,7 @@ esp_err_t bootloader_flash_write(size_t dest_addr, void *src, size_t size, bool
if (write_encrypted) {
#if CONFIG_IDF_TARGET_ESP32
return spi_to_esp_err(esp_rom_spiflash_write_encrypted(dest_addr, src, size));
#elif CONFIG_IDF_TARGET_ESP32S2
#elif CONFIG_IDF_TARGET_ESP32S2BETA
// TODO: use the same ROM AP here
return spi_to_esp_err(SPI_Encrypt_Write(dest_addr, src, size));
#endif

View File

@@ -25,7 +25,6 @@
#include "soc/spi_reg.h"
#include "soc/spi_caps.h"
#include "flash_qio_mode.h"
#include "bootloader_common.h"
#include "bootloader_flash_config.h"
void bootloader_flash_update_id(void)
@@ -33,11 +32,6 @@ void bootloader_flash_update_id(void)
g_rom_flashchip.device_id = bootloader_read_flash_id();
}
void bootloader_flash_update_size(uint32_t size)
{
g_rom_flashchip.chip_size = size;
}
void IRAM_ATTR bootloader_flash_cs_timing_config(void)
{
SET_PERI_REG_MASK(SPI_USER_REG(0), SPI_CS_HOLD_M | SPI_CS_SETUP_M);
@@ -68,7 +62,6 @@ void IRAM_ATTR bootloader_flash_clock_config(const esp_image_header_t* pfhdr)
break;
}
esp_rom_spiflash_config_clk(spi_clk_div, 0);
esp_rom_spiflash_config_clk(spi_clk_div, 1);
}
void IRAM_ATTR bootloader_flash_gpio_config(const esp_image_header_t* pfhdr)
@@ -81,11 +74,18 @@ void IRAM_ATTR bootloader_flash_gpio_config(const esp_image_header_t* pfhdr)
uint32_t chip_ver = REG_GET_FIELD(EFUSE_BLK0_RDATA3_REG, EFUSE_RD_CHIP_VER_PKG);
uint32_t pkg_ver = chip_ver & 0x7;
if (pkg_ver == EFUSE_RD_CHIP_VER_PKG_ESP32D2WDQ5 ||
pkg_ver == EFUSE_RD_CHIP_VER_PKG_ESP32PICOD2 ||
pkg_ver == EFUSE_RD_CHIP_VER_PKG_ESP32PICOD4 ||
pkg_ver == EFUSE_RD_CHIP_VER_PKG_ESP32PICOV302) {
// For ESP32D2WD or ESP32-PICO series,the SPI pins are already configured
if (pkg_ver == EFUSE_RD_CHIP_VER_PKG_ESP32D2WDQ5) {
// For ESP32D2WD the SPI pins are already configured
// flash clock signal should come from IO MUX.
PIN_FUNC_SELECT(PERIPHS_IO_MUX_SD_CLK_U, FUNC_SD_CLK_SPICLK);
SET_PERI_REG_BITS(PERIPHS_IO_MUX_SD_CLK_U, FUN_DRV, drv, FUN_DRV_S);
} else if (pkg_ver == EFUSE_RD_CHIP_VER_PKG_ESP32PICOD2) {
// For ESP32PICOD2 the SPI pins are already configured
// flash clock signal should come from IO MUX.
PIN_FUNC_SELECT(PERIPHS_IO_MUX_SD_CLK_U, FUNC_SD_CLK_SPICLK);
SET_PERI_REG_BITS(PERIPHS_IO_MUX_SD_CLK_U, FUN_DRV, drv, FUN_DRV_S);
} else if (pkg_ver == EFUSE_RD_CHIP_VER_PKG_ESP32PICOD4) {
// For ESP32PICOD4 the SPI pins are already configured
// flash clock signal should come from IO MUX.
PIN_FUNC_SELECT(PERIPHS_IO_MUX_SD_CLK_U, FUNC_SD_CLK_SPICLK);
SET_PERI_REG_BITS(PERIPHS_IO_MUX_SD_CLK_U, FUN_DRV, drv, FUN_DRV_S);
@@ -162,33 +162,4 @@ void IRAM_ATTR bootloader_flash_dummy_config(const esp_image_header_t* pfhdr)
SET_PERI_REG_BITS(SPI_USER1_REG(0), SPI_USR_DUMMY_CYCLELEN_V, spi_cache_dummy + g_rom_spiflash_dummy_len_plus[0],
SPI_USR_DUMMY_CYCLELEN_S);
}
#define ESP32_D2WD_WP_GPIO 7 /* ESP32-D2WD & ESP32-PICO-D4 has this GPIO wired to WP pin of flash */
#define ESP32_PICO_V3_GPIO 18 /* ESP32-PICO-V3* use this GPIO for WP pin of flash */
int bootloader_flash_get_wp_pin(void)
{
#if CONFIG_BOOTLOADER_SPI_CUSTOM_WP_PIN
return CONFIG_BOOTLOADER_SPI_WP_PIN; // can be set for bootloader when QIO or QOUT config in use
#elif CONFIG_SPIRAM_CUSTOM_SPIWP_SD3_PIN
return CONFIG_SPIRAM_SPIWP_SD3_PIN; // can be set for app when DIO or DOUT config used for PSRAM only
#else
// no custom value, find it based on the package eFuse value
uint8_t chip_ver;
uint32_t pkg_ver = REG_GET_FIELD(EFUSE_BLK0_RDATA3_REG, EFUSE_RD_CHIP_VER_PKG);
switch(pkg_ver) {
case EFUSE_RD_CHIP_VER_PKG_ESP32D2WDQ5:
return ESP32_D2WD_WP_GPIO;
case EFUSE_RD_CHIP_VER_PKG_ESP32PICOD2:
case EFUSE_RD_CHIP_VER_PKG_ESP32PICOD4:
/* Same package IDs are used for ESP32-PICO-V3 and ESP32-PICO-D4, silicon version differentiates */
chip_ver = bootloader_common_get_chip_revision();
return (chip_ver < 3) ? ESP32_D2WD_WP_GPIO : ESP32_PICO_V3_GPIO;
case EFUSE_RD_CHIP_VER_PKG_ESP32PICOV302:
return ESP32_PICO_V3_GPIO;
default:
return SPI_WP_GPIO_NUM;
}
#endif
}
}

View File

@@ -1,90 +0,0 @@
// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#include <stdbool.h>
#include <assert.h>
#include "string.h"
#include "sdkconfig.h"
#include "esp_err.h"
#include "esp_log.h"
#include "esp32s2/rom/gpio.h"
#include "esp32s2/rom/spi_flash.h"
#include "esp32s2/rom/efuse.h"
#include "soc/gpio_periph.h"
#include "soc/efuse_reg.h"
#include "soc/spi_reg.h"
#include "soc/spi_mem_reg.h"
#include "soc/spi_caps.h"
#include "flash_qio_mode.h"
#include "bootloader_flash_config.h"
#include "bootloader_common.h"
#define FLASH_IO_MATRIX_DUMMY_40M 0
#define FLASH_IO_MATRIX_DUMMY_80M 0
#define FLASH_IO_DRIVE_GD_WITH_1V8PSRAM 3
void bootloader_flash_update_id()
{
g_rom_flashchip.device_id = bootloader_read_flash_id();
}
void bootloader_flash_update_size(uint32_t size)
{
g_rom_flashchip.chip_size = size;
}
void IRAM_ATTR bootloader_flash_cs_timing_config()
{
SET_PERI_REG_MASK(SPI_MEM_USER_REG(0), SPI_MEM_CS_HOLD_M | SPI_MEM_CS_SETUP_M);
SET_PERI_REG_BITS(SPI_MEM_CTRL2_REG(0), SPI_MEM_CS_HOLD_TIME_V, 0, SPI_MEM_CS_HOLD_TIME_S);
SET_PERI_REG_BITS(SPI_MEM_CTRL2_REG(0), SPI_MEM_CS_SETUP_TIME_V, 0, SPI_MEM_CS_SETUP_TIME_S);
SET_PERI_REG_MASK(SPI_MEM_USER_REG(1), SPI_MEM_CS_HOLD_M | SPI_MEM_CS_SETUP_M);
SET_PERI_REG_BITS(SPI_MEM_CTRL2_REG(1), SPI_MEM_CS_HOLD_TIME_V, 1, SPI_MEM_CS_HOLD_TIME_S);
SET_PERI_REG_BITS(SPI_MEM_CTRL2_REG(1), SPI_MEM_CS_SETUP_TIME_V, 0, SPI_MEM_CS_SETUP_TIME_S);
}
void IRAM_ATTR bootloader_flash_clock_config(const esp_image_header_t* pfhdr)
{
uint32_t spi_clk_div = 0;
switch (pfhdr->spi_speed) {
case ESP_IMAGE_SPI_SPEED_80M:
spi_clk_div = 1;
break;
case ESP_IMAGE_SPI_SPEED_40M:
spi_clk_div = 2;
break;
case ESP_IMAGE_SPI_SPEED_26M:
spi_clk_div = 3;
break;
case ESP_IMAGE_SPI_SPEED_20M:
spi_clk_div = 4;
break;
default:
break;
}
esp_rom_spiflash_config_clk(spi_clk_div, 0);
esp_rom_spiflash_config_clk(spi_clk_div, 1);
}
void IRAM_ATTR bootloader_flash_set_dummy_out(void)
{
REG_SET_BIT(SPI_MEM_CTRL_REG(0), SPI_MEM_FDUMMY_OUT | SPI_MEM_D_POL | SPI_MEM_Q_POL);
REG_SET_BIT(SPI_MEM_CTRL_REG(1), SPI_MEM_FDUMMY_OUT | SPI_MEM_D_POL | SPI_MEM_Q_POL);
}
void IRAM_ATTR bootloader_flash_dummy_config(const esp_image_header_t* pfhdr)
{
bootloader_configure_spi_pins(1);
bootloader_flash_set_dummy_out();
}

View File

@@ -0,0 +1,118 @@
// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#include <stdbool.h>
#include <assert.h>
#include "string.h"
#include "sdkconfig.h"
#include "esp_err.h"
#include "esp_log.h"
#include "esp32s2beta/rom/gpio.h"
#include "esp32s2beta/rom/spi_flash.h"
#include "esp32s2beta/rom/efuse.h"
#include "soc/gpio_periph.h"
#include "soc/efuse_reg.h"
#include "soc/spi_reg.h"
#include "soc/spi_mem_reg.h"
#include "soc/spi_caps.h"
#include "flash_qio_mode.h"
#include "bootloader_flash_config.h"
#include "bootloader_common.h"
#define FLASH_IO_MATRIX_DUMMY_40M 0
#define FLASH_IO_MATRIX_DUMMY_80M 0
#define FLASH_IO_DRIVE_GD_WITH_1V8PSRAM 3
void bootloader_flash_update_id()
{
g_rom_flashchip.device_id = bootloader_read_flash_id();
}
void IRAM_ATTR bootloader_flash_cs_timing_config()
{
SET_PERI_REG_MASK(SPI_USER_REG(0), SPI_CS_HOLD_M | SPI_CS_SETUP_M);
SET_PERI_REG_BITS(SPI_CTRL2_REG(0), SPI_CS_HOLD_TIME_V, 1, SPI_CS_HOLD_TIME_S);
SET_PERI_REG_BITS(SPI_CTRL2_REG(0), SPI_CS_SETUP_TIME_V, 0, SPI_CS_SETUP_TIME_S);
SET_PERI_REG_MASK(SPI_USER_REG(1), SPI_CS_HOLD_M | SPI_CS_SETUP_M);
SET_PERI_REG_BITS(SPI_CTRL2_REG(1), SPI_CS_HOLD_TIME_V, 1, SPI_CS_HOLD_TIME_S);
SET_PERI_REG_BITS(SPI_CTRL2_REG(1), SPI_CS_SETUP_TIME_V, 0, SPI_CS_SETUP_TIME_S);
}
void IRAM_ATTR bootloader_flash_clock_config(const esp_image_header_t* pfhdr)
{
uint32_t spi_clk_div = 0;
switch (pfhdr->spi_speed) {
case ESP_IMAGE_SPI_SPEED_80M:
spi_clk_div = 1;
break;
case ESP_IMAGE_SPI_SPEED_40M:
spi_clk_div = 2;
break;
case ESP_IMAGE_SPI_SPEED_26M:
spi_clk_div = 3;
break;
case ESP_IMAGE_SPI_SPEED_20M:
spi_clk_div = 4;
break;
default:
break;
}
esp_rom_spiflash_config_clk(spi_clk_div, 0);
}
void IRAM_ATTR bootloader_flash_gpio_config(const esp_image_header_t* pfhdr)
{
}
void IRAM_ATTR bootloader_flash_dummy_config(const esp_image_header_t* pfhdr)
{
int spi_cache_dummy = 0;
int drv = 2;
switch (pfhdr->spi_mode) {
case ESP_IMAGE_SPI_MODE_QIO:
spi_cache_dummy = SPI0_R_QIO_DUMMY_CYCLELEN;
break;
case ESP_IMAGE_SPI_MODE_DIO:
spi_cache_dummy = SPI0_R_DIO_DUMMY_CYCLELEN; //qio 3
break;
case ESP_IMAGE_SPI_MODE_QOUT:
case ESP_IMAGE_SPI_MODE_DOUT:
default:
spi_cache_dummy = SPI0_R_FAST_DUMMY_CYCLELEN;
break;
}
/* dummy_len_plus values defined in ROM for SPI flash configuration */
extern uint8_t g_rom_spiflash_dummy_len_plus[];
switch (pfhdr->spi_speed) {
case ESP_IMAGE_SPI_SPEED_80M:
g_rom_spiflash_dummy_len_plus[0] = FLASH_IO_MATRIX_DUMMY_80M;
g_rom_spiflash_dummy_len_plus[1] = FLASH_IO_MATRIX_DUMMY_80M;
SET_PERI_REG_BITS(SPI_MEM_USER1_REG(0), SPI_MEM_USR_DUMMY_CYCLELEN_V, spi_cache_dummy + FLASH_IO_MATRIX_DUMMY_80M,
SPI_MEM_USR_DUMMY_CYCLELEN_S); //DUMMY
drv = 3;
break;
case ESP_IMAGE_SPI_SPEED_40M:
g_rom_spiflash_dummy_len_plus[0] = FLASH_IO_MATRIX_DUMMY_40M;
g_rom_spiflash_dummy_len_plus[1] = FLASH_IO_MATRIX_DUMMY_40M;
SET_PERI_REG_BITS(SPI_MEM_USER1_REG(0), SPI_MEM_USR_DUMMY_CYCLELEN_V, spi_cache_dummy + FLASH_IO_MATRIX_DUMMY_40M,
SPI_MEM_USR_DUMMY_CYCLELEN_S); //DUMMY
break;
default:
break;
}
bootloader_configure_spi_pins(drv);
}

View File

@@ -14,7 +14,6 @@
#include <string.h>
#include <stdint.h>
#include "sdkconfig.h"
#include "esp_attr.h"
#include "esp_log.h"
#include "bootloader_init.h"
#include "bootloader_flash.h"
@@ -23,13 +22,15 @@
#include "bootloader_clock.h"
#include "bootloader_common.h"
#include "esp_flash_encrypt.h"
#include "hal/timer_ll.h"
#include "soc/cpu.h"
#include "soc/rtc.h"
#include "hal/wdt_hal.h"
#include "soc/rtc_wdt.h"
static const char *TAG = "boot";
esp_image_header_t WORD_ALIGNED_ATTR bootloader_image_hdr;
esp_image_header_t bootloader_image_hdr;
void bootloader_clear_bss_section(void)
{
@@ -60,34 +61,21 @@ esp_err_t bootloader_check_bootloader_validity(void)
void bootloader_config_wdt(void)
{
/*
* At this point, the flashboot protection of RWDT and MWDT0 will have been
* automatically enabled. We can disable flashboot protection as it's not
* needed anymore. If configured to do so, we also initialize the RWDT to
* protect the remainder of the bootloader process.
*/
//Disable RWDT flashboot protection.
wdt_hal_context_t rtc_wdt_ctx = {.inst = WDT_RWDT, .rwdt_dev = &RTCCNTL};
wdt_hal_write_protect_disable(&rtc_wdt_ctx);
wdt_hal_set_flashboot_en(&rtc_wdt_ctx, false);
wdt_hal_write_protect_enable(&rtc_wdt_ctx);
#ifdef CONFIG_BOOTLOADER_WDT_ENABLE
//Initialize and start RWDT to protect the for bootloader if configured to do so
ESP_LOGD(TAG, "Enabling RTCWDT(%d ms)", CONFIG_BOOTLOADER_WDT_TIME_MS);
wdt_hal_init(&rtc_wdt_ctx, WDT_RWDT, 0, false);
uint32_t stage_timeout_ticks = (uint32_t)((uint64_t)CONFIG_BOOTLOADER_WDT_TIME_MS * rtc_clk_slow_freq_get_hz() / 1000);
wdt_hal_write_protect_disable(&rtc_wdt_ctx);
wdt_hal_config_stage(&rtc_wdt_ctx, WDT_STAGE0, stage_timeout_ticks, WDT_STAGE_ACTION_RESET_RTC);
wdt_hal_enable(&rtc_wdt_ctx);
wdt_hal_write_protect_enable(&rtc_wdt_ctx);
rtc_wdt_protect_off();
rtc_wdt_disable();
rtc_wdt_set_length_of_reset_signal(RTC_WDT_SYS_RESET_SIG, RTC_WDT_LENGTH_3_2us);
rtc_wdt_set_length_of_reset_signal(RTC_WDT_CPU_RESET_SIG, RTC_WDT_LENGTH_3_2us);
rtc_wdt_set_stage(RTC_WDT_STAGE0, RTC_WDT_STAGE_ACTION_RESET_RTC);
rtc_wdt_set_time(RTC_WDT_STAGE0, CONFIG_BOOTLOADER_WDT_TIME_MS);
rtc_wdt_enable();
rtc_wdt_protect_on();
#else /* disable watch dog */
rtc_wdt_disable();
#endif
//Disable MWDT0 flashboot protection. But only after we've enabled the RWDT first so that there's not gap in WDT protection.
wdt_hal_context_t wdt_ctx = {.inst = WDT_MWDT0, .mwdt_dev = &TIMERG0};
wdt_hal_write_protect_disable(&wdt_ctx);
wdt_hal_set_flashboot_en(&wdt_ctx, false);
wdt_hal_write_protect_enable(&wdt_ctx);
timer_ll_wdt_set_protect(&TIMERG0, false);
timer_ll_wdt_flashboot_en(&TIMERG0, false);
}
void bootloader_enable_random(void)

View File

@@ -1,48 +0,0 @@
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#include <stdbool.h>
#include "xtensa/config/core.h"
#include "hal/cpu_hal.h"
#include "hal/mpu_hal.h"
#include "hal/mpu_types.h"
#include "soc/mpu_caps.h"
#include "bootloader_mem.h"
#include "xt_instr_macros.h"
#include "xtensa/config/specreg.h"
static inline void cpu_configure_region_protection(void)
{
/* Currently, the only supported chips esp32 and esp32s2
* have the same configuration. Move this to the port layer once
* more chips with different configurations are supported.
*
* Both chips have the address space divided into 8 regions, 512MB each.
*/
const int illegal_regions[] = {0, 4, 5, 6, 7}; // 0x00000000, 0x80000000, 0xa0000000, 0xc0000000, 0xe0000000
for (int i = 0; i < sizeof(illegal_regions) / sizeof(illegal_regions[0]); ++i) {
mpu_hal_set_region_access(illegal_regions[i], MPU_REGION_ILLEGAL);
}
mpu_hal_set_region_access(1, MPU_REGION_RW); // 0x20000000
}
void bootloader_init_mem(void)
{
cpu_hal_init_hwloop();
// protect memory region
cpu_configure_region_protection();
}

View File

@@ -1,4 +1,4 @@
// Copyright 2010-2020 Espressif Systems (Shanghai) PTE LTD
// Copyright 2010-2016 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
@@ -11,10 +11,15 @@
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#include "sdkconfig.h"
#include "bootloader_random.h"
#include "soc/cpu.h"
#include "soc/wdev_reg.h"
#include "soc/rtc_periph.h"
#include "soc/sens_periph.h"
#include "soc/syscon_periph.h"
#include "soc/dport_reg.h"
#include "soc/i2s_periph.h"
#include "esp_log.h"
#ifndef BOOTLOADER_BUILD
#include "esp_system.h"
@@ -30,7 +35,9 @@ void bootloader_fill_random(void *buffer, size_t length)
{
uint8_t *buffer_bytes = (uint8_t *)buffer;
uint32_t random;
#if CONFIG_IDF_TARGET_ESP32
uint32_t start, now;
#endif
assert(buffer != NULL);
@@ -43,14 +50,152 @@ void bootloader_fill_random(void *buffer, size_t length)
as-is, we repeatedly read the RNG register and XOR all
values.
*/
#if CONFIG_IDF_TARGET_ESP32
random = REG_READ(WDEV_RND_REG);
RSR(CCOUNT, start);
do {
random ^= REG_READ(WDEV_RND_REG);
RSR(CCOUNT, now);
} while (now - start < 80 * 32 * 2); /* extra factor of 2 is precautionary */
#elif CONFIG_IDF_TARGET_ESP32S2BETA
// ToDo: Get random from register
random = 12345678;
#endif
}
buffer_bytes[i] = random >> ((i % 4) * 8);
}
}
#endif // BOOTLOADER_BUILD
void bootloader_random_enable(void)
{
/* Ensure the hardware RNG is enabled following a soft reset. This should always be the case already (this clock is
never disabled while the CPU is running), this is a "belts and braces" type check.
*/
#ifdef BOOTLOADER_BUILD
DPORT_SET_PERI_REG_MASK(DPORT_WIFI_CLK_EN_REG, DPORT_WIFI_CLK_RNG_EN);
#else
periph_module_enable(PERIPH_RNG_MODULE);
#endif // BOOTLOADER_BUILD
/* Enable SAR ADC in test mode to feed ADC readings of the 1.1V
reference via I2S into the RNG entropy input.
Note: I2S requires the PLL to be running, so the call to rtc_set_cpu_freq(CPU_80M)
in early bootloader startup must have been made.
*/
SET_PERI_REG_BITS(RTC_CNTL_TEST_MUX_REG, RTC_CNTL_DTEST_RTC, 2, RTC_CNTL_DTEST_RTC_S);
SET_PERI_REG_MASK(RTC_CNTL_TEST_MUX_REG, RTC_CNTL_ENT_RTC);
#if CONFIG_IDF_TARGET_ESP32
SET_PERI_REG_MASK(SENS_SAR_START_FORCE_REG, SENS_SAR2_EN_TEST);
#ifdef BOOTLOADER_BUILD
DPORT_SET_PERI_REG_MASK(DPORT_PERIP_CLK_EN_REG, DPORT_I2S0_CLK_EN);
#else
periph_module_enable(PERIPH_I2S0_MODULE);
#endif // BOOTLOADER_BUILD
CLEAR_PERI_REG_MASK(SENS_SAR_START_FORCE_REG, SENS_ULP_CP_FORCE_START_TOP);
CLEAR_PERI_REG_MASK(SENS_SAR_START_FORCE_REG, SENS_ULP_CP_START_TOP);
#elif CONFIG_IDF_TARGET_ESP32S2BETA
SET_PERI_REG_MASK(SENS_SAR_MEAS2_CTRL1_REG, SENS_SAR2_EN_TEST);
DPORT_SET_PERI_REG_MASK(DPORT_PERIP_CLK_EN_REG, DPORT_I2S0_CLK_EN);
CLEAR_PERI_REG_MASK(RTC_CNTL_ULP_CP_CTRL_REG, RTC_CNTL_ULP_CP_FORCE_START_TOP);
CLEAR_PERI_REG_MASK(RTC_CNTL_ULP_CP_CTRL_REG, RTC_CNTL_ULP_CP_START_TOP);
#endif
// Test pattern configuration byte 0xAD:
//--[7:4] channel_sel: 10-->en_test
//--[3:2] bit_width : 3-->12bit
//--[1:0] atten : 1-->3dB attenuation
WRITE_PERI_REG(SYSCON_SARADC_SAR2_PATT_TAB1_REG, 0xADADADAD);
WRITE_PERI_REG(SYSCON_SARADC_SAR2_PATT_TAB2_REG, 0xADADADAD);
WRITE_PERI_REG(SYSCON_SARADC_SAR2_PATT_TAB3_REG, 0xADADADAD);
WRITE_PERI_REG(SYSCON_SARADC_SAR2_PATT_TAB4_REG, 0xADADADAD);
#if CONFIG_IDF_TARGET_ESP32
SET_PERI_REG_BITS(SENS_SAR_MEAS_WAIT2_REG, SENS_FORCE_XPD_SAR, 3, SENS_FORCE_XPD_SAR_S);
SET_PERI_REG_MASK(SENS_SAR_READ_CTRL_REG, SENS_SAR1_DIG_FORCE);
SET_PERI_REG_MASK(SENS_SAR_READ_CTRL2_REG, SENS_SAR2_DIG_FORCE);
#elif CONFIG_IDF_TARGET_ESP32S2BETA
SET_PERI_REG_BITS(SENS_SAR_POWER_XPD_SAR_REG, SENS_FORCE_XPD_SAR, 3, SENS_FORCE_XPD_SAR_S);
SET_PERI_REG_MASK(SENS_SAR_MEAS1_MUX_REG, SENS_SAR1_DIG_FORCE);
#endif
#if CONFIG_IDF_TARGET_ESP32
SET_PERI_REG_MASK(SYSCON_SARADC_CTRL_REG, SYSCON_SARADC_SAR2_MUX);
#endif
SET_PERI_REG_BITS(SYSCON_SARADC_CTRL_REG, SYSCON_SARADC_SAR_CLK_DIV, 4, SYSCON_SARADC_SAR_CLK_DIV_S);
SET_PERI_REG_BITS(SYSCON_SARADC_FSM_REG, SYSCON_SARADC_RSTB_WAIT, 8, SYSCON_SARADC_RSTB_WAIT_S); /* was 1 */
#if CONFIG_IDF_TARGET_ESP32
SET_PERI_REG_BITS(SYSCON_SARADC_FSM_REG, SYSCON_SARADC_START_WAIT, 10, SYSCON_SARADC_START_WAIT_S);
#endif
SET_PERI_REG_BITS(SYSCON_SARADC_CTRL_REG, SYSCON_SARADC_WORK_MODE, 0, SYSCON_SARADC_WORK_MODE_S);
SET_PERI_REG_MASK(SYSCON_SARADC_CTRL_REG, SYSCON_SARADC_SAR_SEL);
CLEAR_PERI_REG_MASK(SYSCON_SARADC_CTRL_REG, SYSCON_SARADC_DATA_SAR_SEL);
SET_PERI_REG_BITS(I2S_SAMPLE_RATE_CONF_REG(0), I2S_RX_BCK_DIV_NUM, 20, I2S_RX_BCK_DIV_NUM_S);
SET_PERI_REG_MASK(SYSCON_SARADC_CTRL_REG, SYSCON_SARADC_DATA_TO_I2S);
CLEAR_PERI_REG_MASK(I2S_CONF2_REG(0), I2S_CAMERA_EN);
SET_PERI_REG_MASK(I2S_CONF2_REG(0), I2S_LCD_EN);
SET_PERI_REG_MASK(I2S_CONF2_REG(0), I2S_DATA_ENABLE);
SET_PERI_REG_MASK(I2S_CONF2_REG(0), I2S_DATA_ENABLE_TEST_EN);
SET_PERI_REG_MASK(I2S_CONF_REG(0), I2S_RX_START);
}
void bootloader_random_disable(void)
{
/* Reset some i2s configuration (possibly redundant as we reset entire
I2S peripheral further down). */
CLEAR_PERI_REG_MASK(I2S_CONF_REG(0), I2S_RX_START);
SET_PERI_REG_MASK(I2S_CONF_REG(0), I2S_RX_RESET);
CLEAR_PERI_REG_MASK(I2S_CONF_REG(0), I2S_RX_RESET);
CLEAR_PERI_REG_MASK(I2S_CONF2_REG(0), I2S_CAMERA_EN);
CLEAR_PERI_REG_MASK(I2S_CONF2_REG(0), I2S_LCD_EN);
CLEAR_PERI_REG_MASK(I2S_CONF2_REG(0), I2S_DATA_ENABLE_TEST_EN);
CLEAR_PERI_REG_MASK(I2S_CONF2_REG(0), I2S_DATA_ENABLE);
/* Disable i2s clock */
#ifdef BOOTLOADER_BUILD
DPORT_CLEAR_PERI_REG_MASK(DPORT_PERIP_CLK_EN_REG, DPORT_I2S0_CLK_EN);
#else
periph_module_disable(PERIPH_I2S0_MODULE);
#endif // BOOTLOADER_BUILD
/* Restore SYSCON mode registers */
#if CONFIG_IDF_TARGET_ESP32
CLEAR_PERI_REG_MASK(SENS_SAR_READ_CTRL_REG, SENS_SAR1_DIG_FORCE);
CLEAR_PERI_REG_MASK(SENS_SAR_READ_CTRL2_REG, SENS_SAR2_DIG_FORCE);
#elif CONFIG_IDF_TARGET_ESP32S2BETA
CLEAR_PERI_REG_MASK(SENS_SAR_MEAS1_MUX_REG, SENS_SAR1_DIG_FORCE);
#endif
#if CONFIG_IDF_TARGET_ESP32
/* Restore SAR ADC mode */
CLEAR_PERI_REG_MASK(SENS_SAR_START_FORCE_REG, SENS_SAR2_EN_TEST);
CLEAR_PERI_REG_MASK(SYSCON_SARADC_CTRL_REG, SYSCON_SARADC_SAR2_MUX
| SYSCON_SARADC_SAR_SEL | SYSCON_SARADC_DATA_TO_I2S);
SET_PERI_REG_BITS(SENS_SAR_MEAS_WAIT2_REG, SENS_FORCE_XPD_SAR, 0, SENS_FORCE_XPD_SAR_S);
#elif CONFIG_IDF_TARGET_ESP32S2BETA
CLEAR_PERI_REG_MASK(SENS_SAR_MEAS2_CTRL1_REG, SENS_SAR2_EN_TEST);
CLEAR_PERI_REG_MASK(SYSCON_SARADC_CTRL_REG, SYSCON_SARADC_SAR_SEL | SYSCON_SARADC_DATA_TO_I2S);
SET_PERI_REG_BITS(SENS_SAR_POWER_XPD_SAR_REG, SENS_FORCE_XPD_SAR, 0, SENS_FORCE_XPD_SAR_S);
#endif
#if CONFIG_IDF_TARGET_ESP32
SET_PERI_REG_BITS(SYSCON_SARADC_FSM_REG, SYSCON_SARADC_START_WAIT, 8, SYSCON_SARADC_START_WAIT_S);
#endif
/* Reset i2s peripheral */
#ifdef BOOTLOADER_BUILD
DPORT_SET_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, DPORT_I2S0_RST);
DPORT_CLEAR_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, DPORT_I2S0_RST);
#else
periph_module_reset(PERIPH_I2S0_MODULE);
#endif
/* Disable pull supply voltage to SAR ADC */
CLEAR_PERI_REG_MASK(RTC_CNTL_TEST_MUX_REG, RTC_CNTL_ENT_RTC);
SET_PERI_REG_BITS(RTC_CNTL_TEST_MUX_REG, RTC_CNTL_DTEST_RTC, 0, RTC_CNTL_DTEST_RTC_S);
}

View File

@@ -1,128 +0,0 @@
// Copyright 2016-2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#include "sdkconfig.h"
#include "bootloader_random.h"
#include "soc/rtc_periph.h"
#include "soc/sens_periph.h"
#include "soc/syscon_periph.h"
#include "soc/dport_reg.h"
#include "soc/i2s_periph.h"
#include "esp_log.h"
#include "soc/io_mux_reg.h"
#ifndef BOOTLOADER_BUILD
#include "driver/periph_ctrl.h"
#endif
void bootloader_random_enable(void)
{
/* Ensure the hardware RNG is enabled following a soft reset. This should always be the case already (this clock is
never disabled while the CPU is running), this is a "belts and braces" type check.
*/
#ifdef BOOTLOADER_BUILD
DPORT_SET_PERI_REG_MASK(DPORT_WIFI_CLK_EN_REG, DPORT_WIFI_CLK_RNG_EN);
#else
periph_module_enable(PERIPH_RNG_MODULE);
#endif // BOOTLOADER_BUILD
/* Enable SAR ADC in test mode to feed ADC readings of the 1.1V
reference via I2S into the RNG entropy input.
Note: I2S requires the PLL to be running, so the call to rtc_set_cpu_freq(CPU_80M)
in early bootloader startup must have been made.
*/
SET_PERI_REG_BITS(RTC_CNTL_TEST_MUX_REG, RTC_CNTL_DTEST_RTC, 2, RTC_CNTL_DTEST_RTC_S);
SET_PERI_REG_MASK(RTC_CNTL_TEST_MUX_REG, RTC_CNTL_ENT_RTC);
SET_PERI_REG_MASK(SENS_SAR_START_FORCE_REG, SENS_SAR2_EN_TEST);
#ifdef BOOTLOADER_BUILD
DPORT_SET_PERI_REG_MASK(DPORT_PERIP_CLK_EN_REG, DPORT_I2S0_CLK_EN);
#else
periph_module_enable(PERIPH_I2S0_MODULE);
#endif // BOOTLOADER_BUILD
CLEAR_PERI_REG_MASK(SENS_SAR_START_FORCE_REG, SENS_ULP_CP_FORCE_START_TOP);
CLEAR_PERI_REG_MASK(SENS_SAR_START_FORCE_REG, SENS_ULP_CP_START_TOP);
// Test pattern configuration byte 0xAD:
//--[7:4] channel_sel: 10-->en_test
//--[3:2] bit_width : 3-->12bit
//--[1:0] atten : 1-->3dB attenuation
WRITE_PERI_REG(SYSCON_SARADC_SAR2_PATT_TAB1_REG, 0xADADADAD);
WRITE_PERI_REG(SYSCON_SARADC_SAR2_PATT_TAB2_REG, 0xADADADAD);
WRITE_PERI_REG(SYSCON_SARADC_SAR2_PATT_TAB3_REG, 0xADADADAD);
WRITE_PERI_REG(SYSCON_SARADC_SAR2_PATT_TAB4_REG, 0xADADADAD);
SET_PERI_REG_BITS(SENS_SAR_MEAS_WAIT2_REG, SENS_FORCE_XPD_SAR, 3, SENS_FORCE_XPD_SAR_S);
SET_PERI_REG_MASK(SENS_SAR_READ_CTRL_REG, SENS_SAR1_DIG_FORCE);
SET_PERI_REG_MASK(SENS_SAR_READ_CTRL2_REG, SENS_SAR2_DIG_FORCE);
SET_PERI_REG_MASK(SYSCON_SARADC_CTRL_REG, SYSCON_SARADC_SAR2_MUX);
SET_PERI_REG_BITS(SYSCON_SARADC_CTRL_REG, SYSCON_SARADC_SAR_CLK_DIV, 4, SYSCON_SARADC_SAR_CLK_DIV_S);
SET_PERI_REG_BITS(SYSCON_SARADC_FSM_REG, SYSCON_SARADC_RSTB_WAIT, 8, SYSCON_SARADC_RSTB_WAIT_S); /* was 1 */
SET_PERI_REG_BITS(SYSCON_SARADC_FSM_REG, SYSCON_SARADC_START_WAIT, 10, SYSCON_SARADC_START_WAIT_S);
SET_PERI_REG_BITS(SYSCON_SARADC_CTRL_REG, SYSCON_SARADC_WORK_MODE, 0, SYSCON_SARADC_WORK_MODE_S);
SET_PERI_REG_MASK(SYSCON_SARADC_CTRL_REG, SYSCON_SARADC_SAR_SEL);
CLEAR_PERI_REG_MASK(SYSCON_SARADC_CTRL_REG, SYSCON_SARADC_DATA_SAR_SEL);
SET_PERI_REG_BITS(I2S_SAMPLE_RATE_CONF_REG(0), I2S_RX_BCK_DIV_NUM, 20, I2S_RX_BCK_DIV_NUM_S);
SET_PERI_REG_MASK(SYSCON_SARADC_CTRL_REG, SYSCON_SARADC_DATA_TO_I2S);
CLEAR_PERI_REG_MASK(I2S_CONF2_REG(0), I2S_CAMERA_EN);
SET_PERI_REG_MASK(I2S_CONF2_REG(0), I2S_LCD_EN);
SET_PERI_REG_MASK(I2S_CONF2_REG(0), I2S_DATA_ENABLE);
SET_PERI_REG_MASK(I2S_CONF2_REG(0), I2S_DATA_ENABLE_TEST_EN);
SET_PERI_REG_MASK(I2S_CONF_REG(0), I2S_RX_START);
}
void bootloader_random_disable(void)
{
/* Reset some i2s configuration (possibly redundant as we reset entire
I2S peripheral further down). */
CLEAR_PERI_REG_MASK(I2S_CONF_REG(0), I2S_RX_START);
SET_PERI_REG_MASK(I2S_CONF_REG(0), I2S_RX_RESET);
CLEAR_PERI_REG_MASK(I2S_CONF_REG(0), I2S_RX_RESET);
CLEAR_PERI_REG_MASK(I2S_CONF2_REG(0), I2S_CAMERA_EN);
CLEAR_PERI_REG_MASK(I2S_CONF2_REG(0), I2S_LCD_EN);
CLEAR_PERI_REG_MASK(I2S_CONF2_REG(0), I2S_DATA_ENABLE_TEST_EN);
CLEAR_PERI_REG_MASK(I2S_CONF2_REG(0), I2S_DATA_ENABLE);
/* Disable i2s clock */
#ifdef BOOTLOADER_BUILD
DPORT_CLEAR_PERI_REG_MASK(DPORT_PERIP_CLK_EN_REG, DPORT_I2S0_CLK_EN);
#else
periph_module_disable(PERIPH_I2S0_MODULE);
#endif // BOOTLOADER_BUILD
/* Restore SYSCON mode registers */
CLEAR_PERI_REG_MASK(SENS_SAR_READ_CTRL_REG, SENS_SAR1_DIG_FORCE);
CLEAR_PERI_REG_MASK(SENS_SAR_READ_CTRL2_REG, SENS_SAR2_DIG_FORCE);
/* Restore SAR ADC mode */
CLEAR_PERI_REG_MASK(SENS_SAR_START_FORCE_REG, SENS_SAR2_EN_TEST);
CLEAR_PERI_REG_MASK(SYSCON_SARADC_CTRL_REG, SYSCON_SARADC_SAR2_MUX
| SYSCON_SARADC_SAR_SEL | SYSCON_SARADC_DATA_TO_I2S);
SET_PERI_REG_BITS(SENS_SAR_MEAS_WAIT2_REG, SENS_FORCE_XPD_SAR, 0, SENS_FORCE_XPD_SAR_S);
SET_PERI_REG_BITS(SYSCON_SARADC_FSM_REG, SYSCON_SARADC_START_WAIT, 8, SYSCON_SARADC_START_WAIT_S);
/* Reset i2s peripheral */
#ifdef BOOTLOADER_BUILD
DPORT_SET_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, DPORT_I2S0_RST);
DPORT_CLEAR_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, DPORT_I2S0_RST);
#else
periph_module_reset(PERIPH_I2S0_MODULE);
#endif
/* Disable pull supply voltage to SAR ADC */
CLEAR_PERI_REG_MASK(RTC_CNTL_TEST_MUX_REG, RTC_CNTL_ENT_RTC);
SET_PERI_REG_BITS(RTC_CNTL_TEST_MUX_REG, RTC_CNTL_DTEST_RTC, 0, RTC_CNTL_DTEST_RTC_S);
}

View File

@@ -1,106 +0,0 @@
// Copyright 2019-2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#include "sdkconfig.h"
#include "bootloader_random.h"
#include "soc/rtc_periph.h"
#include "soc/sens_periph.h"
#include "soc/syscon_periph.h"
#include "soc/dport_reg.h"
#include "soc/i2s_periph.h"
#include "esp_log.h"
#include "soc/io_mux_reg.h"
#include "soc/apb_saradc_reg.h"
#include "regi2c_ctrl.h"
#include "hal/adc_ll.h"
#ifndef BOOTLOADER_BUILD
#include "driver/periph_ctrl.h"
#endif
void bootloader_random_enable(void)
{
/* Ensure the Wifi clock for RNG modiule is enabled following a soft reset. This should always be the case already
(this clock is never disabled while the CPU is running), this is a "belt and braces" type check.
*/
#ifdef BOOTLOADER_BUILD
DPORT_SET_PERI_REG_MASK(DPORT_WIFI_CLK_EN_REG, DPORT_WIFI_CLK_RNG_EN);
#else
periph_module_enable(PERIPH_RNG_MODULE);
#endif // BOOTLOADER_BUILD
// Enable 8M clock source for RNG (this is actually enough to produce strong random results,
// but enabling the SAR ADC as well adds some insurance.)
REG_SET_BIT(RTC_CNTL_CLK_CONF_REG, RTC_CNTL_DIG_CLK8M_EN);
// Enable SAR ADC to read a disconnected input for additional entropy
SET_PERI_REG_MASK(DPORT_PERIP_CLK_EN0_REG,DPORT_APB_SARADC_CLK_EN);
REG_SET_FIELD(APB_SARADC_APB_ADC_CLKM_CONF_REG, APB_SARADC_CLK_SEL, 2);
CLEAR_PERI_REG_MASK(RTC_CNTL_ANA_CONF_REG, RTC_CNTL_SAR_I2C_FORCE_PD_M);
SET_PERI_REG_MASK(RTC_CNTL_ANA_CONF_REG, RTC_CNTL_SAR_I2C_FORCE_PU_M);
CLEAR_PERI_REG_MASK(ANA_CONFIG_REG, BIT(18));
SET_PERI_REG_MASK(ANA_CONFIG2_REG, BIT(16));
REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SAR1_DREF_ADDR, 0x4);
REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SAR2_DREF_ADDR, 0x4);
REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SARADC_ENCAL_REF_ADDR, 1);
REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SARADC_ENT_TSENS_ADDR, 1);
REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SARADC_ENT_RTC_ADDR, 0);
REG_SET_FIELD(APB_SARADC_CTRL_REG, APB_SARADC_SAR1_PATT_LEN, 0);
WRITE_PERI_REG(APB_SARADC_SAR1_PATT_TAB1_REG,0xafffffff); // set adc1 channel & bitwidth & atten
REG_SET_FIELD(APB_SARADC_CTRL_REG, APB_SARADC_SAR2_PATT_LEN, 0);
WRITE_PERI_REG(APB_SARADC_SAR2_PATT_TAB1_REG,0xafffffff); //set adc2 channel & bitwidth & atten
SET_PERI_REG_MASK(SENS_SAR_MEAS1_MUX_REG,SENS_SAR1_DIG_FORCE);
REG_SET_FIELD(APB_SARADC_CTRL_REG,APB_SARADC_WORK_MODE, 1);
CLEAR_PERI_REG_MASK(APB_SARADC_CTRL2_REG,APB_SARADC_MEAS_NUM_LIMIT);
REG_SET_FIELD(SENS_SAR_POWER_XPD_SAR_REG, SENS_FORCE_XPD_SAR, 3);
SET_PERI_REG_MASK(APB_SARADC_CTRL2_REG,APB_SARADC_TIMER_SEL);
REG_SET_FIELD(APB_SARADC_CTRL2_REG, APB_SARADC_TIMER_TARGET, 100);
CLEAR_PERI_REG_MASK(APB_SARADC_CTRL_REG,APB_SARADC_START_FORCE);
SET_PERI_REG_MASK(APB_SARADC_CTRL2_REG,APB_SARADC_TIMER_EN);
}
void bootloader_random_disable(void)
{
/* Restore internal I2C bus state */
REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SAR1_DREF_ADDR, 0x1);
REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SAR2_DREF_ADDR, 0x1);
REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SARADC_ENCAL_REF_ADDR, 0);
REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SARADC_ENT_TSENS_ADDR, 0);
REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SARADC_ENT_RTC_ADDR, 0);
/* Restore SARADC to default mode */
CLEAR_PERI_REG_MASK(SENS_SAR_MEAS1_MUX_REG, SENS_SAR1_DIG_FORCE);
SET_PERI_REG_MASK(DPORT_PERIP_CLK_EN0_REG, DPORT_APB_SARADC_CLK_EN);
SET_PERI_REG_BITS(SENS_SAR_POWER_XPD_SAR_REG, SENS_FORCE_XPD_SAR, 0, SENS_FORCE_XPD_SAR_S);
CLEAR_PERI_REG_MASK(APB_SARADC_CTRL2_REG, APB_SARADC_TIMER_EN);
/* Note: the 8M CLK entropy source continues running even after this function is called,
but as mentioned above it's better to enable Wi-Fi or BT or call bootloader_random_enable()
in order to get a secondary entropy source.
*/
}

View File

@@ -29,18 +29,16 @@
#include "esp32/rom/uart.h"
#include "esp32/rom/gpio.h"
#include "esp32/rom/secure_boot.h"
#elif CONFIG_IDF_TARGET_ESP32S2
#include "esp32s2/rom/cache.h"
#include "esp32s2/rom/efuse.h"
#include "esp32s2/rom/ets_sys.h"
#include "esp32s2/rom/spi_flash.h"
#include "esp32s2/rom/crc.h"
#include "esp32s2/rom/rtc.h"
#include "esp32s2/rom/uart.h"
#include "esp32s2/rom/gpio.h"
#include "esp32s2/rom/secure_boot.h"
#include "soc/extmem_reg.h"
#include "soc/cache_memory.h"
#elif CONFIG_IDF_TARGET_ESP32S2BETA
#include "esp32s2beta/rom/cache.h"
#include "esp32s2beta/rom/efuse.h"
#include "esp32s2beta/rom/ets_sys.h"
#include "esp32s2beta/rom/spi_flash.h"
#include "esp32s2beta/rom/crc.h"
#include "esp32s2beta/rom/rtc.h"
#include "esp32s2beta/rom/uart.h"
#include "esp32s2beta/rom/gpio.h"
#include "esp32s2beta/rom/secure_boot.h"
#else
#error "Unsupported IDF_TARGET"
#endif
@@ -378,7 +376,7 @@ int bootloader_utility_get_selected_boot_partition(const bootloader_state_t *bs)
#endif // CONFIG_BOOTLOADER_APP_ROLLBACK_ENABLE
#ifdef CONFIG_BOOTLOADER_APP_ANTI_ROLLBACK
if (otadata[active_otadata].ota_state == ESP_OTA_IMG_VALID) {
if(otadata[active_otadata].ota_state == ESP_OTA_IMG_VALID) {
update_anti_rollback(&bs->ota[boot_index]);
}
#endif // CONFIG_BOOTLOADER_APP_ANTI_ROLLBACK
@@ -441,7 +439,7 @@ static void set_actual_ota_seq(const bootloader_state_t *bs, int index)
void bootloader_utility_load_boot_image_from_deep_sleep(void)
{
if (rtc_get_reset_reason(0) == DEEPSLEEP_RESET) {
esp_partition_pos_t *partition = bootloader_common_get_rtc_retain_mem_partition();
esp_partition_pos_t* partition = bootloader_common_get_rtc_retain_mem_partition();
if (partition != NULL) {
esp_image_metadata_t image_data;
if (bootloader_load_image_no_verify(partition, &image_data) == ESP_OK) {
@@ -623,7 +621,9 @@ static void load_image(const esp_image_metadata_t *image_data)
#endif
ESP_LOGI(TAG, "Disabling RNG early entropy source...");
#if !CONFIG_IDF_ENV_FPGA
bootloader_random_disable();
#endif
// copy loaded segments to RAM, set up caches for mapped segments, and start application
unpack_load_app(image_data);
@@ -687,7 +687,7 @@ static void set_cache_and_start_app(
#if CONFIG_IDF_TARGET_ESP32
Cache_Read_Disable(0);
Cache_Flush(0);
#elif CONFIG_IDF_TARGET_ESP32S2
#elif CONFIG_IDF_TARGET_ESP32S2BETA
uint32_t autoload = Cache_Suspend_ICache();
Cache_Invalidate_ICache_All();
#endif
@@ -695,23 +695,19 @@ static void set_cache_and_start_app(
/* Clear the MMU entries that are already set up,
so the new app only has the mappings it creates.
*/
#if CONFIG_IDF_TARGET_ESP32
for (int i = 0; i < DPORT_FLASH_MMU_TABLE_SIZE; i++) {
DPORT_PRO_FLASH_MMU_TABLE[i] = DPORT_FLASH_MMU_TABLE_INVALID_VAL;
}
#elif CONFIG_IDF_TARGET_ESP32S2
for (int i = 0; i < FLASH_MMU_TABLE_SIZE; i++) {
FLASH_MMU_TABLE[i] = MMU_TABLE_INVALID_VAL;
}
#endif
uint32_t drom_load_addr_aligned = drom_load_addr & MMU_FLASH_MASK;
uint32_t drom_page_count = bootloader_cache_pages_to_map(drom_size, drom_load_addr);
ESP_LOGV(TAG, "d mmu set paddr=%08x vaddr=%08x size=%d n=%d",
drom_addr & MMU_FLASH_MASK, drom_load_addr_aligned, drom_size, drom_page_count);
#if CONFIG_IDF_TARGET_ESP32
rc = cache_flash_mmu_set(0, 0, drom_load_addr_aligned, drom_addr & MMU_FLASH_MASK, 64, drom_page_count);
#elif CONFIG_IDF_TARGET_ESP32S2
rc = Cache_Ibus_MMU_Set(MMU_ACCESS_FLASH, drom_load_addr & 0xffff0000, drom_addr & 0xffff0000, 64, drom_page_count, 0);
#elif CONFIG_IDF_TARGET_ESP32S2BETA
rc = Cache_Ibus_MMU_Set(DPORT_MMU_ACCESS_FLASH, drom_load_addr & 0xffff0000, drom_addr & 0xffff0000,
64, drom_page_count, 0);
#endif
ESP_LOGV(TAG, "rc=%d", rc);
#if CONFIG_IDF_TARGET_ESP32
@@ -724,17 +720,27 @@ static void set_cache_and_start_app(
irom_addr & MMU_FLASH_MASK, irom_load_addr_aligned, irom_size, irom_page_count);
#if CONFIG_IDF_TARGET_ESP32
rc = cache_flash_mmu_set(0, 0, irom_load_addr_aligned, irom_addr & MMU_FLASH_MASK, 64, irom_page_count);
#elif CONFIG_IDF_TARGET_ESP32S2
uint32_t iram1_used = 0;
ESP_LOGV(TAG, "rc=%d", rc);
#elif CONFIG_IDF_TARGET_ESP32S2BETA
uint32_t iram1_used = 0, irom0_used = 0;
if (irom_load_addr + irom_size > IRAM1_ADDRESS_LOW) {
iram1_used = 1;
}
if (iram1_used) {
rc = Cache_Ibus_MMU_Set(MMU_ACCESS_FLASH, IRAM0_ADDRESS_LOW, 0, 64, 64, 1);
rc = Cache_Ibus_MMU_Set(MMU_ACCESS_FLASH, IRAM1_ADDRESS_LOW, 0, 64, 64, 1);
REG_CLR_BIT(EXTMEM_PRO_ICACHE_CTRL1_REG, EXTMEM_PRO_ICACHE_MASK_IRAM1);
if (irom_load_addr + irom_size > IROM0_ADDRESS_LOW) {
irom0_used = 1;
}
rc = Cache_Ibus_MMU_Set(MMU_ACCESS_FLASH, irom_load_addr & 0xffff0000, irom_addr & 0xffff0000, 64, irom_page_count, 0);
if (iram1_used || irom0_used) {
rc = Cache_Ibus_MMU_Set(DPORT_MMU_ACCESS_FLASH, IRAM0_ADDRESS_LOW, 0, 64, 64, 1);
rc = Cache_Ibus_MMU_Set(DPORT_MMU_ACCESS_FLASH, IRAM1_ADDRESS_LOW, 0, 64, 64, 1);
REG_SET_BIT(DPORT_CACHE_SOURCE_1_REG, DPORT_PRO_CACHE_I_SOURCE_PRO_IRAM1);
REG_CLR_BIT(DPORT_PRO_ICACHE_CTRL1_REG, DPORT_PRO_ICACHE_MASK_IRAM1);
if (irom0_used) {
rc = Cache_Ibus_MMU_Set(DPORT_MMU_ACCESS_FLASH, IROM0_ADDRESS_LOW, 0, 64, 64, 1);
REG_SET_BIT(DPORT_CACHE_SOURCE_1_REG, DPORT_PRO_CACHE_I_SOURCE_PRO_IROM0);
REG_CLR_BIT(DPORT_PRO_ICACHE_CTRL1_REG, DPORT_PRO_ICACHE_MASK_IROM0);
}
}
rc = Cache_Ibus_MMU_Set(DPORT_MMU_ACCESS_FLASH, irom_load_addr & 0xffff0000, irom_addr & 0xffff0000, 64, irom_page_count, 0);
#endif
ESP_LOGV(TAG, "rc=%d", rc);
#if CONFIG_IDF_TARGET_ESP32
@@ -748,12 +754,12 @@ static void set_cache_and_start_app(
(DPORT_APP_CACHE_MASK_IRAM0) | (DPORT_APP_CACHE_MASK_IRAM1 & 0) |
(DPORT_APP_CACHE_MASK_IROM0 & 0) | DPORT_APP_CACHE_MASK_DROM0 |
DPORT_APP_CACHE_MASK_DRAM1 );
#elif CONFIG_IDF_TARGET_ESP32S2
REG_CLR_BIT( EXTMEM_PRO_ICACHE_CTRL1_REG, (EXTMEM_PRO_ICACHE_MASK_IRAM0) | (EXTMEM_PRO_ICACHE_MASK_IRAM1 & 0) | EXTMEM_PRO_ICACHE_MASK_DROM0 );
#elif CONFIG_IDF_TARGET_ESP32S2BETA
DPORT_REG_CLR_BIT( DPORT_PRO_ICACHE_CTRL1_REG, (DPORT_PRO_ICACHE_MASK_IRAM0) | (DPORT_PRO_ICACHE_MASK_IRAM1 & 0) | (DPORT_PRO_ICACHE_MASK_IROM0 & 0) | DPORT_PRO_ICACHE_MASK_DROM0 );
#endif
#if CONFIG_IDF_TARGET_ESP32
Cache_Read_Enable(0);
#elif CONFIG_IDF_TARGET_ESP32S2
#elif CONFIG_IDF_TARGET_ESP32S2BETA
Cache_Resume_ICache(autoload);
#endif
// Application will need to do Cache_Flush(1) and Cache_Read_Enable(1)
@@ -821,7 +827,6 @@ void bootloader_debug_buffer(const void *buffer, size_t length, const char *labe
esp_err_t bootloader_sha256_flash_contents(uint32_t flash_offset, uint32_t len, uint8_t *digest)
{
if (digest == NULL) {
return ESP_ERR_INVALID_ARG;
}
@@ -838,7 +843,7 @@ esp_err_t bootloader_sha256_flash_contents(uint32_t flash_offset, uint32_t len,
while (len > 0) {
uint32_t mmu_page_offset = ((flash_offset & MMAP_ALIGNED_MASK) != 0) ? 1 : 0; /* Skip 1st MMU Page if it is already populated */
uint32_t partial_image_len = MIN(len, ((mmu_free_pages_count - mmu_page_offset) * SPI_FLASH_MMU_PAGE_SIZE)); /* Read the image that fits in the free MMU pages */
const void * image = bootloader_mmap(flash_offset, partial_image_len);
if (image == NULL) {
bootloader_sha256_finish(sha_handle, NULL);

View File

@@ -22,12 +22,10 @@
#include "bootloader_clock.h"
#include "bootloader_common.h"
#include "bootloader_flash_config.h"
#include "bootloader_mem.h"
#include "soc/cpu.h"
#include "soc/dport_reg.h"
#include "soc/efuse_reg.h"
#include "soc/gpio_periph.h"
#include "soc/gpio_sig_map.h"
#include "soc/io_mux_reg.h"
#include "soc/rtc.h"
@@ -55,11 +53,18 @@ void bootloader_configure_spi_pins(int drv)
uint32_t chip_ver = REG_GET_FIELD(EFUSE_BLK0_RDATA3_REG, EFUSE_RD_CHIP_VER_PKG);
uint32_t pkg_ver = chip_ver & 0x7;
if (pkg_ver == EFUSE_RD_CHIP_VER_PKG_ESP32D2WDQ5 ||
pkg_ver == EFUSE_RD_CHIP_VER_PKG_ESP32PICOD2 ||
pkg_ver == EFUSE_RD_CHIP_VER_PKG_ESP32PICOD4 ||
pkg_ver == EFUSE_RD_CHIP_VER_PKG_ESP32PICOV302) {
// For ESP32D2WD or ESP32-PICO series,the SPI pins are already configured
if (pkg_ver == EFUSE_RD_CHIP_VER_PKG_ESP32D2WDQ5) {
// For ESP32D2WD the SPI pins are already configured
// flash clock signal should come from IO MUX.
PIN_FUNC_SELECT(PERIPHS_IO_MUX_SD_CLK_U, FUNC_SD_CLK_SPICLK);
SET_PERI_REG_BITS(PERIPHS_IO_MUX_SD_CLK_U, FUN_DRV, drv, FUN_DRV_S);
} else if (pkg_ver == EFUSE_RD_CHIP_VER_PKG_ESP32PICOD2) {
// For ESP32PICOD2 the SPI pins are already configured
// flash clock signal should come from IO MUX.
PIN_FUNC_SELECT(PERIPHS_IO_MUX_SD_CLK_U, FUNC_SD_CLK_SPICLK);
SET_PERI_REG_BITS(PERIPHS_IO_MUX_SD_CLK_U, FUN_DRV, drv, FUN_DRV_S);
} else if (pkg_ver == EFUSE_RD_CHIP_VER_PKG_ESP32PICOD4) {
// For ESP32PICOD4 the SPI pins are already configured
// flash clock signal should come from IO MUX.
PIN_FUNC_SELECT(PERIPHS_IO_MUX_SD_CLK_U, FUNC_SD_CLK_SPICLK);
SET_PERI_REG_BITS(PERIPHS_IO_MUX_SD_CLK_U, FUN_DRV, drv, FUN_DRV_S);
@@ -357,6 +362,9 @@ static void wdt_reset_info_dump(int cpu)
lsstat = DPORT_REG_READ(DPORT_APP_CPU_RECORD_PDEBUGLS0STAT_REG);
lsaddr = DPORT_REG_READ(DPORT_APP_CPU_RECORD_PDEBUGLS0ADDR_REG);
lsdata = DPORT_REG_READ(DPORT_APP_CPU_RECORD_PDEBUGLS0DATA_REG);
#else
ESP_LOGE(TAG, "WDT reset info: &s CPU not support!\n", cpu_name);
return;
#endif
}
@@ -397,16 +405,14 @@ static void bootloader_check_wdt_reset(void)
if (wdt_rst) {
// if reset by WDT dump info from trace port
wdt_reset_info_dump(0);
#if !CONFIG_FREERTOS_UNICORE
wdt_reset_info_dump(1);
#endif
}
wdt_reset_cpu0_info_enable();
}
void abort(void)
{
#if !CONFIG_ESP_SYSTEM_PANIC_SILENT_REBOOT
#if !CONFIG_ESP32_PANIC_SILENT_REBOOT
ets_printf("abort() was called at PC 0x%08x\r\n", (intptr_t)__builtin_return_address(0) - 3);
#endif
if (esp_cpu_in_ocd_debug_mode()) {
@@ -419,9 +425,10 @@ void abort(void)
esp_err_t bootloader_init(void)
{
esp_err_t ret = ESP_OK;
bootloader_init_mem();
// workaround for tensilica erratum572
cpu_init_memctl();
// protect memory region
cpu_configure_region_protection();
// check that static RAM is after the stack
#ifndef NDEBUG
{

View File

@@ -22,7 +22,7 @@
#include "esp_efuse.h"
#include "esp_log.h"
#include "esp32/rom/secure_boot.h"
#include "hal/wdt_hal.h"
#include "soc/rtc_wdt.h"
#include "esp32/rom/cache.h"
#include "esp32/rom/spi_flash.h" /* TODO: Remove this */
@@ -252,7 +252,9 @@ static esp_err_t encrypt_bootloader(void)
ESP_LOGD(TAG, "bootloader is plaintext. Encrypting...");
#if CONFIG_SECURE_BOOT_V2_ENABLED
/* The image length obtained from esp_image_verify_bootloader includes the sector boundary padding and the signature block lengths */
// Account for the signature sector after the bootloader
image_length = (image_length + FLASH_SECTOR_SIZE - 1) & ~(FLASH_SECTOR_SIZE - 1);
image_length += FLASH_SECTOR_SIZE;
if (ESP_BOOTLOADER_OFFSET + image_length > ESP_PARTITION_TABLE_OFFSET) {
ESP_LOGE(TAG, "Bootloader is too large to fit Secure Boot V2 signature sector and partition table (configured offset 0x%x)", ESP_PARTITION_TABLE_OFFSET);
return ESP_ERR_INVALID_STATE;
@@ -357,11 +359,8 @@ esp_err_t esp_flash_encrypt_region(uint32_t src_addr, size_t data_length)
return ESP_FAIL;
}
wdt_hal_context_t rtc_wdt_ctx = {.inst = WDT_RWDT, .rwdt_dev = &RTCCNTL};
for (size_t i = 0; i < data_length; i += FLASH_SECTOR_SIZE) {
wdt_hal_write_protect_disable(&rtc_wdt_ctx);
wdt_hal_feed(&rtc_wdt_ctx);
wdt_hal_write_protect_enable(&rtc_wdt_ctx);
rtc_wdt_feed();
uint32_t sec_start = i + src_addr;
err = bootloader_flash_read(sec_start, buf, FLASH_SECTOR_SIZE, false);
if (err != ESP_OK) {

View File

@@ -319,26 +319,16 @@ esp_err_t esp_secure_boot_v2_permanently_enable(const esp_image_metadata_t *imag
uint32_t dis_reg = REG_READ(EFUSE_BLK0_RDATA0_REG);
bool efuse_key_read_protected = dis_reg & EFUSE_RD_DIS_BLK2;
bool efuse_key_write_protected = dis_reg & EFUSE_WR_DIS_BLK2;
uint32_t efuse_blk2_r0, efuse_blk2_r1, efuse_blk2_r2, efuse_blk2_r3, efuse_blk2_r4, efuse_blk2_r5, efuse_blk2_r6, efuse_blk2_r7;
efuse_blk2_r0 = REG_READ(EFUSE_BLK2_RDATA0_REG);
efuse_blk2_r1 = REG_READ(EFUSE_BLK2_RDATA1_REG);
efuse_blk2_r2 = REG_READ(EFUSE_BLK2_RDATA2_REG);
efuse_blk2_r3 = REG_READ(EFUSE_BLK2_RDATA3_REG);
efuse_blk2_r4 = REG_READ(EFUSE_BLK2_RDATA4_REG);
efuse_blk2_r5 = REG_READ(EFUSE_BLK2_RDATA5_REG);
efuse_blk2_r6 = REG_READ(EFUSE_BLK2_RDATA6_REG);
efuse_blk2_r7 = REG_READ(EFUSE_BLK2_RDATA7_REG);
if (efuse_key_read_protected == true) {
ESP_LOGE(TAG, "Secure Boot v2 digest(BLK2) read protected, aborting....");
return ESP_FAIL;
}
if (efuse_key_write_protected == false
&& efuse_blk2_r0 == 0 && efuse_blk2_r1 == 0
&& efuse_blk2_r2 == 0 && efuse_blk2_r3 == 0
&& efuse_blk2_r4 == 0 && efuse_blk2_r5 == 0
&& efuse_blk2_r6 == 0 && efuse_blk2_r7 == 0) {
if (efuse_key_write_protected == false
&& efuse_key_read_protected == false
&& REG_READ(EFUSE_BLK2_RDATA0_REG) == 0
&& REG_READ(EFUSE_BLK2_RDATA1_REG) == 0
&& REG_READ(EFUSE_BLK2_RDATA2_REG) == 0
&& REG_READ(EFUSE_BLK2_RDATA3_REG) == 0
&& REG_READ(EFUSE_BLK2_RDATA4_REG) == 0
&& REG_READ(EFUSE_BLK2_RDATA5_REG) == 0
&& REG_READ(EFUSE_BLK2_RDATA6_REG) == 0
&& REG_READ(EFUSE_BLK2_RDATA7_REG) == 0) {
/* Verifies the signature block appended to the image matches with the signature block of the app to be loaded */
ret = secure_boot_v2_digest_generate(bootloader_data.start_addr, bootloader_data.image_len - SIG_BLOCK_PADDING, boot_pub_key_digest);
if (ret != ESP_OK) {
@@ -353,24 +343,12 @@ esp_err_t esp_secure_boot_v2_permanently_enable(const esp_image_metadata_t *imag
ESP_LOGD(TAG, "EFUSE_BLKx_WDATA%d_REG = 0x%08x", i, boot_public_key_digest_ptr[i]);
}
} else {
uint32_t efuse_blk2_digest[8];
efuse_blk2_digest[0] = efuse_blk2_r0;
efuse_blk2_digest[1] = efuse_blk2_r1;
efuse_blk2_digest[2] = efuse_blk2_r2;
efuse_blk2_digest[3] = efuse_blk2_r3;
efuse_blk2_digest[4] = efuse_blk2_r4;
efuse_blk2_digest[5] = efuse_blk2_r5;
efuse_blk2_digest[6] = efuse_blk2_r6;
efuse_blk2_digest[7] = efuse_blk2_r7;
memcpy(boot_pub_key_digest, efuse_blk2_digest, DIGEST_LEN);
ESP_LOGW(TAG, "Using pre-loaded secure boot v2 public key digest in EFUSE block 2");
}
if (efuse_key_write_protected == false) {
ESP_LOGI(TAG, "Write protecting public key digest...");
new_wdata0 |= EFUSE_WR_DIS_BLK2; // delay burning until second half of this function
new_wdata0 |= EFUSE_WR_DIS_BLK2;
efuse_key_write_protected = true;
efuse_key_read_protected = false;
} else {
ESP_LOGW(TAG, "Using pre-loaded secure boot v2 public key digest in EFUSE block 2");
}
uint8_t app_pub_key_digest[DIGEST_LEN];

View File

@@ -137,13 +137,13 @@ esp_err_t esp_secure_boot_verify_signature(uint32_t src_addr, uint32_t length)
esp_err_t esp_secure_boot_verify_rsa_signature_block(const ets_secure_boot_signature_t *sig_block, const uint8_t *image_digest, uint8_t *verified_digest)
{
secure_boot_v2_status_t r;
uint8_t efuse_trusted_digest[DIGEST_LEN] = {0}, sig_block_trusted_digest[DIGEST_LEN] = {0};
secure_boot_v2_status_t r;
memcpy(efuse_trusted_digest, (uint8_t *)EFUSE_BLK2_RDATA0_REG, DIGEST_LEN); /* EFUSE_BLK2_RDATA0_REG - Stores the Secure Boot Public Key Digest */
if (!ets_use_secure_boot_v2()) {
ESP_LOGI(TAG, "Secure Boot eFuse bit(ABS_DONE_1) not yet programmed.");
ESP_LOGI(TAG, "Secure Boot EFuse bit(ABS_DONE_1) not yet programmed.");
/* Generating the SHA of the public key components in the signature block */
bootloader_sha256_handle_t sig_block_sha;
@@ -151,25 +151,10 @@ esp_err_t esp_secure_boot_verify_rsa_signature_block(const ets_secure_boot_signa
bootloader_sha256_data(sig_block_sha, &sig_block->block[0].key, sizeof(sig_block->block[0].key));
bootloader_sha256_finish(sig_block_sha, (unsigned char *)sig_block_trusted_digest);
#if CONFIG_SECURE_BOOT_V2_ENABLED
if (memcmp(efuse_trusted_digest, sig_block_trusted_digest, DIGEST_LEN) != 0) {
/* Most likely explanation for this is that BLK2 is empty, and we're going to burn it
after we verify that the signature is valid. However, if BLK2 is not empty then we need to
fail here.
*/
bool all_zeroes = true;
for (int i = 0; i < DIGEST_LEN; i++) {
all_zeroes = all_zeroes && (efuse_trusted_digest[i] == 0);
}
if (!all_zeroes) {
ESP_LOGE(TAG, "Different public key digest burned to eFuse BLK2");
return ESP_ERR_INVALID_STATE;
}
ESP_LOGW(TAG, "Public key digest in eFuse BLK2 and the signature block don't match.");
}
ESP_FAULT_ASSERT(!ets_use_secure_boot_v2());
#endif
memcpy(efuse_trusted_digest, sig_block_trusted_digest, DIGEST_LEN);
}

View File

@@ -1,325 +0,0 @@
// Copyright 2015-2018 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#include <string.h>
#include "esp_log.h"
#include "esp_secure_boot.h"
#include "soc/efuse_reg.h"
#include "bootloader_flash.h"
#include "bootloader_sha.h"
#include "bootloader_utility.h"
#include "esp32s2/rom/crc.h"
#include "esp_efuse.h"
#include "esp_efuse_table.h"
#include "esp32s2/rom/efuse.h"
#include "esp32s2/rom/secure_boot.h"
static const char *TAG = "secure_boot_v2";
#define ALIGN_UP(num, align) (((num) + ((align) - 1)) & ~((align) - 1))
#define SIG_BLOCK_MAGIC_BYTE 0xe7
#define CRC_SIGN_BLOCK_LEN 1196
#define SIG_BLOCK_PADDING 4096
#define DIGEST_LEN 32
/* A signature block is valid when it has correct magic byte, crc and image digest. */
static esp_err_t validate_signature_block(const ets_secure_boot_sig_block_t *block, int block_num, const uint8_t *image_digest)
{
uint32_t crc = crc32_le(0, (uint8_t *)block, CRC_SIGN_BLOCK_LEN);
if (block->magic_byte != SIG_BLOCK_MAGIC_BYTE) {
// All signature blocks have been parsed, no new signature block present.
ESP_LOGD(TAG, "Signature block(%d) invalid/absent.", block_num);
return ESP_FAIL;
}
if (block->block_crc != crc) {
ESP_LOGE(TAG, "Magic byte correct but incorrect crc.");
return ESP_FAIL;
}
if (memcmp(image_digest, block->image_digest, DIGEST_LEN)) {
ESP_LOGE(TAG, "Magic byte & CRC correct but incorrect image digest.");
return ESP_FAIL;
} else {
ESP_LOGD(TAG, "valid signature block(%d) found", block_num);
return ESP_OK;
}
return ESP_FAIL;
}
/* Structure to hold public key digests calculated from the signature blocks of a single image.
Each image can have one or more signature blocks (up to SECURE_BOOT_NUM_BLOCKS). Each signature block
includes a public key.
Different to the ROM ets_secure_boot_key_digests_t structure which holds pointers to eFuse data with digests,
in this data structure the digest data is included.
*/
typedef struct {
uint8_t key_digests[SECURE_BOOT_NUM_BLOCKS][DIGEST_LEN];
unsigned num_digests; /* Number of valid digests, starting at index 0 */
} image_sig_public_key_digests_t;
/* Generates the public key digests of the valid public keys in an image's
signature block, verifies each signature, and stores the key digests in the
public_key_digests structure.
@param flash_offset Image offset in flash
@param flash_size Image size in flash (not including signature block)
@param[out] public_key_digests Pointer to structure to hold the key digests for valid sig blocks
Note that this function doesn't read any eFuses, so it doesn't know if the
keys are ultimately trusted by the hardware or not
@return - ESP_OK if no signatures failed to verify, or if no valid signature blocks are found at all.
- ESP_FAIL if there's a valid signature block that doesn't verify using the included public key (unexpected!)
*/
static esp_err_t s_calculate_image_public_key_digests(uint32_t flash_offset, uint32_t flash_size, image_sig_public_key_digests_t *public_key_digests)
{
esp_err_t ret;
uint8_t image_digest[DIGEST_LEN] = {0};
uint8_t __attribute__((aligned(4))) key_digest[DIGEST_LEN] = {0};
size_t sig_block_addr = flash_offset + ALIGN_UP(flash_size, FLASH_SECTOR_SIZE);
ESP_LOGD(TAG, "calculating public key digests for sig blocks of image offset 0x%x (sig block offset 0x%x)", flash_offset, sig_block_addr);
bzero(public_key_digests, sizeof(image_sig_public_key_digests_t));
ret = bootloader_sha256_flash_contents(flash_offset, sig_block_addr - flash_offset, image_digest);
if (ret != ESP_OK) {
ESP_LOGE(TAG, "error generating image digest, %d", ret);
return ret;
}
ESP_LOGD(TAG, "reading signatures");
const ets_secure_boot_signature_t *signatures = bootloader_mmap(sig_block_addr, sizeof(ets_secure_boot_signature_t));
if (signatures == NULL) {
ESP_LOGE(TAG, "bootloader_mmap(0x%x, 0x%x) failed", sig_block_addr, sizeof(ets_secure_boot_signature_t));
return ESP_FAIL;
}
for (int i = 0; i < SECURE_BOOT_NUM_BLOCKS; i++) {
const ets_secure_boot_sig_block_t *block = &signatures->block[i];
ret = validate_signature_block(block, i, image_digest);
if (ret != ESP_OK) {
ret = ESP_OK; // past the last valid signature block
break;
}
/* Generating the SHA of the public key components in the signature block */
bootloader_sha256_handle_t sig_block_sha;
sig_block_sha = bootloader_sha256_start();
bootloader_sha256_data(sig_block_sha, &block->key, sizeof(block->key));
bootloader_sha256_finish(sig_block_sha, key_digest);
// Check we can verify the image using this signature and this key
uint8_t temp_verified_digest[DIGEST_LEN];
bool verified = ets_rsa_pss_verify(&block->key, block->signature, image_digest, temp_verified_digest);
if (!verified) {
/* We don't expect this: the signature blocks before we enable secure boot should all be verifiable or invalid,
so this is a fatal error
*/
ret = ESP_FAIL;
ESP_LOGE(TAG, "Secure boot key (%d) verification failed.", i);
break;
}
ESP_LOGD(TAG, "Signature block (%d) is verified", i);
/* Copy the key digest to the buffer provided by the caller */
memcpy((void *)public_key_digests->key_digests[i], key_digest, DIGEST_LEN);
public_key_digests->num_digests++;
}
if (ret == ESP_OK && public_key_digests->num_digests > 0) {
ESP_LOGI(TAG, "Digests successfully calculated, %d valid signatures (image offset 0x%x)",
public_key_digests->num_digests, flash_offset);
}
bootloader_munmap(signatures);
return ret;
}
esp_err_t esp_secure_boot_v2_permanently_enable(const esp_image_metadata_t *image_data)
{
ESP_LOGI(TAG, "enabling secure boot v2 - ESP32-S2...");
if (esp_secure_boot_enabled()) {
ESP_LOGI(TAG, "secure boot v2 is already enabled, continuing..");
return ESP_OK;
}
esp_err_t ret;
/* Verify the bootloader */
esp_image_metadata_t bootloader_data = { 0 };
ret = esp_image_verify_bootloader_data(&bootloader_data);
if (ret != ESP_OK) {
ESP_LOGE(TAG, "bootloader image appears invalid! error %d", ret);
return ret;
}
/* Check if secure boot digests are present */
bool has_secure_boot_digest = ets_efuse_find_purpose(ETS_EFUSE_KEY_PURPOSE_SECURE_BOOT_DIGEST0, NULL);
has_secure_boot_digest |= ets_efuse_find_purpose(ETS_EFUSE_KEY_PURPOSE_SECURE_BOOT_DIGEST1, NULL);
has_secure_boot_digest |= ets_efuse_find_purpose(ETS_EFUSE_KEY_PURPOSE_SECURE_BOOT_DIGEST2, NULL);
ESP_LOGI(TAG, "Secure boot digests %s", has_secure_boot_digest ? "already present":"absent, generating..");
ets_efuse_clear_program_registers();
if (!has_secure_boot_digest) {
image_sig_public_key_digests_t boot_key_digests = {0};
image_sig_public_key_digests_t app_key_digests = {0};
/* Generate the bootloader public key digests */
ret = s_calculate_image_public_key_digests(bootloader_data.start_addr, bootloader_data.image_len - SIG_BLOCK_PADDING, &boot_key_digests);
if (ret != ESP_OK) {
ESP_LOGE(TAG, "Bootloader signature block is invalid");
return ret;
}
if (boot_key_digests.num_digests == 0) {
ESP_LOGE(TAG, "No valid bootloader signature blocks found.");
return ESP_FAIL;
}
ESP_LOGI(TAG, "%d signature block(s) found appended to the bootloader.", boot_key_digests.num_digests);
int unused_key_slots = ets_efuse_count_unused_key_blocks();
if (boot_key_digests.num_digests > unused_key_slots) {
ESP_LOGE(TAG, "Bootloader signatures(%d) more than available key slots(%d).", boot_key_digests.num_digests, unused_key_slots);
return ESP_FAIL;
}
for (int i = 0; i < boot_key_digests.num_digests; i++) {
ets_efuse_block_t block;
const uint32_t secure_boot_key_purpose[SECURE_BOOT_NUM_BLOCKS] = { ETS_EFUSE_KEY_PURPOSE_SECURE_BOOT_DIGEST0,
ETS_EFUSE_KEY_PURPOSE_SECURE_BOOT_DIGEST1, ETS_EFUSE_KEY_PURPOSE_SECURE_BOOT_DIGEST2 };
block = ets_efuse_find_unused_key_block();
if (block == ETS_EFUSE_BLOCK_MAX) {
ESP_LOGE(TAG, "No more unused key blocks available.");
return ESP_FAIL;
}
int r = ets_efuse_write_key(block, secure_boot_key_purpose[i], boot_key_digests.key_digests[i], DIGEST_LEN);
if (r != 0) {
ESP_LOGE(TAG, "Failed to write efuse block %d with purpose %d. Can't continue.", block, secure_boot_key_purpose[i]);
return ESP_FAIL;
}
// Note: write key will write protect both the block and the purpose eFuse, always
}
/* Generate the application public key digests */
ret = s_calculate_image_public_key_digests(image_data->start_addr, image_data->image_len - SIG_BLOCK_PADDING, &app_key_digests);
if (ret != ESP_OK) {
ESP_LOGE(TAG, "App signature block is invalid.");
return ret;
}
if (app_key_digests.num_digests == 0) {
ESP_LOGE(TAG, "No valid applications signature blocks found.");
return ESP_FAIL;
}
ESP_LOGI(TAG, "%d signature block(s) found appended to the app.", app_key_digests.num_digests);
if (app_key_digests.num_digests > boot_key_digests.num_digests) {
ESP_LOGW(TAG, "App has %d signature blocks but bootloader only has %d. Some keys missing from bootloader?");
}
/* Confirm if at least one public key from the application matches a public key in the bootloader
(Also, ensure if that public revoke bit is not set for the matched key) */
bool match = false;
const uint32_t revoke_bits[SECURE_BOOT_NUM_BLOCKS] = { EFUSE_SECURE_BOOT_KEY_REVOKE0,
EFUSE_SECURE_BOOT_KEY_REVOKE1, EFUSE_SECURE_BOOT_KEY_REVOKE2 };
for (int i = 0; i < boot_key_digests.num_digests; i++) {
if (REG_GET_BIT(EFUSE_RD_REPEAT_DATA1_REG, revoke_bits[i])) {
ESP_LOGI(TAG, "Key block(%d) has been revoked.", i);
continue; // skip if the key block is revoked
}
for (int j = 0; j < app_key_digests.num_digests; j++) {
if (!memcmp(boot_key_digests.key_digests[i], app_key_digests.key_digests[j], DIGEST_LEN)) {
ESP_LOGI(TAG, "Application key(%d) matches with bootloader key(%d).", j, i);
match = true;
}
}
}
if (match == false) {
ESP_LOGE(TAG, "No application key digest matches the bootloader key digest.");
return ESP_FAIL;
}
/* Revoke the empty signature blocks */
if (boot_key_digests.num_digests < SECURE_BOOT_NUM_BLOCKS) {
/* The revocation index can be 0, 1, 2. Bootloader count can be 1,2,3. */
for (uint8_t i = boot_key_digests.num_digests; i < SECURE_BOOT_NUM_BLOCKS; i++) {
ESP_LOGI(TAG, "Revoking empty key digest slot (%d)...", i);
ets_secure_boot_revoke_public_key_digest(i);
}
}
}
esp_err_t err = esp_efuse_batch_write_begin();
if (err != ESP_OK) {
ESP_LOGI(TAG, "Error batch programming security eFuses.");
return err;
}
__attribute__((unused)) static const uint8_t enable = 1;
esp_efuse_write_field_bit(ESP_EFUSE_DIS_BOOT_REMAP);
esp_efuse_write_field_bit(ESP_EFUSE_DIS_LEGACY_SPI_BOOT);
#ifdef CONFIG_SECURE_ENABLE_SECURE_ROM_DL_MODE
ESP_LOGI(TAG, "Enabling Security download mode...");
esp_efuse_write_field_bit(ESP_EFUSE_ENABLE_SECURITY_DOWNLOAD);
#else
ESP_LOGW(TAG, "Not enabling Security download mode - SECURITY COMPROMISED");
#endif
#ifndef CONFIG_SECURE_BOOT_ALLOW_JTAG
ESP_LOGI(TAG, "Disable hardware & software JTAG...");
esp_efuse_write_field_bit(ESP_EFUSE_HARD_DIS_JTAG);
esp_efuse_write_field_bit(ESP_EFUSE_SOFT_DIS_JTAG);
#else
ESP_LOGW(TAG, "Not disabling JTAG - SECURITY COMPROMISED");
#endif
#ifdef CONFIG_SECURE_BOOT_ENABLE_AGGRESSIVE_KEY_REVOKE
esp_efuse_write_field_bit(ESP_EFUSE_SECURE_BOOT_AGGRESSIVE_REVOKE);
#endif
esp_efuse_write_field_bit(ESP_EFUSE_SECURE_BOOT_EN);
err = esp_efuse_batch_write_commit();
if (err != ESP_OK) {
ESP_LOGI(TAG, "Error programming security eFuses.");
return err;
}
#ifdef CONFIG_SECURE_BOOT_ENABLE_AGGRESSIVE_KEY_REVOKE
assert(ets_efuse_secure_boot_aggressive_revoke_enabled());
#endif
assert(ets_efuse_secure_boot_enabled());
ESP_LOGI(TAG, "Secure boot permanently enabled");
return ESP_OK;
}

View File

@@ -1,93 +0,0 @@
// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#include "sdkconfig.h"
#include <string.h>
#include "esp_fault.h"
#include "bootloader_flash.h"
#include "bootloader_sha.h"
#include "bootloader_utility.h"
#include "esp_log.h"
#include "esp_image_format.h"
#include "esp_secure_boot.h"
#include "esp32s2/rom/secure_boot.h"
static const char* TAG = "secure_boot";
#define DIGEST_LEN 32
#define ALIGN_UP(num, align) (((num) + ((align) - 1)) & ~((align) - 1))
esp_err_t esp_secure_boot_verify_signature(uint32_t src_addr, uint32_t length)
{
uint8_t digest[DIGEST_LEN];
uint8_t verified_digest[DIGEST_LEN] = { 0 }; /* Note: this function doesn't do any anti-FI checks on this buffer */
const uint8_t *data;
ESP_LOGD(TAG, "verifying signature src_addr 0x%x length 0x%x", src_addr, length);
/* Padding to round off the input to the nearest 4k boundary */
int padded_length = ALIGN_UP(length, FLASH_SECTOR_SIZE);
ESP_LOGD(TAG, "verifying src_addr 0x%x length", src_addr, padded_length);
data = bootloader_mmap(src_addr, length + sizeof(struct ets_secure_boot_sig_block));
if (data == NULL) {
ESP_LOGE(TAG, "bootloader_mmap(0x%x, 0x%x) failed", src_addr, length+sizeof(ets_secure_boot_signature_t));
return ESP_FAIL;
}
/* Calculate digest of main image */
esp_err_t err = bootloader_sha256_flash_contents(src_addr, padded_length, digest);
if (err != ESP_OK) {
ESP_LOGE(TAG, "Digest calculation failed 0x%x, 0x%x", src_addr, padded_length);
bootloader_munmap(data);
return err;
}
const ets_secure_boot_signature_t *sig = (const ets_secure_boot_signature_t *)(data + length);
int r = esp_secure_boot_verify_rsa_signature_block(sig, digest, verified_digest);
bootloader_munmap(data);
return (r == ETS_OK) ? ESP_OK : ESP_FAIL;
}
esp_err_t esp_secure_boot_verify_rsa_signature_block(const ets_secure_boot_signature_t *sig_block, const uint8_t *image_digest, uint8_t *verified_digest)
{
ets_secure_boot_key_digests_t trusted_keys;
ets_secure_boot_key_digests_t trusted_key_copies[2];
ETS_STATUS r;
ets_secure_boot_status_t sb_result;
memset(&trusted_keys, 0, sizeof(ets_secure_boot_key_digests_t));
memset(trusted_key_copies, 0, 2 * sizeof(ets_secure_boot_key_digests_t));
if (!esp_secure_boot_enabled()) {
return ESP_OK;
}
r = ets_secure_boot_read_key_digests(&trusted_keys);
if (r != ETS_OK) {
ESP_LOGI(TAG, "Could not read secure boot digests!");
return ESP_FAIL;
}
// Create the copies for FI checks (assuming result is ETS_OK, if it's not then it'll fail the fault check anyhow)
ets_secure_boot_read_key_digests(&trusted_key_copies[0]);
ets_secure_boot_read_key_digests(&trusted_key_copies[1]);
ESP_FAULT_ASSERT(memcmp(&trusted_keys, &trusted_key_copies[0], sizeof(ets_secure_boot_key_digests_t)) == 0);
ESP_FAULT_ASSERT(memcmp(&trusted_keys, &trusted_key_copies[1], sizeof(ets_secure_boot_key_digests_t)) == 0);
ESP_LOGI(TAG, "Verifying with RSA-PSS boot...");
sb_result = ets_secure_boot_verify_signature(sig_block, image_digest, &trusted_keys, verified_digest);
return (sb_result == SB_SUCCESS) ? ESP_OK : ESP_FAIL;
}

View File

@@ -15,23 +15,21 @@
#include "sdkconfig.h"
#include "bootloader_common.h"
#include "soc/efuse_reg.h"
#include "soc/gpio_periph.h"
#include "soc/gpio_sig_map.h"
#include "soc/io_mux_reg.h"
#include "esp32s2/rom/efuse.h"
#include "esp32s2/rom/gpio.h"
#include "esp32s2/rom/spi_flash.h"
#include "esp32s2beta/rom/efuse.h"
#include "esp32s2beta/rom/gpio.h"
#include "esp32s2beta/rom/spi_flash.h"
#include "bootloader_init.h"
#include "bootloader_clock.h"
#include "bootloader_flash_config.h"
#include "bootloader_mem.h"
#include "esp32s2/rom/cache.h"
#include "esp32s2/rom/ets_sys.h"
#include "esp32s2/rom/spi_flash.h"
#include "esp32s2/rom/rtc.h"
#include "esp32s2/rom/uart.h"
#include "esp32s2beta/rom/cache.h"
#include "esp32s2beta/rom/ets_sys.h"
#include "esp32s2beta/rom/spi_flash.h"
#include "esp32s2beta/rom/rtc.h"
#include "esp32s2beta/rom/uart.h"
#include "esp_attr.h"
#include "esp_log.h"
#include "esp_image_format.h"
@@ -39,41 +37,54 @@
#include "soc/assist_debug_reg.h"
#include "soc/cpu.h"
#include "soc/dport_reg.h"
#include "soc/extmem_reg.h"
#include "soc/rtc.h"
#include "soc/spi_periph.h"
#include <string.h>
static const char *TAG = "boot.esp32s2";
#define FLASH_CLK_IO SPI_CLK_GPIO_NUM
#define FLASH_CS_IO SPI_CS0_GPIO_NUM
#define FLASH_SPIQ_IO SPI_Q_GPIO_NUM
#define FLASH_SPID_IO SPI_D_GPIO_NUM
#define FLASH_SPIWP_IO SPI_WP_GPIO_NUM
#define FLASH_SPIHD_IO SPI_HD_GPIO_NUM
void bootloader_configure_spi_pins(int drv)
{
const uint32_t spiconfig = ets_efuse_get_spiconfig();
uint8_t wp_pin = ets_efuse_get_wp_pad();
uint8_t clk_gpio_num = SPI_CLK_GPIO_NUM;
uint8_t q_gpio_num = SPI_Q_GPIO_NUM;
uint8_t d_gpio_num = SPI_D_GPIO_NUM;
uint8_t cs0_gpio_num = SPI_CS0_GPIO_NUM;
uint8_t hd_gpio_num = SPI_HD_GPIO_NUM;
uint8_t wp_gpio_num = SPI_WP_GPIO_NUM;
if (spiconfig == 0) {
if (spiconfig == EFUSE_SPICONFIG_SPI_DEFAULTS) {
gpio_matrix_out(FLASH_CS_IO, SPICS0_OUT_IDX, 0, 0);
gpio_matrix_out(FLASH_SPIQ_IO, SPIQ_OUT_IDX, 0, 0);
gpio_matrix_in(FLASH_SPIQ_IO, SPIQ_IN_IDX, 0);
gpio_matrix_out(FLASH_SPID_IO, SPID_OUT_IDX, 0, 0);
gpio_matrix_in(FLASH_SPID_IO, SPID_IN_IDX, 0);
gpio_matrix_out(FLASH_SPIWP_IO, SPIWP_OUT_IDX, 0, 0);
gpio_matrix_in(FLASH_SPIWP_IO, SPIWP_IN_IDX, 0);
gpio_matrix_out(FLASH_SPIHD_IO, SPIHD_OUT_IDX, 0, 0);
gpio_matrix_in(FLASH_SPIHD_IO, SPIHD_IN_IDX, 0);
//select pin function gpio
PIN_FUNC_SELECT(PERIPHS_IO_MUX_SPIHD_U, PIN_FUNC_GPIO);
PIN_FUNC_SELECT(PERIPHS_IO_MUX_SPIWP_U, PIN_FUNC_GPIO);
PIN_FUNC_SELECT(PERIPHS_IO_MUX_SPICS0_U, PIN_FUNC_GPIO);
PIN_FUNC_SELECT(PERIPHS_IO_MUX_SPIQ_U, PIN_FUNC_GPIO);
PIN_FUNC_SELECT(PERIPHS_IO_MUX_SPID_U, PIN_FUNC_GPIO);
// flash clock signal should come from IO MUX.
// set drive ability for clock
PIN_FUNC_SELECT(PERIPHS_IO_MUX_SPICLK_U, FUNC_SPICLK_SPICLK);
SET_PERI_REG_BITS(PERIPHS_IO_MUX_SPICLK_U, FUN_DRV, drv, FUN_DRV_S);
} else {
clk_gpio_num = spiconfig & 0x3f;
q_gpio_num = (spiconfig >> 6) & 0x3f;
d_gpio_num = (spiconfig >> 12) & 0x3f;
cs0_gpio_num = (spiconfig >> 18) & 0x3f;
hd_gpio_num = (spiconfig >> 24) & 0x3f;
wp_gpio_num = wp_pin;
}
gpio_pad_set_drv(clk_gpio_num, drv);
gpio_pad_set_drv(q_gpio_num, drv);
gpio_pad_set_drv(d_gpio_num, drv);
gpio_pad_set_drv(cs0_gpio_num, drv);
if (hd_gpio_num <= MAX_PAD_GPIO_NUM) {
gpio_pad_set_drv(hd_gpio_num, drv);
}
if (wp_gpio_num <= MAX_PAD_GPIO_NUM) {
gpio_pad_set_drv(wp_gpio_num, drv);
#if CONFIG_SPIRAM_TYPE_ESPPSRAM32 || CONFIG_SPIRAM_TYPE_ESPPSRAM64
uint32_t flash_id = g_rom_flashchip.device_id;
if (flash_id == FLASH_ID_GD25LQ32C) {
// Set drive ability for 1.8v flash in 80Mhz.
SET_PERI_REG_BITS(PERIPHS_IO_MUX_SPIHD_U, FUN_DRV, 3, FUN_DRV_S);
SET_PERI_REG_BITS(PERIPHS_IO_MUX_SPIWP_U, FUN_DRV, 3, FUN_DRV_S);
SET_PERI_REG_BITS(PERIPHS_IO_MUX_SPICS0_U, FUN_DRV, 3, FUN_DRV_S);
SET_PERI_REG_BITS(PERIPHS_IO_MUX_SPICLK_U, FUN_DRV, 3, FUN_DRV_S);
SET_PERI_REG_BITS(PERIPHS_IO_MUX_SPIQ_U, FUN_DRV, 3, FUN_DRV_S);
SET_PERI_REG_BITS(PERIPHS_IO_MUX_SPID_U, FUN_DRV, 3, FUN_DRV_S);
}
#endif
}
}
@@ -86,7 +97,7 @@ static void bootloader_reset_mmu(void)
/* normal ROM boot exits with DROM0 cache unmasked,
but serial bootloader exits with it masked. */
REG_CLR_BIT(EXTMEM_PRO_ICACHE_CTRL1_REG, EXTMEM_PRO_ICACHE_MASK_DROM0);
DPORT_REG_CLR_BIT(DPORT_PRO_ICACHE_CTRL1_REG, DPORT_PRO_ICACHE_MASK_DROM0);
}
static void update_flash_config(const esp_image_header_t *bootloader_hdr)
@@ -190,6 +201,7 @@ static void print_flash_info(const esp_image_header_t *bootloader_hdr)
static void IRAM_ATTR bootloader_init_flash_configure(void)
{
bootloader_flash_gpio_config(&bootloader_image_hdr);
bootloader_flash_dummy_config(&bootloader_image_hdr);
bootloader_flash_cs_timing_config();
}
@@ -224,7 +236,7 @@ static void bootloader_init_uart_console(void)
#else // CONFIG_ESP_CONSOLE_UART_NONE
const int uart_num = CONFIG_ESP_CONSOLE_UART_NUM;
uartAttach(NULL);
uartAttach();
ets_install_uart_printf();
// Wait for UART FIFO to be empty.
@@ -239,15 +251,15 @@ static void bootloader_init_uart_console(void)
uart_tx_switch(uart_num);
// If console is attached to UART1 or if non-default pins are used,
// need to reconfigure pins using GPIO matrix
if (uart_num != 0 || uart_tx_gpio != 43 || uart_rx_gpio != 44) {
// Change pin mode UART to GPIO
PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0RXD_U, FUNC_U0RXD_GPIO44);
PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0TXD_U, FUNC_U0TXD_GPIO43);
if (uart_num != 0 || uart_tx_gpio != 1 || uart_rx_gpio != 3) {
// Change pin mode for GPIO1/3 from UART to GPIO
PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0RXD_U, FUNC_U0RXD_GPIO3);
PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0TXD_U, FUNC_U0TXD_GPIO1);
// Route GPIO signals to/from pins
// (arrays should be optimized away by the compiler)
const uint32_t tx_idx_list[2] = {U0TXD_OUT_IDX, U1TXD_OUT_IDX};
const uint32_t rx_idx_list[2] = {U0RXD_IN_IDX, U1RXD_IN_IDX};
const uint32_t uart_reset[2] = {DPORT_UART_RST, DPORT_UART1_RST};
const uint32_t tx_idx_list[3] = {U0TXD_OUT_IDX, U1TXD_OUT_IDX, U2TXD_OUT_IDX};
const uint32_t rx_idx_list[3] = {U0RXD_IN_IDX, U1RXD_IN_IDX, U2RXD_IN_IDX};
const uint32_t uart_reset[3] = {DPORT_UART_RST, DPORT_UART1_RST, DPORT_UART2_RST};
const uint32_t tx_idx = tx_idx_list[uart_num];
const uint32_t rx_idx = rx_idx_list[uart_num];
@@ -317,7 +329,7 @@ static void bootloader_check_wdt_reset(void)
rst_reas[0] = rtc_get_reset_reason(0);
if (rst_reas[0] == RTCWDT_SYS_RESET || rst_reas[0] == TG0WDT_SYS_RESET || rst_reas[0] == TG1WDT_SYS_RESET ||
rst_reas[0] == TG0WDT_CPU_RESET || rst_reas[0] == TG1WDT_CPU_RESET || rst_reas[0] == RTCWDT_CPU_RESET) {
rst_reas[0] == TG0WDT_CPU_RESET || rst_reas[0] == TG1WDT_CPU_RESET || rst_reas[0] == RTCWDT_CPU_RESET) {
ESP_LOGW(TAG, "PRO CPU has been reset by WDT.");
wdt_rst = 1;
}
@@ -330,7 +342,7 @@ static void bootloader_check_wdt_reset(void)
void abort(void)
{
#if !CONFIG_ESP_SYSTEM_PANIC_SILENT_REBOOT
#if !CONFIG_ESP32S2_PANIC_SILENT_REBOOT
ets_printf("abort() was called at PC 0x%08x\r\n", (intptr_t)__builtin_return_address(0) - 3);
#endif
if (esp_cpu_in_ocd_debug_mode()) {
@@ -340,19 +352,11 @@ void abort(void)
}
}
static void bootloader_super_wdt_auto_feed(void)
{
REG_SET_BIT(RTC_CNTL_SWD_CONF_REG, RTC_CNTL_SWD_AUTO_FEED_EN);
}
esp_err_t bootloader_init(void)
{
esp_err_t ret = ESP_OK;
bootloader_super_wdt_auto_feed();
// protect memory region
bootloader_init_mem();
cpu_configure_region_protection();
/* check that static RAM is after the stack */
#ifndef NDEBUG
{

View File

@@ -17,7 +17,7 @@
#include <assert.h>
#include <sys/param.h>
#include "esp32s2/rom/sha.h"
#include "esp32s2beta/rom/sha.h"
static SHA_CTX ctx;

View File

@@ -22,103 +22,69 @@
#include "esp_flash_partitions.h"
#include "esp_secure_boot.h"
#include "esp_log.h"
#include "esp32s2/rom/secure_boot.h"
#include "esp32s2/rom/cache.h"
#include "esp32s2/rom/efuse.h"
#include "esp_efuse.h"
#include "esp_efuse_table.h"
#include "hal/wdt_hal.h"
#include "esp32s2beta/rom/secure_boot.h"
#include "esp32s2beta/rom/cache.h"
#include "esp32s2beta/rom/efuse.h"
static const char *TAG = "flash_encrypt";
/* Static functions for stages of flash encryption */
static esp_err_t initialise_flash_encryption(void);
static esp_err_t encrypt_flash_contents(uint32_t flash_crypt_cnt, bool flash_crypt_wr_dis) __attribute__((unused));
static esp_err_t encrypt_flash_contents(uint32_t flash_crypt_cnt, bool flash_crypt_wr_dis);
static esp_err_t encrypt_bootloader(void);
static esp_err_t encrypt_and_load_partition_table(esp_partition_info_t *partition_table, int *num_partitions);
static esp_err_t encrypt_partition(int index, const esp_partition_info_t *partition);
esp_err_t esp_flash_encrypt_check_and_update(void)
{
uint8_t flash_crypt_wr_dis = 0;
uint32_t flash_crypt_cnt = 0;
// TODO: not clear why this is read from DATA1 and written to PGM_DATA2
uint32_t cnt = REG_GET_FIELD(EFUSE_RD_REPEAT_DATA1_REG, EFUSE_SPI_BOOT_CRYPT_CNT);
ESP_LOGV(TAG, "SPI_BOOT_CRYPT_CNT 0x%x", cnt);
esp_efuse_read_field_blob(ESP_EFUSE_SPI_BOOT_CRYPT_CNT, &flash_crypt_cnt, 3);
esp_efuse_read_field_blob(ESP_EFUSE_WR_DIS_SPI_BOOT_CRYPT_CNT, &flash_crypt_wr_dis, 1);
ESP_LOGV(TAG, "SPI_BOOT_CRYPT_CNT 0x%x", flash_crypt_cnt);
ESP_LOGV(TAG, "EFUSE_WR_DIS_SPI_BOOT_CRYPT_CNT 0x%x", flash_crypt_wr_dis);
bool flash_crypt_wr_dis = false; // TODO: check if CRYPT_CNT is write disabled
_Static_assert(EFUSE_SPI_BOOT_CRYPT_CNT == 0x7, "assuming CRYPT_CNT is only 3 bits wide");
if (__builtin_parity(flash_crypt_cnt) == 1) {
if (cnt == 1 || cnt == 3 || cnt == 7) {
/* Flash is already encrypted */
int left = (flash_crypt_cnt == 1) ? 1 : 0;
if (flash_crypt_wr_dis) {
left = 0; /* can't update FLASH_CRYPT_CNT, no more flashes */
int left;
if (cnt == 7 /* || disabled */) {
left = 0;
} else if (cnt == 3) {
left = 1;
} else {
left = 2;
}
ESP_LOGI(TAG, "flash encryption is enabled (%d plaintext flashes left)", left);
return ESP_OK;
} else {
#ifndef CONFIG_SECURE_FLASH_REQUIRE_ALREADY_ENABLED
}
else {
/* Flash is not encrypted, so encrypt it! */
return encrypt_flash_contents(flash_crypt_cnt, flash_crypt_wr_dis);
#else
ESP_LOGE(TAG, "flash encryption is not enabled, and SECURE_FLASH_REQUIRE_ALREADY_ENABLED "
"is set, refusing to boot.");
return ESP_ERR_INVALID_STATE;
#endif // CONFIG_SECURE_FLASH_REQUIRE_ALREADY_ENABLED
return encrypt_flash_contents(cnt, flash_crypt_wr_dis);
}
}
static bool s_key_dis_read(ets_efuse_block_t block)
static esp_err_t initialise_flash_encryption(void)
{
unsigned key_num = block - ETS_EFUSE_BLOCK_KEY0;
return REG_GET_FIELD(EFUSE_RD_REPEAT_DATA0_REG, EFUSE_RD_DIS) & (EFUSE_RD_DIS_KEY0 << key_num);
}
/* Before first flash encryption pass, need to initialise key & crypto config */
static bool s_key_dis_write(ets_efuse_block_t block)
{
unsigned key_num = block - ETS_EFUSE_BLOCK_KEY0;
return REG_GET_FIELD(EFUSE_RD_WR_DIS_REG, EFUSE_WR_DIS) & (EFUSE_WR_DIS_KEY0 << key_num);
}
/* Find out if a key is already set */
bool has_aes128 = ets_efuse_find_purpose(ETS_EFUSE_KEY_PURPOSE_XTS_AES_128_KEY, NULL);
bool has_aes256_1 = ets_efuse_find_purpose(ETS_EFUSE_KEY_PURPOSE_XTS_AES_256_KEY_1, NULL);
bool has_aes256_2 = ets_efuse_find_purpose(ETS_EFUSE_KEY_PURPOSE_XTS_AES_256_KEY_2, NULL);
static esp_err_t check_and_generate_encryption_keys(void)
{
esp_err_t err = ESP_ERR_INVALID_STATE;
ets_efuse_block_t aes_128_key_block;
ets_efuse_block_t aes_256_key_block_1;
ets_efuse_block_t aes_256_key_block_2;
bool has_aes128 = ets_efuse_find_purpose(ETS_EFUSE_KEY_PURPOSE_XTS_AES_128_KEY, &aes_128_key_block);
bool has_aes256_1 = ets_efuse_find_purpose(ETS_EFUSE_KEY_PURPOSE_XTS_AES_256_KEY_1, &aes_256_key_block_1);
bool has_aes256_2 = ets_efuse_find_purpose(ETS_EFUSE_KEY_PURPOSE_XTS_AES_256_KEY_2, &aes_256_key_block_2);
bool has_key = has_aes128 || (has_aes256_1 && has_aes256_2);
bool dis_write = false;
bool dis_read = false;
// If there are keys set, they must be write and read protected!
if(has_key && has_aes128) {
dis_write = s_key_dis_write(aes_128_key_block);
dis_read = s_key_dis_read(aes_128_key_block);
} else if (has_key && has_aes256_1 && has_aes256_2) {
dis_write = s_key_dis_write(aes_256_key_block_1) && s_key_dis_write(aes_256_key_block_2);
dis_read = s_key_dis_read(aes_256_key_block_1) && s_key_dis_read(aes_256_key_block_2);
}
if (!has_key && (has_aes256_1 || has_aes256_2)) {
ESP_LOGE(TAG, "Invalid efuse key blocks: Both AES-256 key blocks must be set.");
return ESP_ERR_INVALID_STATE;
}
if(has_key && (!dis_read || !dis_write)) {
ESP_LOGE(TAG, "Invalid key state, a key was set but not read and write protected.");
return ESP_ERR_INVALID_STATE;
}
if (has_key) {
ESP_LOGI(TAG, "Using pre-existing key in efuse");
if(!has_key && !dis_write && !dis_read) {
ESP_LOGE(TAG, "TODO: Check key is read & write protected"); // TODO
} else {
ESP_LOGI(TAG, "Generating new flash encryption key...");
#ifdef CONFIG_SECURE_FLASH_ENCRYPTION_AES256
const unsigned BLOCKS_NEEDED = 2;
@@ -136,84 +102,26 @@ static esp_err_t check_and_generate_encryption_keys(void)
}
for(ets_efuse_purpose_t purpose = PURPOSE_START; purpose <= PURPOSE_END; purpose++) {
uint32_t buf[8] = {0};
uint32_t buf[8];
bootloader_fill_random(buf, sizeof(buf));
ets_efuse_block_t block = ets_efuse_find_unused_key_block();
ESP_LOGD(TAG, "Writing ETS_EFUSE_BLOCK_KEY%d with purpose %d",
block - ETS_EFUSE_BLOCK_KEY0, purpose);
/* Note: everything else in this function is deferred as a batch write, but we write the
key (and write protect it) immediately as it's too fiddly to manage unused key blocks, etc.
in bootloader size footprint otherwise. */
bootloader_debug_buffer(buf, sizeof(buf), "Key content");
int r = ets_efuse_write_key(block, purpose, buf, sizeof(buf));
bzero(buf, sizeof(buf));
if (r != 0) {
ESP_LOGE(TAG, "Failed to write efuse block %d with purpose %d. Can't continue.",
block, purpose);
ESP_LOGE(TAG, "Failed to write efuse block %d with purpose %d. Can't continue.");
return ESP_FAIL;
}
/* assuming numbering of esp_efuse_block_t matches ets_efuse_block_t */
_Static_assert((int)EFUSE_BLK_KEY0 == (int)ETS_EFUSE_BLOCK_KEY0, "esp_efuse_block_t doesn't match ets_efuse_block_t");
_Static_assert((int)EFUSE_BLK_KEY1 == (int)ETS_EFUSE_BLOCK_KEY1, "esp_efuse_block_t doesn't match ets_efuse_block_t");
_Static_assert((int)EFUSE_BLK_KEY2 == (int)ETS_EFUSE_BLOCK_KEY2, "esp_efuse_block_t doesn't match ets_efuse_block_t");
_Static_assert((int)EFUSE_BLK_KEY3 == (int)ETS_EFUSE_BLOCK_KEY3, "esp_efuse_block_t doesn't match ets_efuse_block_t");
_Static_assert((int)EFUSE_BLK_KEY4 == (int)ETS_EFUSE_BLOCK_KEY4, "esp_efuse_block_t doesn't match ets_efuse_block_t");
_Static_assert((int)EFUSE_BLK_KEY5 == (int)ETS_EFUSE_BLOCK_KEY5, "esp_efuse_block_t doesn't match ets_efuse_block_t");
// protect this block against reading after key is set (writing is done by ets_efuse_write_key)
err = esp_efuse_set_read_protect(block);
if(err != ESP_OK) {
ESP_LOGE(TAG, "Failed to set read protect to efuse block %d. Can't continue.", block);
return err;
}
}
ESP_LOGD(TAG, "Key generation complete");
return ESP_OK;
} else {
ESP_LOGI(TAG, "Using pre-existing key in efuse");
return ESP_OK;
}
}
static esp_err_t initialise_flash_encryption(void)
{
esp_efuse_batch_write_begin(); /* Batch all efuse writes at the end of this function */
esp_err_t key_state = check_and_generate_encryption_keys();
if(key_state != ESP_OK) {
esp_efuse_batch_write_cancel();
return key_state;
}
#ifndef CONFIG_SECURE_FLASH_UART_BOOTLOADER_ALLOW_ENC
ESP_LOGI(TAG, "Disable UART bootloader encryption...");
esp_efuse_write_field_bit(ESP_EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT);
#else
ESP_LOGW(TAG, "Not disabling UART bootloader encryption");
#endif
ESP_LOGE(TAG, "TODO: burn remaining security protection bits"); // TODO
#ifndef CONFIG_SECURE_FLASH_UART_BOOTLOADER_ALLOW_CACHE
ESP_LOGI(TAG, "Disable UART bootloader cache...");
esp_efuse_write_field_bit(ESP_EFUSE_DIS_DOWNLOAD_DCACHE);
esp_efuse_write_field_bit(ESP_EFUSE_DIS_DOWNLOAD_ICACHE);
#else
ESP_LOGW(TAG, "Not disabling UART bootloader cache - SECURITY COMPROMISED");
#endif
#ifndef CONFIG_SECURE_BOOT_ALLOW_JTAG
ESP_LOGI(TAG, "Disable JTAG...");
esp_efuse_write_field_bit(ESP_EFUSE_HARD_DIS_JTAG);
#else
ESP_LOGW(TAG, "Not disabling JTAG - SECURITY COMPROMISED");
#endif
esp_efuse_write_field_bit(ESP_EFUSE_DIS_BOOT_REMAP);
esp_efuse_write_field_bit(ESP_EFUSE_DIS_LEGACY_SPI_BOOT);
esp_err_t err = esp_efuse_batch_write_commit();
return err;
return ESP_OK;
}
/* Encrypt all flash data that should be encrypted */
@@ -226,7 +134,7 @@ static esp_err_t encrypt_flash_contents(uint32_t spi_boot_crypt_cnt, bool flash_
/* If the last spi_boot_crypt_cnt bit is burned or write-disabled, the
device can't re-encrypt itself. */
if (flash_crypt_wr_dis || spi_boot_crypt_cnt == EFUSE_SPI_BOOT_CRYPT_CNT) {
ESP_LOGE(TAG, "Cannot re-encrypt data SPI_BOOT_CRYPT_CNT 0x%02x write disabled %d", spi_boot_crypt_cnt, flash_crypt_wr_dis);
ESP_LOGE(TAG, "Cannot re-encrypt data (SPI_BOOT_CRYPT_CNT 0x%02x write disabled %d", spi_boot_crypt_cnt, flash_crypt_wr_dis);
return ESP_FAIL;
}
@@ -248,7 +156,10 @@ static esp_err_t encrypt_flash_contents(uint32_t spi_boot_crypt_cnt, bool flash_
return err;
}
/* Now iterate the just-loaded partition table, looking for entries to encrypt */
/* Now iterate the just-loaded partition table, looking for entries to encrypt
*/
/* Go through each partition and encrypt if necessary */
for (int i = 0; i < num_partitions; i++) {
err = encrypt_partition(i, &partition_table[i]);
if (err != ESP_OK) {
@@ -261,17 +172,13 @@ static esp_err_t encrypt_flash_contents(uint32_t spi_boot_crypt_cnt, bool flash_
/* Set least significant 0-bit in spi_boot_crypt_cnt */
int ffs_inv = __builtin_ffs((~spi_boot_crypt_cnt) & 0x7);
/* ffs_inv shouldn't be zero, as zero implies spi_boot_crypt_cnt == 0xFF */
uint32_t new_spi_boot_crypt_cnt = (1 << (ffs_inv - 1));
ESP_LOGD(TAG, "SPI_BOOT_CRYPT_CNT 0x%x -> 0x%x", spi_boot_crypt_cnt, new_spi_boot_crypt_cnt + spi_boot_crypt_cnt);
uint32_t new_spi_boot_crypt_cnt = spi_boot_crypt_cnt + (1 << (ffs_inv - 1));
ESP_LOGD(TAG, "SPI_BOOT_CRYPT_CNT 0x%x -> 0x%x", spi_boot_crypt_cnt, new_spi_boot_crypt_cnt);
esp_efuse_write_field_blob(ESP_EFUSE_SPI_BOOT_CRYPT_CNT, &new_spi_boot_crypt_cnt, 3);
ets_efuse_clear_program_registers();
REG_SET_FIELD(EFUSE_PGM_DATA2_REG, EFUSE_SPI_BOOT_CRYPT_CNT, new_spi_boot_crypt_cnt);
ets_efuse_program(ETS_EFUSE_BLOCK0);
#ifdef CONFIG_SECURE_FLASH_ENCRYPTION_MODE_RELEASE
//Secure SPI boot cnt after its update if needed.
const uint32_t spi_boot_cnt_wr_dis = 1;
ESP_LOGI(TAG, "Write protecting SPI_CRYPT_CNT eFuse");
esp_efuse_write_field_blob(ESP_EFUSE_WR_DIS_SPI_BOOT_CRYPT_CNT, &spi_boot_cnt_wr_dis, 1);
#endif
ESP_LOGI(TAG, "Flash encryption completed");
return ESP_OK;
@@ -284,28 +191,21 @@ static esp_err_t encrypt_bootloader(void)
/* Check for plaintext bootloader (verification will fail if it's already encrypted) */
if (esp_image_verify_bootloader(&image_length) == ESP_OK) {
ESP_LOGD(TAG, "bootloader is plaintext. Encrypting...");
#if CONFIG_SECURE_BOOT_V2_ENABLED
/* The image length obtained from esp_image_verify_bootloader includes the sector boundary padding and the signature block lengths */
if (ESP_BOOTLOADER_OFFSET + image_length > ESP_PARTITION_TABLE_OFFSET) {
ESP_LOGE(TAG, "Bootloader is too large to fit Secure Boot V2 signature sector and partition table (configured offset 0x%x)", ESP_PARTITION_TABLE_OFFSET);
return ESP_ERR_INVALID_SIZE;
}
#endif // CONFIG_SECURE_BOOT_V2_ENABLED
err = esp_flash_encrypt_region(ESP_BOOTLOADER_OFFSET, image_length);
if (err != ESP_OK) {
ESP_LOGE(TAG, "Failed to encrypt bootloader in place: 0x%x", err);
return err;
}
ESP_LOGI(TAG, "bootloader encrypted successfully");
return err;
}
if (esp_secure_boot_enabled()) {
// TODO: anything different for secure boot?
}
}
else {
ESP_LOGW(TAG, "no valid bootloader was found");
return ESP_ERR_NOT_FOUND;
}
return ESP_OK;
}
static esp_err_t encrypt_and_load_partition_table(esp_partition_info_t *partition_table, int *num_partitions)
@@ -332,7 +232,6 @@ static esp_err_t encrypt_and_load_partition_table(esp_partition_info_t *partitio
}
/* Valid partition table loded */
ESP_LOGI(TAG, "partition table encrypted and loaded successfully");
return ESP_OK;
}
@@ -381,13 +280,7 @@ esp_err_t esp_flash_encrypt_region(uint32_t src_addr, size_t data_length)
return ESP_FAIL;
}
wdt_hal_context_t rtc_wdt_ctx = {.inst = WDT_RWDT, .rwdt_dev = &RTCCNTL};
for (size_t i = 0; i < data_length; i += FLASH_SECTOR_SIZE) {
wdt_hal_write_protect_disable(&rtc_wdt_ctx);
wdt_hal_feed(&rtc_wdt_ctx);
wdt_hal_write_protect_enable(&rtc_wdt_ctx);
uint32_t sec_start = i + src_addr;
err = bootloader_flash_read(sec_start, buf, FLASH_SECTOR_SIZE, false);
if (err != ESP_OK) {

View File

@@ -0,0 +1,45 @@
// Copyright 2015-2018 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#include "esp_secure_boot.h"
#include "esp_log.h"
#include "esp32s2beta/rom/secure_boot.h"
static const char *TAG = "secure_boot";
esp_err_t esp_secure_boot_permanently_enable(void)
{
uint8_t hash[32];
if (ets_efuse_secure_boot_enabled())
{
ESP_LOGI(TAG, "secure boot is already enabled, continuing..");
return ESP_OK;
}
ESP_LOGI(TAG, "Verifying bootloader signature...\n");
int r = ets_secure_boot_verify_bootloader(hash, false);
if (r != ESP_OK) {
ESP_LOGE(TAG, "Failed to verify bootloader signature");
return r;
}
ets_efuse_clear_program_registers();
REG_SET_BIT(EFUSE_PGM_DATA3_REG, EFUSE_SECURE_BOOT_EN);
ets_efuse_program(ETS_EFUSE_BLOCK0);
assert(ets_efuse_secure_boot_enabled());
ESP_LOGI(TAG, "Secure boot permanently enabled");
return ESP_OK;
}

View File

@@ -0,0 +1,82 @@
// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#include "sdkconfig.h"
#include "bootloader_flash.h"
#include "bootloader_sha.h"
#include "esp_log.h"
#include "esp_image_format.h"
#include "esp32s2beta/rom/secure_boot.h"
static const char* TAG = "secure_boot";
#define DIGEST_LEN 32
esp_err_t esp_secure_boot_verify_signature(uint32_t src_addr, uint32_t length)
{
ets_secure_boot_key_digests_t trusted_keys = { 0 };
uint8_t digest[DIGEST_LEN];
uint8_t verified_digest[DIGEST_LEN] = { 0 }; /* Note: this function doesn't do any anti-FI checks on this buffer */
const uint8_t *data;
ESP_LOGD(TAG, "verifying signature src_addr 0x%x length 0x%x", src_addr, length);
if ((src_addr + length) % 4096 != 0) {
ESP_LOGE(TAG, "addr 0x%x length 0x%x doesn't end on a sector boundary", src_addr, length);
return ESP_ERR_INVALID_ARG;
}
data = bootloader_mmap(src_addr, length + sizeof(struct ets_secure_boot_sig_block));
if (data == NULL) {
ESP_LOGE(TAG, "bootloader_mmap(0x%x, 0x%x) failed", src_addr, length+sizeof(ets_secure_boot_signature_t));
return ESP_FAIL;
}
// Calculate digest of main image
#ifdef BOOTLOADER_BUILD
bootloader_sha256_handle_t handle = bootloader_sha256_start();
bootloader_sha256_data(handle, data, length);
bootloader_sha256_finish(handle, digest);
#else
/* Use thread-safe esp-idf SHA function */
esp_sha(SHA2_256, data, length, digest);
#endif
int r = ets_secure_boot_read_key_digests(&trusted_keys);
if (r == ETS_OK) {
const ets_secure_boot_signature_t *sig = (const ets_secure_boot_signature_t *)(data + length);
// TODO: calling this function in IDF app context is unsafe
r = ets_secure_boot_verify_signature(sig, digest, &trusted_keys, verified_digest);
}
bootloader_munmap(data);
return (r == ETS_OK) ? ESP_OK : ESP_FAIL;
}
esp_err_t esp_secure_boot_verify_rsa_signature_block(const ets_secure_boot_signature_t *sig_block, const uint8_t *image_digest, uint8_t *verified_digest)
{
ets_secure_boot_key_digests_t trusted_keys;
int r = ets_secure_boot_read_key_digests(&trusted_keys);
if (r != 0) {
ESP_LOGE(TAG, "No trusted key digests were found in efuse!");
} else {
ESP_LOGD(TAG, "Verifying with RSA-PSS...");
// TODO: calling this function in IDF app context is unsafe
r = ets_secure_boot_verify_signature(sig_block, image_digest, &trusted_keys, verified_digest);
}
return (r == 0) ? ESP_OK : ESP_ERR_IMAGE_INVALID;
}

View File

@@ -18,7 +18,6 @@
#include <esp_secure_boot.h>
#include <esp_fault.h>
#include <esp_log.h>
#include <esp_attr.h>
#include <esp_spi_flash.h>
#include <bootloader_flash.h>
#include <bootloader_random.h>
@@ -27,11 +26,11 @@
#include "bootloader_common.h"
#include "soc/soc_memory_layout.h"
#if CONFIG_IDF_TARGET_ESP32
#include "esp32/rom/rtc.h"
#include "esp32/rom/secure_boot.h"
#elif CONFIG_IDF_TARGET_ESP32S2
#include "esp32s2/rom/rtc.h"
#include "esp32s2/rom/secure_boot.h"
#include <esp32/rom/rtc.h>
#include <esp32/rom/secure_boot.h>
#elif CONFIG_IDF_TARGET_ESP32S2BETA
#include <esp32s2beta/rom/rtc.h>
#include <esp32s2beta/rom/secure_boot.h>
#endif
/* Checking signatures as part of verifying images is necessary:
@@ -104,7 +103,7 @@ static esp_err_t image_load(esp_image_load_mode_t mode, const esp_partition_pos_
bool do_verify = (mode == ESP_IMAGE_LOAD) || (mode == ESP_IMAGE_VERIFY) || (mode == ESP_IMAGE_VERIFY_SILENT);
#else
bool do_load = false; // Can't load the image in app mode
bool do_verify = true; // In app mode is available only verify mode
bool do_verify = true; // In app mode is avalible only verify mode
#endif
bool silent = (mode == ESP_IMAGE_VERIFY_SILENT);
esp_err_t err = ESP_OK;
@@ -220,18 +219,8 @@ static esp_err_t image_load(esp_image_load_mode_t mode, const esp_partition_pos_
#ifdef SECURE_BOOT_CHECK_SIGNATURE
// secure boot images have a signature appended
#if defined(BOOTLOADER_BUILD) && !defined(CONFIG_SECURE_BOOT)
// If secure boot is not enabled in hardware, then
// skip the signature check in bootloader when the debugger is attached.
// This is done to allow for breakpoints in Flash.
if (!esp_cpu_in_ocd_debug_mode()) {
#else // CONFIG_SECURE_BOOT
if (true) {
#endif // end checking for JTAG
err = verify_secure_boot_signature(sha_handle, data, image_digest, verified_digest);
sha_handle = NULL; // verify_secure_boot_signature finishes sha_handle
}
#else // SECURE_BOOT_CHECK_SIGNATURE
err = verify_secure_boot_signature(sha_handle, data, image_digest, verified_digest);
#else
// No secure boot, but SHA-256 can be appended for basic corruption detection
if (sha_handle != NULL && !esp_cpu_in_ocd_debug_mode()) {
err = verify_simple_hash(sha_handle, data);
@@ -276,7 +265,7 @@ static esp_err_t image_load(esp_image_load_mode_t mode, const esp_partition_pos_
"only verify signature in bootloader" into the macro so it's tested multiple times.
*/
#if CONFIG_SECURE_BOOT_V2_ENABLED
ESP_FAULT_ASSERT(!esp_secure_boot_enabled() || memcmp(image_digest, verified_digest, HASH_LEN) == 0);
ESP_FAULT_ASSERT(memcmp(image_digest, verified_digest, HASH_LEN) == 0);
#else // Secure Boot V1 on ESP32, only verify signatures for apps not bootloaders
ESP_FAULT_ASSERT(data->start_addr == ESP_BOOTLOADER_OFFSET || memcmp(image_digest, verified_digest, HASH_LEN) == 0);
#endif
@@ -311,7 +300,7 @@ err:
// Prevent invalid/incomplete data leaking out
bzero(data, sizeof(esp_image_metadata_t));
return err;
}
}
esp_err_t bootloader_load_image(const esp_partition_pos_t *part, esp_image_metadata_t *data)
{
@@ -733,7 +722,7 @@ static esp_err_t verify_checksum(bootloader_sha256_handle_t sha_handle, uint32_t
length = (length + 15) & ~15; // Pad to next full 16 byte block
// Verify checksum
WORD_ALIGNED_ATTR uint8_t buf[16];
uint8_t buf[16];
esp_err_t err = bootloader_flash_read(data->start_addr + unpadded_length, buf, length - unpadded_length, true);
uint8_t calc = buf[length - unpadded_length - 1];
uint8_t checksum = (checksum_word >> 24)
@@ -851,21 +840,3 @@ static esp_err_t verify_simple_hash(bootloader_sha256_handle_t sha_handle, esp_i
bootloader_munmap(hash);
return ESP_OK;
}
int esp_image_get_flash_size(esp_image_flash_size_t app_flash_size)
{
switch (app_flash_size) {
case ESP_IMAGE_FLASH_SIZE_1MB:
return 1 * 1024 * 1024;
case ESP_IMAGE_FLASH_SIZE_2MB:
return 2 * 1024 * 1024;
case ESP_IMAGE_FLASH_SIZE_4MB:
return 4 * 1024 * 1024;
case ESP_IMAGE_FLASH_SIZE_8MB:
return 8 * 1024 * 1024;
case ESP_IMAGE_FLASH_SIZE_16MB:
return 16 * 1024 * 1024;
default:
return 0;
}
}

View File

@@ -20,14 +20,6 @@
#include "esp_flash_encrypt.h"
#include "esp_secure_boot.h"
#if CONFIG_IDF_TARGET_ESP32
#define CRYPT_CNT ESP_EFUSE_FLASH_CRYPT_CNT
#define WR_DIS_CRYPT_CNT ESP_EFUSE_WR_DIS_FLASH_CRYPT_CNT
#elif CONFIG_IDF_TARGET_ESP32S2
#define CRYPT_CNT ESP_EFUSE_SPI_BOOT_CRYPT_CNT
#define WR_DIS_CRYPT_CNT ESP_EFUSE_WR_DIS_SPI_BOOT_CRYPT_CNT
#endif
#ifndef BOOTLOADER_BUILD
static const char *TAG = "flash_encrypt";
@@ -41,16 +33,10 @@ void esp_flash_encryption_init_checks()
#ifdef CONFIG_SECURE_FLASH_ENCRYPTION_MODE_RELEASE
#ifdef CONFIG_SECURE_BOOT
if (esp_secure_boot_enabled() && esp_flash_encryption_enabled()) {
bool flash_crypt_cnt_wr_dis = esp_efuse_read_field_bit(WR_DIS_CRYPT_CNT);
uint8_t flash_crypt_cnt_wr_dis = 0;
esp_efuse_read_field_blob(ESP_EFUSE_WR_DIS_FLASH_CRYPT_CNT, &flash_crypt_cnt_wr_dis, 1);
if (!flash_crypt_cnt_wr_dis) {
uint8_t flash_crypt_cnt = 0;
esp_efuse_read_field_blob(CRYPT_CNT, &flash_crypt_cnt, CRYPT_CNT[0]->bit_count);
if (flash_crypt_cnt == (1<<(CRYPT_CNT[0]->bit_count))-1) {
// If encryption counter is already max, no need to write protect it
// (this distinction is important on ESP32 ECO3 where write-procted FLASH_CRYPT_CNT also write-protects UART_DL_DIS)
return;
}
ESP_LOGE(TAG, "Flash encryption & Secure Boot together requires FLASH_CRYPT_CNT efuse to be write protected. Fixing now...");
ESP_EARLY_LOGE(TAG, "Flash encryption & Secure Boot together requires FLASH_CRYPT_CNT efuse to be write protected. Fixing now...");
esp_flash_write_protect_crypt_cnt();
}
}
@@ -62,67 +48,43 @@ void esp_flash_encryption_init_checks()
mode = esp_get_flash_encryption_mode();
if (mode == ESP_FLASH_ENC_MODE_DEVELOPMENT) {
#ifdef CONFIG_SECURE_FLASH_ENCRYPTION_MODE_RELEASE
ESP_LOGE(TAG, "Flash encryption settings error: app is configured for RELEASE but efuses are set for DEVELOPMENT");
ESP_LOGE(TAG, "Mismatch found in security options in bootloader menuconfig and efuse settings. Device is not secure.");
ESP_EARLY_LOGE(TAG, "Flash encryption settings error: app is configured for RELEASE but efuses are set for DEVELOPMENT");
ESP_EARLY_LOGE(TAG, "Mismatch found in security options in bootloader menuconfig and efuse settings. Device is not secure.");
#else
ESP_LOGW(TAG, "Flash encryption mode is DEVELOPMENT (not secure)");
ESP_EARLY_LOGW(TAG, "Flash encryption mode is DEVELOPMENT (not secure)");
#endif
} else if (mode == ESP_FLASH_ENC_MODE_RELEASE) {
ESP_LOGI(TAG, "Flash encryption mode is RELEASE");
ESP_EARLY_LOGI(TAG, "Flash encryption mode is RELEASE");
}
}
#endif
void esp_flash_write_protect_crypt_cnt(void)
{
esp_efuse_write_field_bit(WR_DIS_CRYPT_CNT);
uint8_t flash_crypt_cnt_wr_dis = 0;
esp_efuse_read_field_blob(ESP_EFUSE_WR_DIS_FLASH_CRYPT_CNT, &flash_crypt_cnt_wr_dis, 1);
if (!flash_crypt_cnt_wr_dis) {
esp_efuse_write_field_cnt(ESP_EFUSE_WR_DIS_FLASH_CRYPT_CNT, 1);
}
}
esp_flash_enc_mode_t esp_get_flash_encryption_mode(void)
{
bool flash_crypt_cnt_wr_dis = false;
#if CONFIG_IDF_TARGET_ESP32
uint8_t efuse_flash_crypt_cnt_wr_protected = 0;
uint8_t dis_dl_enc = 0, dis_dl_dec = 0, dis_dl_cache = 0;
#elif CONFIG_IDF_TARGET_ESP32S2
uint8_t dis_dl_enc = 0;
uint8_t dis_dl_icache = 0;
uint8_t dis_dl_dcache = 0;
#endif
esp_flash_enc_mode_t mode = ESP_FLASH_ENC_MODE_DEVELOPMENT;
if (esp_flash_encryption_enabled()) {
/* Check if FLASH CRYPT CNT is write protected */
flash_crypt_cnt_wr_dis = esp_efuse_read_field_bit(WR_DIS_CRYPT_CNT);
if (!flash_crypt_cnt_wr_dis) {
uint8_t flash_crypt_cnt = 0;
esp_efuse_read_field_blob(CRYPT_CNT, &flash_crypt_cnt, CRYPT_CNT[0]->bit_count);
if (flash_crypt_cnt == (1 << (CRYPT_CNT[0]->bit_count)) - 1) {
flash_crypt_cnt_wr_dis = true;
}
}
if (flash_crypt_cnt_wr_dis) {
#if CONFIG_IDF_TARGET_ESP32
dis_dl_cache = esp_efuse_read_field_bit(ESP_EFUSE_DISABLE_DL_CACHE);
dis_dl_enc = esp_efuse_read_field_bit(ESP_EFUSE_DISABLE_DL_ENCRYPT);
dis_dl_dec = esp_efuse_read_field_bit(ESP_EFUSE_DISABLE_DL_DECRYPT);
esp_efuse_read_field_blob(ESP_EFUSE_WR_DIS_FLASH_CRYPT_CNT, &efuse_flash_crypt_cnt_wr_protected, 1);
if (efuse_flash_crypt_cnt_wr_protected) {
esp_efuse_read_field_blob(ESP_EFUSE_DISABLE_DL_CACHE, &dis_dl_cache, 1);
esp_efuse_read_field_blob(ESP_EFUSE_DISABLE_DL_ENCRYPT, &dis_dl_enc, 1);
esp_efuse_read_field_blob(ESP_EFUSE_DISABLE_DL_DECRYPT, &dis_dl_dec, 1);
/* Check if DISABLE_DL_DECRYPT, DISABLE_DL_ENCRYPT & DISABLE_DL_CACHE are set */
if ( dis_dl_cache && dis_dl_enc && dis_dl_dec ) {
mode = ESP_FLASH_ENC_MODE_RELEASE;
}
#elif CONFIG_IDF_TARGET_ESP32S2
dis_dl_enc = esp_efuse_read_field_bit(ESP_EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT);
dis_dl_icache = esp_efuse_read_field_bit(ESP_EFUSE_DIS_DOWNLOAD_ICACHE);
dis_dl_dcache = esp_efuse_read_field_bit(ESP_EFUSE_DIS_DOWNLOAD_DCACHE);
if (dis_dl_enc && dis_dl_icache && dis_dl_dcache) {
mode = ESP_FLASH_ENC_MODE_RELEASE;
}
#endif
}
} else {
mode = ESP_FLASH_ENC_MODE_DISABLED;

View File

@@ -52,7 +52,7 @@ esp_err_t esp_partition_table_verify(const esp_partition_info_t *partition_table
MD5Update(&context, (unsigned char *) partition_table, num_parts * sizeof(esp_partition_info_t));
MD5Final(digest, &context);
unsigned char *md5sum = ((unsigned char *) part) + ESP_PARTITION_MD5_OFFSET;
unsigned char *md5sum = ((unsigned char *) part) + 16; // skip the 2B magic number and the 14B fillup bytes
if (memcmp(md5sum, digest, sizeof(digest)) != 0) {
if (log_errors) {

View File

@@ -13,16 +13,15 @@
// limitations under the License.
#include <stddef.h>
#include <stdint.h>
#include "bootloader_flash_config.h"
#include "flash_qio_mode.h"
#include "esp_log.h"
#include "esp_err.h"
#if CONFIG_IDF_TARGET_ESP32
#include "esp32/rom/spi_flash.h"
#include "esp32/rom/efuse.h"
#elif CONFIG_IDF_TARGET_ESP32S2
#include "esp32s2/rom/spi_flash.h"
#include "esp32s2/rom/efuse.h"
#elif CONFIG_IDF_TARGET_ESP32S2BETA
#include "esp32s2beta/rom/spi_flash.h"
#include "esp32s2beta/rom/efuse.h"
#include "soc/spi_mem_struct.h"
#endif
#include "soc/spi_struct.h"
@@ -34,7 +33,7 @@
/* SPI flash controller */
#if CONFIG_IDF_TARGET_ESP32
#define SPIFLASH SPI1
#elif CONFIG_IDF_TARGET_ESP32S2
#elif CONFIG_IDF_TARGET_ESP32S2BETA
#define SPIFLASH SPIMEM1
#endif
@@ -85,6 +84,12 @@ static unsigned read_status_8b_xmc25qu64a(void);
/* Write 8 bit status of XM25QU64A */
static void write_status_8b_xmc25qu64a(unsigned new_status);
#define ESP32_D2WD_WP_GPIO 7 /* ESP32-D2WD has this GPIO wired to WP pin of flash */
#ifndef CONFIG_BOOTLOADER_SPI_WP_PIN // Set in menuconfig if SPI flasher config is set to a quad mode
#define CONFIG_BOOTLOADER_SPI_WP_PIN ESP32_D2WD_WP_GPIO
#endif
/* Array of known flash chips and data to enable Quad I/O mode
Manufacturer & flash ID can be tested by running "esptool.py
@@ -136,7 +141,7 @@ uint32_t bootloader_read_flash_id(void)
return id;
}
#if CONFIG_IDF_TARGET_ESP32S2
#if CONFIG_IDF_TARGET_ESP32S2BETA
#define FLASH_WRAP_CMD 0x77
typedef enum {
FLASH_WRAP_MODE_8B = 0,
@@ -207,7 +212,7 @@ void bootloader_enable_qio_mode(void)
enable_qio_mode(chip_data[i].read_status_fn,
chip_data[i].write_status_fn,
chip_data[i].status_qio_bit);
#if CONFIG_IDF_TARGET_ESP32S2
#if CONFIG_IDF_TARGET_ESP32S2BETA
spi_flash_wrap_set(FLASH_WRAP_MODE_DISABLE);
#endif
}
@@ -219,6 +224,24 @@ static esp_err_t enable_qio_mode(read_status_fn_t read_status_fn,
uint32_t status;
const uint32_t spiconfig = ets_efuse_get_spiconfig();
#if CONFIG_IDF_TARGET_ESP32
if (spiconfig != EFUSE_SPICONFIG_SPI_DEFAULTS && spiconfig != EFUSE_SPICONFIG_HSPI_DEFAULTS) {
// spiconfig specifies a custom efuse pin configuration. This config defines all pins -except- WP,
// which is compiled into the bootloader instead.
//
// Most commonly an overriden pin mapping means ESP32-D2WD or ESP32-PICOD4.
//Warn if chip is ESP32-D2WD/ESP32-PICOD4 but someone has changed the WP pin
//assignment from that chip's WP pin.
uint32_t pkg_ver = REG_GET_FIELD(EFUSE_BLK0_RDATA3_REG, EFUSE_RD_CHIP_VER_PKG);
if (CONFIG_BOOTLOADER_SPI_WP_PIN != ESP32_D2WD_WP_GPIO &&
(pkg_ver == EFUSE_RD_CHIP_VER_PKG_ESP32D2WDQ5 ||
pkg_ver == EFUSE_RD_CHIP_VER_PKG_ESP32PICOD2 ||
pkg_ver == EFUSE_RD_CHIP_VER_PKG_ESP32PICOD4)) {
ESP_LOGW(TAG, "Chip is ESP32-D2WD/ESP32-PICOD4 but flash WP pin is different value to internal flash");
}
}
#endif
esp_rom_spiflash_wait_idle(&g_rom_flashchip);
status = read_status_fn();
@@ -253,10 +276,13 @@ static esp_err_t enable_qio_mode(read_status_fn_t read_status_fn,
esp_rom_spiflash_config_readmode(mode);
#if CONFIG_IDF_TARGET_ESP32
int wp_pin = bootloader_flash_get_wp_pin();
esp_rom_spiflash_select_qio_pins(wp_pin, spiconfig);
#elif CONFIG_IDF_TARGET_ESP32S2
esp_rom_spiflash_select_qio_pins(ets_efuse_get_wp_pad(), spiconfig);
esp_rom_spiflash_select_qio_pins(CONFIG_BOOTLOADER_SPI_WP_PIN, spiconfig);
#elif CONFIG_IDF_TARGET_ESP32S2BETA
if (ets_efuse_get_wp_pad() <= MAX_PAD_GPIO_NUM) {
esp_rom_spiflash_select_qio_pins(ets_efuse_get_wp_pad(), spiconfig);
} else {
esp_rom_spiflash_select_qio_pins(CONFIG_BOOTLOADER_SPI_WP_PIN, spiconfig);
}
#endif
return ESP_OK;
}
@@ -314,7 +340,7 @@ static uint32_t execute_flash_command(uint8_t command, uint32_t mosi_data, uint8
uint32_t old_ctrl_reg = SPIFLASH.ctrl.val;
#if CONFIG_IDF_TARGET_ESP32
SPIFLASH.ctrl.val = SPI_WP_REG_M; // keep WP high while idle, otherwise leave DIO mode
#elif CONFIG_IDF_TARGET_ESP32S2
#elif CONFIG_IDF_TARGET_ESP32S2BETA
SPIFLASH.ctrl.val = SPI_MEM_WP_REG_M; // keep WP high while idle, otherwise leave DIO mode
#endif
SPIFLASH.user.usr_dummy = 0;
@@ -326,13 +352,13 @@ static uint32_t execute_flash_command(uint8_t command, uint32_t mosi_data, uint8
SPIFLASH.user.usr_miso = miso_len > 0;
#if CONFIG_IDF_TARGET_ESP32
SPIFLASH.miso_dlen.usr_miso_dbitlen = miso_len ? (miso_len - 1) : 0;
#elif CONFIG_IDF_TARGET_ESP32S2
#elif CONFIG_IDF_TARGET_ESP32S2BETA
SPIFLASH.miso_dlen.usr_miso_bit_len = miso_len ? (miso_len - 1) : 0;
#endif
SPIFLASH.user.usr_mosi = mosi_len > 0;
#if CONFIG_IDF_TARGET_ESP32
SPIFLASH.mosi_dlen.usr_mosi_dbitlen = mosi_len ? (mosi_len - 1) : 0;
#elif CONFIG_IDF_TARGET_ESP32S2
#elif CONFIG_IDF_TARGET_ESP32S2BETA
SPIFLASH.mosi_dlen.usr_mosi_bit_len = mosi_len ? (mosi_len - 1) : 0;
#endif
SPIFLASH.data_buf[0] = mosi_data;

View File

@@ -51,5 +51,4 @@ void bootloader_sha256_finish(bootloader_sha256_handle_t handle, uint8_t *digest
}
mbedtls_sha256_free(ctx);
free(handle);
handle = NULL;
}

View File

@@ -27,11 +27,6 @@
#include "mbedtls/ctr_drbg.h"
#include <string.h>
#include <sys/param.h>
#include "esp_secure_boot.h"
#ifdef CONFIG_IDF_TARGET_ESP32S2
#include <esp32s2/rom/secure_boot.h>
#endif
#define DIGEST_LEN 32
@@ -147,26 +142,6 @@ static const char *TAG = "secure_boot_v2";
#define ALIGN_UP(num, align) (((num) + ((align) - 1)) & ~((align) - 1))
#define RSA_KEY_SIZE 384 /* RSA 3072 Bits */
#if CONFIG_IDF_TARGET_ESP32S2
inline static bool digest_matches(const void *trusted, const void *computed)
{
if (trusted == NULL) {
return false;
}
// 'trusted' is probably a pointer to read-only efuse registers,
// which only support word reads. memcmp() cannot be guaranteed
// to do word reads, so we make a local copy here (we know that
// memcpy() will do word operations if it can).
uint8_t __attribute__((aligned(4))) trusted_local[ETS_DIGEST_LEN];
uint8_t __attribute__((aligned(4))) computed_local[ETS_DIGEST_LEN];
memcpy(trusted_local, trusted, ETS_DIGEST_LEN);
memcpy(computed_local, computed, ETS_DIGEST_LEN);
return memcmp(trusted_local, computed_local, ETS_DIGEST_LEN) == 0;
}
#endif /* CONFIG_IDF_TARGET_ESP32S2 */
esp_err_t esp_secure_boot_verify_signature(uint32_t src_addr, uint32_t length)
{
uint8_t digest[DIGEST_LEN] = {0};
@@ -198,48 +173,27 @@ esp_err_t esp_secure_boot_verify_signature(uint32_t src_addr, uint32_t length)
esp_err_t esp_secure_boot_verify_rsa_signature_block(const ets_secure_boot_signature_t *sig_block, const uint8_t *image_digest, uint8_t *verified_digest)
{
uint8_t i = 0;
#if CONFIG_SECURE_BOOT_V2_ENABLED /* Verify key against efuse block */
uint8_t sig_block_key_digest[SECURE_BOOT_NUM_BLOCKS][DIGEST_LEN] = {0};
uint8_t i = 0, efuse_trusted_digest[DIGEST_LEN] = {0}, sig_block_trusted_digest[DIGEST_LEN] = {0};
memcpy(efuse_trusted_digest, (uint8_t *) EFUSE_BLK2_RDATA0_REG, sizeof(efuse_trusted_digest));
/* Note: in IDF verification we don't add any fault injection resistance, as we don't expect this to be called
during boot-time verification. */
memset(verified_digest, 0, DIGEST_LEN);
/* Generating the SHA of the public key components in the signature block */
for (i = 0; i < SECURE_BOOT_NUM_BLOCKS; i++) {
bootloader_sha256_handle_t sig_block_sha;
sig_block_sha = bootloader_sha256_start();
bootloader_sha256_data(sig_block_sha, &sig_block->block[i].key, sizeof(sig_block->block[i].key));
bootloader_sha256_finish(sig_block_sha, (unsigned char *)sig_block_key_digest[i]);
}
bootloader_sha256_handle_t sig_block_sha;
sig_block_sha = bootloader_sha256_start();
bootloader_sha256_data(sig_block_sha, &sig_block->block[0].key, sizeof(sig_block->block[0].key));
bootloader_sha256_finish(sig_block_sha, (unsigned char *)sig_block_trusted_digest);
#if CONFIG_IDF_TARGET_ESP32
uint8_t efuse_trusted_digest[DIGEST_LEN] = {0};
memcpy(efuse_trusted_digest, (uint8_t *) EFUSE_BLK2_RDATA0_REG, sizeof(efuse_trusted_digest));
if (memcmp(efuse_trusted_digest, sig_block_key_digest[0], DIGEST_LEN) != 0) {
const uint8_t zeroes[DIGEST_LEN] = {0};
/* Can't continue if secure boot is enabled, OR if a different digest is already written in efuse BLK2
(If BLK2 is empty and Secure Boot is disabled then we assume that it will be enabled later.)
*/
if (esp_secure_boot_enabled() || memcmp(efuse_trusted_digest, zeroes, DIGEST_LEN) != 0) {
if (memcmp(efuse_trusted_digest, sig_block_trusted_digest, DIGEST_LEN) != 0) {
if (esp_secure_boot_enabled()) {
ESP_LOGE(TAG, "Public key digest in eFuse BLK2 and the signature block don't match.");
return ESP_FAIL;
} else {
ESP_LOGW(TAG, "Public key digest in eFuse BLK2 and the signature block don't match.");
}
}
#elif CONFIG_IDF_TARGET_ESP32S2
bool match = false;
ets_secure_boot_key_digests_t efuse_trusted_digest;
ETS_STATUS r;
r = ets_secure_boot_read_key_digests(&efuse_trusted_digest);
if (r != 0) {
ESP_LOGI(TAG, "Could not read secure boot digests!");
return ESP_FAIL;
}
#endif /* CONFIG_IDF_TARGET_ESP32 */
#endif /* CONFIG_SECURE_BOOT_V2_ENABLED */
ESP_LOGI(TAG, "Verifying with RSA-PSS...");
int ret = 0;
@@ -261,19 +215,6 @@ esp_err_t esp_secure_boot_verify_rsa_signature_block(const ets_secure_boot_signa
}
for (i = 0; i < SECURE_BOOT_NUM_BLOCKS; i++) {
#if CONFIG_IDF_TARGET_ESP32S2
for (uint8_t j = 0; j < SECURE_BOOT_NUM_BLOCKS; j++) {
if (digest_matches(efuse_trusted_digest.key_digests[j], sig_block_key_digest[i])) {
ESP_LOGI(TAG, "eFuse key matches(%d) matches the application key(%d).", j, i);
match = true;
break;
}
}
if (match == false) {
continue; // Skip the public keys whose digests don't match.
}
# endif
const mbedtls_mpi N = { .s = 1,
.n = sizeof(sig_block->block[i].key.n)/sizeof(mbedtls_mpi_uint),
.p = (void *)sig_block->block[i].key.n,
@@ -312,8 +253,8 @@ esp_err_t esp_secure_boot_verify_rsa_signature_block(const ets_secure_boot_signa
goto exit;
}
ret = mbedtls_rsa_rsassa_pss_verify( &pk, mbedtls_ctr_drbg_random, &ctr_drbg, MBEDTLS_RSA_PUBLIC, MBEDTLS_MD_SHA256, DIGEST_LEN,
image_digest, sig_be);
ret = mbedtls_rsa_rsassa_pss_verify( &pk, mbedtls_ctr_drbg_random, &ctr_drbg, MBEDTLS_RSA_PUBLIC, MBEDTLS_MD_SHA256, 32,
sig_block->block[i].image_digest, sig_be);
if (ret != 0) {
ESP_LOGE(TAG, "Failed mbedtls_rsa_rsassa_pss_verify, err: %d", ret);
} else {
@@ -328,10 +269,6 @@ esp_err_t esp_secure_boot_verify_rsa_signature_block(const ets_secure_boot_signa
free(sig_be);
free(buf);
#if CONFIG_IDF_TARGET_ESP32
return (ret != 0) ? ESP_ERR_IMAGE_INVALID: ESP_OK;
#elif CONFIG_IDF_TARGET_ESP32S2
return (ret != 0 || match == false) ? ESP_ERR_IMAGE_INVALID: ESP_OK;
#endif /* CONFIG_IDF_TARGET_ESP32 */
return (!ret) ? ESP_OK : ESP_ERR_IMAGE_INVALID;
}
#endif

View File

@@ -1,3 +1,3 @@
idf_component_register(SRC_DIRS "."
PRIV_INCLUDE_DIRS "."
PRIV_REQUIRES unity bootloader_support app_update)
INCLUDE_DIRS "."
REQUIRES unity bootloader_support app_update)

View File

@@ -33,7 +33,7 @@ TEST_CASE("Verify bootloader image in flash", "[bootloader_support]")
TEST_ASSERT_EQUAL(data.image_len, bootloader_length);
}
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2)
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2BETA)
TEST_CASE("Verify unit test app image", "[bootloader_support]")
{
esp_image_metadata_t data = { 0 };

View File

@@ -47,7 +47,6 @@ if(CONFIG_BT_ENABLED)
host/bluedroid/btc/profile/esp/blufi/include
host/bluedroid/btc/profile/esp/include
host/bluedroid/btc/profile/std/a2dp/include
host/bluedroid/btc/profile/std/hid/include
host/bluedroid/btc/profile/std/include
host/bluedroid/btc/include
host/bluedroid/stack/btm/include
@@ -96,7 +95,6 @@ if(CONFIG_BT_ENABLED)
"host/bluedroid/bta/dm/bta_dm_main.c"
"host/bluedroid/bta/dm/bta_dm_pm.c"
"host/bluedroid/bta/dm/bta_dm_sco.c"
"host/bluedroid/bta/dm/bta_dm_qos.c"
"host/bluedroid/bta/gatt/bta_gatt_common.c"
"host/bluedroid/bta/gatt/bta_gattc_act.c"
"host/bluedroid/bta/gatt/bta_gattc_api.c"
@@ -168,8 +166,6 @@ if(CONFIG_BT_ENABLED)
"host/bluedroid/btc/profile/std/hf_ag/btc_hf_ag.c"
"host/bluedroid/btc/profile/std/hf_client/btc_hf_client.c"
"host/bluedroid/btc/profile/std/hf_client/bta_hf_client_co.c"
"host/bluedroid/btc/profile/std/hid/hidh_api.c"
"host/bluedroid/btc/profile/std/hid/hidh_conn.c"
"host/bluedroid/btc/profile/std/gap/btc_gap_ble.c"
"host/bluedroid/btc/profile/std/gap/btc_gap_bt.c"
"host/bluedroid/btc/profile/std/gap/bta_gap_bt_co.c"
@@ -316,7 +312,6 @@ if(CONFIG_BT_ENABLED)
if(CONFIG_BLE_MESH)
list(APPEND include_dirs
"esp_ble_mesh/mesh_common/include"
"esp_ble_mesh/mesh_common/tinycrypt/include"
"esp_ble_mesh/mesh_core"
"esp_ble_mesh/mesh_core/include"
"esp_ble_mesh/mesh_core/storage"
@@ -341,7 +336,6 @@ if(CONFIG_BT_ENABLED)
"esp_ble_mesh/api/models/esp_ble_mesh_lighting_model_api.c"
"esp_ble_mesh/api/models/esp_ble_mesh_sensor_model_api.c"
"esp_ble_mesh/api/models/esp_ble_mesh_time_scene_model_api.c"
"esp_ble_mesh/btc/btc_ble_mesh_ble.c"
"esp_ble_mesh/btc/btc_ble_mesh_config_model.c"
"esp_ble_mesh/btc/btc_ble_mesh_generic_model.c"
"esp_ble_mesh/btc/btc_ble_mesh_health_model.c"
@@ -349,27 +343,11 @@ if(CONFIG_BT_ENABLED)
"esp_ble_mesh/btc/btc_ble_mesh_prov.c"
"esp_ble_mesh/btc/btc_ble_mesh_sensor_model.c"
"esp_ble_mesh/btc/btc_ble_mesh_time_scene_model.c"
"esp_ble_mesh/mesh_common/tinycrypt/src/aes_decrypt.c"
"esp_ble_mesh/mesh_common/tinycrypt/src/aes_encrypt.c"
"esp_ble_mesh/mesh_common/tinycrypt/src/cbc_mode.c"
"esp_ble_mesh/mesh_common/tinycrypt/src/ccm_mode.c"
"esp_ble_mesh/mesh_common/tinycrypt/src/cmac_mode.c"
"esp_ble_mesh/mesh_common/tinycrypt/src/ctr_mode.c"
"esp_ble_mesh/mesh_common/tinycrypt/src/ctr_prng.c"
"esp_ble_mesh/mesh_common/tinycrypt/src/ecc_dh.c"
"esp_ble_mesh/mesh_common/tinycrypt/src/ecc_dsa.c"
"esp_ble_mesh/mesh_common/tinycrypt/src/ecc_platform_specific.c"
"esp_ble_mesh/mesh_common/tinycrypt/src/ecc.c"
"esp_ble_mesh/mesh_common/tinycrypt/src/hmac_prng.c"
"esp_ble_mesh/mesh_common/tinycrypt/src/hmac.c"
"esp_ble_mesh/mesh_common/tinycrypt/src/sha256.c"
"esp_ble_mesh/mesh_common/tinycrypt/src/utils.c"
"esp_ble_mesh/mesh_common/mesh_aes_encrypt.c"
"esp_ble_mesh/mesh_common/mesh_atomic.c"
"esp_ble_mesh/mesh_common/mesh_buf.c"
"esp_ble_mesh/mesh_common/mesh_common.c"
"esp_ble_mesh/mesh_common/mesh_kernel.c"
"esp_ble_mesh/mesh_common/mesh_mutex.c"
"esp_ble_mesh/mesh_common/mesh_timer.c"
"esp_ble_mesh/mesh_common/mesh_util.c"
"esp_ble_mesh/mesh_core/storage/settings_nvs.c"
"esp_ble_mesh/mesh_core/access.c"
@@ -378,11 +356,9 @@ if(CONFIG_BT_ENABLED)
"esp_ble_mesh/mesh_core/cfg_cli.c"
"esp_ble_mesh/mesh_core/cfg_srv.c"
"esp_ble_mesh/mesh_core/crypto.c"
"esp_ble_mesh/mesh_core/fast_prov.c"
"esp_ble_mesh/mesh_core/friend.c"
"esp_ble_mesh/mesh_core/health_cli.c"
"esp_ble_mesh/mesh_core/health_srv.c"
"esp_ble_mesh/mesh_core/local_operation.c"
"esp_ble_mesh/mesh_core/lpn.c"
"esp_ble_mesh/mesh_core/main.c"
"esp_ble_mesh/mesh_core/net.c"
@@ -391,17 +367,15 @@ if(CONFIG_BT_ENABLED)
"esp_ble_mesh/mesh_core/provisioner_prov.c"
"esp_ble_mesh/mesh_core/proxy_client.c"
"esp_ble_mesh/mesh_core/proxy_server.c"
"esp_ble_mesh/mesh_core/settings_uid.c"
"esp_ble_mesh/mesh_core/settings.c"
"esp_ble_mesh/mesh_core/scan.c"
"esp_ble_mesh/mesh_core/test.c"
"esp_ble_mesh/mesh_core/transport.c"
"esp_ble_mesh/mesh_models/common/device_property.c"
"esp_ble_mesh/mesh_models/client/client_common.c"
"esp_ble_mesh/mesh_models/client/generic_client.c"
"esp_ble_mesh/mesh_models/client/lighting_client.c"
"esp_ble_mesh/mesh_models/client/sensor_client.c"
"esp_ble_mesh/mesh_models/client/time_scene_client.c"
"esp_ble_mesh/mesh_models/server/device_property.c"
"esp_ble_mesh/mesh_models/server/generic_server.c"
"esp_ble_mesh/mesh_models/server/lighting_server.c"
"esp_ble_mesh/mesh_models/server/sensor_server.c"
@@ -560,19 +534,17 @@ if(CONFIG_BT_ENABLED)
endif()
endif()
endif()
# requirements can't depend on config
idf_component_register(SRCS "${srcs}"
INCLUDE_DIRS "${include_dirs}"
PRIV_INCLUDE_DIRS "${priv_include_dirs}"
REQUIRES nvs_flash soc esp_timer
PRIV_REQUIRES esp_ipc)
REQUIRES nvs_flash soc)
if(CONFIG_BT_ENABLED)
target_compile_options(${COMPONENT_LIB} PRIVATE -Wno-implicit-fallthrough -Wno-unused-const-variable)
target_link_libraries(${COMPONENT_LIB} INTERFACE "-L${CMAKE_CURRENT_LIST_DIR}/controller/lib/esp32")
target_link_libraries(${COMPONENT_LIB} INTERFACE "-L${CMAKE_CURRENT_LIST_DIR}/controller/lib")
target_link_libraries(${COMPONENT_LIB} PUBLIC btdm_app)
endif()

View File

@@ -1,5 +1,4 @@
menu "Bluetooth"
visible if IDF_TARGET_ESP32
config BT_ENABLED
bool "Bluetooth"
@@ -79,47 +78,6 @@ menu "Bluetooth"
default 1 if BTDM_CTRL_BR_EDR_SCO_DATA_PATH_PCM
default 0
menuconfig BTDM_CTRL_PCM_ROLE_EDGE_CONFIG
bool "PCM Signal Config (Role and Polar)"
depends on BTDM_CTRL_BR_EDR_SCO_DATA_PATH_PCM
default y
choice BTDM_CTRL_PCM_ROLE
prompt "PCM Role"
depends on BTDM_CTRL_PCM_ROLE_EDGE_CONFIG
help
PCM role can be configured as PCM master or PCM slave
config BTDM_CTRL_PCM_ROLE_MASTER
bool "PCM Master"
config BTDM_CTRL_PCM_ROLE_SLAVE
bool "PCM Slave"
endchoice
choice BTDM_CTRL_PCM_POLAR
prompt "PCM Polar"
depends on BTDM_CTRL_PCM_ROLE_EDGE_CONFIG
help
PCM polarity can be configured as Falling Edge or Rising Edge
config BTDM_CTRL_PCM_POLAR_FALLING_EDGE
bool "Falling Edge"
config BTDM_CTRL_PCM_POLAR_RISING_EDGE
bool "Rising Edge"
endchoice
config BTDM_CTRL_PCM_ROLE_EFF
int
default 0 if BTDM_CTRL_PCM_ROLE_MASTER
default 1 if BTDM_CTRL_PCM_ROLE_SLAVE
default 0
config BTDM_CTRL_PCM_POLAR_EFF
int
default 0 if BTDM_CTRL_PCM_POLAR_FALLING_EDGE
default 1 if BTDM_CTRL_PCM_POLAR_RISING_EDGE
default 0
config BTDM_CTRL_AUTO_LATENCY
bool "Auto latency"
depends on BTDM_CTRL_MODE_BTDM
@@ -133,19 +91,6 @@ menu "Bluetooth"
default BTDM_CTRL_AUTO_LATENCY if BTDM_CTRL_MODE_BTDM
default n
config BTDM_CTRL_LEGACY_AUTH_VENDOR_EVT
bool "Legacy Authentication Vendor Specific Event Enable"
depends on BTDM_CTRL_MODE_BR_EDR_ONLY || BTDM_CTRL_MODE_BTDM
default y
help
To protect from BIAS attack during Legacy authentication,
Legacy authentication Vendor specific event should be enabled
config BTDM_CTRL_LEGACY_AUTH_VENDOR_EVT_EFF
bool
default BTDM_CTRL_LEGACY_AUTH_VENDOR_EVT if BTDM_CTRL_MODE_BR_EDR_ONLY || BTDM_CTRL_MODE_BTDM
default 0
config BTDM_CTRL_BLE_MAX_CONN_EFF
int
@@ -428,6 +373,21 @@ menu "Bluetooth"
If you set `BTDM_BLE_ADV_REPORT_DISCARD_THRSHOLD` to a small value or printf every adv lost event, it
may cause adv packets lost more.
menuconfig BTDM_COEX_BT_OPTIONS
bool "Coexistence Bluetooth Side Options"
depends on ESP32_WIFI_SW_COEXIST_ENABLE
default n
help
Options of Bluetooth Side of WiFi and bluetooth coexistence.
config BTDM_COEX_BLE_ADV_HIGH_PRIORITY
bool "Improve BLE ADV priority for WiFi & BLE coexistence"
depends on BTDM_COEX_BT_OPTIONS
default n
help
Improve BLE ADV coexistence priority to make it better performance.
For example, BLE mesh need to enable this option to improve BLE adv performance.
endmenu
choice BT_HOST
@@ -472,7 +432,6 @@ endmenu
menuconfig BLE_MESH
bool "ESP BLE Mesh Support"
depends on BT_ENABLED
help
This option enables ESP BLE Mesh support. The specific features that are
available may depend on other features that have been enabled in the

View File

@@ -57,7 +57,6 @@
#endif
#if CONFIG_BLE_MESH
#include "btc_ble_mesh_ble.h"
#include "btc_ble_mesh_prov.h"
#include "btc_ble_mesh_health_model.h"
#include "btc_ble_mesh_config_model.h"
@@ -69,7 +68,7 @@
#define BTC_TASK_PINNED_TO_CORE (TASK_PINNED_TO_CORE)
#define BTC_TASK_STACK_SIZE (BT_BTC_TASK_STACK_SIZE + BT_TASK_EXTRA_STACK_SIZE) //by menuconfig
#define BTC_TASK_NAME "BTC_TASK"
#define BTC_TASK_NAME "btcT"
#define BTC_TASK_PRIO (BT_TASK_MAX_PRIORITIES - 6)
osi_thread_t *btc_thread;
@@ -94,9 +93,9 @@ static const btc_func_t profile_tab[BTC_PID_NUM] = {
#endif ///BLE_INCLUDED == TRUE
[BTC_PID_BLE_HID] = {NULL, NULL},
[BTC_PID_SPPLIKE] = {NULL, NULL},
#if (BLUFI_INCLUDED == TRUE)
#if (GATTS_INCLUDED == TRUE)
[BTC_PID_BLUFI] = {btc_blufi_call_handler, btc_blufi_cb_handler },
#endif ///BLUFI_INCLUDED == TRUE
#endif ///GATTS_INCLUDED == TRUE
[BTC_PID_DM_SEC] = {NULL, btc_dm_sec_cb_handler },
#endif
[BTC_PID_ALARM] = {btc_alarm_handler, NULL },
@@ -125,43 +124,18 @@ static const btc_func_t profile_tab[BTC_PID_NUM] = {
#if CONFIG_BLE_MESH
[BTC_PID_PROV] = {btc_ble_mesh_prov_call_handler, btc_ble_mesh_prov_cb_handler },
[BTC_PID_MODEL] = {btc_ble_mesh_model_call_handler, btc_ble_mesh_model_cb_handler },
#if CONFIG_BLE_MESH_HEALTH_CLI
[BTC_PID_HEALTH_CLIENT] = {btc_ble_mesh_health_client_call_handler, btc_ble_mesh_health_client_cb_handler },
#endif /* CONFIG_BLE_MESH_HEALTH_CLI */
#if CONFIG_BLE_MESH_HEALTH_SRV
[BTC_PID_HEALTH_SERVER] = {btc_ble_mesh_health_server_call_handler, btc_ble_mesh_health_server_cb_handler },
#endif /* CONFIG_BLE_MESH_HEALTH_SRV */
#if CONFIG_BLE_MESH_CFG_CLI
[BTC_PID_CONFIG_CLIENT] = {btc_ble_mesh_config_client_call_handler, btc_ble_mesh_config_client_cb_handler },
#endif /* CONFIG_BLE_MESH_CFG_CLI */
[BTC_PID_CONFIG_SERVER] = {NULL, btc_ble_mesh_config_server_cb_handler },
#if CONFIG_BLE_MESH_GENERIC_CLIENT
[BTC_PID_GENERIC_CLIENT] = {btc_ble_mesh_generic_client_call_handler, btc_ble_mesh_generic_client_cb_handler },
#endif /* CONFIG_BLE_MESH_GENERIC_CLIENT */
#if CONFIG_BLE_MESH_LIGHTING_CLIENT
[BTC_PID_LIGHTING_CLIENT] = {btc_ble_mesh_lighting_client_call_handler, btc_ble_mesh_lighting_client_cb_handler },
#endif /* CONFIG_BLE_MESH_LIGHTING_CLIENT */
#if CONFIG_BLE_MESH_SENSOR_CLI
[BTC_PID_SENSOR_CLIENT] = {btc_ble_mesh_sensor_client_call_handler, btc_ble_mesh_sensor_client_cb_handler },
#endif /* CONFIG_BLE_MESH_SENSOR_CLI */
#if CONFIG_BLE_MESH_TIME_SCENE_CLIENT
[BTC_PID_TIME_SCENE_CLIENT] = {btc_ble_mesh_time_scene_client_call_handler, btc_ble_mesh_time_scene_client_cb_handler},
#endif /* CONFIG_BLE_MESH_TIME_SCENE_CLIENT */
#if CONFIG_BLE_MESH_GENERIC_SERVER
[BTC_PID_GENERIC_SERVER] = {NULL, btc_ble_mesh_generic_server_cb_handler },
#endif /* CONFIG_BLE_MESH_GENERIC_SERVER */
#if CONFIG_BLE_MESH_LIGHTING_SERVER
[BTC_PID_LIGHTING_SERVER] = {NULL, btc_ble_mesh_lighting_server_cb_handler },
#endif /* CONFIG_BLE_MESH_LIGHTING_SERVER */
#if CONFIG_BLE_MESH_SENSOR_SERVER
[BTC_PID_SENSOR_SERVER] = {NULL, btc_ble_mesh_sensor_server_cb_handler },
#endif /* CONFIG_BLE_MESH_SENSOR_SERVER */
#if CONFIG_BLE_MESH_TIME_SCENE_SERVER
[BTC_PID_TIME_SCENE_SERVER] = {NULL, btc_ble_mesh_time_scene_server_cb_handler},
#endif /* CONFIG_BLE_MESH_TIME_SCENE_SERVER */
#if CONFIG_BLE_MESH_BLE_COEX_SUPPORT
[BTC_PID_BLE_MESH_BLE_COEX] = {btc_ble_mesh_ble_call_handler, btc_ble_mesh_ble_cb_handler },
#endif /* CONFIG_BLE_MESH_BLE_COEX_SUPPORT */
#endif /* #if CONFIG_BLE_MESH */
};
@@ -211,15 +185,6 @@ static bt_status_t btc_task_post(btc_msg_t *msg, uint32_t timeout)
return BT_STATUS_SUCCESS;
}
/**
* transfer an message to another module in the different task.
* @param msg message
* @param arg paramter
* @param arg_len length of paramter
* @param copy_func deep copy function
* @return BT_STATUS_SUCCESS: success
* others: fail
*/
bt_status_t btc_transfer_context(btc_msg_t *msg, void *arg, int arg_len, btc_arg_deep_copy_t copy_func)
{
btc_msg_t lmsg;
@@ -249,34 +214,6 @@ bt_status_t btc_transfer_context(btc_msg_t *msg, void *arg, int arg_len, btc_arg
}
/**
* transfer an message to another module in tha same task.
* @param msg message
* @param arg paramter
* @return BT_STATUS_SUCCESS: success
* others: fail
*/
bt_status_t btc_inter_profile_call(btc_msg_t *msg, void *arg)
{
if (msg == NULL) {
return BT_STATUS_PARM_INVALID;
}
msg->arg = arg;
switch (msg->sig) {
case BTC_SIG_API_CALL:
profile_tab[msg->pid].btc_call(msg);
break;
case BTC_SIG_API_CB:
profile_tab[msg->pid].btc_cb(msg);
break;
default:
break;
}
return BT_STATUS_SUCCESS;
}
#if BTC_DYNAMIC_MEMORY
static void btc_deinit_mem(void) {
@@ -307,13 +244,12 @@ static void btc_deinit_mem(void) {
osi_free(btc_creat_tab_env_ptr);
btc_creat_tab_env_ptr = NULL;
}
#if (BLUFI_INCLUDED == TRUE)
if (blufi_env_ptr) {
osi_free(blufi_env_ptr);
blufi_env_ptr = NULL;
}
#endif
#endif
#if BTC_HF_CLIENT_INCLUDED == TRUE && HFP_DYNAMIC_MEMORY == TRUE
if (hf_client_local_param_ptr) {
@@ -362,13 +298,12 @@ static bt_status_t btc_init_mem(void) {
goto error_exit;
}
memset((void *)btc_creat_tab_env_ptr, 0, sizeof(esp_btc_creat_tab_t));
#if (BLUFI_INCLUDED == TRUE)
if ((blufi_env_ptr = (tBLUFI_ENV *)osi_malloc(sizeof(tBLUFI_ENV))) == NULL) {
goto error_exit;
}
memset((void *)blufi_env_ptr, 0, sizeof(tBLUFI_ENV));
#endif
#endif
#if BTC_HF_CLIENT_INCLUDED == TRUE && HFP_DYNAMIC_MEMORY == TRUE
if ((hf_client_local_param_ptr = (hf_client_local_param_t *)osi_malloc(sizeof(hf_client_local_param_t))) == NULL) {
@@ -396,9 +331,9 @@ error_exit:;
}
#endif ///BTC_DYNAMIC_MEMORY
bt_status_t btc_init(void)
int btc_init(void)
{
btc_thread = osi_thread_create(BTC_TASK_NAME, BTC_TASK_STACK_SIZE, BTC_TASK_PRIO, BTC_TASK_PINNED_TO_CORE, 2);
btc_thread = osi_thread_create("BTC_TASK", BTC_TASK_STACK_SIZE, BTC_TASK_PRIO, BTC_TASK_PINNED_TO_CORE, 2);
if (btc_thread == NULL) {
return BT_STATUS_NOMEM;
}
@@ -443,8 +378,3 @@ bool btc_check_queue_is_congest(void)
return false;
}
int get_btc_work_queue_size(void)
{
return osi_thread_queue_wait_size(btc_thread, 0);
}

View File

@@ -53,9 +53,7 @@ typedef enum {
BTC_PID_GAP_BLE,
BTC_PID_BLE_HID,
BTC_PID_SPPLIKE,
#if (BLUFI_INCLUDED == TRUE)
BTC_PID_BLUFI,
#endif ///BLUFI_INCLUDED == TRUE
BTC_PID_DM_SEC,
BTC_PID_ALARM,
#if (CLASSIC_BT_INCLUDED == TRUE)
@@ -87,7 +85,6 @@ typedef enum {
BTC_PID_LIGHTING_SERVER,
BTC_PID_SENSOR_SERVER,
BTC_PID_TIME_SCENE_SERVER,
BTC_PID_BLE_MESH_BLE_COEX,
#endif /* CONFIG_BLE_MESH */
BTC_PID_NUM,
} btc_pid_t; //btc profile id
@@ -99,29 +96,10 @@ typedef struct {
typedef void (* btc_arg_deep_copy_t)(btc_msg_t *msg, void *dst, void *src);
/**
* transfer an message to another module in the different task.
* @param msg message
* @param arg paramter
* @param arg_len length of paramter
* @param copy_func deep copy function
* @return BT_STATUS_SUCCESS: success
* others: fail
*/
bt_status_t btc_transfer_context(btc_msg_t *msg, void *arg, int arg_len, btc_arg_deep_copy_t copy_func);
/**
* transfer an message to another module in tha same task.
* @param msg message
* @param arg paramter
* @return BT_STATUS_SUCCESS: success
* others: fail
*/
bt_status_t btc_inter_profile_call(btc_msg_t *msg, void *arg);
bt_status_t btc_init(void);
int btc_init(void);
void btc_deinit(void);
bool btc_check_queue_is_congest(void);
int get_btc_work_queue_size(void);
#endif /* __BTC_TASK_H__ */

View File

@@ -267,7 +267,6 @@ bool config_remove_key(config_t *config, const char *section, const char *key)
assert(config != NULL);
assert(section != NULL);
assert(key != NULL);
bool ret;
section_t *sec = section_find(config, section);
entry_t *entry = entry_find(config, section, key);
@@ -275,12 +274,7 @@ bool config_remove_key(config_t *config, const char *section, const char *key)
return false;
}
ret = list_remove(sec->entries, entry);
if (list_length(sec->entries) == 0) {
OSI_TRACE_DEBUG("%s remove section name:%s",__func__, section);
ret &= config_remove_section(config, section);
}
return ret;
return list_remove(sec->entries, entry);
}
const config_section_node_t *config_section_begin(const config_t *config)

View File

@@ -22,10 +22,6 @@ list_t *list_new(list_free_cb callback);
list_node_t *list_free_node(list_t *list, list_node_t *node);
// similar with list_free_node, this function doesn't free the node data
list_node_t *list_delete_node(list_t *list, list_node_t *node);
// Frees the list. This function accepts NULL as an argument, in which case it
// behaves like a no-op.
void list_free(list_t *list);
@@ -79,9 +75,6 @@ bool list_append(list_t *list, void *data);
bool list_remove(list_t *list, void *data);
// similar with list_remove, but do not free the node data
bool list_delete(list_t *list, void *data);
// Removes all elements in the list. Calling this function will return the list to the
// same state it was in after |list_new|. |list| may not be NULL.
void list_clear(list_t *list);

View File

@@ -186,36 +186,6 @@ bool list_remove(list_t *list, void *data)
return false;
}
bool list_delete(list_t *list, void *data)
{
assert(list != NULL);
assert(data != NULL);
if (list_is_empty(list)) {
return false;
}
if (list->head->data == data) {
list_node_t *next = list_delete_node(list, list->head);
if (list->tail == list->head) {
list->tail = next;
}
list->head = next;
return true;
}
for (list_node_t *prev = list->head, *node = list->head->next; node; prev = node, node = node->next)
if (node->data == data) {
prev->next = list_delete_node(list, node);
if (list->tail == node) {
list->tail = prev;
}
return true;
}
return false;
}
void list_clear(list_t *list)
{
assert(list != NULL);
@@ -281,17 +251,3 @@ list_node_t *list_free_node(list_t *list, list_node_t *node)
return next;
}
// remove the element from list but do not free the node data
list_node_t *list_delete_node(list_t *list, list_node_t *node)
{
assert(list != NULL);
assert(node != NULL);
list_node_t *next = node->next;
osi_free(node);
--list->length;
return next;
}

View File

@@ -9,11 +9,11 @@ COMPONENT_ADD_INCLUDEDIRS := include
LIBS := btdm_app
COMPONENT_ADD_LDFLAGS := -lbt -L $(COMPONENT_PATH)/controller/lib/esp32 \
COMPONENT_ADD_LDFLAGS := -lbt -L $(COMPONENT_PATH)/controller/lib \
$(addprefix -l,$(LIBS))
# re-link program if BT binary libs change
COMPONENT_ADD_LINKER_DEPS := $(patsubst %,$(COMPONENT_PATH)/controller/lib/esp32/lib%.a,$(LIBS))
COMPONENT_ADD_LINKER_DEPS := $(patsubst %,$(COMPONENT_PATH)/controller/lib/lib%.a,$(LIBS))
COMPONENT_SUBMODULES += controller/lib
@@ -45,7 +45,6 @@ COMPONENT_PRIV_INCLUDEDIRS += host/bluedroid/bta/include \
host/bluedroid/btc/profile/std/gatt/include \
host/bluedroid/btc/profile/std/gap/include \
host/bluedroid/btc/profile/std/a2dp/include \
host/bluedroid/btc/profile/std/hid/include \
host/bluedroid/btc/profile/std/include \
host/bluedroid/btc/include \
host/bluedroid/btif/include \
@@ -97,7 +96,6 @@ COMPONENT_SRCDIRS += host/bluedroid/bta/dm \
host/bluedroid/btc/profile/std/spp \
host/bluedroid/btc/profile/std/hf_ag \
host/bluedroid/btc/profile/std/hf_client \
host/bluedroid/btc/profile/std/hid \
host/bluedroid/btc/profile \
host/bluedroid/stack/btm \
host/bluedroid/stack/btu \
@@ -139,7 +137,6 @@ endif
ifdef CONFIG_BLE_MESH
COMPONENT_ADD_INCLUDEDIRS += esp_ble_mesh/mesh_common/include \
esp_ble_mesh/mesh_common/tinycrypt/include \
esp_ble_mesh/mesh_core \
esp_ble_mesh/mesh_core/include \
esp_ble_mesh/mesh_core/storage \
@@ -152,11 +149,9 @@ COMPONENT_ADD_INCLUDEDIRS += esp_ble_mesh/mesh_common/include \
esp_ble_mesh/api
COMPONENT_SRCDIRS += esp_ble_mesh/mesh_common \
esp_ble_mesh/mesh_common/tinycrypt/src \
esp_ble_mesh/mesh_core \
esp_ble_mesh/mesh_core/storage \
esp_ble_mesh/btc \
esp_ble_mesh/mesh_models/common \
esp_ble_mesh/mesh_models/client \
esp_ble_mesh/mesh_models/server \
esp_ble_mesh/api/core \

View File

@@ -174,18 +174,9 @@ struct osi_funcs_t {
int (* _coex_register_bt_cb)(coex_func_cb_t cb);
uint32_t (* _coex_bb_reset_lock)(void);
void (* _coex_bb_reset_unlock)(uint32_t restore);
int (* _coex_schm_register_btdm_callback)(void *callback);
void (* _coex_schm_status_bit_clear)(uint32_t type, uint32_t status);
void (* _coex_schm_status_bit_set)(uint32_t type, uint32_t status);
uint32_t (* _coex_schm_interval_get)(void);
uint8_t (* _coex_schm_curr_period_get)(void);
void *(* _coex_schm_curr_phase_get)(void);
int (* _coex_wifi_channel_get)(uint8_t *primary, uint8_t *secondary);
int (* _coex_register_wifi_channel_change_callback)(void *cb);
uint32_t _magic;
};
typedef void (*workitem_handler_t)(void* arg);
/* External functions or values
************************************************************************
@@ -202,14 +193,13 @@ extern void btdm_controller_disable(void);
extern uint8_t btdm_controller_get_mode(void);
extern const char *btdm_controller_get_compile_version(void);
extern void btdm_rf_bb_init_phase2(void); // shall be called after PHY/RF is enabled
extern int btdm_dispatch_work_to_controller(workitem_handler_t callback, void *arg, bool blocking);
/* Sleep */
extern void btdm_controller_enable_sleep(bool enable);
extern void btdm_controller_set_sleep_mode(uint8_t mode);
extern uint8_t btdm_controller_get_sleep_mode(void);
extern bool btdm_power_state_active(void);
extern void btdm_wakeup_request(void);
extern void btdm_in_wakeup_requesting_set(bool in_wakeup_requesting);
extern void btdm_wakeup_request(bool request_lock);
extern void btdm_wakeup_request_end(void);
/* Low Power Clock */
extern bool btdm_lpclk_select_src(uint32_t sel);
extern bool btdm_lpclk_set_div(uint32_t div);
@@ -225,19 +215,12 @@ extern int bredr_txpwr_get(int *min_power_level, int *max_power_level);
extern void bredr_sco_datapath_set(uint8_t data_path);
extern void btdm_controller_scan_duplicate_list_clear(void);
/* Coexistence */
extern int coex_bt_request(uint32_t event, uint32_t latency, uint32_t duration);
extern int coex_bt_release(uint32_t event);
extern int coex_register_bt_cb(coex_func_cb_t cb);
extern uint32_t coex_bb_reset_lock(void);
extern void coex_bb_reset_unlock(uint32_t restore);
extern int coex_schm_register_btdm_callback(void *callback);
extern void coex_schm_status_bit_clear(uint32_t type, uint32_t status);
extern void coex_schm_status_bit_set(uint32_t type, uint32_t status);
extern uint32_t coex_schm_interval_get(void);
extern uint8_t coex_schm_curr_period_get(void);
extern void * coex_schm_curr_phase_get(void);
extern int coex_wifi_channel_get(uint8_t *primary, uint8_t *secondary);
extern int coex_register_wifi_channel_change_callback(void *cb);
extern int coex_bt_request_wrapper(uint32_t event, uint32_t latency, uint32_t duration);
extern int coex_bt_release_wrapper(uint32_t event);
extern int coex_register_bt_cb_wrapper(coex_func_cb_t cb);
extern uint32_t coex_bb_reset_lock_wrapper(void);
extern void coex_bb_reset_unlock_wrapper(uint32_t restore);
extern void coex_ble_adv_priority_high_set(bool high);
extern char _bss_start_btdm;
extern char _bss_end_btdm;
@@ -299,22 +282,10 @@ static uint32_t IRAM_ATTR btdm_us_2_lpcycles(uint32_t us);
static bool IRAM_ATTR btdm_sleep_check_duration(uint32_t *slot_cnt);
static void btdm_sleep_enter_phase1_wrapper(uint32_t lpcycles);
static void btdm_sleep_enter_phase2_wrapper(void);
static void IRAM_ATTR btdm_sleep_exit_phase1_wrapper(void);
static void btdm_sleep_exit_phase3_wrapper(void);
static bool coex_bt_wakeup_request(void);
static void coex_bt_wakeup_request_end(void);
static int coex_bt_request_wrapper(uint32_t event, uint32_t latency, uint32_t duration);
static int coex_bt_release_wrapper(uint32_t event);
static int coex_register_bt_cb_wrapper(coex_func_cb_t cb);
static uint32_t coex_bb_reset_lock_wrapper(void);
static void coex_bb_reset_unlock_wrapper(uint32_t restore);
static int coex_schm_register_btdm_callback_wrapper(void *callback);
static void coex_schm_status_bit_clear_wrapper(uint32_t type, uint32_t status);
static void coex_schm_status_bit_set_wrapper(uint32_t type, uint32_t status);
static uint32_t coex_schm_interval_get_wrapper(void);
static uint8_t coex_schm_curr_period_get_wrapper(void);
static void * coex_schm_curr_phase_get_wrapper(void);
static int coex_wifi_channel_get_wrapper(uint8_t *primary, uint8_t *secondary);
static int coex_register_wifi_channel_change_callback_wrapper(void *cb);
/* Local variable definition
***************************************************************************
@@ -359,7 +330,7 @@ static const struct osi_funcs_t osi_funcs_ro = {
._btdm_sleep_check_duration = btdm_sleep_check_duration,
._btdm_sleep_enter_phase1 = btdm_sleep_enter_phase1_wrapper,
._btdm_sleep_enter_phase2 = btdm_sleep_enter_phase2_wrapper,
._btdm_sleep_exit_phase1 = NULL,
._btdm_sleep_exit_phase1 = btdm_sleep_exit_phase1_wrapper,
._btdm_sleep_exit_phase2 = NULL,
._btdm_sleep_exit_phase3 = btdm_sleep_exit_phase3_wrapper,
._coex_bt_wakeup_request = coex_bt_wakeup_request,
@@ -369,14 +340,6 @@ static const struct osi_funcs_t osi_funcs_ro = {
._coex_register_bt_cb = coex_register_bt_cb_wrapper,
._coex_bb_reset_lock = coex_bb_reset_lock_wrapper,
._coex_bb_reset_unlock = coex_bb_reset_unlock_wrapper,
._coex_schm_register_btdm_callback = coex_schm_register_btdm_callback_wrapper,
._coex_schm_status_bit_clear = coex_schm_status_bit_clear_wrapper,
._coex_schm_status_bit_set = coex_schm_status_bit_set_wrapper,
._coex_schm_interval_get = coex_schm_interval_get_wrapper,
._coex_schm_curr_period_get = coex_schm_curr_period_get_wrapper,
._coex_schm_curr_phase_get = coex_schm_curr_phase_get_wrapper,
._coex_wifi_channel_get = coex_wifi_channel_get_wrapper,
._coex_register_wifi_channel_change_callback = coex_register_wifi_channel_change_callback_wrapper,
._magic = OSI_MAGIC_VALUE,
};
@@ -424,11 +387,10 @@ static DRAM_ATTR uint8_t btdm_lpcycle_us_frac = 0; // number of fractional bit f
static DRAM_ATTR uint8_t btdm_lpclk_sel;
#endif /* #ifdef CONFIG_BTDM_MODEM_SLEEP_MODE_ORIG */
static DRAM_ATTR QueueHandle_t s_wakeup_req_sem = NULL;
#ifdef CONFIG_PM_ENABLE
static DRAM_ATTR esp_timer_handle_t s_btdm_slp_tmr;
static DRAM_ATTR esp_pm_lock_handle_t s_pm_lock;
static bool s_pm_lock_acquired = true;
static DRAM_ATTR QueueHandle_t s_pm_lock_sem = NULL;
static DRAM_ATTR bool s_btdm_allow_light_sleep;
// pm_lock to prevent light sleep when using main crystal as Bluetooth low power clock
static DRAM_ATTR esp_pm_lock_handle_t s_light_sleep_pm_lock;
@@ -889,10 +851,8 @@ static void btdm_sleep_enter_phase2_wrapper(void)
esp_modem_sleep_enter(MODEM_BLE_MODULE);
esp_modem_sleep_enter(MODEM_CLASSIC_BT_MODULE);
#ifdef CONFIG_PM_ENABLE
if (s_pm_lock_acquired) {
esp_pm_lock_release(s_pm_lock);
s_pm_lock_acquired = false;
}
esp_pm_lock_release(s_pm_lock);
semphr_give_wrapper(s_pm_lock_sem);
#endif
} else if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_EVED) {
esp_modem_sleep_enter(MODEM_BLE_MODULE);
@@ -901,15 +861,17 @@ static void btdm_sleep_enter_phase2_wrapper(void)
}
}
static void btdm_sleep_exit_phase3_wrapper(void)
static void IRAM_ATTR btdm_sleep_exit_phase1_wrapper(void)
{
#ifdef CONFIG_PM_ENABLE
if (!s_pm_lock_acquired) {
s_pm_lock_acquired = true;
if (semphr_take_from_isr_wrapper(s_pm_lock_sem, NULL) == pdTRUE) {
esp_pm_lock_acquire(s_pm_lock);
}
#endif
}
static void btdm_sleep_exit_phase3_wrapper(void)
{
if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_ORIG) {
esp_modem_sleep_exit(MODEM_BLE_MODULE);
esp_modem_sleep_exit(MODEM_CLASSIC_BT_MODULE);
@@ -925,77 +887,45 @@ static void btdm_sleep_exit_phase3_wrapper(void)
}
#ifdef CONFIG_PM_ENABLE
static void btdm_slp_tmr_customer_callback(void * arg)
{
(void)(arg);
if (!s_pm_lock_acquired) {
s_pm_lock_acquired = true;
esp_pm_lock_acquire(s_pm_lock);
}
}
static void IRAM_ATTR btdm_slp_tmr_callback(void *arg)
{
(void)(arg);
btdm_dispatch_work_to_controller(btdm_slp_tmr_customer_callback, NULL, true);
}
#endif
#define BTDM_ASYNC_WAKEUP_REQ_HCI 0
#define BTDM_ASYNC_WAKEUP_REQ_COEX 1
#define BTDM_ASYNC_WAKEUP_REQ_CTRL_DISA 2
#define BTDM_ASYNC_WAKEUP_REQMAX 3
static void btdm_wakeup_request_callback(void * arg)
{
(void)(arg);
#if CONFIG_PM_ENABLE
if (!s_pm_lock_acquired) {
s_pm_lock_acquired = true;
if (semphr_take_wrapper(s_pm_lock_sem, 0) == pdTRUE) {
esp_pm_lock_acquire(s_pm_lock);
}
esp_timer_stop(s_btdm_slp_tmr);
#endif
btdm_wakeup_request();
semphr_give_wrapper(s_wakeup_req_sem);
}
#endif
#define BTDM_ASYNC_WAKEUP_REQ_HCI 0
#define BTDM_ASYNC_WAKEUP_REQ_COEX 1
#define BTDM_ASYNC_WAKEUP_REQMAX 2
static bool async_wakeup_request(int event)
{
bool do_wakeup_request = false;
bool request_lock = false;
switch (event) {
case BTDM_ASYNC_WAKEUP_REQ_HCI:
btdm_in_wakeup_requesting_set(true);
// NO break
case BTDM_ASYNC_WAKEUP_REQ_CTRL_DISA:
if (!btdm_power_state_active()) {
do_wakeup_request = true;
btdm_dispatch_work_to_controller(btdm_wakeup_request_callback, NULL, true);
semphr_take_wrapper(s_wakeup_req_sem, OSI_FUNCS_TIME_BLOCKING);
}
request_lock = true;
break;
case BTDM_ASYNC_WAKEUP_REQ_COEX:
if (!btdm_power_state_active()) {
do_wakeup_request = true;
#if CONFIG_PM_ENABLE
if (!s_pm_lock_acquired) {
s_pm_lock_acquired = true;
esp_pm_lock_acquire(s_pm_lock);
}
esp_timer_stop(s_btdm_slp_tmr);
#endif
btdm_wakeup_request();
}
request_lock = false;
break;
default:
return false;
}
bool do_wakeup_request = false;
if (!btdm_power_state_active()) {
#if CONFIG_PM_ENABLE
if (semphr_take_wrapper(s_pm_lock_sem, 0)) {
esp_pm_lock_acquire(s_pm_lock);
}
esp_timer_stop(s_btdm_slp_tmr);
#endif
do_wakeup_request = true;
btdm_wakeup_request(request_lock);
}
return do_wakeup_request;
}
@@ -1007,7 +937,6 @@ static void async_wakeup_request_end(int event)
request_lock = true;
break;
case BTDM_ASYNC_WAKEUP_REQ_COEX:
case BTDM_ASYNC_WAKEUP_REQ_CTRL_DISA:
request_lock = false;
break;
default:
@@ -1015,7 +944,7 @@ static void async_wakeup_request_end(int event)
}
if (request_lock) {
btdm_in_wakeup_requesting_set(false);
btdm_wakeup_request_end();
}
return;
@@ -1032,117 +961,6 @@ static void coex_bt_wakeup_request_end(void)
return;
}
static int IRAM_ATTR coex_bt_request_wrapper(uint32_t event, uint32_t latency, uint32_t duration)
{
#if CONFIG_SW_COEXIST_ENABLE
return coex_bt_request(event, latency, duration);
#else
return 0;
#endif
}
static int IRAM_ATTR coex_bt_release_wrapper(uint32_t event)
{
#if CONFIG_SW_COEXIST_ENABLE
return coex_bt_release(event);
#else
return 0;
#endif
}
static int coex_register_bt_cb_wrapper(coex_func_cb_t cb)
{
#if CONFIG_SW_COEXIST_ENABLE
return coex_register_bt_cb(cb);
#else
return 0;
#endif
}
static uint32_t IRAM_ATTR coex_bb_reset_lock_wrapper(void)
{
#if CONFIG_SW_COEXIST_ENABLE
return coex_bb_reset_lock();
#else
return 0;
#endif
}
static void IRAM_ATTR coex_bb_reset_unlock_wrapper(uint32_t restore)
{
#if CONFIG_SW_COEXIST_ENABLE
coex_bb_reset_unlock(restore);
#endif
}
static int coex_schm_register_btdm_callback_wrapper(void *callback)
{
#if CONFIG_SW_COEXIST_ENABLE
return coex_schm_register_btdm_callback(callback);
#else
return 0;
#endif
}
static void coex_schm_status_bit_clear_wrapper(uint32_t type, uint32_t status)
{
#if CONFIG_SW_COEXIST_ENABLE
coex_schm_status_bit_clear(type, status);
#endif
}
static void coex_schm_status_bit_set_wrapper(uint32_t type, uint32_t status)
{
#if CONFIG_SW_COEXIST_ENABLE
coex_schm_status_bit_set(type, status);
#endif
}
static uint32_t coex_schm_interval_get_wrapper(void)
{
#if CONFIG_SW_COEXIST_ENABLE
return coex_schm_interval_get();
#else
return 0;
#endif
}
static uint8_t coex_schm_curr_period_get_wrapper(void)
{
#if CONFIG_SW_COEXIST_ENABLE
return coex_schm_curr_period_get();
#else
return 1;
#endif
}
static void * coex_schm_curr_phase_get_wrapper(void)
{
#if CONFIG_SW_COEXIST_ENABLE
return coex_schm_curr_phase_get();
#else
return NULL;
#endif
}
static int coex_wifi_channel_get_wrapper(uint8_t *primary, uint8_t *secondary)
{
#if CONFIG_SW_COEXIST_ENABLE
return coex_wifi_channel_get(primary, secondary);
#else
return -1;
#endif
}
static int coex_register_wifi_channel_change_callback_wrapper(void *cb)
{
#if CONFIG_SW_COEXIST_ENABLE
return coex_register_wifi_channel_change_callback(cb);
#else
return -1;
#endif
}
bool esp_vhci_host_check_send_available(void)
{
return API_vhci_host_check_send_available();
@@ -1150,11 +968,13 @@ bool esp_vhci_host_check_send_available(void)
void esp_vhci_host_send_packet(uint8_t *data, uint16_t len)
{
async_wakeup_request(BTDM_ASYNC_WAKEUP_REQ_HCI);
bool do_wakeup_request = async_wakeup_request(BTDM_ASYNC_WAKEUP_REQ_HCI);
API_vhci_host_send_packet(data, len);
async_wakeup_request_end(BTDM_ASYNC_WAKEUP_REQ_HCI);
if (do_wakeup_request) {
async_wakeup_request_end(BTDM_ASYNC_WAKEUP_REQ_HCI);
}
}
esp_err_t esp_vhci_host_register_callback(const esp_vhci_host_callback_t *callback)
@@ -1323,11 +1143,6 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
esp_err_t err;
uint32_t btdm_cfg_mask = 0;
//if all the bt available memory was already released, cannot initialize bluetooth controller
if (btdm_dram_available_region[0].mode == ESP_BT_MODE_IDLE) {
return ESP_ERR_INVALID_STATE;
}
osi_funcs_p = (struct osi_funcs_t *)malloc_internal_wrapper(sizeof(struct osi_funcs_t));
if (osi_funcs_p == NULL) {
return ESP_ERR_NO_MEM;
@@ -1342,6 +1157,11 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
return ESP_ERR_INVALID_STATE;
}
//if all the bt available memory was already released, cannot initialize bluetooth controller
if (btdm_dram_available_region[0].mode == ESP_BT_MODE_IDLE) {
return ESP_ERR_INVALID_STATE;
}
if (cfg == NULL) {
return ESP_ERR_INVALID_ARG;
}
@@ -1371,12 +1191,6 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
memset(btdm_queue_table, 0, sizeof(btdm_queue_item_t) * BTDM_MAX_QUEUE_NUM);
#endif
s_wakeup_req_sem = semphr_create_wrapper(1, 0);
if (s_wakeup_req_sem == NULL) {
err = ESP_ERR_NO_MEM;
goto error;
}
btdm_controller_mem_init();
periph_module_enable(PERIPH_BT_MODULE);
@@ -1450,7 +1264,11 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
goto error;
}
s_pm_lock_acquired = true;
s_pm_lock_sem = semphr_create_wrapper(1, 0);
if (s_pm_lock_sem == NULL) {
err = ESP_ERR_NO_MEM;
goto error;
}
#endif
btdm_cfg_mask = btdm_config_mask_load();
@@ -1460,6 +1278,12 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
goto error;
}
#ifdef CONFIG_BTDM_COEX_BLE_ADV_HIGH_PRIORITY
coex_ble_adv_priority_high_set(true);
#else
coex_ble_adv_priority_high_set(false);
#endif
btdm_controller_status = ESP_BT_CONTROLLER_STATUS_INITED;
return ESP_OK;
@@ -1480,11 +1304,11 @@ error:
esp_timer_delete(s_btdm_slp_tmr);
s_btdm_slp_tmr = NULL;
}
#endif
if (s_wakeup_req_sem) {
semphr_delete_wrapper(s_wakeup_req_sem);
s_wakeup_req_sem = NULL;
if (s_pm_lock_sem) {
semphr_delete_wrapper(s_pm_lock_sem);
s_pm_lock_sem = NULL;
}
#endif
return err;
}
@@ -1503,13 +1327,14 @@ esp_err_t esp_bt_controller_deinit(void)
esp_pm_lock_delete(s_light_sleep_pm_lock);
s_light_sleep_pm_lock = NULL;
}
esp_pm_lock_delete(s_pm_lock);
s_pm_lock = NULL;
esp_timer_stop(s_btdm_slp_tmr);
esp_timer_delete(s_btdm_slp_tmr);
s_btdm_slp_tmr = NULL;
s_pm_lock_acquired = false;
semphr_delete_wrapper(s_pm_lock_sem);
s_pm_lock_sem = NULL;
#endif
semphr_delete_wrapper(s_wakeup_req_sem);
s_wakeup_req_sem = NULL;
#if CONFIG_SPIRAM_USE_MALLOC
vSemaphoreDelete(btdm_queue_table_mux);
@@ -1528,19 +1353,6 @@ esp_err_t esp_bt_controller_deinit(void)
return ESP_OK;
}
static void bt_shutdown(void)
{
esp_err_t ret = ESP_OK;
ESP_LOGD(BTDM_LOG_TAG, "stop Bluetooth");
ret = esp_bt_controller_disable();
if (ESP_OK != ret) {
ESP_LOGW(BTDM_LOG_TAG, "controller disable ret=%d", ret);
}
return;
}
esp_err_t esp_bt_controller_enable(esp_bt_mode_t mode)
{
int ret;
@@ -1604,10 +1416,6 @@ esp_err_t esp_bt_controller_enable(esp_bt_mode_t mode)
}
btdm_controller_status = ESP_BT_CONTROLLER_STATUS_ENABLED;
ret = esp_register_shutdown_handler(bt_shutdown);
if (ret != ESP_OK) {
ESP_LOGW(BTDM_LOG_TAG, "Register shutdown handler failed, ret = 0x%x", ret);
}
return ESP_OK;
}
@@ -1621,7 +1429,9 @@ esp_err_t esp_bt_controller_disable(void)
// disable modem sleep and wake up from sleep mode
if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_ORIG) {
btdm_controller_enable_sleep(false);
async_wakeup_request(BTDM_ASYNC_WAKEUP_REQ_CTRL_DISA);
if (!btdm_power_state_active()) {
btdm_wakeup_request(false);
}
while (!btdm_power_state_active()) {
ets_delay_us(1000);
}
@@ -1638,7 +1448,6 @@ esp_err_t esp_bt_controller_disable(void)
}
esp_phy_rf_deinit(PHY_BT_MODULE);
btdm_controller_status = ESP_BT_CONTROLLER_STATUS_INITED;
esp_unregister_shutdown_handler(bt_shutdown);
#ifdef CONFIG_PM_ENABLE
if (!s_btdm_allow_light_sleep) {
@@ -1655,6 +1464,7 @@ esp_bt_controller_status_t esp_bt_controller_get_status(void)
return btdm_controller_status;
}
/* extra functions */
esp_err_t esp_ble_tx_power_set(esp_ble_power_type_t power_type, esp_power_level_t power_level)
{
@@ -1741,6 +1551,26 @@ esp_err_t esp_bt_sleep_disable (void)
return status;
}
bool esp_bt_controller_is_sleeping(void)
{
if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED ||
btdm_controller_get_sleep_mode() != BTDM_MODEM_SLEEP_MODE_ORIG) {
return false;
}
return !btdm_power_state_active();
}
void esp_bt_controller_wakeup_request(void)
{
if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED ||
btdm_controller_get_sleep_mode() != BTDM_MODEM_SLEEP_MODE_ORIG) {
return;
}
btdm_wakeup_request(false);
}
esp_err_t esp_bredr_sco_datapath_set(esp_sco_data_path_t data_path)
{
if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {

View File

@@ -9,8 +9,8 @@ if BLE_MESH
config BLE_MESH_USE_DUPLICATE_SCAN
bool "Support Duplicate Scan in BLE Mesh"
depends on BT_BLUEDROID_ENABLED
select BTDM_BLE_SCAN_DUPL
select BTDM_BLE_MESH_SCAN_DUPL_EN
select BLE_SCAN_DUPLICATE
select BLE_MESH_SCAN_DUPLICATE_EN
default y
help
Enable this option to allow using specific duplicate scan filter
@@ -18,118 +18,12 @@ if BLE_MESH
option in the Bluetooth Controller section in menuconfig, which is
"Scan Duplicate By Device Address and Advertising Data".
choice BLE_MESH_MEM_ALLOC_MODE
prompt "Memory allocation strategy"
default BLE_MESH_MEM_ALLOC_MODE_INTERNAL
help
Allocation strategy for BLE Mesh stack, essentially provides ability to
allocate all required dynamic allocations from,
- Internal DRAM memory only
- External SPIRAM memory only
- Either internal or external memory based on default malloc()
behavior in ESP-IDF
- Internal IRAM memory wherever applicable else internal DRAM
Recommended mode here is always internal, since that is most preferred
from security perspective. But if application requirement does not allow
sufficient free internal memory then alternate mode can be selected.
config BLE_MESH_MEM_ALLOC_MODE_INTERNAL
bool "Internal DRAM"
config BLE_MESH_MEM_ALLOC_MODE_EXTERNAL
bool "External SPIRAM"
depends on ESP32_SPIRAM_SUPPORT
config BLE_MESH_MEM_ALLOC_MODE_DEFAULT
bool "Default alloc mode"
depends on ESP32_SPIRAM_SUPPORT
help
Enable this option to use the default memory allocation strategy when
external SPIRAM is enabled. See the SPIRAM options for more details.
config BLE_MESH_MEM_ALLOC_MODE_IRAM_8BIT
bool "Internal IRAM"
depends on ESP32_IRAM_AS_8BIT_ACCESSIBLE_MEMORY
help
Allows to use IRAM memory region as 8bit accessible region. Every
unaligned (8bit or 16bit) access will result in an exception and
incur penalty of certain clock cycles per unaligned read/write.
endchoice # BLE_MESH_MEM_ALLOC_MODE
config BLE_MESH_FREERTOS_STATIC_ALLOC
bool "Enable FreeRTOS static allocation"
depends on FREERTOS_SUPPORT_STATIC_ALLOCATION && (ESP32_SPIRAM_SUPPORT || ESP32_IRAM_AS_8BIT_ACCESSIBLE_MEMORY)
config BLE_MESH_ALLOC_FROM_PSRAM_FIRST
bool "BLE Mesh will first allocate memory from PSRAM"
default n
help
Enable this option to use FreeRTOS static allocation APIs for BLE Mesh,
which provides the ability to use different dynamic memory (i.e. SPIRAM
or IRAM) for FreeRTOS objects.
If this option is disabled, the FreeRTOS static allocation APIs will not
be used, and internal DRAM will be allocated for FreeRTOS objects.
choice BLE_MESH_FREERTOS_STATIC_ALLOC_MODE
prompt "Memory allocation for FreeRTOS objects"
depends on BLE_MESH_FREERTOS_STATIC_ALLOC
help
Choose the memory to be used for FreeRTOS objects.
config BLE_MESH_FREERTOS_STATIC_ALLOC_EXTERNAL
bool "External SPIRAM"
depends on ESP32_SPIRAM_SUPPORT
help
If enabled, BLE Mesh allocates dynamic memory from external SPIRAM for
FreeRTOS objects, i.e. mutex, queue, and task stack. External SPIRAM
can only be used for task stack when SPIRAM_ALLOW_STACK_EXTERNAL_MEMORY
is enabled. See the SPIRAM options for more details.
config BLE_MESH_FREERTOS_STATIC_ALLOC_IRAM_8BIT
bool "Internal IRAM"
depends on ESP32_IRAM_AS_8BIT_ACCESSIBLE_MEMORY
help
If enabled, BLE Mesh allocates dynamic memory from internal IRAM for
FreeRTOS objects, i.e. mutex, queue. Note: IRAM region cannot be used
as task stack.
endchoice # BLE_MESH_FREERTOS_STATIC_ALLOC_MODE
config BLE_MESH_DEINIT
bool "Support de-initialize BLE Mesh stack"
default y
help
If enabled, users can use the function esp_ble_mesh_deinit() to de-initialize
the whole BLE Mesh stack.
menu "BLE Mesh and BLE coexistence support"
config BLE_MESH_SUPPORT_BLE_ADV
bool "Support sending normal BLE advertising packets"
default n
help
When selected, users can send normal BLE advertising packets
with specific API.
if BLE_MESH_SUPPORT_BLE_ADV
config BLE_MESH_BLE_ADV_BUF_COUNT
int "Number of advertising buffers for BLE advertising packets"
default 3
range 1 255
help
Number of advertising buffers for BLE packets available.
endif # BLE_MESH_SUPPORT_BLE_ADV
config BLE_MESH_SUPPORT_BLE_SCAN
bool "Support scanning normal BLE advertising packets"
default n
help
When selected, users can register a callback and receive normal BLE
advertising packets in the application layer.
endmenu # BLE Mesh and BLE coexistence support
When this option is enabled, BLE Mesh stack will try to allocate memory
from PSRAM firstly. This will save the internal RAM if PSRAM exists.
config BLE_MESH_FAST_PROV
bool "Enable BLE Mesh Fast Provisioning"
@@ -162,7 +56,7 @@ if BLE_MESH
config BLE_MESH_WAIT_FOR_PROV_MAX_DEV_NUM
int "Maximum number of unprovisioned devices that can be added to device queue"
default 10
default 20
range 1 100
help
This option specifies how many unprovisioned devices can be added to device
@@ -170,9 +64,20 @@ if BLE_MESH
queue in the bottom layer which is used to store unprovisioned device
information (e.g. Device UUID, address).
config BLE_MESH_MAX_STORED_NODES
int "Maximum number of nodes whose information can be stored"
default 20
range BLE_MESH_MAX_PROV_NODES 1000
help
This option specifies the maximum number of nodes whose information can be
stored by a Provisioner in its upper layer.
Users can change this value according to the number of nodes whose information
(e.g. Device UUID, unicast address, element number) are going to be stored by
a Provisioner. And the nodes include the provisioned ones and user-added ones.
config BLE_MESH_MAX_PROV_NODES
int "Maximum number of devices that can be provisioned by Provisioner"
default 10
default 20
range 1 1000
help
This option specifies how many devices can be provisioned by a Provisioner.
@@ -224,28 +129,6 @@ if BLE_MESH
This option specifies how many application keys the Provisioner can have.
Indeed, this value decides the number of the application keys which can be added by a Provisioner.
config BLE_MESH_PROVISIONER_RECV_HB
bool "Support receiving Heartbeat messages"
default n
help
When this option is enabled, Provisioner can call specific functions to enable
or disable receiving Heartbeat messages and notify them to the application layer.
if BLE_MESH_PROVISIONER_RECV_HB
config BLE_MESH_PROVISIONER_RECV_HB_FILTER_SIZE
int "Maximum number of filter entries for receiving Heartbeat messages"
default 3
range 1 1000
help
This option specifies how many heartbeat filter entries Provisioner supports.
The heartbeat filter (acceptlist or rejectlist) entries are used to store a
list of SRC and DST which can be used to decide if a heartbeat message will
be processed and notified to the application layer by Provisioner.
Note: The filter is an empty rejectlist by default.
endif # BLE_MESH_PROVISIONER_RECV_HB
endif # BLE_MESH_PROVISIONER
# Virtual option enabled whenever Generic Provisioning layer is needed
@@ -327,7 +210,7 @@ if BLE_MESH
advertising bearer.
config BLE_MESH_NET_BUF_POOL_USAGE
bool
bool "BLE Mesh net buffer pool usage tracking"
default y
help
Enable BLE Mesh net buffer pool tracking. This option is used to introduce another
@@ -349,6 +232,28 @@ if BLE_MESH
if BLE_MESH_SETTINGS
config BLE_MESH_SPECIFIC_PARTITION
bool "Use a specific NVS partition for BLE Mesh"
default n
help
When selected, the mesh stack will use a specified NVS partition instead of
default NVS partition. Note that the specified partition must be registered
with NVS using nvs_flash_init_partition() API, and the partition must exists
in the csv file.
When Provisioner needs to store a large amount of nodes' information in the
flash (e.g. more than 20), this option is recommended to be enabled.
if BLE_MESH_SPECIFIC_PARTITION
config BLE_MESH_PARTITION_NAME
string "Name of the NVS partition for BLE Mesh"
default "ble_mesh"
help
This value defines the name of the specified NVS partition used by the
mesh stack.
endif # BLE_MESH_SPECIFIC_PARTITION
config BLE_MESH_STORE_TIMEOUT
int "Delay (in seconds) before storing anything persistently"
range 0 1000000
@@ -363,7 +268,7 @@ if BLE_MESH
config BLE_MESH_SEQ_STORE_RATE
int "How often the sequence number gets updated in storage"
range 0 1000000
default 0
default 6
help
This value defines how often the local sequence number gets updated in
persistent storage (i.e. flash). e.g. a value of 100 means that the
@@ -378,7 +283,7 @@ if BLE_MESH
config BLE_MESH_RPL_STORE_TIMEOUT
int "Minimum frequency that the RPL gets updated in storage"
range 0 1000000
default 0
default 5
help
This value defines in seconds how soon the RPL (Replay Protection List)
gets written to persistent storage after a change occurs. If the node
@@ -391,73 +296,6 @@ if BLE_MESH
introduce message replay attacks and system security will be in a
vulnerable state.
config BLE_MESH_SETTINGS_BACKWARD_COMPATIBILITY
bool "A specific option for settings backward compatibility"
depends on BLE_MESH_NODE
default n
help
This option is created to solve the issue of failure in recovering
node information after mesh stack updates. In the old version mesh
stack, there is no key of "mesh/role" in nvs. In the new version
mesh stack, key of "mesh/role" is added in nvs, recovering node
information needs to check "mesh/role" key in nvs and implements
selective recovery of mesh node information. Therefore, there may
be failure in recovering node information during node restarting
after OTA.
The new version mesh stack adds the option of "mesh/role" because
we have added the support of storing Provisioner information, while
the old version only supports storing node information.
If users are updating their nodes from old version to new version,
we recommend enabling this option, so that system could set the flag
in advance before recovering node information and make sure the node
information recovering could work as expected.
config BLE_MESH_SPECIFIC_PARTITION
bool "Use a specific NVS partition for BLE Mesh"
default n
help
When selected, the mesh stack will use a specified NVS partition instead of
default NVS partition. Note that the specified partition must be registered
with NVS using nvs_flash_init_partition() API, and the partition must exists
in the csv file.
When Provisioner needs to store a large amount of nodes' information in the
flash (e.g. more than 20), this option is recommended to be enabled.
config BLE_MESH_PARTITION_NAME
string "Name of the NVS partition for BLE Mesh"
depends on BLE_MESH_SPECIFIC_PARTITION
default "ble_mesh"
help
This value defines the name of the specified NVS partition used by the
mesh stack.
config BLE_MESH_USE_MULTIPLE_NAMESPACE
bool "Support using multiple NVS namespaces by Provisioner"
depends on BLE_MESH_PROVISIONER
default n
help
When selected, Provisioner can use different NVS namespaces to store
different instances of mesh information.
For example, if in the first room, Provisioner uses NetKey A, AppKey
A and provisions three devices, these information will be treated as
mesh information instance A. When the Provisioner moves to the second
room, it uses NetKey B, AppKey B and provisions two devices, then the
information will be treated as mesh information instance B.
Here instance A and instance B will be stored in different namespaces.
With this option enabled, Provisioner needs to use specific functions
to open the corresponding NVS namespace, restore the mesh information,
release the mesh information or erase the mesh information.
config BLE_MESH_MAX_NVS_NAMESPACE
int "Maximum number of NVS namespaces"
depends on BLE_MESH_USE_MULTIPLE_NAMESPACE
default 2
range 1 255
help
This option specifies the maximum NVS namespaces supported by Provisioner.
endif # if BLE_MESH_SETTINGS
config BLE_MESH_SUBNET_COUNT
@@ -510,11 +348,6 @@ if BLE_MESH
The replay protection list is used to prevent a node from replay attack,
which will store the source address and sequence number of the received
mesh messages.
For Provisioner, the replay protection list size should not be smaller than
the maximum number of nodes whose information can be stored. And the element
number of each node should also be taken into consideration. For example, if
Provisioner can provision up to 20 nodes and each node contains two elements,
then the replay protection list size of Provisioner should be at least 40.
config BLE_MESH_MSG_CACHE_SIZE
int "Network message cache size"
@@ -539,6 +372,24 @@ if BLE_MESH
SDU size is 60 bytes, which leaves 56 bytes for application layer data
using a 4-byte MIC, or 52 bytes using an 8-byte MIC.
config BLE_MESH_SUPPORT_BLE_ADV
bool "Support sending normal BLE advertising packets"
default n
help
When selected, users can send normal BLE advertising packets
with specific API.
if BLE_MESH_SUPPORT_BLE_ADV
config BLE_MESH_BLE_ADV_BUF_COUNT
int "Number of advertising buffers for BLE advertising packets"
default 3
range 1 255
help
Number of advertising buffers for BLE packets available.
endif # BLE_MESH_SUPPORT_BLE_ADV
config BLE_MESH_IVU_DIVIDER
int "Divider for IV Update state refresh timer"
default 4
@@ -933,138 +784,104 @@ if BLE_MESH
uses 0 as the timeout value when sending acknowledged messages, then
the default value will be used which is four seconds.
menu "Support for BLE Mesh Foundation models"
menu "Support for BLE Mesh Client Models"
config BLE_MESH_CFG_CLI
bool "Configuration Client model"
bool "Configuration Client Model"
help
Enable support for Configuration Client model.
Enable support for Configuration client model.
config BLE_MESH_HEALTH_CLI
bool "Health Client model"
bool "Health Client Model"
help
Enable support for Health Client model.
config BLE_MESH_HEALTH_SRV
bool "Health Server model"
default y
help
Enable support for Health Server model.
endmenu #Support for BLE Mesh Foundation models
menu "Support for BLE Mesh Client/Server models"
Enable support for Health client model.
config BLE_MESH_GENERIC_ONOFF_CLI
bool "Generic OnOff Client model"
bool "Generic OnOff Client Model"
help
Enable support for Generic OnOff Client model.
Enable support for Generic OnOff client model.
config BLE_MESH_GENERIC_LEVEL_CLI
bool "Generic Level Client model"
bool "Generic Level Client Model"
help
Enable support for Generic Level Client model.
Enable support for Generic Level client model.
config BLE_MESH_GENERIC_DEF_TRANS_TIME_CLI
bool "Generic Default Transition Time Client model"
bool "Generic Default Transition Time Client Model"
help
Enable support for Generic Default Transition Time Client model.
Enable support for Generic Default Transition Time client model.
config BLE_MESH_GENERIC_POWER_ONOFF_CLI
bool "Generic Power OnOff Client model"
bool "Generic Power Onoff Client Model"
help
Enable support for Generic Power OnOff Client model.
Enable support for Generic Power Onoff client model.
config BLE_MESH_GENERIC_POWER_LEVEL_CLI
bool "Generic Power Level Client model"
bool "Generic Power Level Client Model"
help
Enable support for Generic Power Level Client model.
Enable support for Generic Power Level client model.
config BLE_MESH_GENERIC_BATTERY_CLI
bool "Generic Battery Client model"
bool "Generic Battery Client Model"
help
Enable support for Generic Battery Client model.
Enable support for Generic Battery client model.
config BLE_MESH_GENERIC_LOCATION_CLI
bool "Generic Location Client model"
bool "Generic Location Client Model"
help
Enable support for Generic Location Client model.
Enable support for Generic Location client model.
config BLE_MESH_GENERIC_PROPERTY_CLI
bool "Generic Property Client model"
bool "Generic Property Client Model"
help
Enable support for Generic Property Client model.
Enable support for Generic Property client model.
config BLE_MESH_SENSOR_CLI
bool "Sensor Client model"
bool "Sensor Client Model"
help
Enable support for Sensor Client model.
Enable support for Sensor client model.
config BLE_MESH_TIME_CLI
bool "Time Client model"
bool "Time Client Model"
help
Enable support for Time Client model.
Enable support for Time client model.
config BLE_MESH_SCENE_CLI
bool "Scene Client model"
bool "Scene Client Model"
help
Enable support for Scene Client model.
Enable support for Scene client model.
config BLE_MESH_SCHEDULER_CLI
bool "Scheduler Client model"
bool "Scheduler Client Model"
help
Enable support for Scheduler Client model.
Enable support for Scheduler client model.
config BLE_MESH_LIGHT_LIGHTNESS_CLI
bool "Light Lightness Client model"
bool "Light Lightness Client Model"
help
Enable support for Light Lightness Client model.
Enable support for Light Lightness client model.
config BLE_MESH_LIGHT_CTL_CLI
bool "Light CTL Client model"
bool "Light CTL Client Model"
help
Enable support for Light CTL Client model.
Enable support for Light CTL client model.
config BLE_MESH_LIGHT_HSL_CLI
bool "Light HSL Client model"
bool "Light HSL Client Model"
help
Enable support for Light HSL Client model.
Enable support for Light HSL client model.
config BLE_MESH_LIGHT_XYL_CLI
bool "Light XYL Client model"
bool "Light XYL Client Model"
help
Enable support for Light XYL Client model.
Enable support for Light XYL client model.
config BLE_MESH_LIGHT_LC_CLI
bool "Light LC Client model"
bool "Light LC Client Model"
help
Enable support for Light LC Client model.
Enable support for Light LC client model.
config BLE_MESH_GENERIC_SERVER
bool "Generic server models"
default y
help
Enable support for Generic server models.
config BLE_MESH_SENSOR_SERVER
bool "Sensor server models"
default y
help
Enable support for Sensor server models.
config BLE_MESH_TIME_SCENE_SERVER
bool "Time and Scenes server models"
default y
help
Enable support for Time and Scenes server models.
config BLE_MESH_LIGHTING_SERVER
bool "Lighting server models"
default y
help
Enable support for Lighting server models.
endmenu #Support for BLE Mesh Client/Server models
endmenu
config BLE_MESH_IV_UPDATE_TEST
bool "Test the IV Update Procedure"
@@ -1098,7 +915,7 @@ if BLE_MESH
bool "Use white list to filter mesh advertising packets"
default n
help
With this option enabled, users can use white list to filter mesh
With this option enabled, users can use whilte list to filter mesh
advertising packets while scanning.
endif # BLE_MESH_SELF_TEST

View File

@@ -1,4 +1,4 @@
// Copyright 2017-2020 Espressif Systems (Shanghai) PTE LTD
// Copyright 2017-2019 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
@@ -15,25 +15,19 @@
#include <stdint.h>
#include <string.h>
#include "btc/btc_manage.h"
#include "esp_err.h"
#include "btc_ble_mesh_ble.h"
#include "esp_ble_mesh_ble_api.h"
#if CONFIG_BLE_MESH_BLE_COEX_SUPPORT
esp_err_t esp_ble_mesh_register_ble_callback(esp_ble_mesh_ble_cb_t callback)
{
ESP_BLE_HOST_STATUS_CHECK(ESP_BLE_HOST_STATUS_ENABLED);
return (btc_profile_cb_set(BTC_PID_BLE_MESH_BLE_COEX, callback) == 0 ? ESP_OK : ESP_FAIL);
}
#endif /* CONFIG_BLE_MESH_BLE_COEX_SUPPORT */
#include "btc_ble_mesh_prov.h"
#include "esp_ble_mesh_defs.h"
#if CONFIG_BLE_MESH_SUPPORT_BLE_ADV
esp_err_t esp_ble_mesh_start_ble_advertising(const esp_ble_mesh_ble_adv_param_t *param,
const esp_ble_mesh_ble_adv_data_t *data)
{
btc_ble_mesh_ble_args_t arg = {0};
btc_ble_mesh_prov_args_t arg = {0};
btc_msg_t msg = {0};
if (param == NULL) {
@@ -43,21 +37,21 @@ esp_err_t esp_ble_mesh_start_ble_advertising(const esp_ble_mesh_ble_adv_param_t
ESP_BLE_HOST_STATUS_CHECK(ESP_BLE_HOST_STATUS_ENABLED);
msg.sig = BTC_SIG_API_CALL;
msg.pid = BTC_PID_BLE_MESH_BLE_COEX;
msg.act = BTC_BLE_MESH_ACT_START_BLE_ADV;
msg.pid = BTC_PID_PROV;
msg.act = BTC_BLE_MESH_ACT_START_BLE_ADVERTISING;
memcpy(&arg.start_ble_adv.param, param, sizeof(esp_ble_mesh_ble_adv_param_t));
memcpy(&arg.start_ble_advertising.param, param, sizeof(esp_ble_mesh_ble_adv_param_t));
if (data) {
memcpy(&arg.start_ble_adv.data, data, sizeof(esp_ble_mesh_ble_adv_data_t));
memcpy(&arg.start_ble_advertising.data, data, sizeof(esp_ble_mesh_ble_adv_data_t));
}
return (btc_transfer_context(&msg, &arg, sizeof(btc_ble_mesh_ble_args_t), NULL)
return (btc_transfer_context(&msg, &arg, sizeof(btc_ble_mesh_prov_args_t), NULL)
== BT_STATUS_SUCCESS ? ESP_OK : ESP_FAIL);
}
esp_err_t esp_ble_mesh_stop_ble_advertising(uint8_t index)
{
btc_ble_mesh_ble_args_t arg = {0};
btc_ble_mesh_prov_args_t arg = {0};
btc_msg_t msg = {0};
if (index >= CONFIG_BLE_MESH_BLE_ADV_BUF_COUNT) {
@@ -67,44 +61,13 @@ esp_err_t esp_ble_mesh_stop_ble_advertising(uint8_t index)
ESP_BLE_HOST_STATUS_CHECK(ESP_BLE_HOST_STATUS_ENABLED);
msg.sig = BTC_SIG_API_CALL;
msg.pid = BTC_PID_BLE_MESH_BLE_COEX;
msg.act = BTC_BLE_MESH_ACT_STOP_BLE_ADV;
msg.pid = BTC_PID_PROV;
msg.act = BTC_BLE_MESH_ACT_STOP_BLE_ADVERTISING;
arg.stop_ble_adv.index = index;
arg.stop_ble_advertising.index = index;
return (btc_transfer_context(&msg, &arg, sizeof(btc_ble_mesh_ble_args_t), NULL)
return (btc_transfer_context(&msg, &arg, sizeof(btc_ble_mesh_prov_args_t), NULL)
== BT_STATUS_SUCCESS ? ESP_OK : ESP_FAIL);
}
#endif /* CONFIG_BLE_MESH_SUPPORT_BLE_ADV */
#if CONFIG_BLE_MESH_SUPPORT_BLE_SCAN
esp_err_t esp_ble_mesh_start_ble_scanning(esp_ble_mesh_ble_scan_param_t *param)
{
btc_ble_mesh_ble_args_t arg = {0};
btc_msg_t msg = {0};
ESP_BLE_HOST_STATUS_CHECK(ESP_BLE_HOST_STATUS_ENABLED);
msg.sig = BTC_SIG_API_CALL;
msg.pid = BTC_PID_BLE_MESH_BLE_COEX;
msg.act = BTC_BLE_MESH_ACT_START_BLE_SCAN;
return (btc_transfer_context(&msg, &arg, sizeof(btc_ble_mesh_ble_args_t), NULL)
== BT_STATUS_SUCCESS ? ESP_OK : ESP_FAIL);
}
esp_err_t esp_ble_mesh_stop_ble_scanning(void)
{
btc_ble_mesh_ble_args_t arg = {0};
btc_msg_t msg = {0};
ESP_BLE_HOST_STATUS_CHECK(ESP_BLE_HOST_STATUS_ENABLED);
msg.sig = BTC_SIG_API_CALL;
msg.pid = BTC_PID_BLE_MESH_BLE_COEX;
msg.act = BTC_BLE_MESH_ACT_STOP_BLE_SCAN;
return (btc_transfer_context(&msg, &arg, sizeof(btc_ble_mesh_ble_args_t), NULL)
== BT_STATUS_SUCCESS ? ESP_OK : ESP_FAIL);
}
#endif /* CONFIG_BLE_MESH_SUPPORT_BLE_SCAN */

View File

@@ -17,6 +17,8 @@
#include "freertos/FreeRTOS.h"
#include "freertos/semphr.h"
#include "btc/btc_manage.h"
#include "esp_err.h"
#include "btc_ble_mesh_prov.h"
@@ -42,7 +44,7 @@ esp_err_t esp_ble_mesh_init(esp_ble_mesh_prov_t *prov, esp_ble_mesh_comp_t *comp
// Create a semaphore
if ((semaphore = xSemaphoreCreateCounting(1, 0)) == NULL) {
BT_ERR("Failed to create semaphore");
BT_ERR("%s, Failed to allocate memory for the semaphore", __func__);
return ESP_ERR_NO_MEM;
}
@@ -57,7 +59,7 @@ esp_err_t esp_ble_mesh_init(esp_ble_mesh_prov_t *prov, esp_ble_mesh_comp_t *comp
if (btc_transfer_context(&msg, &arg, sizeof(btc_ble_mesh_prov_args_t), NULL) != BT_STATUS_SUCCESS) {
vSemaphoreDelete(semaphore);
BT_ERR("Failed to start mesh init");
BT_ERR("%s, BLE Mesh initialise failed", __func__);
return ESP_FAIL;
}
@@ -69,7 +71,6 @@ esp_err_t esp_ble_mesh_init(esp_ble_mesh_prov_t *prov, esp_ble_mesh_comp_t *comp
return ESP_OK;
}
#if CONFIG_BLE_MESH_DEINIT
esp_err_t esp_ble_mesh_deinit(esp_ble_mesh_deinit_param_t *param)
{
btc_ble_mesh_prov_args_t arg = {0};
@@ -90,4 +91,4 @@ esp_err_t esp_ble_mesh_deinit(esp_ble_mesh_deinit_param_t *param)
return (btc_transfer_context(&msg, &arg, sizeof(btc_ble_mesh_prov_args_t), NULL)
== BT_STATUS_SUCCESS ? ESP_OK : ESP_FAIL);
}
#endif /* CONFIG_BLE_MESH_DEINIT */

View File

@@ -13,7 +13,8 @@
// limitations under the License.
#include <stdint.h>
#include <string.h>
#include "btc/btc_manage.h"
#include "esp_err.h"
@@ -33,8 +34,7 @@ uint16_t esp_ble_mesh_get_primary_element_address(void)
return btc_ble_mesh_get_primary_addr();
}
uint16_t *esp_ble_mesh_is_model_subscribed_to_group(esp_ble_mesh_model_t *model,
uint16_t group_addr)
uint16_t *esp_ble_mesh_is_model_subscribed_to_group(esp_ble_mesh_model_t *model, uint16_t group_addr)
{
if (model == NULL) {
return NULL;
@@ -44,9 +44,6 @@ uint16_t *esp_ble_mesh_is_model_subscribed_to_group(esp_ble_mesh_model_t *model,
esp_ble_mesh_elem_t *esp_ble_mesh_find_element(uint16_t element_addr)
{
if (!ESP_BLE_MESH_ADDR_IS_UNICAST(element_addr)) {
return NULL;
}
return btc_ble_mesh_elem_find(element_addr);
}
@@ -56,7 +53,7 @@ uint8_t esp_ble_mesh_get_element_count(void)
}
esp_ble_mesh_model_t *esp_ble_mesh_find_vendor_model(const esp_ble_mesh_elem_t *element,
uint16_t company_id, uint16_t model_id)
uint16_t company_id, uint16_t model_id)
{
if (element == NULL) {
return NULL;
@@ -64,8 +61,7 @@ esp_ble_mesh_model_t *esp_ble_mesh_find_vendor_model(const esp_ble_mesh_elem_t *
return btc_ble_mesh_model_find_vnd(element, company_id, model_id);
}
esp_ble_mesh_model_t *esp_ble_mesh_find_sig_model(const esp_ble_mesh_elem_t *element,
uint16_t model_id)
esp_ble_mesh_model_t *esp_ble_mesh_find_sig_model(const esp_ble_mesh_elem_t *element, uint16_t model_id)
{
if (element == NULL) {
return NULL;
@@ -78,138 +74,3 @@ const esp_ble_mesh_comp_t *esp_ble_mesh_get_composition_data(void)
return btc_ble_mesh_comp_get();
}
esp_err_t esp_ble_mesh_model_subscribe_group_addr(uint16_t element_addr, uint16_t company_id,
uint16_t model_id, uint16_t group_addr)
{
btc_ble_mesh_prov_args_t arg = {0};
btc_msg_t msg = {0};
if (!ESP_BLE_MESH_ADDR_IS_UNICAST(element_addr) ||
!ESP_BLE_MESH_ADDR_IS_GROUP(group_addr)) {
return ESP_ERR_INVALID_ARG;
}
ESP_BLE_HOST_STATUS_CHECK(ESP_BLE_HOST_STATUS_ENABLED);
msg.sig = BTC_SIG_API_CALL;
msg.pid = BTC_PID_PROV;
msg.act = BTC_BLE_MESH_ACT_MODEL_SUBSCRIBE_GROUP_ADDR;
arg.model_sub_group_addr.element_addr = element_addr;
arg.model_sub_group_addr.company_id = company_id;
arg.model_sub_group_addr.model_id = model_id;
arg.model_sub_group_addr.group_addr = group_addr;
return (btc_transfer_context(&msg, &arg, sizeof(btc_ble_mesh_prov_args_t), NULL)
== BT_STATUS_SUCCESS ? ESP_OK : ESP_FAIL);
}
esp_err_t esp_ble_mesh_model_unsubscribe_group_addr(uint16_t element_addr, uint16_t company_id,
uint16_t model_id, uint16_t group_addr)
{
btc_ble_mesh_prov_args_t arg = {0};
btc_msg_t msg = {0};
if (!ESP_BLE_MESH_ADDR_IS_UNICAST(element_addr) ||
!ESP_BLE_MESH_ADDR_IS_GROUP(group_addr)) {
return ESP_ERR_INVALID_ARG;
}
ESP_BLE_HOST_STATUS_CHECK(ESP_BLE_HOST_STATUS_ENABLED);
msg.sig = BTC_SIG_API_CALL;
msg.pid = BTC_PID_PROV;
msg.act = BTC_BLE_MESH_ACT_MODEL_UNSUBSCRIBE_GROUP_ADDR;
arg.model_unsub_group_addr.element_addr = element_addr;
arg.model_unsub_group_addr.company_id = company_id;
arg.model_unsub_group_addr.model_id = model_id;
arg.model_unsub_group_addr.group_addr = group_addr;
return (btc_transfer_context(&msg, &arg, sizeof(btc_ble_mesh_prov_args_t), NULL)
== BT_STATUS_SUCCESS ? ESP_OK : ESP_FAIL);
}
#if CONFIG_BLE_MESH_NODE
const uint8_t *esp_ble_mesh_node_get_local_net_key(uint16_t net_idx)
{
return btc_ble_mesh_node_get_local_net_key(net_idx);
}
const uint8_t *esp_ble_mesh_node_get_local_app_key(uint16_t app_idx)
{
return btc_ble_mesh_node_get_local_app_key(app_idx);
}
esp_err_t esp_ble_mesh_node_add_local_net_key(const uint8_t net_key[16], uint16_t net_idx)
{
btc_ble_mesh_prov_args_t arg = {0};
btc_msg_t msg = {0};
if (net_key == NULL || net_idx > 0xFFF) {
return ESP_ERR_INVALID_ARG;
}
ESP_BLE_HOST_STATUS_CHECK(ESP_BLE_HOST_STATUS_ENABLED);
msg.sig = BTC_SIG_API_CALL;
msg.pid = BTC_PID_PROV;
msg.act = BTC_BLE_MESH_ACT_NODE_ADD_LOCAL_NET_KEY;
arg.node_add_local_net_key.net_idx = net_idx;
memcpy(arg.node_add_local_net_key.net_key, net_key, 16);
return (btc_transfer_context(&msg, &arg, sizeof(btc_ble_mesh_prov_args_t), NULL)
== BT_STATUS_SUCCESS ? ESP_OK : ESP_FAIL);
}
esp_err_t esp_ble_mesh_node_add_local_app_key(const uint8_t app_key[16], uint16_t net_idx, uint16_t app_idx)
{
btc_ble_mesh_prov_args_t arg = {0};
btc_msg_t msg = {0};
if (app_key == NULL || net_idx > 0xFFF || app_idx > 0xFFF) {
return ESP_ERR_INVALID_ARG;
}
ESP_BLE_HOST_STATUS_CHECK(ESP_BLE_HOST_STATUS_ENABLED);
msg.sig = BTC_SIG_API_CALL;
msg.pid = BTC_PID_PROV;
msg.act = BTC_BLE_MESH_ACT_NODE_ADD_LOCAL_APP_KEY;
arg.node_add_local_app_key.net_idx = net_idx;
arg.node_add_local_app_key.app_idx = app_idx;
memcpy(arg.node_add_local_app_key.app_key, app_key, 16);
return (btc_transfer_context(&msg, &arg, sizeof(btc_ble_mesh_prov_args_t), NULL)
== BT_STATUS_SUCCESS ? ESP_OK : ESP_FAIL);
}
esp_err_t esp_ble_mesh_node_bind_app_key_to_local_model(uint16_t element_addr, uint16_t company_id,
uint16_t model_id, uint16_t app_idx)
{
btc_ble_mesh_prov_args_t arg = {0};
btc_msg_t msg = {0};
if (!ESP_BLE_MESH_ADDR_IS_UNICAST(element_addr) || app_idx > 0xFFF) {
return ESP_ERR_INVALID_ARG;
}
ESP_BLE_HOST_STATUS_CHECK(ESP_BLE_HOST_STATUS_ENABLED);
msg.sig = BTC_SIG_API_CALL;
msg.pid = BTC_PID_PROV;
msg.act = BTC_BLE_MESH_ACT_NODE_BIND_APP_KEY_TO_MODEL;
arg.node_local_mod_app_bind.element_addr = element_addr;
arg.node_local_mod_app_bind.model_id = model_id;
arg.node_local_mod_app_bind.company_id = company_id;
arg.node_local_mod_app_bind.app_idx = app_idx;
return (btc_transfer_context(&msg, &arg, sizeof(btc_ble_mesh_prov_args_t), NULL)
== BT_STATUS_SUCCESS ? ESP_OK : ESP_FAIL);
}
#endif /* CONFIG_BLE_MESH_NODE */

View File

@@ -14,6 +14,8 @@
#include <stdint.h>
#include "btc/btc_manage.h"
#include "esp_err.h"
#include "btc_ble_mesh_prov.h"

View File

@@ -15,6 +15,8 @@
#include <stdint.h>
#include <string.h>
#include "btc/btc_manage.h"
#include "esp_err.h"
#include "btc_ble_mesh_prov.h"
@@ -23,12 +25,12 @@
#define ESP_BLE_MESH_TX_SDU_MAX ((CONFIG_BLE_MESH_ADV_BUF_COUNT - 3) * 12)
static esp_err_t ble_mesh_model_send_msg(esp_ble_mesh_model_t *model,
esp_ble_mesh_msg_ctx_t *ctx,
uint32_t opcode,
btc_ble_mesh_model_act_t act,
uint16_t length, uint8_t *data,
int32_t msg_timeout, bool need_rsp,
esp_ble_mesh_dev_role_t device_role)
esp_ble_mesh_msg_ctx_t *ctx,
uint32_t opcode,
btc_ble_mesh_model_act_t act,
uint16_t length, uint8_t *data,
int32_t msg_timeout, bool need_rsp,
esp_ble_mesh_dev_role_t device_role)
{
btc_ble_mesh_model_args_t arg = {0};
uint8_t op_len = 0, mic_len = 0;
@@ -39,12 +41,12 @@ static esp_err_t ble_mesh_model_send_msg(esp_ble_mesh_model_t *model,
ESP_BLE_HOST_STATUS_CHECK(ESP_BLE_HOST_STATUS_ENABLED);
if (ctx && ctx->addr == ESP_BLE_MESH_ADDR_UNASSIGNED) {
BT_ERR("Invalid destination address 0x0000");
BT_ERR("%s, Invalid destination address 0x0000", __func__);
return ESP_ERR_INVALID_ARG;
}
if (device_role > ROLE_FAST_PROV) {
BT_ERR("Invalid device role 0x%02x", device_role);
BT_ERR("%s, Invalid device role 0x%02x", __func__, device_role);
return ESP_ERR_INVALID_ARG;
}
@@ -63,19 +65,19 @@ static esp_err_t ble_mesh_model_send_msg(esp_ble_mesh_model_t *model,
if (act == BTC_BLE_MESH_ACT_MODEL_PUBLISH) {
if (op_len + length > model->pub->msg->size) {
BT_ERR("Too small publication msg size %d", model->pub->msg->size);
BT_ERR("%s, Model publication msg size %d is too small", __func__, model->pub->msg->size);
return ESP_ERR_INVALID_ARG;
}
}
if (act == BTC_BLE_MESH_ACT_MODEL_PUBLISH) {
mic_len = ESP_BLE_MESH_MIC_SHORT;
mic_len = 4;
} else {
mic_len = ctx->send_rel ? ESP_BLE_MESH_MIC_LONG : ESP_BLE_MESH_MIC_SHORT;
mic_len = ctx->send_rel ? 8 : 4;
}
if (op_len + length + mic_len > MIN(ESP_BLE_MESH_SDU_MAX_LEN, ESP_BLE_MESH_TX_SDU_MAX)) {
BT_ERR("Too large data length %d", length);
BT_ERR("%s, Data length %d is too large", __func__, length);
return ESP_ERR_INVALID_ARG;
}
@@ -164,7 +166,6 @@ esp_err_t esp_ble_mesh_client_model_init(esp_ble_mesh_model_t *model)
return btc_ble_mesh_client_model_init(model);
}
#if CONFIG_BLE_MESH_DEINIT
esp_err_t esp_ble_mesh_client_model_deinit(esp_ble_mesh_model_t *model)
{
if (model == NULL) {
@@ -175,36 +176,26 @@ esp_err_t esp_ble_mesh_client_model_deinit(esp_ble_mesh_model_t *model)
return btc_ble_mesh_client_model_deinit(model);
}
#endif /* CONFIG_BLE_MESH_DEINIT */
esp_err_t esp_ble_mesh_server_model_send_msg(esp_ble_mesh_model_t *model,
esp_ble_mesh_msg_ctx_t *ctx,
uint32_t opcode,
uint16_t length, uint8_t *data)
esp_ble_mesh_msg_ctx_t *ctx, uint32_t opcode,
uint16_t length, uint8_t *data)
{
if (model == NULL || ctx == NULL ||
ctx->net_idx == ESP_BLE_MESH_KEY_UNUSED ||
ctx->app_idx == ESP_BLE_MESH_KEY_UNUSED) {
if (!model || !ctx) {
return ESP_ERR_INVALID_ARG;
}
return ble_mesh_model_send_msg(model, ctx, opcode, BTC_BLE_MESH_ACT_SERVER_MODEL_SEND,
length, data, 0, false, ROLE_NODE);
}
esp_err_t esp_ble_mesh_client_model_send_msg(esp_ble_mesh_model_t *model,
esp_ble_mesh_msg_ctx_t *ctx,
uint32_t opcode,
uint16_t length, uint8_t *data,
int32_t msg_timeout, bool need_rsp,
esp_ble_mesh_dev_role_t device_role)
esp_ble_mesh_msg_ctx_t *ctx, uint32_t opcode,
uint16_t length, uint8_t *data, int32_t msg_timeout,
bool need_rsp, esp_ble_mesh_dev_role_t device_role)
{
if (model == NULL || ctx == NULL ||
ctx->net_idx == ESP_BLE_MESH_KEY_UNUSED ||
ctx->app_idx == ESP_BLE_MESH_KEY_UNUSED) {
if (!model || !ctx) {
return ESP_ERR_INVALID_ARG;
}
return ble_mesh_model_send_msg(model, ctx, opcode, BTC_BLE_MESH_ACT_CLIENT_MODEL_SEND,
length, data, msg_timeout, need_rsp, device_role);
}
@@ -213,19 +204,16 @@ esp_err_t esp_ble_mesh_model_publish(esp_ble_mesh_model_t *model, uint32_t opcod
uint16_t length, uint8_t *data,
esp_ble_mesh_dev_role_t device_role)
{
if (model == NULL || model->pub == NULL || model->pub->msg == NULL ||
model->pub->publish_addr == ESP_BLE_MESH_ADDR_UNASSIGNED) {
if (!model || !model->pub || !model->pub->msg) {
return ESP_ERR_INVALID_ARG;
}
return ble_mesh_model_send_msg(model, NULL, opcode, BTC_BLE_MESH_ACT_MODEL_PUBLISH,
length, data, 0, false, device_role);
}
#if CONFIG_BLE_MESH_SERVER_MODEL
esp_err_t esp_ble_mesh_server_model_update_state(esp_ble_mesh_model_t *model,
esp_ble_mesh_server_state_type_t type,
esp_ble_mesh_server_state_value_t *value)
esp_ble_mesh_server_state_type_t type,
esp_ble_mesh_server_state_value_t *value)
{
btc_ble_mesh_model_args_t arg = {0};
btc_msg_t msg = {0};
@@ -247,7 +235,6 @@ esp_err_t esp_ble_mesh_server_model_update_state(esp_ble_mesh_model_t *model,
return (btc_transfer_context(&msg, &arg, sizeof(btc_ble_mesh_model_args_t), btc_ble_mesh_model_arg_deep_copy)
== BT_STATUS_SUCCESS ? ESP_OK : ESP_FAIL);
}
#endif /* CONFIG_BLE_MESH_SERVER_MODEL */
esp_err_t esp_ble_mesh_node_local_reset(void)
{
@@ -281,8 +268,7 @@ esp_err_t esp_ble_mesh_provisioner_set_node_name(uint16_t index, const char *nam
arg.set_node_name.index = index;
memset(arg.set_node_name.name, 0, sizeof(arg.set_node_name.name));
strncpy(arg.set_node_name.name, name, ESP_BLE_MESH_NODE_NAME_MAX_LEN);
memcpy(arg.set_node_name.name, name, strlen(name));
return (btc_transfer_context(&msg, &arg, sizeof(btc_ble_mesh_prov_args_t), NULL)
== BT_STATUS_SUCCESS ? ESP_OK : ESP_FAIL);
}
@@ -301,8 +287,7 @@ uint16_t esp_ble_mesh_provisioner_get_node_index(const char *name)
return bt_mesh_provisioner_get_node_index(name);
}
esp_err_t esp_ble_mesh_provisioner_store_node_comp_data(uint16_t unicast_addr,
uint8_t *data, uint16_t length)
esp_err_t esp_ble_mesh_provisioner_store_node_comp_data(uint16_t unicast_addr, uint8_t *data, uint16_t length)
{
btc_ble_mesh_prov_args_t arg = {0};
btc_msg_t msg = {0};
@@ -342,25 +327,6 @@ esp_ble_mesh_node_t *esp_ble_mesh_provisioner_get_node_with_addr(uint16_t unicas
return btc_ble_mesh_provisioner_get_node_with_addr(unicast_addr);
}
esp_ble_mesh_node_t *esp_ble_mesh_provisioner_get_node_with_name(const char *name)
{
if (!name || (strlen(name) > ESP_BLE_MESH_NODE_NAME_MAX_LEN)) {
return NULL;
}
return btc_ble_mesh_provisioner_get_node_with_name(name);
}
uint16_t esp_ble_mesh_provisioner_get_prov_node_count(void)
{
return btc_ble_mesh_provisioner_get_prov_node_count();
}
const esp_ble_mesh_node_t **esp_ble_mesh_provisioner_get_node_table_entry(void)
{
return btc_ble_mesh_provisioner_get_node_table_entry();
}
esp_err_t esp_ble_mesh_provisioner_delete_node_with_uuid(const uint8_t uuid[16])
{
btc_ble_mesh_prov_args_t arg = {0};
@@ -404,7 +370,7 @@ esp_err_t esp_ble_mesh_provisioner_delete_node_with_addr(uint16_t unicast_addr)
}
esp_err_t esp_ble_mesh_provisioner_add_local_app_key(const uint8_t app_key[16],
uint16_t net_idx, uint16_t app_idx)
uint16_t net_idx, uint16_t app_idx)
{
btc_ble_mesh_prov_args_t arg = {0};
btc_msg_t msg = {0};
@@ -427,7 +393,7 @@ esp_err_t esp_ble_mesh_provisioner_add_local_app_key(const uint8_t app_key[16],
}
esp_err_t esp_ble_mesh_provisioner_update_local_app_key(const uint8_t app_key[16],
uint16_t net_idx, uint16_t app_idx)
uint16_t net_idx, uint16_t app_idx)
{
btc_ble_mesh_prov_args_t arg = {0};
btc_msg_t msg = {0};
@@ -455,7 +421,7 @@ const uint8_t *esp_ble_mesh_provisioner_get_local_app_key(uint16_t net_idx, uint
}
esp_err_t esp_ble_mesh_provisioner_bind_app_key_to_local_model(uint16_t element_addr, uint16_t app_idx,
uint16_t model_id, uint16_t company_id)
uint16_t model_id, uint16_t company_id)
{
btc_ble_mesh_prov_args_t arg = {0};
btc_msg_t msg = {0};
@@ -529,245 +495,11 @@ const uint8_t *esp_ble_mesh_provisioner_get_local_net_key(uint16_t net_idx)
return bt_mesh_provisioner_local_net_key_get(net_idx);
}
#if CONFIG_BLE_MESH_PROVISIONER_RECV_HB
esp_err_t esp_ble_mesh_provisioner_recv_heartbeat(bool enable)
uint16_t esp_ble_mesh_provisioner_get_prov_node_count(void)
{
btc_ble_mesh_prov_args_t arg = {0};
btc_msg_t msg = {0};
ESP_BLE_HOST_STATUS_CHECK(ESP_BLE_HOST_STATUS_ENABLED);
msg.sig = BTC_SIG_API_CALL;
msg.pid = BTC_PID_PROV;
msg.act = BTC_BLE_MESH_ACT_PROVISIONER_ENABLE_HEARTBEAT_RECV;
arg.enable_heartbeat_recv.enable = enable;
return (btc_transfer_context(&msg, &arg, sizeof(btc_ble_mesh_prov_args_t), NULL)
== BT_STATUS_SUCCESS ? ESP_OK : ESP_FAIL);
return btc_ble_mesh_provisioner_get_prov_node_count();
}
esp_err_t esp_ble_mesh_provisioner_set_heartbeat_filter_type(uint8_t type)
{
btc_ble_mesh_prov_args_t arg = {0};
btc_msg_t msg = {0};
if (type > ESP_BLE_MESH_HEARTBEAT_FILTER_REJECTLIST) {
return ESP_ERR_INVALID_ARG;
}
ESP_BLE_HOST_STATUS_CHECK(ESP_BLE_HOST_STATUS_ENABLED);
msg.sig = BTC_SIG_API_CALL;
msg.pid = BTC_PID_PROV;
msg.act = BTC_BLE_MESH_ACT_PROVISIONER_SET_HEARTBEAT_FILTER_TYPE;
arg.set_heartbeat_filter_type.type = type;
return (btc_transfer_context(&msg, &arg, sizeof(btc_ble_mesh_prov_args_t), NULL)
== BT_STATUS_SUCCESS ? ESP_OK : ESP_FAIL);
}
esp_err_t esp_ble_mesh_provisioner_set_heartbeat_filter_info(uint8_t op, esp_ble_mesh_heartbeat_filter_info_t *info)
{
btc_ble_mesh_prov_args_t arg = {0};
btc_msg_t msg = {0};
if (op > ESP_BLE_MESH_HEARTBEAT_FILTER_REMOVE || info == NULL) {
return ESP_ERR_INVALID_ARG;
}
if (!ESP_BLE_MESH_ADDR_IS_UNICAST(info->hb_src) &&
!ESP_BLE_MESH_ADDR_IS_UNICAST(info->hb_dst) &&
!ESP_BLE_MESH_ADDR_IS_GROUP(info->hb_dst)) {
return ESP_ERR_INVALID_ARG;
}
ESP_BLE_HOST_STATUS_CHECK(ESP_BLE_HOST_STATUS_ENABLED);
msg.sig = BTC_SIG_API_CALL;
msg.pid = BTC_PID_PROV;
msg.act = BTC_BLE_MESH_ACT_PROVISIONER_SET_HEARTBEAT_FILTER_INFO;
arg.set_heartbeat_filter_info.op = op;
arg.set_heartbeat_filter_info.hb_src = info->hb_src;
arg.set_heartbeat_filter_info.hb_dst = info->hb_dst;
return (btc_transfer_context(&msg, &arg, sizeof(btc_ble_mesh_prov_args_t), NULL)
== BT_STATUS_SUCCESS ? ESP_OK : ESP_FAIL);
}
#endif /* CONFIG_BLE_MESH_PROVISIONER_RECV_HB */
#if CONFIG_BLE_MESH_SETTINGS
esp_err_t esp_ble_mesh_provisioner_direct_erase_settings(void)
{
btc_msg_t msg = {0};
ESP_BLE_HOST_STATUS_CHECK(ESP_BLE_HOST_STATUS_ENABLED);
msg.sig = BTC_SIG_API_CALL;
msg.pid = BTC_PID_PROV;
msg.act = BTC_BLE_MESH_ACT_PROVISIONER_DIRECT_ERASE_SETTINGS;
return (btc_transfer_context(&msg, NULL, 0, NULL)
== BT_STATUS_SUCCESS ? ESP_OK : ESP_FAIL);
}
#endif /* CONFIG_BLE_MESH_SETTINGS */
#if CONFIG_BLE_MESH_USE_MULTIPLE_NAMESPACE
esp_err_t esp_ble_mesh_provisioner_open_settings_with_index(uint8_t index)
{
btc_ble_mesh_prov_args_t arg = {0};
btc_msg_t msg = {0};
if (index >= CONFIG_BLE_MESH_MAX_NVS_NAMESPACE) {
return ESP_ERR_INVALID_ARG;
}
ESP_BLE_HOST_STATUS_CHECK(ESP_BLE_HOST_STATUS_ENABLED);
msg.sig = BTC_SIG_API_CALL;
msg.pid = BTC_PID_PROV;
msg.act = BTC_BLE_MESH_ACT_PROVISIONER_OPEN_SETTINGS_WITH_INDEX;
arg.open_settings_with_index.index = index;
return (btc_transfer_context(&msg, &arg, sizeof(btc_ble_mesh_prov_args_t), NULL)
== BT_STATUS_SUCCESS ? ESP_OK : ESP_FAIL);
}
esp_err_t esp_ble_mesh_provisioner_open_settings_with_uid(const char *uid)
{
btc_ble_mesh_prov_args_t arg = {0};
btc_msg_t msg = {0};
if (!uid || strlen(uid) > ESP_BLE_MESH_SETTINGS_UID_SIZE) {
return ESP_ERR_INVALID_ARG;
}
ESP_BLE_HOST_STATUS_CHECK(ESP_BLE_HOST_STATUS_ENABLED);
msg.sig = BTC_SIG_API_CALL;
msg.pid = BTC_PID_PROV;
msg.act = BTC_BLE_MESH_ACT_PROVISIONER_OPEN_SETTINGS_WITH_UID;
strncpy(arg.open_settings_with_uid.uid, uid, ESP_BLE_MESH_SETTINGS_UID_SIZE);
return (btc_transfer_context(&msg, &arg, sizeof(btc_ble_mesh_prov_args_t), NULL)
== BT_STATUS_SUCCESS ? ESP_OK : ESP_FAIL);
}
esp_err_t esp_ble_mesh_provisioner_close_settings_with_index(uint8_t index, bool erase)
{
btc_ble_mesh_prov_args_t arg = {0};
btc_msg_t msg = {0};
if (index >= CONFIG_BLE_MESH_MAX_NVS_NAMESPACE) {
return ESP_ERR_INVALID_ARG;
}
ESP_BLE_HOST_STATUS_CHECK(ESP_BLE_HOST_STATUS_ENABLED);
msg.sig = BTC_SIG_API_CALL;
msg.pid = BTC_PID_PROV;
msg.act = BTC_BLE_MESH_ACT_PROVISIONER_CLOSE_SETTINGS_WITH_INDEX;
arg.close_settings_with_index.index = index;
arg.close_settings_with_index.erase = erase;
return (btc_transfer_context(&msg, &arg, sizeof(btc_ble_mesh_prov_args_t), NULL)
== BT_STATUS_SUCCESS ? ESP_OK : ESP_FAIL);
}
esp_err_t esp_ble_mesh_provisioner_close_settings_with_uid(const char *uid, bool erase)
{
btc_ble_mesh_prov_args_t arg = {0};
btc_msg_t msg = {0};
if (!uid || strlen(uid) > ESP_BLE_MESH_SETTINGS_UID_SIZE) {
return ESP_ERR_INVALID_ARG;
}
ESP_BLE_HOST_STATUS_CHECK(ESP_BLE_HOST_STATUS_ENABLED);
msg.sig = BTC_SIG_API_CALL;
msg.pid = BTC_PID_PROV;
msg.act = BTC_BLE_MESH_ACT_PROVISIONER_CLOSE_SETTINGS_WITH_UID;
strncpy(arg.close_settings_with_uid.uid, uid, ESP_BLE_MESH_SETTINGS_UID_SIZE);
arg.close_settings_with_uid.erase = erase;
return (btc_transfer_context(&msg, &arg, sizeof(btc_ble_mesh_prov_args_t), NULL)
== BT_STATUS_SUCCESS ? ESP_OK : ESP_FAIL);
}
esp_err_t esp_ble_mesh_provisioner_delete_settings_with_index(uint8_t index)
{
btc_ble_mesh_prov_args_t arg = {0};
btc_msg_t msg = {0};
if (index >= CONFIG_BLE_MESH_MAX_NVS_NAMESPACE) {
return ESP_ERR_INVALID_ARG;
}
ESP_BLE_HOST_STATUS_CHECK(ESP_BLE_HOST_STATUS_ENABLED);
msg.sig = BTC_SIG_API_CALL;
msg.pid = BTC_PID_PROV;
msg.act = BTC_BLE_MESH_ACT_PROVISIONER_DELETE_SETTINGS_WITH_INDEX;
arg.delete_settings_with_index.index = index;
return (btc_transfer_context(&msg, &arg, sizeof(btc_ble_mesh_prov_args_t), NULL)
== BT_STATUS_SUCCESS ? ESP_OK : ESP_FAIL);
}
esp_err_t esp_ble_mesh_provisioner_delete_settings_with_uid(const char *uid)
{
btc_ble_mesh_prov_args_t arg = {0};
btc_msg_t msg = {0};
if (!uid || strlen(uid) > ESP_BLE_MESH_SETTINGS_UID_SIZE) {
return ESP_ERR_INVALID_ARG;
}
ESP_BLE_HOST_STATUS_CHECK(ESP_BLE_HOST_STATUS_ENABLED);
msg.sig = BTC_SIG_API_CALL;
msg.pid = BTC_PID_PROV;
msg.act = BTC_BLE_MESH_ACT_PROVISIONER_DELETE_SETTINGS_WITH_UID;
strncpy(arg.delete_settings_with_uid.uid, uid, ESP_BLE_MESH_SETTINGS_UID_SIZE);
return (btc_transfer_context(&msg, &arg, sizeof(btc_ble_mesh_prov_args_t), NULL)
== BT_STATUS_SUCCESS ? ESP_OK : ESP_FAIL);
}
const char *esp_ble_mesh_provisioner_get_settings_uid(uint8_t index)
{
if (index >= CONFIG_BLE_MESH_MAX_NVS_NAMESPACE) {
return NULL;
}
return btc_ble_mesh_provisioner_get_settings_uid(index);
}
uint8_t esp_ble_mesh_provisioner_get_settings_index(const char *uid)
{
if (!uid || strlen(uid) > ESP_BLE_MESH_SETTINGS_UID_SIZE) {
return ESP_BLE_MESH_INVALID_SETTINGS_IDX;
}
return btc_ble_mesh_provisioner_get_settings_index(uid);
}
uint8_t esp_ble_mesh_provisioner_get_free_settings_count(void)
{
return btc_ble_mesh_provisioner_get_free_settings_count();
}
#endif /* CONFIG_BLE_MESH_USE_MULTIPLE_NAMESPACE */
#endif /* CONFIG_BLE_MESH_PROVISIONER */
#if (CONFIG_BLE_MESH_FAST_PROV)

View File

@@ -15,6 +15,8 @@
#include <stdint.h>
#include <string.h>
#include "btc/btc_manage.h"
#include "esp_err.h"
#include "btc_ble_mesh_prov.h"
@@ -35,29 +37,11 @@ bool esp_ble_mesh_node_is_provisioned(void)
return bt_mesh_is_provisioned();
}
static bool prov_bearers_valid(esp_ble_mesh_prov_bearer_t bearers)
{
if ((!(bearers & (ESP_BLE_MESH_PROV_ADV | ESP_BLE_MESH_PROV_GATT))) ||
(IS_ENABLED(CONFIG_BLE_MESH_PB_ADV) &&
!IS_ENABLED(CONFIG_BLE_MESH_PB_GATT) &&
!(bearers & ESP_BLE_MESH_PROV_ADV)) ||
(!IS_ENABLED(CONFIG_BLE_MESH_PB_ADV) &&
IS_ENABLED(CONFIG_BLE_MESH_PB_GATT) &&
!(bearers & ESP_BLE_MESH_PROV_GATT))) {
return false;
}
return true;
}
esp_err_t esp_ble_mesh_node_prov_enable(esp_ble_mesh_prov_bearer_t bearers)
{
btc_ble_mesh_prov_args_t arg = {0};
btc_msg_t msg = {0};
if (prov_bearers_valid(bearers) == false) {
return ESP_ERR_INVALID_ARG;
}
ESP_BLE_HOST_STATUS_CHECK(ESP_BLE_HOST_STATUS_ENABLED);
msg.sig = BTC_SIG_API_CALL;
@@ -74,10 +58,6 @@ esp_err_t esp_ble_mesh_node_prov_disable(esp_ble_mesh_prov_bearer_t bearers)
btc_ble_mesh_prov_args_t arg = {0};
btc_msg_t msg = {0};
if (prov_bearers_valid(bearers) == false) {
return ESP_ERR_INVALID_ARG;
}
ESP_BLE_HOST_STATUS_CHECK(ESP_BLE_HOST_STATUS_ENABLED);
msg.sig = BTC_SIG_API_CALL;
@@ -90,7 +70,7 @@ esp_err_t esp_ble_mesh_node_prov_disable(esp_ble_mesh_prov_bearer_t bearers)
}
esp_err_t esp_ble_mesh_node_set_oob_pub_key(uint8_t pub_key_x[32], uint8_t pub_key_y[32],
uint8_t private_key[32])
uint8_t private_key[32])
{
btc_ble_mesh_prov_args_t arg = {0};
btc_msg_t msg = {0};
@@ -138,7 +118,7 @@ esp_err_t esp_ble_mesh_node_input_string(const char *string)
btc_ble_mesh_prov_args_t arg = {0};
btc_msg_t msg = {0};
if (!string || strlen(string) > ESP_BLE_MESH_PROV_INPUT_OOB_MAX_LEN) {
if (!string) {
return ESP_ERR_INVALID_ARG;
}
@@ -148,8 +128,7 @@ esp_err_t esp_ble_mesh_node_input_string(const char *string)
msg.pid = BTC_PID_PROV;
msg.act = BTC_BLE_MESH_ACT_INPUT_STRING;
memset(arg.input_string.string, 0, sizeof(arg.input_string.string));
strncpy(arg.input_string.string, string,
MIN(strlen(string), sizeof(arg.input_string.string)));
strncpy(arg.input_string.string, string, strlen(string));
return (btc_transfer_context(&msg, &arg, sizeof(btc_ble_mesh_prov_args_t), NULL)
== BT_STATUS_SUCCESS ? ESP_OK : ESP_FAIL);
@@ -171,15 +150,14 @@ esp_err_t esp_ble_mesh_set_unprovisioned_device_name(const char *name)
msg.act = BTC_BLE_MESH_ACT_SET_DEVICE_NAME;
memset(arg.set_device_name.name, 0, sizeof(arg.set_device_name.name));
strncpy(arg.set_device_name.name, name, ESP_BLE_MESH_DEVICE_NAME_MAX_LEN);
memcpy(arg.set_device_name.name, name, strlen(name));
return (btc_transfer_context(&msg, &arg, sizeof(btc_ble_mesh_prov_args_t), NULL)
== BT_STATUS_SUCCESS ? ESP_OK : ESP_FAIL);
}
#if (CONFIG_BLE_MESH_PROVISIONER)
esp_err_t esp_ble_mesh_provisioner_read_oob_pub_key(uint8_t link_idx, uint8_t pub_key_x[32],
uint8_t pub_key_y[32])
uint8_t pub_key_y[32])
{
btc_ble_mesh_prov_args_t arg = {0};
btc_msg_t msg = {0};
@@ -207,8 +185,7 @@ esp_err_t esp_ble_mesh_provisioner_input_string(const char *string, uint8_t link
btc_ble_mesh_prov_args_t arg = {0};
btc_msg_t msg = {0};
if (!string || strlen(string) > ESP_BLE_MESH_PROV_OUTPUT_OOB_MAX_LEN ||
link_idx >= MAX_PROV_LINK_IDX) {
if (!string || link_idx >= MAX_PROV_LINK_IDX) {
return ESP_ERR_INVALID_ARG;
}
@@ -219,8 +196,7 @@ esp_err_t esp_ble_mesh_provisioner_input_string(const char *string, uint8_t link
msg.act = BTC_BLE_MESH_ACT_PROVISIONER_INPUT_STR;
memset(arg.provisioner_input_str.string, 0, sizeof(arg.provisioner_input_str.string));
strncpy(arg.provisioner_input_str.string, string,
MIN(strlen(string), sizeof(arg.provisioner_input_str.string)));
strncpy(arg.provisioner_input_str.string, string, strlen(string));
arg.provisioner_input_str.link_idx = link_idx;
return (btc_transfer_context(&msg, &arg, sizeof(btc_ble_mesh_prov_args_t), NULL)
@@ -254,10 +230,6 @@ esp_err_t esp_ble_mesh_provisioner_prov_enable(esp_ble_mesh_prov_bearer_t bearer
btc_ble_mesh_prov_args_t arg = {0};
btc_msg_t msg = {0};
if (prov_bearers_valid(bearers) == false) {
return ESP_ERR_INVALID_ARG;
}
ESP_BLE_HOST_STATUS_CHECK(ESP_BLE_HOST_STATUS_ENABLED);
msg.sig = BTC_SIG_API_CALL;
@@ -275,10 +247,6 @@ esp_err_t esp_ble_mesh_provisioner_prov_disable(esp_ble_mesh_prov_bearer_t beare
btc_ble_mesh_prov_args_t arg = {0};
btc_msg_t msg = {0};
if (prov_bearers_valid(bearers) == false) {
return ESP_ERR_INVALID_ARG;
}
ESP_BLE_HOST_STATUS_CHECK(ESP_BLE_HOST_STATUS_ENABLED);
msg.sig = BTC_SIG_API_CALL;
@@ -292,7 +260,7 @@ esp_err_t esp_ble_mesh_provisioner_prov_disable(esp_ble_mesh_prov_bearer_t beare
}
esp_err_t esp_ble_mesh_provisioner_add_unprov_dev(esp_ble_mesh_unprov_dev_add_t *add_dev,
esp_ble_mesh_dev_add_flag_t flags)
esp_ble_mesh_dev_add_flag_t flags)
{
btc_ble_mesh_prov_args_t arg = {0};
btc_msg_t msg = {0};
@@ -318,10 +286,8 @@ esp_err_t esp_ble_mesh_provisioner_add_unprov_dev(esp_ble_mesh_unprov_dev_add_t
}
esp_err_t esp_ble_mesh_provisioner_prov_device_with_addr(const uint8_t uuid[16],
esp_ble_mesh_bd_addr_t addr,
esp_ble_mesh_addr_type_t addr_type,
esp_ble_mesh_prov_bearer_t bearer,
uint16_t oob_info, uint16_t unicast_addr)
esp_ble_mesh_bd_addr_t addr, esp_ble_mesh_addr_type_t addr_type,
esp_ble_mesh_prov_bearer_t bearer, uint16_t oob_info, uint16_t unicast_addr)
{
btc_ble_mesh_prov_args_t arg = {0};
btc_msg_t msg = {0};
@@ -379,15 +345,11 @@ esp_err_t esp_ble_mesh_provisioner_delete_dev(esp_ble_mesh_device_delete_t *del_
}
esp_err_t esp_ble_mesh_provisioner_set_dev_uuid_match(const uint8_t *match_val, uint8_t match_len,
uint8_t offset, bool prov_after_match)
uint8_t offset, bool prov_after_match)
{
btc_ble_mesh_prov_args_t arg = {0};
btc_msg_t msg = {0};
if (match_len + offset > ESP_BLE_MESH_OCTET16_LEN) {
return ESP_ERR_INVALID_ARG;
}
ESP_BLE_HOST_STATUS_CHECK(ESP_BLE_HOST_STATUS_ENABLED);
msg.sig = BTC_SIG_API_CALL;
@@ -484,8 +446,7 @@ esp_err_t esp_ble_mesh_set_fast_prov_info(esp_ble_mesh_fast_prov_info_t *fast_pr
btc_ble_mesh_prov_args_t arg = {0};
btc_msg_t msg = {0};
if (fast_prov_info == NULL || (fast_prov_info->offset +
fast_prov_info->match_len > ESP_BLE_MESH_OCTET16_LEN)) {
if (fast_prov_info == NULL) {
return ESP_ERR_INVALID_ARG;
}

View File

@@ -15,6 +15,8 @@
#include <stdint.h>
#include <string.h>
#include "btc/btc_manage.h"
#include "esp_err.h"
#include "btc_ble_mesh_prov.h"
@@ -60,8 +62,7 @@ esp_err_t esp_ble_mesh_proxy_gatt_disable(void)
}
esp_err_t esp_ble_mesh_proxy_client_connect(esp_ble_mesh_bd_addr_t addr,
esp_ble_mesh_addr_type_t addr_type,
uint16_t net_idx)
esp_ble_mesh_addr_type_t addr_type, uint16_t net_idx)
{
btc_ble_mesh_prov_args_t arg = {0};
btc_msg_t msg = {0};
@@ -101,8 +102,8 @@ esp_err_t esp_ble_mesh_proxy_client_disconnect(uint8_t conn_handle)
== BT_STATUS_SUCCESS ? ESP_OK : ESP_FAIL);
}
esp_err_t esp_ble_mesh_proxy_client_set_filter_type(uint8_t conn_handle, uint16_t net_idx,
esp_ble_mesh_proxy_filter_type_t filter_type)
esp_err_t esp_ble_mesh_proxy_client_set_filter_type(uint8_t conn_handle,
uint16_t net_idx, esp_ble_mesh_proxy_filter_type_t filter_type)
{
btc_ble_mesh_prov_args_t arg = {0};
btc_msg_t msg = {0};
@@ -125,8 +126,8 @@ esp_err_t esp_ble_mesh_proxy_client_set_filter_type(uint8_t conn_handle, uint16_
== BT_STATUS_SUCCESS ? ESP_OK : ESP_FAIL);
}
esp_err_t esp_ble_mesh_proxy_client_add_filter_addr(uint8_t conn_handle, uint16_t net_idx,
uint16_t *addr, uint16_t addr_num)
esp_err_t esp_ble_mesh_proxy_client_add_filter_addr(uint8_t conn_handle,
uint16_t net_idx, uint16_t *addr, uint16_t addr_num)
{
btc_ble_mesh_prov_args_t arg = {0};
btc_msg_t msg = {0};
@@ -150,8 +151,8 @@ esp_err_t esp_ble_mesh_proxy_client_add_filter_addr(uint8_t conn_handle, uint16_
== BT_STATUS_SUCCESS ? ESP_OK : ESP_FAIL);
}
esp_err_t esp_ble_mesh_proxy_client_remove_filter_addr(uint8_t conn_handle, uint16_t net_idx,
uint16_t *addr, uint16_t addr_num)
esp_err_t esp_ble_mesh_proxy_client_remove_filter_addr(uint8_t conn_handle,
uint16_t net_idx, uint16_t *addr, uint16_t addr_num)
{
btc_ble_mesh_prov_args_t arg = {0};
btc_msg_t msg = {0};

View File

@@ -1,4 +1,4 @@
// Copyright 2017-2020 Espressif Systems (Shanghai) PTE LTD
// Copyright 2017-2019 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
@@ -17,110 +17,6 @@
#include "esp_ble_mesh_defs.h"
#ifdef __cplusplus
extern "C" {
#endif
/** This enum value is the event of BLE operations */
typedef enum {
ESP_BLE_MESH_START_BLE_ADVERTISING_COMP_EVT, /*!< Start BLE advertising completion event */
ESP_BLE_MESH_STOP_BLE_ADVERTISING_COMP_EVT, /*!< Stop BLE advertising completion event */
ESP_BLE_MESH_START_BLE_SCANNING_COMP_EVT, /*!< Start BLE scanning completion event */
ESP_BLE_MESH_STOP_BLE_SCANNING_COMP_EVT, /*!< Stop BLE scanning completion event */
ESP_BLE_MESH_SCAN_BLE_ADVERTISING_PKT_EVT, /*!< Scanning BLE advertising packets event */
ESP_BLE_MESH_BLE_EVT_MAX,
} esp_ble_mesh_ble_cb_event_t;
/** BLE operation callback parameters */
typedef union {
/**
* @brief ESP_BLE_MESH_START_BLE_ADVERTISING_COMP_EVT
*/
struct {
int err_code; /*!< Indicate the result of starting BLE advertising */
uint8_t index; /*!< Index of the BLE advertising */
} start_ble_advertising_comp; /*!< Event parameters of ESP_BLE_MESH_START_BLE_ADVERTISING_COMP_EVT */
/**
* @brief ESP_BLE_MESH_STOP_BLE_ADVERTISING_COMP_EVT
*/
struct {
int err_code; /*!< Indicate the result of stopping BLE advertising */
uint8_t index; /*!< Index of the BLE advertising */
} stop_ble_advertising_comp; /*!< Event parameters of ESP_BLE_MESH_STOP_BLE_ADVERTISING_COMP_EVT */
/**
* @brief ESP_BLE_MESH_START_BLE_SCANNING_COMP_EVT
*/
struct {
int err_code; /*!< Indicate the result of starting BLE scanning */
} start_ble_scan_comp; /*!< Event parameters of ESP_BLE_MESH_START_BLE_SCANNING_COMP_EVT */
/**
* @brief ESP_BLE_MESH_STOP_BLE_SCANNING_COMP_EVT
*/
struct {
int err_code; /*!< Indicate the result of stopping BLE scanning */
} stop_ble_scan_comp; /*!< Event parameters of ESP_BLE_MESH_STOP_BLE_SCANNING_COMP_EVT */
/**
* @brief ESP_BLE_MESH_SCAN_BLE_ADVERTISING_PKT_EVT
*/
struct {
uint8_t addr[6]; /*!< Device address */
uint8_t addr_type; /*!< Device address type */
uint8_t adv_type; /*!< Advertising data type */
uint8_t *data; /*!< Advertising data */
uint16_t length; /*!< Advertising data length */
int8_t rssi; /*!< RSSI of the advertising packet */
} scan_ble_adv_pkt; /*!< Event parameters of ESP_BLE_MESH_SCAN_BLE_ADVERTISING_PKT_EVT */
} esp_ble_mesh_ble_cb_param_t;
/**
* @brief BLE scanning callback function type
*
* @param event: BLE scanning callback event type
* @param param: BLE scanning callback parameter
*/
typedef void (* esp_ble_mesh_ble_cb_t)(esp_ble_mesh_ble_cb_event_t event,
esp_ble_mesh_ble_cb_param_t *param);
/**
* @brief Register BLE scanning callback.
*
* @param[in] callback: Pointer to the BLE scaning callback function.
*
* @return ESP_OK on success or error code otherwise.
*
*/
esp_err_t esp_ble_mesh_register_ble_callback(esp_ble_mesh_ble_cb_t callback);
/** Count for sending BLE advertising packet infinitely */
#define ESP_BLE_MESH_BLE_ADV_INFINITE 0xFFFF
/*!< This enum value is the priority of BLE advertising packet */
typedef enum {
ESP_BLE_MESH_BLE_ADV_PRIO_LOW,
ESP_BLE_MESH_BLE_ADV_PRIO_HIGH,
} esp_ble_mesh_ble_adv_priority_t;
/** Context of BLE advertising parameters. */
typedef struct {
uint16_t interval; /*!< BLE advertising interval */
uint8_t adv_type; /*!< BLE advertising type */
uint8_t own_addr_type; /*!< Own address type */
uint8_t peer_addr_type; /*!< Peer address type */
uint8_t peer_addr[BD_ADDR_LEN]; /*!< Peer address */
uint16_t duration; /*!< Duration is milliseconds */
uint16_t period; /*!< Period in milliseconds */
uint16_t count; /*!< Number of advertising duration */
uint8_t priority:2; /*!< Priority of BLE advertising packet */
} esp_ble_mesh_ble_adv_param_t;
/** Context of BLE advertising data. */
typedef struct {
uint8_t adv_data_len; /*!< Advertising data length */
uint8_t adv_data[31]; /*!< Advertising data */
uint8_t scan_rsp_data_len; /*!< Scan response data length */
uint8_t scan_rsp_data[31]; /*!< Scan response data */
} esp_ble_mesh_ble_adv_data_t;
/**
* @brief This function is called to start BLE advertising with the corresponding data
* and parameters while BLE Mesh is working at the same time.
@@ -158,33 +54,4 @@ esp_err_t esp_ble_mesh_start_ble_advertising(const esp_ble_mesh_ble_adv_param_t
*/
esp_err_t esp_ble_mesh_stop_ble_advertising(uint8_t index);
/** Context of BLE scanning parameters. */
typedef struct {
uint32_t duration; /*!< Duration used to scan normal BLE advertising packets */
} esp_ble_mesh_ble_scan_param_t;
/**
* @brief This function is called to start scanning normal BLE advertising packets
* and notifying the packets to the application layer.
*
* @param[in] param: Pointer to the BLE scanning parameters
*
* @return ESP_OK on success or error code otherwise.
*
*/
esp_err_t esp_ble_mesh_start_ble_scanning(esp_ble_mesh_ble_scan_param_t *param);
/**
* @brief This function is called to stop notifying normal BLE advertising packets
* to the application layer.
*
* @return ESP_OK on success or error code otherwise.
*
*/
esp_err_t esp_ble_mesh_stop_ble_scanning(void);
#ifdef __cplusplus
}
#endif
#endif /* _ESP_BLE_MESH_BLE_API_H_ */

View File

@@ -17,10 +17,6 @@
#include "esp_ble_mesh_defs.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief Initialize BLE Mesh module.
* This API initializes provisioning capabilities and composition data information.
@@ -50,8 +46,4 @@ esp_err_t esp_ble_mesh_init(esp_ble_mesh_prov_t *prov, esp_ble_mesh_comp_t *comp
*/
esp_err_t esp_ble_mesh_deinit(esp_ble_mesh_deinit_param_t *param);
#ifdef __cplusplus
}
#endif
#endif /* _ESP_BLE_MESH_COMMON_API_H_ */

View File

@@ -17,10 +17,6 @@
#include "esp_ble_mesh_defs.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief Get the model publish period, the unit is ms.
*
@@ -55,8 +51,7 @@ uint16_t esp_ble_mesh_get_primary_element_address(void);
* to 0x0000 in order to unsubscribe the model from the group.
*
*/
uint16_t *esp_ble_mesh_is_model_subscribed_to_group(esp_ble_mesh_model_t *model,
uint16_t group_addr);
uint16_t *esp_ble_mesh_is_model_subscribed_to_group(esp_ble_mesh_model_t *model, uint16_t group_addr);
/**
* @brief Find the BLE Mesh element pointer via the element address.
@@ -88,7 +83,7 @@ uint8_t esp_ble_mesh_get_element_count(void);
*
*/
esp_ble_mesh_model_t *esp_ble_mesh_find_vendor_model(const esp_ble_mesh_elem_t *element,
uint16_t company_id, uint16_t model_id);
uint16_t company_id, uint16_t model_id);
/**
* @brief Find the SIG model with the given element and Model id.
@@ -99,8 +94,7 @@ esp_ble_mesh_model_t *esp_ble_mesh_find_vendor_model(const esp_ble_mesh_elem_t *
* @return Pointer to the SIG Model on success, or NULL on failure which means the SIG Model is not found.
*
*/
esp_ble_mesh_model_t *esp_ble_mesh_find_sig_model(const esp_ble_mesh_elem_t *element,
uint16_t model_id);
esp_ble_mesh_model_t *esp_ble_mesh_find_sig_model(const esp_ble_mesh_elem_t *element, uint16_t model_id);
/**
* @brief Get the Composition data which has been registered.
@@ -110,106 +104,4 @@ esp_ble_mesh_model_t *esp_ble_mesh_find_sig_model(const esp_ble_mesh_elem_t *ele
*/
const esp_ble_mesh_comp_t *esp_ble_mesh_get_composition_data(void);
/**
* @brief A local model of node or Provisioner subscribes a group address.
*
* @note This function shall not be invoked before node is provisioned or Provisioner is enabled.
*
* @param[in] element_addr: Unicast address of the element to which the model belongs.
* @param[in] company_id: A 16-bit company identifier.
* @param[in] model_id: A 16-bit model identifier.
* @param[in] group_addr: The group address to be subscribed.
*
* @return ESP_OK on success or error code otherwise.
*
*/
esp_err_t esp_ble_mesh_model_subscribe_group_addr(uint16_t element_addr, uint16_t company_id,
uint16_t model_id, uint16_t group_addr);
/**
* @brief A local model of node or Provisioner unsubscribes a group address.
*
* @note This function shall not be invoked before node is provisioned or Provisioner is enabled.
*
* @param[in] element_addr: Unicast address of the element to which the model belongs.
* @param[in] company_id: A 16-bit company identifier.
* @param[in] model_id: A 16-bit model identifier.
* @param[in] group_addr: The subscribed group address.
*
* @return ESP_OK on success or error code otherwise.
*
*/
esp_err_t esp_ble_mesh_model_unsubscribe_group_addr(uint16_t element_addr, uint16_t company_id,
uint16_t model_id, uint16_t group_addr);
/**
* @brief This function is called by Node to get the local NetKey.
*
* @param[in] net_idx: NetKey index.
*
* @return NetKey on success, or NULL on failure.
*
*/
const uint8_t *esp_ble_mesh_node_get_local_net_key(uint16_t net_idx);
/**
* @brief This function is called by Node to get the local AppKey.
*
* @param[in] app_idx: AppKey index.
*
* @return AppKey on success, or NULL on failure.
*
*/
const uint8_t *esp_ble_mesh_node_get_local_app_key(uint16_t app_idx);
/**
* @brief This function is called by Node to add a local NetKey.
*
* @param[in] net_key: NetKey to be added.
* @param[in] net_idx: NetKey Index.
*
* @note This function can only be called after the device is provisioned.
*
* @return ESP_OK on success or error code otherwise.
*
*/
esp_err_t esp_ble_mesh_node_add_local_net_key(const uint8_t net_key[16], uint16_t net_idx);
/**
* @brief This function is called by Node to add a local AppKey.
*
* @param[in] app_key: AppKey to be added.
* @param[in] net_idx: NetKey Index.
* @param[in] app_idx: AppKey Index.
*
* @note The net_idx must be an existing one.
* This function can only be called after the device is provisioned.
*
* @return ESP_OK on success or error code otherwise.
*
*/
esp_err_t esp_ble_mesh_node_add_local_app_key(const uint8_t app_key[16], uint16_t net_idx, uint16_t app_idx);
/**
* @brief This function is called by Node to bind AppKey to model locally.
*
* @param[in] element_addr: Node local element address
* @param[in] company_id: Node local company id
* @param[in] model_id: Node local model id
* @param[in] app_idx: Node local appkey index
*
* @note If going to bind app_key with local vendor model, the company_id
* shall be set to 0xFFFF.
* This function can only be called after the device is provisioned.
*
* @return ESP_OK on success or error code otherwise.
*
*/
esp_err_t esp_ble_mesh_node_bind_app_key_to_local_model(uint16_t element_addr, uint16_t company_id,
uint16_t model_id, uint16_t app_idx);
#ifdef __cplusplus
}
#endif
#endif /* _ESP_BLE_MESH_LOCAL_DATA_OPERATION_API_H_ */

View File

@@ -17,10 +17,6 @@
#include "esp_ble_mesh_defs.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief Enable BLE Mesh device LPN functionality.
*
@@ -62,8 +58,4 @@ esp_err_t esp_ble_mesh_lpn_disable(bool force);
*/
esp_err_t esp_ble_mesh_lpn_poll(void);
#ifdef __cplusplus
}
#endif
#endif /* _ESP_BLE_MESH_LOW_POWER_API_H_ */

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