versions: Update version to 4.3.0

CI: fix connection failures in asio example tests (4.3)

See merge request espressif/esp-idf!13903

.github/workflows/release_zips.yml

@@ -0,0 +1,17 @@
+name: Create zip file with recursive source clone for release
+
+on:
+  push:
+    tags:
+      - v*
+
+jobs:
+  release_zips:
+    name: Create release zip file
+    runs-on: ubuntu-20.04
+    steps:
+      - name: Create a recursive clone source zip
+        uses: espressif/github-actions/release_zips@master
+        env:
+            RELEASE_PROJECT_NAME: ESP-IDF
+            GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}

.gitmodules

@@ -7,8 +7,8 @@
 	path = components/esptool_py/esptool
 	url = ../../espressif/esptool.git
 
-[submodule "components/bt/controller/lib"]
-	path = components/bt/controller/lib
+[submodule "components/bt/controller/lib_esp32"]
+	path = components/bt/controller/lib_esp32
 	url = ../../espressif/esp32-bt-lib.git
 
 [submodule "components/bootloader/subproject/components/micro-ecc/micro-ecc"]
@@ -90,3 +90,7 @@
 [submodule "components/cmock/CMock"]
 	path = components/cmock/CMock
 	url = ../../ThrowTheSwitch/CMock.git
+
+[submodule "components/bt/controller/lib_esp32c3_family"]
+	path = components/bt/controller/lib_esp32c3_family
+	url = ../../espressif/esp32c3-bt-lib.git

components/app_trace/linker.lf

@@ -9,7 +9,7 @@ entries:
       SEGGER_SYSVIEW_Config_FreeRTOS (noflash)
       SEGGER_SYSVIEW_FreeRTOS (noflash)
 
-[mapping:driver]
+[mapping:app_trace_driver]
 archive: libdriver.a
 entries:
     if SYSVIEW_TS_SOURCE_TIMER_00 = y || SYSVIEW_TS_SOURCE_TIMER_01 = y

components/bootloader/Makefile.projbuild

@@ -17,6 +17,8 @@ CONFIG_SECURE_BOOT_SIGNING_KEY ?=
 SECURE_BOOT_SIGNING_KEY=$(abspath $(call dequote,$(CONFIG_SECURE_BOOT_SIGNING_KEY)))
 export SECURE_BOOT_SIGNING_KEY  # used by bootloader_support component
 
+BOOTLOADER_SIGNED_BIN ?=
+
 # Has a matching value in bootloader_support esp_flash_partitions.h
 BOOTLOADER_OFFSET := 0x1000
 

components/bootloader/subproject/CMakeLists.txt

@@ -54,6 +54,9 @@ string(REPLACE ";" " " esptoolpy_write_flash
 string(REPLACE ";" " " espsecurepy "${ESPSECUREPY}")
 string(REPLACE ";" " " espefusepy "${ESPEFUSEPY}")
 
+# Suppress warning: "Manually-specified variables were not used by the project: SECURE_BOOT_SIGNING_KEY"
+set(ignore_signing_key "${SECURE_BOOT_SIGNING_KEY}")
+
 if(CONFIG_SECURE_BOOTLOADER_REFLASHABLE)
     if(CONFIG_SECURE_BOOTLOADER_KEY_ENCODING_192BIT)
         set(key_digest_len 192)

components/bootloader/subproject/Makefile

@@ -8,7 +8,7 @@ endif
 
 PROJECT_NAME := bootloader
 
-COMPONENTS := esp_hw_support esptool_py bootloader_support log spi_flash micro-ecc soc main efuse esp_rom hal
+COMPONENTS := esp_hw_support esptool_py bootloader_support log spi_flash micro-ecc soc main efuse esp_rom hal xtensa
 
 # Clear C and CXX from top level project
 CFLAGS =

components/bootloader_support/component.mk

@@ -7,7 +7,9 @@ else
 COMPONENT_PRIV_INCLUDEDIRS := include_bootloader
 endif
 
-COMPONENT_SRCDIRS := src
+COMPONENT_SRCDIRS := src \
+			src/secure_boot_v2 \
+			src/secure_boot_v1
 
 ifndef IS_BOOTLOADER_BUILD
 COMPONENT_SRCDIRS += src/idf  # idf sub-directory contains platform agnostic IDF versions
@@ -33,15 +35,27 @@ COMPONENT_OBJEXCLUDE += src/bootloader_flash_config_esp32s2.o \
 			src/bootloader_random_esp32s3.o \
 			src/bootloader_random_esp32c3.o
 
-ifndef CONFIG_SECURE_SIGNED_APPS_ECDSA_SCHEME
-COMPONENT_OBJEXCLUDE += src/secure_boot_v1/secure_boot_signatures_bootloader.o \
-			src/secure_boot_v1/secure_boot_signatures_app.o
-endif
+ifdef IS_BOOTLOADER_BUILD
+	ifndef CONFIG_SECURE_SIGNED_APPS_ECDSA_SCHEME
+		COMPONENT_OBJEXCLUDE += src/secure_boot_v1/secure_boot_signatures_bootloader.o
+	endif
 
-ifndef CONFIG_SECURE_SIGNED_APPS_RSA_SCHEME
-COMPONENT_OBJEXCLUDE += src/secure_boot_v2/secure_boot_signatures_bootloader.o \
-			src/secure_boot_v2/secure_boot_signatures_app.o
-endif
+	ifndef CONFIG_SECURE_SIGNED_APPS_RSA_SCHEME
+		COMPONENT_OBJEXCLUDE += src/secure_boot_v2/secure_boot_signatures_bootloader.o
+	endif
+	COMPONENT_OBJEXCLUDE += src/secure_boot_v1/secure_boot_signatures_app.o \
+				src/secure_boot_v2/secure_boot_signatures_app.o
+else
+	ifndef CONFIG_SECURE_SIGNED_APPS_ECDSA_SCHEME
+		COMPONENT_OBJEXCLUDE += src/secure_boot_v1/secure_boot_signatures_app.o
+	endif
+
+	ifndef CONFIG_SECURE_SIGNED_APPS_RSA_SCHEME
+		COMPONENT_OBJEXCLUDE += src/secure_boot_v2/secure_boot_signatures_app.o
+	endif
+	COMPONENT_OBJEXCLUDE += src/secure_boot_v1/secure_boot_signatures_bootloader.o \
+				src/secure_boot_v2/secure_boot_signatures_bootloader.o
+endif # IS_BOOTLOADER_BUILD
 
 ifndef CONFIG_SECURE_BOOT
 COMPONENT_OBJEXCLUDE += src/$(IDF_TARGET)/secure_boot.o

components/bootloader_support/src/bootloader_common_loader.c

@@ -77,7 +77,9 @@ esp_err_t bootloader_common_check_chip_validity(const esp_image_header_t* img_hd
     }
     uint8_t revision = bootloader_common_get_chip_revision();
     if (revision < img_hdr->min_chip_rev) {
-        ESP_LOGE(TAG, "can't run on lower chip revision, expected %d, found %d", revision, img_hdr->min_chip_rev);
+        /* To fix this error, please update mininum supported chip revision from configuration,
+         * located in TARGET (e.g. ESP32) specific options under "Component config" menu */
+        ESP_LOGE(TAG, "This chip is revision %d but the application is configured for minimum revision %d. Can't run.", revision, img_hdr->min_chip_rev);
         err = ESP_FAIL;
     } else if (revision != img_hdr->min_chip_rev) {
 #ifdef BOOTLOADER_BUILD
@@ -139,7 +141,7 @@ esp_err_t bootloader_common_get_partition_description(const esp_partition_pos_t
 
 #if defined( CONFIG_BOOTLOADER_SKIP_VALIDATE_IN_DEEP_SLEEP ) || defined( CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC )
 
-#define RTC_RETAIN_MEM_ADDR (SOC_RTC_DATA_HIGH - sizeof(rtc_retain_mem_t))
+#define RTC_RETAIN_MEM_ADDR (SOC_RTC_DRAM_HIGH - sizeof(rtc_retain_mem_t))
 
 rtc_retain_mem_t *const rtc_retain_mem = (rtc_retain_mem_t *)RTC_RETAIN_MEM_ADDR;
 

components/bootloader_support/src/bootloader_flash_config_esp32c3.c

@@ -24,7 +24,7 @@
 #include "soc/efuse_reg.h"
 #include "soc/spi_reg.h"
 #include "soc/spi_mem_reg.h"
-#include "soc/spi_caps.h"
+#include "soc/soc_caps.h"
 #include "flash_qio_mode.h"
 #include "bootloader_flash_config.h"
 #include "bootloader_common.h"

components/bootloader_support/src/esp32c3/bootloader_esp32c3.c

@@ -262,22 +262,27 @@ static void bootloader_super_wdt_auto_feed(void)
     REG_WRITE(RTC_CNTL_SWD_WPROTECT_REG, 0);
 }
 
-#if CONFIG_ESP32C3_REV_MIN < 3
 static inline void bootloader_hardware_init(void)
 {
+    // This check is always included in the bootloader so it can
+    // print the minimum revision error message later in the boot
     if (bootloader_common_get_chip_revision() < 3) {
         REGI2C_WRITE_MASK(I2C_ULP, I2C_ULP_IR_FORCE_XPD_IPH, 1);
         REGI2C_WRITE_MASK(I2C_BIAS, I2C_BIAS_DREG_1P1_PVT, 12);
     }
 }
-#endif
 
 static inline void bootloader_glitch_reset_disable(void)
 {
+    /*
+      For origin chip & ECO1: only support swt reset;
+      For ECO2: fix brownout reset bug, support swt & brownout reset;
+      For ECO3: fix clock glitch reset bug, support all reset, include: swt & brownout & clock glitch reset.
+    */
     uint8_t chip_version = bootloader_common_get_chip_revision();
     if (chip_version < 2) {
         REG_SET_FIELD(RTC_CNTL_FIB_SEL_REG, RTC_CNTL_FIB_SEL, RTC_CNTL_FIB_SUPER_WDT_RST);
-    } else {
+    } else if (chip_version == 2) {
         REG_SET_FIELD(RTC_CNTL_FIB_SEL_REG, RTC_CNTL_FIB_SEL, RTC_CNTL_FIB_SUPER_WDT_RST | RTC_CNTL_FIB_BOR_RST);
     }
 }
@@ -285,9 +290,8 @@ static inline void bootloader_glitch_reset_disable(void)
 esp_err_t bootloader_init(void)
 {
     esp_err_t ret = ESP_OK;
-#if CONFIG_ESP32C3_REV_MIN < 3
+
     bootloader_hardware_init();
-#endif
     bootloader_glitch_reset_disable();
     bootloader_super_wdt_auto_feed();
     // protect memory region

components/bt/CMakeLists.txt

@@ -589,13 +589,15 @@ idf_component_register(SRCS "${srcs}"
 if(CONFIG_BT_ENABLED)
     target_compile_options(${COMPONENT_LIB} PRIVATE -Wno-implicit-fallthrough -Wno-unused-const-variable)
     if(CONFIG_IDF_TARGET_ESP32)
-        target_link_libraries(${COMPONENT_LIB} INTERFACE "-L${CMAKE_CURRENT_LIST_DIR}/controller/lib/esp32")
+        target_link_libraries(${COMPONENT_LIB} INTERFACE "-L${CMAKE_CURRENT_LIST_DIR}/controller/lib_esp32/esp32")
         target_link_libraries(${COMPONENT_LIB} PUBLIC btdm_app)
     elseif(CONFIG_IDF_TARGET_ESP32C3)
-        target_link_libraries(${COMPONENT_LIB} INTERFACE "-L${CMAKE_CURRENT_LIST_DIR}/controller/lib/esp32c3")
+        target_link_libraries(${COMPONENT_LIB} INTERFACE
+                "-L${CMAKE_CURRENT_LIST_DIR}/controller/lib_esp32c3_family/esp32c3")
         target_link_libraries(${COMPONENT_LIB} PUBLIC btdm_app btbb)
     elseif(CONFIG_IDF_TARGET_ESP32S3)
-        target_link_libraries(${COMPONENT_LIB} INTERFACE "-L${CMAKE_CURRENT_LIST_DIR}/controller/lib/esp32s3")
+        target_link_libraries(${COMPONENT_LIB} INTERFACE
+                "-L${CMAKE_CURRENT_LIST_DIR}/controller/lib_esp32c3_family/esp32s3")
         target_link_libraries(${COMPONENT_LIB} PUBLIC btdm_app btbb)
     endif()
 endif()

components/bt/component.mk

@@ -9,13 +9,13 @@ COMPONENT_ADD_INCLUDEDIRS := include
 
 LIBS := btdm_app
 
-COMPONENT_ADD_LDFLAGS     := -lbt -L $(COMPONENT_PATH)/controller/lib/esp32 \
+COMPONENT_ADD_LDFLAGS     := -lbt -L $(COMPONENT_PATH)/controller/lib_esp32/esp32 \
                            $(addprefix -l,$(LIBS))
 
 # re-link program if BT binary libs change
-COMPONENT_ADD_LINKER_DEPS := $(patsubst %,$(COMPONENT_PATH)/controller/lib/esp32/lib%.a,$(LIBS))
+COMPONENT_ADD_LINKER_DEPS := $(patsubst %,$(COMPONENT_PATH)/controller/lib_esp32/esp32/lib%.a,$(LIBS))
 
-COMPONENT_SUBMODULES += controller/lib
+COMPONENT_SUBMODULES += controller/lib_esp32
 
 
 # TODO: annotate fallthroughs in Bluedroid code with comments

components/bt/esp_ble_mesh/mesh_core/prov.c

@@ -751,7 +751,18 @@ static int prov_auth(uint8_t method, uint8_t action, uint8_t size)
             uint32_t num = 0U;
 
             bt_mesh_rand(&num, sizeof(num));
-            num %= div[size - 1];
+
+            if (output == BLE_MESH_BLINK ||
+                output == BLE_MESH_BEEP ||
+                output == BLE_MESH_VIBRATE) {
+                /** NOTE: According to the Bluetooth Mesh Profile Specification
+                 *  Section 5.4.2.4, blink, beep and vibrate should be a random
+                 *  integer between 0 and 10^size.
+                 */
+                num = (num % (div[size - 1] - 1)) + 1;
+            } else {
+                num %= div[size - 1];
+            }
 
             sys_put_be32(num, &link.auth[12]);
             (void)memset(link.auth, 0, 12);

components/bt/esp_ble_mesh/mesh_core/provisioner_prov.c

@@ -1954,7 +1954,17 @@ static int prov_auth(const uint8_t idx, uint8_t method, uint8_t action, uint8_t
             uint32_t num = 0U;
 
             bt_mesh_rand(&num, sizeof(num));
-            num %= div[size - 1];
+
+            if (input == BLE_MESH_PUSH ||
+                input == BLE_MESH_TWIST) {
+                /** NOTE: According to the Bluetooth Mesh Profile Specification
+                 *  Section 5.4.2.4, push and twist should be a random integer
+                 *  between 0 and 10^size.
+                 */
+                num = (num % (div[size - 1] - 1)) + 1;
+            } else {
+                num %= div[size - 1];
+            }
 
             sys_put_be32(num, &link[idx].auth[12]);
             memset(link[idx].auth, 0, 12);
@@ -2057,7 +2067,7 @@ int bt_mesh_provisioner_set_oob_input_data(const uint8_t idx, const uint8_t *val
     memset(link[idx].auth, 0, 16);
     if (num_flag) {
         /* Provisioner inputs number */
-        memcpy(link[idx].auth + 12, val, sizeof(uint32_t));
+        sys_memcpy_swap(link[idx].auth + 12, val, sizeof(uint32_t));
     } else {
         /* Provisioner inputs string */
         memcpy(link[idx].auth, val, link[idx].auth_size);
@@ -2094,7 +2104,7 @@ int bt_mesh_provisioner_set_oob_output_data(const uint8_t idx, const uint8_t *nu
     if (num_flag) {
         /* Provisioner output number */
         memset(link[idx].auth, 0, 16);
-        memcpy(link[idx].auth + 16 - size, num, size);
+        sys_memcpy_swap(link[idx].auth + 16 - size, num, size);
     } else {
         /* Provisioner output string */
         memset(link[idx].auth, 0, 16);

components/bt/host/bluedroid/Kconfig.in

@@ -143,6 +143,16 @@ config BT_BLE_BLUFI_ENABLE
     help
         This option can be close when the app does not require blufi function.
 
+config BT_GATT_SR_PROFILES
+    int "Max GATT Server Profiles"
+    depends on BT_GATTS_ENABLE && BT_BLUEDROID_ENABLED
+    range 1 32
+    default 8
+    help
+        Maximum GATT Server Profiles Count
+
+
+
 choice BT_GATTS_SEND_SERVICE_CHANGE_MODE
     prompt "GATTS Service Change Mode"
     default BT_GATTS_SEND_SERVICE_CHANGE_AUTO
@@ -183,6 +193,14 @@ config BT_GATTC_CACHE_NVS_FLASH
     help
         This select can save gattc cache data to nvs flash
 
+config BT_GATTC_CONNECT_RETRY_COUNT
+    int "The number of attempts to reconnect if the connection establishment failed"
+    depends on BT_GATTC_ENABLE
+    range 0 7
+    default 3
+    help
+        The number of attempts to reconnect if the connection establishment failed
+
 config BT_BLE_SMP_ENABLE
     bool "Include BLE security module(SMP)"
     depends on BT_BLE_ENABLED
@@ -945,7 +963,6 @@ menu "BT DEBUG LOG LEVEL"
 
 endmenu #BT DEBUG LOG LEVEL
 
-
 config BT_ACL_CONNECTIONS
     int "BT/BLE MAX ACL CONNECTIONS(1~7)"
     depends on BT_BLUEDROID_ENABLED
@@ -954,6 +971,13 @@ config BT_ACL_CONNECTIONS
     help
         Maximum BT/BLE connection count
 
+config BT_MULTI_CONNECTION_ENBALE
+    bool "Enable BLE multi-conections"
+    depends on BT_BLUEDROID_ENABLED
+    default y
+    help
+        Enable this option if there are multiple connections
+
 config BT_ALLOCATION_FROM_SPIRAM_FIRST
     bool "BT/BLE will first malloc the memory from the PSRAM"
     depends on BT_BLUEDROID_ENABLED

components/bt/host/bluedroid/bta/gatt/bta_gattc_act.c

@@ -973,10 +973,11 @@ void bta_gattc_start_discover(tBTA_GATTC_CLCB *p_clcb, tBTA_GATTC_DATA *p_data)
             p_clcb->p_srcb->srvc_hdl_chg = FALSE;
             p_clcb->p_srcb->update_count = 0;
             p_clcb->p_srcb->state = BTA_GATTC_SERV_DISC_ACT;
-
+            #if (BT_MULTI_CONNECTION_ENBALE == FALSE)
             if (p_clcb->transport == BTA_TRANSPORT_LE) {
                 L2CA_EnableUpdateBleConnParams(p_clcb->p_srcb->server_bda, FALSE);
             }
+            #endif
 
             /* set all srcb related clcb into discovery ST */
             bta_gattc_set_discover_st(p_clcb->p_srcb);

components/bt/host/bluedroid/bta/gatt/bta_gattc_cache.c

@@ -616,9 +616,11 @@ static void bta_gattc_explore_srvc(UINT16 conn_id, tBTA_GATTC_SERV *p_srvc_cb)
 
     //server discover end, update connection parameters
 #if BLE_INCLUDED == TRUE
+    #if (BT_MULTI_CONNECTION_ENBALE == FALSE)
     if (p_clcb->transport == BTA_TRANSPORT_LE) {
         L2CA_EnableUpdateBleConnParams(p_clcb->p_srcb->server_bda, TRUE);
     }
+    #endif
     //discover service complete, trigger callback
     tBTA_GATTC cb_data;
     cb_data.dis_cmpl.status  = p_clcb->status;

components/bt/host/bluedroid/btc/profile/std/hf_ag/btc_hf_ag.c

@@ -53,7 +53,11 @@
 /* Max HF Clients Supported From App */
 static UINT16 btc_max_hf_clients = 1;
 /* HF Param Definition */
+#if HFP_DYNAMIC_MEMORY == FALSE
 static hf_local_param_t hf_local_param[BTC_HF_NUM_CB];
+#else
+static hf_local_param_t *hf_local_param;
+#endif
 
 #if (BTM_WBS_INCLUDED == TRUE)
 #ifndef BTC_HF_FEATURES
@@ -296,7 +300,15 @@ bt_status_t btc_hf_execute_service(BOOLEAN b_enable)
 ************************************************************************************/
 bt_status_t btc_hf_init(bt_bdaddr_t *bd_addr)
 {
-    int idx = btc_hf_idx_by_bdaddr(bd_addr);
+    int idx = 0;
+    UNUSED(bd_addr);
+
+#if HFP_DYNAMIC_MEMORY == TRUE
+    if ((hf_local_param = (hf_local_param_t *)osi_malloc(sizeof(hf_local_param_t) * BTC_HF_NUM_CB)) == NULL) {
+        return BT_STATUS_FAIL;
+    }
+#endif
+
     BTC_TRACE_DEBUG("%s - max_hf_clients=%d", __func__, btc_max_hf_clients);
     /* Invoke the enable service API to the core to set the appropriate service_id
      * Internally, the HSP_SERVICE_ID shall also be enabled if HFP is enabled (phone)
@@ -322,10 +334,18 @@ bt_status_t btc_hf_init(bt_bdaddr_t *bd_addr)
 
 void btc_hf_deinit(bt_bdaddr_t *bd_addr)
 {
-    int idx = btc_hf_idx_by_bdaddr(bd_addr);
+    UNUSED(bd_addr);
+
     BTC_TRACE_EVENT("%s", __FUNCTION__);
     btc_dm_disable_service(BTA_HFP_SERVICE_ID);
-    hf_local_param[idx].btc_hf_cb.initialized = false;
+#if HFP_DYNAMIC_MEMORY == TRUE
+    if (hf_local_param) {
+        osi_free(hf_local_param);
+        hf_local_param = NULL;
+    }
+#else
+    hf_local_param[0].btc_hf_cb.initialized = false;
+#endif
 }
 
 static bt_status_t connect_init(bt_bdaddr_t *bd_addr, uint16_t uuid)

components/bt/host/bluedroid/btc/profile/std/include/btc_hf_ag.h

@@ -206,11 +206,6 @@ typedef union
 /* APP ID definition*/
 #define BTC_HF_ID_1    0
 
-#if HFP_DYNAMIC_MEMORY == TRUE
-extern hf_local_param_t *hf_local_param_ptr;
-#define hf_local_param (*hf_local_param_ptr)
-#endif
-
 /* BTC-AG control block to map bdaddr to BTA handle */
 typedef struct
 {

components/bt/host/bluedroid/common/include/common/bluedroid_user_config.h

@@ -134,6 +134,13 @@
 #define UC_BT_GATTC_CACHE_NVS_FLASH_ENABLED    FALSE
 #endif
 
+#ifdef CONFIG_BT_GATTC_CONNECT_RETRY_COUNT
+#define UC_BT_GATTC_CONNECT_RETRY_COUNT    CONFIG_BT_GATTC_CONNECT_RETRY_COUNT
+#else
+#define UC_BT_GATTC_CONNECT_RETRY_COUNT    0
+#endif
+
+
 //SMP
 #ifdef CONFIG_BT_SMP_ENABLE
 #define UC_BT_SMP_ENABLE                       CONFIG_BT_SMP_ENABLE
@@ -203,6 +210,12 @@
 #define UC_BT_ACL_CONNECTIONS                   5
 #endif
 
+#ifdef CONFIG_BT_MULTI_CONNECTION_ENBALE
+#define UC_BT_MULTI_CONNECTION_ENBALE            CONFIG_BT_MULTI_CONNECTION_ENBALE
+#else
+#define UC_BT_MULTI_CONNECTION_ENBALE            FALSE
+#endif
+
 //BT_BLE_ESTAB_LINK_CONN_TOUT
 #ifdef CONFIG_BT_BLE_ESTAB_LINK_CONN_TOUT
 #define UC_BT_BLE_ESTAB_LINK_CONN_TOUT          CONFIG_BT_BLE_ESTAB_LINK_CONN_TOUT
@@ -224,6 +237,14 @@
 #define UC_CONFIG_BT_GATTS_PPCP_CHAR_GAP        FALSE
 #endif
 
+
+#ifdef CONFIG_BT_GATT_MAX_SR_PROFILES
+#define UC_CONFIG_BT_GATT_MAX_SR_PROFILES       CONFIG_BT_GATT_MAX_SR_PROFILES
+#else
+#define UC_CONFIG_BT_GATT_MAX_SR_PROFILES       8
+#endif
+
+
 #ifdef CONFIG_BT_GATTS_SEND_SERVICE_CHANGE_MODE
 #define UC_BT_GATTS_SEND_SERVICE_CHANGE_MODE    CONFIG_BT_GATTS_SEND_SERVICE_CHANGE_MODE
 #else

components/bt/host/bluedroid/common/include/common/bt_target.h

@@ -202,6 +202,18 @@
 #define GATTC_CACHE_NVS             FALSE
 #endif  /* UC_BT_GATTC_ENABLE && UC_BT_GATTC_CACHE_NVS_FLASH_ENABLED */
 
+#if (UC_BT_GATTC_ENABLE && UC_BT_GATTC_CONNECT_RETRY_COUNT)
+#define GATTC_CONNECT_RETRY_COUNT             UC_BT_GATTC_CONNECT_RETRY_COUNT
+#else
+#define GATTC_CONNECT_RETRY_COUNT             0
+#endif  /* UC_BT_GATTC_ENABLE && UC_BT_GATTC_CONNECT_RETRY_COUNT */
+
+#if (GATTC_CONNECT_RETRY_COUNT > 0)
+#define GATTC_CONNECT_RETRY_EN     TRUE
+#else
+#define GATTC_CONNECT_RETRY_EN     FALSE
+#endif
+
 #if (UC_BT_SMP_ENABLE)
 #define SMP_INCLUDED                TRUE
 #if (BLE_INCLUDED == TRUE)
@@ -237,6 +249,16 @@
 #define GATT_MAX_PHY_CHANNEL        UC_BT_ACL_CONNECTIONS
 #endif  /* UC_BT_ACL_CONNECTIONS */
 
+#ifdef UC_BT_MULTI_CONNECTION_ENBALE
+#define BT_MULTI_CONNECTION_ENBALE  UC_BT_MULTI_CONNECTION_ENBALE
+#endif
+
+#if(BT_MULTI_CONNECTION_ENBALE && (CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3))
+#define BLE_CE_LEN_MIN           5
+#else
+#define BLE_CE_LEN_MIN           0
+#endif
+
 #ifdef UC_BT_BLE_ESTAB_LINK_CONN_TOUT
 #define BLE_ESTABLISH_LINK_CONNECTION_TIMEOUT UC_BT_BLE_ESTAB_LINK_CONN_TOUT
 #endif
@@ -1224,7 +1246,7 @@
 #endif
 
 #ifndef GATT_MAX_SR_PROFILES
-#define GATT_MAX_SR_PROFILES        8 /* max is 32 */
+#define GATT_MAX_SR_PROFILES        UC_CONFIG_BT_GATT_MAX_SR_PROFILES
 #endif
 
 #ifndef GATT_MAX_APPS

components/bt/host/bluedroid/main/bte_init.c

@@ -93,6 +93,10 @@
 #include "bta_hf_client_int.h"
 #endif
 
+#if BTA_AG_INCLUDED == TRUE
+#include "bta_ag_int.h"
+#endif
+
 #if BTA_SDP_INCLUDED == TRUE
 #include "bta_sdp_int.h"
 #endif
@@ -216,6 +220,12 @@ void BTE_DeinitStack(void)
         osi_free(bta_hf_client_cb_ptr);
         bta_hf_client_cb_ptr = NULL;
     }
+#endif
+#if (defined BTA_AG_INCLUDED && BTA_AG_INCLUDED == TRUE)
+    if (bta_ag_cb_ptr){
+        osi_free(bta_ag_cb_ptr);
+        bta_ag_cb_ptr = NULL;
+    }
 #endif
     if (bta_dm_conn_srvcs_ptr){
         osi_free(bta_dm_conn_srvcs_ptr);
@@ -374,6 +384,12 @@ bt_status_t BTE_InitStack(void)
     }
     memset((void *)bta_hf_client_cb_ptr, 0, sizeof(tBTA_HF_CLIENT_CB));
 #endif
+#if (defined BTA_AG_INCLUDED && BTA_AG_INCLUDED == TRUE)
+    if ((bta_ag_cb_ptr = (tBTA_AG_CB *)osi_malloc(sizeof(tBTA_AG_CB))) == NULL) {
+        goto error_exit;
+    }
+    memset((void *)bta_ag_cb_ptr, 0, sizeof(tBTA_AG_CB));
+#endif
 #if (defined BTA_JV_INCLUDED && BTA_JV_INCLUDED == TRUE)
     if ((bta_jv_cb_ptr = (tBTA_JV_CB *)osi_malloc(sizeof(tBTA_JV_CB))) == NULL) {
         goto error_exit;

components/bt/host/bluedroid/stack/btm/btm_ble.c

@@ -2076,6 +2076,30 @@ void btm_ble_create_ll_conn_complete (UINT8 status)
         btm_ble_update_mode_operation(HCI_ROLE_UNKNOWN, NULL, status);
     }
 }
+
+/*****************************************************************************
+** Function btm_ble_create_conn_cancel_complete
+**
+** Description LE connection cancel complete.
+**
+******************************************************************************/
+void btm_ble_create_conn_cancel_complete (UINT8 *p)
+{
+    UINT8       status;
+
+    STREAM_TO_UINT8 (status, p);
+
+    switch (status) {
+    case HCI_SUCCESS:
+        if (btm_ble_get_conn_st() == BLE_CONN_CANCEL) {
+            btm_ble_set_conn_st (BLE_CONN_IDLE);
+        }
+        break;
+    default:
+        break;
+    }
+}
+
 /*****************************************************************************
 **  Function        btm_proc_smp_cback
 **

components/bt/host/bluedroid/stack/btm/btm_ble_5_gap.c

@@ -23,9 +23,26 @@ tBTM_BLE_EXTENDED_CB extend_adv_cb;
 
 tBTM_BLE_5_HCI_CBACK ble_5_hci_cb;
 
+#define INVALID_VALUE   0XFF
+extern BOOLEAN BTM_GetLocalResolvablePrivateAddr(BD_ADDR bda);
+extern void BTM_UpdateAddrInfor(uint8_t addr_type, BD_ADDR bda);
+extern void BTM_BleSetStaticAddr(BD_ADDR rand_addr);
+extern uint32_t BTM_BleUpdateOwnType(uint8_t *own_bda_type, tBTM_START_ADV_CMPL_CBACK *cb);
 static tBTM_STATUS btm_ble_ext_adv_params_validate(tBTM_BLE_GAP_EXT_ADV_PARAMS *params);
 static tBTM_STATUS btm_ble_ext_adv_set_data_validate(UINT8 instance, UINT16 len, UINT8 *data);
 
+typedef struct {
+    uint16_t ter_con_handle;
+    bool invalid;
+    UINT8 instance;
+    int duration;
+    int max_events;
+    uint8_t retry_count;
+} tBTM_EXT_ADV_RECORD;
+
+tBTM_EXT_ADV_RECORD adv_record[MAX_BLE_ADV_INSTANCE] = {0};
+extern void btm_ble_inter_set(bool extble_inter);
+
 static char *btm_ble_hci_status_to_str(tHCI_STATUS status)
 {
     switch(status) {
@@ -176,6 +193,16 @@ static char *btm_ble_hci_status_to_str(tHCI_STATUS status)
     return NULL;
 }
 
+void btm_ble_extendadvcb_init(void)
+{
+    memset(&extend_adv_cb, 0, sizeof(tBTM_BLE_EXTENDED_CB));
+}
+
+void btm_ble_advrecod_init(void)
+{
+    memset(&adv_record[0], 0, sizeof(tBTM_EXT_ADV_RECORD)*MAX_BLE_ADV_INSTANCE);
+}
+
 void BTM_BleGapRegisterCallback(tBTM_BLE_5_HCI_CBACK cb)
 {
     if (cb) {
@@ -185,6 +212,15 @@ void BTM_BleGapRegisterCallback(tBTM_BLE_5_HCI_CBACK cb)
     }
 }
 
+void BTM_ExtBleCallbackTrigger(tBTM_BLE_5_GAP_EVENT event, tBTM_BLE_5_GAP_CB_PARAMS *params)
+{
+    if(params && params->status == BTM_SUCCESS) {
+        btm_ble_inter_set(true);
+    }
+    if (ble_5_hci_cb) {
+        ble_5_hci_cb(event, params);
+    }
+}
 
 tBTM_STATUS BTM_BleReadPhy(BD_ADDR bd_addr, UINT8 *tx_phy, UINT8 *rx_phy)
 {
@@ -221,9 +257,9 @@ tBTM_STATUS BTM_BleSetPreferDefaultPhy(UINT8 tx_phy_mask, UINT8 rx_phy_mask)
     }
 
     cb_params.set_perf_def_phy.status = err;
-    if (ble_5_hci_cb) {
-        ble_5_hci_cb(BTM_BLE_5_GAP_SET_PREFERED_DEFAULT_PHY_COMPLETE_EVT, &cb_params);
-    }
+
+    BTM_ExtBleCallbackTrigger(BTM_BLE_5_GAP_SET_PREFERED_DEFAULT_PHY_COMPLETE_EVT, &cb_params);
+
     return status;
 
 }
@@ -247,9 +283,7 @@ tBTM_STATUS BTM_BleSetPreferPhy(BD_ADDR bd_addr, UINT8 all_phys, UINT8 tx_phy_ma
 
     if (!btsnd_hcic_ble_set_phy(p_lcb->handle, all_phys, tx_phy_mask, rx_phy_mask, phy_options)) {
         cb_params.status = BTM_ILLEGAL_VALUE;
-        if (ble_5_hci_cb) {
-            ble_5_hci_cb(BTM_BLE_5_GAP_SET_PREFERED_PHY_COMPLETE_EVT, &cb_params);
-        }
+        BTM_ExtBleCallbackTrigger(BTM_BLE_5_GAP_SET_PREFERED_PHY_COMPLETE_EVT, &cb_params);
     }
 
 
@@ -285,6 +319,12 @@ tBTM_STATUS BTM_BleSetExtendedAdvRandaddr(UINT8 instance, BD_ADDR rand_addr)
             BTM_TRACE_ERROR("%s, fail to send the hci command, the error code = %s(0x%x)",
                             __func__, btm_ble_hci_status_to_str(err), err);
             status = BTM_ILLEGAL_VALUE;
+        } else {
+            // set random address success, update address infor
+            if(extend_adv_cb.inst[instance].configured && extend_adv_cb.inst[instance].connetable) {
+                BTM_BleSetStaticAddr(rand_addr);
+                BTM_UpdateAddrInfor(BLE_ADDR_RANDOM, rand_addr);
+            }
         }
     } else {
         BTM_TRACE_ERROR("%s invalid random address", __func__);
@@ -295,9 +335,7 @@ tBTM_STATUS BTM_BleSetExtendedAdvRandaddr(UINT8 instance, BD_ADDR rand_addr)
 end:
     cb_params.status = status;
 
-    if (ble_5_hci_cb) {
-        ble_5_hci_cb(BTM_BLE_5_GAP_EXT_ADV_SET_RAND_ADDR_COMPLETE_EVT, &cb_params);
-    }
+    BTM_ExtBleCallbackTrigger(BTM_BLE_5_GAP_EXT_ADV_SET_RAND_ADDR_COMPLETE_EVT, &cb_params);
 
     return status;
 
@@ -307,6 +345,8 @@ tBTM_STATUS BTM_BleSetExtendedAdvParams(UINT8 instance, tBTM_BLE_GAP_EXT_ADV_PAR
     tBTM_STATUS status = BTM_SUCCESS;
     tHCI_STATUS err = HCI_SUCCESS;
     tBTM_BLE_5_GAP_CB_PARAMS cb_params = {0};
+    bool use_rpa_addr = false;
+    BD_ADDR rand_addr;
 
     if (instance >= MAX_BLE_ADV_INSTANCE) {
         status = BTM_ILLEGAL_VALUE;
@@ -335,6 +375,15 @@ tBTM_STATUS BTM_BleSetExtendedAdvParams(UINT8 instance, tBTM_BLE_GAP_EXT_ADV_PAR
     } else {
         extend_adv_cb.inst[instance].legacy_pdu = false;
     }
+    // if own_addr_type == BLE_ADDR_PUBLIC_ID or BLE_ADDR_RANDOM_ID,
+    if((params->own_addr_type == BLE_ADDR_PUBLIC_ID || params->own_addr_type == BLE_ADDR_RANDOM_ID) && BTM_GetLocalResolvablePrivateAddr(rand_addr)) {
+        params->own_addr_type = BLE_ADDR_RANDOM;
+        use_rpa_addr = true;
+    } else if(params->own_addr_type == BLE_ADDR_PUBLIC_ID){
+        params->own_addr_type = BLE_ADDR_PUBLIC;
+    } else if (params->own_addr_type == BLE_ADDR_RANDOM_ID) {
+        params->own_addr_type = BLE_ADDR_RANDOM;
+    }
 
     if ((err = btsnd_hcic_ble_set_ext_adv_params(instance, params->type, params->interval_min, params->interval_max,
                                       params->channel_map, params->own_addr_type, params->peer_addr_type,
@@ -343,18 +392,24 @@ tBTM_STATUS BTM_BleSetExtendedAdvParams(UINT8 instance, tBTM_BLE_GAP_EXT_ADV_PAR
                                       params->secondary_phy, params->sid, params->scan_req_notif)) != HCI_SUCCESS) {
         BTM_TRACE_ERROR("LE EA SetParams: cmd err=0x%x", err);
         status = BTM_ILLEGAL_VALUE;
-	goto end;
+        goto end;
     }
 
     extend_adv_cb.inst[instance].configured = true;
 
 end:
-
-    cb_params.status = status;
-
-    if (ble_5_hci_cb) {
-        ble_5_hci_cb(BTM_BLE_5_GAP_EXT_ADV_SET_PARAMS_COMPLETE_EVT, &cb_params);
+    if(use_rpa_addr) {
+        // update RPA address
+        if((err = btsnd_hcic_ble_set_extend_rand_address(instance, rand_addr)) != HCI_SUCCESS) {
+            BTM_TRACE_ERROR("LE EA SetParams: cmd err=0x%x", err);
+            status = BTM_ILLEGAL_VALUE;
+        } else {
+            // set addr success, update address infor
+            BTM_UpdateAddrInfor(BLE_ADDR_RANDOM, rand_addr);
+        }
     }
+    cb_params.status = status;
+    BTM_ExtBleCallbackTrigger(BTM_BLE_5_GAP_EXT_ADV_SET_PARAMS_COMPLETE_EVT, &cb_params);
 
     return status;
 }
@@ -405,10 +460,7 @@ tBTM_STATUS BTM_BleConfigExtendedAdvDataRaw(BOOLEAN is_scan_rsp, UINT8 instance,
 
 end:
     cb_params.status = status;
-
-    if (ble_5_hci_cb) {
-        ble_5_hci_cb(is_scan_rsp ? BTM_BLE_5_GAP_EXT_SCAN_RSP_DATA_SET_COMPLETE_EVT : BTM_BLE_5_GAP_EXT_ADV_DATA_SET_COMPLETE_EVT, &cb_params);
-    }
+    BTM_ExtBleCallbackTrigger(is_scan_rsp ? BTM_BLE_5_GAP_EXT_SCAN_RSP_DATA_SET_COMPLETE_EVT : BTM_BLE_5_GAP_EXT_ADV_DATA_SET_COMPLETE_EVT, &cb_params);
 
     return status;
 }
@@ -475,17 +527,72 @@ end:
         for (int i = 0; i < MAX_BLE_ADV_INSTANCE; i++) {
             extend_adv_cb.inst[i].configured = false;
         }
+        // disable all ext adv
+        if(num == 0) {
+
+            for (uint8_t i = 0; i < MAX_BLE_ADV_INSTANCE; i++)
+            {
+                adv_record[i].invalid = false;
+                adv_record[i].instance = INVALID_VALUE;
+                adv_record[i].duration = INVALID_VALUE;
+                adv_record[i].max_events = INVALID_VALUE;
+                adv_record[i].retry_count = 0;
+            }
+        } else {
+            for (uint8_t i = 0; i < num; i++)
+            {
+                uint8_t index = ext_adv[i].instance;
+                adv_record[index].invalid = false;
+                adv_record[index].instance = INVALID_VALUE;
+                adv_record[index].duration = INVALID_VALUE;
+                adv_record[index].max_events = INVALID_VALUE;
+                adv_record[index].retry_count = 0;
+            }
+        }
+    }
+    // start extend adv success, save the adv information
+    if(enable && status == BTM_SUCCESS) {
+        for (uint8_t i = 0; i < num; i++)
+        {
+            uint8_t index = ext_adv[i].instance;
+            adv_record[index].invalid = true;
+            adv_record[index].instance = ext_adv[i].instance;
+            adv_record[index].duration = ext_adv[i].duration;
+            adv_record[index].max_events = ext_adv[i].max_events;
+            adv_record[index].retry_count = 0;
+        }
     }
 
     cb_params.status = status;
-
-    if (ble_5_hci_cb) {
-        ble_5_hci_cb(enable ? BTM_BLE_5_GAP_EXT_ADV_START_COMPLETE_EVT : BTM_BLE_5_GAP_EXT_ADV_STOP_COMPLETE_EVT, &cb_params);
-    }
+    BTM_ExtBleCallbackTrigger(enable ? BTM_BLE_5_GAP_EXT_ADV_START_COMPLETE_EVT : BTM_BLE_5_GAP_EXT_ADV_STOP_COMPLETE_EVT, &cb_params);
 
     return status;
 }
 
+tBTM_STATUS BTM_BleStartExtAdvRestart(uint8_t con_handle)
+{
+   tBTM_BLE_EXT_ADV ext_adv;
+   uint8_t index = INVALID_VALUE;
+   for (uint8_t i = 0; i < MAX_BLE_ADV_INSTANCE; i++)
+   {
+       if(adv_record[i].ter_con_handle == con_handle) {
+           index = i;
+           break;
+       }
+    }
+
+    if((index >= MAX_BLE_ADV_INSTANCE) || (!adv_record[index].invalid) || (adv_record[index].retry_count > GATTC_CONNECT_RETRY_COUNT)) {
+        return BTM_WRONG_MODE;
+    }
+
+    adv_record[index].retry_count ++;
+    BTM_TRACE_DEBUG("remote device did not reveive aux connect response, retatrt the extend adv to reconnect, adv handle %d con_handle %d\n", index, con_handle);
+    ext_adv.instance = adv_record[index].instance;
+    ext_adv.duration = adv_record[index].duration;
+    ext_adv.max_events = adv_record[index].max_events;
+    return BTM_BleStartExtAdv(true, 1, &ext_adv);
+}
+
 tBTM_STATUS BTM_BleExtAdvSetRemove(UINT8 instance)
 {
     tBTM_STATUS status = BTM_SUCCESS;
@@ -501,15 +608,19 @@ tBTM_STATUS BTM_BleExtAdvSetRemove(UINT8 instance)
     if ((err = btsnd_hcic_ble_remove_adv_set(instance)) != HCI_SUCCESS) {
         BTM_TRACE_ERROR("LE EAS Rm: cmd err=0x%x", err);
         status = BTM_ILLEGAL_VALUE;
+    } else {
+        extend_adv_cb.inst[instance].configured = false;
+        extend_adv_cb.inst[instance].legacy_pdu = false;
+        extend_adv_cb.inst[instance].directed = false;
+        extend_adv_cb.inst[instance].scannable = false;
+        extend_adv_cb.inst[instance].connetable = false;
     }
 
 end:
 
     cb_params.status = status;
 
-    if (ble_5_hci_cb) {
-        ble_5_hci_cb(BTM_BLE_5_GAP_EXT_ADV_SET_REMOVE_COMPLETE_EVT, &cb_params);
-    }
+    BTM_ExtBleCallbackTrigger(BTM_BLE_5_GAP_EXT_ADV_SET_REMOVE_COMPLETE_EVT, &cb_params);
 
     return status;
 }
@@ -523,13 +634,19 @@ tBTM_STATUS BTM_BleExtAdvSetClear(void)
     if ((err = btsnd_hcic_ble_clear_adv_set()) != HCI_SUCCESS) {
         BTM_TRACE_ERROR("LE EAS Clr: cmd err=0x%x", err);
         status = BTM_ILLEGAL_VALUE;
+    } else {
+        for (uint8_t i = 0; i < MAX_BLE_ADV_INSTANCE; i++) {
+            extend_adv_cb.inst[i].configured = false;
+            extend_adv_cb.inst[i].legacy_pdu = false;
+            extend_adv_cb.inst[i].directed = false;
+            extend_adv_cb.inst[i].scannable = false;
+            extend_adv_cb.inst[i].connetable = false;
+        }
     }
 
     cb_params.status = status;
 
-    if (ble_5_hci_cb) {
-        ble_5_hci_cb(BTM_BLE_5_GAP_EXT_ADV_SET_CLEAR_COMPLETE_EVT, &cb_params);
-    }
+    BTM_ExtBleCallbackTrigger(BTM_BLE_5_GAP_EXT_ADV_SET_CLEAR_COMPLETE_EVT, &cb_params);
 
     return status;
 }
@@ -567,9 +684,7 @@ end:
 
     cb_params.status = status;
 
-    if (ble_5_hci_cb) {
-        ble_5_hci_cb(BTM_BLE_5_GAP_PERIODIC_ADV_SET_PARAMS_COMPLETE_EVT, &cb_params);
-    }
+    BTM_ExtBleCallbackTrigger(BTM_BLE_5_GAP_PERIODIC_ADV_SET_PARAMS_COMPLETE_EVT, &cb_params);
 
     return status;
 }
@@ -620,9 +735,7 @@ tBTM_STATUS BTM_BlePeriodicAdvCfgDataRaw(UINT8 instance, UINT16 len, UINT8 *data
 
     cb_params.status = status;
 
-    if (ble_5_hci_cb) {
-        ble_5_hci_cb(BTM_BLE_5_GAP_PERIODIC_ADV_DATA_SET_COMPLETE_EVT, &cb_params);
-    }
+    BTM_ExtBleCallbackTrigger(BTM_BLE_5_GAP_PERIODIC_ADV_DATA_SET_COMPLETE_EVT, &cb_params);
 
     return status;
 }
@@ -648,9 +761,7 @@ end:
 
     cb_params.status = status;
 
-    if (ble_5_hci_cb) {
-        ble_5_hci_cb(enable ? BTM_BLE_5_GAP_PERIODIC_ADV_START_COMPLETE_EVT : BTM_BLE_5_GAP_PERIODIC_ADV_STOP_COMPLETE_EVT, &cb_params);
-    }
+    BTM_ExtBleCallbackTrigger(enable ? BTM_BLE_5_GAP_PERIODIC_ADV_START_COMPLETE_EVT : BTM_BLE_5_GAP_PERIODIC_ADV_STOP_COMPLETE_EVT, &cb_params);
 
     return status;
 
@@ -683,12 +794,11 @@ tBTM_STATUS BTM_BlePeriodicAdvCreateSync(tBTM_BLE_Periodic_Sync_Params *params)
     }
 
 end:
-    if((status != BTM_SUCCESS) && ble_5_hci_cb) {
+    if(status != BTM_SUCCESS) {
         cb_params.status = status;
-        ble_5_hci_cb(BTM_BLE_5_GAP_PERIODIC_ADV_CREATE_SYNC_COMPLETE_EVT, &cb_params);
+        BTM_ExtBleCallbackTrigger(BTM_BLE_5_GAP_PERIODIC_ADV_CREATE_SYNC_COMPLETE_EVT, &cb_params);
     }
 
-
     return status;
 }
 void btm_set_phy_callback(UINT8 status)
@@ -696,9 +806,7 @@ void btm_set_phy_callback(UINT8 status)
     tBTM_BLE_5_GAP_CB_PARAMS cb_params = {0};
     cb_params.status = status;
 
-    if (ble_5_hci_cb) {
-        ble_5_hci_cb(BTM_BLE_5_GAP_SET_PREFERED_PHY_COMPLETE_EVT, &cb_params);
-    }
+    BTM_ExtBleCallbackTrigger(BTM_BLE_5_GAP_SET_PREFERED_PHY_COMPLETE_EVT, &cb_params);
 
 }
 void btm_create_sync_callback(UINT8 status)
@@ -706,9 +814,7 @@ void btm_create_sync_callback(UINT8 status)
     tBTM_BLE_5_GAP_CB_PARAMS cb_params = {0};
     cb_params.status = status;
 
-    if (ble_5_hci_cb) {
-        ble_5_hci_cb(BTM_BLE_5_GAP_PERIODIC_ADV_CREATE_SYNC_COMPLETE_EVT, &cb_params);
-    }
+    BTM_ExtBleCallbackTrigger(BTM_BLE_5_GAP_PERIODIC_ADV_CREATE_SYNC_COMPLETE_EVT, &cb_params);
 }
 
 void btm_read_phy_callback(uint8_t hci_status, uint16_t conn_handle, uint8_t tx_phy, uint8_t rx_phy)
@@ -727,9 +833,7 @@ void btm_read_phy_callback(uint8_t hci_status, uint16_t conn_handle, uint8_t tx_
     cb_params.read_phy.tx_phy = tx_phy;
     cb_params.read_phy.rx_phy = rx_phy;
 
-    if (ble_5_hci_cb) {
-        ble_5_hci_cb(BTM_BLE_5_GAP_READ_PHY_COMPLETE_EVT, &cb_params);
-    }
+    BTM_ExtBleCallbackTrigger(BTM_BLE_5_GAP_READ_PHY_COMPLETE_EVT, &cb_params);
 }
 
 tBTM_STATUS BTM_BlePeriodicAdvSyncCancel(void)
@@ -745,9 +849,7 @@ tBTM_STATUS BTM_BlePeriodicAdvSyncCancel(void)
 
     cb_params.status = status;
 
-    if (ble_5_hci_cb) {
-        ble_5_hci_cb(BTM_BLE_5_GAP_PERIODIC_ADV_SYNC_CANCEL_COMPLETE_EVT, &cb_params);
-    }
+    BTM_ExtBleCallbackTrigger(BTM_BLE_5_GAP_PERIODIC_ADV_SYNC_CANCEL_COMPLETE_EVT, &cb_params);
 
     return status;
 }
@@ -765,9 +867,7 @@ tBTM_STATUS BTM_BlePeriodicAdvSyncTerm(UINT16 sync_handle)
 
     cb_params.status = status;
 
-    if (ble_5_hci_cb) {
-        ble_5_hci_cb(BTM_BLE_5_GAP_PERIODIC_ADV_SYNC_TERMINATE_COMPLETE_EVT, &cb_params);
-    }
+    BTM_ExtBleCallbackTrigger(BTM_BLE_5_GAP_PERIODIC_ADV_SYNC_TERMINATE_COMPLETE_EVT, &cb_params);
 
     return status;
 }
@@ -791,9 +891,7 @@ tBTM_STATUS BTM_BlePeriodicAdvAddDevToList(tBLE_ADDR_TYPE addr_type, BD_ADDR add
 
 end:
     cb_params.status = status;
-    if (ble_5_hci_cb) {
-        ble_5_hci_cb(BTM_BLE_5_GAP_PERIODIC_ADV_ADD_DEV_COMPLETE_EVT, &cb_params);
-    }
+    BTM_ExtBleCallbackTrigger(BTM_BLE_5_GAP_PERIODIC_ADV_ADD_DEV_COMPLETE_EVT, &cb_params);
 
     return status;
 }
@@ -818,9 +916,7 @@ tBTM_STATUS BTM_BlePeriodicAdvRemoveDevFromList(tBLE_ADDR_TYPE addr_type, BD_ADD
 end:
 
     cb_params.status = status;
-    if (ble_5_hci_cb) {
-        ble_5_hci_cb(BTM_BLE_5_GAP_PERIODIC_ADV_REMOVE_DEV_COMPLETE_EVT, &cb_params);
-    }
+    BTM_ExtBleCallbackTrigger(BTM_BLE_5_GAP_PERIODIC_ADV_REMOVE_DEV_COMPLETE_EVT, &cb_params);
     return status;
 }
 
@@ -836,9 +932,7 @@ tBTM_STATUS BTM_BlePeriodicAdvClearDev(void)
     }
 
     cb_params.status = status;
-    if (ble_5_hci_cb) {
-        ble_5_hci_cb(BTM_BLE_5_GAP_PERIODIC_ADV_CLEAR_DEV_COMPLETE_EVT, &cb_params);
-    }
+    BTM_ExtBleCallbackTrigger(BTM_BLE_5_GAP_PERIODIC_ADV_CLEAR_DEV_COMPLETE_EVT, &cb_params);
 
     return status;
 }
@@ -875,6 +969,12 @@ tBTM_STATUS BTM_BleSetExtendedScanParams(tBTM_BLE_EXT_SCAN_PARAMS *params)
         phy_count++;
     }
 
+    if (BTM_BleUpdateOwnType(&params->own_addr_type, NULL) != 0 ) {
+        status = BTM_ILLEGAL_VALUE;
+        BTM_TRACE_ERROR("LE UpdateOwnType err");
+        goto end;
+    }
+
     extend_adv_cb.scan_duplicate = params->scan_duplicate;
 
     if ((err = btsnd_hcic_ble_set_ext_scan_params(params->own_addr_type, params->filter_policy, phy_mask, phy_count,
@@ -887,9 +987,7 @@ end:
 
     cb_params.status = status;
 
-    if (ble_5_hci_cb) {
-        ble_5_hci_cb(BTM_BLE_5_GAP_SET_EXT_SCAN_PARAMS_COMPLETE_EVT, &cb_params);
-    }
+    BTM_ExtBleCallbackTrigger(BTM_BLE_5_GAP_SET_EXT_SCAN_PARAMS_COMPLETE_EVT, &cb_params);
 
     return cb_params.status;
 }
@@ -915,9 +1013,7 @@ end:
 
     cb_params.status = status;
 
-    if (ble_5_hci_cb) {
-        ble_5_hci_cb(enable ? BTM_BLE_5_GAP_EXT_SCAN_START_COMPLETE_EVT : BTM_BLE_5_GAP_EXT_SCAN_STOP_COMPLETE_EVT, &cb_params);
-    }
+    BTM_ExtBleCallbackTrigger(enable ? BTM_BLE_5_GAP_EXT_SCAN_START_COMPLETE_EVT : BTM_BLE_5_GAP_EXT_SCAN_STOP_COMPLETE_EVT, &cb_params);
 
     return status;
 }
@@ -1041,20 +1137,15 @@ void btm_ble_update_phy_evt(tBTM_BLE_UPDATE_PHY *params)
     memcpy(cb_params.phy_update.addr, p_lcb->remote_bd_addr, BD_ADDR_LEN);
 
     // If the user has register the callback function, should callback it to the application.
-    if (ble_5_hci_cb) {
-        ble_5_hci_cb(BTM_BLE_5_GAP_PHY_UPDATE_COMPLETE_EVT, &cb_params);
-    }
+
+    BTM_ExtBleCallbackTrigger(BTM_BLE_5_GAP_PHY_UPDATE_COMPLETE_EVT, &cb_params);
 
     return;
 }
 
 void btm_ble_scan_timeout_evt(void)
 {
-    if (ble_5_hci_cb) {
-        ble_5_hci_cb(BTM_BLE_5_GAP_SCAN_TIMEOUT_EVT, NULL);
-    }
-
-    return;
+    BTM_ExtBleCallbackTrigger(BTM_BLE_5_GAP_SCAN_TIMEOUT_EVT, NULL);
 }
 
 void btm_ble_adv_set_terminated_evt(tBTM_BLE_ADV_TERMINAT *params)
@@ -1066,12 +1157,18 @@ void btm_ble_adv_set_terminated_evt(tBTM_BLE_ADV_TERMINAT *params)
         return;
     }
 
+    // adv terminated due to connection, save the adv handle and connection handle
+    if(params->completed_event == 0x00) {
+        adv_record[params->adv_handle].ter_con_handle = params->conn_handle;
+    } else {
+        adv_record[params->adv_handle].ter_con_handle = INVALID_VALUE;
+        adv_record[params->adv_handle].invalid = false;
+    }
+
     memcpy(&cb_params.adv_term, params, sizeof(tBTM_BLE_ADV_TERMINAT));
 
     // If the user has register the callback function, should callback it to the application.
-    if (ble_5_hci_cb) {
-        ble_5_hci_cb(BTM_BLE_5_GAP_ADV_TERMINATED_EVT, &cb_params);
-    }
+    BTM_ExtBleCallbackTrigger(BTM_BLE_5_GAP_ADV_TERMINATED_EVT, &cb_params);
 
     return;
 }
@@ -1088,9 +1185,7 @@ void btm_ble_ext_adv_report_evt(tBTM_BLE_EXT_ADV_REPORT *params)
     memcpy(&cb_params.ext_adv_report, params, sizeof(tBTM_BLE_EXT_ADV_REPORT));
 
     // If the user has register the callback function, should callback it to the application.
-    if (ble_5_hci_cb) {
-        ble_5_hci_cb(BTM_BLE_5_GAP_EXT_ADV_REPORT_EVT, &cb_params);
-    }
+    BTM_ExtBleCallbackTrigger(BTM_BLE_5_GAP_EXT_ADV_REPORT_EVT, &cb_params);
 
     return;
 
@@ -1108,9 +1203,7 @@ void btm_ble_scan_req_received_evt(tBTM_BLE_SCAN_REQ_RECEIVED *params)
     memcpy(&cb_params.scan_req, params, sizeof(tBTM_BLE_SCAN_REQ_RECEIVED));
 
     // If the user has register the callback function, should callback it to the application.
-    if (ble_5_hci_cb) {
-        ble_5_hci_cb(BTM_BLE_5_GAP_SCAN_REQ_RECEIVED_EVT, &cb_params);
-    }
+    BTM_ExtBleCallbackTrigger(BTM_BLE_5_GAP_SCAN_REQ_RECEIVED_EVT, &cb_params);
 
     return;
 }
@@ -1127,9 +1220,7 @@ void btm_ble_channel_select_algorithm_evt(tBTM_BLE_CHANNEL_SEL_ALG *params)
     memcpy(&cb_params.channel_sel, params, sizeof(tBTM_BLE_CHANNEL_SEL_ALG));
 
     // If the user has register the callback function, should callback it to the application.
-    if (ble_5_hci_cb) {
-        ble_5_hci_cb(BTM_BLE_5_GAP_CHANNEL_SELETE_ALGORITHM_EVT, &cb_params);
-    }
+    BTM_ExtBleCallbackTrigger(BTM_BLE_5_GAP_CHANNEL_SELETE_ALGORITHM_EVT, &cb_params);
 
     return;
 }
@@ -1146,9 +1237,7 @@ void btm_ble_periodic_adv_report_evt(tBTM_PERIOD_ADV_REPORT *params)
     memcpy(&cb_params.period_adv_report, params, sizeof(tBTM_PERIOD_ADV_REPORT));
 
     // If the user has register the callback function, should callback it to the application.
-    if (ble_5_hci_cb) {
-        ble_5_hci_cb(BTM_BLE_5_GAP_PERIODIC_ADV_REPORT_EVT, &cb_params);
-    }
+    BTM_ExtBleCallbackTrigger(BTM_BLE_5_GAP_PERIODIC_ADV_REPORT_EVT, &cb_params);
 
     return;
 
@@ -1166,9 +1255,7 @@ void btm_ble_periodic_adv_sync_lost_evt(tBTM_BLE_PERIOD_ADV_SYNC_LOST *params)
     memcpy(&cb_params.sync_lost, params, sizeof(tBTM_BLE_PERIOD_ADV_SYNC_LOST));
 
     // If the user has register the callback function, should callback it to the application.
-    if (ble_5_hci_cb) {
-        ble_5_hci_cb(BTM_BLE_5_GAP_PERIODIC_ADV_SYNC_LOST_EVT, &cb_params);
-    }
+    BTM_ExtBleCallbackTrigger(BTM_BLE_5_GAP_PERIODIC_ADV_SYNC_LOST_EVT, &cb_params);
 
     return;
 
@@ -1186,9 +1273,7 @@ void btm_ble_periodic_adv_sync_establish_evt(tBTM_BLE_PERIOD_ADV_SYNC_ESTAB *par
     memcpy(&cb_params.sync_estab, params, sizeof(tBTM_BLE_PERIOD_ADV_SYNC_ESTAB));
 
     // If the user has register the callback function, should callback it to the application.
-    if (ble_5_hci_cb) {
-        ble_5_hci_cb(BTM_BLE_5_GAP_PERIODIC_ADV_SYNC_ESTAB_EVT, &cb_params);
-    }
+    BTM_ExtBleCallbackTrigger(BTM_BLE_5_GAP_PERIODIC_ADV_SYNC_ESTAB_EVT, &cb_params);
 
     return;
 

components/bt/host/bluedroid/stack/btm/btm_ble_gap.c

@@ -82,12 +82,25 @@ static UINT8 btm_set_conn_mode_adv_init_addr(tBTM_BLE_INQ_CB *p_cb,
         tBLE_ADDR_TYPE *p_own_addr_type);
 static void btm_ble_stop_observe(void);
 static void btm_ble_stop_discover(void);
+uint32_t BTM_BleUpdateOwnType(uint8_t *own_bda_type, tBTM_START_ADV_CMPL_CBACK *cb);
 
 #define BTM_BLE_INQ_RESULT          0x01
 #define BTM_BLE_OBS_RESULT          0x02
 #define BTM_BLE_SEL_CONN_RESULT     0x04
 #define BTM_BLE_DISCO_RESULT        0x08
 
+static bool is_ble50_inter = false;
+
+void btm_ble_inter_set(bool extble_inter)
+{
+    is_ble50_inter = extble_inter;
+}
+
+bool btm_ble_inter_get(void)
+{
+    return is_ble50_inter;
+}
+
 /* LE states combo bit to check */
 const UINT8 btm_le_state_combo_tbl[BTM_BLE_STATE_MAX][BTM_BLE_STATE_MAX][2] = {
     {/* single state support */
@@ -908,6 +921,140 @@ BOOLEAN BTM_BleConfigPrivacy(BOOLEAN privacy_mode, tBTM_SET_LOCAL_PRIVACY_CBACK
 #endif
 }
 
+/*******************************************************************************
+**
+** Function         BTMGetLocalResolvablePrivateAddr
+**
+** Description      This function is called to get local RPA address
+**
+** Parameters       bda: address pointer.
+**
+**
+*******************************************************************************/
+
+BOOLEAN BTM_GetLocalResolvablePrivateAddr(BD_ADDR bda)
+{
+    tBTM_LE_RANDOM_CB *p_cb = &btm_cb.ble_ctr_cb.addr_mgnt_cb;
+    BTM_TRACE_DEBUG ("get owm resolvable random address");
+
+    if (bda) {
+        /* if privacy disabled, return false */
+        if ((p_cb->exist_addr_bit & BTM_BLE_GAP_ADDR_BIT_RESOLVABLE) == BTM_BLE_GAP_ADDR_BIT_RESOLVABLE) {
+            memcpy(bda, p_cb->resolvale_addr, BD_ADDR_LEN);
+            BTM_TRACE_DEBUG("own resolvable random address: 0x%02x:%02x:%02x:%02x:%02x:%02x",
+                            p_cb->resolvale_addr[0], p_cb->resolvale_addr[1],
+                            p_cb->resolvale_addr[2], p_cb->resolvale_addr[3],
+                            p_cb->resolvale_addr[4], p_cb->resolvale_addr[5]);
+            return TRUE;
+        }
+
+        return FALSE;
+    }
+
+   return FALSE;
+}
+
+/*******************************************************************************
+**
+** Function         BTM_UpdateAddrInfor
+**
+** Description      This function is called to update address information
+**
+** Parameters       addr_type: address type
+**                  bda: address pointer.
+**
+**
+*******************************************************************************/
+void BTM_UpdateAddrInfor(uint8_t addr_type, BD_ADDR bda)
+{
+    btm_cb.ble_ctr_cb.addr_mgnt_cb.own_addr_type = addr_type;
+    memcpy(btm_cb.ble_ctr_cb.addr_mgnt_cb.private_addr, bda, BD_ADDR_LEN);
+}
+
+/*******************************************************************************
+**
+** Function         BTM_BleSetStaticAddr
+**
+** Description      This function is called to save random address
+**
+** Parameters       rand_addr: address pointer.
+**
+**
+*******************************************************************************/
+void BTM_BleSetStaticAddr(BD_ADDR rand_addr)
+{
+    memcpy(btm_cb.ble_ctr_cb.addr_mgnt_cb.static_rand_addr, rand_addr, BD_ADDR_LEN);
+    btm_cb.ble_ctr_cb.addr_mgnt_cb.exist_addr_bit |= BTM_BLE_GAP_ADDR_BIT_RANDOM;
+}
+
+uint32_t BTM_BleUpdateOwnType(uint8_t *own_bda_type, tBTM_START_ADV_CMPL_CBACK *cb)
+{
+    if(*own_bda_type == BLE_ADDR_RANDOM) {
+        if((btm_cb.ble_ctr_cb.addr_mgnt_cb.exist_addr_bit & BTM_BLE_GAP_ADDR_BIT_RANDOM) == BTM_BLE_GAP_ADDR_BIT_RANDOM) {
+            //close privacy
+            #if BLE_PRIVACY_SPT == TRUE
+            if (btm_cb.ble_ctr_cb.privacy_mode != BTM_PRIVACY_NONE) {
+                BTM_BleConfigPrivacy(FALSE, NULL);
+            }
+            #endif
+            btm_cb.ble_ctr_cb.addr_mgnt_cb.own_addr_type = BLE_ADDR_RANDOM;
+            memcpy(btm_cb.ble_ctr_cb.addr_mgnt_cb.private_addr, btm_cb.ble_ctr_cb.addr_mgnt_cb.static_rand_addr, BD_ADDR_LEN);
+            // set address to controller
+            btsnd_hcic_ble_set_random_addr(btm_cb.ble_ctr_cb.addr_mgnt_cb.static_rand_addr);
+
+        } else if((btm_cb.ble_ctr_cb.addr_mgnt_cb.exist_addr_bit & BTM_BLE_GAP_ADDR_BIT_RESOLVABLE) == BTM_BLE_GAP_ADDR_BIT_RESOLVABLE) {
+            btm_cb.ble_ctr_cb.addr_mgnt_cb.own_addr_type = BLE_ADDR_RANDOM;
+            memcpy(btm_cb.ble_ctr_cb.addr_mgnt_cb.private_addr, btm_cb.ble_ctr_cb.addr_mgnt_cb.resolvale_addr, BD_ADDR_LEN);
+            btsnd_hcic_ble_set_random_addr(btm_cb.ble_ctr_cb.addr_mgnt_cb.resolvale_addr);
+        }else {
+            BTM_TRACE_ERROR ("No random address yet, please set random address and try\n");
+            if(cb) {
+                (* cb)(HCI_ERR_ESP_VENDOR_FAIL);
+            }
+            return BTM_ILLEGAL_VALUE;
+        }
+    } else if(*own_bda_type == BLE_ADDR_PUBLIC_ID || *own_bda_type == BLE_ADDR_RANDOM_ID) {
+        if((btm_cb.ble_ctr_cb.addr_mgnt_cb.exist_addr_bit & BTM_BLE_GAP_ADDR_BIT_RESOLVABLE) == BTM_BLE_GAP_ADDR_BIT_RESOLVABLE) {
+            *own_bda_type = BLE_ADDR_RANDOM;
+            btm_cb.ble_ctr_cb.addr_mgnt_cb.own_addr_type = BLE_ADDR_RANDOM;
+            memcpy(btm_cb.ble_ctr_cb.addr_mgnt_cb.private_addr, btm_cb.ble_ctr_cb.addr_mgnt_cb.resolvale_addr, BD_ADDR_LEN);
+            btsnd_hcic_ble_set_random_addr(btm_cb.ble_ctr_cb.addr_mgnt_cb.resolvale_addr);
+        } else {
+            #if BLE_PRIVACY_SPT == TRUE
+            if(btm_cb.ble_ctr_cb.privacy_mode != BTM_PRIVACY_NONE) {
+                BTM_TRACE_ERROR ("Error state\n");
+                if(cb) {
+                    (* cb)(HCI_ERR_ESP_VENDOR_FAIL);
+                }
+                return BTM_ILLEGAL_VALUE;
+            }
+            #endif
+            if(*own_bda_type == BLE_ADDR_PUBLIC_ID) {
+                *own_bda_type = BLE_ADDR_PUBLIC;
+                btm_cb.ble_ctr_cb.addr_mgnt_cb.own_addr_type = BLE_ADDR_PUBLIC;
+            } else { //own_bda_type == BLE_ADDR_RANDOM_ID
+                if((btm_cb.ble_ctr_cb.addr_mgnt_cb.exist_addr_bit & BTM_BLE_GAP_ADDR_BIT_RANDOM) == BTM_BLE_GAP_ADDR_BIT_RANDOM) {
+                    *own_bda_type = BLE_ADDR_RANDOM;
+                    btm_cb.ble_ctr_cb.addr_mgnt_cb.own_addr_type = BLE_ADDR_RANDOM;
+                    memcpy(btm_cb.ble_ctr_cb.addr_mgnt_cb.private_addr, btm_cb.ble_ctr_cb.addr_mgnt_cb.static_rand_addr, BD_ADDR_LEN);
+                    btsnd_hcic_ble_set_random_addr(btm_cb.ble_ctr_cb.addr_mgnt_cb.static_rand_addr);
+                } else {
+                    BTM_TRACE_ERROR ("No RPA and no random address yet, please set RPA or random address and try\n");
+                    if(cb) {
+                        (* cb)(HCI_ERR_ESP_VENDOR_FAIL);
+                    }
+                    return BTM_ILLEGAL_VALUE;
+                }
+            }
+        }
+    } else {
+        btm_cb.ble_ctr_cb.addr_mgnt_cb.own_addr_type = BLE_ADDR_PUBLIC;
+    }
+
+    return BTM_SUCCESS;
+}
+
+
 /*******************************************************************************
 **
 ** Function         BTM_BleConfigLocalIcon
@@ -1345,69 +1492,9 @@ tBTM_STATUS BTM_BleSetAdvParamsAll(UINT16 adv_int_min, UINT16 adv_int_max, UINT8
     if (!controller_get_interface()->supports_ble()) {
         return BTM_ILLEGAL_VALUE;
     }
-
-    if(own_bda_type == BLE_ADDR_RANDOM) {
-        if((btm_cb.ble_ctr_cb.addr_mgnt_cb.exist_addr_bit & BTM_BLE_GAP_ADDR_BIT_RANDOM) == BTM_BLE_GAP_ADDR_BIT_RANDOM) {
-            //close privacy
-            #if BLE_PRIVACY_SPT == TRUE
-            if (btm_cb.ble_ctr_cb.privacy_mode != BTM_PRIVACY_NONE) {
-                BTM_BleConfigPrivacy(FALSE, NULL);
-            }
-            #endif
-            btm_cb.ble_ctr_cb.addr_mgnt_cb.own_addr_type = BLE_ADDR_RANDOM;
-            memcpy(btm_cb.ble_ctr_cb.addr_mgnt_cb.private_addr, btm_cb.ble_ctr_cb.addr_mgnt_cb.static_rand_addr, BD_ADDR_LEN);
-            // set address to controller
-            btsnd_hcic_ble_set_random_addr(btm_cb.ble_ctr_cb.addr_mgnt_cb.static_rand_addr);
-
-        } else if((btm_cb.ble_ctr_cb.addr_mgnt_cb.exist_addr_bit & BTM_BLE_GAP_ADDR_BIT_RESOLVABLE) == BTM_BLE_GAP_ADDR_BIT_RESOLVABLE) {
-            btm_cb.ble_ctr_cb.addr_mgnt_cb.own_addr_type = BLE_ADDR_RANDOM;
-            memcpy(btm_cb.ble_ctr_cb.addr_mgnt_cb.private_addr, btm_cb.ble_ctr_cb.addr_mgnt_cb.resolvale_addr, BD_ADDR_LEN);
-            btsnd_hcic_ble_set_random_addr(btm_cb.ble_ctr_cb.addr_mgnt_cb.resolvale_addr);
-        }else {
-            BTM_TRACE_ERROR ("No random address yet, please set random address and try\n");
-            if(adv_cb) {
-                (* adv_cb)(HCI_ERR_ESP_VENDOR_FAIL);
-            }
-            return BTM_ILLEGAL_VALUE;
-        }
-    } else if(own_bda_type == BLE_ADDR_PUBLIC_ID || own_bda_type == BLE_ADDR_RANDOM_ID) {
-        if((btm_cb.ble_ctr_cb.addr_mgnt_cb.exist_addr_bit & BTM_BLE_GAP_ADDR_BIT_RESOLVABLE) == BTM_BLE_GAP_ADDR_BIT_RESOLVABLE) {
-            own_bda_type = BLE_ADDR_RANDOM;
-            btm_cb.ble_ctr_cb.addr_mgnt_cb.own_addr_type = BLE_ADDR_RANDOM;
-            memcpy(btm_cb.ble_ctr_cb.addr_mgnt_cb.private_addr, btm_cb.ble_ctr_cb.addr_mgnt_cb.resolvale_addr, BD_ADDR_LEN);
-            btsnd_hcic_ble_set_random_addr(btm_cb.ble_ctr_cb.addr_mgnt_cb.resolvale_addr);
-        } else {
-            #if BLE_PRIVACY_SPT == TRUE
-            if(btm_cb.ble_ctr_cb.privacy_mode != BTM_PRIVACY_NONE) {
-                BTM_TRACE_ERROR ("Error state\n");
-                if(adv_cb) {
-                    (* adv_cb)(HCI_ERR_ESP_VENDOR_FAIL);
-                }
-                return BTM_ILLEGAL_VALUE;
-            }
-            #endif
-            if(own_bda_type == BLE_ADDR_PUBLIC_ID) {
-                own_bda_type = BLE_ADDR_PUBLIC;
-                btm_cb.ble_ctr_cb.addr_mgnt_cb.own_addr_type = BLE_ADDR_PUBLIC;
-            } else { //own_bda_type == BLE_ADDR_RANDOM_ID
-                if((btm_cb.ble_ctr_cb.addr_mgnt_cb.exist_addr_bit & BTM_BLE_GAP_ADDR_BIT_RANDOM) == BTM_BLE_GAP_ADDR_BIT_RANDOM) {
-                    own_bda_type = BLE_ADDR_RANDOM;
-                    btm_cb.ble_ctr_cb.addr_mgnt_cb.own_addr_type = BLE_ADDR_RANDOM;
-                    memcpy(btm_cb.ble_ctr_cb.addr_mgnt_cb.private_addr, btm_cb.ble_ctr_cb.addr_mgnt_cb.static_rand_addr, BD_ADDR_LEN);
-                    btsnd_hcic_ble_set_random_addr(btm_cb.ble_ctr_cb.addr_mgnt_cb.static_rand_addr);
-                } else {
-                    BTM_TRACE_ERROR ("No RPA and no random address yet, please set RPA or random address and try\n");
-                    if(adv_cb) {
-                        (* adv_cb)(HCI_ERR_ESP_VENDOR_FAIL);
-                    }
-                    return BTM_ILLEGAL_VALUE;
-                }
-            }
-        }
-    } else {
-        btm_cb.ble_ctr_cb.addr_mgnt_cb.own_addr_type = BLE_ADDR_PUBLIC;
+    if (BTM_BleUpdateOwnType(&own_bda_type, adv_cb) != 0) {
+        return BTM_ILLEGAL_VALUE;
     }
-
     if (!BTM_BLE_ISVALID_PARAM(adv_int_min, BTM_BLE_ADV_INT_MIN, BTM_BLE_ADV_INT_MAX) ||
             !BTM_BLE_ISVALID_PARAM(adv_int_max, BTM_BLE_ADV_INT_MIN, BTM_BLE_ADV_INT_MAX)) {
          BTM_TRACE_ERROR ("adv_int_min or adv_int_max is invalid\n");
@@ -1579,61 +1666,9 @@ tBTM_STATUS BTM_BleSetScanFilterParams(tGATT_IF client_if, UINT32 scan_interval,
     if (!controller_get_interface()->supports_ble()) {
         return BTM_ILLEGAL_VALUE;
     }
-
-    if(addr_type_own == BLE_ADDR_RANDOM) {
-        if((btm_cb.ble_ctr_cb.addr_mgnt_cb.exist_addr_bit & BTM_BLE_GAP_ADDR_BIT_RANDOM) == BTM_BLE_GAP_ADDR_BIT_RANDOM) {
-            //close privacy
-            #if BLE_PRIVACY_SPT == TRUE
-            if (btm_cb.ble_ctr_cb.privacy_mode != BTM_PRIVACY_NONE) {
-                BTM_BleConfigPrivacy(FALSE, NULL);
-            }
-            #endif
-            btm_cb.ble_ctr_cb.addr_mgnt_cb.own_addr_type = BLE_ADDR_RANDOM;
-            memcpy(btm_cb.ble_ctr_cb.addr_mgnt_cb.private_addr, btm_cb.ble_ctr_cb.addr_mgnt_cb.static_rand_addr, BD_ADDR_LEN);
-            // set address to controller
-            btsnd_hcic_ble_set_random_addr(btm_cb.ble_ctr_cb.addr_mgnt_cb.static_rand_addr);
-
-        } else if((btm_cb.ble_ctr_cb.addr_mgnt_cb.exist_addr_bit & BTM_BLE_GAP_ADDR_BIT_RESOLVABLE) == BTM_BLE_GAP_ADDR_BIT_RESOLVABLE) {
-            btm_cb.ble_ctr_cb.addr_mgnt_cb.own_addr_type = BLE_ADDR_RANDOM;
-            memcpy(btm_cb.ble_ctr_cb.addr_mgnt_cb.private_addr, btm_cb.ble_ctr_cb.addr_mgnt_cb.resolvale_addr, BD_ADDR_LEN);
-            btsnd_hcic_ble_set_random_addr(btm_cb.ble_ctr_cb.addr_mgnt_cb.resolvale_addr);
-        }else {
-            BTM_TRACE_ERROR ("No random address yet, please set random address and try\n");
-            return BTM_ILLEGAL_VALUE;
-        }
-    } else if(addr_type_own == BLE_ADDR_PUBLIC_ID || addr_type_own == BLE_ADDR_RANDOM_ID) {
-        if((btm_cb.ble_ctr_cb.addr_mgnt_cb.exist_addr_bit & BTM_BLE_GAP_ADDR_BIT_RESOLVABLE) == BTM_BLE_GAP_ADDR_BIT_RESOLVABLE) {
-            addr_type_own = BLE_ADDR_RANDOM;
-            btm_cb.ble_ctr_cb.addr_mgnt_cb.own_addr_type = BLE_ADDR_RANDOM;
-            memcpy(btm_cb.ble_ctr_cb.addr_mgnt_cb.private_addr, btm_cb.ble_ctr_cb.addr_mgnt_cb.resolvale_addr, BD_ADDR_LEN);
-            btsnd_hcic_ble_set_random_addr(btm_cb.ble_ctr_cb.addr_mgnt_cb.resolvale_addr);
-        } else {
-            #if BLE_PRIVACY_SPT == TRUE
-            if(btm_cb.ble_ctr_cb.privacy_mode != BTM_PRIVACY_NONE) {
-                BTM_TRACE_ERROR ("Error state\n");
-                return BTM_ILLEGAL_VALUE;
-            }
-            #endif
-            if(addr_type_own == BLE_ADDR_PUBLIC_ID) {
-                addr_type_own = BLE_ADDR_PUBLIC;
-                btm_cb.ble_ctr_cb.addr_mgnt_cb.own_addr_type = BLE_ADDR_PUBLIC;
-            } else {
-                //own_bda_type == BLE_ADDR_RANDOM_ID
-                if((btm_cb.ble_ctr_cb.addr_mgnt_cb.exist_addr_bit & BTM_BLE_GAP_ADDR_BIT_RANDOM) == BTM_BLE_GAP_ADDR_BIT_RANDOM) {
-                    addr_type_own = BLE_ADDR_RANDOM;
-                    btm_cb.ble_ctr_cb.addr_mgnt_cb.own_addr_type = BLE_ADDR_RANDOM;
-                    memcpy(btm_cb.ble_ctr_cb.addr_mgnt_cb.private_addr, btm_cb.ble_ctr_cb.addr_mgnt_cb.static_rand_addr, BD_ADDR_LEN);
-                    btsnd_hcic_ble_set_random_addr(btm_cb.ble_ctr_cb.addr_mgnt_cb.static_rand_addr);
-                } else {
-                    BTM_TRACE_ERROR ("No RPA and no random address yet, please set RPA or random address and try\n");
-                    return BTM_ILLEGAL_VALUE;
-                }
-            }
-        }
-    } else {
-        btm_cb.ble_ctr_cb.addr_mgnt_cb.own_addr_type = BLE_ADDR_PUBLIC;
+    if (BTM_BleUpdateOwnType(&addr_type_own, NULL) != 0) {
+        return BTM_ILLEGAL_VALUE;
     }
-
     /* If not supporting extended scan support, use the older range for checking */
     if (btm_cb.cmn_ble_vsc_cb.extended_scan_support == 0) {
         max_scan_interval = BTM_BLE_SCAN_INT_MAX;

components/bt/host/bluedroid/stack/btm/btm_main.c

@@ -37,6 +37,12 @@ tBTM_CB  btm_cb;
 tBTM_CB  *btm_cb_ptr;
 #endif
 
+#if (BLE_50_FEATURE_SUPPORT == TRUE)
+extern void btm_ble_extendadvcb_init(void);
+extern void btm_ble_advrecod_init(void);
+#endif
+
+
 /*******************************************************************************
 **
 ** Function         btm_init
@@ -80,6 +86,11 @@ void btm_init (void)
     btm_ble_sem_init();
 #endif
     btm_sec_dev_init();
+#if (BLE_50_FEATURE_SUPPORT == TRUE)
+    btm_ble_extendadvcb_init();
+    btm_ble_advrecod_init();
+#endif
+
 }
 
 

components/bt/host/bluedroid/stack/btm/include/btm_ble_int.h

@@ -413,6 +413,7 @@ tBTM_STATUS btm_ble_start_adv(void);
 tBTM_STATUS btm_ble_stop_adv(void);
 tBTM_STATUS btm_ble_start_scan(void);
 void btm_ble_create_ll_conn_complete (UINT8 status);
+void btm_ble_create_conn_cancel_complete (UINT8 *p);
 
 /* LE security function from btm_sec.c */
 #if SMP_INCLUDED == TRUE

components/bt/host/bluedroid/stack/btu/btu_hcif.c

@@ -1071,6 +1071,9 @@ static void btu_hcif_hdl_command_complete (UINT16 opcode, UINT8 *p, UINT16 evt_l
     case HCI_BLE_TEST_END:
         btm_ble_test_command_complete(p);
         break;
+    case HCI_BLE_CREATE_CONN_CANCEL:
+        btm_ble_create_conn_cancel_complete(p);
+        break;
 
 #if (defined BLE_PRIVACY_SPT && BLE_PRIVACY_SPT == TRUE)
     case HCI_BLE_ADD_DEV_RESOLVING_LIST:
@@ -2068,6 +2071,8 @@ static void btu_ble_ext_adv_report_evt(UINT8 *p, UINT16 evt_len)
     UINT8 num_reports = {0};
     //UINT8 legacy_event_type = 0;
     UINT16 evt_type = 0;
+    uint8_t addr_type;
+    BD_ADDR bda;
 
     if (!p) {
         HCI_TRACE_ERROR("%s, Invalid params.", __func__);
@@ -2099,8 +2104,16 @@ static void btu_ble_ext_adv_report_evt(UINT8 *p, UINT16 evt_len)
             }
         }
 
-        STREAM_TO_UINT8(ext_adv_report.addr_type, p);
-        STREAM_TO_BDADDR(ext_adv_report.addr, p);
+        STREAM_TO_UINT8(addr_type, p);
+        STREAM_TO_BDADDR(bda, p);
+        // If it is an anonymous adv, skip address resolution
+        if(addr_type != 0xFF) {
+#if (defined BLE_PRIVACY_SPT && BLE_PRIVACY_SPT == TRUE)
+            btm_identity_addr_to_random_pseudo(bda, &addr_type, FALSE);
+#endif
+        }
+        ext_adv_report.addr_type = addr_type;
+        memcpy(ext_adv_report.addr, bda, 6);
         STREAM_TO_UINT8(ext_adv_report.primary_phy, p);
         STREAM_TO_UINT8(ext_adv_report.secondry_phy, p);
         STREAM_TO_UINT8(ext_adv_report.sid, p);

components/bt/host/bluedroid/stack/hcic/hciblecmds.c

@@ -1568,8 +1568,8 @@ BOOLEAN btsnd_hcic_ble_create_ext_conn(tHCI_CreatExtConn *p_conn)
         UINT16_TO_STREAM(pp, params->conn_interval_max);
         UINT16_TO_STREAM(pp, params->conn_latency);
         UINT16_TO_STREAM(pp, params->sup_timeout);
-        UINT16_TO_STREAM(pp, params->min_ce_len);
-        UINT16_TO_STREAM(pp, params->max_ce_len);
+        UINT16_TO_STREAM(pp, BLE_CE_LEN_MIN);
+        UINT16_TO_STREAM(pp, BLE_CE_LEN_MIN);
     }
 
     if (p_conn->init_phy_mask & 0x02) {
@@ -1580,8 +1580,8 @@ BOOLEAN btsnd_hcic_ble_create_ext_conn(tHCI_CreatExtConn *p_conn)
         UINT16_TO_STREAM(pp, params->conn_interval_max);
         UINT16_TO_STREAM(pp, params->conn_latency);
         UINT16_TO_STREAM(pp, params->sup_timeout);
-        UINT16_TO_STREAM(pp, params->min_ce_len);
-        UINT16_TO_STREAM(pp, params->max_ce_len);
+        UINT16_TO_STREAM(pp, BLE_CE_LEN_MIN);
+        UINT16_TO_STREAM(pp, BLE_CE_LEN_MIN);
     }
 
     if (p_conn->init_phy_mask & 0x04) {
@@ -1592,8 +1592,8 @@ BOOLEAN btsnd_hcic_ble_create_ext_conn(tHCI_CreatExtConn *p_conn)
         UINT16_TO_STREAM(pp, params->conn_interval_max);
         UINT16_TO_STREAM(pp, params->conn_latency);
         UINT16_TO_STREAM(pp, params->sup_timeout);
-        UINT16_TO_STREAM(pp, params->min_ce_len);
-        UINT16_TO_STREAM(pp, params->max_ce_len);
+        UINT16_TO_STREAM(pp, BLE_CE_LEN_MIN);
+        UINT16_TO_STREAM(pp, BLE_CE_LEN_MIN);
     }
 
     btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);

components/bt/host/bluedroid/stack/include/stack/btm_ble_api.h

@@ -168,7 +168,11 @@ typedef UINT8   tBTM_BLE_SFP;
 
 /* default connection interval max */
 #ifndef BTM_BLE_CONN_INT_MAX_DEF
+#if CONFIG_IDF_TARGET_ESP32
 #define BTM_BLE_CONN_INT_MAX_DEF     12      /* recommended max: 15 ms = 12 * 1.25 */
+#else
+#define BTM_BLE_CONN_INT_MAX_DEF     (((MAX_ACL_CONNECTIONS + 1) * 4) > 12 ? ((MAX_ACL_CONNECTIONS + 1) * 4) : 12)     /* recommended max:  BTM_BLE_CONN_INT_MAX_DEF * 1.25 ms*/
+#endif
 #endif
 
 /* default slave latency */
@@ -700,8 +704,6 @@ typedef void (tBTM_BLE_PF_PARAM_CBACK) (tBTM_BLE_PF_ACTION action_type,
 #define MAX_BLE_ADV_INSTANCE 10
 typedef struct {
     UINT8                       inst_id;
-    BOOLEAN                     in_use;
-    UINT8                       adv_evt;
     BOOLEAN                     configured;
     BOOLEAN                     legacy_pdu;
 
@@ -714,7 +716,6 @@ typedef struct {
 typedef struct {
     tBTM_BLE_EXTENDED_INST inst[MAX_BLE_ADV_INSTANCE]; /* dynamic array to store adv instance */
     UINT8  scan_duplicate;
-    tBTM_BLE_MULTI_ADV_OPQ  op_q;
 } tBTM_BLE_EXTENDED_CB;
 
 #define BTM_BLE_GAP_SET_EXT_ADV_PROP_CONNECTABLE       (1 << 0)

components/bt/host/bluedroid/stack/l2cap/include/l2c_int.h

@@ -455,6 +455,9 @@ typedef struct t_l2c_linkcb {
     /* connection parameters update order:
        waiting_update_conn_xx -> updating_conn_xx -> current_used_conn_xx
     */
+   /* create connection retry count*/
+   UINT8                retry_create_con;
+   UINT32               start_time_s;
 #endif
 
 #if (L2CAP_ROUND_ROBIN_CHANNEL_SERVICE == TRUE)
@@ -597,6 +600,7 @@ extern BOOLEAN  l2cu_start_post_bond_timer (UINT16 handle);
 extern void     l2cu_release_lcb (tL2C_LCB *p_lcb);
 extern tL2C_LCB *l2cu_find_lcb_by_bd_addr (BD_ADDR p_bd_addr, tBT_TRANSPORT transport);
 extern tL2C_LCB *l2cu_find_lcb_by_handle (UINT16 handle);
+extern uint8_t l2cu_plcb_active_count(void);
 extern void     l2cu_update_lcb_4_bonding (BD_ADDR p_bd_addr, BOOLEAN is_bonding);
 
 extern UINT8    l2cu_get_conn_role (tL2C_LCB *p_this_lcb);

components/bt/host/bluedroid/stack/l2cap/l2c_ble.c

@@ -51,6 +51,7 @@ const tHCI_ExtConnParams ext_conn_params = {
 #endif // #if (BLE_50_FEATURE_SUPPORT == TRUE)
 
 static BOOLEAN l2cble_start_conn_update (tL2C_LCB *p_lcb);
+extern int64_t esp_system_get_time(void);
 
 /*******************************************************************************
 **
@@ -204,6 +205,10 @@ BOOLEAN L2CA_EnableUpdateBleConnParams (BD_ADDR rem_bda, BOOLEAN enable)
     if (p_lcb->current_used_conn_interval <= BTM_BLE_CONN_INT_MAX_DEF && (p_lcb->conn_update_mask & L2C_BLE_CONN_UPDATE_DISABLE) == 0){
         return (FALSE);
     }
+    bool is_disable = (p_lcb->conn_update_mask & L2C_BLE_CONN_UPDATE_DISABLE);
+    if(l2cu_plcb_active_count() >1 && !(enable && is_disable)) {
+        return FALSE;
+    }
 
     if (enable) {
         p_lcb->conn_update_mask &= ~L2C_BLE_CONN_UPDATE_DISABLE;
@@ -363,7 +368,7 @@ void l2cble_scanner_conn_comp (UINT16 handle, BD_ADDR bda, tBLE_ADDR_TYPE type,
                                            p_dev_rec->conn_params.max_conn_int,
                                            p_dev_rec->conn_params.slave_latency,
                                            p_dev_rec->conn_params.supervision_tout,
-                                           0, 0);
+                                           BLE_CE_LEN_MIN, BLE_CE_LEN_MIN);
     }
 
     /* Tell BTM Acl management about the link */
@@ -524,7 +529,7 @@ static BOOLEAN l2cble_start_conn_update (tL2C_LCB *p_lcb)
 #endif
                ) {
                 btsnd_hcic_ble_upd_ll_conn_params(p_lcb->handle, min_conn_int, max_conn_int,
-                                                  slave_latency, supervision_tout, 0, 0);
+                                                  slave_latency, supervision_tout, BLE_CE_LEN_MIN, BLE_CE_LEN_MIN);
             } else {
                 l2cu_send_peer_ble_par_req (p_lcb, min_conn_int, max_conn_int, slave_latency, supervision_tout);
             }
@@ -552,7 +557,7 @@ static BOOLEAN l2cble_start_conn_update (tL2C_LCB *p_lcb)
 #endif
                ) {
                 btsnd_hcic_ble_upd_ll_conn_params(p_lcb->handle, p_lcb->waiting_update_conn_min_interval,
-                                                  p_lcb->waiting_update_conn_max_interval, p_lcb->waiting_update_conn_latency, p_lcb->waiting_update_conn_timeout, 0, 0);
+                                                  p_lcb->waiting_update_conn_max_interval, p_lcb->waiting_update_conn_latency, p_lcb->waiting_update_conn_timeout, BLE_CE_LEN_MIN, BLE_CE_LEN_MIN);
             } else {
                 l2cu_send_peer_ble_par_req (p_lcb, p_lcb->waiting_update_conn_min_interval, p_lcb->waiting_update_conn_max_interval,
                                             p_lcb->waiting_update_conn_latency, p_lcb->waiting_update_conn_timeout);
@@ -801,7 +806,6 @@ BOOLEAN l2cble_init_direct_conn (tL2C_LCB *p_lcb)
 
 #if ( (defined BLE_PRIVACY_SPT) && (BLE_PRIVACY_SPT == TRUE))
     own_addr_type = btm_cb.ble_ctr_cb.addr_mgnt_cb.own_addr_type;
-
 #if (!CONTROLLER_RPA_LIST_ENABLE)
     if(dev_rec_exist) {
         // if the current address information is valid, get the real address information
@@ -825,7 +829,7 @@ BOOLEAN l2cble_init_direct_conn (tL2C_LCB *p_lcb)
 
 #endif // (!CONTROLLER_RPA_LIST_ENABLE)
 
-#if CONTROLLER_RPA_LIST_ENABLE
+#if (CONTROLLER_RPA_LIST_ENABLE)
 
     if (p_dev_rec->ble.in_controller_list & BTM_RESOLVING_LIST_BIT) {
         if (btm_cb.ble_ctr_cb.privacy_mode >=  BTM_PRIVACY_1_2) {
@@ -839,7 +843,6 @@ BOOLEAN l2cble_init_direct_conn (tL2C_LCB *p_lcb)
     }
 
 #endif // CONTROLLER_RPA_LIST_ENABLE
-
 #endif // (defined BLE_PRIVACY_SPT) && (BLE_PRIVACY_SPT == TRUE)
 
     if (!btm_ble_topology_check(BTM_BLE_STATE_INIT)) {
@@ -847,6 +850,18 @@ BOOLEAN l2cble_init_direct_conn (tL2C_LCB *p_lcb)
         L2CAP_TRACE_ERROR("initate direct connection fail, topology limitation");
         return FALSE;
     }
+    uint32_t link_timeout = L2CAP_BLE_LINK_CONNECT_TOUT;
+    if(GATTC_CONNECT_RETRY_COUNT) {
+        if(!p_lcb->retry_create_con) {
+            p_lcb->start_time_s = (esp_system_get_time()/1000);
+        }
+        uint32_t current_time = (esp_system_get_time()/1000);
+        link_timeout = (L2CAP_BLE_LINK_CONNECT_TOUT*1000 - (current_time - p_lcb->start_time_s))/1000;
+
+        if(link_timeout == 0 || link_timeout > L2CAP_BLE_LINK_CONNECT_TOUT) {
+            link_timeout = L2CAP_BLE_LINK_CONNECT_TOUT;
+        }
+    }
 
     if (!p_lcb->is_aux) {
         if (!btsnd_hcic_ble_create_ll_conn (scan_int,/* UINT16 scan_int      */
@@ -863,8 +878,8 @@ BOOLEAN l2cble_init_direct_conn (tL2C_LCB *p_lcb)
                                                     p_dev_rec->conn_params.slave_latency : BTM_BLE_CONN_SLAVE_LATENCY_DEF), /* UINT16 conn_latency  */
                                             (UINT16) ((p_dev_rec->conn_params.supervision_tout != BTM_BLE_CONN_PARAM_UNDEF) ?
                                                     p_dev_rec->conn_params.supervision_tout : BTM_BLE_CONN_TIMEOUT_DEF), /* conn_timeout */
-                                            0,                       /* UINT16 min_len       */
-                                            0)) {                    /* UINT16 max_len       */
+                                            BLE_CE_LEN_MIN,                       /* UINT16 min_len       */
+                                            BLE_CE_LEN_MIN)) {                    /* UINT16 max_len       */
             l2cu_release_lcb (p_lcb);
             L2CAP_TRACE_ERROR("initate direct connection fail, no resources");
             return (FALSE);
@@ -872,13 +887,28 @@ BOOLEAN l2cble_init_direct_conn (tL2C_LCB *p_lcb)
             p_lcb->link_state = LST_CONNECTING;
             l2cb.is_ble_connecting = TRUE;
             memcpy (l2cb.ble_connecting_bda, p_lcb->remote_bd_addr, BD_ADDR_LEN);
-            btu_start_timer (&p_lcb->timer_entry, BTU_TTYPE_L2CAP_LINK, L2CAP_BLE_LINK_CONNECT_TOUT);
+            btu_start_timer (&p_lcb->timer_entry, BTU_TTYPE_L2CAP_LINK, link_timeout);
             btm_ble_set_conn_st (BLE_DIR_CONN);
 
             return (TRUE);
         }
     } else {
 #if (BLE_50_FEATURE_SUPPORT == TRUE)
+
+        /*
+        * 0x00 Public Device Address
+        * 0x01 Random Device Address
+        * 0x02 Public Identity Address (corresponds to Resolved Private Address)
+        * 0x03 Random (static) Identity Address (corresponds to Resolved Private Address)
+        * 0xFF No address provided (anonymous advertisement)
+        */
+
+        if ((peer_addr_type & BLE_ADDR_RANDOM) == BLE_ADDR_RANDOM) {
+            peer_addr_type = BLE_ADDR_RANDOM;
+        } else {
+            peer_addr_type = BLE_ADDR_PUBLIC;
+        }
+
         tHCI_CreatExtConn aux_conn = {0};
         aux_conn.filter_policy = FALSE;
         aux_conn.own_addr_type = own_addr_type;
@@ -899,7 +929,7 @@ BOOLEAN l2cble_init_direct_conn (tL2C_LCB *p_lcb)
         p_lcb->link_state = LST_CONNECTING;
         l2cb.is_ble_connecting = TRUE;
         memcpy (l2cb.ble_connecting_bda, p_lcb->remote_bd_addr, BD_ADDR_LEN);
-        btu_start_timer (&p_lcb->timer_entry, BTU_TTYPE_L2CAP_LINK, L2CAP_BLE_LINK_CONNECT_TOUT);
+        btu_start_timer (&p_lcb->timer_entry, BTU_TTYPE_L2CAP_LINK, link_timeout);
         btm_ble_set_conn_st (BLE_DIR_CONN);
         if(!btsnd_hcic_ble_create_ext_conn(&aux_conn)) {
             l2cu_release_lcb (p_lcb);
@@ -1104,12 +1134,12 @@ void l2cble_process_rc_param_request_evt(UINT16 handle, UINT16 int_min, UINT16 i
         /* if update is enabled, always accept connection parameter update */
         if ((p_lcb->conn_update_mask & L2C_BLE_CONN_UPDATE_DISABLE) == 0) {
             p_lcb->conn_update_mask |= L2C_BLE_UPDATE_PENDING;
-            btsnd_hcic_ble_rc_param_req_reply(handle, int_min, int_max, latency, timeout, 0, 0);
+            btsnd_hcic_ble_rc_param_req_reply(handle, int_min, int_max, latency, timeout, BLE_CE_LEN_MIN, BLE_CE_LEN_MIN);
         }else {
             /* always accept connection parameters request which is sent by itself */
             if (int_max == BTM_BLE_CONN_INT_MIN) {
                 p_lcb->conn_update_mask |= L2C_BLE_UPDATE_PENDING;
-                btsnd_hcic_ble_rc_param_req_reply(handle, int_min, int_max, latency, timeout, 0, 0);
+                btsnd_hcic_ble_rc_param_req_reply(handle, int_min, int_max, latency, timeout, BLE_CE_LEN_MIN, BLE_CE_LEN_MIN);
             }else {
                 L2CAP_TRACE_EVENT ("L2CAP - LE - update currently disabled");
                 p_lcb->conn_update_mask |= L2C_BLE_NEW_CONN_PARAM;

components/bt/host/bluedroid/stack/l2cap/l2c_link.c

@@ -42,6 +42,11 @@
 
 static BOOLEAN l2c_link_send_to_lower (tL2C_LCB *p_lcb, BT_HDR *p_buf);
 
+#if (BLE_50_FEATURE_SUPPORT == TRUE)
+extern tBTM_STATUS BTM_BleStartExtAdvRestart(uint8_t handle);
+#endif// #if (BLE_50_FEATURE_SUPPORT == TRUE)
+extern bool btm_ble_inter_get(void);
+
 /*******************************************************************************
 **
 ** Function         l2c_link_hci_conn_req
@@ -333,7 +338,6 @@ void l2c_link_sec_comp (BD_ADDR p_bda, tBT_TRANSPORT transport, void *p_ref_data
     }
 }
 
-
 /*******************************************************************************
 **
 ** Function         l2c_link_hci_disc_comp
@@ -456,7 +460,38 @@ BOOLEAN l2c_link_hci_disc_comp (UINT16 handle, UINT8 reason)
         }
 
         p_lcb->p_pending_ccb = NULL;
+#if (BLE_INCLUDED == TRUE && GATTC_CONNECT_RETRY_EN == TRUE)
+        if(reason == HCI_ERR_CONN_FAILED_ESTABLISHMENT && p_lcb->transport == BT_TRANSPORT_LE) {
 
+            if(p_lcb->link_role == HCI_ROLE_MASTER && p_lcb->retry_create_con < GATTC_CONNECT_RETRY_COUNT) {
+                L2CAP_TRACE_DEBUG("master retry connect, retry count %d reason 0x%x\n",  p_lcb->retry_create_con, reason);
+                p_lcb->retry_create_con ++;
+                // create connection retry
+                if (l2cu_create_conn(p_lcb, BT_TRANSPORT_LE)) {
+                    btm_acl_removed (p_lcb->remote_bd_addr, BT_TRANSPORT_LE);
+                    lcb_is_free = FALSE;    /* still using this lcb */
+                }
+            }
+
+            #if (BLE_50_FEATURE_SUPPORT == TRUE)
+            if(btm_ble_inter_get() && p_lcb->link_role == HCI_ROLE_SLAVE && p_lcb->retry_create_con < GATTC_CONNECT_RETRY_COUNT) {
+                p_lcb->retry_create_con ++;
+                L2CAP_TRACE_DEBUG("slave restart extend adv, retry count %d reason 0x%x\n", p_lcb->retry_create_con, reason);
+                BTM_BleStartExtAdvRestart(handle);
+            }
+            #endif // #if (BLE_50_FEATURE_SUPPORT == TRUE)
+
+            #if (BLE_42_FEATURE_SUPPORT == TRUE)
+            if(!btm_ble_inter_get() && p_lcb->link_role == HCI_ROLE_SLAVE && p_lcb->retry_create_con < GATTC_CONNECT_RETRY_COUNT) {
+                p_lcb->retry_create_con ++;
+                L2CAP_TRACE_DEBUG("slave resatrt adv, retry count %d reason 0x%x\n", p_lcb->retry_create_con, reason);
+                btm_ble_start_adv();
+            }
+            #endif // #if (BLE_42_FEATURE_SUPPORT == TRUE)
+        }
+
+
+#endif // #if (BLE_INCLUDED == TRUE)
         /* Release the LCB */
         if (lcb_is_free) {
             l2cu_release_lcb (p_lcb);

components/bt/host/bluedroid/stack/l2cap/l2c_utils.c

@@ -158,6 +158,10 @@ void l2cu_release_lcb (tL2C_LCB *p_lcb)
 
     p_lcb->in_use     = FALSE;
     p_lcb->is_bonding = FALSE;
+#if (BLE_INCLUDED == TRUE)
+    p_lcb->retry_create_con = 0;
+    p_lcb->start_time_s = 0;
+#endif // #if (BLE_INCLUDED == TRUE)
 
     /* Stop and release timers */
     btu_free_timer (&p_lcb->timer_entry);
@@ -335,6 +339,26 @@ tL2C_LCB  *l2cu_find_free_lcb (void)
     return (NULL);
 }
 
+uint8_t l2cu_plcb_active_count(void)
+{
+    list_node_t *p_node = NULL;
+    tL2C_LCB    *p_lcb  = NULL;
+    uint8_t active_count = 0;
+    for (p_node = list_begin(l2cb.p_lcb_pool); p_node; p_node = list_next(p_node)) {
+        p_lcb = list_node(p_node);
+        if (p_lcb && p_lcb->in_use) {
+            active_count ++;
+        }
+    }
+    if (active_count >= MAX_L2CAP_CHANNELS) {
+        L2CAP_TRACE_ERROR("error active count");
+        active_count = 0;
+    }
+    L2CAP_TRACE_DEBUG("plcb active count %d", active_count);
+    return active_count;
+
+}
+
 /*******************************************************************************
 **
 ** Function         l2cu_get_conn_role

components/bt/host/bluedroid/stack/smp/smp_act.c

@@ -1540,9 +1540,11 @@ void smp_idle_terminate(tSMP_CB *p_cb, tSMP_INT_DATA *p_data)
 *******************************************************************************/
 void smp_fast_conn_param(tSMP_CB *p_cb, tSMP_INT_DATA *p_data)
 {
+#if (BT_MULTI_CONNECTION_ENBALE == FALSE)
     if(p_cb->role == BTM_ROLE_MASTER) {
         L2CA_EnableUpdateBleConnParams(p_cb->pairing_bda, FALSE);
     }
+#endif
 #if (SMP_SLAVE_CON_PARAMS_UPD_ENABLE == TRUE)
     else {
         tBTM_SEC_DEV_REC    *p_rec = btm_find_dev (p_cb->pairing_bda);
@@ -1554,7 +1556,9 @@ void smp_fast_conn_param(tSMP_CB *p_cb, tSMP_INT_DATA *p_data)
         some peripherals are not able to revert to fast connection parameters
         during the start of service discovery. Connection paramter updates
         get enabled again once service discovery completes. */
+        #if (BT_MULTI_CONNECTION_ENBALE == FALSE)
         L2CA_EnableUpdateBleConnParams(p_cb->pairing_bda, FALSE);
+        #endif
     }
 #endif
 }

components/bt/host/bluedroid/stack/smp/smp_utils.c

@@ -1021,7 +1021,9 @@ void smp_proc_pairing_cmpl(tSMP_CB *p_cb)
             //clear flag
             p_rec->ble.skip_update_conn_param = false;
         } else {
+            #if (BT_MULTI_CONNECTION_ENBALE == FALSE)
             L2CA_EnableUpdateBleConnParams(p_cb->pairing_bda, TRUE);
+            #endif
         }
     }
 

components/bt/host/nimble/Kconfig.in

@@ -72,11 +72,15 @@ config BT_NIMBLE_LOG_LEVEL
 
 config BT_NIMBLE_MAX_CONNECTIONS
     int "Maximum number of concurrent connections"
-    range 1 9
-    default BTDM_CTRL_BLE_MAX_CONN
+    range 1 8 if (IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32S3)
+    range 1 9 if IDF_TARGET_ESP32
+    default 3
     depends on BT_NIMBLE_ENABLED
     help
-        Defines maximum number of concurrent BLE connections
+        Defines maximum number of concurrent BLE connections. For ESP32, user
+        is expected to configure BTDM_CTRL_BLE_MAX_CONN from controller menu
+        along with this option. Similarly for ESP32-C3 or ESP32-S3, user is expected to
+        configure BT_CTRL_BLE_MAX_ACT from controller menu.
 
 config BT_NIMBLE_MAX_BONDS
     int "Maximum number of bonds to save across reboots"
@@ -431,6 +435,22 @@ config BT_NIMBLE_HOST_BASED_PRIVACY
         Use this option to do host based Random Private Address resolution.
         If this option is disabled then controller based privacy is used.
 
+config BT_NIMBLE_ENABLE_CONN_REATTEMPT
+    bool "Enable connection reattempts on connection establishment error"
+    default y if (IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32S3)
+    default n if IDF_TARGET_ESP32
+    help
+        Enable to make the NimBLE host to reattempt GAP connection on connection
+        establishment failure.
+
+config BT_NIMBLE_MAX_CONN_REATTEMPT
+    int "Maximum number connection reattempts"
+    range 1 7
+    default 3
+    depends on BT_NIMBLE_ENABLED && BT_NIMBLE_ENABLE_CONN_REATTEMPT
+    help
+        Defines maximum number of connection reattempts.
+
 config BT_NIMBLE_EXT_ADV
     bool "Enable extended advertising."
     default n

components/bt/host/nimble/esp-hci/src/esp_nimble_hci.c

@@ -252,6 +252,7 @@ static struct os_mbuf *ble_hci_trans_acl_buf_alloc(void)
 static void ble_hci_rx_acl(uint8_t *data, uint16_t len)
 {
     struct os_mbuf *m;
+    int rc;
     int sr;
     if (len < BLE_HCI_DATA_HDR_SZ || len > MYNEWT_VAL(BLE_ACL_BUF_SIZE)) {
         return;
@@ -260,9 +261,11 @@ static void ble_hci_rx_acl(uint8_t *data, uint16_t len)
     m = ble_hci_trans_acl_buf_alloc();
 
     if (!m) {
+        ESP_LOGE(TAG, "%s failed to allocate ACL buffers; increase ACL_BUF_COUNT", __func__);
         return;
     }
-    if (os_mbuf_append(m, data, len)) {
+    if ((rc = os_mbuf_append(m, data, len)) != 0) {
+        ESP_LOGE(TAG, "%s failed to os_mbuf_append; rc = %d", __func__, rc);
         os_mbuf_free_chain(m);
         return;
     }

components/bt/include/esp32c3/include/esp_bt.h

@@ -26,7 +26,7 @@ extern "C" {
 #endif
 
 #define ESP_BT_CTRL_CONFIG_MAGIC_VAL    0x5A5AA5A5
-#define ESP_BT_CTRL_CONFIG_VERSION      0x02103080
+#define ESP_BT_CTRL_CONFIG_VERSION      0x02103310
 
 #define ESP_BT_HCI_TL_MAGIC_VALUE   0xfadebead
 #define ESP_BT_HCI_TL_VERSION       0x00010000
@@ -96,6 +96,7 @@ enum {
 #ifdef CONFIG_BT_ENABLED
 
 #define BT_CTRL_BLE_MAX_ACT_LIMIT           10  //Maximum BLE activity limitation
+#define SLAVE_CE_LEN_MIN_DEFAULT             5
 
 #ifdef CONFIG_BT_CTRL_SCAN_DUPL_TYPE
 #define SCAN_DUPLICATE_TYPE_VALUE  CONFIG_BT_CTRL_SCAN_DUPL_TYPE
@@ -161,6 +162,7 @@ enum {
     .mesh_adv_size = MESH_DUPLICATE_SCAN_CACHE_SIZE,                       \
     .coex_phy_coded_tx_rx_time_limit = CONFIG_BT_CTRL_COEX_PHY_CODED_TX_RX_TLIM_EFF, \
     .hw_target_code = BLE_HW_TARGET_CODE_ESP32C3_CHIP_ECO0,                \
+    .slave_ce_len_min = SLAVE_CE_LEN_MIN_DEFAULT,                          \
 };
 
 #else
@@ -225,6 +227,7 @@ typedef struct {
     uint16_t mesh_adv_size;                 /*!< Mesh adv size for scan duplicate */
     uint8_t coex_phy_coded_tx_rx_time_limit;  /*!< limit on max tx/rx time in case of connection using CODED-PHY with Wi-Fi coexistence */
     uint32_t hw_target_code;                /*!< hardware target */
+    uint8_t slave_ce_len_min;
 } esp_bt_controller_config_t;
 
 /**

components/driver/CMakeLists.txt

@@ -76,7 +76,8 @@ idf_component_register(SRCS "${srcs}"
                     INCLUDE_DIRS ${includes}
                     PRIV_INCLUDE_DIRS "include/driver"
                     PRIV_REQUIRES efuse esp_pm esp_timer esp_ipc
-                    REQUIRES esp_ringbuf freertos soc hal esp_hw_support)
+                    REQUIRES esp_ringbuf freertos soc hal esp_hw_support
+                    LDFRAGMENTS linker.lf)
 # (REQUIRES cannot hide soc headers, since many arguments in the driver headers are chip-dependent)
 
 # uses C11 atomic feature

components/driver/Kconfig

@@ -87,6 +87,48 @@ menu "Driver configurations"
                 - Alert logging (i.e., setting of the TWAI_ALERT_AND_LOG flag)
                 will have no effect.
 
+        config TWAI_ERRATA_FIX_BUS_OFF_REC
+            bool "Add SW workaround for REC change during bus-off"
+            depends on IDF_TARGET_ESP32
+            default n
+            help
+                When the bus-off condition is reached, the REC should be reset to 0 and frozen (via LOM) by the
+                driver's ISR. However on the ESP32, there is an edge case where the REC will increase before the
+                driver's ISR can respond in time (e.g., due to the rapid occurrence of bus errors), thus causing the
+                REC to be non-zero after bus-off. A non-zero REC can prevent bus-off recovery as the bus-off recovery
+                condition is that both TEC and REC become 0. Enabling this option will add a workaround in the driver
+                to forcibly reset REC to zero on reaching bus-off.
+
+        config TWAI_ERRATA_FIX_TX_INTR_LOST
+            bool "Add SW workaround for TX interrupt lost errata"
+            depends on IDF_TARGET_ESP32
+            default n
+            help
+                On the ESP32, when a transmit interrupt occurs, and interrupt register is read on the same APB clock
+                cycle, the transmit interrupt could be lost. Enabling this option will add a workaround that checks the
+                transmit buffer status bit to recover any lost transmit interrupt.
+
+        config TWAI_ERRATA_FIX_RX_FRAME_INVALID
+            bool "Add SW workaround for invalid RX frame errata"
+            depends on IDF_TARGET_ESP32
+            default n
+            help
+                On the ESP32, when receiving a data or remote frame, if a bus error occurs in the data or CRC field,
+                the data of the next received frame could be invalid. Enabling this option will add a workaround that
+                will reset the peripheral on detection of this errata condition. Note that if a frame is transmitted on
+                the bus whilst the reset is ongoing, the message will not be receive by the peripheral sent on the bus
+                during the reset, the message will be lost.
+
+        config TWAI_ERRATA_FIX_RX_FIFO_CORRUPT
+            bool "Add SW workaround for RX FIFO corruption errata"
+            depends on IDF_TARGET_ESP32
+            default n
+            help
+                On the ESP32, when the RX FIFO overruns and the RX message counter maxes out at 64 messages, the entire
+                RX FIFO is no longer recoverable. Enabling this option will add a workaround that resets the peripheral
+                on detection of this errata condition. Note that if a frame is being sent on the bus during the reset
+                bus during the reset, the message will be lost.
+
     endmenu # TWAI Configuration
 
     menu "UART configuration"

components/driver/include/driver/adc_common.h

@@ -135,7 +135,7 @@ typedef enum {
  * @brief Digital ADC DMA configuration
  */
 typedef struct adc_digi_init_config_s {
-    uint32_t max_store_buf_size;    ///< Max length of the converted data that driver can store before they are processed. When this length is reached, driver will dump out all the old data and start to store them again.
+    uint32_t max_store_buf_size;    ///< Max length of the converted data that driver can store before they are processed.
     uint32_t conv_num_each_intr;    ///< Bytes of data that can be converted in 1 interrupt.
     uint32_t adc1_chan_mask;        ///< Channel list of ADC1 to be initialized.
     uint32_t adc2_chan_mask;        ///< Channel list of ADC2 to be initialized.

components/driver/include/driver/dedic_gpio.h

@@ -20,6 +20,8 @@
 #include "esp_attr.h"
 #include "soc/soc_caps.h"
 
+#if SOC_DEDICATED_GPIO_SUPPORTED
+
 #ifdef __cplusplus
 extern "C" {
 #endif
@@ -171,3 +173,5 @@ esp_err_t dedic_gpio_bundle_set_interrupt_and_callback(dedic_gpio_bundle_handle_
 #ifdef __cplusplus
 }
 #endif
+
+#endif //SOC_DEDICATED_GPIO_SUPPORTED

components/driver/include/driver/gpio.h

@@ -3,7 +3,7 @@
 // Licensed under the Apache License, Version 2.0 (the "License");
 // you may not use this file except in compliance with the License.
 // You may obtain a copy of the License at
-
+//
 //     http://www.apache.org/licenses/LICENSE-2.0
 //
 // Unless required by applicable law or agreed to in writing, software
@@ -492,28 +492,6 @@ esp_err_t gpio_sleep_set_direction(gpio_num_t gpio_num, gpio_mode_t mode);
  *     - ESP_ERR_INVALID_ARG : Parameter error
  */
 esp_err_t gpio_sleep_set_pull_mode(gpio_num_t gpio_num, gpio_pull_mode_t pull);
-
-#if CONFIG_GPIO_ESP32_SUPPORT_SWITCH_SLP_PULL
-/**
-  * @brief Emulate ESP32S2 behaviour to backup FUN_PU, FUN_PD information
-  *
-  * @note Need to be called before sleep.
-  *
-  * @return
-  *      - ESP_OK Success
-  */
-esp_err_t gpio_sleep_pupd_config_apply(gpio_num_t gpio_num);
-
-/**
-  * @brief Emulate ESP32S2 behaviour to restore FUN_PU, FUN_PD information
-  *
-  * @note Need to be called after sleep.
-  *
-  * @return
-  *      - ESP_OK Success
-  */
-esp_err_t gpio_sleep_pupd_config_unapply(gpio_num_t gpio_num);
-#endif
 #endif
 
 #if SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP

components/driver/include/driver/rtc_io.h

@@ -17,10 +17,12 @@
 
 #include <stdint.h>
 #include "esp_err.h"
-#include "driver/gpio.h"
 #include "soc/soc_caps.h"
 #include "soc/rtc_io_periph.h"
 #include "hal/rtc_io_types.h"
+#include "driver/gpio.h"
+
+
 #ifdef __cplusplus
 extern "C" {
 #endif
@@ -42,6 +44,7 @@ static inline bool rtc_gpio_is_valid_gpio(gpio_num_t gpio_num)
 
 #define RTC_GPIO_IS_VALID_GPIO(gpio_num) rtc_gpio_is_valid_gpio(gpio_num) // Deprecated, use rtc_gpio_is_valid_gpio()
 
+#if SOC_RTCIO_INPUT_OUTPUT_SUPPORTED
 /**
  * @brief Get RTC IO index number by gpio number.
  *
@@ -52,15 +55,9 @@ static inline bool rtc_gpio_is_valid_gpio(gpio_num_t gpio_num)
  */
 static inline int rtc_io_number_get(gpio_num_t gpio_num)
 {
-#if SOC_RTCIO_INPUT_OUTPUT_SUPPORTED
     return rtc_io_num_map[gpio_num];
-#else
-    return gpio_num;
-#endif
 }
 
-#if SOC_RTCIO_INPUT_OUTPUT_SUPPORTED
-
 /**
  * @brief Init a GPIO as RTC GPIO
  *

components/driver/include/driver/spi_slave_hd.h

@@ -58,7 +58,9 @@ typedef enum {
 typedef struct {
     slave_cb_t cb_buffer_tx;                    ///< Callback when master reads from shared buffer
     slave_cb_t cb_buffer_rx;                    ///< Callback when master writes to shared buffer
+    slave_cb_t cb_send_dma_ready;               ///< Callback when TX data buffer is loaded to the hardware (DMA)
     slave_cb_t cb_sent;                         ///< Callback when data are sent
+    slave_cb_t cb_recv_dma_ready;               ///< Callback when RX data buffer is loaded to the hardware (DMA)
     slave_cb_t cb_recv;                         ///< Callback when data are received
     slave_cb_t cb_cmd9;                         ///< Callback when CMD9 received
     slave_cb_t cb_cmdA;                         ///< Callback when CMDA received

components/driver/include/driver/twai.h

@@ -53,22 +53,25 @@ extern "C" {
  * @note    The TWAI_ALERT_AND_LOG flag is not an actual alert, but will configure
  *          the TWAI driver to log to UART when an enabled alert occurs.
  */
-#define TWAI_ALERT_TX_IDLE                  0x0001  /**< Alert(1): No more messages to transmit */
-#define TWAI_ALERT_TX_SUCCESS               0x0002  /**< Alert(2): The previous transmission was successful */
-#define TWAI_ALERT_BELOW_ERR_WARN           0x0004  /**< Alert(4): Both error counters have dropped below error warning limit */
-#define TWAI_ALERT_ERR_ACTIVE               0x0008  /**< Alert(8): TWAI controller has become error active */
-#define TWAI_ALERT_RECOVERY_IN_PROGRESS     0x0010  /**< Alert(16): TWAI controller is undergoing bus recovery */
-#define TWAI_ALERT_BUS_RECOVERED            0x0020  /**< Alert(32): TWAI controller has successfully completed bus recovery */
-#define TWAI_ALERT_ARB_LOST                 0x0040  /**< Alert(64): The previous transmission lost arbitration */
-#define TWAI_ALERT_ABOVE_ERR_WARN           0x0080  /**< Alert(128): One of the error counters have exceeded the error warning limit */
-#define TWAI_ALERT_BUS_ERROR                0x0100  /**< Alert(256): A (Bit, Stuff, CRC, Form, ACK) error has occurred on the bus */
-#define TWAI_ALERT_TX_FAILED                0x0200  /**< Alert(512): The previous transmission has failed (for single shot transmission) */
-#define TWAI_ALERT_RX_QUEUE_FULL            0x0400  /**< Alert(1024): The RX queue is full causing a frame to be lost */
-#define TWAI_ALERT_ERR_PASS                 0x0800  /**< Alert(2048): TWAI controller has become error passive */
-#define TWAI_ALERT_BUS_OFF                  0x1000  /**< Alert(4096): Bus-off condition occurred. TWAI controller can no longer influence bus */
-#define TWAI_ALERT_ALL                      0x1FFF  /**< Bit mask to enable all alerts during configuration */
-#define TWAI_ALERT_NONE                     0x0000  /**< Bit mask to disable all alerts during configuration */
-#define TWAI_ALERT_AND_LOG                  0x2000  /**< Bit mask to enable alerts to also be logged when they occur. Note that logging from the ISR is disabled if CONFIG_TWAI_ISR_IN_IRAM is enabled (see docs). */
+#define TWAI_ALERT_TX_IDLE                  0x00000001  /**< Alert(1): No more messages to transmit */
+#define TWAI_ALERT_TX_SUCCESS               0x00000002  /**< Alert(2): The previous transmission was successful */
+#define TWAI_ALERT_BELOW_ERR_WARN           0x00000004  /**< Alert(4): Both error counters have dropped below error warning limit */
+#define TWAI_ALERT_ERR_ACTIVE               0x00000008  /**< Alert(8): TWAI controller has become error active */
+#define TWAI_ALERT_RECOVERY_IN_PROGRESS     0x00000010  /**< Alert(16): TWAI controller is undergoing bus recovery */
+#define TWAI_ALERT_BUS_RECOVERED            0x00000020  /**< Alert(32): TWAI controller has successfully completed bus recovery */
+#define TWAI_ALERT_ARB_LOST                 0x00000040  /**< Alert(64): The previous transmission lost arbitration */
+#define TWAI_ALERT_ABOVE_ERR_WARN           0x00000080  /**< Alert(128): One of the error counters have exceeded the error warning limit */
+#define TWAI_ALERT_BUS_ERROR                0x00000100  /**< Alert(256): A (Bit, Stuff, CRC, Form, ACK) error has occurred on the bus */
+#define TWAI_ALERT_TX_FAILED                0x00000200  /**< Alert(512): The previous transmission has failed (for single shot transmission) */
+#define TWAI_ALERT_RX_QUEUE_FULL            0x00000400  /**< Alert(1024): The RX queue is full causing a frame to be lost */
+#define TWAI_ALERT_ERR_PASS                 0x00000800  /**< Alert(2048): TWAI controller has become error passive */
+#define TWAI_ALERT_BUS_OFF                  0x00001000  /**< Alert(4096): Bus-off condition occurred. TWAI controller can no longer influence bus */
+#define TWAI_ALERT_RX_FIFO_OVERRUN          0x00002000  /**< Alert(8192): An RX FIFO overrun has occurred */
+#define TWAI_ALERT_TX_RETRIED               0x00004000  /**< Alert(16384): An message transmission was cancelled and retried due to an errata workaround */
+#define TWAI_ALERT_PERIPH_RESET             0x00008000  /**< Alert(32768): The TWAI controller was reset */
+#define TWAI_ALERT_ALL                      0x0000FFFF  /**< Bit mask to enable all alerts during configuration */
+#define TWAI_ALERT_NONE                     0x00000000  /**< Bit mask to disable all alerts during configuration */
+#define TWAI_ALERT_AND_LOG                  0x00010000  /**< Bit mask to enable alerts to also be logged when they occur. Note that logging from the ISR is disabled if CONFIG_TWAI_ISR_IN_IRAM is enabled (see docs). */
 
 /** @endcond */
 
@@ -114,7 +117,8 @@ typedef struct {
     uint32_t tx_error_counter;      /**< Current value of Transmit Error Counter */
     uint32_t rx_error_counter;      /**< Current value of Receive Error Counter */
     uint32_t tx_failed_count;       /**< Number of messages that failed transmissions */
-    uint32_t rx_missed_count;       /**< Number of messages that were lost due to a full RX queue */
+    uint32_t rx_missed_count;       /**< Number of messages that were lost due to a full RX queue (or errata workaround if enabled) */
+    uint32_t rx_overrun_count;      /**< Number of messages that were lost due to a RX FIFO overrun */
     uint32_t arb_lost_count;        /**< Number of instances arbitration was lost */
     uint32_t bus_error_count;       /**< Number of instances a bus error has occurred */
 } twai_status_info_t;

components/driver/include/esp_private/gpio.h

@@ -0,0 +1,45 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include "sdkconfig.h"
+#include <esp_types.h>
+
+#include "soc/soc_caps.h"
+#include "driver/gpio.h"
+
+#if SOC_GPIO_SUPPORT_SLP_SWITCH
+#if CONFIG_GPIO_ESP32_SUPPORT_SWITCH_SLP_PULL
+/**
+  * @brief Emulate ESP32S2 behaviour to backup FUN_PU, FUN_PD information
+  *
+  * @note Need to be called before sleep.
+  *
+  * @return
+  *      - ESP_OK Success
+  */
+esp_err_t gpio_sleep_pupd_config_apply(gpio_num_t gpio_num);
+
+/**
+  * @brief Emulate ESP32S2 behaviour to restore FUN_PU, FUN_PD information
+  *
+  * @note Need to be called after sleep.
+  *
+  * @return
+  *      - ESP_OK Success
+  */
+esp_err_t gpio_sleep_pupd_config_unapply(gpio_num_t gpio_num);
+#endif
+#endif

components/driver/linker.lf

@@ -0,0 +1,9 @@
+
+[mapping:driver]
+archive: libdriver.a
+entries:
+    # TWAI workarounds that require periph_module_reset() won't work if cache is disabled due to the use of switch jump
+    # tables in periph_module_reset(). We prevent any part of periph_module_reset() (either text or RO data) from being
+    # placed in flash.
+    if TWAI_ISR_IN_IRAM = y  && (TWAI_ERRATA_FIX_RX_FRAME_INVALID = y || TWAI_ERRATA_FIX_RX_FIFO_CORRUPT = y):
+        periph_ctrl: periph_module_reset (noflash)

components/driver/periph_ctrl.c

@@ -13,6 +13,7 @@
 // limitations under the License.
 #include "freertos/FreeRTOS.h"
 #include "hal/clk_gate_ll.h"
+#include "esp_attr.h"
 #include "driver/periph_ctrl.h"
 
 static portMUX_TYPE periph_spinlock = portMUX_INITIALIZER_UNLOCKED;

components/driver/spi_slave_hd.c

@@ -350,6 +350,15 @@ static IRAM_ATTR void spi_slave_hd_intr_segment(void *arg)
         if (ret == pdTRUE) {
             spi_slave_hd_hal_txdma(hal, host->tx_desc->data, host->tx_desc->len);
             tx_sent = true;
+            if (callback->cb_send_dma_ready) {
+                spi_slave_hd_event_t ev = {
+                    .event = SPI_EV_SEND_DMA_READY,
+                    .trans = host->tx_desc,
+                };
+                BaseType_t cb_awoken = pdFALSE;
+                callback->cb_send_dma_ready(callback->arg, &ev, &cb_awoken);
+                awoken |= cb_awoken;
+            }
         }
     }
     if (!host->rx_desc) {
@@ -357,6 +366,15 @@ static IRAM_ATTR void spi_slave_hd_intr_segment(void *arg)
         if (ret == pdTRUE) {
             spi_slave_hd_hal_rxdma(hal, host->rx_desc->data, host->rx_desc->len);
             rx_sent = true;
+            if (callback->cb_recv_dma_ready) {
+                spi_slave_hd_event_t ev = {
+                    .event = SPI_EV_RECV_DMA_READY,
+                    .trans = host->rx_desc,
+                };
+                BaseType_t cb_awoken = pdFALSE;
+                callback->cb_recv_dma_ready(callback->arg, &ev, &cb_awoken);
+                awoken |= cb_awoken;
+            }
         }
     }
 
@@ -483,7 +501,6 @@ esp_err_t spi_slave_hd_queue_trans(spi_host_device_t host_id, spi_slave_chan_t c
 {
     spi_slave_hd_slot_t* host = spihost[host_id];
 
-    SPIHD_CHECK(trans->len <= SPI_MAX_DMA_LEN, "Currently we only support transaction with data length within 4092 bytes", ESP_ERR_INVALID_ARG);
     SPIHD_CHECK(host->append_mode == 0, "This API should be used for SPI Slave HD Segment Mode", ESP_ERR_INVALID_STATE);
     SPIHD_CHECK(esp_ptr_dma_capable(trans->data), "The buffer should be DMA capable.", ESP_ERR_INVALID_ARG);
     SPIHD_CHECK(trans->len <= host->max_transfer_sz && trans->len > 0, "Invalid buffer size", ESP_ERR_INVALID_ARG);

components/driver/test/test_i2c.c

@@ -267,7 +267,7 @@ TEST_CASE("I2C driver memory leaking check", "[i2c]")
     TEST_ASSERT_INT_WITHIN(100, size, esp_get_free_heap_size());
 }
 
-#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32S3, ESP32C3)
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32S3)
 
 // print the reading buffer
 static void disp_buf(uint8_t *buf, int len)
@@ -397,7 +397,7 @@ static void slave_write_buffer_test(void)
 
 TEST_CASE_MULTIPLE_DEVICES("I2C master read slave test", "[i2c][test_env=UT_T2_I2C][timeout=150]", master_read_slave_test, slave_write_buffer_test);
 
-#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32, ESP32C3)
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32)
 static void i2c_master_write_read_test(void)
 {
     uint8_t *data_rd = (uint8_t *) malloc(DATA_LENGTH);
@@ -538,8 +538,8 @@ static void i2c_slave_repeat_read(void)
 TEST_CASE_MULTIPLE_DEVICES("I2C repeat write test", "[i2c][test_env=UT_T2_I2C][timeout=150]", i2c_master_repeat_write, i2c_slave_repeat_read);
 
 
-#endif  //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32S3, ESP32C3)
-#endif  //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32S3, ESP32C3)
+#endif  //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32S3)
+#endif  //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32S3)
 
 static volatile bool exit_flag;
 static bool test_read_func;

components/driver/timer.c

@@ -474,14 +474,14 @@ bool IRAM_ATTR timer_group_get_auto_reload_in_isr(timer_group_t group_num, timer
     return timer_hal_get_auto_reload(&(p_timer_obj[group_num][timer_num]->hal));
 }
 
-esp_err_t timer_spinlock_take(timer_group_t group_num)
+esp_err_t IRAM_ATTR timer_spinlock_take(timer_group_t group_num)
 {
     TIMER_CHECK(group_num < TIMER_GROUP_MAX, TIMER_GROUP_NUM_ERROR, ESP_ERR_INVALID_ARG);
     TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
     return ESP_OK;
 }
 
-esp_err_t timer_spinlock_give(timer_group_t group_num)
+esp_err_t IRAM_ATTR timer_spinlock_give(timer_group_t group_num)
 {
     TIMER_CHECK(group_num < TIMER_GROUP_MAX, TIMER_GROUP_NUM_ERROR, ESP_ERR_INVALID_ARG);
     TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);

components/driver/twai.c

@@ -12,7 +12,6 @@
 // See the License for the specific language governing permissions and
 // limitations under the License.
 
-#include "soc/soc_caps.h"
 
 #include "sdkconfig.h"
 #include "freertos/FreeRTOS.h"
@@ -28,6 +27,7 @@
 #include "driver/gpio.h"
 #include "driver/periph_ctrl.h"
 #include "driver/twai.h"
+#include "soc/soc_caps.h"
 #include "soc/twai_periph.h"
 #include "hal/twai_hal.h"
 #include "esp_rom_gpio.h"
@@ -69,6 +69,7 @@ typedef struct {
     twai_state_t state;
     twai_mode_t mode;
     uint32_t rx_missed_count;
+    uint32_t rx_overrun_count;
     uint32_t tx_failed_count;
     uint32_t arb_lost_count;
     uint32_t bus_error_count;
@@ -128,19 +129,49 @@ TWAI_ISR_ATTR static void twai_alert_handler(uint32_t alert_code, int *alert_req
 
 static inline void twai_handle_rx_buffer_frames(BaseType_t *task_woken, int *alert_req)
 {
+#ifdef SOC_TWAI_SUPPORTS_RX_STATUS
     uint32_t msg_count = twai_hal_get_rx_msg_count(&twai_context);
 
     for (uint32_t i = 0; i < msg_count; i++) {
         twai_hal_frame_t frame;
-        twai_hal_read_rx_buffer_and_clear(&twai_context, &frame);
-        //Copy frame into RX Queue
-        if (xQueueSendFromISR(p_twai_obj->rx_queue, &frame, task_woken) == pdTRUE) {
-            p_twai_obj->rx_msg_count++;
-        } else {
-            p_twai_obj->rx_missed_count++;
-            twai_alert_handler(TWAI_ALERT_RX_QUEUE_FULL, alert_req);
+        if (twai_hal_read_rx_buffer_and_clear(&twai_context, &frame)) {
+            //Valid frame copied from RX buffer
+            if (xQueueSendFromISR(p_twai_obj->rx_queue, &frame, task_woken) == pdTRUE) {
+                p_twai_obj->rx_msg_count++;
+            } else {    //Failed to send to queue
+                p_twai_obj->rx_missed_count++;
+                twai_alert_handler(TWAI_ALERT_RX_QUEUE_FULL, alert_req);
+            }
+        } else {    //Failed to read from RX buffer because message is overrun
+            p_twai_obj->rx_overrun_count++;
+            twai_alert_handler(TWAI_ALERT_RX_FIFO_OVERRUN, alert_req);
         }
     }
+#else   //SOC_TWAI_SUPPORTS_RX_STATUS
+    uint32_t msg_count = twai_hal_get_rx_msg_count(&twai_context);
+    bool overrun = false;
+    //Clear all valid RX frames
+    for (int i = 0; i < msg_count; i++) {
+        twai_hal_frame_t frame;
+        if (twai_hal_read_rx_buffer_and_clear(&twai_context, &frame)) {
+            //Valid frame copied from RX buffer
+            if (xQueueSendFromISR(p_twai_obj->rx_queue, &frame, task_woken) == pdTRUE) {
+                p_twai_obj->rx_msg_count++;
+            } else {
+                p_twai_obj->rx_missed_count++;
+                twai_alert_handler(TWAI_ALERT_RX_QUEUE_FULL, alert_req);
+            }
+        } else {
+            overrun = true;
+            break;
+        }
+    }
+    //All remaining frames are treated as overrun. Clear them all
+    if (overrun) {
+        p_twai_obj->rx_overrun_count += twai_hal_clear_rx_fifo_overrun(&twai_context);
+        twai_alert_handler(TWAI_ALERT_RX_FIFO_OVERRUN, alert_req);
+    }
+#endif  //SOC_TWAI_SUPPORTS_RX_STATUS
 }
 
 static inline void twai_handle_tx_buffer_frame(BaseType_t *task_woken, int *alert_req)
@@ -176,56 +207,65 @@ TWAI_ISR_ATTR static void twai_intr_handler_main(void *arg)
 {
     BaseType_t task_woken = pdFALSE;
     int alert_req = 0;
-    uint32_t event;
+    uint32_t events;
     TWAI_ENTER_CRITICAL_ISR();
-    if (p_twai_obj == NULL) {    //Incase intr occurs whilst driver is being uninstalled
+    if (p_twai_obj == NULL) {    //In case intr occurs whilst driver is being uninstalled
         TWAI_EXIT_CRITICAL_ISR();
         return;
     }
-    event = twai_hal_decode_interrupt_events(&twai_context);
-    if (event & TWAI_HAL_EVENT_RX_BUFF_FRAME) {
+    events = twai_hal_get_events(&twai_context);    //Get the events that triggered the interrupt
+
+#if defined(CONFIG_TWAI_ERRATA_FIX_RX_FRAME_INVALID) || defined(CONFIG_TWAI_ERRATA_FIX_RX_FIFO_CORRUPT)
+    if (events & TWAI_HAL_EVENT_NEED_PERIPH_RESET) {
+        twai_hal_prepare_for_reset(&twai_context);
+        periph_module_reset(PERIPH_TWAI_MODULE);
+        twai_hal_recover_from_reset(&twai_context);
+        p_twai_obj->rx_missed_count += twai_hal_get_reset_lost_rx_cnt(&twai_context);
+        twai_alert_handler(TWAI_ALERT_PERIPH_RESET, &alert_req);
+    }
+#endif
+    if (events & TWAI_HAL_EVENT_RX_BUFF_FRAME) {
+        //Note: This event will never occur if there is a periph reset event
         twai_handle_rx_buffer_frames(&task_woken, &alert_req);
     }
-    //TX command should be the last command related handler to be called, so that
-    //other command register bits do not overwrite the TX command bit.
-    if (event & TWAI_HAL_EVENT_TX_BUFF_FREE) {
+    if (events & TWAI_HAL_EVENT_TX_BUFF_FREE) {
         twai_handle_tx_buffer_frame(&task_woken, &alert_req);
     }
 
     //Handle events that only require alerting (i.e. no handler)
-    if (event & TWAI_HAL_EVENT_BUS_OFF) {
+    if (events & TWAI_HAL_EVENT_BUS_OFF) {
         p_twai_obj->state = TWAI_STATE_BUS_OFF;
         twai_alert_handler(TWAI_ALERT_BUS_OFF, &alert_req);
     }
-    if (event & TWAI_HAL_EVENT_BUS_RECOV_CPLT) {
+    if (events & TWAI_HAL_EVENT_BUS_RECOV_CPLT) {
         p_twai_obj->state = TWAI_STATE_STOPPED;
         twai_alert_handler(TWAI_ALERT_BUS_RECOVERED, &alert_req);
     }
-    if (event & TWAI_HAL_EVENT_BUS_ERR) {
+    if (events & TWAI_HAL_EVENT_BUS_ERR) {
         p_twai_obj->bus_error_count++;
         twai_alert_handler(TWAI_ALERT_BUS_ERROR, &alert_req);
     }
-    if (event & TWAI_HAL_EVENT_ARB_LOST) {
+    if (events & TWAI_HAL_EVENT_ARB_LOST) {
         p_twai_obj->arb_lost_count++;
         twai_alert_handler(TWAI_ALERT_ARB_LOST, &alert_req);
     }
-    if (event & TWAI_HAL_EVENT_BUS_RECOV_PROGRESS) {
+    if (events & TWAI_HAL_EVENT_BUS_RECOV_PROGRESS) {
         //Bus-recovery in progress. TEC has dropped below error warning limit
         twai_alert_handler(TWAI_ALERT_RECOVERY_IN_PROGRESS, &alert_req);
     }
-    if (event & TWAI_HAL_EVENT_ERROR_PASSIVE) {
+    if (events & TWAI_HAL_EVENT_ERROR_PASSIVE) {
         //Entered error passive
         twai_alert_handler(TWAI_ALERT_ERR_PASS, &alert_req);
     }
-    if (event & TWAI_HAL_EVENT_ERROR_ACTIVE) {
+    if (events & TWAI_HAL_EVENT_ERROR_ACTIVE) {
         //Returned to error active
         twai_alert_handler(TWAI_ALERT_ERR_ACTIVE, &alert_req);
     }
-    if (event & TWAI_HAL_EVENT_ABOVE_EWL) {
+    if (events & TWAI_HAL_EVENT_ABOVE_EWL) {
         //TEC or REC surpassed error warning limit
         twai_alert_handler(TWAI_ALERT_ABOVE_ERR_WARN, &alert_req);
     }
-    if (event & TWAI_HAL_EVENT_BELOW_EWL) {
+    if (events & TWAI_HAL_EVENT_BELOW_EWL) {
         //TEC and REC are both below error warning
         twai_alert_handler(TWAI_ALERT_BELOW_ERR_WARN, &alert_req);
     }
@@ -372,11 +412,7 @@ esp_err_t twai_driver_install(const twai_general_config_t *g_config, const twai_
     TWAI_CHECK(g_config->rx_queue_len > 0, ESP_ERR_INVALID_ARG);
     TWAI_CHECK(g_config->tx_io >= 0 && g_config->tx_io < GPIO_NUM_MAX, ESP_ERR_INVALID_ARG);
     TWAI_CHECK(g_config->rx_io >= 0 && g_config->rx_io < GPIO_NUM_MAX, ESP_ERR_INVALID_ARG);
-#if (CONFIG_ESP32_REV_MIN >= 2)
-    TWAI_CHECK(t_config->brp >= SOC_TWAI_BRP_MIN && t_config->brp <= SOC_TWAI_BRP_MAX_ECO, ESP_ERR_INVALID_ARG);
-#else
     TWAI_CHECK(t_config->brp >= SOC_TWAI_BRP_MIN && t_config->brp <= SOC_TWAI_BRP_MAX, ESP_ERR_INVALID_ARG);
-#endif
 #ifndef CONFIG_TWAI_ISR_IN_IRAM
     TWAI_CHECK(!(g_config->intr_flags & ESP_INTR_FLAG_IRAM), ESP_ERR_INVALID_ARG);
 #endif
@@ -644,6 +680,7 @@ esp_err_t twai_get_status_info(twai_status_info_t *status_info)
     status_info->msgs_to_rx = p_twai_obj->rx_msg_count;
     status_info->tx_failed_count = p_twai_obj->tx_failed_count;
     status_info->rx_missed_count = p_twai_obj->rx_missed_count;
+    status_info->rx_overrun_count = p_twai_obj->rx_overrun_count;
     status_info->arb_lost_count = p_twai_obj->arb_lost_count;
     status_info->bus_error_count = p_twai_obj->bus_error_count;
     status_info->state = p_twai_obj->state;

components/efuse/esp32c3/esp_efuse_table.c

@@ -17,7 +17,7 @@
 #include <assert.h>
 #include "esp_efuse_table.h"
 
-// md5_digest_table f9a84eb22f94a7bc083b4c6817a33a59
+// md5_digest_table 61baa79d296df996c838bc2adc1837e5
 // This file was generated from the file esp_efuse_table.csv. DO NOT CHANGE THIS FILE MANUALLY.
 // If you want to change some fields, you need to change esp_efuse_table.csv file
 // then run `efuse_common_table` or `efuse_custom_table` command it will generate this file.
@@ -484,6 +484,30 @@ static const esp_efuse_desc_t SYS_DATA_PART2[] = {
     {EFUSE_BLK10, 0, 256}, 	 // System configuration,
 };
 
+static const esp_efuse_desc_t K_RTC_LDO[] = {
+    {EFUSE_BLK1, 135, 7}, 	 // BLOCK1 K_RTC_LDO,
+};
+
+static const esp_efuse_desc_t K_DIG_LDO[] = {
+    {EFUSE_BLK1, 142, 7}, 	 // BLOCK1 K_DIG_LDO,
+};
+
+static const esp_efuse_desc_t V_RTC_DBIAS20[] = {
+    {EFUSE_BLK1, 149, 8}, 	 // BLOCK1 voltage of rtc dbias20,
+};
+
+static const esp_efuse_desc_t V_DIG_DBIAS20[] = {
+    {EFUSE_BLK1, 157, 8}, 	 // BLOCK1 voltage of digital dbias20,
+};
+
+static const esp_efuse_desc_t DIG_DBIAS_HVT[] = {
+    {EFUSE_BLK1, 165, 5}, 	 // BLOCK1 digital dbias when hvt,
+};
+
+static const esp_efuse_desc_t THRES_HVT[] = {
+    {EFUSE_BLK1, 170, 10}, 	 // BLOCK1 pvt threshold when hvt,
+};
+
 
 
 
@@ -1062,3 +1086,33 @@ const esp_efuse_desc_t* ESP_EFUSE_SYS_DATA_PART2[] = {
     &SYS_DATA_PART2[0],    		// System configuration
     NULL
 };
+
+const esp_efuse_desc_t* ESP_EFUSE_K_RTC_LDO[] = {
+    &K_RTC_LDO[0],    		// BLOCK1 K_RTC_LDO
+    NULL
+};
+
+const esp_efuse_desc_t* ESP_EFUSE_K_DIG_LDO[] = {
+    &K_DIG_LDO[0],    		// BLOCK1 K_DIG_LDO
+    NULL
+};
+
+const esp_efuse_desc_t* ESP_EFUSE_V_RTC_DBIAS20[] = {
+    &V_RTC_DBIAS20[0],    		// BLOCK1 voltage of rtc dbias20
+    NULL
+};
+
+const esp_efuse_desc_t* ESP_EFUSE_V_DIG_DBIAS20[] = {
+    &V_DIG_DBIAS20[0],    		// BLOCK1 voltage of digital dbias20
+    NULL
+};
+
+const esp_efuse_desc_t* ESP_EFUSE_DIG_DBIAS_HVT[] = {
+    &DIG_DBIAS_HVT[0],    		// BLOCK1 digital dbias when hvt
+    NULL
+};
+
+const esp_efuse_desc_t* ESP_EFUSE_THRES_HVT[] = {
+    &THRES_HVT[0],    		// BLOCK1 pvt threshold when hvt
+    NULL
+};

components/efuse/esp32c3/esp_efuse_table.csv

@@ -153,3 +153,12 @@ KEY3,                                     EFUSE_BLK7,    0,  256,     Key3 or us
 KEY4,                                     EFUSE_BLK8,    0,  256,     Key4 or user data
 KEY5,                                     EFUSE_BLK9,    0,  256,     Key5 or user data
 SYS_DATA_PART2,                           EFUSE_BLK10,   0,  256,     System configuration
+
+# AUTO CONFIG DIG&RTC DBIAS#
+################
+K_RTC_LDO,                              EFUSE_BLK1,    135,    7,      BLOCK1 K_RTC_LDO
+K_DIG_LDO,                              EFUSE_BLK1,    142,    7,      BLOCK1 K_DIG_LDO
+V_RTC_DBIAS20,                          EFUSE_BLK1,    149,    8,      BLOCK1 voltage of rtc dbias20
+V_DIG_DBIAS20,                          EFUSE_BLK1,    157,    8,      BLOCK1 voltage of digital dbias20
+DIG_DBIAS_HVT,                          EFUSE_BLK1,    165,    5,      BLOCK1 digital dbias when hvt
+THRES_HVT,                              EFUSE_BLK1,    170,    10,     BLOCK1 pvt threshold when hvt

components/efuse/esp32c3/include/esp_efuse_table.h

@@ -17,7 +17,7 @@ extern "C" {
 #endif
 
 
-// md5_digest_table f9a84eb22f94a7bc083b4c6817a33a59
+// md5_digest_table 61baa79d296df996c838bc2adc1837e5
 // This file was generated from the file esp_efuse_table.csv. DO NOT CHANGE THIS FILE MANUALLY.
 // If you want to change some fields, you need to change esp_efuse_table.csv file
 // then run `efuse_common_table` or `efuse_custom_table` command it will generate this file.
@@ -138,6 +138,12 @@ extern const esp_efuse_desc_t* ESP_EFUSE_KEY3[];
 extern const esp_efuse_desc_t* ESP_EFUSE_KEY4[];
 extern const esp_efuse_desc_t* ESP_EFUSE_KEY5[];
 extern const esp_efuse_desc_t* ESP_EFUSE_SYS_DATA_PART2[];
+extern const esp_efuse_desc_t* ESP_EFUSE_K_RTC_LDO[];
+extern const esp_efuse_desc_t* ESP_EFUSE_K_DIG_LDO[];
+extern const esp_efuse_desc_t* ESP_EFUSE_V_RTC_DBIAS20[];
+extern const esp_efuse_desc_t* ESP_EFUSE_V_DIG_DBIAS20[];
+extern const esp_efuse_desc_t* ESP_EFUSE_DIG_DBIAS_HVT[];
+extern const esp_efuse_desc_t* ESP_EFUSE_THRES_HVT[];
 
 #ifdef __cplusplus
 }

components/efuse/src/esp32c3/esp_efuse_utility.c

@@ -63,8 +63,14 @@ const esp_efuse_range_addr_t range_write_addr_blocks[] = {
 // Update Efuse timing configuration
 static esp_err_t esp_efuse_set_timing(void)
 {
-    uint32_t clock_hz = esp_clk_apb_freq();
-    return ets_efuse_set_timing(clock_hz) ? ESP_FAIL : ESP_OK;
+    // efuse clock is fixed in ESP32-C3, so the ets_efuse_set_timing() function
+    // takes an argument for compatibility with older ROM functions but it's ignored.
+    int res = ets_efuse_set_timing(0);
+    assert(res == 0);
+
+    REG_SET_FIELD(EFUSE_WR_TIM_CONF2_REG, EFUSE_PWR_OFF_NUM, 0x60);
+
+    return ESP_OK;
 }
 #endif // ifndef CONFIG_EFUSE_VIRTUAL
 

components/esp32c3/Kconfig

@@ -50,41 +50,47 @@ menu "ESP32C3-Specific"
 
     choice ESP32C3_UNIVERSAL_MAC_ADDRESSES
         bool "Number of universally administered (by IEEE) MAC address"
-        default ESP32C3_UNIVERSAL_MAC_ADDRESSES_TWO
+        default ESP32C3_UNIVERSAL_MAC_ADDRESSES_FOUR
         help
             Configure the number of universally administered (by IEEE) MAC addresses.
+
             During initialization, MAC addresses for each network interface are generated or derived from a
             single base MAC address.
-            If the number of universal MAC addresses is Two, all interfaces (WiFi station, WiFi softap) receive a
-            universally administered MAC address. They are generated sequentially by adding 0, and 1 (respectively)
-            to the final octet of the base MAC address. If the number of universal MAC addresses is one,
-            only WiFi station receives a universally administered MAC address.
-            It's generated by adding 0 to the base MAC address.
-            The WiFi softap receives local MAC addresses. It's derived from the universal WiFi station MAC addresses.
+
+            If the number of universal MAC addresses is four, all four interfaces (WiFi station, WiFi softap,
+            Bluetooth and Ethernet) receive a universally administered MAC address. These are generated
+            sequentially by adding 0, 1, 2 and 3 (respectively) to the final octet of the base MAC address.
+
+            If the number of universal MAC addresses is two, only two interfaces (WiFi station and Bluetooth)
+            receive a universally administered MAC address. These are generated sequentially by adding 0
+            and 1 (respectively) to the base MAC address. The remaining two interfaces (WiFi softap and Ethernet)
+            receive local MAC addresses. These are derived from the universal WiFi station and Bluetooth MAC
+            addresses, respectively.
+
             When using the default (Espressif-assigned) base MAC address, either setting can be used. When using
             a custom universal MAC address range, the correct setting will depend on the allocation of MAC
-            addresses in this range (either 1 or 2 per device.)
+            addresses in this range (either 2 or 4 per device.)
+
+            Note that ESP32-C3 has no integrated Ethernet MAC. Although it's possible to use the esp_read_mac()
+            API to return a MAC for Ethernet, this can only be used with an external MAC peripheral.
+
 
         config ESP32C3_UNIVERSAL_MAC_ADDRESSES_TWO
             bool "Two"
             select ESP_MAC_ADDR_UNIVERSE_WIFI_STA
             select ESP_MAC_ADDR_UNIVERSE_BT
-        config ESP32C3_UNIVERSAL_MAC_ADDRESSES_THREE
-            bool "Three"
+        config ESP32C3_UNIVERSAL_MAC_ADDRESSES_FOUR
+            bool "Four"
             select ESP_MAC_ADDR_UNIVERSE_WIFI_STA
             select ESP_MAC_ADDR_UNIVERSE_WIFI_AP
             select ESP_MAC_ADDR_UNIVERSE_BT
+            select ESP_MAC_ADDR_UNIVERSE_ETH
     endchoice
 
     config ESP32C3_UNIVERSAL_MAC_ADDRESSES
         int
         default 2 if ESP32C3_UNIVERSAL_MAC_ADDRESSES_TWO
-        default 3 if ESP32C3_UNIVERSAL_MAC_ADDRESSES_THREE
-
-    config ESP_MAC_ADDR_UNIVERSE_BT_OFFSET
-        int
-        default 2 if ESP32C3_UNIVERSAL_MAC_ADDRESSES_THREE
-        default 1 if ESP32C3_UNIVERSAL_MAC_ADDRESSES_TWO
+        default 4 if ESP32C3_UNIVERSAL_MAC_ADDRESSES_FOUR
 
     config ESP32C3_DEBUG_OCDAWARE
         bool "Make exception and panic handlers JTAG/OCD aware"

components/esp32c3/ld/esp32c3.peripherals.ld

@@ -1,6 +1,5 @@
 PROVIDE ( UART0 = 0x60000000 );
 PROVIDE ( UART1 = 0x60010000 );
-PROVIDE ( UART2 = 0x6002e000 );
 PROVIDE ( SPIMEM1 = 0x60002000 );
 PROVIDE ( SPIMEM0 = 0x60003000 );
 PROVIDE ( GPIO = 0x60004000 );

components/esp32s3/Kconfig

@@ -284,41 +284,39 @@ menu "ESP32S3-Specific"
 
     choice ESP32S3_UNIVERSAL_MAC_ADDRESSES
         bool "Number of universally administered (by IEEE) MAC address"
-        default ESP32S3_UNIVERSAL_MAC_ADDRESSES_TWO
+        default ESP32S3_UNIVERSAL_MAC_ADDRESSES_FOUR
         help
             Configure the number of universally administered (by IEEE) MAC addresses.
             During initialization, MAC addresses for each network interface are generated or derived from a
             single base MAC address.
-            If the number of universal MAC addresses is Two, all interfaces (WiFi station, WiFi softap) receive a
-            universally administered MAC address. They are generated sequentially by adding 0, and 1 (respectively)
-            to the final octet of the base MAC address. If the number of universal MAC addresses is one,
-            only WiFi station receives a universally administered MAC address.
-            It's generated by adding 0 to the base MAC address.
-            The WiFi softap receives local MAC addresses. It's derived from the universal WiFi station MAC addresses.
+            If the number of universal MAC addresses is four, all four interfaces (WiFi station, WiFi softap,
+            Bluetooth and Ethernet) receive a universally administered MAC address. These are generated
+            sequentially by adding 0, 1, 2 and 3 (respectively) to the final octet of the base MAC address.
+            If the number of universal MAC addresses is two, only two interfaces (WiFi station and Bluetooth)
+            receive a universally administered MAC address. These are generated sequentially by adding 0
+            and 1 (respectively) to the base MAC address. The remaining two interfaces (WiFi softap and Ethernet)
+            receive local MAC addresses. These are derived from the universal WiFi station and Bluetooth MAC
+            addresses, respectively.
             When using the default (Espressif-assigned) base MAC address, either setting can be used. When using
             a custom universal MAC address range, the correct setting will depend on the allocation of MAC
-            addresses in this range (either 1 or 2 per device.)
+            addresses in this range (either 2 or 4 per device.)
 
         config ESP32S3_UNIVERSAL_MAC_ADDRESSES_TWO
             bool "Two"
             select ESP_MAC_ADDR_UNIVERSE_WIFI_STA
             select ESP_MAC_ADDR_UNIVERSE_BT
-        config ESP32S3_UNIVERSAL_MAC_ADDRESSES_THREE
-            bool "Three"
+        config ESP32S3_UNIVERSAL_MAC_ADDRESSES_FOUR
+            bool "Four"
             select ESP_MAC_ADDR_UNIVERSE_WIFI_STA
             select ESP_MAC_ADDR_UNIVERSE_WIFI_AP
             select ESP_MAC_ADDR_UNIVERSE_BT
+            select ESP_MAC_ADDR_UNIVERSE_ETH
     endchoice
 
     config ESP32S3_UNIVERSAL_MAC_ADDRESSES
         int
         default 2 if ESP32S3_UNIVERSAL_MAC_ADDRESSES_TWO
-        default 3 if ESP32S3_UNIVERSAL_MAC_ADDRESSES_THREE
-
-    config ESP_MAC_ADDR_UNIVERSE_BT_OFFSET
-        int
-        default 2 if ESP32S3_UNIVERSAL_MAC_ADDRESSES_THREE
-        default 1 if ESP32S3_UNIVERSAL_MAC_ADDRESSES_TWO
+        default 4 if ESP32S3_UNIVERSAL_MAC_ADDRESSES_FOUR
 
     config ESP32S3_ULP_COPROC_ENABLED
         bool "Enable Ultra Low Power (ULP) Coprocessor"

components/esp_common/Kconfig

@@ -295,12 +295,6 @@ menu "Common ESP-related"
     config ESP_MAC_ADDR_UNIVERSE_BT
         bool
 
-    config ESP_MAC_ADDR_UNIVERSE_BT_OFFSET
-        int
-        default 2 if ESP32_UNIVERSAL_MAC_ADDRESSES_FOUR
-        default 1 if ESP32_UNIVERSAL_MAC_ADDRESSES_TWO
-        default 1
-
     config ESP_MAC_ADDR_UNIVERSE_ETH
         bool
 

components/esp_common/src/mac_addr.c

@@ -20,6 +20,14 @@
 
 /* esp_system.h APIs relating to MAC addresses */
 
+#if CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES_FOUR   || \
+    CONFIG_ESP32S3_UNIVERSAL_MAC_ADDRESSES_FOUR || \
+    CONFIG_ESP32C3_UNIVERSAL_MAC_ADDRESSES_FOUR
+#define MAC_ADDR_UNIVERSE_BT_OFFSET 2
+#else
+#define MAC_ADDR_UNIVERSE_BT_OFFSET 1
+#endif
+
 static const char* TAG = "system_api";
 
 static uint8_t base_mac_addr[6] = { 0 };
@@ -180,7 +188,7 @@ esp_err_t esp_read_mac(uint8_t* mac, esp_mac_type_t type)
     case ESP_MAC_BT:
 #if CONFIG_ESP_MAC_ADDR_UNIVERSE_BT
         memcpy(mac, efuse_mac, 6);
-        mac[5] += CONFIG_ESP_MAC_ADDR_UNIVERSE_BT_OFFSET;
+        mac[5] += MAC_ADDR_UNIVERSE_BT_OFFSET;
 #endif
         break;
     case ESP_MAC_ETH:

components/esp_http_client/esp_http_client.c

@@ -955,7 +955,7 @@ int esp_http_client_read(esp_http_client_handle_t client, char *buffer, int len)
                 }
                 ESP_LOG_LEVEL(sev, TAG, "esp_transport_read returned:%d and errno:%d ", rlen, errno);
             }
-            if (rlen < 0 && ridx == 0) {
+            if (rlen < 0 && ridx == 0 && !esp_http_client_is_complete_data_received(client)) {
                 return ESP_FAIL;
             } else {
                 return ridx;

components/esp_hw_support/port/esp32/rtc_sleep.c

@@ -180,6 +180,7 @@ void rtc_sleep_init(rtc_sleep_config_t cfg)
         CLEAR_PERI_REG_MASK(RTC_CNTL_ANA_CONF_REG,
                 RTC_CNTL_CKGEN_I2C_PU | RTC_CNTL_PLL_I2C_PU |
                 RTC_CNTL_RFRX_PBUS_PU | RTC_CNTL_TXRF_I2C_PU);
+        CLEAR_PERI_REG_MASK(RTC_CNTL_OPTIONS0_REG, RTC_CNTL_BB_I2C_FORCE_PU);
     } else {
         CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_PWC_REG, RTC_CNTL_DG_WRAP_PD_EN);
         REG_SET_FIELD(RTC_CNTL_BIAS_CONF_REG, RTC_CNTL_DBG_ATTEN, 0);

components/esp_hw_support/port/esp32c3/rtc_clk.c

@@ -121,39 +121,6 @@ bool rtc_clk_8md256_enabled(void)
     return GET_PERI_REG_MASK(RTC_CNTL_CLK_CONF_REG, RTC_CNTL_ENB_CK8M_DIV) == 0;
 }
 
-void rtc_clk_set_xtal_wait(void)
-{
-    /*
-     the `xtal_wait` time need 1ms, so we need calibrate slow clk period,
-     and `RTC_CNTL_XTL_BUF_WAIT` depend on it.
-    */
-    rtc_slow_freq_t slow_clk_freq = rtc_clk_slow_freq_get();
-    rtc_cal_sel_t cal_clk = RTC_CAL_RTC_MUX;
-    if (slow_clk_freq == RTC_SLOW_FREQ_32K_XTAL) {
-        cal_clk = RTC_CAL_32K_XTAL;
-    } else if (slow_clk_freq == RTC_SLOW_FREQ_8MD256) {
-        cal_clk  = RTC_CAL_8MD256;
-    }
-    uint32_t slow_clk_period = rtc_clk_cal(cal_clk, 2000);
-    uint32_t xtal_wait_1ms = 100;
-    if (slow_clk_period) {
-        xtal_wait_1ms = (1000 << RTC_CLK_CAL_FRACT) / slow_clk_period;
-    }
-    REG_SET_FIELD(RTC_CNTL_TIMER1_REG, RTC_CNTL_XTL_BUF_WAIT, xtal_wait_1ms);
-}
-
-static void wait_dig_dbias_valid(uint64_t rtc_cycles)
-{
-    rtc_slow_freq_t slow_clk_freq = rtc_clk_slow_freq_get();
-    rtc_cal_sel_t cal_clk = RTC_CAL_RTC_MUX;
-    if (slow_clk_freq == RTC_SLOW_FREQ_32K_XTAL) {
-        cal_clk = RTC_CAL_32K_XTAL;
-    } else if (slow_clk_freq == RTC_SLOW_FREQ_8MD256) {
-        cal_clk = RTC_CAL_8MD256;
-    }
-    rtc_clk_cal(cal_clk, rtc_cycles);
-}
-
 void rtc_clk_slow_freq_set(rtc_slow_freq_t slow_freq)
 {
     REG_SET_FIELD(RTC_CNTL_CLK_CONF_REG, RTC_CNTL_ANA_CLK_RTC_SEL, slow_freq);
@@ -168,7 +135,6 @@ void rtc_clk_slow_freq_set(rtc_slow_freq_t slow_freq)
     so if the slow_clk is 8md256, clk_8m must be force power on
     */
     REG_SET_FIELD(RTC_CNTL_CLK_CONF_REG, RTC_CNTL_CK8M_FORCE_PU, (slow_freq == RTC_SLOW_FREQ_8MD256) ? 1 : 0);
-    rtc_clk_set_xtal_wait();
     esp_rom_delay_us(DELAY_SLOW_CLK_SWITCH);
 }
 
@@ -314,24 +280,15 @@ void rtc_clk_bbpll_configure(rtc_xtal_freq_t xtal_freq, int pll_freq)
  */
 static void rtc_clk_cpu_freq_to_pll_mhz(int cpu_freq_mhz)
 {
-    int origin_soc_clk = REG_GET_FIELD(SYSTEM_SYSCLK_CONF_REG, SYSTEM_SOC_CLK_SEL);
-    int origin_cpuperiod_sel = REG_GET_FIELD(SYSTEM_CPU_PER_CONF_REG, SYSTEM_CPUPERIOD_SEL);
-    int dbias = DIG_DBIAS_80M;
     int per_conf = DPORT_CPUPERIOD_SEL_80;
     if (cpu_freq_mhz == 80) {
         /* nothing to do */
     } else if (cpu_freq_mhz == 160) {
-        dbias = DIG_DBIAS_160M;
         per_conf = DPORT_CPUPERIOD_SEL_160;
     } else {
         SOC_LOGE(TAG, "invalid frequency");
         abort();
     }
-    REGI2C_WRITE_MASK(I2C_DIG_REG, I2C_DIG_REG_EXT_DIG_DREG, dbias);
-    if ((origin_soc_clk == DPORT_SOC_CLK_SEL_XTAL) || (origin_soc_clk == DPORT_SOC_CLK_SEL_8M)
-        || (((origin_soc_clk == DPORT_SOC_CLK_SEL_PLL) && (0 == origin_cpuperiod_sel)))) {
-        wait_dig_dbias_valid(2);
-    }
     REG_SET_FIELD(SYSTEM_CPU_PER_CONF_REG, SYSTEM_CPUPERIOD_SEL, per_conf);
     REG_SET_FIELD(SYSTEM_SYSCLK_CONF_REG, SYSTEM_PRE_DIV_CNT, 0);
     REG_SET_FIELD(SYSTEM_SYSCLK_CONF_REG, SYSTEM_SOC_CLK_SEL, DPORT_SOC_CLK_SEL_PLL);
@@ -479,18 +436,7 @@ void rtc_clk_cpu_freq_set_xtal(void)
  */
 void rtc_clk_cpu_freq_to_xtal(int freq, int div)
 {
-    int origin_soc_clk = REG_GET_FIELD(SYSTEM_SYSCLK_CONF_REG, SYSTEM_SOC_CLK_SEL);
-    int origin_div_cnt = REG_GET_FIELD(SYSTEM_SYSCLK_CONF_REG, SYSTEM_PRE_DIV_CNT);
     ets_update_cpu_frequency(freq);
-    /* lower the voltage */
-    if (freq <= 2) {
-        REGI2C_WRITE_MASK(I2C_DIG_REG, I2C_DIG_REG_EXT_DIG_DREG, DIG_DBIAS_2M);
-    } else {
-        REGI2C_WRITE_MASK(I2C_DIG_REG, I2C_DIG_REG_EXT_DIG_DREG, DIG_DBIAS_XTAL);
-    }
-    if ((DPORT_SOC_CLK_SEL_XTAL == origin_soc_clk) && (origin_div_cnt > 0)) {
-        wait_dig_dbias_valid(2);
-    }
     /* Set divider from XTAL to APB clock. Need to set divider to 1 (reg. value 0) first. */
     REG_SET_FIELD(SYSTEM_SYSCLK_CONF_REG, SYSTEM_PRE_DIV_CNT, 0);
     REG_SET_FIELD(SYSTEM_SYSCLK_CONF_REG, SYSTEM_PRE_DIV_CNT, div - 1);
@@ -502,13 +448,7 @@ void rtc_clk_cpu_freq_to_xtal(int freq, int div)
 
 static void rtc_clk_cpu_freq_to_8m(void)
 {
-    int origin_soc_clk = REG_GET_FIELD(SYSTEM_SYSCLK_CONF_REG, SYSTEM_SOC_CLK_SEL);
-    int origin_div_cnt = REG_GET_FIELD(SYSTEM_SYSCLK_CONF_REG, SYSTEM_PRE_DIV_CNT);
     ets_update_cpu_frequency(8);
-    REGI2C_WRITE_MASK(I2C_DIG_REG, I2C_DIG_REG_EXT_DIG_DREG, DIG_DBIAS_XTAL);
-    if ((DPORT_SOC_CLK_SEL_XTAL == origin_soc_clk) && (origin_div_cnt > 4)) {
-        wait_dig_dbias_valid(2);
-    }
     REG_SET_FIELD(SYSTEM_SYSCLK_CONF_REG, SYSTEM_PRE_DIV_CNT, 0);
     REG_SET_FIELD(SYSTEM_SYSCLK_CONF_REG, SYSTEM_SOC_CLK_SEL, DPORT_SOC_CLK_SEL_8M);
     rtc_clk_apb_freq_update(RTC_FAST_CLK_FREQ_8M);

components/esp_hw_support/port/esp32c3/rtc_init.c

@@ -31,6 +31,7 @@ static const char *TAG = "rtc_init";
 
 static void set_ocode_by_efuse(int calib_version);
 static void calibrate_ocode(void);
+static void set_rtc_dig_dbias(void);
 
 void rtc_init(rtc_config_t cfg)
 {
@@ -38,7 +39,6 @@ void rtc_init(rtc_config_t cfg)
     REGI2C_WRITE_MASK(I2C_DIG_REG, I2C_DIG_REG_XPD_RTC_REG, 0);
 
     CLEAR_PERI_REG_MASK(RTC_CNTL_ANA_CONF_REG, RTC_CNTL_PVTMON_PU);
-    rtc_clk_set_xtal_wait();
     REG_SET_FIELD(RTC_CNTL_TIMER1_REG, RTC_CNTL_PLL_BUF_WAIT, cfg.pll_wait);
     REG_SET_FIELD(RTC_CNTL_TIMER1_REG, RTC_CNTL_CK8M_WAIT, cfg.ck8m_wait);
     REG_SET_FIELD(RTC_CNTL_TIMER5_REG, RTC_CNTL_MIN_SLP_VAL, RTC_CNTL_MIN_SLP_VAL_MIN);
@@ -56,9 +56,21 @@ void rtc_init(rtc_config_t cfg)
     REG_SET_FIELD(RTC_CNTL_TIMER6_REG, RTC_CNTL_DG_PERI_POWERUP_TIMER, rtc_init_cfg.dg_peri_powerup_cycles);
     REG_SET_FIELD(RTC_CNTL_TIMER6_REG, RTC_CNTL_DG_PERI_WAIT_TIMER, rtc_init_cfg.dg_peri_wait_cycles);
 
-    /* Reset RTC bias to default value (needed if waking up from deep sleep) */
-    REGI2C_WRITE_MASK(I2C_DIG_REG, I2C_DIG_REG_EXT_RTC_DREG_SLEEP, RTC_CNTL_DBIAS_1V10);
-    REGI2C_WRITE_MASK(I2C_DIG_REG, I2C_DIG_REG_EXT_RTC_DREG, RTC_CNTL_DBIAS_1V10);
+    if (cfg.cali_ocode) {
+        uint32_t rtc_calib_version = 0;
+        esp_err_t err = esp_efuse_read_field_blob(ESP_EFUSE_BLOCK2_VERSION, &rtc_calib_version, 3);
+        if (err != ESP_OK) {
+            rtc_calib_version = 0;
+            SOC_LOGW(TAG, "efuse read fail, set default rtc_calib_version: %d\n", rtc_calib_version);
+        }
+        if (rtc_calib_version == 1) {
+            set_ocode_by_efuse(rtc_calib_version);
+        } else {
+            calibrate_ocode();
+        }
+    }
+
+    set_rtc_dig_dbias();
 
     if (cfg.clkctl_init) {
         //clear CMMU clock force on
@@ -139,15 +151,6 @@ void rtc_init(rtc_config_t cfg)
         CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_DG_PAD_FORCE_UNHOLD);
         CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_DG_PAD_FORCE_NOISO);
     }
-    if (cfg.cali_ocode) {
-        uint32_t rtc_calib_version = 0;
-        esp_efuse_read_field_blob(ESP_EFUSE_BLOCK2_VERSION, &rtc_calib_version, 3);
-        if (rtc_calib_version == 1) {
-            set_ocode_by_efuse(rtc_calib_version);
-        } else {
-            calibrate_ocode();
-        }
-    }
 }
 
 rtc_vddsdio_config_t rtc_vddsdio_get_config(void)
@@ -195,6 +198,7 @@ static void set_ocode_by_efuse(int calib_version)
     uint32_t ocode;
     esp_err_t err = esp_efuse_read_field_blob(ESP_EFUSE_OCODE, &ocode, 8);
     assert(err == ESP_OK);
+    (void) err;
     REGI2C_WRITE_MASK(I2C_ULP, I2C_ULP_EXT_CODE, ocode);
     REGI2C_WRITE_MASK(I2C_ULP, I2C_ULP_IR_FORCE_CODE, 1);
 }
@@ -249,3 +253,86 @@ static void calibrate_ocode(void)
     }
     rtc_clk_cpu_freq_set_config(&old_config);
 }
+
+static uint32_t get_dig_dbias_by_efuse(uint8_t chip_version)
+{
+    assert(chip_version >= 3);
+    uint32_t dig_dbias = 28;
+    esp_err_t err = esp_efuse_read_field_blob(ESP_EFUSE_DIG_DBIAS_HVT, &dig_dbias, 5);
+    if (err != ESP_OK) {
+        dig_dbias = 28;
+        SOC_LOGW(TAG, "efuse read fail, set default dig_dbias value: %d\n", dig_dbias);
+    }
+    return dig_dbias;
+}
+
+uint32_t get_rtc_dbias_by_efuse(uint8_t chip_version, uint32_t dig_dbias)
+{
+    assert(chip_version >= 3);
+    uint32_t rtc_dbias = 0;
+    signed int k_rtc_ldo = 0, k_dig_ldo = 0, v_rtc_bias20 = 0, v_dig_bias20 = 0;
+    esp_err_t err0 = esp_efuse_read_field_blob(ESP_EFUSE_K_RTC_LDO, &k_rtc_ldo, 7);
+    esp_err_t err1 = esp_efuse_read_field_blob(ESP_EFUSE_K_DIG_LDO, &k_dig_ldo, 7);
+    esp_err_t err2 = esp_efuse_read_field_blob(ESP_EFUSE_V_RTC_DBIAS20, &v_rtc_bias20, 8);
+    esp_err_t err3 = esp_efuse_read_field_blob(ESP_EFUSE_V_DIG_DBIAS20, &v_dig_bias20, 8);
+    if ((err0 != ESP_OK) | (err1 != ESP_OK) | (err2 != ESP_OK) | (err3 != ESP_OK)) {
+        k_rtc_ldo = 0;
+        k_dig_ldo = 0;
+        v_rtc_bias20 = 0;
+        v_dig_bias20 = 0;
+        SOC_LOGW(TAG, "efuse read fail, k_rtc_ldo: %d, k_dig_ldo: %d, v_rtc_bias20: %d,  v_dig_bias20: %d\n", k_rtc_ldo, k_dig_ldo, v_rtc_bias20, v_dig_bias20);
+    }
+
+    k_rtc_ldo =  ((k_rtc_ldo & BIT(6)) != 0)? -(k_rtc_ldo & 0x3f): k_rtc_ldo;
+    k_dig_ldo =  ((k_dig_ldo & BIT(6)) != 0)? -(k_dig_ldo & 0x3f): (uint8_t)k_dig_ldo;
+    v_rtc_bias20 =  ((v_rtc_bias20 & BIT(7)) != 0)? -(v_rtc_bias20 & 0x7f): (uint8_t)v_rtc_bias20;
+    v_dig_bias20 =  ((v_dig_bias20 & BIT(7)) != 0)? -(v_dig_bias20 & 0x7f): (uint8_t)v_dig_bias20;
+
+    uint32_t v_rtc_dbias20_real_mul10000 = V_RTC_MID_MUL10000 + v_rtc_bias20 * 10000 / 500;
+    uint32_t v_dig_dbias20_real_mul10000 = V_DIG_MID_MUL10000 + v_dig_bias20 * 10000 / 500;
+    signed int k_rtc_ldo_real_mul10000 = K_RTC_MID_MUL10000 + k_rtc_ldo;
+    signed int k_dig_ldo_real_mul10000 = K_DIG_MID_MUL10000 + k_dig_ldo;
+    uint32_t v_dig_nearest_1v15_mul10000 = v_dig_dbias20_real_mul10000 + k_dig_ldo_real_mul10000 * (dig_dbias - 20);
+    uint32_t v_rtc_nearest_1v15_mul10000 = 0;
+
+    for (rtc_dbias = 15; rtc_dbias < 32; rtc_dbias++) {
+        v_rtc_nearest_1v15_mul10000 = v_rtc_dbias20_real_mul10000 + k_rtc_ldo_real_mul10000 * (rtc_dbias - 20);
+        if (v_rtc_nearest_1v15_mul10000 >= v_dig_nearest_1v15_mul10000 - 250)
+            break;
+    }
+    return rtc_dbias;
+}
+
+static void set_rtc_dig_dbias()
+{
+    /*
+    1. a reasonable dig_dbias which by scaning pvt to make 160 CPU run successful stored in efuse;
+    2. also we store some value in efuse, include:
+        k_rtc_ldo (slope of rtc voltage & rtc_dbias);
+        k_dig_ldo (slope of digital voltage & digital_dbias);
+        v_rtc_bias20 (rtc voltage when rtc dbais is 20);
+        v_dig_bias20 (digital voltage when digital dbais is 20).
+    3. a reasonable rtc_dbias can be calculated by a certion formula.
+    */
+    uint32_t rtc_dbias = 28, dig_dbias = 28;
+    uint8_t chip_version = esp_efuse_get_chip_ver();
+    if (chip_version >= 3) {
+        dig_dbias = get_dig_dbias_by_efuse(chip_version);
+        if (dig_dbias != 0) {
+            if (dig_dbias + 4 > 28) {
+                dig_dbias = 28;
+            } else {
+                dig_dbias += 4;
+            }
+            rtc_dbias = get_rtc_dbias_by_efuse(chip_version, dig_dbias); // already burn dig_dbias in efuse
+        } else {
+            dig_dbias = 28;
+            SOC_LOGD(TAG, "not burn core voltage in efuse or burn wrong voltage value in chip version: 0%d\n", chip_version);
+        }
+    }
+    else {
+        SOC_LOGD(TAG, "chip_version is less than 3, not burn core voltage in efuse\n");
+    }
+    REGI2C_WRITE_MASK(I2C_DIG_REG, I2C_DIG_REG_EXT_RTC_DREG, rtc_dbias);
+    REGI2C_WRITE_MASK(I2C_DIG_REG, I2C_DIG_REG_EXT_DIG_DREG, dig_dbias);
+}

components/esp_hw_support/port/esp32c3/rtc_sleep.c

@@ -107,6 +107,7 @@ void rtc_sleep_init(rtc_sleep_config_t cfg)
         CLEAR_PERI_REG_MASK(RTC_CNTL_ANA_CONF_REG,
                             RTC_CNTL_CKGEN_I2C_PU | RTC_CNTL_PLL_I2C_PU |
                             RTC_CNTL_RFRX_PBUS_PU | RTC_CNTL_TXRF_I2C_PU);
+        CLEAR_PERI_REG_MASK(RTC_CNTL_OPTIONS0_REG, RTC_CNTL_BB_I2C_FORCE_PU);
     } else {
         SET_PERI_REG_MASK(RTC_CNTL_BIAS_CONF_REG, RTC_CNTL_DG_VDD_DRV_B_SLP_EN);
         REG_SET_FIELD(RTC_CNTL_BIAS_CONF_REG, RTC_CNTL_DG_VDD_DRV_B_SLP, RTC_CNTL_DG_VDD_DRV_B_SLP_DEFAULT);
@@ -120,9 +121,7 @@ void rtc_sleep_init(rtc_sleep_config_t cfg)
     REG_SET_FIELD(RTC_CNTL_SDIO_CONF_REG, RTC_CNTL_SDIO_PD_EN, cfg.vddsdio_pd_en);
 
     REGI2C_WRITE_MASK(I2C_DIG_REG, I2C_DIG_REG_EXT_RTC_DREG_SLEEP, cfg.rtc_dbias_slp);
-    REGI2C_WRITE_MASK(I2C_DIG_REG, I2C_DIG_REG_EXT_RTC_DREG, cfg.rtc_dbias_wak);
     REGI2C_WRITE_MASK(I2C_DIG_REG, I2C_DIG_REG_EXT_DIG_DREG_SLEEP, cfg.dig_dbias_slp);
-    REGI2C_WRITE_MASK(I2C_DIG_REG, I2C_DIG_REG_EXT_DIG_DREG, cfg.dig_dbias_wak);
 
     REG_SET_FIELD(RTC_CNTL_SLP_REJECT_CONF_REG, RTC_CNTL_DEEP_SLP_REJECT_EN, cfg.deep_slp_reject);
     REG_SET_FIELD(RTC_CNTL_SLP_REJECT_CONF_REG, RTC_CNTL_LIGHT_SLP_REJECT_EN, cfg.light_slp_reject);

components/esp_hw_support/port/esp32s2/rtc_clk.c

@@ -152,29 +152,6 @@ void rtc_clk_apll_enable(bool enable, uint32_t sdm0, uint32_t sdm1, uint32_t sdm
     }
 }
 
-void rtc_clk_set_xtal_wait(void)
-{
-    /*
-     the `xtal_wait` time need 1ms, so we need calibrate slow clk period,
-     and `RTC_CNTL_XTL_BUF_WAIT` depend on it.
-    */
-    rtc_slow_freq_t slow_clk_freq = rtc_clk_slow_freq_get();
-    rtc_slow_freq_t rtc_slow_freq_x32k = RTC_SLOW_FREQ_32K_XTAL;
-    rtc_slow_freq_t rtc_slow_freq_8MD256 = RTC_SLOW_FREQ_8MD256;
-    rtc_cal_sel_t cal_clk = RTC_CAL_RTC_MUX;
-    if (slow_clk_freq == (rtc_slow_freq_x32k)) {
-        cal_clk = RTC_CAL_32K_XTAL;
-    } else if (slow_clk_freq == rtc_slow_freq_8MD256) {
-        cal_clk  = RTC_CAL_8MD256;
-    }
-    uint32_t slow_clk_period = rtc_clk_cal(cal_clk, 2000);
-    uint32_t xtal_wait_1ms = 100;
-    if (slow_clk_period) {
-        xtal_wait_1ms = (1000 << RTC_CLK_CAL_FRACT) / slow_clk_period;
-    }
-    REG_SET_FIELD(RTC_CNTL_TIMER1_REG, RTC_CNTL_XTL_BUF_WAIT, xtal_wait_1ms);
-}
-
 void rtc_clk_slow_freq_set(rtc_slow_freq_t slow_freq)
 {
     REG_SET_FIELD(RTC_CNTL_CLK_CONF_REG, RTC_CNTL_ANA_CLK_RTC_SEL, slow_freq);
@@ -189,7 +166,6 @@ void rtc_clk_slow_freq_set(rtc_slow_freq_t slow_freq)
     so if the slow_clk is 8md256, clk_8m must be force power on
     */
     REG_SET_FIELD(RTC_CNTL_CLK_CONF_REG, RTC_CNTL_CK8M_FORCE_PU, (slow_freq == RTC_SLOW_FREQ_8MD256) ? 1 : 0);
-    rtc_clk_set_xtal_wait();
     esp_rom_delay_us(DELAY_SLOW_CLK_SWITCH);
 }
 

components/esp_hw_support/port/esp32s2/rtc_init.c

@@ -34,7 +34,6 @@ static void calibrate_ocode(void);
 void rtc_init(rtc_config_t cfg)
 {
     CLEAR_PERI_REG_MASK(RTC_CNTL_ANA_CONF_REG, RTC_CNTL_PVTMON_PU);
-    rtc_clk_set_xtal_wait();
     REG_SET_FIELD(RTC_CNTL_TIMER1_REG, RTC_CNTL_PLL_BUF_WAIT, cfg.pll_wait);
     REG_SET_FIELD(RTC_CNTL_TIMER1_REG, RTC_CNTL_CK8M_WAIT, cfg.ck8m_wait);
 

components/esp_hw_support/port/esp32s2/rtc_sleep.c

@@ -109,6 +109,7 @@ void rtc_sleep_init(rtc_sleep_config_t cfg)
         CLEAR_PERI_REG_MASK(RTC_CNTL_ANA_CONF_REG,
                             RTC_CNTL_CKGEN_I2C_PU | RTC_CNTL_PLL_I2C_PU |
                             RTC_CNTL_RFRX_PBUS_PU | RTC_CNTL_TXRF_I2C_PU);
+        CLEAR_PERI_REG_MASK(RTC_CNTL_OPTIONS0_REG, RTC_CNTL_BB_I2C_FORCE_PU);
     } else {
 	SET_PERI_REG_MASK(RTC_CNTL_REG, RTC_CNTL_REGULATOR_FORCE_PU);
         CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_PWC_REG, RTC_CNTL_DG_WRAP_PD_EN);

components/esp_hw_support/port/esp32s3/rtc_clk.c

@@ -126,29 +126,6 @@ bool rtc_clk_8md256_enabled(void)
     return GET_PERI_REG_MASK(RTC_CNTL_CLK_CONF_REG, RTC_CNTL_ENB_CK8M_DIV) == 0;
 }
 
-void rtc_clk_set_xtal_wait(void)
-{
-    /*
-     the `xtal_wait` time need 1ms, so we need calibrate slow clk period,
-     and `RTC_CNTL_XTL_BUF_WAIT` depend on it.
-    */
-    rtc_slow_freq_t slow_clk_freq = rtc_clk_slow_freq_get();
-    rtc_slow_freq_t rtc_slow_freq_x32k = RTC_SLOW_FREQ_32K_XTAL;
-    rtc_slow_freq_t rtc_slow_freq_8MD256 = RTC_SLOW_FREQ_8MD256;
-    rtc_cal_sel_t cal_clk = RTC_CAL_RTC_MUX;
-    if (slow_clk_freq == (rtc_slow_freq_x32k)) {
-        cal_clk = RTC_CAL_32K_XTAL;
-    } else if (slow_clk_freq == rtc_slow_freq_8MD256) {
-        cal_clk  = RTC_CAL_8MD256;
-    }
-    uint32_t slow_clk_period = rtc_clk_cal(cal_clk, 2000);
-    uint32_t xtal_wait_1ms = 100;
-    if (slow_clk_period) {
-        xtal_wait_1ms = (1000 << RTC_CLK_CAL_FRACT) / slow_clk_period;
-    }
-    REG_SET_FIELD(RTC_CNTL_TIMER1_REG, RTC_CNTL_XTL_BUF_WAIT, xtal_wait_1ms);
-}
-
 static void wait_dig_dbias_valid(uint64_t rtc_cycles)
 {
     rtc_slow_freq_t slow_clk_freq = rtc_clk_slow_freq_get();
@@ -175,7 +152,6 @@ void rtc_clk_slow_freq_set(rtc_slow_freq_t slow_freq)
     so if the slow_clk is 8md256, clk_8m must be force power on
     */
     REG_SET_FIELD(RTC_CNTL_CLK_CONF_REG, RTC_CNTL_CK8M_FORCE_PU, (slow_freq == RTC_SLOW_FREQ_8MD256) ? 1 : 0);
-    rtc_clk_set_xtal_wait();
     esp_rom_delay_us(DELAY_SLOW_CLK_SWITCH);
 }
 

components/esp_hw_support/port/esp32s3/rtc_init.c

@@ -34,7 +34,6 @@ void rtc_init(rtc_config_t cfg)
     REGI2C_WRITE_MASK(I2C_DIG_REG, I2C_DIG_REG_XPD_RTC_REG, 0);
     REGI2C_WRITE_MASK(I2C_DIG_REG, I2C_DIG_REG_XPD_DIG_REG, 0);
     CLEAR_PERI_REG_MASK(RTC_CNTL_ANA_CONF_REG, RTC_CNTL_PVTMON_PU);
-    rtc_clk_set_xtal_wait();
     REG_SET_FIELD(RTC_CNTL_TIMER1_REG, RTC_CNTL_PLL_BUF_WAIT, cfg.pll_wait);
     REG_SET_FIELD(RTC_CNTL_TIMER1_REG, RTC_CNTL_CK8M_WAIT, cfg.ck8m_wait);
 

components/esp_hw_support/port/esp32s3/rtc_sleep.c

@@ -117,6 +117,7 @@ void rtc_sleep_init(rtc_sleep_config_t cfg)
         CLEAR_PERI_REG_MASK(RTC_CNTL_ANA_CONF_REG,
                             RTC_CNTL_CKGEN_I2C_PU | RTC_CNTL_PLL_I2C_PU |
                             RTC_CNTL_RFRX_PBUS_PU | RTC_CNTL_TXRF_I2C_PU);
+        CLEAR_PERI_REG_MASK(RTC_CNTL_OPTIONS0_REG, RTC_CNTL_BB_I2C_FORCE_PU);
     } else {
         SET_PERI_REG_MASK(RTC_CNTL_REG, RTC_CNTL_REGULATOR_FORCE_PU);
         CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_PWC_REG, RTC_CNTL_DG_WRAP_PD_EN);

components/esp_pm/pm_impl.c

@@ -580,10 +580,12 @@ esp_err_t esp_pm_unregister_skip_light_sleep_callback(skip_light_sleep_cb_t cb)
 
 static inline bool IRAM_ATTR periph_should_skip_light_sleep(void)
 {
-    for (int i = 0; i < PERIPH_SKIP_LIGHT_SLEEP_NO; i++) {
-        if (s_periph_skip_light_sleep_cb[i]) {
-            if (s_periph_skip_light_sleep_cb[i]() == true) {
-                return true;
+    if (s_light_sleep_en) {
+        for (int i = 0; i < PERIPH_SKIP_LIGHT_SLEEP_NO; i++) {
+            if (s_periph_skip_light_sleep_cb[i]) {
+                if (s_periph_skip_light_sleep_cb[i]() == true) {
+                    return true;
+                }
             }
         }
     }

components/esp_rom/CMakeLists.txt

@@ -1,8 +1,14 @@
 idf_build_get_property(target IDF_TARGET)
 
-idf_component_register(SRCS "patches/esp_rom_crc.c"
-                            "patches/esp_rom_sys.c"
-                            "patches/esp_rom_uart.c"
+set(sources "patches/esp_rom_crc.c"
+            "patches/esp_rom_sys.c"
+            "patches/esp_rom_uart.c")
+
+if(CONFIG_IDF_TARGET_ARCH_XTENSA)
+    list(APPEND sources "patches/esp_rom_longjmp.S")
+endif()
+
+idf_component_register(SRCS ${sources}
                        INCLUDE_DIRS include "${target}"
                        PRIV_REQUIRES soc hal)
 
@@ -98,6 +104,9 @@ else() # Regular app build
         endif()
     endif()
 
+    if(CONFIG_IDF_TARGET_ARCH_XTENSA)
+        target_link_libraries(${COMPONENT_LIB} INTERFACE "-Wl,--wrap=longjmp")
+    endif()
 endif()
 
 if(target STREQUAL "esp32s2")

components/esp_rom/component.mk

@@ -39,5 +39,6 @@ endif
 
 COMPONENT_ADD_LDFLAGS += -L $(COMPONENT_PATH)/esp32/ld \
                          $(addprefix -T ,$(LINKER_SCRIPTS)) \
+                         -l$(COMPONENT_NAME) -Wl,--wrap=longjmp \
 
 COMPONENT_ADD_LINKER_DEPS += $(addprefix esp32/ld/, $(LINKER_SCRIPTS))

components/esp_rom/include/esp32c3/rom/ets_sys.h

@@ -191,7 +191,7 @@ int ets_printf(const char *fmt, ...);
   * @brief  Set the uart channel of ets_printf(uart_tx_one_char).
   *         ROM will set it base on the efuse and gpio setting, however, this can be changed after booting.
   *
-  * @param  uart_no : 0 for UART0, 1 for UART1, 2 for UART2.
+  * @param  uart_no : 0 for UART0, 1 for UART1.
   *
   * @return None
   */

components/esp_rom/include/esp32c3/rom/uart.h

@@ -260,7 +260,7 @@ void uart_tx_flush(uint8_t uart_no);
 /**
   * @brief Wait until uart tx full empty and the last char send ok.
   *
-  * @param  uart_no : 0 for UART0, 1 for UART1, 2 for UART2
+  * @param  uart_no : 0 for UART0, 1 for UART1
   *
   * The function defined in ROM code has a bug, so we define the correct version
   * here for compatibility.

components/esp_rom/patches/esp_rom_longjmp.S

@@ -0,0 +1,71 @@
+/*
+    Copyright (c) 2001-2006 by Tensilica Inc.
+
+    Permission is hereby granted, free of charge, to any person obtaining
+    a copy of this software and associated documentation files (the
+    "Software"), to deal in the Software without restriction, including
+    without limitation the rights to use, copy, modify, merge, publish,
+    distribute, sublicense, and/or sell copies of the Software, and to
+    permit persons to whom the Software is furnished to do so, subject to
+    the following conditions:
+
+    The above copyright notice and this permission notice shall be included
+    in all copies or substantial portions of the Software.
+
+    THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+    EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+    MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+    IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+    CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+    TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+    SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+*/
+
+/*
+  This file contains a modified version of the original Xtensa longjmp implementation.
+  In this modified version, setting WINDOWSTART = 1 << WINDOWBASE is done inside a critical section.
+  This is necessary because after a FreeRTOS context switch in IDF, the values of WINDOWBASE and WINDOWSTART
+  are not guaranteed to be the same as before the context switch.
+*/
+
+#include <xtensa/corebits.h>
+
+/*
+    Replacement of the first instructions of void longjmp (jmp_buf env, int val)
+*/
+
+    .align  4
+    .literal_position
+    .global __wrap_longjmp
+    .type   __wrap_longjmp, @function
+__wrap_longjmp:
+    entry   sp, 16
+
+    /* Deactivate interrupts in order to modify WINDOWBASE and WINDOWSTART. */
+    rsr     a7, PS                     /* to be restored after SPILL_ALL_WINDOWS */
+    movi    a5, PS_EXCM                /* PS_INTLEVEL_MASK */
+    or      a5, a7, a5                 /* get the current INTLEVEL */
+    wsr     a5, PS
+
+    /* Invalidate all but the current window;
+       set WindowStart to (1 << WindowBase).  */
+    rsr a5, WINDOWBASE
+    movi    a4, 1
+    ssl a5
+    sll a4, a4
+    wsr a4, WINDOWSTART
+    rsync
+
+    /* Activate interrupts again after modifying WINDOWBASE and WINDOWSTART. */
+    wsr     a7, PS
+
+    /* Jump back to original longjmp implementation.
+        The jump target is the instrucion
+    	    l32i	a0, a2, 64
+        of the original code. Hence, the original code's entry instruction and windowstart modification are left
+        out.
+     */
+    movi a0, __real_longjmp + 20
+    jx a0
+
+    .size   __wrap_longjmp, . - __wrap_longjmp

components/esp_serial_slave_link/essl_spi.c

@@ -76,6 +76,22 @@ esp_err_t essl_spi_rdbuf(spi_device_handle_t spi, uint8_t *out_data, int addr, i
     return spi_device_transmit(spi, (spi_transaction_t*)&t);
 }
 
+esp_err_t essl_spi_rdbuf_polling(spi_device_handle_t spi, uint8_t *out_data, int addr, int len, uint32_t flags)
+{
+    spi_transaction_ext_t t = {
+        .base = {
+            .cmd = get_hd_command(CMD_HD_RDBUF_REG, flags),
+            .addr = addr % 72,
+            .rxlength = len * 8,
+            .rx_buffer = out_data,
+            .flags = flags | SPI_TRANS_VARIABLE_DUMMY,
+        },
+        .dummy_bits = get_hd_dummy_bits(flags),
+    };
+
+    return spi_device_polling_transmit(spi, (spi_transaction_t*)&t);
+}
+
 esp_err_t essl_spi_wrbuf(spi_device_handle_t spi, const uint8_t *data, int addr, int len, uint32_t flags)
 {
     spi_transaction_ext_t t = {
@@ -91,6 +107,21 @@ esp_err_t essl_spi_wrbuf(spi_device_handle_t spi, const uint8_t *data, int addr,
     return spi_device_transmit(spi, (spi_transaction_t*)&t);
 }
 
+esp_err_t essl_spi_wrbuf_polling(spi_device_handle_t spi, const uint8_t *data, int addr, int len, uint32_t flags)
+{
+    spi_transaction_ext_t t = {
+        .base = {
+            .cmd = get_hd_command(CMD_HD_WRBUF_REG, flags),
+            .addr = addr % 72,
+            .length = len * 8,
+            .tx_buffer = data,
+            .flags = flags | SPI_TRANS_VARIABLE_DUMMY,
+        },
+        .dummy_bits = get_hd_dummy_bits(flags),
+    };
+    return spi_device_polling_transmit(spi, (spi_transaction_t*)&t);
+}
+
 esp_err_t essl_spi_rddma_seg(spi_device_handle_t spi, uint8_t *out_data, int seg_len, uint32_t flags)
 {
     spi_transaction_ext_t t = {

components/esp_serial_slave_link/include/esp_serial_slave_link/essl_spi.h

@@ -28,7 +28,7 @@ extern "C"
 ////////////////////////////////////////////////////////////////////////////////
 
 /**
- * @brief Read the shared buffer from the slave.
+ * @brief Read the shared buffer from the slave in ISR way
  *
  * @note ``out_data`` should be prepared in words and in the DRAM. The buffer may be written in words
  *       by the DMA. When a byte is written, the remaining bytes in the same word will also be
@@ -46,7 +46,25 @@ extern "C"
 esp_err_t essl_spi_rdbuf(spi_device_handle_t spi, uint8_t *out_data, int addr, int len, uint32_t flags);
 
 /**
- * @brief Write the shared buffer of the slave.
+ * @brief Read the shared buffer from the slave in polling way
+ *
+ * @note ``out_data`` should be prepared in words and in the DRAM. The buffer may be written in words
+ *       by the DMA. When a byte is written, the remaining bytes in the same word will also be
+ *       overwritten, even the ``len`` is shorter than a word.
+ *
+ * @param spi       SPI device handle representing the slave
+ * @param out_data  Buffer for read data, strongly suggested to be in the DRAM and align to 4
+ * @param addr      Address of the slave shared buffer
+ * @param len       Length to read
+ * @param flags     `SPI_TRANS_*` flags to control the transaction mode of the transaction to send.
+ * @return
+ *      - ESP_OK: on success
+ *      - or other return value from :cpp:func:`spi_device_transmit`.
+ */
+esp_err_t essl_spi_rdbuf_polling(spi_device_handle_t spi, uint8_t *out_data, int addr, int len, uint32_t flags);
+
+/**
+ * @brief Write the shared buffer of the slave in ISR way
  *
  * @note ``out_data`` should be prepared in words and in the DRAM. The buffer may be written in words
  *       by the DMA. When a byte is written, the remaining bytes in the same word will also be
@@ -63,6 +81,24 @@ esp_err_t essl_spi_rdbuf(spi_device_handle_t spi, uint8_t *out_data, int addr, i
  */
 esp_err_t essl_spi_wrbuf(spi_device_handle_t spi, const uint8_t *data, int addr, int len, uint32_t flags);
 
+/**
+ * @brief Write the shared buffer of the slave in polling way
+ *
+ * @note ``out_data`` should be prepared in words and in the DRAM. The buffer may be written in words
+ *       by the DMA. When a byte is written, the remaining bytes in the same word will also be
+ *       overwritten, even the ``len`` is shorter than a word.
+ *
+ * @param spi       SPI device handle representing the slave
+ * @param data      Buffer for data to send, strongly suggested to be in the DRAM and align to 4
+ * @param addr      Address of the slave shared buffer,
+ * @param len       Length to write
+ * @param flags     `SPI_TRANS_*` flags to control the transaction mode of the transaction to send.
+ * @return
+ *      - ESP_OK: success
+ *      - or other return value from :cpp:func:`spi_device_polling_transmit`.
+ */
+esp_err_t essl_spi_wrbuf_polling(spi_device_handle_t spi, const uint8_t *data, int addr, int len, uint32_t flags);
+
 /**
  * @brief Receive long buffer in segments from the slave through its DMA.
  *

components/esp_system/include/esp_private/startup_internal.h

@@ -31,10 +31,11 @@ extern bool g_spiram_ok; // [refactor-todo] better way to communicate this from
 // array, one per core.
 typedef void (*sys_startup_fn_t)(void);
 
+/* This array of per-CPU system layer startup functions is initialized in the non-port part of esp_system */
 #if !CONFIG_ESP_SYSTEM_SINGLE_CORE_MODE
-extern sys_startup_fn_t g_startup_fn[SOC_CPU_CORES_NUM];
+extern sys_startup_fn_t const g_startup_fn[SOC_CPU_CORES_NUM];
 #else
-extern sys_startup_fn_t g_startup_fn[1];
+extern sys_startup_fn_t const g_startup_fn[1];
 #endif
 
 // Utility to execute `sys_startup_fn_t` for the current core.

components/esp_system/include/esp_sleep.h

@@ -303,6 +303,12 @@ esp_err_t esp_sleep_enable_uart_wakeup(int uart_num);
  */
 esp_err_t esp_sleep_enable_wifi_wakeup(void);
 
+/**
+ * @brief Disable wakeup by WiFi MAC
+ * @return
+ *      - ESP_OK on success
+ */
+esp_err_t esp_sleep_disable_wifi_wakeup(void);
 
 /**
  * @brief Get the bit mask of GPIOs which caused wakeup (ext1)

components/esp_system/include/esp_system.h

@@ -42,6 +42,8 @@ typedef enum {
 #define UNIVERSAL_MAC_ADDR_NUM CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES
 #elif CONFIG_IDF_TARGET_ESP32S2
 #define UNIVERSAL_MAC_ADDR_NUM CONFIG_ESP32S2_UNIVERSAL_MAC_ADDRESSES
+#elif CONFIG_IDF_TARGET_ESP32S3
+#define UNIVERSAL_MAC_ADDR_NUM CONFIG_ESP32S3_UNIVERSAL_MAC_ADDRESSES
 #elif CONFIG_IDF_TARGET_ESP32C3
 #define UNIVERSAL_MAC_ADDR_NUM CONFIG_ESP32C3_UNIVERSAL_MAC_ADDRESSES
 #endif

components/esp_system/port/cpu_start.c

@@ -60,7 +60,7 @@
 #elif CONFIG_IDF_TARGET_ESP32C3
 #include "esp32c3/rtc.h"
 #include "esp32c3/cache_err_int.h"
-#include "esp32s3/rom/cache.h"
+#include "esp32c3/rom/cache.h"
 #include "esp32c3/rom/rtc.h"
 #include "soc/cache_memory.h"
 #include "esp32c3/memprot.h"
@@ -89,16 +89,13 @@
 #if CONFIG_APP_BUILD_TYPE_ELF_RAM
 #if CONFIG_IDF_TARGET_ESP32
 #include "esp32/rom/spi_flash.h"
-#endif // CONFIG_IDF_TARGET_ESP32
-#if CONFIG_IDF_TARGET_ESP32S2
+#elif CONFIG_IDF_TARGET_ESP32S2
 #include "esp32s2/rom/spi_flash.h"
-#endif // CONFIG_IDF_TARGET_ESP32S2
-#if CONFIG_IDF_TARGET_ESP32S3
+#elif CONFIG_IDF_TARGET_ESP32S3
 #include "esp32s3/rom/spi_flash.h"
-#endif // CONFIG_IDF_TARGET_ESP32S3
-#if CONFIG_IDF_TARGET_ESP32C3
+#elif CONFIG_IDF_TARGET_ESP32C3
 #include "esp32c3/rom/spi_flash.h"
-#endif // CONFIG_IDF_TARGET_ESP32C3
+#endif
 #endif // CONFIG_APP_BUILD_TYPE_ELF_RAM
 
 #include "esp_private/startup_internal.h"

components/esp_system/port/soc/esp32c3/clk.c

@@ -242,9 +242,6 @@ __attribute__((weak)) void esp_perip_clk_init(void)
 #endif
 #if CONFIG_CONSOLE_UART_NUM != 1
                            SYSTEM_UART1_CLK_EN |
-#endif
-#if CONFIG_CONSOLE_UART_NUM != 2
-                           SYSTEM_UART2_CLK_EN |
 #endif
                            SYSTEM_SPI2_CLK_EN |
                            SYSTEM_I2C_EXT0_CLK_EN |
@@ -276,9 +273,6 @@ __attribute__((weak)) void esp_perip_clk_init(void)
 #endif
 #if CONFIG_CONSOLE_UART_NUM != 1
                         SYSTEM_UART1_CLK_EN |
-#endif
-#if CONFIG_CONSOLE_UART_NUM != 2
-                        SYSTEM_UART2_CLK_EN |
 #endif
                         SYSTEM_SPI2_CLK_EN |
                         SYSTEM_I2C_EXT0_CLK_EN |

components/esp_system/sleep_modes.c

@@ -34,7 +34,6 @@
 
 #include "soc/cpu.h"
 #include "soc/rtc.h"
-#include "soc/soc_caps.h"
 
 #include "hal/wdt_hal.h"
 #include "hal/rtc_hal.h"
@@ -53,14 +52,14 @@
 #include "esp32/rom/cache.h"
 #include "esp32/clk.h"
 #include "esp32/rom/rtc.h"
-#include "driver/gpio.h"
+#include "esp_private/gpio.h"
 #elif CONFIG_IDF_TARGET_ESP32S2
 #include "esp32s2/clk.h"
 #include "esp32s2/rom/cache.h"
 #include "esp32s2/rom/rtc.h"
 #include "esp32s2/brownout.h"
 #include "soc/extmem_reg.h"
-#include "driver/gpio.h"
+#include "esp_private/gpio.h"
 #elif CONFIG_IDF_TARGET_ESP32S3
 #include "esp32s3/clk.h"
 #include "esp32s3/rom/cache.h"
@@ -68,7 +67,7 @@
 #include "soc/extmem_reg.h"
 #elif CONFIG_IDF_TARGET_ESP32C3
 #include "esp32c3/clk.h"
-#include "esp32s3/rom/cache.h"
+#include "esp32c3/rom/cache.h"
 #include "esp32c3/rom/rtc.h"
 #include "soc/extmem_reg.h"
 #include "esp_heap_caps.h"
@@ -342,7 +341,7 @@ static void IRAM_ATTR suspend_uarts(void)
         uint32_t uart_fsm = 0;
         do {
             uart_fsm = uart_ll_get_fsm_status(i);
-        } while (!(uart_fsm == UART_FSM_IDLE || uart_fsm == UART_FSM_TX_WAIT_SEND));
+        } while (!(uart_fsm == UART_LL_FSM_IDLE || uart_fsm == UART_LL_FSM_TX_WAIT_SEND));
 #else
         while (uart_ll_get_fsm_status(i) != 0) {}
 #endif
@@ -368,13 +367,13 @@ esp_err_t esp_sleep_cpu_pd_low_init(bool enable)
 {
     if (enable) {
         if (s_config.cpu_pd_mem == NULL) {
-            void *buf = heap_caps_aligned_alloc(RTC_CNTL_CPU_PD_DMA_ADDR_ALIGN,
-                                                RTC_CNTL_CPU_PD_RETENTION_MEM_SIZE + RTC_HAL_DMA_LINK_NODE_SIZE,
+            void *buf = heap_caps_aligned_alloc(SOC_RTC_CNTL_CPU_PD_DMA_ADDR_ALIGN,
+                                                SOC_RTC_CNTL_CPU_PD_RETENTION_MEM_SIZE + RTC_HAL_DMA_LINK_NODE_SIZE,
                                                 MALLOC_CAP_RETENTION | MALLOC_CAP_DEFAULT);
             if (buf) {
-                memset(buf, 0, RTC_CNTL_CPU_PD_RETENTION_MEM_SIZE + RTC_HAL_DMA_LINK_NODE_SIZE);
+                memset(buf, 0, SOC_RTC_CNTL_CPU_PD_RETENTION_MEM_SIZE + RTC_HAL_DMA_LINK_NODE_SIZE);
                 s_config.cpu_pd_mem = rtc_cntl_hal_dma_link_init(buf,
-                                      buf + RTC_HAL_DMA_LINK_NODE_SIZE, RTC_CNTL_CPU_PD_RETENTION_MEM_SIZE, NULL);
+                                      buf + RTC_HAL_DMA_LINK_NODE_SIZE, SOC_RTC_CNTL_CPU_PD_RETENTION_MEM_SIZE, NULL);
             } else {
                 return ESP_ERR_NO_MEM;
             }
@@ -1172,6 +1171,15 @@ esp_err_t esp_sleep_enable_wifi_wakeup(void)
 #endif
 }
 
+esp_err_t esp_sleep_disable_wifi_wakeup(void)
+{
+#if SOC_PM_SUPPORT_WIFI_WAKEUP
+    s_config.wakeup_triggers &= (~RTC_WIFI_TRIG_EN);
+    return ESP_OK;
+#else
+    return ESP_ERR_NOT_SUPPORTED;
+#endif
+}
 
 esp_sleep_wakeup_cause_t esp_sleep_get_wakeup_cause(void)
 {

components/esp_system/startup.c

@@ -110,7 +110,7 @@ void esp_startup_start_app_other_cores(void) __attribute__((weak, alias("esp_sta
 
 static volatile bool s_system_inited[SOC_CPU_CORES_NUM] = { false };
 
-sys_startup_fn_t g_startup_fn[SOC_CPU_CORES_NUM] = { [0] = start_cpu0,
+const sys_startup_fn_t g_startup_fn[SOC_CPU_CORES_NUM] = { [0] = start_cpu0,
 #if SOC_CPU_CORES_NUM > 1
     [1 ... SOC_CPU_CORES_NUM - 1] = start_cpu_other_cores
 #endif
@@ -118,7 +118,7 @@ sys_startup_fn_t g_startup_fn[SOC_CPU_CORES_NUM] = { [0] = start_cpu0,
 
 static volatile bool s_system_full_inited = false;
 #else
-sys_startup_fn_t g_startup_fn[1] = { start_cpu0 };
+const sys_startup_fn_t g_startup_fn[1] = { start_cpu0 };
 #endif
 
 #ifdef CONFIG_COMPILER_CXX_EXCEPTIONS

components/esp_wifi/Kconfig

@@ -323,7 +323,6 @@ menu "Wi-Fi"
 
     config ESP_WIFI_SLP_IRAM_OPT
         bool "WiFi SLP IRAM speed optimization"
-        depends on FREERTOS_USE_TICKLESS_IDLE
         select PM_SLP_DEFAULT_PARAMS_OPT
         help
             Select this option to place called Wi-Fi library TBTT process and receive beacon functions in IRAM.
@@ -336,7 +335,7 @@ menu "Wi-Fi"
     config ESP_WIFI_SLP_DEFAULT_MIN_ACTIVE_TIME
         int "Minimum active time"
         range 8 60
-        default 8
+        default 50
         depends on ESP_WIFI_SLP_IRAM_OPT
         help
             The minimum timeout for waiting to receive data, unit: milliseconds.
@@ -344,47 +343,27 @@ menu "Wi-Fi"
     config ESP_WIFI_SLP_DEFAULT_MAX_ACTIVE_TIME
         int "Maximum keep alive time"
         range 10 60
-        default 60
+        default 10
         depends on ESP_WIFI_SLP_IRAM_OPT
         help
             The maximum time that wifi keep alive, unit: seconds.
 
+    config ESP_WIFI_FTM_ENABLE
+        bool "WiFi FTM"
+        default n
+        depends on (IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32C3)
+        help
+            Enable feature Fine Timing Measurement for calculating WiFi Round-Trip-Time (RTT).
+
     config ESP_WIFI_FTM_INITIATOR_SUPPORT
         bool "FTM Initiator support"
         default y
-        depends on (IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32C3)
-
-    config ESP_WIFI_FTM_REPORT_LOG_ENABLE
-        bool "FTM Report logging"
-        default n
-        depends on ESP_WIFI_FTM_INITIATOR_SUPPORT
-        help
-            Select this option to get a detailed report of FTM Procedure with raw values
-
-    config ESP_WIFI_FTM_REPORT_SHOW_RTT
-        depends on ESP_WIFI_FTM_REPORT_LOG_ENABLE
-        bool "Show RTT values"
-        default y
-
-    config ESP_WIFI_FTM_REPORT_SHOW_DIAG
-        depends on ESP_WIFI_FTM_REPORT_LOG_ENABLE
-        bool "Show dialog tokens"
-        default y
-
-    config ESP_WIFI_FTM_REPORT_SHOW_T1T2T3T4
-        depends on ESP_WIFI_FTM_REPORT_LOG_ENABLE
-        bool "Show T1 to T4"
-        default y
-
-    config ESP_WIFI_FTM_REPORT_SHOW_RSSI
-        depends on ESP_WIFI_FTM_REPORT_LOG_ENABLE
-        bool "Show RSSI levels"
-        default y
+        depends on ESP_WIFI_FTM_ENABLE
 
     config ESP_WIFI_FTM_RESPONDER_SUPPORT
         bool "FTM Responder support"
         default y
-        depends on (IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32C3)
+        depends on ESP_WIFI_FTM_ENABLE
 
     config ESP_WIFI_STA_DISCONNECTED_PM_ENABLE
         bool "Power Management for station at disconnected"

components/esp_wifi/esp32c3/include/phy_init_data.h

@@ -38,78 +38,82 @@ extern "C" {
 #define PHY_SUPPORT_MULTIPLE_BIN_OFFSET 125
 #endif
 
-static const char phy_init_magic_pre[] = PHY_INIT_MAGIC;
+static const char __attribute__((section(".rodata"))) phy_init_magic_pre[] = PHY_INIT_MAGIC;
 
 /**
  * @brief Structure containing default recommended PHY initialization parameters.
  */
 static const esp_phy_init_data_t phy_init_data= { {
-        3,
-        3,
-        0x05,
-        0x09,
-        0x06,
-        0x05,
-        0x03,
-        0x06,
-        0x05,
-        0x04,
-        0x06,
-        0x04,
-        0x05,
+        0x00,
+        0x00,
+        LIMIT(CONFIG_ESP32_PHY_MAX_TX_POWER * 4, 0, 0x50),
+        LIMIT(CONFIG_ESP32_PHY_MAX_TX_POWER * 4, 0, 0x50),
+        LIMIT(CONFIG_ESP32_PHY_MAX_TX_POWER * 4, 0, 0x50),
+        LIMIT(CONFIG_ESP32_PHY_MAX_TX_POWER * 4, 0, 0x4c),
+        LIMIT(CONFIG_ESP32_PHY_MAX_TX_POWER * 4, 0, 0x4c),
+        LIMIT(CONFIG_ESP32_PHY_MAX_TX_POWER * 4, 0, 0x48),
+        LIMIT(CONFIG_ESP32_PHY_MAX_TX_POWER * 4, 0, 0x4c),
+        LIMIT(CONFIG_ESP32_PHY_MAX_TX_POWER * 4, 0, 0x48),
+        LIMIT(CONFIG_ESP32_PHY_MAX_TX_POWER * 4, 0, 0x48),
+        LIMIT(CONFIG_ESP32_PHY_MAX_TX_POWER * 4, 0, 0x44),
+        LIMIT(CONFIG_ESP32_PHY_MAX_TX_POWER * 4, 0, 0x4a),
+        LIMIT(CONFIG_ESP32_PHY_MAX_TX_POWER * 4, 0, 0x46),
+        LIMIT(CONFIG_ESP32_PHY_MAX_TX_POWER * 4, 0, 0x46),
+        LIMIT(CONFIG_ESP32_PHY_MAX_TX_POWER * 4, 0, 0x42),
         0x00,
         0x00,
         0x00,
-        0x00,
-        0x05,
-        0x09,
-        0x06,
-        0x05,
-        0x03,
-        0x06,
-        0x05,
-        0x00,
-        0x00,
-        0x00,
-        0x00,
-        0x00,
-        0x00,
-        0x00,
-        0x00,
-        0xfc,
-        0xfc,
-        0xfe,
-        0xf0,
-        0xf0,
-        0xf0,
-        0xe0,
-        0xe0,
-        0xe0,
-        0x18,
-        0x18,
-        0x18,
-        LIMIT(CONFIG_ESP32_PHY_MAX_TX_POWER * 4, 0, 84),
-        LIMIT(CONFIG_ESP32_PHY_MAX_TX_POWER * 4, 0, 72),
-        LIMIT(CONFIG_ESP32_PHY_MAX_TX_POWER * 4, 0, 66),
-        LIMIT(CONFIG_ESP32_PHY_MAX_TX_POWER * 4, 0, 60),
-        LIMIT(CONFIG_ESP32_PHY_MAX_TX_POWER * 4, 0, 56),
-        LIMIT(CONFIG_ESP32_PHY_MAX_TX_POWER * 4, 0, 52),
-        0,
-        1,
-        1,
-        2,
-        2,
-        3,
-        4,
-        5,
-        0,
-        0,
-        0,
-        0,
-        0,
-        0,
-        0,
-        0,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
         0,
         0,
         0,
@@ -151,9 +155,10 @@ static const esp_phy_init_data_t phy_init_data= { {
         0,
         0,
         0,
+        0x74
 } };
 
-static const char phy_init_magic_post[] = PHY_INIT_MAGIC;
+static const char __attribute__((section(".rodata"))) phy_init_magic_post[] = PHY_INIT_MAGIC;
 
 #if CONFIG_ESP32_SUPPORT_MULTIPLE_PHY_INIT_DATA_BIN
 /**

components/esp_wifi/include/esp_mesh.h

@@ -655,7 +655,7 @@ esp_err_t esp_mesh_stop(void);
  *               - If the packet is to the root ("to" parameter isn't NULL) or to external IP network, MESH_DATA_TODS should be set.
  *               - If the packet is from the root to an internal device, MESH_DATA_FROMDS should be set.
  *             - Specify whether this API is block or non-block, block by default
- *               - If needs non-block, MESH_DATA_NONBLOCK should be set.
+ *               - If needs non-blocking, MESH_DATA_NONBLOCK should be set. Otherwise, may use esp_mesh_send_block_time() to specify a blocking time.
  *             - In the situation of the root change, MESH_DATA_DROP identifies this packet can be dropped by the new root
  *               for upstream data to external IP network, we try our best to avoid data loss caused by the root change, but
  *               there is a risk that the new root is running out of memory because most of memory is occupied by the pending data which
@@ -688,6 +688,17 @@ esp_err_t esp_mesh_stop(void);
  */
 esp_err_t esp_mesh_send(const mesh_addr_t *to, const mesh_data_t *data,
                         int flag, const mesh_opt_t opt[],  int opt_count);
+/**
+ * @brief      Set blocking time of esp_mesh_send()
+ *
+ * @attention  This API shall be called before mesh is started.
+ *
+ * @param[in]  time_ms  blocking time of esp_mesh_send(), unit:ms
+ *
+ * @return
+ *    - ESP_OK
+ */
+esp_err_t esp_mesh_send_block_time(uint32_t time_ms);
 
 /**
  * @brief      Receive a packet targeted to self over the mesh network
@@ -1665,7 +1676,6 @@ int esp_mesh_get_running_active_duty_cycle(void);
  *    - ESP_OK
  */
 esp_err_t esp_mesh_ps_duty_signaling(int fwd_times);
-
 #ifdef __cplusplus
 }
 #endif

components/esp_wifi/include/esp_private/wifi.h

@@ -72,17 +72,6 @@ typedef enum {
     WIFI_LOG_MODULE_MESH, /*logs related to Mesh*/
 } wifi_log_module_t;
 
-/**
-  * @brief FTM Report log levels configuration
-  *
-  */
-typedef struct {
-    uint8_t show_rtt:1;     /**< Display all valid Round-Trip-Time readings for FTM frames */
-    uint8_t show_diag:1;    /**< Display dialogue tokens for all FTM frames with valid readings */
-    uint8_t show_t1t2t3t4:1;/**< Display all valid T1, T2, T3, T4 readings considered while calculating RTT */
-    uint8_t show_rxrssi:1;  /**< Display RSSI for each FTM frame with valid readings */
-} ftm_report_log_level_t;
-
 /**
   * @brief WiFi log submodule definition
   *
@@ -598,17 +587,6 @@ void esp_wifi_set_sleep_delay_time(uint32_t return_to_sleep_delay);
  */
 void esp_wifi_set_keep_alive_time(uint32_t keep_alive_time);
 
-/**
- * @brief Set FTM Report log level
- *
- * @param   log_lvl Log levels configuration
- *
- * @return
- *    - ESP_OK: succeed
- *    - ESP_ERR_NOT_SUPPORTED: No FTM support
- */
-esp_err_t esp_wifi_set_ftm_report_log_level(ftm_report_log_level_t *log_lvl);
-
 #ifdef __cplusplus
 }
 #endif

components/esp_wifi/include/esp_wifi_types.h

@@ -233,6 +233,7 @@ typedef struct {
     uint8_t max_connection;     /**< Max number of stations allowed to connect in, default 4, max 10 */
     uint16_t beacon_interval;   /**< Beacon interval which should be multiples of 100. Unit: TU(time unit, 1 TU = 1024 us). Range: 100 ~ 60000. Default value: 100 */
     wifi_cipher_type_t pairwise_cipher;   /**< pairwise cipher of SoftAP, group cipher will be derived using this. cipher values are valid starting from WIFI_CIPHER_TYPE_TKIP, enum values before that will be considered as invalid and default cipher suites(TKIP+CCMP) will be used. Valid cipher suites in softAP mode are WIFI_CIPHER_TYPE_TKIP, WIFI_CIPHER_TYPE_CCMP and WIFI_CIPHER_TYPE_TKIP_CCMP. */
+    bool ftm_responder;         /**< Enable FTM Responder mode */
 } wifi_ap_config_t;
 
 /** @brief STA configuration settings for the ESP32 */

components/esp_wifi/src/wifi_init.c

@@ -146,13 +146,14 @@ esp_err_t esp_wifi_deinit(void)
 #if CONFIG_ESP_NETIF_TCPIP_ADAPTER_COMPATIBLE_LAYER
     tcpip_adapter_clear_default_wifi_handlers();
 #endif
+#if CONFIG_ESP_WIFI_SLP_IRAM_OPT
+    esp_pm_unregister_light_sleep_default_params_config_callback();
+#endif
 #if CONFIG_FREERTOS_USE_TICKLESS_IDLE
 #if SOC_WIFI_HW_TSF
     esp_pm_unregister_skip_light_sleep_callback(esp_wifi_internal_is_tsf_active);
     esp_pm_unregister_inform_out_light_sleep_overhead_callback(esp_wifi_internal_update_light_sleep_wake_ahead_time);
-#endif
-#if CONFIG_ESP_WIFI_SLP_IRAM_OPT
-    esp_pm_unregister_light_sleep_default_params_config_callback();
+    esp_sleep_disable_wifi_wakeup();
 #endif
 #endif
 #if CONFIG_MAC_BB_PD
@@ -213,17 +214,6 @@ esp_err_t esp_wifi_init(const wifi_init_config_t *config)
     }
 #endif
 
-#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
-#if CONFIG_MAC_BB_PD
-    if (esp_register_mac_bb_pd_callback(pm_mac_sleep) != ESP_OK
-        || esp_register_mac_bb_pu_callback(pm_mac_wakeup) != ESP_OK) {
-
-        esp_unregister_mac_bb_pd_callback(pm_mac_sleep);
-        esp_unregister_mac_bb_pu_callback(pm_mac_wakeup);
-        return ESP_ERR_INVALID_ARG;
-    }
-#endif
-
 #if CONFIG_ESP_WIFI_SLP_IRAM_OPT
     esp_pm_register_light_sleep_default_params_config_callback(esp_wifi_internal_update_light_sleep_default_params);
 
@@ -238,6 +228,17 @@ esp_err_t esp_wifi_init(const wifi_init_config_t *config)
     esp_wifi_set_keep_alive_time(keep_alive_time_us);
 #endif
 
+#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
+#if CONFIG_MAC_BB_PD
+    if (esp_register_mac_bb_pd_callback(pm_mac_sleep) != ESP_OK
+        || esp_register_mac_bb_pu_callback(pm_mac_wakeup) != ESP_OK) {
+
+        esp_unregister_mac_bb_pd_callback(pm_mac_sleep);
+        esp_unregister_mac_bb_pu_callback(pm_mac_wakeup);
+        return ESP_ERR_INVALID_ARG;
+    }
+#endif
+
 #if SOC_WIFI_HW_TSF
     esp_err_t ret = esp_pm_register_skip_light_sleep_callback(esp_wifi_internal_is_tsf_active);
     if (ret != ESP_OK) {
@@ -290,22 +291,6 @@ esp_err_t esp_wifi_init(const wifi_init_config_t *config)
     }
     adc2_cal_include(); //This enables the ADC2 calibration constructor at start up.
 
-#ifdef CONFIG_ESP_WIFI_FTM_REPORT_LOG_ENABLE
-    ftm_report_log_level_t log_lvl = {0};
-#ifdef CONFIG_ESP_WIFI_FTM_REPORT_SHOW_RTT
-    log_lvl.show_rtt = 1;
-#endif
-#ifdef CONFIG_ESP_WIFI_FTM_REPORT_SHOW_DIAG
-    log_lvl.show_diag = 1;
-#endif
-#ifdef CONFIG_ESP_WIFI_FTM_REPORT_SHOW_T1T2T3T4
-    log_lvl.show_t1t2t3t4 = 1;
-#endif
-#ifdef CONFIG_ESP_WIFI_FTM_REPORT_SHOW_RSSI
-    log_lvl.show_rxrssi = 1;
-#endif
-    esp_wifi_set_ftm_report_log_level(&log_lvl);
-#endif
     esp_wifi_config_info();
     return result;
 }
@@ -344,3 +329,10 @@ void set_xpd_sar(bool en)
         adc_power_release();
     }
 }
+
+#ifndef CONFIG_ESP_WIFI_FTM_ENABLE
+void ieee80211_ftm_attach(void)
+{
+    /* Do not remove, stub to overwrite weak link in Wi-Fi Lib */
+}
+#endif