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108 Commits
Author SHA1 Message Date
Jiang Jiang Jian ae876915ec Merge branch 'fix/backport_wifi_fixes_v5.3' into 'release/v5.3'
fix(wifi): Add back WIFI_AUTH_WPA3_EXT_PSK and WIFI_AUTH_WPA3_EXT_PSK_MIXED_MODE

See merge request espressif/esp-idf!31218
2024-06-03 10:36:46 +08:00
Sarvesh Bodakhe e22c101034 fix(wifi): Add back WIFI_AUTH_WPA3_EXT_PSK and WIFI_AUTH_WPA3_EXT_PSK_MIXED_MODE
Add back above authmodes instead of removing and merging them with WIFI_AUTH_WPA3_PSK
in minor releases during v5.x.

These authmodes will be removed from v6.0
2024-05-31 13:50:54 +08:00
wangtao@espressif.com 63f019565b fix(wifi): fix send mgmt err when eapol process 2024-05-31 13:50:12 +08:00
Jiang Jiang Jian 3f632df143 Merge branch 'ci/update-known-failed-cases-file-name(v5.3)' into 'release/v5.3'
ci: add 5.3 known failed cases file

See merge request espressif/esp-idf!30978
2024-05-22 07:42:26 +08:00
Jiang Jiang Jian 5ec2be4ba3 Merge branch 'fix/websocket_first_packet_v5.3' into 'release/v5.3'
fix(ws_transport): fixed `server-key` corruption (backport v5.3)

See merge request espressif/esp-idf!30963
2024-05-22 07:41:55 +08:00
Jiang Jiang Jian 1d3d63c438 Merge branch 'bugfix/fix_resetting_redirect_counter_v5.3' into 'release/v5.3'
fix: reset redirect counter for using same handler (v5.3)

See merge request espressif/esp-idf!30935
2024-05-22 07:41:24 +08:00
Jiang Jiang Jian e7ba614a04 Merge branch 'set_gdb_remotetimeout_v5.3' into 'release/v5.3'
tools(gdbinit): set remote timeout for the gdb connection (v5.3)

See merge request espressif/esp-idf!30804
2024-05-22 07:40:07 +08:00
Jiang Jiang Jian dbf757118a Merge branch 'bugfix/free_controlle_memory_in_init_fail_v5.3' into 'release/v5.3'
fix(nimble): Free controller memory if init fails (v5.3)

See merge request espressif/esp-idf!30749
2024-05-22 07:39:47 +08:00
Jiang Jiang Jian 0c2c962b19 Merge branch 'coredump_sanity_check_v5.3' into 'release/v5.3'
fix(coredump): increase sanity check before get summary (v5.3)

See merge request espressif/esp-idf!30527
2024-05-22 07:39:23 +08:00
Jiang Jiang Jian 1f0d27a2c6 Merge branch 'fix/pytest_session_dir_v5.3' into 'release/v5.3'
ci: apply new fix in pytest-embedded 1.10 (v5.3)

See merge request espressif/esp-idf!30676
2024-05-22 07:38:23 +08:00
Jiang Jiang Jian 1aaae85ad2 Merge branch 'bugfix/esp32c6eco1_coex_ble_deinit_wifi_bcn_timeout_v5.3' into 'release/v5.3'
backport v5.3: fix the issue where deinit ble in a coexist scenario causes the wifi mac tsf counter to stop

See merge request espressif/esp-idf!30981
2024-05-22 07:37:41 +08:00
Jiang Jiang Jian 85048f35e3 Merge branch 'bugfix/stop_tg_wdt_in_xpd_xtal_lightsleep_v5.3' into 'release/v5.3'
fix(esp_hw_support): stop tg wdt in xpd xtal lightsleep (v5.3)

See merge request espressif/esp-idf!30992
2024-05-22 07:37:32 +08:00
Jiang Jiang Jian 1a7c782905 Merge branch 'fix/backport_wifi_fixes_v5.3' into 'release/v5.3'
Fix(wifi):backport wifi fixes v5.3

See merge request espressif/esp-idf!30994
2024-05-22 07:37:14 +08:00
Jiang Jiang Jian cf4cf23741 Merge branch 'contrib/github_pr_13560_v5.3' into 'release/v5.3'
esp_eth: DP83848: correct link detection to use BMSR (GitHub PR) (v5.3)

See merge request espressif/esp-idf!30450
2024-05-21 23:42:21 +08:00
Jiang Jiang Jian 236556d1ea Merge branch 'contrib/github_pr_13669_v5.3' into 'release/v5.3'
docs: clarify ESP_RETURN_ON_ERROR result (GitHub PR) (v5.3)

See merge request espressif/esp-idf!30405
2024-05-21 23:41:51 +08:00
Jiang Jiang Jian 07669b8012 Merge branch 'fix/core1_access_cache_when_core0_close_cache_during_sleep_v5.3' into 'release/v5.3'
fix(esp_system): fix core1 access cache when core0 close cache during sleep(backport v5.3)

See merge request espressif/esp-idf!30942
2024-05-21 23:41:17 +08:00
Li Shuai e13bb3d734 fix(esp32c6): fix the issue of except wifi state caused by the missing mac retention config 2024-05-21 21:34:30 +08:00
morris bb4ba96545 Merge branch 'feat/axi_icm_qos_v5.3' into 'release/v5.3'
feat(axi_icm): AXI interconnect QoS (v5.3)

See merge request espressif/esp-idf!30980
2024-05-21 21:24:36 +08:00
liuning 1bf9c822f9 feat(wifi): support coex pwr 2024-05-21 20:57:46 +08:00
wangtao@espressif.com bb466097e5 feat(wifi): add softap csa&dtim&wait_bcast_data setting and ignore err nodata 2024-05-21 20:57:06 +08:00
wuzhenghui 8b369072f9 fix(esp_hw_support/sleep): stop TG0/TG1 watchdog if XTAL not power down in lightsleep 2024-05-21 20:30:28 +08:00
wuzhenghui d91dfe3510 change(esp_hw_support/sleep): improve esp32c3 systimer stall bug workaround 2024-05-21 20:30:24 +08:00
Li Shuai 2396dc5ff7 fix(wifi): fix the issue where deinit ble in a coexist scenario causes the wifi mac tsf counter to stop 2024-05-21 16:39:20 +08:00
morris 5ec85c0bfd feat(axi_icm): AXI interconnect QoS configuration functions 2024-05-21 14:38:34 +08:00
igor.udot 7c49b1da55 ci: add 5.3 known failed cases filename 2024-05-21 14:01:08 +08:00
Island 8805685f72 Merge branch 'bugfix/fixed_issues_on_esp32c6_and_esp32h2_v5.3' into 'release/v5.3'
fixed some ble issues on esp32c6 and esp32h2 (v5.3)

See merge request espressif/esp-idf!30891
2024-05-21 11:52:32 +08:00
Suren Gabrielyan a3d77114b6 fix(ws_transport): utility functions minor improvments 2024-05-20 17:54:43 +04:00
Richard Allen 021dc8747c fix(ws_transport): fixed server-key corruption
When first fragment is sent over HTTP during websocket
connection, defer buffering of fragment until after the
websocket server-key is validated.

This order is required because the first fragment buffering
overwrites the memory holding the server-key headers.

Fixes 2267d4b
Fixes https://github.com/espressif/esp-protocols/issues/396
PR https://github.com/espressif/esp-idf/pull/13724
2024-05-20 17:54:31 +04:00
Jiang Jiang Jian c7f146b671 Merge branch 'fix/backport_wifi_fixes_v5.3' into 'release/v5.3'
fix(esp_wifi): backport some wifi fixes to v5.3

See merge request espressif/esp-idf!30933
2024-05-20 20:52:18 +08:00
Jiang Jiang Jian 86a49de1eb Merge branch 'fix/fix_esp32p4_kconfig_pd_cpu_dependcy_error_v5.3' into 'release/v5.3'
fix(esp_pm): fix esp32p4 kconfig pd cpu dependency error (v5.3)

See merge request espressif/esp-idf!30794
2024-05-20 20:12:05 +08:00
Marius Vikhammer 51b6d16b43 Merge branch 'doc/update-performance-guides-p4-c5_v5.3' into 'release/v5.3'
docs(performance): Add P4 and C5 information in the performance guides (backport v5.3)

See merge request espressif/esp-idf!30492
2024-05-20 16:16:48 +08:00
shenmengjing 9e74564ba5 docs: Update the CN Translation for ram-usage and speed 2024-05-20 09:34:12 +02:00
Lou Tianhao 7b10c2421f fix(esp_system): fix core1 access cache when core0 close cache during sleep 2024-05-20 15:01:08 +08:00
wuzhenghui 64c062047f fix(esp_hw_support): invalidate L1DCache before enter hardware sleep 2024-05-20 14:02:04 +08:00
wuzhenghui 157c5b52e3 change(esp_hw_support): put more code into TCM to speed up the sleep and wake-up process 2024-05-20 14:01:01 +08:00
wuzhenghui c97ab134ef ci(esp_pm): add pd_top auto lightsleep test case for esp_pm 2024-05-20 14:01:00 +08:00
wuzhenghui 5899701b68 feat(esp_pm): fix esp32p4 cpu powerdown kconfig dependency error 2024-05-20 14:01:00 +08:00
Marius Vikhammer 4ec0065d74 Merge branch 'docs/p4_hw_design_v5.3' into 'release/v5.3'
docs(sys-time): update link to hw design guidelines (v5.3)

See merge request espressif/esp-idf!30934
2024-05-20 13:57:29 +08:00
Jiang Jiang Jian fe92d9ee60 Merge branch 'doc/update_bt_sleep_process_v5.3' into 'release/v5.3'
docs: Update the process of Bluetooth entering sleep in the sleep_modes.rst(v5.3)

See merge request espressif/esp-idf!30729
2024-05-20 13:50:59 +08:00
Jiang Jiang Jian 4c6cf06838 Merge branch 'fix/fix_esp_pm_case_high_fail_ratio_v5.3' into 'release/v5.3'
fix(esp_pm): fix esp_pm test cases high fail ratio (v5.3)

See merge request espressif/esp-idf!30672
2024-05-20 13:44:53 +08:00
Jiang Jiang Jian 464f4c9cc6 Merge branch 'fix/assert_1024_in_rwbt_isr_v5.3' into 'release/v5.3'
fix(bt/ble): fix some issues in bluetooth controller(backport v5.3)

See merge request espressif/esp-idf!30813
2024-05-20 13:43:43 +08:00
Harshit Malpani eb8dad2fa6 fix: Add warning to enable LWIP_NETIF_LOOPBACK to use control socket API
Closes https://github.com/espressif/esp-idf/issues/13659
2024-05-20 10:43:41 +05:30
Harshit Malpani 856a299ba8 fix: reset redirect counter for using same handler
Closes https://github.com/espressif/esp-idf/issues/13633
2024-05-20 10:43:41 +05:30
Mahavir Jain be9c7145f9 Merge branch 'feat/enable_app_update_test_p4_v5.3' into 'release/v5.3'
feat: Enable app_update test app for ESP32P4 (v5.3)

See merge request espressif/esp-idf!30821
2024-05-20 12:32:42 +08:00
Mahavir Jain d638267741 Merge branch 'fix/fix_flash_encryption_esp32p4_v5.3' into 'release/v5.3'
fix(bootloader_support): Fix flash encryption for esp32p4 (v5.3)

See merge request espressif/esp-idf!30921
2024-05-20 12:29:18 +08:00
Marius Vikhammer f3a73cbce3 docs(sys-time): update link to hw design guidelines 2024-05-20 12:16:19 +08:00
Marius Vikhammer 41ff5a2f43 Merge branch 'fix/brownout_crash_v5.3' into 'release/v5.3'
fix(brownout): fixed brownout isr crashing if cache disabled (v5.3)

See merge request espressif/esp-idf!30831
2024-05-20 12:13:17 +08:00
Marius Vikhammer 95cfd3987b Merge branch 'bugfix/lp_core_tests_race_condition_v5.3' into 'release/v5.3'
fix(lp_core_test): fixed race-condition in lp core tests (v5.3)

See merge request espressif/esp-idf!30931
2024-05-20 12:12:49 +08:00
Marius Vikhammer 520beb865c Merge branch 'bugfix/c5_isr_masking_v5.3' into 'release/v5.3'
fix(interrupt): fixed interrupt thresholds not working on C5 (v5.3)

See merge request espressif/esp-idf!30843
2024-05-20 12:12:36 +08:00
Marius Vikhammer e53ca8e018 fix(lp_core_test): fixed race-condition in lp core tests 2024-05-20 11:59:10 +08:00
muhaidong 68be49d2cf fix(wifi): fixed scan get ap number issue 2024-05-20 11:58:16 +08:00
Chen Yudong 686878497e docs: update wifi iperf README 2024-05-20 11:56:44 +08:00
zhangyanjiao c046d87561 docs(wifi): update the docmentation for mesh API 2024-05-20 11:55:27 +08:00
Sarvesh Bodakhe fdb4197d02 fix(esp_wifi): Add some bugfixes and cleanup in softAP
1. Fix wrong reason code in 'WIFI_EVENT_AP_STADISCONNECTED' event
2. cleanup in softAP for disconnecting connected station
3. Update examples to display reason while processing WIFI_EVENT_AP_STADISCONNECTED event
2024-05-20 11:50:09 +08:00
xuxiao e11f030427 feat(wifi): add itwt teardown status 2024-05-20 11:49:54 +08:00
yinqingzhao beebbada64 fix(wifi):esp32c6 wifi rx statistics is always zero 2024-05-20 11:47:43 +08:00
yinqingzhao 6da7a46bfa fix(bss_color):fix bss color issues 2024-05-20 11:46:50 +08:00
liuning d2551d6e4b fix(wifi): fix esp32 unrecoverable m f issue 2024-05-20 11:46:08 +08:00
zhangyanjiao 4cf29dfcef fix(wifi): fixed sniffer and espnow issue
1. fix(wifi): fixed sniffer dump fcs error packets fail

Closes https://github.com/espressif/esp-idf/issues/10777

2. fix(wifi): fixed the espnow priv parameter get error

Closes https://github.com/espressif/esp-idf/issues/13693
2024-05-20 11:44:48 +08:00
Shyamal Khachane 3dbba47d8c fix(esp_wifi): Fix issues in NAN datapath establishment
1. Resolve indefinite waiting while stopping NAN
2. Increase NDP response timeout to 8 DW's
3. Set NAN discovery beacon interval to 100 TU's as per Section 9.2
   of Wi-Fi Aware Specification v4.0
2024-05-20 11:43:58 +08:00
Nachiket Kukade 02c2356cb1 fix(esp_wifi): Fix issue in selecting FTM compensation with external AP 2024-05-20 11:43:18 +08:00
zhangyanjiao 8639f69ed7 fix(wifi): fix the tx issue when mesh packet lifetime remain equal to zero 2024-05-20 11:42:34 +08:00
morris 19ab395364 Merge branch 'feat/csi_dsi_example_v5.3' into 'release/v5.3'
example: csi dsi example and isp af dsi example(v5.3)

See merge request espressif/esp-idf!30913
2024-05-20 11:12:30 +08:00
Jiang Jiang Jian a7266400be Merge branch 'fix/freertos_scheduler_suspend_crit_v5.3' into 'release/v5.3'
fix(freertos/idf): Add missing critical sections to vTaskSuspendAll() (v5.3)

See merge request espressif/esp-idf!30922
2024-05-20 10:53:35 +08:00
Michael (XIAO Xufeng) 1847e53909 Merge branch 'bugfix/fix_isp_input_data_type_limit_v5.3' into 'release/v5.3'
fix(isp): updated to only support input data type as raw8 (v5.3)

See merge request espressif/esp-idf!30857
2024-05-20 10:15:21 +08:00
Mahavir Jain 285ba1fcf2 Merge branch 'fix/reduce-binary-size_v5.3' into 'release/v5.3'
Reduce binary size (v5.3)

See merge request espressif/esp-idf!30654
2024-05-20 01:09:17 +08:00
Mahavir Jain 5c9392d177 Merge branch 'bugfix/free_memory_if_failed_to_strart_http_server_v5.3' into 'release/v5.3'
fix(esp_https_server): fix memory leak during configuring http server (v5.3)

See merge request espressif/esp-idf!30662
2024-05-20 01:08:21 +08:00
Mahavir Jain 6a92c1485a Merge branch 'fix/pytest_server_start_command_failed_v5.3' into 'release/v5.3'
fix: Refactored script for initiating Python-based HTTPS server (v5.3)

See merge request espressif/esp-idf!30667
2024-05-20 01:07:55 +08:00
Michael (XIAO Xufeng) c91bdda9f3 Merge branch 'refactor/isp_af_interrupt_and_callback_v5.3' into 'release/v5.3'
refactor(isp): refactor the interrupt and callback solution (v5.3)

See merge request espressif/esp-idf!30565
2024-05-20 00:51:38 +08:00
Michael (XIAO Xufeng) f63e544dc3 Merge branch 'feature/support_chip912_cpll_spll_eco1_v5.3' into 'release/v5.3'
feat: support(esp32p4_eco1): modify cpll and spll config (v5.3)

See merge request espressif/esp-idf!30783
2024-05-20 00:48:27 +08:00
Michael (XIAO Xufeng) 0680af1269 Merge branch 'feature/usj_support_p4_v5.3' into 'release/v5.3'
feature(usb_serial_jtag): add usb serial jtag support for esp32p4 (backport v5.3)

See merge request espressif/esp-idf!30793
2024-05-20 00:48:22 +08:00
Mahavir Jain 2decfbc007 Merge branch 'fix/hello_world_linux_target_on_macos_v5.3' into 'release/v5.3'
fix(esp-tls): Fix compilation for linux target on macos (v5.3)

See merge request espressif/esp-idf!30808
2024-05-20 00:48:11 +08:00
Aditya Patwardhan 3640c1ecba fix(bootloader_support): Fix flash encryption for esp32p4 2024-05-17 21:19:14 +05:30
Darian Leung cbb43bb4c4 refactor(freertos/idf): Add critical section requirements to function description
This commit adds a note regarding the critical section calling requires of some
internal functions.
2024-05-17 22:43:35 +08:00
Darian Leung 0dc29caf4a fix(freertos/idf): Add missing critical sections to vTaskSuspendAll()
vTaskSuspendAll() requires critical sections when building for SMP. Otherwise,
it is possible for a task to switch cores in between getting the core ID and
before incremented uxSchedulerSuspended.
2024-05-17 22:43:34 +08:00
Armando 5f07f64802 example(isp): added isp af example 2024-05-17 15:29:17 +08:00
Armando e4f1c01197 fix(csi): fixed wrong assert when there's new transaction 2024-05-17 15:26:58 +08:00
Armando 2ed780b686 fix(isp): fixed af environment detector lack of configuration issue 2024-05-17 15:26:46 +08:00
Armando a9383cb433 example(camera): added new camera dsi example 2024-05-17 15:26:39 +08:00
Erhan Kurubas 5e817df25f fix(coredump): don't allow mapping of non-encrypted coredump partition 2024-05-16 21:31:40 +02:00
Erhan Kurubas bd8d7ea76a fix(coredump): increase sanity check before get summary
Closes https://github.com/espressif/esp-idf/issues/13594
2024-05-16 21:17:24 +02:00
zwl 352ee6fc26 ble: fixed some issues on ESP32C6 and ESP32H2 2024-05-16 17:46:07 +08:00
Armando 8472467721 fix(isp): updated to only support input data type as raw8 2024-05-16 10:40:26 +08:00
Marius Vikhammer f324e75c64 fix(interrupt): fixed interrupt thresholds not working on C5 2024-05-15 16:02:48 +08:00
Marius Vikhammer 1a1a708699 fix(brownout): fixed brownout isr crashing if cache disabled
If a brownout ISR was triggered while cache was disabled the system would panic.

This was due to a print accessing a string stored in flash
2024-05-15 09:13:53 +08:00
Harshit Malpani 24e5e3aef1 feat: Enable app_update test app for ESP32P4 2024-05-14 10:27:32 +05:30
Jin Cheng d8bc05c5d0 fix(bt/controller): Parse out the correct packet types from Host parameters
- For HCI command HCI_Enhanced_Setup_Synchronous_Connection
2024-05-14 11:52:58 +08:00
gongyantao bfa95cdd75 fix(bt/ble): fix some issues in bluetooth controller
1: fix assert 1024 issue when bt tx and wifi coexist on esp32
2: fix ble scan backoff
3: parse out the correct packet types from host parameters for
   hci command hci_enhanced_setup_synchronous_connection
2024-05-14 10:09:37 +08:00
Sudeep Mohanty 199dc389cc fix(esp-tls): Fix compilation for linux target on macos
This commit fixes compilation errors for the esp-tls component for the
linux target on a MacOS system.
2024-05-13 13:44:25 +02:00
Erhan Kurubas b400a8cd72 change(gdbinit): set remote timeout for the gdb connection 2024-05-13 13:34:13 +02:00
C.S.M 4dc565b7d0 feature(usb_serial_jtag): add usb serial jtag support for esp32p4 2024-05-13 12:19:14 +08:00
Xiao Xufeng cbcd346171 feat(esp32p4): add eco1 revision config option 2024-05-11 11:46:08 +08:00
chaijie@espressif.com f1d1dfd1ef feat(esp32p4_eco1): modify cpll and spll config 2024-05-11 11:43:24 +08:00
laokaiyao dd20d1f2b5 refactor(isp): refactor the interrupt and callback solution
- Added async API
- Replaced the polling API
- Supported one more callback and event data
2024-05-11 11:11:49 +08:00
Fu Hanxi 4e850f158e ci: move log dir from pytest_embedded_log to pytest-embedded 2024-05-10 10:29:21 +02:00
Rahul Tank 89a612aea0 fix(nimble): Free controller memory if init fails 2024-05-09 12:20:11 +05:30
xiongweichao 9eb61ef5a7 docs: Update the process of Bluetooth entering sleep in the sleep_modes.rst 2024-05-09 11:01:31 +08:00
Fu Hanxi b8ed93eec0 ci: apply new fix in pytest-embedded 1.10 2024-05-07 12:17:10 +02:00
Fu Hanxi 840ec6579f ci: update mypy check for python 3.12, check under python 3.8 rules 2024-05-07 12:17:10 +02:00
wuzhenghui 7aed3eb3bc fix(esp_pm): fix esp_pm test cases high fail ratio 2024-05-07 17:08:28 +08:00
nilesh.kale 855d1eb170 fix: Refactored script for initiating Python-based HTTPS server
This commit refactors the script responsible for starting a Python-based HTTPS server
to align with the latest Python version's requirements and best practices.

Closes https://github.com/espressif/esp-idf/issues/13575
2024-05-07 14:15:05 +05:30
nilesh.kale 5428555092 fix(esp_https_server): fix memory leak during configuring http server
This MR This restructured code to prevent memory leak during the starting HTTP server.

Closes https://github.com/espressif/esp-idf/issues/13526
2024-05-07 13:51:38 +05:30
Alexey Lapshin 9fd92e8bf4 fix(cxx): use __cxa_throw() stub in case exceptions disabled
Reduces binary size since the linker will drop some code due to --gc-sections.
2024-05-07 08:52:36 +04:00
Alexey Lapshin d42e894a74 fix(system): discard eh_frame sections if disabled in sdkconfig 2024-05-07 08:52:36 +04:00
Guillaume Souchere 0440d582dc docs(performance): Add esp32p4/c5 relevant information to the performance guides
in speed.rst:
- add startup time increase info when spiram test is enabled
- add startup time increase info when spiram is enabled and
  poisoning comprehensive is enabled
- add L2 cache variable size info to optimize IRAM space / cache misses
- update sections refencing bluetooth/wifi built-in tasks to not show
  related info for p4 targets.
- Add IDF_TARGET_RF_TYPE for esp32c5

in ram-usage.rst:
- add L2 cache variable size info to maximize RAM space

Remove the files from esp32c5.txt and esp32p4.txt
that are no longer in need of update.
2024-04-25 08:05:46 +02:00
Karl Palsson a85d1e1eca fix(esp_eth): dp83848: correct link detection to use BMSR
Reading the link state via PHYSTS was incorrect, as it only reflects the
link state bit from BMSR.  BMSR latches link down events, and are not
cleared without being read.  (See 802.3-2008 section 2, section 22.2.4.2.13)
This leads to the original DP828xx code only supporting link up, then a
single link down event.

Switch to reading the link state via BMSR, but continuing to read the
negotiation results via PHYSTS and ANLPAR.  This is inline with
LAN8720x, RTL8201, KSZ80xx phy drivers, and other opensource drivers for
the DP838xx family of devices.

Tested on a private board with a DP83825i PHY.  No publically available
boards using the original DP83848 are known of for testing.

Signed-off-by: Karl Palsson <karl.palsson@marel.com>
2024-04-24 09:34:58 +02:00
Darian Leung fa866b49ca docs(esp_common): Fix formatting issues in error-handling.rst
This commit fixes the following formatting issues in error-handling.rst:

- Incorrect indentation (3 spaces to 4 spaces)
- Fixed some italics that were supposed to be inline literals
- Used code-block directive for language highlighting
2024-04-23 14:49:48 +08:00
Richard Allen ebe1141b25 docs: clarify ESP_RETURN_ON_ERROR result 2024-04-23 14:49:47 +08:00
194 changed files with 3300 additions and 989 deletions
+2
View File
@@ -96,6 +96,8 @@ dependencies.lock
managed_components
# pytest log
pytest-embedded/
# legacy one
pytest_embedded_log/
list_job*.txt
size_info*.txt
+1 -1
View File
@@ -84,7 +84,7 @@ variables:
CI_PYTHON_TOOL_BRANCH: ""
# Set this variable to specify the file name for the known failure cases.
KNOWN_FAILURE_CASES_FILE_NAME: "master.txt"
KNOWN_FAILURE_CASES_FILE_NAME: "5.3.txt"
IDF_CI_BUILD: 1
+2 -2
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@@ -298,7 +298,7 @@ test_pytest_qemu:
artifacts:
paths:
- XUNIT_RESULT.xml
- pytest_embedded_log/
- pytest-embedded/
reports:
junit: XUNIT_RESULT.xml
allow_failure: true # IDFCI-1752
@@ -332,7 +332,7 @@ test_pytest_linux:
artifacts:
paths:
- XUNIT_RESULT.xml
- pytest_embedded_log/
- pytest-embedded/
- "**/build*/build_log.txt"
reports:
junit: XUNIT_RESULT.xml
+4 -4
View File
@@ -103,10 +103,10 @@ repos:
name: Check type annotations in python files
entry: tools/ci/check_type_comments.py
additional_dependencies:
- 'mypy==0.940'
- 'mypy-extensions==0.4.3'
- 'types-setuptools==57.4.14'
- 'types-PyYAML==0.1.9'
- 'mypy'
- 'mypy-extensions'
- 'types-setuptools'
- 'types-PyYAML'
- 'types-requests'
exclude: >
(?x)^(
@@ -2,6 +2,6 @@
components/app_update/test_apps:
disable:
- if: IDF_TARGET in ["esp32c6", "esp32h2", "esp32p4", "esp32c5"]
- if: IDF_TARGET in ["esp32c6", "esp32h2", "esp32c5"]
temporary: true
reason: target esp32c6, esp32h2, esp32p4, esp32c5 is not supported yet # TODO: IDF-8068, [ESP32C5] IDF-8638
reason: target esp32c6, esp32h2 esp32c5 is not supported yet # TODO: [ESP32C5] IDF-8638
+2 -2
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@@ -1,2 +1,2 @@
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- |
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- |
@@ -19,7 +19,7 @@ def run_multiple_stages(dut: Dut, test_case_num: int, stages: int) -> None:
@pytest.mark.supported_targets
@pytest.mark.temp_skip_ci(targets=['esp32c6', 'esp32h2', 'esp32p4'], reason='c6/h2/p4 support TBD') # TODO: IDF-8959
@pytest.mark.temp_skip_ci(targets=['esp32c6', 'esp32h2'], reason='c6/h2 support TBD')
@pytest.mark.generic
def test_app_update(dut: Dut) -> None:
extra_data = dut.parse_test_menu()
@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -29,6 +29,7 @@
#include "bootloader_flash_config.h"
#include "bootloader_mem.h"
#include "esp_private/regi2c_ctrl.h"
#include "soc/chip_revision.h"
#include "soc/regi2c_lp_bias.h"
#include "soc/regi2c_bias.h"
#include "bootloader_console.h"
@@ -90,14 +91,14 @@ static void bootloader_super_wdt_auto_feed(void)
static inline void bootloader_hardware_init(void)
{
// regi2c is enabled by default on ESP32P4, do nothing
// On ESP32P4 ECO0, the default (power on reset) CPLL and SPLL frequencies are very high, lower them to avoid bias may not be enough in bootloader
// And we are fixing SPLL to be 480MHz at all runtime
// Suppose to fix the issue on ECO1, will check when chip comes back
// TODO: IDF-8939
REGI2C_WRITE_MASK(I2C_CPLL, I2C_CPLL_OC_DIV_7_0, 6); // lower default cpu_pll freq to 400M
REGI2C_WRITE_MASK(I2C_SYSPLL, I2C_SYSPLL_OC_DIV_7_0, 8); // lower default sys_pll freq to 480M
esp_rom_delay_us(100);
unsigned chip_version = efuse_hal_chip_revision();
if (!ESP_CHIP_REV_ABOVE(chip_version, 1)) {
// On ESP32P4 ECO0, the default (power on reset) CPLL and SPLL frequencies are very high, lower them to avoid bias may not be enough in bootloader
// And we are fixing SPLL to be 480MHz after app is up
REGI2C_WRITE_MASK(I2C_CPLL, I2C_CPLL_OC_DIV_7_0, 6); // lower default cpu_pll freq to 400M
REGI2C_WRITE_MASK(I2C_SYSPLL, I2C_SYSPLL_OC_DIV_7_0, 8); // lower default sys_pll freq to 480M
esp_rom_delay_us(100);
}
REGI2C_WRITE_MASK(I2C_BIAS, I2C_BIAS_DREG_1P1, 10);
REGI2C_WRITE_MASK(I2C_BIAS, I2C_BIAS_DREG_1P1_PVT, 10);
}
@@ -170,7 +171,7 @@ esp_err_t bootloader_init(void)
}
#endif // !CONFIG_APP_BUILD_TYPE_RAM
// check whether a WDT reset happend
// check whether a WDT reset happened
bootloader_check_wdt_reset();
// config WDT
bootloader_config_wdt();
@@ -18,6 +18,7 @@
#if SOC_KEY_MANAGER_SUPPORTED
#include "hal/key_mgr_hal.h"
#include "hal/mspi_timing_tuning_ll.h"
#include "soc/keymng_reg.h"
#endif
@@ -217,8 +218,15 @@ static esp_err_t check_and_generate_encryption_keys(void)
}
#if SOC_KEY_MANAGER_SUPPORTED
#if CONFIG_IDF_TARGET_ESP32C5 && SOC_KEY_MANAGER_SUPPORTED
// TODO: [ESP32C5] IDF-8622 find a more proper place for these codes
REG_SET_BIT(KEYMNG_STATIC_REG, KEYMNG_USE_EFUSE_KEY_FLASH);
REG_SET_BIT(PCR_MSPI_CLK_CONF_REG, PCR_MSPI_AXI_RST_EN);
REG_CLR_BIT(PCR_MSPI_CLK_CONF_REG, PCR_MSPI_AXI_RST_EN);
#endif
// Force Key Manager to use eFuse key for XTS-AES operation
key_mgr_hal_set_key_usage(ESP_KEY_MGR_XTS_AES_128_KEY, ESP_KEY_MGR_USE_EFUSE_KEY);
_mspi_timing_ll_reset_mspi();
#endif
return ESP_OK;
@@ -263,13 +271,6 @@ esp_err_t esp_flash_encrypt_contents(void)
esp_partition_info_t partition_table[ESP_PARTITION_TABLE_MAX_ENTRIES];
int num_partitions;
#if CONFIG_IDF_TARGET_ESP32C5 && SOC_KEY_MANAGER_SUPPORTED
// TODO: [ESP32C5] IDF-8622 find a more proper place for these codes
REG_SET_BIT(KEYMNG_STATIC_REG, KEYMNG_USE_EFUSE_KEY_FLASH);
REG_SET_BIT(PCR_MSPI_CLK_CONF_REG, PCR_MSPI_AXI_RST_EN);
REG_CLR_BIT(PCR_MSPI_CLK_CONF_REG, PCR_MSPI_AXI_RST_EN);
#endif
#ifdef CONFIG_SOC_EFUSE_CONSISTS_OF_ONE_KEY_BLOCK
REG_WRITE(SENSITIVE_XTS_AES_KEY_UPDATE_REG, 1);
#endif
+3 -1
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@@ -39,7 +39,9 @@ if(NOT CONFIG_CXX_EXCEPTIONS)
_Unwind_Resume_or_Rethrow
_Unwind_Backtrace
__cxa_call_unexpected
__gxx_personality_v0)
__gxx_personality_v0
__cxa_throw
__cxa_allocate_exception)
foreach(wrap ${WRAP_FUNCTIONS})
target_link_libraries(${COMPONENT_LIB} INTERFACE "-Wl,--wrap=${wrap}")
+12
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@@ -178,4 +178,16 @@ extern "C" _Unwind_Reason_Code __wrap___gxx_personality_v0(int version,
return abort_return<_Unwind_Reason_Code>();
}
// Reduces binary size since the linker will drop some code due to --gc-sections.
extern "C" void __wrap___cxa_allocate_exception(void)
{
abort();
}
// Reduces binary size since the linker will drop some code due to --gc-sections.
extern "C" void __wrap___cxa_throw(void)
{
abort();
}
#endif // CONFIG_COMPILER_CXX_EXCEPTIONS
+1 -1
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@@ -5,7 +5,7 @@
*/
#include "sdkconfig.h"
#include <stdint.h>
#if CONFIG_IDF_TARGET_LINUX
#include <sys/time.h>
#include <time.h>
+7
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@@ -32,5 +32,12 @@ menu "Wireless Coexistence"
This function depends on BT-off
because currently we do not support external coex and internal coex simultaneously.
config ESP_COEX_POWER_MANAGEMENT
bool "Support power management under coexistence"
default n
depends on (ESP_COEX_SW_COEXIST_ENABLE)
help
If enabled, coexist power management will be enabled.
endif
endmenu # Wireless Coexistence
@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2018-2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2018-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -313,7 +313,7 @@ esp_err_t esp_coex_adapter_register(coex_adapter_funcs_t *funcs);
#if CONFIG_EXTERNAL_COEX_ENABLE
/**
* @brief Set external coexistence advanced informations, like working mode.
* @brief Set external coexistence advanced information, like working mode.
*
* @param out_pti1 This parameter no longer works, will be deprecated and later removed in future releases.
* @param out_pti2 This parameter no longer works, will be deprecated and later removed in future releases.
@@ -365,6 +365,25 @@ void esp_coex_external_set_txline(bool en);
#endif /*SOC_EXTERNAL_COEX_LEADER_TX_LINE*/
#endif /*External Coex*/
#if CONFIG_ESP_COEX_POWER_MANAGEMENT
/**
* @brief Set coexist scheme flexible period
*
* @param period flexible period
*
* @return
* - ESP_OK: succeed
*/
int coex_schm_flexible_period_set(uint8_t period);
/**
* @brief Get coexist scheme flexible period
*
* @return Coexist scheme flexible period
*/
uint8_t coex_schm_flexible_period_get(void);
#endif
/**
* @brief Check the MD5 values of the coexistence adapter header files in IDF and WiFi library
*
@@ -300,6 +300,7 @@ static bool csi_dma_trans_done_callback(dw_gdma_channel_handle_t chan, const dw_
bool need_yield = false;
BaseType_t high_task_woken = pdFALSE;
csi_controller_t *ctlr = (csi_controller_t *)user_data;
bool has_new_trans = false;
bool use_backup = false;
dw_gdma_block_transfer_config_t csi_dma_transfer_config = {};
@@ -328,12 +329,14 @@ static bool csi_dma_trans_done_callback(dw_gdma_channel_handle_t chan, const dw_
use_backup = true;
} else {
csi_dma_transfer_config.dst.addr = (uint32_t)(new_trans.buffer);
has_new_trans = true;
}
} else if (xQueueReceiveFromISR(ctlr->trans_que, &new_trans, &high_task_woken) == pdTRUE) {
if (!(new_trans.buffer) || new_trans.buflen < ctlr->fb_size_in_bytes) {
use_backup = true;
} else {
csi_dma_transfer_config.dst.addr = (uint32_t)(new_trans.buffer);
has_new_trans = true;
}
} else if (!ctlr->bk_buffer_dis) {
use_backup = true;
@@ -344,7 +347,9 @@ static bool csi_dma_trans_done_callback(dw_gdma_channel_handle_t chan, const dw_
new_trans.buflen = ctlr->fb_size_in_bytes;
ESP_EARLY_LOGD(TAG, "no new buffer or no long enough new buffer, use driver internal buffer");
csi_dma_transfer_config.dst.addr = (uint32_t)ctlr->backup_buffer;
} else {
}
if (!has_new_trans) {
assert(false && "no new buffer, and no driver internal buffer");
}
+2 -1
View File
@@ -3,10 +3,11 @@ set(srcs)
set(public_include "include")
if(CONFIG_SOC_ISP_SUPPORTED)
list(APPEND srcs "src/isp.c"
list(APPEND srcs "src/isp_core.c"
"src/isp_af.c")
endif()
idf_component_register(SRCS ${srcs}
INCLUDE_DIRS ${public_include}
PRIV_REQUIRES esp_driver_gpio
)
+6 -78
View File
@@ -4,84 +4,12 @@
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @brief ISP peripheral contains many submodules, whose drivers are scattered in different header files.
* This header file serves as a prelude, contains every thing that is needed to work with the ISP peripheral.
*/
#pragma once
#include <stdint.h>
#include <stdbool.h>
#include "esp_err.h"
#include "driver/isp_types.h"
#include "driver/isp_core.h"
#include "driver/isp_af.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief ISP configurations
*/
typedef struct {
isp_clk_src_t clk_src; ///< Clock source
uint32_t clk_hz; ///< Clock frequency in Hz, suggest twice higher than cam sensor speed
isp_input_data_source_t input_data_source; ///< Input data source
isp_color_t input_data_color_type; ///< Input color type
isp_color_t output_data_color_type; ///< Output color type
bool has_line_start_packet; ///< Enable line start packet
bool has_line_end_packet; ///< Enable line end packet
uint32_t h_res; ///< Input horizontal resolution, i.e. the number of pixels in a line
uint32_t v_res; ///< Input vertical resolution, i.e. the number of lines in a frame
} esp_isp_processor_cfg_t;
/**
* @brief New an ISP processor
*
* @param[in] proc_config Pointer to ISP config. Refer to ``esp_isp_processor_cfg_t``.
* @param[out] ret_proc Processor handle
*
* @return
* - ESP_OK On success
* - ESP_ERR_INVALID_ARG If the combination of arguments is invalid.
* - ESP_ERR_NOT_FOUND No free interrupt found with the specified flags
* - ESP_ERR_NOT_SUPPORTED Not supported mode
* - ESP_ERR_NO_MEM If out of memory
*/
esp_err_t esp_isp_new_processor(const esp_isp_processor_cfg_t *proc_config, isp_proc_handle_t *ret_proc);
/**
* @brief Delete an ISP processor
*
* @param[in] proc Processor handle
*
* @return
* - ESP_OK On success
* - ESP_ERR_INVALID_ARG If the combination of arguments is invalid.
* - ESP_ERR_INVALID_STATE Driver state is invalid.
*/
esp_err_t esp_isp_del_processor(isp_proc_handle_t proc);
/**
* @brief Enable an ISP processor
*
* @param[in] proc Processor handle
*
* @return
* - ESP_OK On success
* - ESP_ERR_INVALID_ARG If the combination of arguments is invalid.
* - ESP_ERR_INVALID_STATE Driver state is invalid.
*/
esp_err_t esp_isp_enable(isp_proc_handle_t proc);
/**
* @brief Disable an ISP processor
*
* @param[in] proc Processor handle
*
* @return
* - ESP_OK On success
* - ESP_ERR_INVALID_ARG If the combination of arguments is invalid.
* - ESP_ERR_INVALID_STATE Driver state is invalid.
*/
esp_err_t esp_isp_disable(isp_proc_handle_t proc);
#ifdef __cplusplus
}
#endif
@@ -10,8 +10,6 @@
#include <stdbool.h>
#include "esp_err.h"
#include "driver/isp_types.h"
#include "driver/isp.h"
#include "soc/soc_caps.h"
#ifdef __cplusplus
extern "C" {
@@ -21,10 +19,9 @@ extern "C" {
* @brief AF controller config
*/
typedef struct {
#if SOC_ISP_AF_WINDOW_NUMS
isp_af_window_t window[SOC_ISP_AF_WINDOW_NUMS]; ///< AF window settings
#endif
isp_af_window_t window[ISP_AF_WINDOW_NUM]; ///< The sampling windows of AF
int edge_thresh; ///< Edge threshold, definition higher than this value will be counted as a valid pixel for calculating AF result
int intr_priority; ///< The interrupt priority, range 0~7, if set to 0, the driver will try to allocate an interrupt with a relative low priority (1,2,3) otherwise the larger the higher, 7 is NMI
} esp_isp_af_config_t;
/**
@@ -80,17 +77,57 @@ esp_err_t esp_isp_af_controller_enable(isp_af_ctrlr_t af_ctrlr);
esp_err_t esp_isp_af_controller_disable(isp_af_ctrlr_t af_ctrlr);
/**
* @brief Get AF result
* @brief Trigger AF luminance and definition statistics for one time and get the result
* @note This function is a synchronous and block function,
* it only returns when AF luminance and definition statistics is done or timeout.
* It's a simple method to get the result directly for one time.
*
* @param[in] af_ctrlr AF controller handle
* @param[out] out_res AF result
* @param[in] af_ctrlr AF controller handle
* @param[in] timeout_ms Timeout in millisecond
* - timeout_ms < 0: Won't return until finished
* - timeout_ms = 0: No timeout, trigger one time statistics and return immediately,
* in this case, the result won't be assigned in this function,
* but you can get the result in the callback `esp_isp_af_env_detector_evt_cbs_t::on_env_statistics_done`
* - timeout_ms > 0: Wait for specified milliseconds, if not finished, then return timeout error
* @param[out] out_res AF luminance and definition statistics result, can be NULL if `timeout_ms = 0`
*
* @return
* - ESP_OK On success
* - ESP_ERR_TIMEOUT If the waiting time exceeds the specified timeout.
* - ESP_ERR_INVALID_ARG If the combination of arguments is invalid.
* - ESP_ERR_INVALID_STATE Driver state is invalid.
*/
esp_err_t esp_isp_af_controller_get_oneshot_result(isp_af_ctrlr_t af_ctrlr, isp_af_result_t *out_res);
esp_err_t esp_isp_af_controller_get_oneshot_statistics(isp_af_ctrlr_t af_ctrlr, int timeout_ms, isp_af_result_t *out_res);
/** @cond */
#define esp_isp_af_controller_get_oneshot_result(af_ctrlr, out_res) \
esp_isp_af_controller_get_oneshot_statistics(af_ctrlr, -1, out_res) // Alias
/** @endcond */
/**
* @brief Start AF continuous statistics of the luminance and definition in the windows
* @note This function is an asynchronous and non-block function,
* it will start the continuous statistics and return immediately.
* You have to register the AF callback and get the result from the callback event data.
*
* @param[in] af_ctrlr AF controller handle
* @return
* - ESP_OK On success
* - ESP_ERR_INVALID_ARG Null pointer
* - ESP_ERR_INVALID_STATE Driver state is invalid.
*/
esp_err_t esp_isp_af_controller_start_continuous_statistics(isp_af_ctrlr_t af_ctrlr);
/**
* @brief Stop AF continuous statistics of the luminance and definition in the windows
*
* @param[in] af_ctrlr AF controller handle
* @return
* - ESP_OK On success
* - ESP_ERR_INVALID_ARG Null pointer
* - ESP_ERR_INVALID_STATE Driver state is invalid.
*/
esp_err_t esp_isp_af_controller_stop_continuous_statistics(isp_af_ctrlr_t af_ctrlr);
/*---------------------------------------------
AF Env Monitor
@@ -99,7 +136,9 @@ esp_err_t esp_isp_af_controller_get_oneshot_result(isp_af_ctrlr_t af_ctrlr, isp_
* @brief AF environment detector config
*/
typedef struct {
int interval; ///< Interval between environment detection, in frames
int interval; /*!< Interval between environment detection, in frames.
* i.e., AF controller will trigger the statistic periodically to detect the environment change.
*/
} esp_isp_af_env_config_t;
/**
@@ -133,7 +172,7 @@ esp_err_t esp_isp_af_controller_set_env_detector_threshold(isp_af_ctrlr_t af_ctr
* @brief Event data structure
*/
typedef struct {
//empty for future proof
isp_af_result_t af_result; /*!< The AF statistics result */
} esp_isp_af_env_detector_evt_data_t;
/**
@@ -155,7 +194,8 @@ typedef bool (*esp_isp_af_env_detector_callback_t)(isp_af_ctrlr_t af_ctrlr, cons
* Involved variables should be in internal RAM as well.
*/
typedef struct {
esp_isp_af_env_detector_callback_t on_env_change; ///< Event callback, invoked when environment change happens.
esp_isp_af_env_detector_callback_t on_env_statistics_done; ///< Event callback, invoked when environment sample done.
esp_isp_af_env_detector_callback_t on_env_change; ///< Event callback, invoked when environment change happens.
} esp_isp_af_env_detector_evt_cbs_t;
/**
@@ -0,0 +1,86 @@
/*
* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
#include <stdint.h>
#include <stdbool.h>
#include "esp_err.h"
#include "driver/isp_types.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief ISP configurations
*/
typedef struct {
isp_clk_src_t clk_src; ///< Clock source
uint32_t clk_hz; ///< Clock frequency in Hz, suggest twice higher than cam sensor speed
isp_input_data_source_t input_data_source; ///< Input data source
isp_color_t input_data_color_type; ///< Input color type
isp_color_t output_data_color_type; ///< Output color type
bool has_line_start_packet; ///< Enable line start packet
bool has_line_end_packet; ///< Enable line end packet
uint32_t h_res; ///< Input horizontal resolution, i.e. the number of pixels in a line
uint32_t v_res; ///< Input vertical resolution, i.e. the number of lines in a frame
} esp_isp_processor_cfg_t;
/**
* @brief New an ISP processor
*
* @param[in] proc_config Pointer to ISP config. Refer to ``esp_isp_processor_cfg_t``.
* @param[out] ret_proc Processor handle
*
* @return
* - ESP_OK On success
* - ESP_ERR_INVALID_ARG If the combination of arguments is invalid.
* - ESP_ERR_NOT_FOUND No free interrupt found with the specified flags
* - ESP_ERR_NOT_SUPPORTED Not supported mode
* - ESP_ERR_NO_MEM If out of memory
*/
esp_err_t esp_isp_new_processor(const esp_isp_processor_cfg_t *proc_config, isp_proc_handle_t *ret_proc);
/**
* @brief Delete an ISP processor
*
* @param[in] proc Processor handle
*
* @return
* - ESP_OK On success
* - ESP_ERR_INVALID_ARG If the combination of arguments is invalid.
* - ESP_ERR_INVALID_STATE Driver state is invalid.
*/
esp_err_t esp_isp_del_processor(isp_proc_handle_t proc);
/**
* @brief Enable an ISP processor
*
* @param[in] proc Processor handle
*
* @return
* - ESP_OK On success
* - ESP_ERR_INVALID_ARG If the combination of arguments is invalid.
* - ESP_ERR_INVALID_STATE Driver state is invalid.
*/
esp_err_t esp_isp_enable(isp_proc_handle_t proc);
/**
* @brief Disable an ISP processor
*
* @param[in] proc Processor handle
*
* @return
* - ESP_OK On success
* - ESP_ERR_INVALID_ARG If the combination of arguments is invalid.
* - ESP_ERR_INVALID_STATE Driver state is invalid.
*/
esp_err_t esp_isp_disable(isp_proc_handle_t proc);
#ifdef __cplusplus
}
#endif
+139 -53
View File
@@ -11,23 +11,29 @@
#include "esp_check.h"
#include "esp_heap_caps.h"
#include "freertos/FreeRTOS.h"
#include "driver/isp.h"
#include "hal/isp_hal.h"
#include "hal/isp_ll.h"
#include "driver/isp_af.h"
#include "isp_internal.h"
#if CONFIG_ISP_ISR_IRAM_SAFE
#define ISP_AF_MEM_ALLOC_CAPS (MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT)
#else
#define ISP_AF_MEM_ALLOC_CAPS MALLOC_CAP_DEFAULT
#endif
static const char *TAG = "ISP_AF";
typedef struct isp_af_controller_t {
int id;
isp_fsm_t fsm;
portMUX_TYPE spinlock;
intr_handle_t intr_handle;
isp_proc_handle_t isp_proc;
QueueHandle_t evt_que;
esp_isp_af_env_config_t config;
esp_isp_af_env_detector_evt_cbs_t cbs;
void *user_data;
} isp_af_controller_t;
static void s_isp_af_default_isr(void *arg);
/*---------------------------------------------
AF
----------------------------------------------*/
static esp_err_t s_isp_claim_af_controller(isp_proc_handle_t isp_proc, isp_af_controller_t *af_ctlr)
static esp_err_t s_isp_claim_af_controller(isp_proc_handle_t isp_proc, isp_af_ctrlr_t af_ctlr)
{
assert(isp_proc && af_ctlr);
@@ -50,15 +56,26 @@ static esp_err_t s_isp_claim_af_controller(isp_proc_handle_t isp_proc, isp_af_co
return ESP_OK;
}
static esp_err_t s_isp_declaim_af_controller(isp_af_controller_t *af_ctlr)
static void s_isp_declaim_af_controller(isp_af_ctrlr_t af_ctlr)
{
assert(af_ctlr && af_ctlr->isp_proc);
portENTER_CRITICAL(&af_ctlr->isp_proc->spinlock);
af_ctlr->isp_proc->af_ctlr[af_ctlr->id] = NULL;
portEXIT_CRITICAL(&af_ctlr->isp_proc->spinlock);
}
return ESP_OK;
static void s_isp_af_free_controller(isp_af_ctrlr_t af_ctlr)
{
if (af_ctlr) {
if (af_ctlr->intr_handle) {
esp_intr_free(af_ctlr->intr_handle);
}
if (af_ctlr->evt_que) {
vQueueDelete(af_ctlr->evt_que);
}
free(af_ctlr);
}
}
esp_err_t esp_isp_new_af_controller(isp_proc_handle_t isp_proc, const esp_isp_af_config_t *af_config, isp_af_ctrlr_t *ret_hdl)
@@ -85,16 +102,23 @@ esp_err_t esp_isp_new_af_controller(isp_proc_handle_t isp_proc, const esp_isp_af
}
ESP_RETURN_ON_FALSE(af_config->edge_thresh > 0, ESP_ERR_INVALID_ARG, TAG, "edge threshold should be larger than 0");
isp_af_controller_t *af_ctlr = heap_caps_calloc(1, sizeof(isp_af_controller_t), ISP_AF_MEM_ALLOC_CAPS);
isp_af_ctrlr_t af_ctlr = heap_caps_calloc(1, sizeof(isp_af_controller_t), ISP_MEM_ALLOC_CAPS);
ESP_RETURN_ON_FALSE(af_ctlr, ESP_ERR_NO_MEM, TAG, "no mem");
//claim an AF controller
ESP_GOTO_ON_ERROR(s_isp_claim_af_controller(isp_proc, af_ctlr), err, TAG, "no available controller");
af_ctlr->evt_que = xQueueCreateWithCaps(1, sizeof(isp_af_result_t), ISP_MEM_ALLOC_CAPS);
ESP_GOTO_ON_FALSE(af_ctlr->evt_que, ESP_ERR_NO_MEM, err1, TAG, "no mem for af event queue");
af_ctlr->fsm = ISP_FSM_INIT;
af_ctlr->spinlock = (portMUX_TYPE)portMUX_INITIALIZER_UNLOCKED;
af_ctlr->isp_proc = isp_proc;
//claim an AF controller
ESP_GOTO_ON_ERROR(s_isp_claim_af_controller(isp_proc, af_ctlr), err1, TAG, "no available controller");
// Register the AF ISR
uint32_t intr_st_reg_addr = isp_ll_get_intr_status_reg_addr(isp_proc->hal.hw);
int intr_priority = af_config->intr_priority > 0 && af_config->intr_priority <= 7 ? BIT(af_config->intr_priority) : ESP_INTR_FLAG_LOWMED;
ESP_GOTO_ON_ERROR(esp_intr_alloc_intrstatus(isp_hw_info.instances[isp_proc->proc_id].irq, ISP_INTR_ALLOC_FLAGS | intr_priority, intr_st_reg_addr, ISP_LL_EVENT_AF_MASK,
s_isp_af_default_isr, af_ctlr, &af_ctlr->intr_handle), err2, TAG, "allocate interrupt failed");
isp_ll_af_enable_auto_update(isp_proc->hal.hw, false);
isp_ll_af_enable(isp_proc->hal.hw, false);
@@ -109,9 +133,10 @@ esp_err_t esp_isp_new_af_controller(isp_proc_handle_t isp_proc, const esp_isp_af
*ret_hdl = af_ctlr;
return ESP_OK;
err:
free(af_ctlr);
err2:
s_isp_declaim_af_controller(af_ctlr);
err1:
s_isp_af_free_controller(af_ctlr);
return ret;
}
@@ -119,10 +144,17 @@ err:
esp_err_t esp_isp_del_af_controller(isp_af_ctrlr_t af_ctlr)
{
ESP_RETURN_ON_FALSE(af_ctlr && af_ctlr->isp_proc, ESP_ERR_INVALID_ARG, TAG, "invalid argument: null pointer");
ESP_RETURN_ON_ERROR(s_isp_declaim_af_controller(af_ctlr), TAG, "controller isn't in use");
ESP_RETURN_ON_FALSE(af_ctlr->fsm == ISP_FSM_INIT, ESP_ERR_INVALID_STATE, TAG, "controller isn't in init state");
free(af_ctlr);
bool exist = false;
for (int i = 0; i < SOC_ISP_AF_CTLR_NUMS; i++) {
if (af_ctlr->isp_proc->af_ctlr[i] == af_ctlr) {
exist = true;
break;
}
}
ESP_RETURN_ON_FALSE(exist, ESP_ERR_INVALID_ARG, TAG, "controller isn't in use");
s_isp_declaim_af_controller(af_ctlr);
s_isp_af_free_controller(af_ctlr);
return ESP_OK;
}
@@ -132,7 +164,9 @@ esp_err_t esp_isp_af_controller_enable(isp_af_ctrlr_t af_ctlr)
ESP_RETURN_ON_FALSE(af_ctlr && af_ctlr->isp_proc, ESP_ERR_INVALID_ARG, TAG, "invalid argument: null pointer");
ESP_RETURN_ON_FALSE(af_ctlr->fsm == ISP_FSM_INIT, ESP_ERR_INVALID_STATE, TAG, "controller isn't in init state");
esp_intr_enable(af_ctlr->intr_handle);
isp_ll_af_clk_enable(af_ctlr->isp_proc->hal.hw, true);
isp_ll_enable_intr(af_ctlr->isp_proc->hal.hw, ISP_LL_EVENT_AF_MASK, true);
isp_ll_af_enable(af_ctlr->isp_proc->hal.hw, true);
af_ctlr->fsm = ISP_FSM_ENABLE;
@@ -145,18 +179,51 @@ esp_err_t esp_isp_af_controller_disable(isp_af_ctrlr_t af_ctlr)
ESP_RETURN_ON_FALSE(af_ctlr->fsm == ISP_FSM_ENABLE, ESP_ERR_INVALID_STATE, TAG, "controller isn't in enable state");
isp_ll_af_clk_enable(af_ctlr->isp_proc->hal.hw, false);
isp_ll_enable_intr(af_ctlr->isp_proc->hal.hw, ISP_LL_EVENT_AF_MASK, false);
isp_ll_af_enable(af_ctlr->isp_proc->hal.hw, false);
esp_intr_disable(af_ctlr->intr_handle);
af_ctlr->fsm = ISP_FSM_INIT;
return ESP_OK;
}
esp_err_t esp_isp_af_controller_get_oneshot_result(isp_af_ctrlr_t af_ctlr, isp_af_result_t *out_res)
esp_err_t esp_isp_af_controller_get_oneshot_statistics(isp_af_ctrlr_t af_ctrlr, int timeout_ms, isp_af_result_t *out_res)
{
ESP_RETURN_ON_FALSE_ISR(af_ctlr && out_res, ESP_ERR_INVALID_ARG, TAG, "invalid argument: null pointer");
ESP_RETURN_ON_FALSE_ISR(af_ctlr->fsm == ISP_FSM_ENABLE, ESP_ERR_INVALID_STATE, TAG, "controller isn't in enable state");
ESP_RETURN_ON_FALSE_ISR(af_ctrlr && (out_res || timeout_ms == 0), ESP_ERR_INVALID_ARG, TAG, "invalid argument: null pointer");
ESP_RETURN_ON_FALSE_ISR(af_ctrlr->fsm == ISP_FSM_ENABLE, ESP_ERR_INVALID_STATE, TAG, "controller isn't enabled or continuous statistics has started");
isp_hal_af_get_oneshot_result(&af_ctlr->isp_proc->hal, out_res);
esp_err_t ret = ESP_OK;
TickType_t ticks = timeout_ms < 0 ? portMAX_DELAY : pdMS_TO_TICKS(timeout_ms);
// Reset the queue in case receiving the legacy data in the queue
xQueueReset(af_ctrlr->evt_que);
// Trigger the AF statistics manually
isp_ll_af_manual_update(af_ctrlr->isp_proc->hal.hw);
// Wait the statistics to finish and receive the result from the queue
if ((ticks > 0) && xQueueReceive(af_ctrlr->evt_que, out_res, ticks) != pdTRUE) {
ret = ESP_ERR_TIMEOUT;
}
return ret;
}
esp_err_t esp_isp_af_controller_start_continuous_statistics(isp_af_ctrlr_t af_ctrlr)
{
ESP_RETURN_ON_FALSE_ISR(af_ctrlr, ESP_ERR_INVALID_ARG, TAG, "invalid argument: null pointer");
ESP_RETURN_ON_FALSE_ISR(af_ctrlr->fsm == ISP_FSM_ENABLE, ESP_ERR_INVALID_STATE, TAG, "controller isn't in enable state");
af_ctrlr->fsm = ISP_FSM_START;
isp_ll_af_enable_auto_update(af_ctrlr->isp_proc->hal.hw, true);
return ESP_OK;
}
esp_err_t esp_isp_af_controller_stop_continuous_statistics(isp_af_ctrlr_t af_ctrlr)
{
ESP_RETURN_ON_FALSE_ISR(af_ctrlr, ESP_ERR_INVALID_ARG, TAG, "invalid argument: null pointer");
ESP_RETURN_ON_FALSE_ISR(af_ctrlr->fsm == ISP_FSM_START, ESP_ERR_INVALID_STATE, TAG, "controller isn't in continuous state");
isp_ll_af_enable_auto_update(af_ctrlr->isp_proc->hal.hw, false);
af_ctrlr->fsm = ISP_FSM_ENABLE;
return ESP_OK;
}
@@ -174,6 +241,10 @@ esp_err_t esp_isp_af_controller_set_env_detector(isp_af_ctrlr_t af_ctrlr, const
isp_ll_af_env_monitor_set_period(af_ctrlr->isp_proc->hal.hw, 0);
isp_ll_clear_intr(af_ctrlr->isp_proc->hal.hw, ISP_LL_EVENT_AF_ENV);
isp_ll_af_env_monitor_set_mode(af_ctrlr->isp_proc->hal.hw, ISP_LL_AF_ENV_MONITOR_MODE_ABS);
isp_ll_af_env_monitor_set_period(af_ctrlr->isp_proc->hal.hw, af_ctrlr->config.interval);
isp_ll_enable_intr(af_ctrlr->isp_proc->hal.hw, ISP_LL_EVENT_AF_ENV, true);
return ESP_OK;
}
@@ -183,20 +254,24 @@ esp_err_t esp_isp_af_env_detector_register_event_callbacks(isp_af_ctrlr_t af_ctr
ESP_RETURN_ON_FALSE(af_ctrlr->fsm == ISP_FSM_INIT, ESP_ERR_INVALID_STATE, TAG, "detector isn't in the init state");
#if CONFIG_ISP_ISR_IRAM_SAFE
if (cbs->on_env_statistics_done) {
ESP_RETURN_ON_FALSE(esp_ptr_in_iram(cbs->on_env_statistics_done), ESP_ERR_INVALID_ARG, TAG, "on_env_statistics_done callback not in IRAM");
}
if (cbs->on_env_change) {
ESP_RETURN_ON_FALSE(esp_ptr_in_iram(cbs->on_env_change), ESP_ERR_INVALID_ARG, TAG, "on_env_change callback not in IRAM");
}
if (user_data) {
ESP_RETURN_ON_FALSE(esp_ptr_internal(user_data), ESP_ERR_INVALID_ARG, TAG, "user context not in internal RAM");
}
#endif
ESP_RETURN_ON_ERROR(esp_isp_register_isr(af_ctrlr->isp_proc, ISP_SUBMODULE_AF), TAG, "fail to register ISR");
af_ctrlr->cbs.on_env_statistics_done = cbs->on_env_statistics_done;
af_ctrlr->cbs.on_env_change = cbs->on_env_change;
af_ctrlr->user_data = user_data;
return ESP_OK;
}
esp_err_t esp_isp_af_env_detector_set_threshold(isp_af_ctrlr_t af_ctrlr, int definition_thresh, int luminance_thresh)
esp_err_t esp_isp_af_controller_set_env_detector_threshold(isp_af_ctrlr_t af_ctrlr, int definition_thresh, int luminance_thresh)
{
ESP_RETURN_ON_FALSE_ISR(af_ctrlr, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
ESP_RETURN_ON_FALSE_ISR(af_ctrlr->fsm == ISP_FSM_ENABLE, ESP_ERR_INVALID_STATE, TAG, "detector isn't in enable state");
@@ -209,36 +284,47 @@ esp_err_t esp_isp_af_env_detector_set_threshold(isp_af_ctrlr_t af_ctrlr, int def
/*---------------------------------------------------------------
INTR
---------------------------------------------------------------*/
static bool IRAM_ATTR s_af_env_isr(isp_af_ctrlr_t af_ctrlr)
static void IRAM_ATTR s_isp_af_default_isr(void *arg)
{
bool need_yield = false;
isp_af_ctrlr_t af_ctrlr = (isp_af_ctrlr_t)arg;
isp_proc_handle_t proc = af_ctrlr->isp_proc;
uint32_t af_events = isp_hal_check_clear_intr_event(&proc->hal, ISP_LL_EVENT_AF_MASK);
bool need_yield = false;
esp_isp_af_env_detector_evt_data_t edata = {};
if (af_ctrlr->cbs.on_env_change(af_ctrlr, &edata, af_ctrlr->user_data)) {
need_yield |= true;
if (af_events) {
// Get the statistics result
for (int i = 0; i < SOC_ISP_AF_WINDOW_NUMS; i++) {
edata.af_result.definition[i] = isp_ll_af_get_window_sum(proc->hal.hw, i);
edata.af_result.luminance[i] = isp_ll_af_get_window_lum(proc->hal.hw, i);
}
}
return need_yield;
}
bool IRAM_ATTR esp_isp_af_isr(isp_proc_handle_t proc, uint32_t af_events)
{
/**
* HW events are cleared in the ISP ISR dispatcher.
* We only deal with HW events
* Deal with the interrupts.
* Now only one detector.
* Should decide a detector instance according to the hw event.
*/
bool need_yield = false;
if (af_events & ISP_LL_EVENT_AF_FDONE) {
BaseType_t high_task_awake = false;
// Send the event data to the queue, overwrite the legacy one if exist
xQueueOverwriteFromISR(af_ctrlr->evt_que, &edata.af_result, &high_task_awake);
// Invoke the callback if the callback is registered
need_yield |= high_task_awake == pdTRUE;
if (af_ctrlr->cbs.on_env_statistics_done) {
need_yield |= af_ctrlr->cbs.on_env_statistics_done(af_ctrlr, &edata, af_ctrlr->user_data);
}
}
if (af_events & ISP_LL_EVENT_AF_ENV) {
/**
* Now only one detector.
* Should decide a detector instance according to the hw event.
*/
isp_af_ctrlr_t af_ctrlr = proc->af_ctlr[0];
need_yield |= s_af_env_isr(af_ctrlr);
// Invoke the callback if the callback is registered
if (af_ctrlr->cbs.on_env_change) {
need_yield |= af_ctrlr->cbs.on_env_change(af_ctrlr, &edata, af_ctrlr->user_data);
}
}
return need_yield;
if (need_yield) {
portYIELD_FROM_ISR();
}
}
@@ -12,29 +12,14 @@
#include "esp_heap_caps.h"
#include "freertos/FreeRTOS.h"
#include "esp_clk_tree.h"
#include "driver/isp.h"
#include "driver/isp_core.h"
#include "esp_private/periph_ctrl.h"
#include "esp_private/mipi_csi_share_hw_ctrl.h"
#include "hal/hal_utils.h"
#include "hal/isp_types.h"
#include "hal/isp_hal.h"
#include "hal/isp_ll.h"
#include "soc/mipi_csi_bridge_struct.h"
#include "soc/isp_periph.h"
#include "isp_internal.h"
#if CONFIG_ISP_ISR_IRAM_SAFE
#define ISP_INTR_ALLOC_FLAGS (ESP_INTR_FLAG_IRAM)
#else
#define ISP_INTR_ALLOC_FLAGS 0
#endif
#if CONFIG_ISP_ISR_IRAM_SAFE
#define ISP_MEM_ALLOC_CAPS (MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT)
#else
#define ISP_MEM_ALLOC_CAPS MALLOC_CAP_DEFAULT
#endif
typedef struct isp_platform_t {
_lock_t mutex;
isp_processor_t *processors[SOC_ISP_NUMS];
@@ -88,6 +73,7 @@ esp_err_t esp_isp_new_processor(const esp_isp_processor_cfg_t *proc_config, isp_
esp_err_t ret = ESP_FAIL;
ESP_RETURN_ON_FALSE(proc_config && ret_proc, ESP_ERR_INVALID_ARG, TAG, "invalid argument: null pointer");
ESP_RETURN_ON_FALSE(proc_config->input_data_source == ISP_INPUT_DATA_SOURCE_CSI, ESP_ERR_NOT_SUPPORTED, TAG, "only support CSI as input source at this moment");
ESP_RETURN_ON_FALSE(proc_config->input_data_color_type == ISP_COLOR_RAW8, ESP_ERR_NOT_SUPPORTED, TAG, "input data type not supported");
isp_processor_t *proc = heap_caps_calloc(1, sizeof(isp_processor_t), ISP_MEM_ALLOC_CAPS);
ESP_RETURN_ON_FALSE(proc, ESP_ERR_NO_MEM, TAG, "no mem");
@@ -202,100 +188,3 @@ esp_err_t esp_isp_disable(isp_proc_handle_t proc)
return ESP_OK;
}
/*---------------------------------------------------------------
INTR
---------------------------------------------------------------*/
static void IRAM_ATTR s_isp_isr_dispatcher(void *arg)
{
isp_processor_t *proc = (isp_processor_t *)arg;
bool need_yield = false;
//Check and clear hw events
uint32_t af_events = isp_hal_check_clear_intr_event(&proc->hal, ISP_LL_EVENT_AF_MASK);
bool do_dispatch = false;
//Deal with hw events
if (af_events) {
portENTER_CRITICAL_ISR(&proc->spinlock);
do_dispatch = proc->af_isr_added;
portEXIT_CRITICAL_ISR(&proc->spinlock);
if (do_dispatch) {
need_yield |= esp_isp_af_isr(proc, af_events);
}
do_dispatch = false;
}
if (need_yield) {
portYIELD_FROM_ISR();
}
}
esp_err_t esp_isp_register_isr(isp_proc_handle_t proc, isp_submodule_t submodule)
{
esp_err_t ret = ESP_FAIL;
ESP_RETURN_ON_FALSE(proc, ESP_ERR_INVALID_ARG, TAG, "invalid argument: null pointer");
bool do_alloc = false;
portENTER_CRITICAL(&proc->spinlock);
proc->isr_ref_counts++;
if (proc->isr_ref_counts == 1) {
assert(!proc->intr_hdl);
do_alloc = true;
}
switch (submodule) {
case ISP_SUBMODULE_AF:
proc->af_isr_added = true;
break;
default:
assert(false);
}
portEXIT_CRITICAL(&proc->spinlock);
if (do_alloc) {
ret = esp_intr_alloc(isp_hw_info.instances[proc->proc_id].irq, ISP_INTR_ALLOC_FLAGS, s_isp_isr_dispatcher, (void *)proc, &proc->intr_hdl);
if (ret != ESP_OK) {
ESP_LOGE(TAG, "no intr source");
return ret;
}
esp_intr_enable(proc->intr_hdl);
}
return ESP_OK;
}
esp_err_t esp_isp_deregister_isr(isp_proc_handle_t proc, isp_submodule_t submodule)
{
esp_err_t ret = ESP_FAIL;
ESP_RETURN_ON_FALSE(proc, ESP_ERR_INVALID_ARG, TAG, "invalid argument: null pointer");
bool do_free = false;
portENTER_CRITICAL(&proc->spinlock);
proc->isr_ref_counts--;
assert(proc->isr_ref_counts >= 0);
if (proc->isr_ref_counts == 0) {
assert(proc->intr_hdl);
do_free = true;
}
switch (submodule) {
case ISP_SUBMODULE_AF:
proc->af_isr_added = false;
break;
default:
assert(false);
}
portEXIT_CRITICAL(&proc->spinlock);
if (do_free) {
esp_intr_disable(proc->intr_hdl);
ret = esp_intr_free(proc->intr_hdl);
if (ret != ESP_OK) {
return ret;
}
}
return ESP_OK;
}
+16 -32
View File
@@ -16,7 +16,11 @@
#include "esp_heap_caps.h"
#include "esp_intr_alloc.h"
#include "freertos/FreeRTOS.h"
#include "freertos/queue.h"
#include "freertos/idf_additions.h"
#include "driver/isp_types.h"
#include "hal/isp_hal.h"
#include "hal/isp_ll.h"
#include "hal/isp_types.h"
#include "soc/isp_periph.h"
#include "soc/soc_caps.h"
@@ -25,32 +29,24 @@
extern "C" {
#endif
#if CONFIG_ISP_ISR_IRAM_SAFE
#define ISP_INTR_ALLOC_FLAGS (ESP_INTR_FLAG_SHARED | ESP_INTR_FLAG_INTRDISABLED | ESP_INTR_FLAG_IRAM)
#define ISP_MEM_ALLOC_CAPS (MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT)
#else
#define ISP_INTR_ALLOC_FLAGS (ESP_INTR_FLAG_SHARED | ESP_INTR_FLAG_INTRDISABLED)
#define ISP_MEM_ALLOC_CAPS MALLOC_CAP_DEFAULT
#endif
typedef enum {
ISP_FSM_INIT,
ISP_FSM_ENABLE,
ISP_FSM_START,
} isp_fsm_t;
/*---------------------------------------------------------------
Driver Context
---------------------------------------------------------------*/
typedef enum {
ISP_SUBMODULE_AF,
} isp_submodule_t;
typedef struct isp_af_controller_t isp_af_controller_t;
typedef struct isp_processor_t isp_processor_t;
struct isp_af_controller_t {
int id;
isp_fsm_t fsm;
portMUX_TYPE spinlock;
isp_processor_t *isp_proc;
esp_isp_af_env_config_t config;
esp_isp_af_env_detector_evt_cbs_t cbs;
void *user_data;
};
struct isp_processor_t {
typedef struct isp_processor_t {
int proc_id;
isp_hal_context_t hal;
#if SOC_ISP_SHARE_CSI_BRG
@@ -59,22 +55,10 @@ struct isp_processor_t {
#endif
isp_fsm_t isp_fsm;
portMUX_TYPE spinlock;
intr_handle_t intr_hdl;
/* sub module contexts */
isp_af_controller_t *af_ctlr[SOC_ISP_AF_CTLR_NUMS];
/* should be accessed within isp_processor_t spinlock */
int isr_ref_counts;
bool af_isr_added;
};
/*---------------------------------------------------------------
INTR
---------------------------------------------------------------*/
esp_err_t esp_isp_register_isr(isp_proc_handle_t proc, isp_submodule_t submodule);
esp_err_t esp_isp_deregister_isr(isp_proc_handle_t proc, isp_submodule_t submodule);
bool esp_isp_af_isr(isp_proc_handle_t proc, uint32_t af_events);
isp_af_ctrlr_t af_ctlr[SOC_ISP_AF_CTLR_NUMS];
} isp_processor_t;
#ifdef __cplusplus
}
@@ -52,7 +52,7 @@ static void IRAM_ATTR usb_serial_jtag_sof_tick_hook(void)
#if CONFIG_USJ_NO_AUTO_LS_ON_CONNECTION
esp_pm_lock_release(s_usb_serial_jtag_pm_lock);
#endif
#if !CONFIG_IDF_TARGET_ESP32P4 // TODO: IDF-7496 SOC_USB_SERIAL_JTAG_PHY_ON_BBPLL
#if USB_SERIAL_JTAG_LL_PHY_DEPENDS_ON_BBPLL
rtc_clk_bbpll_remove_consumer();
#endif
s_usb_serial_jtag_conn_status = false;
@@ -62,7 +62,7 @@ static void IRAM_ATTR usb_serial_jtag_sof_tick_hook(void)
#if CONFIG_USJ_NO_AUTO_LS_ON_CONNECTION
esp_pm_lock_acquire(s_usb_serial_jtag_pm_lock);
#endif
#if !CONFIG_IDF_TARGET_ESP32P4 // TODO: IDF-7496 SOC_USB_SERIAL_JTAG_PHY_ON_BBPLL
#if USB_SERIAL_JTAG_LL_PHY_DEPENDS_ON_BBPLL
rtc_clk_bbpll_add_consumer();
#endif
s_usb_serial_jtag_conn_status = true;
@@ -79,8 +79,8 @@ ESP_SYSTEM_INIT_FN(usb_serial_jtag_conn_status_init, SECONDARY, BIT(0), 230)
// We always assume it is connected at first, so acquires the lock to avoid auto light sleep
esp_pm_lock_acquire(s_usb_serial_jtag_pm_lock);
#endif
#if !CONFIG_IDF_TARGET_ESP32P4 // TODO: IDF-7496 SOC_USB_SERIAL_JTAG_PHY_ON_BBPLL
// TODO: esp32p4 USJ rely on SPLL, if it will also be disabled during sleep, we need to call spll_add_consumer?
#if USB_SERIAL_JTAG_LL_PHY_DEPENDS_ON_BBPLL
// TODO: esp32p4 USJ rely on SPLL, if it will also be disabled during sleep, we need to call spll_add_consumer? IDF-9947
rtc_clk_bbpll_add_consumer();
#endif
s_usb_serial_jtag_conn_status = true;
@@ -3,6 +3,10 @@
components/esp_driver_usb_serial_jtag/test_apps/usb_serial_jtag:
disable:
- if: SOC_USB_SERIAL_JTAG_SUPPORTED != 1
disable_test:
- if: IDF_TARGET in ["esp32p4"]
temporary: true
reason: No runners.
depends_components:
- vfs
- esp_driver_gpio
@@ -1,2 +1,2 @@
| Supported Targets | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-S3 |
| ----------------- | -------- | -------- | -------- | -------- |
| Supported Targets | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S3 |
| ----------------- | -------- | -------- | -------- | -------- | -------- |
+5 -3
View File
@@ -77,13 +77,15 @@ static esp_err_t dp83848_update_link_duplex_speed(phy_dp83848_t *dp83848)
uint32_t peer_pause_ability = false;
anlpar_reg_t anlpar;
physts_reg_t physts;
ESP_GOTO_ON_ERROR(eth->phy_reg_read(eth, addr, ETH_PHY_ANLPAR_REG_ADDR, &(anlpar.val)), err, TAG, "read ANLPAR failed");
ESP_GOTO_ON_ERROR(eth->phy_reg_read(eth, addr, ETH_PHY_STS_REG_ADDR, &(physts.val)), err, TAG, "read PHYSTS failed");
eth_link_t link = physts.link_status ? ETH_LINK_UP : ETH_LINK_DOWN;
bmsr_reg_t bmsr;
ESP_GOTO_ON_ERROR(eth->phy_reg_read(eth, addr, ETH_PHY_BMSR_REG_ADDR, &(bmsr.val)), err, TAG, "read BMSR failed");
eth_link_t link = bmsr.link_status ? ETH_LINK_UP : ETH_LINK_DOWN;
/* check if link status changed */
if (dp83848->phy_802_3.link_status != link) {
/* when link up, read negotiation result */
if (link == ETH_LINK_UP) {
ESP_GOTO_ON_ERROR(eth->phy_reg_read(eth, addr, ETH_PHY_ANLPAR_REG_ADDR, &(anlpar.val)), err, TAG, "read ANLPAR failed");
ESP_GOTO_ON_ERROR(eth->phy_reg_read(eth, addr, ETH_PHY_STS_REG_ADDR, &(physts.val)), err, TAG, "read PHYSTS failed");
if (physts.speed_status) {
speed = ETH_SPEED_10M;
} else {
+11 -1
View File
@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -957,9 +957,19 @@ esp_err_t esp_http_client_set_redirection(esp_http_client_handle_t client)
return err;
}
esp_err_t esp_http_client_reset_redirect_counter(esp_http_client_handle_t client)
{
if (client == NULL) {
return ESP_ERR_INVALID_ARG;
}
client->redirect_counter = 0;
return ESP_OK;
}
static esp_err_t esp_http_check_response(esp_http_client_handle_t client)
{
if (client->response->status_code >= HttpStatus_Ok && client->response->status_code < HttpStatus_MultipleChoices) {
client->redirect_counter = 0;
return ESP_OK;
}
if (client->redirect_counter >= client->max_redirection_count) {
@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -36,7 +36,7 @@ typedef enum {
HTTP_EVENT_ERROR = 0, /*!< This event occurs when there are any errors during execution */
HTTP_EVENT_ON_CONNECTED, /*!< Once the HTTP has been connected to the server, no data exchange has been performed */
HTTP_EVENT_HEADERS_SENT, /*!< After sending all the headers to the server */
HTTP_EVENT_HEADER_SENT = HTTP_EVENT_HEADERS_SENT, /*!< This header has been kept for backward compatability
HTTP_EVENT_HEADER_SENT = HTTP_EVENT_HEADERS_SENT, /*!< This header has been kept for backward compatibility
and will be deprecated in future versions esp-idf */
HTTP_EVENT_ON_HEADER, /*!< Occurs when receiving each header sent from the server */
HTTP_EVENT_ON_DATA, /*!< Occurs when receiving data from the server, possibly multiple portions of the packet */
@@ -125,7 +125,7 @@ typedef enum {
typedef enum {
HTTP_AUTH_TYPE_NONE = 0, /*!< No authention */
HTTP_AUTH_TYPE_BASIC, /*!< HTTP Basic authentication */
HTTP_AUTH_TYPE_DIGEST, /*!< HTTP Disgest authentication */
HTTP_AUTH_TYPE_DIGEST, /*!< HTTP Digest authentication */
} esp_http_client_auth_type_t;
/**
@@ -249,7 +249,7 @@ esp_http_client_handle_t esp_http_client_init(const esp_http_client_config_t *co
* must be set while making a call to esp_http_client_init() API.
* You can do any amount of calls to esp_http_client_perform while using the same esp_http_client_handle_t. The underlying connection may be kept open if the server allows it.
* If you intend to transfer more than one file, you are even encouraged to do so.
* esp_http_client will then attempt to re-use the same connection for the following transfers, thus making the operations faster, less CPU intense and using less network resources.
* esp_http_client will then attempt to reuse the same connection for the following transfers, thus making the operations faster, less CPU intense and using less network resources.
* Just note that you will have to use `esp_http_client_set_**` between the invokes to set options for the following esp_http_client_perform.
*
* @note You must never call this function simultaneously from two places using the same client handle.
@@ -612,7 +612,7 @@ esp_http_client_transport_t esp_http_client_get_transport_type(esp_http_client_h
* @brief Set redirection URL.
* When received the 30x code from the server, the client stores the redirect URL provided by the server.
* This function will set the current URL to redirect to enable client to execute the redirection request.
* When `disable_auto_redirect` is set, the client will not call this function but the event `HTTP_EVENT_REDIRECT` will be dispatched giving the user contol over the redirection event.
* When `disable_auto_redirect` is set, the client will not call this function but the event `HTTP_EVENT_REDIRECT` will be dispatched giving the user control over the redirection event.
*
* @param[in] client The esp_http_client handle
*
@@ -622,6 +622,18 @@ esp_http_client_transport_t esp_http_client_get_transport_type(esp_http_client_h
*/
esp_err_t esp_http_client_set_redirection(esp_http_client_handle_t client);
/**
* @brief Reset the redirection counter.
* This is useful to reset redirect counter in cases where the same handle is used for multiple requests.
*
* @param[in] client The esp_http_client handle
*
* @return
* - ESP_OK
* - ESP_ERR_INVALID_ARG
*/
esp_err_t esp_http_client_reset_redirect_counter(esp_http_client_handle_t client);
/**
* @brief On receiving a custom authentication header, this API can be invoked to set the
* authentication information from the header. This API can be called from the event
@@ -676,7 +688,7 @@ int esp_http_client_read_response(esp_http_client_handle_t client, char *buffer,
/**
* @brief Process all remaining response data
* This uses an internal buffer to repeatedly receive, parse, and discard response data until complete data is processed.
* As no additional user-supplied buffer is required, this may be preferrable to `esp_http_client_read_response` in situations where the content of the response may be ignored.
* As no additional user-supplied buffer is required, this may be preferable to `esp_http_client_read_response` in situations where the content of the response may be ignored.
*
* @param[in] client The esp_http_client handle
* @param len Length of data discarded
@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2018-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2018-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -11,7 +11,7 @@
#include <netinet/in.h>
#include <arpa/inet.h>
#include "sdkconfig.h"
#include "esp_log.h"
#include "ctrl_sock.h"
#if CONFIG_IDF_TARGET_LINUX
@@ -22,11 +22,20 @@
#define IPV6_ENABLED CONFIG_LWIP_IPV6
#endif // !CONFIG_IDF_TARGET_LINUX
#if !CONFIG_LWIP_NETIF_LOOPBACK
static const char *TAG = "esp_http_server";
#endif
/* Control socket, because in some network stacks select can't be woken up any
* other way
*/
int cs_create_ctrl_sock(int port)
{
#if !CONFIG_LWIP_NETIF_LOOPBACK
ESP_LOGE(TAG, "Please enable LWIP_NETIF_LOOPBACK for %s API", __func__);
return -1;
#endif
int fd = socket(AF_INET, SOCK_DGRAM, IPPROTO_UDP);
if (fd < 0) {
return -1;
+10 -4
View File
@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2018-2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2018-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -366,7 +366,6 @@ exit:
free((void *) cfg->cacert_buf);
}
free(cfg);
free(*ssl_ctx);
return ret;
}
@@ -379,14 +378,17 @@ esp_err_t httpd_ssl_start(httpd_handle_t *pHandle, struct httpd_ssl_config *conf
ESP_LOGI(TAG, "Starting server");
esp_err_t ret = ESP_OK;
httpd_ssl_ctx_t *ssl_ctx = NULL;
if (HTTPD_SSL_TRANSPORT_SECURE == config->transport_mode) {
httpd_ssl_ctx_t *ssl_ctx = calloc(1, sizeof(httpd_ssl_ctx_t));
ssl_ctx = calloc(1, sizeof(httpd_ssl_ctx_t));
if (!ssl_ctx) {
return ESP_ERR_NO_MEM;
}
ret = create_secure_context(config, &ssl_ctx);
if (ret != ESP_OK) {
free(ssl_ctx);
return ret;
}
@@ -411,7 +413,11 @@ esp_err_t httpd_ssl_start(httpd_handle_t *pHandle, struct httpd_ssl_config *conf
httpd_handle_t handle = NULL;
ret = httpd_start(&handle, &config->httpd);
if (ret != ESP_OK) return ret;
if (ret != ESP_OK) {
free(ssl_ctx);
ssl_ctx = NULL;
return ret;
}
*pHandle = handle;
-12
View File
@@ -214,18 +214,6 @@ menu "Hardware Settings"
callback and hence it is highly recommended to keep them as short as possible.
endmenu
menu "ESP_SLEEP_WORKAROUND"
# No visible menu/configs for workaround
visible if 0
config ESP_SLEEP_SYSTIMER_STALL_WORKAROUND
bool "ESP32C3 SYSTIMER Stall Issue Workaround"
depends on IDF_TARGET_ESP32C3
help
Its not able to stall ESP32C3 systimer in sleep.
To fix related RTOS TICK issue, select it to disable related systimer during sleep.
TODO: IDF-7036
endmenu
menu "RTC Clock Config"
orsource "./port/$IDF_TARGET/Kconfig.rtc"
endmenu
@@ -9,6 +9,7 @@
#include <stdbool.h>
#include "sdkconfig.h"
#include "esp_err.h"
#include "esp_sleep.h"
#include "soc/soc_caps.h"
#ifdef __cplusplus
@@ -21,7 +22,7 @@ extern "C" {
* This file contains declarations of cpu retention related functions in light sleep mode.
*/
#if CONFIG_PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP || SOC_PM_SUPPORT_CPU_PD
#if ESP_SLEEP_POWER_DOWN_CPU || SOC_PM_SUPPORT_CPU_PD
/**
* @brief Whether to allow the cpu power domain to be powered off.
*
@@ -31,7 +32,7 @@ extern "C" {
bool cpu_domain_pd_allowed(void);
#endif
#if CONFIG_PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP
#if ESP_SLEEP_POWER_DOWN_CPU
/**
* @brief Configure the parameters of the CPU domain during the sleep process
*
@@ -64,9 +65,9 @@ void sleep_disable_cpu_retention(void);
esp_err_t esp_sleep_cpu_retention(uint32_t (*goto_sleep)(uint32_t, uint32_t, uint32_t, bool),
uint32_t wakeup_opt, uint32_t reject_opt, uint32_t lslp_mem_inf_fpu, bool dslp);
#endif // SOC_PM_CPU_RETENTION_BY_SW
#endif // CONFIG_PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP
#endif // ESP_SLEEP_POWER_DOWN_CPU
#if !CONFIG_FREERTOS_UNICORE && CONFIG_PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP
#if !CONFIG_FREERTOS_UNICORE && ESP_SLEEP_POWER_DOWN_CPU
/**
* Do sleep prepare for other smp cores
*/
@@ -77,13 +78,11 @@ void sleep_smp_cpu_sleep_prepare(void);
*/
void sleep_smp_cpu_wakeup_prepare(void);
#if CONFIG_PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP
/**
* Notify the other core that this sleep does not require retention.
*/
void esp_sleep_cpu_skip_retention(void);
#endif // CONFIG_PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP
#endif // !CONFIG_FREERTOS_UNICORE && CONFIG_PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP
#endif // !CONFIG_FREERTOS_UNICORE && ESP_SLEEP_POWER_DOWN_CPU
#ifdef __cplusplus
}
@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -133,6 +133,8 @@ enum {
ESP_ERR_SLEEP_TOO_SHORT_SLEEP_DURATION = ESP_ERR_INVALID_ARG,
};
#define ESP_SLEEP_POWER_DOWN_CPU (CONFIG_PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP || (SOC_CPU_IN_TOP_DOMAIN && CONFIG_PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP))
/**
* @brief Disable wakeup source
*
@@ -713,7 +715,7 @@ void esp_default_wake_deep_sleep(void);
*/
void esp_deep_sleep_disable_rom_logging(void);
#if CONFIG_PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP
#if ESP_SLEEP_POWER_DOWN_CPU
#if SOC_PM_CPU_RETENTION_BY_RTCCNTL
/**
@@ -752,7 +754,7 @@ esp_err_t esp_sleep_cpu_retention_init(void);
* Release system retention memory.
*/
esp_err_t esp_sleep_cpu_retention_deinit(void);
#endif // CONFIG_PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP
#endif // ESP_SLEEP_POWER_DOWN_CPU
/**
* @brief Configure to isolate all GPIO pins in sleep state
@@ -4,7 +4,8 @@ endif()
set(srcs)
if(CONFIG_PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP)
if(CONFIG_PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP OR
(CONFIG_SOC_CPU_IN_TOP_DOMAIN AND CONFIG_PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP))
list(APPEND srcs "cpu_retention/port/${target}/sleep_cpu.c")
if(CONFIG_SOC_PM_CPU_RETENTION_BY_SW)
list(APPEND srcs "cpu_retention/port/${target}/sleep_cpu_asm.S")
@@ -102,7 +102,7 @@ bool cpu_domain_pd_allowed(void)
esp_err_t sleep_cpu_configure(bool light_sleep_enable)
{
#if CONFIG_PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP
#if ESP_SLEEP_POWER_DOWN_CPU
if (light_sleep_enable) {
ESP_RETURN_ON_ERROR(esp_sleep_cpu_retention_init(), TAG, "Failed to enable CPU power down during light sleep.");
} else {
@@ -489,7 +489,7 @@ bool cpu_domain_pd_allowed(void)
esp_err_t sleep_cpu_configure(bool light_sleep_enable)
{
#if CONFIG_PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP
#if ESP_SLEEP_POWER_DOWN_CPU
if (light_sleep_enable) {
ESP_RETURN_ON_ERROR(esp_sleep_cpu_retention_init(), TAG, "Failed to enable CPU power down during light sleep.");
} else {
@@ -532,7 +532,7 @@ bool cpu_domain_pd_allowed(void)
esp_err_t sleep_cpu_configure(bool light_sleep_enable)
{
#if CONFIG_PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP
#if ESP_SLEEP_POWER_DOWN_CPU
if (light_sleep_enable) {
ESP_RETURN_ON_ERROR(esp_sleep_cpu_retention_init(), TAG, "Failed to enable CPU power down during light sleep.");
} else {
@@ -532,7 +532,7 @@ bool cpu_domain_pd_allowed(void)
esp_err_t sleep_cpu_configure(bool light_sleep_enable)
{
#if CONFIG_PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP
#if ESP_SLEEP_POWER_DOWN_CPU
if (light_sleep_enable) {
ESP_RETURN_ON_ERROR(esp_sleep_cpu_retention_init(), TAG, "Failed to enable CPU power down during light sleep.");
} else {
@@ -41,7 +41,7 @@
#endif
#if CONFIG_PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP && !CONFIG_FREERTOS_UNICORE
#if ESP_SLEEP_POWER_DOWN_CPU && !CONFIG_FREERTOS_UNICORE
#include <stdatomic.h>
#include "soc/hp_system_reg.h"
typedef enum {
@@ -81,7 +81,7 @@ typedef struct {
} retent;
} sleep_cpu_retention_t;
static DRAM_ATTR __attribute__((unused)) sleep_cpu_retention_t s_cpu_retention;
static TCM_DRAM_ATTR __attribute__((unused)) sleep_cpu_retention_t s_cpu_retention;
extern RvCoreCriticalSleepFrame *rv_core_critical_regs_frame[portNUM_PROCESSORS];
@@ -162,7 +162,7 @@ static esp_err_t esp_sleep_cpu_retention_init_impl(void)
s_cpu_retention.retent.clic_frame[core_id] = (cpu_domain_dev_sleep_frame_t *)frame;
}
}
#if CONFIG_PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP && !CONFIG_FREERTOS_UNICORE
#if ESP_SLEEP_POWER_DOWN_CPU && !CONFIG_FREERTOS_UNICORE
for (uint8_t core_id = 0; core_id < portNUM_PROCESSORS; ++core_id) {
atomic_init(&s_smp_retention_state[core_id], SMP_IDLE);
}
@@ -209,7 +209,7 @@ FORCE_INLINE_ATTR void restore_mstatus(uint32_t mstatus_val)
RV_WRITE_CSR(mstatus, mstatus_val);
}
static IRAM_ATTR RvCoreNonCriticalSleepFrame * rv_core_noncritical_regs_save(void)
static TCM_IRAM_ATTR RvCoreNonCriticalSleepFrame * rv_core_noncritical_regs_save(void)
{
RvCoreNonCriticalSleepFrame *frame = s_cpu_retention.retent.non_critical_frame[esp_cpu_get_core_id()];
@@ -277,7 +277,7 @@ static IRAM_ATTR RvCoreNonCriticalSleepFrame * rv_core_noncritical_regs_save(voi
return frame;
}
static IRAM_ATTR void rv_core_noncritical_regs_restore(void)
static TCM_IRAM_ATTR void rv_core_noncritical_regs_restore(void)
{
RvCoreNonCriticalSleepFrame *frame = s_cpu_retention.retent.non_critical_frame[esp_cpu_get_core_id()];
@@ -343,7 +343,7 @@ static IRAM_ATTR void rv_core_noncritical_regs_restore(void)
RV_WRITE_CSR(mcycle, frame->mcycle);
}
static IRAM_ATTR void cpu_domain_dev_regs_save(cpu_domain_dev_sleep_frame_t *frame)
static TCM_IRAM_ATTR void cpu_domain_dev_regs_save(cpu_domain_dev_sleep_frame_t *frame)
{
assert(frame);
cpu_domain_dev_regs_region_t *region = frame->region;
@@ -357,7 +357,7 @@ static IRAM_ATTR void cpu_domain_dev_regs_save(cpu_domain_dev_sleep_frame_t *fra
}
}
static IRAM_ATTR void cpu_domain_dev_regs_restore(cpu_domain_dev_sleep_frame_t *frame)
static TCM_IRAM_ATTR void cpu_domain_dev_regs_restore(cpu_domain_dev_sleep_frame_t *frame)
{
assert(frame);
cpu_domain_dev_regs_region_t *region = frame->region;
@@ -372,12 +372,12 @@ static IRAM_ATTR void cpu_domain_dev_regs_restore(cpu_domain_dev_sleep_frame_t *
}
#if CONFIG_PM_CHECK_SLEEP_RETENTION_FRAME
static IRAM_ATTR void update_retention_frame_crc(uint32_t *frame_ptr, uint32_t frame_check_size, uint32_t *frame_crc_ptr)
static TCM_IRAM_ATTR void update_retention_frame_crc(uint32_t *frame_ptr, uint32_t frame_check_size, uint32_t *frame_crc_ptr)
{
*(frame_crc_ptr) = esp_crc32_le(0, (void *)frame_ptr, frame_check_size);
}
static IRAM_ATTR void validate_retention_frame_crc(uint32_t *frame_ptr, uint32_t frame_check_size, uint32_t *frame_crc_ptr)
static TCM_IRAM_ATTR void validate_retention_frame_crc(uint32_t *frame_ptr, uint32_t frame_check_size, uint32_t *frame_crc_ptr)
{
if(*(frame_crc_ptr) != esp_crc32_le(0, (void *)(frame_ptr), frame_check_size)){
// resume uarts
@@ -399,7 +399,7 @@ extern RvCoreCriticalSleepFrame * rv_core_critical_regs_save(void);
extern RvCoreCriticalSleepFrame * rv_core_critical_regs_restore(void);
typedef uint32_t (* sleep_cpu_entry_cb_t)(uint32_t, uint32_t, uint32_t, bool);
static IRAM_ATTR esp_err_t do_cpu_retention(sleep_cpu_entry_cb_t goto_sleep,
static TCM_IRAM_ATTR esp_err_t do_cpu_retention(sleep_cpu_entry_cb_t goto_sleep,
uint32_t wakeup_opt, uint32_t reject_opt, uint32_t lslp_mem_inf_fpu, bool dslp)
{
uint8_t core_id = esp_cpu_get_core_id();
@@ -410,11 +410,11 @@ static IRAM_ATTR esp_err_t do_cpu_retention(sleep_cpu_entry_cb_t goto_sleep,
esp_sleep_execute_event_callbacks(SLEEP_EVENT_SW_CPU_TO_MEM_END, (void *)0);
#if CONFIG_PM_CHECK_SLEEP_RETENTION_FRAME
/* Minus 2 * sizeof(long) is for bypass `pmufunc` and `frame_crc` field */
update_retention_frame_crc((uint32_t*)frame, RV_SLEEP_CTX_FRMSZ - 2 * sizeof(long), (uint32_t *)(&frame->frame_crc));
update_retention_frame_crc((uint32_t*)frame, RV_SLEEP_CTX_SZ1 - 2 * sizeof(long), (uint32_t *)(&frame->frame_crc));
#endif
REG_WRITE(RTC_SLEEP_WAKE_STUB_ADDR_REG, (uint32_t)rv_core_critical_regs_restore);
#if CONFIG_PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP && !CONFIG_FREERTOS_UNICORE
#if ESP_SLEEP_POWER_DOWN_CPU && !CONFIG_FREERTOS_UNICORE
atomic_store(&s_smp_retention_state[core_id], SMP_BACKUP_DONE);
while (atomic_load(&s_smp_retention_state[!core_id]) != SMP_BACKUP_DONE) {
;
@@ -425,20 +425,20 @@ static IRAM_ATTR esp_err_t do_cpu_retention(sleep_cpu_entry_cb_t goto_sleep,
}
#if CONFIG_PM_CHECK_SLEEP_RETENTION_FRAME
else {
validate_retention_frame_crc((uint32_t*)frame, RV_SLEEP_CTX_FRMSZ - 2 * sizeof(long), (uint32_t *)(&frame->frame_crc));
validate_retention_frame_crc((uint32_t*)frame, RV_SLEEP_CTX_SZ1 - 2 * sizeof(long), (uint32_t *)(&frame->frame_crc));
}
#endif
return pmu_sleep_finish();
}
esp_err_t IRAM_ATTR esp_sleep_cpu_retention(uint32_t (*goto_sleep)(uint32_t, uint32_t, uint32_t, bool),
esp_err_t TCM_IRAM_ATTR esp_sleep_cpu_retention(uint32_t (*goto_sleep)(uint32_t, uint32_t, uint32_t, bool),
uint32_t wakeup_opt, uint32_t reject_opt, uint32_t lslp_mem_inf_fpu, bool dslp)
{
esp_sleep_execute_event_callbacks(SLEEP_EVENT_SW_CPU_TO_MEM_START, (void *)0);
uint32_t mstatus = save_mstatus_and_disable_global_int();
uint8_t core_id = esp_cpu_get_core_id();
#if CONFIG_PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP && !CONFIG_FREERTOS_UNICORE
#if ESP_SLEEP_POWER_DOWN_CPU && !CONFIG_FREERTOS_UNICORE
atomic_store(&s_smp_retention_state[core_id], SMP_BACKUP_START);
#endif
cpu_domain_dev_regs_save(s_cpu_retention.retent.clic_frame[core_id]);
@@ -457,7 +457,7 @@ esp_err_t IRAM_ATTR esp_sleep_cpu_retention(uint32_t (*goto_sleep)(uint32_t, uin
validate_retention_frame_crc((uint32_t*)frame, sizeof(RvCoreNonCriticalSleepFrame) - sizeof(long), (uint32_t *)(&frame->frame_crc));
#endif
#if CONFIG_PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP && !CONFIG_FREERTOS_UNICORE
#if ESP_SLEEP_POWER_DOWN_CPU && !CONFIG_FREERTOS_UNICORE
// Start core1
if (core_id == 0) {
REG_SET_BIT(HP_SYS_CLKRST_SOC_CLK_CTRL0_REG, HP_SYS_CLKRST_REG_CORE1_CPU_CLK_EN);
@@ -472,7 +472,7 @@ esp_err_t IRAM_ATTR esp_sleep_cpu_retention(uint32_t (*goto_sleep)(uint32_t, uin
cpu_domain_dev_regs_restore(s_cpu_retention.retent.clic_frame[core_id]);
restore_mstatus(mstatus);
#if CONFIG_PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP && !CONFIG_FREERTOS_UNICORE
#if ESP_SLEEP_POWER_DOWN_CPU && !CONFIG_FREERTOS_UNICORE
atomic_store(&s_smp_retention_state[core_id], SMP_RESTORE_DONE);
#endif
return err;
@@ -504,7 +504,7 @@ bool cpu_domain_pd_allowed(void)
esp_err_t sleep_cpu_configure(bool light_sleep_enable)
{
#if CONFIG_PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP
#if ESP_SLEEP_POWER_DOWN_CPU
if (light_sleep_enable) {
ESP_RETURN_ON_ERROR(esp_sleep_cpu_retention_init(), TAG, "Failed to enable CPU power down during light sleep.");
} else {
@@ -515,7 +515,7 @@ esp_err_t sleep_cpu_configure(bool light_sleep_enable)
}
#if !CONFIG_FREERTOS_UNICORE
#if CONFIG_PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP
#if ESP_SLEEP_POWER_DOWN_CPU
static TCM_IRAM_ATTR void smp_core_do_retention(void)
{
uint8_t core_id = esp_cpu_get_core_id();
@@ -572,14 +572,14 @@ static TCM_IRAM_ATTR void smp_core_do_retention(void)
}
IRAM_ATTR void esp_sleep_cpu_skip_retention(void) {
TCM_IRAM_ATTR void esp_sleep_cpu_skip_retention(void) {
atomic_store(&s_smp_retention_state[esp_cpu_get_core_id()], SMP_SKIP_RETENTION);
}
#endif
void sleep_smp_cpu_sleep_prepare(void)
{
#if CONFIG_PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP
#if ESP_SLEEP_POWER_DOWN_CPU
while (atomic_load(&s_smp_retention_state[!esp_cpu_get_core_id()]) != SMP_IDLE) {
;
}
@@ -591,7 +591,7 @@ void sleep_smp_cpu_sleep_prepare(void)
void sleep_smp_cpu_wakeup_prepare(void)
{
#if CONFIG_PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP
#if ESP_SLEEP_POWER_DOWN_CPU
uint8_t core_id = esp_cpu_get_core_id();
if (atomic_load(&s_smp_retention_state[core_id]) == SMP_RESTORE_DONE) {
while (atomic_load(&s_smp_retention_state[!core_id]) != SMP_RESTORE_DONE) {
@@ -117,28 +117,6 @@ rv_core_critical_regs_save:
mv t3, t0
csrr t0, mscratch
sw t0, RV_SLP_CTX_T0(t3)
/* writeback dcache is required here!!! */
la t0, CACHE_SYNC_MAP_REG
li t1, 0x10 /* map l1 dcache */
sw t1, 0x0(t0) /* set EXTMEM_CACHE_SYNC_MAP_REG bit 4 */
la t2, CACHE_SYNC_ADDR_REG
sw zero, 0x0(t2) /* clear EXTMEM_CACHE_SYNC_ADDR_REG */
la t0, CACHE_SYNC_SIZE_REG
sw zero, 0x0(t0) /* clear EXTMEM_CACHE_SYNC_SIZE_REG */
la t1, CACHE_SYNC_CTRL_REG
lw t2, 0x0(t1)
ori t2, t2, 0x4
sw t2, 0x0(t1)
li t0, 0x10 /* SYNC_DONE bit */
wait_sync_done:
lw t2, 0x0(t1)
and t2, t0, t2
beqz t2, wait_sync_done
lw t0, RV_SLP_CTX_T0(t3)
lw t1, RV_SLP_CTX_T1(t3)
lw t2, RV_SLP_CTX_T2(t3)
lw t3, RV_SLP_CTX_T3(t3)
@@ -232,7 +232,7 @@ bool cpu_domain_pd_allowed(void)
esp_err_t sleep_cpu_configure(bool light_sleep_enable)
{
#if CONFIG_PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP
#if ESP_SLEEP_POWER_DOWN_CPU
if (light_sleep_enable) {
ESP_RETURN_ON_ERROR(esp_sleep_cpu_retention_init(), TAG, "Failed to enable CPU power down during light sleep.");
} else {
+1 -1
View File
@@ -454,7 +454,7 @@ void modem_clock_deselect_lp_clock_source(periph_module_t module)
pmu_sleep_enable_hp_sleep_sysclk(false);
}
modem_clock_hal_enable_wifipwr_clock(MODEM_CLOCK_instance()->hal, false);
modem_clock_domain_clk_gate_enable(MODEM_CLOCK_DOMAIN_WIFI, PMU_HP_ICG_MODEM_CODE_SLEEP);
modem_clock_domain_clk_gate_enable(MODEM_CLOCK_DOMAIN_WIFIPWR, PMU_HP_ICG_MODEM_CODE_SLEEP);
}
#endif
break;
@@ -646,18 +646,6 @@ void rtc_sleep_init(rtc_sleep_config_t cfg);
*/
void rtc_sleep_low_init(uint32_t slowclk_period);
#if CONFIG_ESP_SLEEP_SYSTIMER_STALL_WORKAROUND
/**
* @brief Configure systimer for esp32c3 systimer stall issue workaround
*
* This function configures related systimer for esp32c3 systimer stall issue.
* Only apply workaround when xtal powered up.
*
* @param en enable systimer or not
*/
void rtc_sleep_systimer_enable(bool en);
#endif
#define RTC_GPIO_TRIG_EN BIT(2) //!< GPIO wakeup
#define RTC_TIMER_TRIG_EN BIT(3) //!< Timer wakeup
#define RTC_WIFI_TRIG_EN BIT(5) //!< WIFI wakeup (light sleep only)
@@ -24,7 +24,7 @@
#include "soc/regi2c_dig_reg.h"
#include "soc/regi2c_lp_bias.h"
#include "hal/efuse_hal.h"
#if CONFIG_ESP_SLEEP_SYSTIMER_STALL_WORKAROUND
#if SOC_SLEEP_SYSTIMER_STALL_WORKAROUND
#include "soc/systimer_reg.h"
#endif
@@ -252,17 +252,6 @@ void rtc_sleep_low_init(uint32_t slowclk_period)
REG_SET_FIELD(RTC_CNTL_TIMER1_REG, RTC_CNTL_CK8M_WAIT, RTC_CNTL_CK8M_WAIT_SLP_CYCLES);
}
#if CONFIG_ESP_SLEEP_SYSTIMER_STALL_WORKAROUND
void rtc_sleep_systimer_enable(bool en)
{
if (en) {
REG_SET_BIT(SYSTIMER_CONF_REG, SYSTIMER_TIMER_UNIT1_WORK_EN);
} else {
REG_CLR_BIT(SYSTIMER_CONF_REG, SYSTIMER_TIMER_UNIT1_WORK_EN);
}
}
#endif
static uint32_t rtc_sleep_finish(uint32_t lslp_mem_inf_fpu);
uint32_t rtc_sleep_start(uint32_t wakeup_opt, uint32_t reject_opt, uint32_t lslp_mem_inf_fpu)
@@ -11,11 +11,14 @@ choice ESP32P4_REV_MIN
config ESP32P4_REV_MIN_0
bool "Rev v0.0"
config ESP32P4_REV_MIN_1
bool "Rev v0.1"
endchoice
config ESP32P4_REV_MIN_FULL
int
default 0 if ESP32P4_REV_MIN_0
default 1 if ESP32P4_REV_MIN_1
config ESP_REV_MIN_FULL
int
@@ -12,10 +12,13 @@
#include "esp_err.h"
#include "esp_attr.h"
#include "esp_private/regi2c_ctrl.h"
#include "esp32p4/rom/cache.h"
#include "soc/chip_revision.h"
#include "soc/soc.h"
#include "soc/regi2c_syspll.h"
#include "soc/regi2c_cpll.h"
#include "soc/rtc.h"
#include "soc/cache_reg.h"
#include "soc/pau_reg.h"
#include "soc/pmu_reg.h"
#include "soc/pmu_struct.h"
@@ -27,6 +30,7 @@
#include "pmu_param.h"
#include "esp_rom_sys.h"
#include "esp_rom_uart.h"
#include "hal/efuse_hal.h"
#define HP(state) (PMU_MODE_HP_ ## state)
#define LP(state) (PMU_MODE_LP_ ## state)
@@ -283,6 +287,11 @@ void pmu_sleep_shutdown_ldo(void) {
CLEAR_PERI_REG_MASK(PMU_HP_ACTIVE_HP_REGULATOR0_REG, PMU_HP_ACTIVE_HP_REGULATOR_XPD);
}
FORCE_INLINE_ATTR void sleep_writeback_l1_dcache(void) {
Cache_WriteBack_All(CACHE_MAP_L1_DCACHE);
while (!REG_GET_BIT(CACHE_SYNC_CTRL_REG, CACHE_SYNC_DONE));
}
TCM_IRAM_ATTR uint32_t pmu_sleep_start(uint32_t wakeup_opt, uint32_t reject_opt, uint32_t lslp_mem_inf_fpu, bool dslp)
{
lp_aon_hal_inform_wakeup_type(dslp);
@@ -295,6 +304,8 @@ TCM_IRAM_ATTR uint32_t pmu_sleep_start(uint32_t wakeup_opt, uint32_t reject_opt,
pmu_ll_hp_clear_reject_intr_status(PMU_instance()->hal->dev);
pmu_ll_hp_clear_reject_cause(PMU_instance()->hal->dev);
sleep_writeback_l1_dcache();
/* Start entry into sleep mode */
pmu_ll_hp_set_sleep_enable(PMU_instance()->hal->dev);
@@ -317,8 +328,11 @@ TCM_IRAM_ATTR bool pmu_sleep_finish(void)
}
pmu_sleep_shutdown_ldo();
REGI2C_WRITE_MASK(I2C_CPLL, I2C_CPLL_OC_DIV_7_0, 6); // lower default cpu_pll freq to 400M
REGI2C_WRITE_MASK(I2C_SYSPLL, I2C_SYSPLL_OC_DIV_7_0, 8); // lower default sys_pll freq to 480M
unsigned chip_version = efuse_hal_chip_revision();
if (!ESP_CHIP_REV_ABOVE(chip_version, 1)) {
REGI2C_WRITE_MASK(I2C_CPLL, I2C_CPLL_OC_DIV_7_0, 6); // lower default cpu_pll freq to 400M
REGI2C_WRITE_MASK(I2C_SYSPLL, I2C_SYSPLL_OC_DIV_7_0, 8); // lower default sys_pll freq to 480M
}
return pmu_ll_hp_is_sleep_reject(PMU_instance()->hal->dev);
}
+68 -22
View File
@@ -30,6 +30,15 @@
#include "hal/rtc_io_hal.h"
#include "hal/clk_tree_hal.h"
#if SOC_SLEEP_SYSTIMER_STALL_WORKAROUND
#include "hal/systimer_ll.h"
#endif
#if SOC_SLEEP_TGWDT_STOP_WORKAROUND
#include "hal/mwdt_ll.h"
#include "hal/timer_ll.h"
#endif
#if SOC_PM_SUPPORT_PMU_MODEM_STATE
#include "esp_private/pm_impl.h"
#endif
@@ -489,6 +498,52 @@ static void IRAM_ATTR resume_cache(void) {
}
}
#if SOC_SLEEP_TGWDT_STOP_WORKAROUND
static uint32_t s_stopped_tgwdt_bmap = 0;
#endif
// Must be called from critical sections.
static void IRAM_ATTR suspend_timers(uint32_t pd_flags) {
if (!(pd_flags & RTC_SLEEP_PD_XTAL)) {
#if SOC_SLEEP_TGWDT_STOP_WORKAROUND
/* If timegroup implemented task watchdog or interrupt watchdog is running, we have to stop it. */
for (uint32_t tg_num = 0; tg_num < SOC_TIMER_GROUPS; ++tg_num) {
if (mwdt_ll_check_if_enabled(TIMER_LL_GET_HW(tg_num))) {
mwdt_ll_write_protect_disable(TIMER_LL_GET_HW(tg_num));
mwdt_ll_disable(TIMER_LL_GET_HW(tg_num));
mwdt_ll_write_protect_enable(TIMER_LL_GET_HW(tg_num));
s_stopped_tgwdt_bmap |= BIT(tg_num);
}
}
#endif
#if SOC_SLEEP_SYSTIMER_STALL_WORKAROUND
for (uint32_t counter_id = 0; counter_id < SOC_SYSTIMER_COUNTER_NUM; ++counter_id) {
systimer_ll_enable_counter(&SYSTIMER, counter_id, false);
}
#endif
}
}
// Must be called from critical sections.
static void IRAM_ATTR resume_timers(uint32_t pd_flags) {
if (!(pd_flags & RTC_SLEEP_PD_XTAL)) {
#if SOC_SLEEP_SYSTIMER_STALL_WORKAROUND
for (uint32_t counter_id = 0; counter_id < SOC_SYSTIMER_COUNTER_NUM; ++counter_id) {
systimer_ll_enable_counter(&SYSTIMER, counter_id, true);
}
#endif
#if SOC_SLEEP_TGWDT_STOP_WORKAROUND
for (uint32_t tg_num = 0; tg_num < SOC_TIMER_GROUPS; ++tg_num) {
if (s_stopped_tgwdt_bmap & BIT(tg_num)) {
mwdt_ll_write_protect_disable(TIMER_LL_GET_HW(tg_num));
mwdt_ll_enable(TIMER_LL_GET_HW(tg_num));
mwdt_ll_write_protect_enable(TIMER_LL_GET_HW(tg_num));
}
}
#endif
}
}
// [refactor-todo] provide target logic for body of uart functions below
static void IRAM_ATTR flush_uarts(void)
{
@@ -870,22 +925,17 @@ static esp_err_t IRAM_ATTR esp_sleep_start(uint32_t pd_flags, esp_sleep_mode_t m
}
}
#if CONFIG_ESP_SLEEP_SYSTIMER_STALL_WORKAROUND
if (!(pd_flags & RTC_SLEEP_PD_XTAL)) {
rtc_sleep_systimer_enable(false);
}
#endif
if (should_skip_sleep) {
result = ESP_ERR_SLEEP_REJECT;
#if CONFIG_PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP && !CONFIG_FREERTOS_UNICORE && SOC_PM_CPU_RETENTION_BY_SW
#if ESP_SLEEP_POWER_DOWN_CPU && !CONFIG_FREERTOS_UNICORE && SOC_PM_CPU_RETENTION_BY_SW
esp_sleep_cpu_skip_retention();
#endif
} else {
#if CONFIG_ESP_SLEEP_DEBUG
if (s_sleep_ctx != NULL) {
s_sleep_ctx->wakeup_triggers = s_config.wakeup_triggers;
}
if (s_sleep_ctx != NULL) {
s_sleep_ctx->wakeup_triggers = s_config.wakeup_triggers;
}
#endif
if (deep_sleep) {
#if !SOC_GPIO_SUPPORT_HOLD_SINGLE_IO_IN_DSLP
@@ -913,6 +963,7 @@ static esp_err_t IRAM_ATTR esp_sleep_start(uint32_t pd_flags, esp_sleep_mode_t m
result = rtc_deep_sleep_start(s_config.wakeup_triggers, reject_triggers);
#endif
} else {
suspend_timers(pd_flags);
/* Cache Suspend 1: will wait cache idle in cache suspend */
suspend_cache();
/* On esp32c6, only the lp_aon pad hold function can only hold the GPIO state in the active mode.
@@ -942,14 +993,14 @@ static esp_err_t IRAM_ATTR esp_sleep_start(uint32_t pd_flags, esp_sleep_mode_t m
#endif
#if SOC_PMU_SUPPORTED
#if SOC_PM_CPU_RETENTION_BY_SW && CONFIG_PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP
#if SOC_PM_CPU_RETENTION_BY_SW && ESP_SLEEP_POWER_DOWN_CPU
esp_sleep_execute_event_callbacks(SLEEP_EVENT_HW_GOTO_SLEEP, (void *)0);
if (pd_flags & (PMU_SLEEP_PD_CPU | PMU_SLEEP_PD_TOP)) {
result = esp_sleep_cpu_retention(pmu_sleep_start, s_config.wakeup_triggers, reject_triggers, config.power.hp_sys.dig_power.mem_dslp, deep_sleep);
} else
#endif
{
#if !CONFIG_FREERTOS_UNICORE && CONFIG_PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP && SOC_PM_CPU_RETENTION_BY_SW
#if !CONFIG_FREERTOS_UNICORE && ESP_SLEEP_POWER_DOWN_CPU && SOC_PM_CPU_RETENTION_BY_SW
// Skip smp retention if CPU power domain power-down is not allowed
esp_sleep_cpu_skip_retention();
#endif
@@ -977,13 +1028,8 @@ static esp_err_t IRAM_ATTR esp_sleep_start(uint32_t pd_flags, esp_sleep_mode_t m
#endif
/* Cache Resume 1: Resume cache for continue running*/
resume_cache();
resume_timers(pd_flags);
}
#if CONFIG_ESP_SLEEP_SYSTIMER_STALL_WORKAROUND
if (!(pd_flags & RTC_SLEEP_PD_XTAL)) {
rtc_sleep_systimer_enable(true);
}
#endif
}
#if CONFIG_ESP_SLEEP_CACHE_SAFE_ASSERTION
if (pd_flags & RTC_SLEEP_PD_VDDSDIO) {
@@ -1256,7 +1302,7 @@ esp_err_t esp_light_sleep_start(void)
#endif
#if !CONFIG_FREERTOS_UNICORE
#if CONFIG_PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP && SOC_PM_CPU_RETENTION_BY_SW
#if ESP_SLEEP_POWER_DOWN_CPU && SOC_PM_CPU_RETENTION_BY_SW
sleep_smp_cpu_sleep_prepare();
#else
esp_ipc_isr_stall_other_cpu();
@@ -1374,7 +1420,7 @@ esp_err_t esp_light_sleep_start(void)
// Enter sleep, then wait for flash to be ready on wakeup
err = esp_light_sleep_inner(pd_flags, flash_enable_time_us);
}
#if !CONFIG_FREERTOS_UNICORE && CONFIG_PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP && SOC_PM_CPU_RETENTION_BY_SW
#if !CONFIG_FREERTOS_UNICORE && ESP_SLEEP_POWER_DOWN_CPU && SOC_PM_CPU_RETENTION_BY_SW
if (err != ESP_OK) {
esp_sleep_cpu_skip_retention();
}
@@ -1412,7 +1458,7 @@ esp_err_t esp_light_sleep_start(void)
#if !CONFIG_FREERTOS_UNICORE
esp_ipc_isr_stall_resume();
#if CONFIG_PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP && SOC_PM_CPU_RETENTION_BY_SW
#if ESP_SLEEP_POWER_DOWN_CPU && SOC_PM_CPU_RETENTION_BY_SW
sleep_smp_cpu_wakeup_prepare();
#else
esp_ipc_isr_release_other_cpu();
@@ -2063,7 +2109,7 @@ esp_err_t esp_sleep_pd_config(esp_sleep_pd_domain_t domain, esp_sleep_pd_option_
#if SOC_PM_SUPPORT_TOP_PD
FORCE_INLINE_ATTR bool top_domain_pd_allowed(void) {
bool top_pd_allowed = true;
#if CONFIG_PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP
#if ESP_SLEEP_POWER_DOWN_CPU
top_pd_allowed &= cpu_domain_pd_allowed();
#else
top_pd_allowed = false;
@@ -2179,7 +2225,7 @@ static uint32_t get_power_down_flags(void)
}
#endif
#if SOC_PM_SUPPORT_CPU_PD
#if SOC_PM_SUPPORT_CPU_PD && ESP_SLEEP_POWER_DOWN_CPU
if ((s_config.domain[ESP_PD_DOMAIN_CPU].pd_option != ESP_PD_OPTION_ON) && cpu_domain_pd_allowed()) {
pd_flags |= RTC_SLEEP_PD_CPU;
}
+3 -2
View File
@@ -84,7 +84,8 @@ menu "Power Management"
config PM_CHECK_SLEEP_RETENTION_FRAME
bool
depends on PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP
depends on (PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP || \
(SOC_CPU_IN_TOP_DOMAIN && PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP))
default y if IDF_CI_BUILD
default n
help
@@ -142,7 +143,7 @@ menu "Power Management"
config PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP
bool "Power down Digital Peripheral in light sleep (EXPERIMENTAL)"
depends on SOC_PM_SUPPORT_TOP_PD
select PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP
select PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP if !SOC_CPU_IN_TOP_DOMAIN
default n #TODO: enable by default if periph init/deinit management supported (WIFI-5252)
help
If enabled, digital peripherals will be powered down in light sleep, it will reduce sleep
+1 -1
View File
@@ -29,7 +29,7 @@ entries:
sleep_gpio:gpio_sleep_mode_config_apply (noflash)
if SOC_PM_CPU_RETENTION_BY_RTCCNTL = y && (PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP = y || SOC_PM_SUPPORT_TAGMEM_PD = y):
sleep_cpu:sleep_enable_cpu_retention (noflash)
if PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP = y:
if PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP = y || (SOC_CPU_IN_TOP_DOMAIN = y && PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP = y):
sleep_cpu:cpu_domain_pd_allowed (noflash)
if SOC_PM_SUPPORT_TOP_PD = y:
sleep_clock:clock_domain_pd_allowed (noflash)
+1 -1
View File
@@ -372,7 +372,7 @@ static esp_err_t esp_pm_sleep_configure(const void *vconfig)
esp_err_t err = ESP_OK;
const esp_pm_config_t* config = (const esp_pm_config_t*) vconfig;
#if CONFIG_PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP
#if ESP_SLEEP_POWER_DOWN_CPU
err = sleep_cpu_configure(config->light_sleep_enable);
if (err != ESP_OK) {
return err;
@@ -4,6 +4,7 @@ components/esp_pm/test_apps:
enable:
- if: INCLUDE_DEFAULT == 1
disable:
- if: CONFIG_NAME == "pm_pd_top_sleep" and IDF_TARGET not in ["esp32c6", "esp32h2", "esp32p4"]
- if: IDF_TARGET == "esp32c5"
temporary: true
reason: not support yet # TODO: [ESP32C5] IDF-8643
@@ -226,8 +226,9 @@ TEST_CASE("Can wake up from automatic light sleep by GPIO", "[pm][ignore]")
printf("%lld %lld %u\n", end_rtc - start_rtc, end_hs - start_hs, end_tick - start_tick);
TEST_ASSERT_INT32_WITHIN(3, delay_ticks, end_tick - start_tick);
TEST_ASSERT_INT32_WITHIN(2 * portTICK_PERIOD_MS * 1000, delay_ms * 1000, end_hs - start_hs);
TEST_ASSERT_INT32_WITHIN(2 * portTICK_PERIOD_MS * 1000, delay_ms * 1000, end_rtc - start_rtc);
// Error tolerance is 2 tick + duration * 5%
TEST_ASSERT_INT32_WITHIN((2 * portTICK_PERIOD_MS + delay_ms / 20) * 1000, delay_ms * 1000, end_hs - start_hs);
TEST_ASSERT_INT32_WITHIN((2 * portTICK_PERIOD_MS + delay_ms / 20) * 1000, delay_ms * 1000, end_rtc - start_rtc);
}
REG_CLR_BIT(rtc_io_desc[rtcio_num].reg, rtc_io_desc[rtcio_num].hold_force);
rtc_gpio_deinit(ext1_wakeup_gpio);
@@ -277,13 +278,15 @@ TEST_CASE("vTaskDelay duration is correct with light sleep enabled", "[pm]")
xTaskCreatePinnedToCore(test_delay_task, "", 2048, (void *) &args, 3, NULL, 0);
TEST_ASSERT( xSemaphoreTake(done_sem, delay_ms * 10 / portTICK_PERIOD_MS) );
printf("CPU0: %d %d\n", args.delay_us, args.result);
TEST_ASSERT_INT32_WITHIN(1000 * portTICK_PERIOD_MS * 2, args.delay_us, args.result);
// Error tolerance is 2 tick + duration * 5%
TEST_ASSERT_INT32_WITHIN((portTICK_PERIOD_MS * 2 + args.delay_us / 20) * 1000, args.delay_us, args.result);
#if CONFIG_FREERTOS_NUMBER_OF_CORES == 2
xTaskCreatePinnedToCore(test_delay_task, "", 2048, (void *) &args, 3, NULL, 1);
TEST_ASSERT( xSemaphoreTake(done_sem, delay_ms * 10 / portTICK_PERIOD_MS) );
printf("CPU1: %d %d\n", args.delay_us, args.result);
TEST_ASSERT_INT32_WITHIN(1000 * portTICK_PERIOD_MS * 2, args.delay_us, args.result);
// Error tolerance is 2 tick + duration * 5%
TEST_ASSERT_INT32_WITHIN((portTICK_PERIOD_MS * 2 + args.delay_us / 20) * 1000, args.delay_us, args.result);
#endif
}
vSemaphoreDelete(done_sem);
@@ -1,4 +1,4 @@
# SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
# SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
# SPDX-License-Identifier: Apache-2.0
import pytest
from pytest_embedded import Dut
@@ -42,3 +42,18 @@ def test_esp_attr_xip_psram_esp32s2(dut: Dut) -> None:
)
def test_esp_attr_xip_psram_esp32s3(dut: Dut) -> None:
dut.run_all_single_board_cases()
# power down CPU and TOP domain in auto-lightsleep
@pytest.mark.esp32c6
@pytest.mark.esp32h2
@pytest.mark.esp32p4
@pytest.mark.generic
@pytest.mark.parametrize(
'config',
[
'pm_pd_top_sleep'
],
)
def test_esp_pd_top_and_cpu_sleep(dut: Dut) -> None:
dut.run_all_single_board_cases()
@@ -0,0 +1 @@
CONFIG_PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP=y
+2 -1
View File
@@ -1474,7 +1474,7 @@ PROVIDE ( uart_tx_switch = 0x40009028 );
/*
These functions are part of the ROM GPIO driver. We do not use them; the provided esp-idf functions
replace them and this way we can re-use the fixed RAM addresses these routines need.
replace them and this way we can reuse the fixed RAM addresses these routines need.
*/
/* <-- So you don't read over it: This comment disables the next lines.
PROVIDE ( gpio_init = 0x40009c20 );
@@ -1623,6 +1623,7 @@ PROVIDE ( ld_acl_sniff_trans_sched = 0x40033734 );
PROVIDE ( lc_pwr_decr_ind_handler = 0x4002859c );
PROVIDE ( lc_pwr_incr_ind_handler = 0x400284a8 );
PROVIDE ( lc_pwr_max_ind_handler = 0x40028690 );
PROVIDE ( lc_setup_sync_param_check = 0x4002354c );
PROVIDE ( lm_sync_conf = 0x3ffb8348 );
PROVIDE ( lm_nb_sync_active = 0x3ffb8346 );
+6 -6
View File
@@ -1430,7 +1430,7 @@ mac_tx_set_plcp2 = 0x40001b68;
/* pm_check_state = 0x40001b6c; */
pm_disable_dream_timer = 0x40001b70;
pm_disable_sleep_delay_timer = 0x40001b74;
pm_dream = 0x40001b78;
/*pm_dream = 0x40001b78;*/
pm_mac_wakeup = 0x40001b7c;
pm_mac_sleep = 0x40001b80;
pm_enable_active_timer = 0x40001b84;
@@ -1611,7 +1611,7 @@ hal_disable_sta_tbtt = 0x40001e3c;
ppCalTxopDur = 0x40001e40;
wDev_IndicateCtrlFrame = 0x40001e44;
hal_enable_sta_tbtt = 0x40001e48;
hal_set_sta_tbtt = 0x40001e4c;
/*hal_set_sta_tbtt = 0x40001e4c;*/
/* pm_update_next_tbtt = 0x40001e50;*/
/* pm_set_sleep_type = 0x40001e54; */
wDev_Rxbuf_Init = 0x40001e58;
@@ -1655,7 +1655,7 @@ hal_sniffer_enable = 0x40001eec;
hal_sniffer_disable = 0x40001ef0;
/*hal_sniffer_rx_set_promis = 0x40001ef4;*/
hal_sniffer_rx_clr_statistics = 0x40001ef8;
hal_sniffer_set_promis_misc_pkt = 0x40001efc;
/*hal_sniffer_set_promis_misc_pkt = 0x40001efc;*/
tsf_hal_set_tsf_enable = 0x40001f00;
tsf_hal_set_tsf_disable = 0x40001f04;
tsf_hal_is_tsf_enabled = 0x40001f08;
@@ -1670,7 +1670,7 @@ tsf_hal_set_tbtt_intr_enable = 0x40001f28;
tsf_hal_set_tbtt_intr_disable = 0x40001f2c;
tsf_hal_set_tbtt_soc_wakeup_enable = 0x40001f30;
tsf_hal_set_tbtt_soc_wakeup_disable = 0x40001f34;
tsf_hal_set_tbtt_start_time = 0x40001f38;
/*tsf_hal_set_tbtt_start_time = 0x40001f38;*/
tsf_hal_set_tbtt_early_time = 0x40001f3c;
tsf_hal_set_tbtt_interval = 0x40001f40;
tsf_hal_get_tbtt_interval = 0x40001f44;
@@ -1849,11 +1849,11 @@ ieee80211_alloc_tx_buf = 0x40002108;
/* ieee80211_send_nulldata = 0x40002110; */
/* ieee80211_setup_robust_mgmtframe = 0x40002114; */
ieee80211_encap_null_data = 0x4000211c;
ieee80211_send_deauth = 0x40002120;
ieee80211_send_deauth_no_bss = 0x40002120;
ieee80211_alloc_deauth = 0x40002124;
ieee80211_send_proberesp = 0x40002128;
ieee80211_getcapinfo = 0x40002130;
sta_rx_csa = 0x40002134;
/* sta_rx_csa = 0x40002134; */
/* sta_recv_sa_query_resp = 0x40002144; */
ieee80211_set_max_rate = 0x4000214c;
ic_set_sta = 0x40002150;
@@ -15,7 +15,7 @@ lmacTxFrame = 0x40001630;
mac_tx_set_htsig = 0x40001638;
mac_tx_set_plcp1 = 0x40001640;
pm_check_state = 0x40001648;
pm_on_beacon_rx = 0x4000167c;
/*pm_on_beacon_rx = 0x4000167c;*/
/*pm_parse_beacon = 0x40001688;*/
pm_process_tim = 0x4000168c;
pm_rx_beacon_process = 0x40001690;
@@ -31,9 +31,9 @@ rcUpdateTxDone = 0x4000177c;
wDevCheckBlockError = 0x400017b4;
/* wDev_IndicateFrame = 0x400017c8;*/
wDev_ProcessFiq = 0x400017f0;
wDev_ProcessRxSucData = 0x400017f4;
/*wDev_ProcessRxSucData = 0x400017f4;*/
/*ppProcTxDone = 0x40001804;*/
pm_tx_data_done_process = 0x40001808;
/*pm_tx_data_done_process = 0x40001808;*/
ppMapWaitTxq = 0x40001810;
/*ieee80211_encap_esfbuf = 0x4000185c;*/
/*sta_input = 0x40001870;*/
+1 -1
View File
@@ -1538,7 +1538,7 @@ mac_tx_set_plcp2 = 0x40001644;
/* pm_check_state = 0x40001648; */
pm_disable_dream_timer = 0x4000164c;
pm_disable_sleep_delay_timer = 0x40001650;
pm_dream = 0x40001654;
/*pm_dream = 0x40001654;*/
pm_mac_wakeup = 0x40001658;
pm_mac_sleep = 0x4000165c;
pm_enable_active_timer = 0x40001660;
@@ -74,7 +74,7 @@ lmacReachLongLimit = 0x40000cb8;
lmacReachShortLimit = 0x40000cbc;
lmacRecycleMPDU = 0x40000cc0;
lmacRxDone = 0x40000cc4;
lmacSetTxFrame = 0x40000cc8;
/*lmacSetTxFrame = 0x40000cc8;*/
lmacTxDone = 0x40000ccc;
lmacTxFrame = 0x40000cd0;
lmacDisableTransmit = 0x40000cd4;
@@ -109,7 +109,7 @@ mac_tx_set_pti = 0x40000d44;
pm_check_state = 0x40000d48;
pm_disable_dream_timer = 0x40000d4c;
pm_disable_sleep_delay_timer = 0x40000d50;
pm_dream = 0x40000d54;
/*pm_dream = 0x40000d54;*/
pm_mac_wakeup = 0x40000d58;
pm_mac_sleep = 0x40000d5c;
pm_enable_active_timer = 0x40000d60;
@@ -119,7 +119,7 @@ pm_set_beacon_filter = 0x40000d6c;
pm_is_in_wifi_slice_threshold = 0x40000d70;
pm_is_waked = 0x40000d74;
pm_keep_alive = 0x40000d78;
pm_on_beacon_rx = 0x40000d7c;
/*pm_on_beacon_rx = 0x40000d7c;*/
pm_on_data_rx = 0x40000d80;
pm_on_data_tx = 0x40000d84;
pm_on_tbtt = 0x40000d88;
@@ -133,13 +133,13 @@ pm_parse_beacon = 0x40000da4;
pm_process_tim = 0x40000da8;
pm_rx_beacon_process = 0x40000dac;
pm_rx_data_process = 0x40000db0;
pm_sleep = 0x40000db4;
/*pm_sleep = 0x40000db4;*/
pm_sleep_for = 0x40000db8;
pm_tbtt_process = 0x40000dbc;
pm_tx_data_done_process = 0x40000dc0;
/*pm_tbtt_process = 0x40000dbc;*/
/*pm_tx_data_done_process = 0x40000dc0;*/
pm_allow_tx = 0x40000dc4;
pm_extend_tbtt_adaptive_servo = 0x40000dc8;
pm_scale_listen_interval = 0x40000dcc;
/*pm_scale_listen_interval = 0x40000dcc;*/
pm_parse_mbssid_element = 0x40000dd0;
pm_disconnected_wake = 0x40000dd4;
pm_tx_data_process = 0x40000dd8;
@@ -153,7 +153,7 @@ pm_twt_set_target_tsf = 0x40000df4;
pm_enable_twt_keep_alive_timer = 0x40000df8;
pm_mac_try_enable_modem_state = 0x40000dfc;
pm_beacon_monitor_tbtt_timeout_process = 0x40000e00;
pm_update_next_tbtt = 0x40000e04;
/*pm_update_next_tbtt = 0x40000e04;*/
pm_twt_disallow_tx = 0x40000e08;
pm_clear_wakeup_signal = 0x40000e0c;
pm_mac_disable_tsf_tbtt_soc_wakeup = 0x40000e10;
@@ -59,7 +59,7 @@ mac_tx_set_plcp2 = 0x40000c6c;
/* pm_check_state = 0x40000c70; */
/* pm_disable_dream_timer = 0x40000c74; */
pm_disable_sleep_delay_timer = 0x40000c78;
pm_dream = 0x40000c7c;
/*pm_dream = 0x40000c7c;*/
pm_mac_wakeup = 0x40000c80;
pm_mac_sleep = 0x40000c84;
//pm_enable_active_timer = 0x40000c88;
@@ -274,7 +274,7 @@ tsf_hal_set_tbtt_rf_ctrl_enable = 0x40000fc8;
tsf_hal_set_tbtt_rf_ctrl_wait_cycles = 0x40000fcc;
tsf_hal_set_tbtt_soc_wakeup_disable = 0x40000fd0;
tsf_hal_set_tbtt_soc_wakeup_enable = 0x40000fd4;
tsf_hal_set_tbtt_start_time = 0x40000fd8;
/*tsf_hal_set_tbtt_start_time = 0x40000fd8;*/
tsf_hal_set_time = 0x40000fdc;
tsf_hal_set_timer_disable = 0x40000fe0;
tsf_hal_set_timer_enable = 0x40000fe4;
@@ -48,7 +48,7 @@ lmacReachLongLimit = 0x40000b60;
lmacReachShortLimit = 0x40000b64;
lmacRecycleMPDU = 0x40000b68;
lmacRxDone = 0x40000b6c;
lmacSetTxFrame = 0x40000b70;
/*lmacSetTxFrame = 0x40000b70;*/
lmacTxDone = 0x40000b74;
lmacTxFrame = 0x40000b78;
mac_tx_set_duration = 0x40000b7c;
+1 -1
View File
@@ -1816,7 +1816,7 @@ mac_tx_set_plcp2 = 0x4000540c;
/* pm_check_state = 0x40005418; */
pm_disable_dream_timer = 0x40005424;
pm_disable_sleep_delay_timer = 0x40005430;
pm_dream = 0x4000543c;
/*pm_dream = 0x4000543c;*/
pm_mac_wakeup = 0x40005448;
pm_mac_sleep = 0x40005454;
pm_enable_active_timer = 0x40005460;
+12 -2
View File
@@ -352,6 +352,7 @@ SECTIONS
__XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
*(.xt_except_desc_end)
#if CONFIG_COMPILER_CXX_EXCEPTIONS
ALIGNED_SYMBOL(4, __eh_frame)
KEEP(*(.eh_frame))
/**
@@ -359,6 +360,7 @@ SECTIONS
* (see __FRAME_END__ in libgcc sources), it is manually provided here.
*/
LONG(0);
#endif // CONFIG_COMPILER_CXX_EXCEPTIONS
/**
* C++ constructor tables.
@@ -500,12 +502,20 @@ SECTIONS
*/
.xt.prop 0 :
{
KEEP (*(.xt.prop .gnu.linkonce.prop.*))
KEEP (*(.xt.prop .xt.prop.* .gnu.linkonce.prop.*))
}
.xt.lit 0 :
{
KEEP (*(.xt.lit .gnu.linkonce.p.*))
KEEP (*(.xt.lit .xt.lit.* .gnu.linkonce.p.*))
}
/DISCARD/ :
{
*(.eh_frame_hdr)
#if !CONFIG_COMPILER_CXX_EXCEPTIONS
*(.eh_frame)
#endif // !CONFIG_COMPILER_CXX_EXCEPTIONS
}
}
@@ -233,17 +233,21 @@ SECTIONS
.eh_frame_hdr :
{
#if CONFIG_COMPILER_CXX_EXCEPTIONS || CONFIG_ESP_SYSTEM_USE_EH_FRAME
ALIGNED_SYMBOL(4, __eh_frame_hdr)
KEEP (*(.eh_frame_hdr))
__eh_frame_hdr_end = ABSOLUTE(.);
#endif // CONFIG_COMPILER_CXX_EXCEPTIONS || CONFIG_ESP_SYSTEM_USE_EH_FRAME
. = ALIGN(ALIGNOF(.eh_frame));
} > default_rodata_seg
ASSERT_SECTIONS_GAP(.eh_frame_hdr, .eh_frame)
.eh_frame :
{
#if CONFIG_COMPILER_CXX_EXCEPTIONS || CONFIG_ESP_SYSTEM_USE_EH_FRAME
ALIGNED_SYMBOL(4, __eh_frame)
KEEP (*(.eh_frame))
@@ -254,6 +258,8 @@ SECTIONS
LONG(0);
__eh_frame_end = ABSOLUTE(.);
#endif // CONFIG_COMPILER_CXX_EXCEPTIONS || CONFIG_ESP_SYSTEM_USE_EH_FRAME
. = ALIGN(ALIGNOF(.flash.tdata));
} > default_rodata_seg
ASSERT_SECTIONS_GAP(.eh_frame, .flash.tdata)
@@ -339,13 +345,20 @@ SECTIONS
ALIGNED_SYMBOL(16, _heap_start)
} > dram0_0_seg
/**
* Discarding .rela.* sections results in the following mapping:
* .rela.text.* -> .text.*
* .rela.data.* -> .data.*
* And so forth...
*/
/DISCARD/ : { *(.rela.*) }
/DISCARD/ :
{
/**
* Discarding .rela.* sections results in the following mapping:
* .rela.text.* -> .text.*
* .rela.data.* -> .data.*
* And so forth...
*/
*(.rela.*)
#if !(CONFIG_COMPILER_CXX_EXCEPTIONS || CONFIG_ESP_SYSTEM_USE_EH_FRAME)
*(.eh_frame_hdr)
*(.eh_frame)
#endif // !(CONFIG_COMPILER_CXX_EXCEPTIONS || CONFIG_ESP_SYSTEM_USE_EH_FRAME)
}
}
ASSERT(((_iram_end - ORIGIN(iram0_0_seg)) <= LENGTH(iram0_0_seg)),
@@ -351,17 +351,21 @@ SECTIONS
.eh_frame_hdr :
{
#if CONFIG_COMPILER_CXX_EXCEPTIONS || CONFIG_ESP_SYSTEM_USE_EH_FRAME
ALIGNED_SYMBOL(4, __eh_frame_hdr)
KEEP (*(.eh_frame_hdr))
__eh_frame_hdr_end = ABSOLUTE(.);
#endif // CONFIG_COMPILER_CXX_EXCEPTIONS || CONFIG_ESP_SYSTEM_USE_EH_FRAME
. = ALIGN(ALIGNOF(.eh_frame));
} > default_rodata_seg
ASSERT_SECTIONS_GAP(.eh_frame_hdr, .eh_frame)
.eh_frame :
{
#if CONFIG_COMPILER_CXX_EXCEPTIONS || CONFIG_ESP_SYSTEM_USE_EH_FRAME
ALIGNED_SYMBOL(4, __eh_frame)
KEEP (*(.eh_frame))
@@ -372,6 +376,8 @@ SECTIONS
LONG(0);
__eh_frame_end = ABSOLUTE(.);
#endif // CONFIG_COMPILER_CXX_EXCEPTIONS || CONFIG_ESP_SYSTEM_USE_EH_FRAME
. = ALIGN(ALIGNOF(.flash.tdata));
} > default_rodata_seg
ASSERT_SECTIONS_GAP(.eh_frame, .flash.tdata)
@@ -451,13 +457,20 @@ SECTIONS
ALIGNED_SYMBOL(16, _heap_start)
} > dram0_0_seg
/**
* Discarding .rela.* sections results in the following mapping:
* .rela.text.* -> .text.*
* .rela.data.* -> .data.*
* And so forth...
*/
/DISCARD/ : { *(.rela.*) }
/DISCARD/ :
{
/**
* Discarding .rela.* sections results in the following mapping:
* .rela.text.* -> .text.*
* .rela.data.* -> .data.*
* And so forth...
*/
*(.rela.*)
#if !(CONFIG_COMPILER_CXX_EXCEPTIONS || CONFIG_ESP_SYSTEM_USE_EH_FRAME)
*(.eh_frame_hdr)
*(.eh_frame)
#endif // !(CONFIG_COMPILER_CXX_EXCEPTIONS || CONFIG_ESP_SYSTEM_USE_EH_FRAME)
}
}
ASSERT(((_iram_end - ORIGIN(iram0_0_seg)) <= LENGTH(iram0_0_seg)),
@@ -374,17 +374,21 @@ SECTIONS
.eh_frame_hdr :
{
#if CONFIG_COMPILER_CXX_EXCEPTIONS || CONFIG_ESP_SYSTEM_USE_EH_FRAME
ALIGNED_SYMBOL(4, __eh_frame_hdr)
KEEP (*(.eh_frame_hdr))
__eh_frame_hdr_end = ABSOLUTE(.);
#endif // CONFIG_COMPILER_CXX_EXCEPTIONS || CONFIG_ESP_SYSTEM_USE_EH_FRAME
. = ALIGN(ALIGNOF(.eh_frame));
} > default_rodata_seg
ASSERT_SECTIONS_GAP(.eh_frame_hdr, .eh_frame)
.eh_frame :
{
#if CONFIG_COMPILER_CXX_EXCEPTIONS || CONFIG_ESP_SYSTEM_USE_EH_FRAME
ALIGNED_SYMBOL(4, __eh_frame)
KEEP (*(.eh_frame))
@@ -395,6 +399,8 @@ SECTIONS
LONG(0);
__eh_frame_end = ABSOLUTE(.);
#endif // CONFIG_COMPILER_CXX_EXCEPTIONS || CONFIG_ESP_SYSTEM_USE_EH_FRAME
. = ALIGN(ALIGNOF(.flash.tdata));
} > default_rodata_seg
ASSERT_SECTIONS_GAP(.eh_frame, .flash.tdata)
@@ -442,13 +448,20 @@ SECTIONS
ALIGNED_SYMBOL(16, _heap_start)
} > dram0_0_seg
/**
* Discarding .rela.* sections results in the following mapping:
* .rela.text.* -> .text.*
* .rela.data.* -> .data.*
* And so forth...
*/
/DISCARD/ : { *(.rela.*) }
/DISCARD/ :
{
/**
* Discarding .rela.* sections results in the following mapping:
* .rela.text.* -> .text.*
* .rela.data.* -> .data.*
* And so forth...
*/
*(.rela.*)
#if !(CONFIG_COMPILER_CXX_EXCEPTIONS || CONFIG_ESP_SYSTEM_USE_EH_FRAME)
*(.eh_frame_hdr)
*(.eh_frame)
#endif // !(CONFIG_COMPILER_CXX_EXCEPTIONS || CONFIG_ESP_SYSTEM_USE_EH_FRAME)
}
}
ASSERT(((_iram_end - ORIGIN(iram0_0_seg)) <= LENGTH(iram0_0_seg)),
@@ -374,17 +374,21 @@ SECTIONS
.eh_frame_hdr :
{
#if CONFIG_COMPILER_CXX_EXCEPTIONS || CONFIG_ESP_SYSTEM_USE_EH_FRAME
ALIGNED_SYMBOL(4, __eh_frame_hdr)
KEEP (*(.eh_frame_hdr))
__eh_frame_hdr_end = ABSOLUTE(.);
#endif // CONFIG_COMPILER_CXX_EXCEPTIONS || CONFIG_ESP_SYSTEM_USE_EH_FRAME
. = ALIGN(ALIGNOF(.eh_frame));
} > default_rodata_seg
ASSERT_SECTIONS_GAP(.eh_frame_hdr, .eh_frame)
.eh_frame :
{
#if CONFIG_COMPILER_CXX_EXCEPTIONS || CONFIG_ESP_SYSTEM_USE_EH_FRAME
ALIGNED_SYMBOL(4, __eh_frame)
KEEP (*(.eh_frame))
@@ -395,6 +399,8 @@ SECTIONS
LONG(0);
__eh_frame_end = ABSOLUTE(.);
#endif // CONFIG_COMPILER_CXX_EXCEPTIONS || CONFIG_ESP_SYSTEM_USE_EH_FRAME
. = ALIGN(ALIGNOF(.flash.tdata));
} > default_rodata_seg
ASSERT_SECTIONS_GAP(.eh_frame, .flash.tdata)
@@ -442,13 +448,20 @@ SECTIONS
ALIGNED_SYMBOL(16, _heap_start)
} > sram_seg
/**
* Discarding .rela.* sections results in the following mapping:
* .rela.text.* -> .text.*
* .rela.data.* -> .data.*
* And so forth...
*/
/DISCARD/ : { *(.rela.*) }
/DISCARD/ :
{
/**
* Discarding .rela.* sections results in the following mapping:
* .rela.text.* -> .text.*
* .rela.data.* -> .data.*
* And so forth...
*/
*(.rela.*)
#if !(CONFIG_COMPILER_CXX_EXCEPTIONS || CONFIG_ESP_SYSTEM_USE_EH_FRAME)
*(.eh_frame_hdr)
*(.eh_frame)
#endif // !(CONFIG_COMPILER_CXX_EXCEPTIONS || CONFIG_ESP_SYSTEM_USE_EH_FRAME)
}
}
ASSERT(((_iram_end - ORIGIN(sram_seg)) <= LENGTH(sram_seg)),
@@ -364,17 +364,21 @@ SECTIONS
.eh_frame_hdr :
{
#if CONFIG_COMPILER_CXX_EXCEPTIONS || CONFIG_ESP_SYSTEM_USE_EH_FRAME
ALIGNED_SYMBOL(4, __eh_frame_hdr)
KEEP (*(.eh_frame_hdr))
__eh_frame_hdr_end = ABSOLUTE(.);
#endif // CONFIG_COMPILER_CXX_EXCEPTIONS || CONFIG_ESP_SYSTEM_USE_EH_FRAME
. = ALIGN(ALIGNOF(.eh_frame));
} > default_rodata_seg
ASSERT_SECTIONS_GAP(.eh_frame_hdr, .eh_frame)
.eh_frame :
{
#if CONFIG_COMPILER_CXX_EXCEPTIONS || CONFIG_ESP_SYSTEM_USE_EH_FRAME
ALIGNED_SYMBOL(4, __eh_frame)
KEEP (*(.eh_frame))
@@ -385,6 +389,8 @@ SECTIONS
LONG(0);
__eh_frame_end = ABSOLUTE(.);
#endif // CONFIG_COMPILER_CXX_EXCEPTIONS || CONFIG_ESP_SYSTEM_USE_EH_FRAME
. = ALIGN(ALIGNOF(.flash.tdata));
} > default_rodata_seg
ASSERT_SECTIONS_GAP(.eh_frame, .flash.tdata)
@@ -432,11 +438,18 @@ SECTIONS
ALIGNED_SYMBOL(16, _heap_start)
} > sram_seg
/**
* Discarding .rela.* sections results in the following mapping:
* .rela.text.* -> .text.*
* .rela.data.* -> .data.*
* And so forth...
*/
/DISCARD/ : { *(.rela.*) }
/DISCARD/ :
{
/**
* Discarding .rela.* sections results in the following mapping:
* .rela.text.* -> .text.*
* .rela.data.* -> .data.*
* And so forth...
*/
*(.rela.*)
#if !(CONFIG_COMPILER_CXX_EXCEPTIONS || CONFIG_ESP_SYSTEM_USE_EH_FRAME)
*(.eh_frame_hdr)
*(.eh_frame)
#endif // !(CONFIG_COMPILER_CXX_EXCEPTIONS || CONFIG_ESP_SYSTEM_USE_EH_FRAME)
}
}
@@ -374,17 +374,21 @@ SECTIONS
.eh_frame_hdr :
{
#if CONFIG_COMPILER_CXX_EXCEPTIONS || CONFIG_ESP_SYSTEM_USE_EH_FRAME
ALIGNED_SYMBOL(4, __eh_frame_hdr)
KEEP (*(.eh_frame_hdr))
__eh_frame_hdr_end = ABSOLUTE(.);
#endif // CONFIG_COMPILER_CXX_EXCEPTIONS || CONFIG_ESP_SYSTEM_USE_EH_FRAME
. = ALIGN(ALIGNOF(.eh_frame));
} > default_rodata_seg
ASSERT_SECTIONS_GAP(.eh_frame_hdr, .eh_frame)
.eh_frame :
{
#if CONFIG_COMPILER_CXX_EXCEPTIONS || CONFIG_ESP_SYSTEM_USE_EH_FRAME
ALIGNED_SYMBOL(4, __eh_frame)
KEEP (*(.eh_frame))
@@ -395,6 +399,8 @@ SECTIONS
LONG(0);
__eh_frame_end = ABSOLUTE(.);
#endif // CONFIG_COMPILER_CXX_EXCEPTIONS || CONFIG_ESP_SYSTEM_USE_EH_FRAME
. = ALIGN(ALIGNOF(.flash.tdata));
} > default_rodata_seg
ASSERT_SECTIONS_GAP(.eh_frame, .flash.tdata)
@@ -442,13 +448,20 @@ SECTIONS
ALIGNED_SYMBOL(16, _heap_start)
} > sram_seg
/**
* Discarding .rela.* sections results in the following mapping:
* .rela.text.* -> .text.*
* .rela.data.* -> .data.*
* And so forth...
*/
/DISCARD/ : { *(.rela.*) }
/DISCARD/ :
{
/**
* Discarding .rela.* sections results in the following mapping:
* .rela.text.* -> .text.*
* .rela.data.* -> .data.*
* And so forth...
*/
*(.rela.*)
#if !(CONFIG_COMPILER_CXX_EXCEPTIONS || CONFIG_ESP_SYSTEM_USE_EH_FRAME)
*(.eh_frame_hdr)
*(.eh_frame)
#endif // !(CONFIG_COMPILER_CXX_EXCEPTIONS || CONFIG_ESP_SYSTEM_USE_EH_FRAME)
}
}
ASSERT(((_iram_end - ORIGIN(sram_seg)) <= LENGTH(sram_seg)),
@@ -364,17 +364,21 @@ SECTIONS
.eh_frame_hdr :
{
#if CONFIG_COMPILER_CXX_EXCEPTIONS || CONFIG_ESP_SYSTEM_USE_EH_FRAME
ALIGNED_SYMBOL(4, __eh_frame_hdr)
KEEP (*(.eh_frame_hdr))
__eh_frame_hdr_end = ABSOLUTE(.);
#endif // CONFIG_COMPILER_CXX_EXCEPTIONS || CONFIG_ESP_SYSTEM_USE_EH_FRAME
. = ALIGN(ALIGNOF(.eh_frame));
} > default_rodata_seg
ASSERT_SECTIONS_GAP(.eh_frame_hdr, .eh_frame)
.eh_frame :
{
#if CONFIG_COMPILER_CXX_EXCEPTIONS || CONFIG_ESP_SYSTEM_USE_EH_FRAME
ALIGNED_SYMBOL(4, __eh_frame)
KEEP (*(.eh_frame))
@@ -385,6 +389,8 @@ SECTIONS
LONG(0);
__eh_frame_end = ABSOLUTE(.);
#endif // CONFIG_COMPILER_CXX_EXCEPTIONS || CONFIG_ESP_SYSTEM_USE_EH_FRAME
. = ALIGN(ALIGNOF(.flash.tdata));
} > default_rodata_seg
ASSERT_SECTIONS_GAP(.eh_frame, .flash.tdata)
@@ -432,11 +438,18 @@ SECTIONS
ALIGNED_SYMBOL(16, _heap_start)
} > sram_seg
/**
* Discarding .rela.* sections results in the following mapping:
* .rela.text.* -> .text.*
* .rela.data.* -> .data.*
* And so forth...
*/
/DISCARD/ : { *(.rela.*) }
/DISCARD/ :
{
/**
* Discarding .rela.* sections results in the following mapping:
* .rela.text.* -> .text.*
* .rela.data.* -> .data.*
* And so forth...
*/
*(.rela.*)
#if !(CONFIG_COMPILER_CXX_EXCEPTIONS || CONFIG_ESP_SYSTEM_USE_EH_FRAME)
*(.eh_frame_hdr)
*(.eh_frame)
#endif // !(CONFIG_COMPILER_CXX_EXCEPTIONS || CONFIG_ESP_SYSTEM_USE_EH_FRAME)
}
}
@@ -406,17 +406,21 @@ SECTIONS
.eh_frame_hdr :
{
#if CONFIG_COMPILER_CXX_EXCEPTIONS || CONFIG_ESP_SYSTEM_USE_EH_FRAME
ALIGNED_SYMBOL(4, __eh_frame_hdr)
KEEP (*(.eh_frame_hdr))
__eh_frame_hdr_end = ABSOLUTE(.);
#endif // CONFIG_COMPILER_CXX_EXCEPTIONS || CONFIG_ESP_SYSTEM_USE_EH_FRAME
. = ALIGN(ALIGNOF(.eh_frame));
} > rodata_seg_low
ASSERT_SECTIONS_GAP(.eh_frame_hdr, .eh_frame)
.eh_frame :
{
#if CONFIG_COMPILER_CXX_EXCEPTIONS || CONFIG_ESP_SYSTEM_USE_EH_FRAME
ALIGNED_SYMBOL(4, __eh_frame)
KEEP (*(.eh_frame))
@@ -427,6 +431,8 @@ SECTIONS
LONG(0);
__eh_frame_end = ABSOLUTE(.);
#endif // CONFIG_COMPILER_CXX_EXCEPTIONS || CONFIG_ESP_SYSTEM_USE_EH_FRAME
. = ALIGN(ALIGNOF(.flash.tdata));
} > rodata_seg_low
ASSERT_SECTIONS_GAP(.eh_frame, .flash.tdata)
@@ -508,11 +514,18 @@ SECTIONS
ALIGNED_SYMBOL(16, _heap_start_high)
} > sram_high
/**
* Discarding .rela.* sections results in the following mapping:
* .rela.text.* -> .text.*
* .rela.data.* -> .data.*
* And so forth...
*/
/DISCARD/ : { *(.rela.*) }
/DISCARD/ :
{
/**
* Discarding .rela.* sections results in the following mapping:
* .rela.text.* -> .text.*
* .rela.data.* -> .data.*
* And so forth...
*/
*(.rela.*)
#if !(CONFIG_COMPILER_CXX_EXCEPTIONS || CONFIG_ESP_SYSTEM_USE_EH_FRAME)
*(.eh_frame_hdr)
*(.eh_frame)
#endif // !(CONFIG_COMPILER_CXX_EXCEPTIONS || CONFIG_ESP_SYSTEM_USE_EH_FRAME)
}
}
@@ -335,6 +335,7 @@ SECTIONS
__XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
*(.xt_except_desc_end)
#if CONFIG_COMPILER_CXX_EXCEPTIONS
ALIGNED_SYMBOL(4, __eh_frame)
KEEP(*(.eh_frame))
/**
@@ -342,6 +343,7 @@ SECTIONS
* (see __FRAME_END__ in libgcc sources), it is manually provided here.
*/
LONG(0);
#endif // CONFIG_COMPILER_CXX_EXCEPTIONS
/**
* C++ constructor tables.
@@ -464,12 +466,20 @@ SECTIONS
*/
.xt.prop 0 :
{
KEEP (*(.xt.prop .gnu.linkonce.prop.*))
KEEP (*(.xt.prop .xt.prop.* .gnu.linkonce.prop.*))
}
.xt.lit 0 :
{
KEEP (*(.xt.lit .gnu.linkonce.p.*))
KEEP (*(.xt.lit .xt.lit.* .gnu.linkonce.p.*))
}
/DISCARD/ :
{
*(.eh_frame_hdr)
#if !CONFIG_COMPILER_CXX_EXCEPTIONS
*(.eh_frame)
#endif // !CONFIG_COMPILER_CXX_EXCEPTIONS
}
}
@@ -362,6 +362,7 @@ SECTIONS
__XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
*(.xt_except_desc_end)
#if CONFIG_COMPILER_CXX_EXCEPTIONS
ALIGNED_SYMBOL(4, __eh_frame)
KEEP(*(.eh_frame))
/**
@@ -369,6 +370,7 @@ SECTIONS
* (see __FRAME_END__ in libgcc sources), it is manually provided here.
*/
LONG(0);
#endif // CONFIG_COMPILER_CXX_EXCEPTIONS
/**
* C++ constructor tables.
@@ -497,12 +499,20 @@ SECTIONS
*/
.xt.prop 0 :
{
KEEP (*(.xt.prop .gnu.linkonce.prop.*))
KEEP (*(.xt.prop .xt.prop.* .gnu.linkonce.prop.*))
}
.xt.lit 0 :
{
KEEP (*(.xt.lit .gnu.linkonce.p.*))
KEEP (*(.xt.lit .xt.lit.* .gnu.linkonce.p.*))
}
/DISCARD/ :
{
*(.eh_frame_hdr)
#if !CONFIG_COMPILER_CXX_EXCEPTIONS
*(.eh_frame)
#endif // !CONFIG_COMPILER_CXX_EXCEPTIONS
}
}
@@ -5,8 +5,9 @@
*/
#include "stdint.h"
#include "esp_attr.h"
void esp_ipc_isr_waiting_for_finish_cmd(void* ipc_isr_finish_cmd)
void IRAM_ATTR esp_ipc_isr_waiting_for_finish_cmd(void* ipc_isr_finish_cmd)
{
while (*(volatile uint32_t *)ipc_isr_finish_cmd == 0) { };
}
+1 -1
View File
@@ -28,7 +28,7 @@
#define BROWNOUT_DET_LVL 0
#endif
static __attribute__((unused)) DRAM_ATTR const char *TAG = "BOD";
static __attribute__((unused)) DRAM_ATTR const char TAG[] = "BOD";
#if CONFIG_ESP_SYSTEM_BROWNOUT_INTR
IRAM_ATTR static void rtc_brownout_isr_handler(void *arg)
@@ -20,7 +20,6 @@ JTAG_SERIAL_MARKS = [
pytest.mark.esp32c3,
pytest.mark.esp32c6,
pytest.mark.esp32h2,
pytest.mark.esp32p4,
]
@@ -180,6 +180,10 @@ esp_err_t esp_timer_impl_early_init(void)
systimer_hal_select_alarm_mode(&systimer_hal, SYSTIMER_ALARM_ESPTIMER, SYSTIMER_ALARM_MODE_ONESHOT);
systimer_hal_connect_alarm_counter(&systimer_hal, SYSTIMER_ALARM_ESPTIMER, SYSTIMER_COUNTER_ESPTIMER);
for (unsigned cpuid = 0; cpuid < SOC_CPU_CORES_NUM; ++cpuid) {
systimer_hal_counter_can_stall_by_cpu(&systimer_hal, SYSTIMER_COUNTER_ESPTIMER, cpuid, (cpuid < portNUM_PROCESSORS) ? true : false);
}
return ESP_OK;
}
+17 -4
View File
@@ -348,17 +348,30 @@ menu "Wi-Fi"
int "Minimum active time"
range 8 60
default 50
depends on ESP_WIFI_SLP_IRAM_OPT
help
The minimum timeout for waiting to receive data, unit: milliseconds.
Only for station in WIFI_PS_MIN_MODEM or WIFI_PS_MAX_MODEM. When the station enters the active state,
it will work for at least ESP_WIFI_SLP_DEFAULT_MIN_ACTIVE_TIME. If a data packet is received or sent
during this period, the time will be refreshed. If the time is up, but the station still has packets
to receive or send, the time will also be refreshed. unit: milliseconds.
config ESP_WIFI_SLP_DEFAULT_MAX_ACTIVE_TIME
int "Maximum keep alive time"
range 10 60
default 10
depends on ESP_WIFI_SLP_IRAM_OPT
help
The maximum time that wifi keep alive, unit: seconds.
Only for station in WIFI_PS_MIN_MODEM or WIFI_PS_MAX_MODEM. If no packet has been
sent within ESP_WIFI_SLP_DEFAULT_MAX_ACTIVE_TIME, a null data packet will be sent
to maintain the connection with the AP. unit: seconds.
config ESP_WIFI_SLP_DEFAULT_WAIT_BROADCAST_DATA_TIME
int "Minimum wait broadcast data time"
range 10 30
default 15
help
Only for station in WIFI_PS_MIN_MODEM or WIFI_PS_MAX_MODEM. When the station knows through the beacon
that AP will send broadcast packet, it will wait for ESP_WIFI_SLP_DEFAULT_WAIT_BROADCAST_DATA_TIME
before entering the sleep process. If a broadcast packet is received with more data bits, the time
will refreshed. unit: milliseconds.
config ESP_WIFI_FTM_ENABLE
bool "WiFi FTM"
+20
View File
@@ -578,6 +578,24 @@ static int coex_schm_register_cb_wrapper(int type, int(*cb)(int))
#endif
}
static int coex_schm_flexible_period_set_wrapper(uint8_t period)
{
#if CONFIG_ESP_COEX_POWER_MANAGEMENT
return coex_schm_flexible_period_set(period);
#else
return 0;
#endif
}
static uint8_t coex_schm_flexible_period_get_wrapper(void)
{
#if CONFIG_ESP_COEX_POWER_MANAGEMENT
return coex_schm_flexible_period_get();
#else
return 1;
#endif
}
static void IRAM_ATTR esp_empty_wrapper(void)
{
@@ -712,5 +730,7 @@ wifi_osi_funcs_t g_wifi_osi_funcs = {
._coex_register_start_cb = coex_register_start_cb_wrapper,
._coex_schm_process_restart = coex_schm_process_restart_wrapper,
._coex_schm_register_cb = coex_schm_register_cb_wrapper,
._coex_schm_flexible_period_set = coex_schm_flexible_period_set_wrapper,
._coex_schm_flexible_period_get = coex_schm_flexible_period_get_wrapper,
._magic = ESP_WIFI_OS_ADAPTER_MAGIC,
};
+20
View File
@@ -517,6 +517,24 @@ static int coex_schm_register_cb_wrapper(int type, int(*cb)(int))
#endif
}
static int coex_schm_flexible_period_set_wrapper(uint8_t period)
{
#if CONFIG_ESP_COEX_POWER_MANAGEMENT
return coex_schm_flexible_period_set(period);
#else
return 0;
#endif
}
static uint8_t coex_schm_flexible_period_get_wrapper(void)
{
#if CONFIG_ESP_COEX_POWER_MANAGEMENT
return coex_schm_flexible_period_get();
#else
return 1;
#endif
}
static void IRAM_ATTR esp_empty_wrapper(void)
{
@@ -650,5 +668,7 @@ wifi_osi_funcs_t g_wifi_osi_funcs = {
._coex_register_start_cb = coex_register_start_cb_wrapper,
._coex_schm_process_restart = coex_schm_process_restart_wrapper,
._coex_schm_register_cb = coex_schm_register_cb_wrapper,
._coex_schm_flexible_period_set = coex_schm_flexible_period_set_wrapper,
._coex_schm_flexible_period_get = coex_schm_flexible_period_get_wrapper,
._magic = ESP_WIFI_OS_ADAPTER_MAGIC,
};
+20
View File
@@ -534,6 +534,24 @@ static int coex_schm_register_cb_wrapper(int type, int(*cb)(int))
#endif
}
static int coex_schm_flexible_period_set_wrapper(uint8_t period)
{
#if CONFIG_ESP_COEX_POWER_MANAGEMENT
return coex_schm_flexible_period_set(period);
#else
return 0;
#endif
}
static uint8_t coex_schm_flexible_period_get_wrapper(void)
{
#if CONFIG_ESP_COEX_POWER_MANAGEMENT
return coex_schm_flexible_period_get();
#else
return 1;
#endif
}
static void IRAM_ATTR esp_empty_wrapper(void)
{
@@ -667,5 +685,7 @@ wifi_osi_funcs_t g_wifi_osi_funcs = {
._coex_register_start_cb = coex_register_start_cb_wrapper,
._coex_schm_process_restart = coex_schm_process_restart_wrapper,
._coex_schm_register_cb = coex_schm_register_cb_wrapper,
._coex_schm_flexible_period_set = coex_schm_flexible_period_set_wrapper,
._coex_schm_flexible_period_get = coex_schm_flexible_period_get_wrapper,
._magic = ESP_WIFI_OS_ADAPTER_MAGIC,
};
+25 -5
View File
@@ -61,17 +61,17 @@ extern void wifi_apb80m_request(void);
extern void wifi_apb80m_release(void);
#endif
IRAM_ATTR void *wifi_malloc( size_t size )
IRAM_ATTR void *wifi_malloc(size_t size)
{
return malloc(size);
}
IRAM_ATTR void *wifi_realloc( void *ptr, size_t size )
IRAM_ATTR void *wifi_realloc(void *ptr, size_t size)
{
return realloc(ptr, size);
}
IRAM_ATTR void *wifi_calloc( size_t n, size_t size )
IRAM_ATTR void *wifi_calloc(size_t n, size_t size)
{
return calloc(n, size);
}
@@ -82,7 +82,7 @@ static void *IRAM_ATTR wifi_zalloc_wrapper(size_t size)
return ptr;
}
wifi_static_queue_t *wifi_create_queue( int queue_len, int item_size)
wifi_static_queue_t *wifi_create_queue(int queue_len, int item_size)
{
wifi_static_queue_t *queue = NULL;
@@ -91,7 +91,7 @@ wifi_static_queue_t *wifi_create_queue( int queue_len, int item_size)
return NULL;
}
queue->handle = xQueueCreate( queue_len, item_size);
queue->handle = xQueueCreate(queue_len, item_size);
return queue;
}
@@ -522,6 +522,24 @@ static int coex_schm_register_cb_wrapper(int type, int(*cb)(int))
#endif
}
static int coex_schm_flexible_period_set_wrapper(uint8_t period)
{
#if CONFIG_ESP_COEX_POWER_MANAGEMENT
return coex_schm_flexible_period_set(period);
#else
return 0;
#endif
}
static uint8_t coex_schm_flexible_period_get_wrapper(void)
{
#if CONFIG_ESP_COEX_POWER_MANAGEMENT
return coex_schm_flexible_period_get();
#else
return 1;
#endif
}
static void IRAM_ATTR esp_empty_wrapper(void)
{
@@ -664,5 +682,7 @@ wifi_osi_funcs_t g_wifi_osi_funcs = {
#endif
._coex_schm_process_restart = coex_schm_process_restart_wrapper,
._coex_schm_register_cb = coex_schm_register_cb_wrapper,
._coex_schm_flexible_period_set = coex_schm_flexible_period_set_wrapper,
._coex_schm_flexible_period_get = coex_schm_flexible_period_get_wrapper,
._magic = ESP_WIFI_OS_ADAPTER_MAGIC,
};
+20
View File
@@ -523,6 +523,24 @@ static int coex_schm_register_cb_wrapper(int type, int(*cb)(int))
#endif
}
static int coex_schm_flexible_period_set_wrapper(uint8_t period)
{
#if CONFIG_ESP_COEX_POWER_MANAGEMENT
return coex_schm_flexible_period_set(period);
#else
return 0;
#endif
}
static uint8_t coex_schm_flexible_period_get_wrapper(void)
{
#if CONFIG_ESP_COEX_POWER_MANAGEMENT
return coex_schm_flexible_period_get();
#else
return 1;
#endif
}
static void IRAM_ATTR esp_empty_wrapper(void)
{
@@ -672,5 +690,7 @@ wifi_osi_funcs_t g_wifi_osi_funcs = {
#endif
._coex_schm_process_restart = coex_schm_process_restart_wrapper,
._coex_schm_register_cb = coex_schm_register_cb_wrapper,
._coex_schm_flexible_period_set = coex_schm_flexible_period_set_wrapper,
._coex_schm_flexible_period_get = coex_schm_flexible_period_get_wrapper,
._magic = ESP_WIFI_OS_ADAPTER_MAGIC,
};
+12
View File
@@ -496,6 +496,16 @@ static int coex_schm_register_cb_wrapper(int type, int(*cb)(int))
return 0;
}
static int coex_schm_flexible_period_set_wrapper(uint8_t period)
{
return 0;
}
static uint8_t coex_schm_flexible_period_get_wrapper(void)
{
return 1;
}
static void IRAM_ATTR esp_empty_wrapper(void)
{
@@ -750,5 +760,7 @@ wifi_osi_funcs_t g_wifi_osi_funcs = {
._coex_register_start_cb = coex_register_start_cb_wrapper,
._coex_schm_process_restart = coex_schm_process_restart_wrapper,
._coex_schm_register_cb = coex_schm_register_cb_wrapper,
._coex_schm_flexible_period_set = coex_schm_flexible_period_set_wrapper,
._coex_schm_flexible_period_get = coex_schm_flexible_period_get_wrapper,
._magic = ESP_WIFI_OS_ADAPTER_MAGIC,
};
+20 -1
View File
@@ -573,6 +573,24 @@ static int coex_schm_register_cb_wrapper(int type, int(*cb)(int))
#endif
}
static int coex_schm_flexible_period_set_wrapper(uint8_t period)
{
#if CONFIG_ESP_COEX_POWER_MANAGEMENT
return coex_schm_flexible_period_set(period);
#else
return 0;
#endif
}
static uint8_t coex_schm_flexible_period_get_wrapper(void)
{
#if CONFIG_ESP_COEX_POWER_MANAGEMENT
return coex_schm_flexible_period_get();
#else
return 1;
#endif
}
static void IRAM_ATTR esp_empty_wrapper(void)
{
@@ -706,6 +724,7 @@ wifi_osi_funcs_t g_wifi_osi_funcs = {
._coex_register_start_cb = coex_register_start_cb_wrapper,
._coex_schm_process_restart = coex_schm_process_restart_wrapper,
._coex_schm_register_cb = coex_schm_register_cb_wrapper,
._coex_schm_flexible_period_set = coex_schm_flexible_period_set_wrapper,
._coex_schm_flexible_period_get = coex_schm_flexible_period_get_wrapper,
._magic = ESP_WIFI_OS_ADAPTER_MAGIC,
};
+20
View File
@@ -590,6 +590,24 @@ static int coex_schm_register_cb_wrapper(int type, int(*cb)(int))
#endif
}
static int coex_schm_flexible_period_set_wrapper(uint8_t period)
{
#if CONFIG_ESP_COEX_POWER_MANAGEMENT
return coex_schm_flexible_period_set(period);
#else
return 0;
#endif
}
static uint8_t coex_schm_flexible_period_get_wrapper(void)
{
#if CONFIG_ESP_COEX_POWER_MANAGEMENT
return coex_schm_flexible_period_get();
#else
return 1;
#endif
}
static void IRAM_ATTR esp_empty_wrapper(void)
{
@@ -723,5 +741,7 @@ wifi_osi_funcs_t g_wifi_osi_funcs = {
._coex_register_start_cb = coex_register_start_cb_wrapper,
._coex_schm_process_restart = coex_schm_process_restart_wrapper,
._coex_schm_register_cb = coex_schm_register_cb_wrapper,
._coex_schm_flexible_period_set = coex_schm_flexible_period_set_wrapper,
._coex_schm_flexible_period_get = coex_schm_flexible_period_get_wrapper,
._magic = ESP_WIFI_OS_ADAPTER_MAGIC,
};
+10 -6
View File
@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2017-2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2017-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -141,7 +141,7 @@ extern "C" {
#define MESH_ASSOC_FLAG_STA_VOTED (0x04) /**< station vote done, set when connect to router */
#define MESH_ASSOC_FLAG_NETWORK_FREE (0x08) /**< no root in current network */
#define MESH_ASSOC_FLAG_STA_VOTE_EXPIRE (0x10) /**< the voted address is expired, means the voted device lose the chance to be root */
#define MESH_ASSOC_FLAG_ROOTS_FOUND (0x20) /**< roots conflict is found, means that thre are at least two roots in the mesh network */
#define MESH_ASSOC_FLAG_ROOTS_FOUND (0x20) /**< roots conflict is found, means that there are at least two roots in the mesh network */
#define MESH_ASSOC_FLAG_ROOT_FIXED (0x40) /**< the root is fixed in the mesh network */
/**
@@ -216,7 +216,7 @@ typedef enum {
MESH_ROOT, /**< the only sink of the mesh network. Has the ability to access external IP network */
MESH_NODE, /**< intermediate device. Has the ability to forward packets over the mesh network */
MESH_LEAF, /**< has no forwarding ability */
MESH_STA, /**< connect to router with a standlone Wi-Fi station mode, no network expansion capability */
MESH_STA, /**< connect to router with a standalone Wi-Fi station mode, no network expansion capability */
} mesh_type_t;
/**
@@ -642,14 +642,16 @@ esp_err_t esp_mesh_stop(void);
* - Field size should not exceed MESH_MPS. Note that the size of one mesh packet should not exceed MESH_MTU.
* - Field proto should be set to data protocol in use (default is MESH_PROTO_BIN for binary).
* - Field tos should be set to transmission tos (type of service) in use (default is MESH_TOS_P2P for point-to-point reliable).
* - If the packet is to the root, MESH_TOS_P2P must be set to ensure reliable transmission.
* - As long as the MESH_TOS_P2P is set, the API is blocking, even if the flag is set with MESH_DATA_NONBLOCK.
* - As long as the MESH_TOS_DEF is set, the API is non-blocking.
* @param[in] flag bitmap for data sent
* - Flag is at least one of the three MESH_DATA_P2P/MESH_DATA_FROMDS/MESH_DATA_TODS, which represents the direction of packet sending.
* - Speed up the route search
* - If the packet is to the root and "to" parameter is NULL, set this parameter to 0.
* - If the packet is to an internal device, MESH_DATA_P2P should be set.
* - If the packet is to the root ("to" parameter isn't NULL) or to external IP network, MESH_DATA_TODS should be set.
* - If the packet is from the root to an internal device, MESH_DATA_FROMDS should be set.
* - Specify whether this API is block or non-block, block by default
* - If needs non-blocking, MESH_DATA_NONBLOCK should be set. Otherwise, may use esp_mesh_send_block_time() to specify a blocking time.
* - Specify whether this API is blocking or non-blocking, blocking by default.
* - In the situation of the root change, MESH_DATA_DROP identifies this packet can be dropped by the new root
* for upstream data to external IP network, we try our best to avoid data loss caused by the root change, but
* there is a risk that the new root is running out of memory because most of memory is occupied by the pending data which
@@ -684,6 +686,7 @@ esp_err_t esp_mesh_send(const mesh_addr_t *to, const mesh_data_t *data,
int flag, const mesh_opt_t opt[], int opt_count);
/**
* @brief Set blocking time of esp_mesh_send()
* - Suggest to set the blocking time to at least 5s when the environment is poor. Otherwise, esp_mesh_send() may timeout frequently.
*
* @attention This API shall be called before mesh is started.
*
@@ -1202,6 +1205,7 @@ int esp_mesh_get_xon_qsize(void);
/**
* @brief Set whether allow more than one root existing in one network
* - The default value is true, that is, multiple roots are allowed.
*
* @param[in] allowed allow or not
*
+14 -3
View File
@@ -614,13 +614,13 @@ esp_err_t esp_wifi_internal_set_spp_amsdu(wifi_interface_t ifidx, bool spp_cap,
void esp_wifi_internal_update_light_sleep_default_params(int min_freq_mhz, int max_freq_mhz);
/**
* @brief Set the delay time for wifi to enter the sleep state when light sleep
* @brief Set the min active time for wifi to enter the sleep state when light sleep
*
* @param return_to_sleep_delay: minimum timeout time for waiting to receive
* @param min_active_time: minimum timeout time for waiting to receive
* data, when no data is received during the timeout period,
* the wifi enters the sleep process.
*/
void esp_wifi_set_sleep_delay_time(uint32_t return_to_sleep_delay);
void esp_wifi_set_sleep_min_active_time(uint32_t min_active_time);
/**
* @brief Set wifi keep alive time
@@ -629,6 +629,17 @@ void esp_wifi_set_sleep_delay_time(uint32_t return_to_sleep_delay);
*/
void esp_wifi_set_keep_alive_time(uint32_t keep_alive_time);
/**
* @brief Set the min broadcast data wait time for wifi to enter the sleep state
*
* @attention Default sleep wait broadcast data time is 15000, Uint µs.
*
* @param time: When the station knows through the beacon that the AP
* will send broadcast packet, it will wait for a minimum of
* wait_broadcast_data_time before entering the sleep process.
*/
void esp_wifi_set_sleep_wait_broadcast_data_time(uint32_t time);
/**
* @brief Configure wifi beacon montior default parameters
*
@@ -153,6 +153,8 @@ typedef struct wifi_osi_funcs_t {
void (* _regdma_link_set_write_wait_content)(void *, uint32_t, uint32_t);
void * (* _sleep_retention_find_link_by_id)(int);
#endif
int (*_coex_schm_flexible_period_set)(uint8_t);
uint8_t (*_coex_schm_flexible_period_get)(void);
int32_t _magic;
} wifi_osi_funcs_t;
+17 -2
View File
@@ -365,7 +365,7 @@ esp_err_t esp_wifi_get_mode(wifi_mode_t *mode);
* @return
* - ESP_OK: succeed
* - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init
* - ESP_ERR_INVALID_ARG: invalid argument
* - ESP_ERR_INVALID_ARG: It doesn't normally happen, the function called inside the API was passed invalid argument, user should check if the wifi related config is correct
* - ESP_ERR_NO_MEM: out of memory
* - ESP_ERR_WIFI_CONN: WiFi internal error, station or soft-AP control block wrong
* - ESP_FAIL: other WiFi internal errors
@@ -598,7 +598,7 @@ esp_err_t esp_wifi_scan_get_ap_record(wifi_ap_record_t *ap_record);
* - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init
* - ESP_ERR_WIFI_NOT_STARTED: WiFi is not started by esp_wifi_start
* - ESP_ERR_WIFI_MODE: WiFi mode is wrong
* - ESP_ERR_INVALID_ARG: invalid argument
* - ESP_ERR_INVALID_ARG: It doesn't normally happen, the function called inside the API was passed invalid argument, user should check if the wifi related config is correct
*/
esp_err_t esp_wifi_clear_ap_list(void);
@@ -1596,6 +1596,21 @@ esp_err_t esp_wifi_set_band(wifi_band_t band);
esp_err_t esp_wifi_get_band(wifi_band_t* band);
#endif /* SOC_WIFI_HE_SUPPORT_5G */
#if CONFIG_ESP_COEX_POWER_MANAGEMENT
/**
* @brief Enable Wi-Fi coexistence power management
*
* @attention This API should be called after esp_wifi_init().
*
* @param enabled Wi-Fi coexistence power management is enabled or not.
*
* @return
* - ESP_OK: succeed
* - others: failed
*/
esp_err_t esp_wifi_coex_pwr_configure(bool enabled);
#endif
#ifdef __cplusplus
}
#endif
@@ -302,9 +302,18 @@ typedef struct {
uint64_t target_wake_time; /**< TWT SP start time */
} wifi_event_sta_itwt_setup_t;
/**
* @brief iTWT teardown status
*/
typedef enum {
ITWT_TEARDOWN_FAIL, /**< station sends teardown frame fail */
ITWT_TEARDOWN_SUCCESS, /**< 1) station successfully sends teardown frame to AP; 2) station receives teardown frame from AP */
} wifi_itwt_teardown_status_t;
/** Argument structure for WIFI_EVENT_TWT_TEARDOWN event */
typedef struct {
uint8_t flow_id; /**< flow id */
wifi_itwt_teardown_status_t status; /**< itwt teardown status */
} wifi_event_sta_itwt_teardown_t;
/**
@@ -70,6 +70,8 @@ typedef enum {
WIFI_AUTH_WAPI_PSK, /**< authenticate mode : WAPI_PSK */
WIFI_AUTH_OWE, /**< authenticate mode : OWE */
WIFI_AUTH_WPA3_ENT_192, /**< authenticate mode : WPA3_ENT_SUITE_B_192_BIT */
WIFI_AUTH_WPA3_EXT_PSK, /**< this authentication mode will yield same result as WIFI_AUTH_WPA3_PSK and not recommended to be used. It will be deprecated in future, please use WIFI_AUTH_WPA3_PSK instead. */
WIFI_AUTH_WPA3_EXT_PSK_MIXED_MODE, /**< this authentication mode will yield same result as WIFI_AUTH_WPA3_PSK and not recommended to be used. It will be deprecated in future, please use WIFI_AUTH_WPA3_PSK instead.*/
WIFI_AUTH_DPP, /**< authenticate mode : DPP */
WIFI_AUTH_MAX
} wifi_auth_mode_t;
@@ -338,6 +340,8 @@ typedef struct {
uint8_t ssid_hidden; /**< Broadcast SSID or not, default 0, broadcast the SSID */
uint8_t max_connection; /**< Max number of stations allowed to connect in */
uint16_t beacon_interval; /**< Beacon interval which should be multiples of 100. Unit: TU(time unit, 1 TU = 1024 us). Range: 100 ~ 60000. Default value: 100 */
uint8_t csa_count; /**< Channel Switch Announcement Count. Notify the station that the channel will switch after the csa_count beacon intervals. Default value: 3 */
uint8_t dtim_period; /**< Dtim period of soft-AP. Default value: 2 */
wifi_cipher_type_t pairwise_cipher; /**< Pairwise cipher of SoftAP, group cipher will be derived using this. Cipher values are valid starting from WIFI_CIPHER_TYPE_TKIP, enum values before that will be considered as invalid and default cipher suites(TKIP+CCMP) will be used. Valid cipher suites in softAP mode are WIFI_CIPHER_TYPE_TKIP, WIFI_CIPHER_TYPE_CCMP and WIFI_CIPHER_TYPE_TKIP_CCMP. */
bool ftm_responder; /**< Enable FTM Responder mode */
wifi_pmf_config_t pmf_cfg; /**< Configuration for Protected Management Frame */
@@ -903,7 +907,7 @@ typedef struct {
uint8_t mac[6]; /**< MAC address of the station disconnects to soft-AP */
uint8_t aid; /**< the aid that soft-AP gave to the station disconnects to */
bool is_mesh_child; /**< flag to identify mesh child */
uint8_t reason; /**< reason of disconnection */
uint16_t reason; /**< reason of disconnection */
} wifi_event_ap_stadisconnected_t;
/** Argument structure for WIFI_EVENT_AP_PROBEREQRECVED event */
+7 -3
View File
@@ -328,12 +328,16 @@ esp_err_t esp_wifi_init(const wifi_init_config_t *config)
esp_pm_register_light_sleep_default_params_config_callback(esp_wifi_internal_update_light_sleep_default_params);
uint32_t sleep_delay_us = CONFIG_ESP_WIFI_SLP_DEFAULT_MIN_ACTIVE_TIME * 1000;
esp_wifi_set_sleep_delay_time(sleep_delay_us);
#endif
uint32_t min_active_time_us = CONFIG_ESP_WIFI_SLP_DEFAULT_MIN_ACTIVE_TIME * 1000;
esp_wifi_set_sleep_min_active_time(min_active_time_us);
uint32_t keep_alive_time_us = CONFIG_ESP_WIFI_SLP_DEFAULT_MAX_ACTIVE_TIME * 1000 * 1000;
esp_wifi_set_keep_alive_time(keep_alive_time_us);
#endif
uint32_t wait_broadcast_data_time_us = CONFIG_ESP_WIFI_SLP_DEFAULT_WAIT_BROADCAST_DATA_TIME * 1000;
esp_wifi_set_sleep_wait_broadcast_data_time(wait_broadcast_data_time_us);
#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
#if SOC_PM_MODEM_RETENTION_BY_REGDMA
@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -28,12 +28,13 @@
#define NDP_REJECTED BIT5
/* Macros */
#define MACADDR_LEN 6
#define MACADDR_LEN 6
#define MACADDR_EQUAL(a1, a2) (memcmp(a1, a2, MACADDR_LEN))
#define MACADDR_COPY(dst, src) (memcpy(dst, src, MACADDR_LEN))
#define NAN_DW_INTVL_MS 524 /* NAN DW interval (512 TU's ~= 524 mSec) */
#define NAN_NDP_RESP_TIMEOUT_DW 4
#define NAN_DW_INTVL_MS 524 /* NAN DW interval (512 TU's ~= 524 mSec) */
#define NAN_NDP_RESP_TIMEOUT_DW 8
#define NAN_NDP_RESP_TIMEOUT NAN_NDP_RESP_TIMEOUT_DW*NAN_DW_INTVL_MS
#define NAN_NDP_TERM_TIMEOUT 2*NAN_DW_INTVL_MS /* NDP Termination Timeout - 2 DW*/
/* Global Variables */
static const char *TAG = "nan_app";
@@ -800,7 +801,7 @@ esp_err_t esp_wifi_nan_stop(void)
NAN_DATA_UNLOCK();
os_event_group_clear_bits(nan_event_group, NDP_TERMINATED);
os_event_group_wait_bits(nan_event_group, NDP_TERMINATED, pdFALSE, pdFALSE, portMAX_DELAY);
os_event_group_wait_bits(nan_event_group, NDP_TERMINATED, pdFALSE, pdFALSE, pdMS_TO_TICKS(NAN_NDP_TERM_TIMEOUT));
os_event_group_clear_bits(nan_event_group, NDP_TERMINATED);
/* Wait for 1 NAN DW interval (512 TU's ~= 524 mSec) for successful termination */
g_wifi_osi_funcs._task_delay(NAN_DW_INTVL_MS/portTICK_PERIOD_MS);

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