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1 Commits

Author SHA1 Message Date
Ivan Grokhotkov
0436d49815 change(version): Update version to v5.4-dev 2024-04-22 22:43:44 +02:00
3573 changed files with 326100 additions and 185159 deletions

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@@ -1,4 +1,4 @@
[codespell]
skip = build,*.yuv,components/fatfs/src/*,alice.txt,*.rgb,components/wpa_supplicant/*,components/esp_wifi/*
ignore-words-list = ser,dout,rsource,fram,inout,shs,ans,aci,unstall,unstalling,hart,wheight,ot,wel,parms,ehen
ignore-words-list = ser,dout,rsource,fram,inout,shs,ans,aci,unstall,unstalling,hart
write-changes = true

View File

@@ -60,9 +60,7 @@ jobs:
username: ${{ secrets.DOCKERHUB_USERNAME }}
password: ${{ secrets.DOCKERHUB_TOKEN }}
- name: Set up QEMU for multiarch builds
uses: docker/setup-qemu-action@v3
with:
image: tonistiigi/binfmt:qemu-v7.0.0-28
uses: docker/setup-qemu-action@v2
- name: Set up Docker Buildx
uses: docker/setup-buildx-action@v2
- name: Build and push

3
.gitignore vendored
View File

@@ -96,13 +96,10 @@ dependencies.lock
managed_components
# pytest log
pytest-embedded/
# legacy one
pytest_embedded_log/
list_job*.txt
size_info*.txt
XUNIT_RESULT*.xml
.manifest_sha
# clang config (for LSP)
.clangd

View File

@@ -2,5 +2,239 @@
#
# https://docs.gitlab.com/ee/user/project/code_owners.html#the-syntax-of-code-owners-files
#
# If more than one rule matches a given file, the latest rule is used.
# The file should be generally kept sorted, except when it is necessary
# to use a different order due to the fact above. In that case, use
# '# sort-order-reset' comment line to reset the sort order.
#
# Recipes for a few common cases:
#
# 1. Specific directory with all its contents:
#
# /components/app_trace/
#
# Note the trailing slash!
#
# 2. File with certain extension in any subdirectory of a certain directory:
#
# /examples/**/*.py
#
# This includes an *.py files in /examples/ directory as well.
#
# 3. Contents of a directory with a certain name, anywhere in the tree:
#
# test_*_host/
#
# Will match everything under components/efuse/test_efuse_host/,
# components/heap/test_multi_heap_host/, components/lwip/test_afl_host/, etc.
#
# 4. Same as above, except limited to a specific place in the tree:
#
# /components/esp32*/
#
# Matches everything under /components/esp32, /components/esp32s2, etc.
# Doesn't match /tools/some-test/components/esp32s5.
#
# 5. Specific file:
#
# /tools/tools.json
#
# 6. File with a certain name anywhere in the tree
#
# .gitignore
#
* @esp-idf-codeowners/all-maintainers
* @esp-idf-codeowners/other
/.* @esp-idf-codeowners/tools
/.codespellrc @esp-idf-codeowners/ci
/.github/workflows/ @esp-idf-codeowners/ci
/.gitlab-ci.yml @esp-idf-codeowners/ci
/.gitlab/ci/ @esp-idf-codeowners/ci
/.pre-commit-config.yaml @esp-idf-codeowners/ci
/.readthedocs.yml @esp-idf-codeowners/docs
/.vale.ini @esp-idf-codeowners/docs
/CMakeLists.txt @esp-idf-codeowners/build-config
/COMPATIBILITY*.md @esp-idf-codeowners/peripherals
/CONTRIBUTING.md @esp-idf-codeowners/docs
/Kconfig @esp-idf-codeowners/build-config
/README*.md @esp-idf-codeowners/docs
/SUPPORT_POLICY*.md @esp-idf-codeowners/docs
/add_path.sh @esp-idf-codeowners/tools
/conftest.py @esp-idf-codeowners/ci
/export.* @esp-idf-codeowners/tools
/install.* @esp-idf-codeowners/tools
/pytest.ini @esp-idf-codeowners/ci
/sdkconfig.rename @esp-idf-codeowners/build-config
/sonar-project.properties @esp-idf-codeowners/ci
# sort-order-reset
/components/app_trace/ @esp-idf-codeowners/debugging
/components/app_update/ @esp-idf-codeowners/system @esp-idf-codeowners/app-utilities
/components/bootloader*/ @esp-idf-codeowners/system @esp-idf-codeowners/security
/components/bootloader_support/bootloader_flash/ @esp-idf-codeowners/peripherals
/components/bt/ @esp-idf-codeowners/bluetooth
/components/cmock/ @esp-idf-codeowners/system
/components/console/ @esp-idf-codeowners/system @esp-idf-codeowners/app-utilities/console
/components/cxx/ @esp-idf-codeowners/system
/components/driver/ @esp-idf-codeowners/peripherals
/components/efuse/ @esp-idf-codeowners/system
/components/esp_adc/ @esp-idf-codeowners/peripherals
/components/esp_app_format/ @esp-idf-codeowners/system @esp-idf-codeowners/app-utilities
/components/esp_bootloader_format/ @esp-idf-codeowners/system @esp-idf-codeowners/app-utilities
/components/esp_coex/ @esp-idf-codeowners/wifi @esp-idf-codeowners/bluetooth @esp-idf-codeowners/ieee802154
/components/esp_common/ @esp-idf-codeowners/system
/components/esp_driver_*/ @esp-idf-codeowners/peripherals
/components/esp_driver_sdmmc/ @esp-idf-codeowners/peripherals @esp-idf-codeowners/storage
/components/esp_eth/ @esp-idf-codeowners/network
/components/esp_event/ @esp-idf-codeowners/system
/components/esp_gdbstub/ @esp-idf-codeowners/debugging
/components/esp_hid/ @esp-idf-codeowners/bluetooth
/components/esp_http_client/ @esp-idf-codeowners/app-utilities
/components/esp_http_server/ @esp-idf-codeowners/app-utilities
/components/esp_https_ota/ @esp-idf-codeowners/app-utilities
/components/esp_https_server/ @esp-idf-codeowners/app-utilities
/components/esp_hw_support/ @esp-idf-codeowners/system @esp-idf-codeowners/peripherals
/components/esp_hw_support/lowpower/ @esp-idf-codeowners/power-management
/components/esp_lcd/ @esp-idf-codeowners/peripherals
/components/esp_local_ctrl/ @esp-idf-codeowners/app-utilities
/components/esp_mm/ @esp-idf-codeowners/peripherals
/components/esp_netif/ @esp-idf-codeowners/network
/components/esp_netif_stack/ @esp-idf-codeowners/network
/components/esp_partition/ @esp-idf-codeowners/storage
/components/esp_phy/ @esp-idf-codeowners/bluetooth @esp-idf-codeowners/wifi @esp-idf-codeowners/ieee802154
/components/esp_pm/ @esp-idf-codeowners/power-management @esp-idf-codeowners/bluetooth @esp-idf-codeowners/wifi @esp-idf-codeowners/system
/components/esp_psram/ @esp-idf-codeowners/peripherals @esp-idf-codeowners/system
/components/esp_ringbuf/ @esp-idf-codeowners/system
/components/esp_rom/ @esp-idf-codeowners/system @esp-idf-codeowners/bluetooth @esp-idf-codeowners/wifi
/components/esp_system/ @esp-idf-codeowners/system
/components/esp_timer/ @esp-idf-codeowners/system
/components/esp-tls/ @esp-idf-codeowners/app-utilities
/components/esp_vfs_*/ @esp-idf-codeowners/storage
/components/esp_vfs_console/ @esp-idf-codeowners/storage @esp-idf-codeowners/system
/components/esp_wifi/ @esp-idf-codeowners/wifi
/components/espcoredump/ @esp-idf-codeowners/debugging
/components/esptool_py/ @esp-idf-codeowners/tools
/components/fatfs/ @esp-idf-codeowners/storage
/components/freertos/ @esp-idf-codeowners/system
/components/hal/ @esp-idf-codeowners/peripherals
/components/heap/ @esp-idf-codeowners/system
/components/http_parser/ @esp-idf-codeowners/app-utilities
/components/idf_test/ @esp-idf-codeowners/ci
/components/ieee802154/ @esp-idf-codeowners/ieee802154
/components/json/ @esp-idf-codeowners/app-utilities
/components/linux/ @esp-idf-codeowners/system
/components/log/ @esp-idf-codeowners/system
/components/lwip/ @esp-idf-codeowners/lwip
/components/mbedtls/ @esp-idf-codeowners/app-utilities/mbedtls @esp-idf-codeowners/security
/components/mqtt/ @esp-idf-codeowners/network
/components/newlib/ @esp-idf-codeowners/system @esp-idf-codeowners/toolchain
/components/nvs_flash/ @esp-idf-codeowners/storage
/components/nvs_sec_provider/ @esp-idf-codeowners/storage @esp-idf-codeowners/security
/components/openthread/ @esp-idf-codeowners/ieee802154
/components/partition_table/ @esp-idf-codeowners/system
/components/perfmon/ @esp-idf-codeowners/debugging
/components/protobuf-c/ @esp-idf-codeowners/app-utilities
/components/protocomm/ @esp-idf-codeowners/app-utilities/provisioning
/components/pthread/ @esp-idf-codeowners/system
/components/riscv/ @esp-idf-codeowners/system
/components/sdmmc/ @esp-idf-codeowners/storage
/components/soc/ @esp-idf-codeowners/peripherals @esp-idf-codeowners/system
/components/spi_flash/ @esp-idf-codeowners/peripherals
/components/spiffs/ @esp-idf-codeowners/storage
/components/tcp_transport/ @esp-idf-codeowners/network
/components/touch_element/ @esp-idf-codeowners/peripherals
/components/ulp/ @esp-idf-codeowners/system
/components/unity/ @esp-idf-codeowners/ci
/components/usb/ @esp-idf-codeowners/peripherals/usb
/components/vfs/ @esp-idf-codeowners/storage
/components/wear_levelling/ @esp-idf-codeowners/storage
/components/wifi_provisioning/ @esp-idf-codeowners/app-utilities/provisioning
/components/wpa_supplicant/ @esp-idf-codeowners/wifi @esp-idf-codeowners/app-utilities/mbedtls
/components/xtensa/ @esp-idf-codeowners/system
/docs/ @esp-idf-codeowners/docs
/docs/**/api-guides/tools/ @esp-idf-codeowners/tools
/docs/en/api-guides/core_dump.rst @esp-idf-codeowners/debugging
/docs/en/api-guides/jtag-debugging/ @esp-idf-codeowners/debugging
/docs/**/api-reference/bluetooth/ @esp-idf-codeowners/bluetooth
/docs/**/api-reference/network/ @esp-idf-codeowners/network @esp-idf-codeowners/wifi
/docs/**/api-reference/peripherals/ @esp-idf-codeowners/peripherals
/docs/**/api-reference/peripherals/usb* @esp-idf-codeowners/peripherals @esp-idf-codeowners/peripherals/usb
/docs/**/api-reference/protocols/ @esp-idf-codeowners/network @esp-idf-codeowners/app-utilities
/docs/**/api-reference/provisioning/ @esp-idf-codeowners/app-utilities/provisioning
/docs/**/api-reference/storage/ @esp-idf-codeowners/storage
/docs/**/api-reference/system/ @esp-idf-codeowners/system
/docs/**/security/ @esp-idf-codeowners/security
/docs/**/migration-guides/ @esp-idf-codeowners/docs @esp-idf-codeowners/all-maintainers
/examples/README.md @esp-idf-codeowners/docs @esp-idf-codeowners/ci
/examples/**/*.py @esp-idf-codeowners/ci @esp-idf-codeowners/tools
/examples/bluetooth/ @esp-idf-codeowners/bluetooth
/examples/build_system/ @esp-idf-codeowners/build-config
/examples/common_components/ @esp-idf-codeowners/system @esp-idf-codeowners/wifi @esp-idf-codeowners/lwip @esp-idf-codeowners/network
/examples/custom_bootloader/ @esp-idf-codeowners/system
/examples/cxx/ @esp-idf-codeowners/system
/examples/ethernet/ @esp-idf-codeowners/network
/examples/get-started/ @esp-idf-codeowners/system
/examples/ieee802154/ @esp-idf-codeowners/ieee802154
/examples/mesh/ @esp-idf-codeowners/wifi
/examples/network/ @esp-idf-codeowners/network @esp-idf-codeowners/wifi
/examples/openthread/ @esp-idf-codeowners/ieee802154
/examples/peripherals/ @esp-idf-codeowners/peripherals
/examples/peripherals/usb/ @esp-idf-codeowners/peripherals @esp-idf-codeowners/peripherals/usb
/examples/phy/ @esp-idf-codeowners/bluetooth @esp-idf-codeowners/wifi @esp-idf-codeowners/ieee802154
/examples/protocols/ @esp-idf-codeowners/network @esp-idf-codeowners/app-utilities
/examples/provisioning/ @esp-idf-codeowners/app-utilities/provisioning
/examples/security/ @esp-idf-codeowners/security
/examples/storage/ @esp-idf-codeowners/storage
/examples/system/ @esp-idf-codeowners/system
/examples/system/ota/ @esp-idf-codeowners/app-utilities
/examples/wifi/ @esp-idf-codeowners/wifi
/examples/zigbee/ @esp-idf-codeowners/ieee802154
/tools/ @esp-idf-codeowners/tools
/tools/ble/ @esp-idf-codeowners/app-utilities
/tools/catch/ @esp-idf-codeowners/ci
/tools/ci/ @esp-idf-codeowners/ci
/tools/cmake/ @esp-idf-codeowners/build-config
/tools/cmake/toolchain-*.cmake @esp-idf-codeowners/toolchain
/tools/esp_app_trace/ @esp-idf-codeowners/debugging
/tools/esp_prov/ @esp-idf-codeowners/app-utilities
/tools/gdb_panic_server.py @esp-idf-codeowners/debugging
/tools/kconfig*/ @esp-idf-codeowners/build-config
/tools/ldgen/ @esp-idf-codeowners/build-config
/tools/mass_mfg/ @esp-idf-codeowners/app-utilities
/tools/mocks/ @esp-idf-codeowners/system
/tools/test_apps/ @esp-idf-codeowners/ci
/tools/test_apps/README.md @esp-idf-codeowners/docs @esp-idf-codeowners/ci
## Note: owners here should be the same as the owners for the same example subdir, above
/tools/test_apps/build_system/ @esp-idf-codeowners/build-config
/tools/test_apps/configs/ @esp-idf-codeowners/system
/tools/test_apps/linux_compatible/ @esp-idf-codeowners/system
/tools/test_apps/peripherals/ @esp-idf-codeowners/peripherals
/tools/test_apps/phy/ @esp-idf-codeowners/bluetooth @esp-idf-codeowners/wifi @esp-idf-codeowners/ieee802154
/tools/test_apps/protocols/ @esp-idf-codeowners/network @esp-idf-codeowners/app-utilities
/tools/test_apps/security/ @esp-idf-codeowners/security
/tools/test_apps/storage/ @esp-idf-codeowners/storage
/tools/test_apps/system/ @esp-idf-codeowners/system
/tools/test_apps/**/*.py @esp-idf-codeowners/ci @esp-idf-codeowners/tools
/tools/test_build_system/ @esp-idf-codeowners/tools @esp-idf-codeowners/build-config
/tools/tools.json @esp-idf-codeowners/tools @esp-idf-codeowners/toolchain @esp-idf-codeowners/debugging
/tools/unit-test-app/ @esp-idf-codeowners/system @esp-idf-codeowners/tools
# sort-order-reset
/components/**/test_apps/**/*.py @esp-idf-codeowners/ci @esp-idf-codeowners/tools
# ignore lists
/tools/ci/check_copyright_config.yaml @esp-idf-codeowners/all-maintainers
/tools/ci/check_copyright_ignore.txt @esp-idf-codeowners/all-maintainers
/tools/ci/mypy_ignore_list.txt @esp-idf-codeowners/tools

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@@ -1,7 +1,7 @@
.build_template:
stage: build
extends:
- .after_script:build:ccache-show-stats:upload-failed-job-logs
- .after_script:build:ccache:upload-when-fail
image: $ESP_ENV_IMAGE
tags:
- build
@@ -16,7 +16,7 @@
extends:
- .build_template
- .before_script:build
- .after_script:build:ccache-show-stats
- .after_script:build:ccache
dependencies: # set dependencies to null to avoid missing artifacts issue
needs:
- job: fast_template_app
@@ -42,9 +42,9 @@
--parallel-count ${CI_NODE_TOTAL:-1}
--parallel-index ${CI_NODE_INDEX:-1}
--extra-preserve-dirs
examples/bluetooth/esp_ble_mesh/ble_mesh_console
examples/bluetooth/hci/controller_hci_uart_esp32
examples/wifi/iperf
examples/bluetooth/esp_ble_mesh/ble_mesh_console
examples/bluetooth/hci/controller_hci_uart_esp32
examples/wifi/iperf
--modified-components ${MR_MODIFIED_COMPONENTS}
--modified-files ${MR_MODIFIED_FILES}
# for detailed documents, please refer to .gitlab/ci/README.md#uploaddownload-artifacts-to-internal-minio-server
@@ -210,16 +210,15 @@ pytest_build_system_macos:
extends:
- .test_build_system_template
- .before_script:build:macos
- .after_script:build:macos:upload-failed-job-logs:ccache-show-stats
- .after_script:build:macos:upload-when-fail
- .rules:build:macos
tags:
- macos_shell
parallel: 3
variables:
PYENV_VERSION: "3.8"
# CCACHE_DIR: "/cache/idf_ccache". On macOS, you cannot write to this folder due to insufficient permissions.
CCACHE_DIR: "" # ccache will use "$HOME/Library/Caches/ccache".
CCACHE_MAXSIZE: "5G" # To preserve the limited Macbook storage. CCACHE automatically prunes old caches to fit the set limit.
CI_CCACHE_DISABLE: "1" # ccache: error: Read-only file system
build_docker:
extends:
- .before_script:minimal
@@ -265,8 +264,6 @@ generate_build_child_pipeline:
dependencies: # set dependencies to null to avoid missing artifacts issue
needs:
- pipeline_variables
- job: baseline_manifest_sha
optional: true
artifacts:
paths:
- build_child_pipeline.yml

View File

@@ -6,20 +6,20 @@ stages:
- pre_check
- build
- assign_test
- build_doc
- target_test
- host_test
- build_doc
- test_deploy
- deploy
- post_deploy
variables:
# System environment
# System environment
# Common parameters for the 'make' during CI tests
MAKEFLAGS: "-j5 --no-keep-going"
# GitLab-CI environment
# GitLab-CI environment
# Thanks to pack-objects cache, clone strategy should behave faster than fetch
# so we pick "clone" as default git strategy
# Shiny runners by default remove the CI_PROJECT_DIR every time at the beginning of one job
@@ -39,7 +39,7 @@ variables:
GIT_FETCH_EXTRA_FLAGS: "--no-recurse-submodules --prune --prune-tags"
# we're using .cache folder for caches
GIT_CLEAN_FLAGS: -ffdx -e .cache/
LATEST_GIT_TAG: v5.3.3
LATEST_GIT_TAG: v5.4-dev
SUBMODULE_FETCH_TOOL: "tools/ci/ci_fetch_submodule.py"
# by default we will fetch all submodules
@@ -54,9 +54,9 @@ variables:
CHECKOUT_REF_SCRIPT: "$CI_PROJECT_DIR/tools/ci/checkout_project_ref.py"
# Docker images
ESP_ENV_IMAGE: "${CI_DOCKER_REGISTRY}/esp-env-v5.3:1"
ESP_IDF_DOC_ENV_IMAGE: "${CI_DOCKER_REGISTRY}/esp-idf-doc-env-v5.3:1-1"
TARGET_TEST_ENV_IMAGE: "${CI_DOCKER_REGISTRY}/target-test-env-v5.3:1"
ESP_ENV_IMAGE: "${CI_DOCKER_REGISTRY}/esp-env-v5.4:1"
ESP_IDF_DOC_ENV_IMAGE: "${CI_DOCKER_REGISTRY}/esp-idf-doc-env-v5.4:1-1"
TARGET_TEST_ENV_IMAGE: "${CI_DOCKER_REGISTRY}/target-test-env-v5.4:1"
SONARQUBE_SCANNER_IMAGE: "${CI_DOCKER_REGISTRY}/sonarqube-scanner:5"
PRE_COMMIT_IMAGE: "${CI_DOCKER_REGISTRY}/esp-idf-pre-commit:1"
@@ -72,7 +72,7 @@ variables:
CI_PYTHON_CONSTRAINT_BRANCH: ""
# Update the filename for a specific ESP-IDF release. It is used only with CI_PYTHON_CONSTRAINT_BRANCH.
CI_PYTHON_CONSTRAINT_FILE: "espidf.constraints.v5.3.txt"
CI_PYTHON_CONSTRAINT_FILE: "espidf.constraints.v5.4.txt"
# Set this variable to repository name of a Python tool you wish to install and test in the context of ESP-IDF CI.
# Keep the variable empty when not used.
@@ -84,7 +84,7 @@ variables:
CI_PYTHON_TOOL_BRANCH: ""
# Set this variable to specify the file name for the known failure cases.
KNOWN_FAILURE_CASES_FILE_NAME: "5.3.txt"
KNOWN_FAILURE_CASES_FILE_NAME: "master.txt"
IDF_CI_BUILD: 1
@@ -219,14 +219,13 @@ variables:
- *setup_tools_and_idf_python_venv
- fetch_submodules
.after_script:build:macos:upload-failed-job-logs:ccache-show-stats:
.after_script:build:macos:upload-when-fail:
after_script:
# macos is running shell executor, which means it would use
# the system installed /usr/local/bin/python3 by default.
# Ensure pyenv and PYENV_VERSION installed
- eval "$(pyenv init -)"
- *upload_failed_job_log_artifacts
- *show_ccache_statistics
.before_script:build:
before_script:
@@ -237,11 +236,11 @@ variables:
- export EXTRA_CFLAGS=${PEDANTIC_CFLAGS}
- export EXTRA_CXXFLAGS=${PEDANTIC_CXXFLAGS}
.after_script:build:ccache-show-stats:
.after_script:build:ccache:
after_script:
- *show_ccache_statistics
.after_script:build:ccache-show-stats:upload-failed-job-logs:
.after_script:build:ccache:upload-when-fail:
after_script:
- *show_ccache_statistics
- *upload_failed_job_log_artifacts
@@ -364,12 +363,12 @@ default:
- *setup_tools_and_idf_python_venv
- add_gitlab_ssh_keys
- fetch_submodules
# gitlab bug, setting them here doesn't work
# - expire_in: https://gitlab.com/gitlab-org/gitlab/-/issues/404563
# - when: https://gitlab.com/gitlab-org/gitlab/-/issues/440672
# artifacts:
# expire_in: 1 week
# when: always
# gitlab bug, setting them here doesn't work
# - expire_in: https://gitlab.com/gitlab-org/gitlab/-/issues/404563
# - when: https://gitlab.com/gitlab-org/gitlab/-/issues/440672
# artifacts:
# expire_in: 1 week
# when: always
retry:
max: 2
when:

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@@ -1,4 +1,4 @@
# External DangerJS
# Extenal DangerJS
include:
- project: espressif/shared-ci-dangerjs
ref: master
@@ -10,6 +10,7 @@ run-danger-mr-linter:
GIT_STRATEGY: none # no repo checkout
ENABLE_CHECK_AREA_LABELS: 'true'
ENABLE_CHECK_DOCS_TRANSLATION: 'true'
ENABLE_CHECK_RELEASE_NOTES_DESCRIPTION: 'true'
ENABLE_CHECK_UPDATED_CHANGELOG: 'false'
before_script: []
cache: []

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@@ -8,6 +8,7 @@
# This file should ONLY be used during bringup. Should be reset to empty after the bringup process
extra_default_build_targets:
- esp32p4
- esp32c5
bypass_check_test_targets:
- esp32c5

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@@ -37,16 +37,25 @@
.if-dev-push: &if-dev-push
if: '$CI_COMMIT_REF_NAME != "master" && $CI_COMMIT_BRANCH !~ /^release\/v/ && $CI_COMMIT_TAG !~ /^v\d+\.\d+(\.\d+)?($|-)/ && $CI_COMMIT_TAG !~ /^qa-test/ && ($CI_PIPELINE_SOURCE == "push" || $CI_PIPELINE_SOURCE == "merge_request_event")'
.if-schedule: &if-schedule
if: '$CI_PIPELINE_SOURCE == "schedule"'
.doc-rules:build:docs-full:
rules:
- <<: *if-qa-test-tag
when: never
- <<: *if-protected
- <<: *if-schedule
- <<: *if-label-build_docs
- <<: *if-label-docs_full
- <<: *if-dev-push
changes: *patterns-docs-full
.doc-rules:build:docs-full-prod:
rules:
- <<: *if-qa-test-tag
when: never
- <<: *if-protected-no_label
.doc-rules:build:docs-partial:
rules:
- <<: *if-qa-test-tag
@@ -83,14 +92,13 @@ check_docs_lang_sync:
stage: build_doc
tags:
- build_docs
needs:
- job: fast_template_app
artifacts: false
optional: true
script:
- if [ -n "${BREATHE_ALT_INSTALL_URL}" ]; then pip uninstall -y breathe && pip install -U ${BREATHE_ALT_INSTALL_URL}; fi
- cd docs
- build-docs -t $DOCTGT -bs $DOC_BUILDERS -l $DOCLANG build
artifacts:
expire_in: 4 days
when: always
parallel:
matrix:
- DOCLANG: ["en", "zh_CN"]
@@ -111,12 +119,26 @@ build_docs_html_full:
extends:
- .build_docs_template
- .doc-rules:build:docs-full
needs:
- job: fast_template_app
artifacts: false
optional: true
artifacts:
paths:
- docs/_build/*/*/*.txt
- docs/_build/*/*/html/*
variables:
DOC_BUILDERS: "html"
build_docs_html_full_prod:
extends:
- .build_docs_template
- .doc-rules:build:docs-full-prod
dependencies: [] # Stop build_docs jobs from downloading all previous job's artifacts
artifacts:
when: always
paths:
- docs/_build/*/*/*.txt
- docs/_build/*/*/html/*
expire_in: 4 days
variables:
DOC_BUILDERS: "html"
@@ -124,12 +146,14 @@ build_docs_html_partial:
extends:
- .build_docs_template
- .doc-rules:build:docs-partial
needs:
- job: fast_template_app
artifacts: false
optional: true
artifacts:
when: always
paths:
- docs/_build/*/*/*.txt
- docs/_build/*/*/html/*
expire_in: 4 days
variables:
DOC_BUILDERS: "html"
parallel:
@@ -139,6 +163,31 @@ build_docs_html_partial:
- DOCLANG: "zh_CN"
DOCTGT: "esp32p4"
build_docs_pdf:
extends:
- .build_docs_template
- .doc-rules:build:docs-full
needs:
- job: fast_template_app
artifacts: false
optional: true
artifacts:
paths:
- docs/_build/*/*/latex/*
variables:
DOC_BUILDERS: "latex"
build_docs_pdf_prod:
extends:
- .build_docs_template
- .doc-rules:build:docs-full-prod
dependencies: [] # Stop build_docs jobs from downloading all previous job's artifacts
artifacts:
paths:
- docs/_build/*/*/latex/*
variables:
DOC_BUILDERS: "latex"
.deploy_docs_template:
image: $ESP_IDF_DOC_ENV_IMAGE
variables:
@@ -167,6 +216,8 @@ deploy_docs_preview:
optional: true
- job: build_docs_html_full
optional: true
- job: build_docs_pdf
optional: true
variables:
TYPE: "preview"
# older branches use DOCS_DEPLOY_KEY, DOCS_SERVER, DOCS_SERVER_USER, DOCS_PATH for preview server so we keep these names for 'preview'
@@ -181,12 +232,12 @@ deploy_docs_production:
# The DOCS_PROD_* variables used by this job are "Protected" so these branches must all be marked "Protected" in Gitlab settings
extends:
- .deploy_docs_template
rules:
- <<: *if-protected-no_label
- .doc-rules:build:docs-full-prod
stage: post_deploy
dependencies: # set dependencies to null to avoid missing artifacts issue
needs: # ensure runs after push_to_github succeeded
- build_docs_html_full
- build_docs_html_full_prod
- build_docs_pdf_prod
- job: push_to_github
artifacts: false
variables:
@@ -196,23 +247,21 @@ deploy_docs_production:
DOCS_DEPLOY_SERVER_USER: "$DOCS_PROD_SERVER_USER"
DOCS_DEPLOY_PATH: "$DOCS_PROD_PATH"
DOCS_DEPLOY_URL_BASE: "https://docs.espressif.com/projects/esp-idf"
DEPLOY_STABLE: 1
check_doc_links:
extends:
- .build_docs_template
rules:
- <<: *if-protected-no_label
- .doc-rules:build:docs-full-prod
stage: post_deploy
needs:
- job: deploy_docs_production
artifacts: false
tags: ["build", "amd64", "internet"]
artifacts:
when: always
paths:
- docs/_build/*/*/*.txt
- docs/_build/*/*/linkcheck/*.txt
expire_in: 1 week
allow_failure: true
script:
- cd docs

View File

@@ -133,7 +133,7 @@ test_cli_installer:
script:
# Tools must be downloaded for testing
# We could use "idf_tools.py download all", but we don't want to install clang because of its huge size
- python3 ${IDF_PATH}/tools/idf_tools.py download required qemu-riscv32 qemu-xtensa cmake
- python3 ${IDF_PATH}/tools/idf_tools.py download required qemu-riscv32 qemu-xtensa
- cd ${IDF_PATH}/tools/test_idf_tools
- python3 -m pip install jsonschema
- python3 ./test_idf_tools.py -v
@@ -228,8 +228,6 @@ test_tools:
- pytest --noconftest test_idf_qemu.py --junitxml=${IDF_PATH}/XUNIT_IDF_PY_QEMU.xml || stat=1
- cd ${IDF_PATH}/tools/test_mkdfu
- pytest --noconftest test_mkdfu.py --junitxml=${IDF_PATH}/XUNIT_MKDFU.xml || stat=1
- cd ${IDF_PATH}/tools/test_idf_size
- pytest --noconftest test_idf_size.py --junitxml=${IDF_PATH}/XUNIT_IDF_SIZE.xml || stat=1
- cd ${IDF_PATH}
- shellcheck -s sh tools/detect_python.sh || stat=1
- shellcheck -s bash tools/detect_python.sh || stat=1
@@ -298,7 +296,7 @@ test_pytest_qemu:
artifacts:
paths:
- XUNIT_RESULT.xml
- pytest-embedded/
- pytest_embedded_log/
reports:
junit: XUNIT_RESULT.xml
allow_failure: true # IDFCI-1752
@@ -332,7 +330,7 @@ test_pytest_linux:
artifacts:
paths:
- XUNIT_RESULT.xml
- pytest-embedded/
- pytest_embedded_log/
- "**/build*/build_log.txt"
reports:
junit: XUNIT_RESULT.xml

View File

@@ -44,8 +44,6 @@ check_blobs:
- IDF_TARGET=esp32c2 $IDF_PATH/components/esp_wifi/test_md5/test_md5.sh
- IDF_TARGET=esp32c3 $IDF_PATH/components/esp_wifi/test_md5/test_md5.sh
- IDF_TARGET=esp32c6 $IDF_PATH/components/esp_wifi/test_md5/test_md5.sh
- IDF_TARGET=esp32c5 $IDF_PATH/components/esp_wifi/test_md5/test_md5.sh
- IDF_TARGET=esp32_host $IDF_PATH/components/esp_wifi/test_md5/test_md5.sh
# Check if Coexistence library header files match between IDF and the version used when compiling the libraries
- IDF_TARGET=esp32 $IDF_PATH/components/esp_coex/test_md5/test_md5.sh
- IDF_TARGET=esp32s2 $IDF_PATH/components/esp_coex/test_md5/test_md5.sh
@@ -54,7 +52,6 @@ check_blobs:
- IDF_TARGET=esp32c3 $IDF_PATH/components/esp_coex/test_md5/test_md5.sh
- IDF_TARGET=esp32c6 $IDF_PATH/components/esp_coex/test_md5/test_md5.sh
- IDF_TARGET=esp32h2 $IDF_PATH/components/esp_coex/test_md5/test_md5.sh
- IDF_TARGET=esp32c5 $IDF_PATH/components/esp_coex/test_md5/test_md5.sh
# Check if Wi-Fi, PHY, BT blobs contain references to specific symbols
- bash $IDF_PATH/tools/ci/check_blobs.sh
@@ -169,35 +166,3 @@ pipeline_variables:
- pipeline.env
expire_in: 1 week
when: always
baseline_manifest_sha:
extends:
- .pre_check_template
- .rules:dev-push
tags: [fast_run, shiny]
script:
- |
# merged results pipelines, by default
# diff between target-branch-head and merged-result-head
if [ -n "$CI_MERGE_REQUEST_TARGET_BRANCH_SHA" ]; then
git fetch origin $CI_MERGE_REQUEST_TARGET_BRANCH_SHA --depth=1
git checkout FETCH_HEAD
idf-build-apps dump-manifest-sha \
--manifest-files $(find . -name ".build-test-rules.yml" | xargs) \
--output .manifest_sha
# merge request pipelines, when the mr got conflicts
# diff between diff-base-sha and merge-request-head
elif [ -n "$CI_MERGE_REQUEST_DIFF_BASE_SHA" ]; then
git fetch origin $CI_MERGE_REQUEST_DIFF_BASE_SHA --depth=1
git checkout FETCH_HEAD
idf-build-apps dump-manifest-sha \
--manifest-files $(find . -name ".build-test-rules.yml" | xargs) \
--output .manifest_sha
# other pipelines, like the protected branches pipelines
# not triggered in this job
fi
artifacts:
paths:
- .manifest_sha
expire_in: 1 week
when: always

View File

@@ -86,7 +86,6 @@
- "tools/test_idf_py/**/*"
- "tools/idf_size.py"
- "tools/test_idf_size/**/*"
- "tools/tools.json"
- "tools/tools_schema.json"
@@ -217,10 +216,6 @@
rules:
- <<: *if-tag-release
.rules:dev-push:
rules:
- <<: *if-dev-push
# Do not upload caches on dev branches by default
.rules:upload-python-cache:
rules:
@@ -253,6 +248,15 @@
- <<: *if-dev-push
changes: *patterns-python-files
.rules:patterns:static-code-analysis-preview:
rules:
- <<: *if-dev-push
changes: *patterns-c-files
- <<: *if-dev-push
changes: *patterns-python-files
- <<: *if-dev-push
changes: *patterns-sonarqube-files
.rules:patterns:idf-pytest-plugin:
rules:
- <<: *if-protected

View File

@@ -38,3 +38,84 @@ check_pylint:
fi
- if [ -z "$files" ]; then echo "No python files found"; exit 0; fi
- run_cmd pylint --exit-zero --load-plugins=pylint_gitlab --output-format=gitlab-codeclimate:pylint.json $files
# build stage
# Sonarqube related jobs put here for this reason:
# Here we have two jobs. code_quality_check and code_quality_report.
#
# code_quality_check will analyze the code changes between your MR and
# code repo stored in sonarqube server. The analysis result is only shown in
# the comments under this MR and won't be transferred to the server.
#
# code_quality_report will analyze and transfer both of the newly added code
# and the analysis result to the server.
#
# Put in the front to ensure that the newly merged code can be stored in
# sonarqube server ASAP, in order to avoid reporting unrelated code issues
.sonar_scan_template:
stage: build
extends: .pre_check_template
# full clone since this image does not support fetch --shallow-since-cutoff
# shiny runners are used for full clone
tags: [build, shiny]
image: $SONARQUBE_SCANNER_IMAGE
before_script:
- source tools/ci/utils.sh
- export PYTHONPATH="$CI_PROJECT_DIR/tools:$CI_PROJECT_DIR/tools/ci/python_packages:$PYTHONPATH"
- fetch_submodules
# Exclude the submodules, all paths ends with /**
- submodules=$(get_all_submodules)
# get all exclude paths specified in tools/ci/sonar_exclude_list.txt | ignore lines start with # | xargs | replace all <space> to <comma>
- custom_excludes=$(cat $CI_PROJECT_DIR/tools/ci/sonar_exclude_list.txt | grep -v '^#' | xargs | sed -e 's/ /,/g')
# Exclude the report dir as well
- export EXCLUSIONS="$custom_excludes,$submodules"
- export SONAR_SCANNER_OPTS="-Xmx2048m"
variables:
GIT_DEPTH: 0
REPORT_PATTERN: clang_tidy_reports/**/*.txt
artifacts:
paths:
- $REPORT_PATTERN
expire_in: 1 week
when: always
dependencies: # Here is not a hard dependency relationship, could be skipped when only python files changed. so we do not use "needs" here.
- clang_tidy_check
code_quality_check:
extends:
- .sonar_scan_template
- .rules:patterns:static-code-analysis-preview
allow_failure: true # it's using exit code to indicate the code analysis result,
# we don't want to block ci when critical issues founded
script:
- export CI_MERGE_REQUEST_COMMITS=$(python ${CI_PROJECT_DIR}/tools/ci/ci_get_mr_info.py commits --src-branch ${CI_COMMIT_REF_NAME} | tr '\n' ',')
# test if this branch have merge request, if not, exit 0
- test -n "$CI_MERGE_REQUEST_IID" || exit 0
- test -n "$CI_MERGE_REQUEST_COMMITS" || exit 0
- sonar-scanner
-Dsonar.analysis.mode=preview
-Dsonar.branch.name=$CI_MERGE_REQUEST_SOURCE_BRANCH_NAME
-Dsonar.cxx.clangtidy.reportPath=$REPORT_PATTERN
-Dsonar.exclusions=$EXCLUSIONS
-Dsonar.gitlab.ci_merge_request_iid=$CI_MERGE_REQUEST_IID
-Dsonar.gitlab.commit_sha=$CI_MERGE_REQUEST_COMMITS
-Dsonar.gitlab.merge_request_discussion=true
-Dsonar.gitlab.ref_name=$CI_MERGE_REQUEST_SOURCE_BRANCH_NAME
-Dsonar.host.url=$SONAR_HOST_URL
-Dsonar.login=$SONAR_LOGIN
code_quality_report:
extends:
- .sonar_scan_template
- .rules:protected
allow_failure: true # it's using exit code to indicate the code analysis result,
# we don't want to block ci when critical issues founded
script:
- sonar-scanner
-Dsonar.branch.name=$CI_COMMIT_REF_NAME
-Dsonar.cxx.clangtidy.reportPath=$REPORT_PATTERN
-Dsonar.exclusions=$EXCLUSIONS
-Dsonar.gitlab.commit_sha=$PIPELINE_COMMIT_SHA
-Dsonar.gitlab.ref_name=$CI_COMMIT_REF_NAME
-Dsonar.host.url=$SONAR_HOST_URL
-Dsonar.login=$SONAR_LOGIN

View File

@@ -31,7 +31,7 @@ test_cli_installer_win:
IDF_PATH: "$CI_PROJECT_DIR"
script:
# Tools must be downloaded for testing
- python ${IDF_PATH}\tools\idf_tools.py download required qemu-riscv32 qemu-xtensa cmake
- python ${IDF_PATH}\tools\idf_tools.py download required qemu-riscv32 qemu-xtensa
- cd ${IDF_PATH}\tools\test_idf_tools
- python -m pip install jsonschema
- python .\test_idf_tools.py

5
.gitmodules vendored
View File

@@ -49,13 +49,12 @@
[submodule "components/json/cJSON"]
path = components/json/cJSON
url = ../../DaveGamble/cJSON.git
sbom-version = 1.7.18
sbom-version = 1.7.17
sbom-cpe = cpe:2.3:a:cjson_project:cjson:{}:*:*:*:*:*:*:*
sbom-supplier = Person: Dave Gamble
sbom-url = https://github.com/DaveGamble/cJSON
sbom-description = Ultralightweight JSON parser in ANSI C
sbom-hash = acc76239bee01d8e9c858ae2cab296704e52d916
sbom-cve-exclude-list = CVE-2024-31755 Resolved in v1.7.18
sbom-hash = 87d8f0961a01bf09bef98ff89bae9fdec42181ee
[submodule "components/mbedtls/mbedtls"]
path = components/mbedtls/mbedtls

View File

@@ -103,10 +103,10 @@ repos:
name: Check type annotations in python files
entry: tools/ci/check_type_comments.py
additional_dependencies:
- 'mypy'
- 'mypy-extensions'
- 'types-setuptools'
- 'types-PyYAML'
- 'mypy==0.940'
- 'mypy-extensions==0.4.3'
- 'types-setuptools==57.4.14'
- 'types-PyYAML==0.1.9'
- 'types-requests'
exclude: >
(?x)^(
@@ -154,7 +154,7 @@ repos:
require_serial: true
additional_dependencies:
- PyYAML == 5.3.1
- idf-build-apps~=2.5
- idf-build-apps~=2.0
- id: sort-yaml-files
name: sort yaml files
entry: tools/ci/sort_yaml.py
@@ -236,6 +236,6 @@ repos:
name: Lint rST files in docs folder using Sphinx Lint
files: ^(docs/en|docs/zh_CN)/.*\.(rst|inc)$
- repo: https://github.com/espressif/esp-idf-kconfig.git
rev: v2.4.1
rev: v2.1.0
hooks:
- id: check-kconfig-files

View File

@@ -96,7 +96,7 @@ if(CMAKE_C_COMPILER_ID MATCHES "Clang")
list(APPEND compile_options "-Wno-pointer-bool-conversion")
# mbedTLS md5.c triggers this warning in md5_test_buf (false positive)
list(APPEND compile_options "-Wno-string-concatenation")
# multiple cases of implicit conversions between unrelated enum types
# multiple cases of implict convertions between unrelated enum types
list(APPEND compile_options "-Wno-enum-conversion")
# When IRAM_ATTR is specified both in function declaration and definition,
# it produces different section names, since section names include __COUNTER__.
@@ -136,10 +136,6 @@ if(CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_DISABLE)
list(APPEND compile_definitions "-DNDEBUG")
endif()
if(CONFIG_COMPILER_NO_MERGE_CONSTANTS)
list(APPEND compile_options "-fno-merge-constants")
endif()
if(CONFIG_COMPILER_STACK_CHECK_MODE_NORM)
list(APPEND compile_options "-fstack-protector")
elseif(CONFIG_COMPILER_STACK_CHECK_MODE_STRONG)
@@ -152,10 +148,6 @@ if(CONFIG_COMPILER_DUMP_RTL_FILES)
list(APPEND compile_options "-fdump-rtl-expand")
endif()
idf_build_set_property(GDBINIT_FILES_PREFIX_MAP "${BUILD_DIR}/gdbinit/prefix_map")
file(MAKE_DIRECTORY "${BUILD_DIR}/gdbinit")
file(WRITE "${BUILD_DIR}/gdbinit/prefix_map" "")
if(NOT ${CMAKE_C_COMPILER_VERSION} VERSION_LESS 8.0.0)
if(CONFIG_COMPILER_HIDE_PATHS_MACROS)
list(APPEND compile_options "-fmacro-prefix-map=${CMAKE_SOURCE_DIR}=.")
@@ -223,35 +215,8 @@ endif()
list(APPEND link_options "-fno-lto")
if(CONFIG_IDF_TARGET_LINUX AND CMAKE_HOST_SYSTEM_NAME STREQUAL "Darwin")
# Not all versions of the MacOS linker support the -warn_commons flag.
# ld version 1053.12 (and above) have been tested to support it.
# Hence, we extract the version string from the linker output
# before including the flag.
# Get the ld version, capturing both stdout and stderr
execute_process(
COMMAND ${CMAKE_LINKER} -v
OUTPUT_VARIABLE LD_VERSION_OUTPUT
ERROR_VARIABLE LD_VERSION_ERROR
OUTPUT_STRIP_TRAILING_WHITESPACE
ERROR_STRIP_TRAILING_WHITESPACE
)
# Combine stdout and stderr
set(LD_VERSION_OUTPUT "${LD_VERSION_OUTPUT}\n${LD_VERSION_ERROR}")
# Extract the version string
string(REGEX MATCH "PROJECT:(ld|dyld)-([0-9]+)\\.([0-9]+)" LD_VERSION_MATCH "${LD_VERSION_OUTPUT}")
set(LD_VERSION_MAJOR_MINOR "${CMAKE_MATCH_2}.${CMAKE_MATCH_3}")
message(STATUS "Linker Version: ${LD_VERSION_MAJOR_MINOR}")
# Compare the version with 1053.12
if(LD_VERSION_MAJOR_MINOR VERSION_GREATER_EQUAL "1053.12")
list(APPEND link_options "-Wl,-warn_commons")
endif()
list(APPEND link_options "-Wl,-dead_strip")
list(APPEND link_options "-Wl,-warn_commons")
else()
list(APPEND link_options "-Wl,--gc-sections")
list(APPEND link_options "-Wl,--warn-common")

37
Kconfig
View File

@@ -75,6 +75,10 @@ mainmenu "Espressif IoT Development Framework Configuration"
string
default "$IDF_INIT_VERSION"
config IDF_TARGET_LINUX
bool
default "y" if IDF_TARGET="linux"
config IDF_TARGET_ESP32
bool
default "y" if IDF_TARGET="esp32"
@@ -529,15 +533,6 @@ mainmenu "Espressif IoT Development Framework Configuration"
help
Stack smashing protection.
config COMPILER_NO_MERGE_CONSTANTS
bool "Disable merging const sections"
depends on IDF_TOOLCHAIN_GCC
help
Disable merging identical constants (string/floating-point) across compilation units.
This helps in better size analysis of the application binary as the rodata section
distribution is more uniform across libraries. On downside, it may increase
the binary size and hence should be used during development phase only.
config COMPILER_WARN_WRITE_STRINGS
bool "Enable -Wwrite-strings warning flag"
default "n"
@@ -612,27 +607,6 @@ mainmenu "Espressif IoT Development Framework Configuration"
default "gcc" if COMPILER_RT_LIB_GCCLIB
default "" if COMPILER_RT_LIB_HOST
choice COMPILER_ORPHAN_SECTIONS
prompt "Orphan sections handling"
default COMPILER_ORPHAN_SECTIONS_PLACE
depends on !IDF_TARGET_LINUX
help
If the linker finds orphan sections, it attempts to place orphan sections after sections of the same
attribute such as code vs data, loadable vs non-loadable, etc.
That means that orphan sections could placed between sections defined in IDF linker scripts.
This could lead to corruption of the binary image. Configure the linker action here.
config COMPILER_ORPHAN_SECTIONS_WARNING
bool "Place with warning"
help
Places orphan sections with a warning message.
config COMPILER_ORPHAN_SECTIONS_PLACE
bool "Place silently"
help
Places orphan sections without a warning/error message.
endchoice
endmenu # Compiler Options
menu "Component config"
@@ -653,7 +627,6 @@ mainmenu "Espressif IoT Development Framework Configuration"
- CONFIG_ESPTOOLPY_FLASHFREQ_120M && CONFIG_ESPTOOLPY_FLASH_SAMPLE_MODE_DTR
- CONFIG_SPIRAM_SPEED_120M && CONFIG_SPIRAM_MODE_OCT
- CONFIG_BOOTLOADER_CACHE_32BIT_ADDR_QUAD_FLASH
- CONFIG_MBEDTLS_USE_CRYPTO_ROM_IMPL
- CONFIG_ESP_WIFI_EAP_TLS1_3
- CONFIG_ESP_WIFI_ENABLE_ROAMING_APP
- CONFIG_USB_HOST_EXT_PORT_SUPPORT_LS
- CONFIG_USB_HOST_EXT_PORT_RESET_ATTEMPTS

View File

@@ -21,7 +21,7 @@ const static char *TAG = "sysview_heap_trace";
#endif
static SEGGER_SYSVIEW_MODULE s_esp_sysview_heap_module = {
.sModule = "M=ESP32 SystemView Heap Tracing Module",
.sModule = "ESP32 SystemView Heap Tracing Module",
.NumEvents = 2,
};

View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -17,7 +17,6 @@
#include "esp_image_format.h"
#include "esp_secure_boot.h"
#include "esp_flash_encrypt.h"
#include "spi_flash_mmap.h"
#include "sdkconfig.h"
#include "esp_ota_ops.h"
@@ -41,7 +40,6 @@ typedef struct ota_ops_entry_ {
bool need_erase;
uint32_t wrote_size;
uint8_t partial_bytes;
bool ota_resumption;
WORD_ALIGNED_ATTR uint8_t partial_data[16];
LIST_ENTRY(ota_ops_entry_) entries;
} ota_ops_entry_t;
@@ -112,22 +110,6 @@ static esp_ota_img_states_t set_new_state_otadata(void)
#endif
}
static ota_ops_entry_t* esp_ota_init_entry(const esp_partition_t *partition)
{
ota_ops_entry_t *new_entry = (ota_ops_entry_t *) calloc(1, sizeof(ota_ops_entry_t));
if (new_entry == NULL) {
return NULL;
}
LIST_INSERT_HEAD(&s_ota_ops_entries_head, new_entry, entries);
new_entry->part = partition;
new_entry->handle = ++s_ota_ops_last_handle;
return new_entry;
}
esp_err_t esp_ota_begin(const esp_partition_t *partition, size_t image_size, esp_ota_handle_t *out_handle)
{
ota_ops_entry_t *new_entry;
@@ -161,13 +143,6 @@ esp_err_t esp_ota_begin(const esp_partition_t *partition, size_t image_size, esp
}
#endif
new_entry = esp_ota_init_entry(partition);
if (new_entry == NULL) {
return ESP_ERR_NO_MEM;
}
new_entry->need_erase = (image_size == OTA_WITH_SEQUENTIAL_WRITES);
*out_handle = new_entry->handle;
if (image_size != OTA_WITH_SEQUENTIAL_WRITES) {
// If input image size is 0 or OTA_SIZE_UNKNOWN, erase entire partition
if ((image_size == 0) || (image_size == OTA_SIZE_UNKNOWN)) {
@@ -181,44 +156,16 @@ esp_err_t esp_ota_begin(const esp_partition_t *partition, size_t image_size, esp
}
}
return ESP_OK;
}
esp_err_t esp_ota_resume(const esp_partition_t *partition, const size_t erase_size, const size_t image_offset, esp_ota_handle_t *out_handle)
{
ota_ops_entry_t *new_entry;
if ((partition == NULL) || (out_handle == NULL)) {
return ESP_ERR_INVALID_ARG;
}
if (image_offset > partition->size) {
return ESP_ERR_INVALID_ARG;
}
partition = esp_partition_verify(partition);
if (partition == NULL) {
return ESP_ERR_NOT_FOUND;
}
// The staging partition cannot be of type Factory, but the final partition can be.
if (!is_ota_partition(partition)) {
return ESP_ERR_INVALID_ARG;
}
const esp_partition_t* running_partition = esp_ota_get_running_partition();
if (partition == running_partition) {
return ESP_ERR_OTA_PARTITION_CONFLICT;
}
new_entry = esp_ota_init_entry(partition);
new_entry = (ota_ops_entry_t *) calloc(sizeof(ota_ops_entry_t), 1);
if (new_entry == NULL) {
return ESP_ERR_NO_MEM;
}
new_entry->ota_resumption = true;
new_entry->wrote_size = image_offset;
new_entry->need_erase = (erase_size == OTA_WITH_SEQUENTIAL_WRITES);
LIST_INSERT_HEAD(&s_ota_ops_entries_head, new_entry, entries);
new_entry->part = partition;
new_entry->handle = ++s_ota_ops_last_handle;
new_entry->need_erase = (image_size == OTA_WITH_SEQUENTIAL_WRITES);
*out_handle = new_entry->handle;
return ESP_OK;
}

View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -99,32 +99,6 @@ int esp_ota_get_app_elf_sha256(char* dst, size_t size) __attribute__((deprecated
*/
esp_err_t esp_ota_begin(const esp_partition_t* partition, size_t image_size, esp_ota_handle_t* out_handle);
/**
* @brief Resume an interrupted OTA update by continuing to write to the specified partition.
*
* This function is used when an OTA update was previously started and needs to be resumed after an interruption.
* It continues the OTA process from the specified offset within the partition.
*
* Unlike esp_ota_begin(), this function does not erase the partition which receives the OTA update, but rather expects that part of the image
* has already been written correctly, and it resumes writing from the given offset.
*
* @param partition Pointer to info for the partition which is receiving the OTA update. Required.
* @param erase_size Specifies how much flash memory to erase before resuming OTA, depending on whether a sequential write or a bulk erase is being used.
* @param image_offset Offset from where to resume the OTA process. Should be set to the number of bytes already written.
* @param out_handle On success, returns a handle that should be used for subsequent esp_ota_write() and esp_ota_end() calls.
*
* @return
* - ESP_OK: OTA operation resumed successfully.
* - ESP_ERR_INVALID_ARG: partition, out_handle were NULL or image_offset arguments is negative, or partition doesn't point to an OTA app partition.
* - ESP_ERR_NO_MEM: Cannot allocate memory for OTA operation.
* - ESP_ERR_OTA_PARTITION_CONFLICT: Partition holds the currently running firmware, cannot update in place.
* - ESP_ERR_NOT_FOUND: Partition argument not found in partition table.
* - ESP_ERR_OTA_SELECT_INFO_INVALID: The OTA data partition contains invalid data.
* - ESP_ERR_INVALID_SIZE: Partition doesn't fit in configured flash size.
* - ESP_ERR_FLASH_OP_TIMEOUT or ESP_ERR_FLASH_OP_FAIL: Flash write failed.
*/
esp_err_t esp_ota_resume(const esp_partition_t *partition, const size_t erase_size, const size_t image_offset, esp_ota_handle_t *out_handle);
/**
* @brief Write OTA update data to partition
*

View File

@@ -0,0 +1,7 @@
# Documentation: .gitlab/ci/README.md#manifest-file-to-control-the-buildtest-apps
components/app_update/test_apps:
disable:
- if: IDF_TARGET in ["esp32c6", "esp32h2", "esp32p4", "esp32c5"]
temporary: true
reason: target esp32c6, esp32h2, esp32p4, esp32c5 is not supported yet # TODO: IDF-8068, [ESP32C5] IDF-8638

View File

@@ -0,0 +1,2 @@
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- |

View File

@@ -1,4 +1,4 @@
idf_component_register(SRC_DIRS "."
PRIV_INCLUDE_DIRS "."
PRIV_REQUIRES cmock test_utils app_update bootloader_support nvs_flash driver spi_flash esp_psram
PRIV_REQUIRES cmock test_utils app_update bootloader_support nvs_flash driver spi_flash
WHOLE_ARCHIVE)

View File

@@ -6,7 +6,6 @@
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include "esp_log.h"
#include <freertos/FreeRTOS.h>
#include <freertos/task.h>
#include <freertos/semphr.h>
@@ -114,11 +113,3 @@ TEST_CASE("esp_ota_get_partition_description", "[ota]")
};
TEST_ESP_ERR(ESP_ERR_NOT_FOUND, bootloader_common_get_partition_description(&not_app_pos, &app_desc1));
}
TEST_CASE("esp_ota_get_running_partition points to correct address", "[spi_flash]")
{
const esp_partition_t *factory = esp_partition_find_first(ESP_PARTITION_TYPE_APP, ESP_PARTITION_SUBTYPE_ANY, "factory");
const esp_partition_t* part = esp_ota_get_running_partition();
ESP_LOGI("running bin", "0x%p", (void*)part->address);
TEST_ASSERT_EQUAL_HEX32(factory->address, part->address);
}

View File

@@ -842,7 +842,7 @@ static void test_flow6(void)
TEST_CASE_MULTIPLE_STAGES("Switching between factory, OTA0 using esp_ota_write_with_offset", "[app_update][timeout=90][reset=DEEPSLEEP_RESET, DEEPSLEEP_RESET]", start_test, test_flow6, test_flow6);
//IDF-5145
TEST_CASE("Test bootloader_common_get_sha256_of_partition returns ESP_ERR_IMAGE_INVALID when image is invalid", "[partitions]")
TEST_CASE("Test bootloader_common_get_sha256_of_partition returns ESP_ERR_IMAGE_INVALID when image is ivalid", "[partitions]")
{
const esp_partition_t *cur_app = esp_ota_get_running_partition();
ESP_LOGI(TAG, "copy current app to next part");

View File

@@ -0,0 +1,32 @@
# SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
# SPDX-License-Identifier: Unlicense OR CC0-1.0
import re
import pytest
from pytest_embedded import Dut
DEFAULT_TIMEOUT = 20
TEST_SUBMENU_PATTERN_PYTEST = re.compile(rb'\s+\((\d+)\)\s+"([^"]+)"\r?\n')
def run_multiple_stages(dut: Dut, test_case_num: int, stages: int) -> None:
for stage in range(1, stages + 1):
dut.write(str(test_case_num))
dut.expect(TEST_SUBMENU_PATTERN_PYTEST, timeout=DEFAULT_TIMEOUT)
dut.write(str(stage))
if stage != stages:
dut.expect_exact('Press ENTER to see the list of tests.')
@pytest.mark.supported_targets
@pytest.mark.temp_skip_ci(targets=['esp32c6', 'esp32h2', 'esp32p4'], reason='c6/h2/p4 support TBD') # TODO: IDF-8959
@pytest.mark.generic
def test_app_update(dut: Dut) -> None:
extra_data = dut.parse_test_menu()
for test_case in extra_data:
if test_case.type != 'multi_stage':
dut.write(str(test_case.index))
else:
run_multiple_stages(dut, test_case.index, len(test_case.subcases))
dut.expect_unity_test_output(timeout=90)
dut.expect_exact("Enter next test, or 'enter' to see menu")

View File

@@ -1,12 +0,0 @@
# Documentation: .gitlab/ci/README.md#manifest-file-to-control-the-buildtest-apps
components/app_update/test_apps:
enable:
- if: CONFIG_NAME == "defaults" and IDF_TARGET != "linux"
- if: CONFIG_NAME == "xip_psram" and IDF_TARGET in ["esp32s2", "esp32s3", "esp32p4"]
# S2 doesn't have ROM for flash
- if: CONFIG_NAME == "xip_psram_with_rom_impl" and IDF_TARGET in ["esp32s3", "esp32p4"]
disable:
- if: IDF_TARGET in ["esp32c6", "esp32h2", "esp32c5", "esp32c61"]
temporary: true
reason: target esp32c6, esp32h2 esp32c5 is not supported yet # TODO: [ESP32C5] IDF-8638

View File

@@ -1,2 +0,0 @@
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- |

View File

@@ -1,51 +0,0 @@
# SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
# SPDX-License-Identifier: Unlicense OR CC0-1.0
import re
import pytest
from pytest_embedded import Dut
DEFAULT_TIMEOUT = 20
TEST_SUBMENU_PATTERN_PYTEST = re.compile(rb'\s+\((\d+)\)\s+"([^"]+)"\r?\n')
@pytest.mark.supported_targets
@pytest.mark.temp_skip_ci(targets=['esp32c6', 'esp32h2'], reason='c6/h2 support TBD')
@pytest.mark.generic
@pytest.mark.parametrize(
'config',
[
'defaults',
],
indirect=True,
)
def test_app_update(dut: Dut) -> None:
dut.run_all_single_board_cases(timeout=90)
@pytest.mark.supported_targets
@pytest.mark.temp_skip_ci(targets=['esp32c6', 'esp32h2'], reason='c6/h2 support TBD')
@pytest.mark.generic
@pytest.mark.parametrize(
'config',
[
'xip_psram',
],
indirect=True,
)
def test_app_update_xip_psram(dut: Dut) -> None:
dut.run_all_single_board_cases(timeout=90)
@pytest.mark.supported_targets
@pytest.mark.temp_skip_ci(targets=['esp32c6', 'esp32h2'], reason='c6/h2 support TBD')
@pytest.mark.generic
@pytest.mark.parametrize(
'config',
[
'xip_psram_with_rom_impl',
],
indirect=True,
)
def test_app_update_xip_psram_rom_impl(dut: Dut) -> None:
dut.run_all_single_board_cases(timeout=90)

View File

@@ -1,2 +0,0 @@
# don't delete.
# used for CI to compile a default config when 'sdkconfig.ci.xxxx' is exist

View File

@@ -1,2 +0,0 @@
CONFIG_SPIRAM=y
CONFIG_SPIRAM_XIP_FROM_PSRAM=y

View File

@@ -1,3 +0,0 @@
CONFIG_SPIRAM=y
CONFIG_SPIRAM_XIP_FROM_PSRAM=y
CONFIG_SPI_FLASH_ROM_IMPL=y

View File

@@ -1,2 +0,0 @@
CONFIG_IDF_TARGET="esp32s3"
CONFIG_BOOTLOADER_NUM_PIN_APP_TEST=18

View File

@@ -127,15 +127,9 @@ menu "Bootloader config"
help
This is a helper config for 32bits address flash. Invisible for users.
config BOOTLOADER_FLASH_NEEDS_32BIT_ADDR_QUAD_FLASH
bool
default y if BOOTLOADER_FLASH_NEEDS_32BIT_FEAT && SOC_SPI_MEM_SUPPORT_CACHE_32BIT_ADDR_MAP
help
This is a helper config for 32bits address quad flash. Invisible for users.
config BOOTLOADER_CACHE_32BIT_ADDR_QUAD_FLASH
bool "Enable cache access to 32-bit-address (over 16MB) range of SPI Flash (READ DOCS FIRST)"
depends on BOOTLOADER_FLASH_NEEDS_32BIT_ADDR_QUAD_FLASH && IDF_EXPERIMENTAL_FEATURES
depends on BOOTLOADER_FLASH_NEEDS_32BIT_FEAT && IDF_TARGET_ESP32S3 && IDF_EXPERIMENTAL_FEATURES
default n
help
Enabling this option allows the CPU to access 32-bit-address flash beyond 16M range.
@@ -1131,44 +1125,6 @@ menu "Security features"
If not set, the app does not care if the flash encryption eFuse bit is set or not.
config SECURE_FLASH_PSEUDO_ROUND_FUNC
bool "Permanently enable XTS-AES's pseudo rounds function"
default y
depends on SECURE_FLASH_ENCRYPTION_MODE_RELEASE && SOC_FLASH_ENCRYPTION_XTS_AES_SUPPORT_PSEUDO_ROUND
help
If set (default), the bootloader will permanently enable the XTS-AES peripheral's pseudo rounds function.
Note: Enabling this config would burn an efuse.
choice SECURE_FLASH_PSEUDO_ROUND_FUNC_STRENGTH
prompt "Strength of the pseudo rounds function"
depends on SECURE_FLASH_PSEUDO_ROUND_FUNC
default SECURE_FLASH_PSEUDO_ROUND_FUNC_STRENGTH_LOW
help
The strength of the pseudo rounds functions can be configured to low, medium and high,
each denoting the values that would be stored in the efuses field.
By default the value to set to low.
You can configure the strength of the pseudo rounds functions according to your use cases,
for example, increasing the strength would provide higher security but would slow down the
flash encryption/decryption operations.
For more info regarding the performance impact, please checkout the pseudo round function section of the
security guide documentation.
config SECURE_FLASH_PSEUDO_ROUND_FUNC_STRENGTH_LOW
bool "Low"
config SECURE_FLASH_PSEUDO_ROUND_FUNC_STRENGTH_MEDIUM
bool "Medium"
config SECURE_FLASH_PSEUDO_ROUND_FUNC_STRENGTH_HIGH
bool "High"
endchoice
config SECURE_FLASH_PSEUDO_ROUND_FUNC_STRENGTH
int
default 1 if SECURE_FLASH_PSEUDO_ROUND_FUNC_STRENGTH_LOW
default 2 if SECURE_FLASH_PSEUDO_ROUND_FUNC_STRENGTH_MEDIUM
default 3 if SECURE_FLASH_PSEUDO_ROUND_FUNC_STRENGTH_HIGH
config SECURE_ROM_DL_MODE_ENABLED
bool
default y if SOC_SUPPORTS_SECURE_DL_MODE && !SECURE_FLASH_ENCRYPTION_MODE_DEVELOPMENT

View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -119,7 +119,6 @@ SECTIONS
.dram0.data : ALIGN(0x10)
{
*(.dram1 .dram1.*) /* catch stray DRAM_ATTR */
*(.data)
*(.data.*)
*(.gnu.linkonce.d.*)
@@ -145,7 +144,6 @@ SECTIONS
*(.gcc_except_table)
*(.gnu.linkonce.e.*)
*(.gnu.version_r)
*(.eh_frame_hdr)
*(.eh_frame)
. = (. + 3) & ~ 3;
/* C++ constructor and destructor tables, properly ordered: */
@@ -210,55 +208,12 @@ SECTIONS
*/
.xt.prop 0 :
{
KEEP (*(.xt.prop .xt.prop.* .gnu.linkonce.prop.*))
KEEP (*(.xt.prop .gnu.linkonce.prop.*))
}
.xt.lit 0 :
{
KEEP (*(.xt.lit .xt.lit.* .gnu.linkonce.p.*))
KEEP (*(.xt.lit .gnu.linkonce.p.*))
}
.xtensa.info 0: { *(.xtensa.info) }
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
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/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
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.debug_macinfo 0 : { *(.debug_macinfo) }
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/* DWARF 3 */
.debug_ranges 0 : { *(.debug_ranges) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
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/* GNU DWARF 2 extensions */
.debug_gnu_pubnames 0 : { *(.debug_gnu_pubnames) }
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/* DWARF 4 */
.debug_types 0 : { *(.debug_types) }
/* DWARF 5 */
.debug_addr 0 : { *(.debug_addr) }
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.debug_str_offsets 0 : { *(.debug_str_offsets) }
.comment 0 : { *(.comment) }
.note.GNU-stack 0: { *(.note.GNU-stack) }
}

View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -140,7 +140,6 @@ SECTIONS
.dram0.data :
{
*(.dram1 .dram1.*) /* catch stray DRAM_ATTR */
*(.data)
*(.data.*)
*(.gnu.linkonce.d.*)
@@ -166,7 +165,6 @@ SECTIONS
*(.gcc_except_table)
*(.gnu.linkonce.e.*)
*(.gnu.version_r)
*(.eh_frame_hdr)
*(.eh_frame)
. = (. + 3) & ~ 3;
/* C++ constructor and destructor tables, properly ordered: */
@@ -220,57 +218,6 @@ SECTIONS
_etext = .;
} > iram_seg
.riscv.attributes 0: { *(.riscv.attributes) }
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
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/* DWARF 2 */
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.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
.debug_pubtypes 0 : { *(.debug_pubtypes) }
/* DWARF 3 */
.debug_ranges 0 : { *(.debug_ranges) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
/* GNU DWARF 2 extensions */
.debug_gnu_pubnames 0 : { *(.debug_gnu_pubnames) }
.debug_gnu_pubtypes 0 : { *(.debug_gnu_pubtypes) }
/* DWARF 4 */
.debug_types 0 : { *(.debug_types) }
/* DWARF 5 */
.debug_addr 0 : { *(.debug_addr) }
.debug_line_str 0 : { *(.debug_line_str) }
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.debug_str_offsets 0 : { *(.debug_str_offsets) }
.comment 0 : { *(.comment) }
.note.GNU-stack 0: { *(.note.GNU-stack) }
/**
* Discarding .rela.* sections results in the following mapping:
* .rela.text.* -> .text.*
* .rela.data.* -> .data.*
* And so forth...
*/
/DISCARD/ : { *(.rela.*) }
}
/**

View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -140,7 +140,6 @@ SECTIONS
.dram0.data :
{
*(.dram1 .dram1.*) /* catch stray DRAM_ATTR */
*(.data)
*(.data.*)
*(.gnu.linkonce.d.*)
@@ -166,7 +165,6 @@ SECTIONS
*(.gcc_except_table)
*(.gnu.linkonce.e.*)
*(.gnu.version_r)
*(.eh_frame_hdr)
*(.eh_frame)
. = (. + 3) & ~ 3;
/* C++ constructor and destructor tables, properly ordered: */
@@ -220,58 +218,6 @@ SECTIONS
_etext = .;
} > iram_seg
.riscv.attributes 0: { *(.riscv.attributes) }
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
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/* DWARF 3 */
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/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
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/* GNU DWARF 2 extensions */
.debug_gnu_pubnames 0 : { *(.debug_gnu_pubnames) }
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/* DWARF 4 */
.debug_types 0 : { *(.debug_types) }
/* DWARF 5 */
.debug_addr 0 : { *(.debug_addr) }
.debug_line_str 0 : { *(.debug_line_str) }
.debug_loclists 0 : { *(.debug_loclists) }
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.debug_str_offsets 0 : { *(.debug_str_offsets) }
.comment 0 : { *(.comment) }
.note.GNU-stack 0: { *(.note.GNU-stack) }
/**
* Discarding .rela.* sections results in the following mapping:
* .rela.text.* -> .text.*
* .rela.data.* -> .data.*
* And so forth...
*/
/DISCARD/ : { *(.rela.*) }
}

View File

@@ -139,7 +139,6 @@ SECTIONS
.dram0.data :
{
*(.dram1 .dram1.*) /* catch stray DRAM_ATTR */
*(.data)
*(.data.*)
*(.gnu.linkonce.d.*)
@@ -165,7 +164,6 @@ SECTIONS
*(.gcc_except_table)
*(.gnu.linkonce.e.*)
*(.gnu.version_r)
*(.eh_frame_hdr)
*(.eh_frame)
. = (. + 3) & ~ 3;
/* C++ constructor and destructor tables, properly ordered: */
@@ -219,58 +217,6 @@ SECTIONS
_etext = .;
} > iram_seg
.riscv.attributes 0: { *(.riscv.attributes) }
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
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.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
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/* DWARF 2 */
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.comment 0 : { *(.comment) }
.note.GNU-stack 0: { *(.note.GNU-stack) }
/**
* Discarding .rela.* sections results in the following mapping:
* .rela.text.* -> .text.*
* .rela.data.* -> .data.*
* And so forth...
*/
/DISCARD/ : { *(.rela.*) }
}

View File

@@ -138,7 +138,6 @@ SECTIONS
.dram0.data :
{
*(.dram1 .dram1.*) /* catch stray DRAM_ATTR */
*(.data)
*(.data.*)
*(.gnu.linkonce.d.*)
@@ -164,7 +163,6 @@ SECTIONS
*(.gcc_except_table)
*(.gnu.linkonce.e.*)
*(.gnu.version_r)
*(.eh_frame_hdr)
*(.eh_frame)
. = (. + 3) & ~ 3;
/* C++ constructor and destructor tables, properly ordered: */
@@ -218,58 +216,6 @@ SECTIONS
_etext = .;
} > iram_seg
.riscv.attributes 0: { *(.riscv.attributes) }
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
.debug_pubtypes 0 : { *(.debug_pubtypes) }
/* DWARF 3 */
.debug_ranges 0 : { *(.debug_ranges) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
/* GNU DWARF 2 extensions */
.debug_gnu_pubnames 0 : { *(.debug_gnu_pubnames) }
.debug_gnu_pubtypes 0 : { *(.debug_gnu_pubtypes) }
/* DWARF 4 */
.debug_types 0 : { *(.debug_types) }
/* DWARF 5 */
.debug_addr 0 : { *(.debug_addr) }
.debug_line_str 0 : { *(.debug_line_str) }
.debug_loclists 0 : { *(.debug_loclists) }
.debug_macro 0 : { *(.debug_macro) }
.debug_names 0 : { *(.debug_names) }
.debug_rnglists 0 : { *(.debug_rnglists) }
.debug_str_offsets 0 : { *(.debug_str_offsets) }
.comment 0 : { *(.comment) }
.note.GNU-stack 0: { *(.note.GNU-stack) }
/**
* Discarding .rela.* sections results in the following mapping:
* .rela.text.* -> .text.*
* .rela.data.* -> .data.*
* And so forth...
*/
/DISCARD/ : { *(.rela.*) }
}

View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -138,7 +138,6 @@ SECTIONS
.dram0.data :
{
*(.dram1 .dram1.*) /* catch stray DRAM_ATTR */
*(.data)
*(.data.*)
*(.gnu.linkonce.d.*)
@@ -164,7 +163,6 @@ SECTIONS
*(.gcc_except_table)
*(.gnu.linkonce.e.*)
*(.gnu.version_r)
*(.eh_frame_hdr)
*(.eh_frame)
. = (. + 3) & ~ 3;
/* C++ constructor and destructor tables, properly ordered: */
@@ -218,58 +216,6 @@ SECTIONS
_etext = .;
} > iram_seg
.riscv.attributes 0: { *(.riscv.attributes) }
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
.debug_pubtypes 0 : { *(.debug_pubtypes) }
/* DWARF 3 */
.debug_ranges 0 : { *(.debug_ranges) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
/* GNU DWARF 2 extensions */
.debug_gnu_pubnames 0 : { *(.debug_gnu_pubnames) }
.debug_gnu_pubtypes 0 : { *(.debug_gnu_pubtypes) }
/* DWARF 4 */
.debug_types 0 : { *(.debug_types) }
/* DWARF 5 */
.debug_addr 0 : { *(.debug_addr) }
.debug_line_str 0 : { *(.debug_line_str) }
.debug_loclists 0 : { *(.debug_loclists) }
.debug_macro 0 : { *(.debug_macro) }
.debug_names 0 : { *(.debug_names) }
.debug_rnglists 0 : { *(.debug_rnglists) }
.debug_str_offsets 0 : { *(.debug_str_offsets) }
.comment 0 : { *(.comment) }
.note.GNU-stack 0: { *(.note.GNU-stack) }
/**
* Discarding .rela.* sections results in the following mapping:
* .rela.text.* -> .text.*
* .rela.data.* -> .data.*
* And so forth...
*/
/DISCARD/ : { *(.rela.*) }
}

View File

@@ -138,7 +138,6 @@ SECTIONS
.dram0.data :
{
*(.dram1 .dram1.*) /* catch stray DRAM_ATTR */
*(.data)
*(.data.*)
*(.gnu.linkonce.d.*)
@@ -164,7 +163,6 @@ SECTIONS
*(.gcc_except_table)
*(.gnu.linkonce.e.*)
*(.gnu.version_r)
*(.eh_frame_hdr)
*(.eh_frame)
. = (. + 3) & ~ 3;
/* C++ constructor and destructor tables, properly ordered: */
@@ -218,58 +216,6 @@ SECTIONS
_etext = .;
} > iram_seg
.riscv.attributes 0: { *(.riscv.attributes) }
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
.debug_pubtypes 0 : { *(.debug_pubtypes) }
/* DWARF 3 */
.debug_ranges 0 : { *(.debug_ranges) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
/* GNU DWARF 2 extensions */
.debug_gnu_pubnames 0 : { *(.debug_gnu_pubnames) }
.debug_gnu_pubtypes 0 : { *(.debug_gnu_pubtypes) }
/* DWARF 4 */
.debug_types 0 : { *(.debug_types) }
/* DWARF 5 */
.debug_addr 0 : { *(.debug_addr) }
.debug_line_str 0 : { *(.debug_line_str) }
.debug_loclists 0 : { *(.debug_loclists) }
.debug_macro 0 : { *(.debug_macro) }
.debug_names 0 : { *(.debug_names) }
.debug_rnglists 0 : { *(.debug_rnglists) }
.debug_str_offsets 0 : { *(.debug_str_offsets) }
.comment 0 : { *(.comment) }
.note.GNU-stack 0: { *(.note.GNU-stack) }
/**
* Discarding .rela.* sections results in the following mapping:
* .rela.text.* -> .text.*
* .rela.data.* -> .data.*
* And so forth...
*/
/DISCARD/ : { *(.rela.*) }
}

View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -138,7 +138,7 @@ SECTIONS
.dram0.data :
{
*(.dram1 .dram1.*) /* catch stray DRAM_ATTR */
_data_start = ABSOLUTE(.);
*(.data)
*(.data.*)
*(.gnu.linkonce.d.*)
@@ -164,7 +164,6 @@ SECTIONS
*(.gcc_except_table)
*(.gnu.linkonce.e.*)
*(.gnu.version_r)
*(.eh_frame_hdr)
*(.eh_frame)
. = (. + 3) & ~ 3;
/* C++ constructor and destructor tables, properly ordered: */
@@ -218,58 +217,6 @@ SECTIONS
_etext = .;
} > iram_seg
.riscv.attributes 0: { *(.riscv.attributes) }
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
.debug_pubtypes 0 : { *(.debug_pubtypes) }
/* DWARF 3 */
.debug_ranges 0 : { *(.debug_ranges) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
/* GNU DWARF 2 extensions */
.debug_gnu_pubnames 0 : { *(.debug_gnu_pubnames) }
.debug_gnu_pubtypes 0 : { *(.debug_gnu_pubtypes) }
/* DWARF 4 */
.debug_types 0 : { *(.debug_types) }
/* DWARF 5 */
.debug_addr 0 : { *(.debug_addr) }
.debug_line_str 0 : { *(.debug_line_str) }
.debug_loclists 0 : { *(.debug_loclists) }
.debug_macro 0 : { *(.debug_macro) }
.debug_names 0 : { *(.debug_names) }
.debug_rnglists 0 : { *(.debug_rnglists) }
.debug_str_offsets 0 : { *(.debug_str_offsets) }
.comment 0 : { *(.comment) }
.note.GNU-stack 0: { *(.note.GNU-stack) }
/**
* Discarding .rela.* sections results in the following mapping:
* .rela.text.* -> .text.*
* .rela.data.* -> .data.*
* And so forth...
*/
/DISCARD/ : { *(.rela.*) }
}
/**

View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -131,15 +131,9 @@ SECTIONS
_bss_end = ABSOLUTE(.);
} > dram_seg
.dram0.bootdesc : ALIGN(0x10)
{
_data_start = ABSOLUTE(.);
*(.data_bootloader_desc .data_bootloader_desc.*) /* Should be the first. Bootloader version info. DO NOT PUT ANYTHING BEFORE IT! */
} > dram_seg
.dram0.data :
{
*(.dram1 .dram1.*) /* catch stray DRAM_ATTR */
_data_start = ABSOLUTE(.);
*(.data)
*(.data.*)
*(.gnu.linkonce.d.*)
@@ -165,7 +159,6 @@ SECTIONS
*(.gcc_except_table)
*(.gnu.linkonce.e.*)
*(.gnu.version_r)
*(.eh_frame_hdr)
*(.eh_frame)
. = (. + 3) & ~ 3;
/* C++ constructor and destructor tables, properly ordered: */
@@ -219,58 +212,6 @@ SECTIONS
_etext = .;
} > iram_seg
.riscv.attributes 0: { *(.riscv.attributes) }
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
.debug_pubtypes 0 : { *(.debug_pubtypes) }
/* DWARF 3 */
.debug_ranges 0 : { *(.debug_ranges) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
/* GNU DWARF 2 extensions */
.debug_gnu_pubnames 0 : { *(.debug_gnu_pubnames) }
.debug_gnu_pubtypes 0 : { *(.debug_gnu_pubtypes) }
/* DWARF 4 */
.debug_types 0 : { *(.debug_types) }
/* DWARF 5 */
.debug_addr 0 : { *(.debug_addr) }
.debug_line_str 0 : { *(.debug_line_str) }
.debug_loclists 0 : { *(.debug_loclists) }
.debug_macro 0 : { *(.debug_macro) }
.debug_names 0 : { *(.debug_names) }
.debug_rnglists 0 : { *(.debug_rnglists) }
.debug_str_offsets 0 : { *(.debug_str_offsets) }
.comment 0 : { *(.comment) }
.note.GNU-stack 0: { *(.note.GNU-stack) }
/**
* Discarding .rela.* sections results in the following mapping:
* .rela.text.* -> .text.*
* .rela.data.* -> .data.*
* And so forth...
*/
/DISCARD/ : { *(.rela.*) }
}

View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2021-2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -108,7 +108,6 @@ SECTIONS
.dram0.data :
{
*(.dram1 .dram1.*) /* catch stray DRAM_ATTR */
*(.data)
*(.data.*)
*(.gnu.linkonce.d.*)
@@ -134,7 +133,6 @@ SECTIONS
*(.gcc_except_table)
*(.gnu.linkonce.e.*)
*(.gnu.version_r)
*(.eh_frame_hdr)
*(.eh_frame)
. = (. + 3) & ~ 3;
/* C++ constructor and destructor tables, properly ordered: */
@@ -207,48 +205,4 @@ SECTIONS
KEEP (*(.xt.lit .gnu.linkonce.p.*))
}
.xtensa.info 0: { *(.xtensa.info) }
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
.debug_pubtypes 0 : { *(.debug_pubtypes) }
/* DWARF 3 */
.debug_ranges 0 : { *(.debug_ranges) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
/* GNU DWARF 2 extensions */
.debug_gnu_pubnames 0 : { *(.debug_gnu_pubnames) }
.debug_gnu_pubtypes 0 : { *(.debug_gnu_pubtypes) }
/* DWARF 4 */
.debug_types 0 : { *(.debug_types) }
/* DWARF 5 */
.debug_addr 0 : { *(.debug_addr) }
.debug_line_str 0 : { *(.debug_line_str) }
.debug_loclists 0 : { *(.debug_loclists) }
.debug_macro 0 : { *(.debug_macro) }
.debug_names 0 : { *(.debug_names) }
.debug_rnglists 0 : { *(.debug_rnglists) }
.debug_str_offsets 0 : { *(.debug_str_offsets) }
.comment 0 : { *(.comment) }
.note.GNU-stack 0: { *(.note.GNU-stack) }
}

View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -142,7 +142,6 @@ SECTIONS
.dram0.data :
{
*(.dram1 .dram1.*) /* catch stray DRAM_ATTR */
*(.data)
*(.data.*)
*(.gnu.linkonce.d.*)
@@ -168,7 +167,6 @@ SECTIONS
*(.gcc_except_table)
*(.gnu.linkonce.e.*)
*(.gnu.version_r)
*(.eh_frame_hdr)
*(.eh_frame)
. = (. + 3) & ~ 3;
/* C++ constructor and destructor tables, properly ordered: */
@@ -241,50 +239,6 @@ SECTIONS
KEEP (*(.xt.lit .gnu.linkonce.p.*))
}
.xtensa.info 0: { *(.xtensa.info) }
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
.debug_pubtypes 0 : { *(.debug_pubtypes) }
/* DWARF 3 */
.debug_ranges 0 : { *(.debug_ranges) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
/* GNU DWARF 2 extensions */
.debug_gnu_pubnames 0 : { *(.debug_gnu_pubnames) }
.debug_gnu_pubtypes 0 : { *(.debug_gnu_pubtypes) }
/* DWARF 4 */
.debug_types 0 : { *(.debug_types) }
/* DWARF 5 */
.debug_addr 0 : { *(.debug_addr) }
.debug_line_str 0 : { *(.debug_line_str) }
.debug_loclists 0 : { *(.debug_loclists) }
.debug_macro 0 : { *(.debug_macro) }
.debug_names 0 : { *(.debug_names) }
.debug_rnglists 0 : { *(.debug_rnglists) }
.debug_str_offsets 0 : { *(.debug_str_offsets) }
.comment 0 : { *(.comment) }
.note.GNU-stack 0: { *(.note.GNU-stack) }
}
/**

View File

@@ -13,9 +13,6 @@
#include "hal/efuse_ll.h"
#include "hal/efuse_hal.h"
#ifndef BOOTLOADER_BUILD
#include "spi_flash_mmap.h"
#endif
#include "hal/spi_flash_ll.h"
#include "rom/spi_flash.h"
#if CONFIG_IDF_TARGET_ESP32
@@ -136,8 +133,6 @@ esp_err_t bootloader_flash_erase_range(uint32_t start_addr, uint32_t size)
#if CONFIG_IDF_TARGET_ESP32S3
#include "esp32s3/rom/opi_flash.h"
#elif CONFIG_IDF_TARGET_ESP32P4
#include "esp32p4/rom/opi_flash.h"
#endif
static const char *TAG = "bootloader_flash";
@@ -697,7 +692,7 @@ void bootloader_spi_flash_reset(void)
******************************************************************************/
#define XMC_SUPPORT CONFIG_BOOTLOADER_FLASH_XMC_SUPPORT
#define XMC_VENDOR_ID_1 0x20
#define XMC_VENDOR_ID 0x20
#if BOOTLOADER_BUILD
#define BOOTLOADER_FLASH_LOG(level, ...) ESP_EARLY_LOG##level(TAG, ##__VA_ARGS__)
@@ -714,7 +709,7 @@ static IRAM_ATTR bool is_xmc_chip_strict(uint32_t rdid)
uint32_t mfid = BYTESHIFT(rdid, 1);
uint32_t cpid = BYTESHIFT(rdid, 0);
if (vendor_id != XMC_VENDOR_ID_1) {
if (vendor_id != XMC_VENDOR_ID) {
return false;
}
@@ -747,7 +742,7 @@ esp_err_t IRAM_ATTR bootloader_flash_xmc_startup(void)
// Check the Manufacturer ID in SFDP registers (JEDEC standard). If not XMC chip, no need to run the flow
const int sfdp_mfid_addr = 0x10;
uint8_t mf_id = (bootloader_flash_read_sfdp(sfdp_mfid_addr, 1) & 0xff);
if (mf_id != XMC_VENDOR_ID_1) {
if (mf_id != XMC_VENDOR_ID) {
BOOTLOADER_FLASH_LOG(D, "non-XMC chip detected by SFDP Read (%02X), skip.", mf_id);
return ESP_OK;
}
@@ -779,7 +774,7 @@ esp_err_t IRAM_ATTR bootloader_flash_xmc_startup(void)
static IRAM_ATTR bool is_xmc_chip(uint32_t rdid)
{
uint32_t vendor_id = (rdid >> 16) & 0xFF;
return (vendor_id == XMC_VENDOR_ID_1);
return (vendor_id == XMC_VENDOR_ID);
}
esp_err_t IRAM_ATTR bootloader_flash_xmc_startup(void)

View File

@@ -22,7 +22,7 @@
#include "hal/cache_hal.h"
#include "hal/cache_ll.h"
void IRAM_ATTR bootloader_flash_update_id()
void bootloader_flash_update_id()
{
esp_rom_spiflash_chip_t *chip = &rom_spiflash_legacy_data->chip;
chip->device_id = bootloader_read_flash_id();
@@ -99,15 +99,6 @@ static void update_flash_config(const esp_image_header_t *bootloader_hdr)
case ESP_IMAGE_FLASH_SIZE_16MB:
size = 16;
break;
case ESP_IMAGE_FLASH_SIZE_32MB:
size = 32;
break;
case ESP_IMAGE_FLASH_SIZE_64MB:
size = 64;
break;
case ESP_IMAGE_FLASH_SIZE_128MB:
size = 128;
break;
default:
size = 2;
}
@@ -184,15 +175,6 @@ static void print_flash_info(const esp_image_header_t *bootloader_hdr)
case ESP_IMAGE_FLASH_SIZE_16MB:
str = "16MB";
break;
case ESP_IMAGE_FLASH_SIZE_32MB:
str = "32MB";
break;
case ESP_IMAGE_FLASH_SIZE_64MB:
str = "64MB";
break;
case ESP_IMAGE_FLASH_SIZE_128MB:
str = "128MB";
break;
default:
str = "2MB";
break;
@@ -221,9 +203,6 @@ esp_err_t bootloader_init_spi_flash(void)
#if CONFIG_ESPTOOLPY_FLASHMODE_QIO || CONFIG_ESPTOOLPY_FLASHMODE_QOUT
bootloader_enable_qio_mode();
#endif
#if CONFIG_BOOTLOADER_CACHE_32BIT_ADDR_QUAD_FLASH
bootloader_flash_32bits_address_map_enable(bootloader_flash_get_spi_mode());
#endif
print_flash_info(&bootloader_image_hdr);
@@ -292,10 +271,6 @@ void bootloader_flash_hardware_init(void)
bootloader_spi_flash_resume();
bootloader_flash_unlock();
#if CONFIG_BOOTLOADER_CACHE_32BIT_ADDR_QUAD_FLASH
bootloader_flash_32bits_address_map_enable(bootloader_flash_get_spi_mode());
#endif
cache_hal_disable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
update_flash_config(&hdr);
cache_hal_enable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);

View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2018-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2018-2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -181,20 +181,6 @@ uint32_t bootloader_common_get_chip_ver_pkg(void);
*/
esp_err_t bootloader_common_check_chip_validity(const esp_image_header_t* img_hdr, esp_image_type type);
#if !CONFIG_IDF_TARGET_ESP32
/**
* @brief Check the eFuse block revision
*
* @param[in] min_rev_full The required minimum revision of the eFuse block
* @param[in] max_rev_full The required maximum revision of the eFuse block
* @return
* - ESP_OK: The eFuse block revision is in the required range.
* - ESP_OK: DISABLE_BLK_VERSION_MAJOR has been set in the eFuse of the SoC. No requirements shall be checked at this time.
* - ESP_FAIL: The eFuse block revision of this chip does not match the requirement of the current image.
*/
esp_err_t bootloader_common_check_efuse_blk_validity(uint32_t min_rev_full, uint32_t max_rev_full);
#endif // !CONFIG_IDF_TARGET_ESP32
/**
* @brief Configure VDDSDIO, call this API to rise VDDSDIO to 1.9V when VDDSDIO regulator is enabled as 1.8V mode.
*/

View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2010-2025 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2010-2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -10,7 +10,6 @@
#include <stdbool.h>
#include "soc/soc.h"
#include "soc/ext_mem_defs.h"
#include "soc/soc_caps.h"
#include "sdkconfig.h"
#include "esp_attr.h"
@@ -28,12 +27,7 @@ extern "C" {
*/
__attribute__((always_inline))
inline static bool esp_dram_match_iram(void) {
bool dram_match_iram = (SOC_DRAM_LOW == SOC_IRAM_LOW) &&
(SOC_DRAM_HIGH == SOC_IRAM_HIGH);
#if SOC_RTC_FAST_MEM_SUPPORTED
dram_match_iram &= (SOC_RTC_IRAM_LOW == SOC_RTC_DRAM_LOW);
#endif
return dram_match_iram;
return (SOC_DRAM_LOW == SOC_IRAM_LOW && SOC_DRAM_HIGH == SOC_IRAM_HIGH);
}
/**
@@ -87,7 +81,6 @@ __attribute__((always_inline))
inline static bool esp_ptr_in_diram_iram(const void *p) {
// TODO: IDF-5980 esp32c6 D/I RAM share the same address
#if SOC_DIRAM_IRAM_LOW == SOC_DIRAM_DRAM_LOW
(void)p;
return false;
#else
return ((intptr_t)p >= SOC_DIRAM_IRAM_LOW && (intptr_t)p < SOC_DIRAM_IRAM_HIGH);
@@ -103,10 +96,9 @@ inline static bool esp_ptr_in_diram_iram(const void *p) {
*/
__attribute__((always_inline))
inline static bool esp_ptr_in_rtc_iram_fast(const void *p) {
#if SOC_RTC_FAST_MEM_SUPPORTED && (SOC_RTC_IRAM_LOW != SOC_RTC_DRAM_LOW)
#if SOC_RTC_FAST_MEM_SUPPORTED
return ((intptr_t)p >= SOC_RTC_IRAM_LOW && (intptr_t)p < SOC_RTC_IRAM_HIGH);
#else
(void)p;
return false;
#endif
}
@@ -123,7 +115,6 @@ inline static bool esp_ptr_in_rtc_dram_fast(const void *p) {
#if SOC_RTC_FAST_MEM_SUPPORTED
return ((intptr_t)p >= SOC_RTC_DRAM_LOW && (intptr_t)p < SOC_RTC_DRAM_HIGH);
#else
(void)p;
return false;
#endif
}
@@ -159,21 +150,6 @@ inline static void * esp_ptr_diram_dram_to_iram(const void *p) {
#endif
}
/* Convert a RTC DRAM pointer to equivalent word address in RTC IRAM
- Address must be word aligned
- Address must pass esp_ptr_in_rtc_dram_fast() test, or result will be invalid pointer
*/
__attribute__((always_inline))
inline static void * esp_ptr_rtc_dram_to_iram(const void *p) {
intptr_t ptr = (intptr_t)p;
#if SOC_RTC_FAST_MEM_SUPPORTED && (SOC_RTC_IRAM_LOW != SOC_RTC_DRAM_LOW)
return (void *) ( SOC_RTC_IRAM_LOW + (ptr - SOC_RTC_DRAM_LOW) );
#else
return (void *) ptr;
#endif
}
/* Convert a D/IRAM IRAM pointer to equivalent word address in DRAM
- Address must be word aligned
@@ -203,31 +179,6 @@ inline static bool esp_ptr_in_tcm(const void *p) {
#endif //#if SOC_MEM_TCM_SUPPORTED
/** End of the common section that has to be in sync with esp_memory_utils.h **/
/**
* @brief Check if the pointer is in PSRAM vaddr space
*
* @note This function is only used when in bootloader, where the PSRAM isn't initialised.
* This function simply check if the pointer is the in the PSRAM vaddr space.
* The PSRAM vaddr space is not always the same as the actual PSRAM vaddr range used in APP
*
* @param p pointer
*
* @return true: is in PSRAM; false: not in PSRAM
*/
__attribute__((always_inline))
inline static bool esp_ptr_in_extram(const void *p) {
bool valid = false;
#if SOC_IRAM_PSRAM_ADDRESS_LOW
valid |= ((intptr_t)p >= SOC_IRAM_PSRAM_ADDRESS_LOW && (intptr_t)p < SOC_IRAM_PSRAM_ADDRESS_HIGH);
#endif
#if SOC_DRAM_PSRAM_ADDRESS_LOW
valid |= ((intptr_t)p >= SOC_DRAM_PSRAM_ADDRESS_LOW && (intptr_t)p < SOC_DRAM_PSRAM_ADDRESS_HIGH);
#endif
return valid;
}
/** Don't add new functions below **/
#ifdef __cplusplus

View File

@@ -9,6 +9,9 @@
#include "esp_attr.h"
#include "esp_err.h"
#include "soc/soc_caps.h"
#ifndef BOOTLOADER_BUILD
#include "spi_flash_mmap.h"
#endif
#include "hal/efuse_ll.h"
#include "sdkconfig.h"

View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2018-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2018-2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -37,8 +37,8 @@ esp_comm_gpio_hold_t bootloader_common_check_long_hold_gpio(uint32_t num_pin, ui
esp_comm_gpio_hold_t bootloader_common_check_long_hold_gpio_level(uint32_t num_pin, uint32_t delay_sec, bool level)
{
esp_rom_gpio_pad_select_gpio(num_pin);
if (((1ULL << num_pin) & SOC_GPIO_VALID_GPIO_MASK) != 0) {
gpio_ll_input_enable(&GPIO, num_pin);
if (GPIO_PIN_MUX_REG[num_pin]) {
PIN_INPUT_ENABLE(GPIO_PIN_MUX_REG[num_pin]);
}
esp_rom_gpio_pad_pullup_only(num_pin);
uint32_t tm_start = esp_log_early_timestamp();

View File

@@ -27,7 +27,7 @@
#include "esp_rom_caps.h"
#define ESP_PARTITION_HASH_LEN 32 /* SHA-256 digest length */
#define IS_FIELD_SET(rev_full) (((rev_full) != 65535) && ((rev_full) != 0))
#define IS_MAX_REV_SET(max_chip_rev_full) (((max_chip_rev_full) != 65535) && ((max_chip_rev_full) != 0))
static const char* TAG = "boot_comm";
@@ -57,31 +57,6 @@ int bootloader_common_get_active_otadata(esp_ota_select_entry_t *two_otadata)
return bootloader_common_select_otadata(two_otadata, valid_two_otadata, true);
}
#if !CONFIG_IDF_TARGET_ESP32
esp_err_t bootloader_common_check_efuse_blk_validity(uint32_t min_rev_full, uint32_t max_rev_full)
{
esp_err_t err = ESP_OK;
#ifndef CONFIG_IDF_ENV_FPGA
// Check whether the efuse block version satisfy the requirements of current image.
uint32_t revision = efuse_hal_blk_version();
uint32_t major_rev = revision / 100;
uint32_t minor_rev = revision % 100;
if (IS_FIELD_SET(min_rev_full) && !ESP_EFUSE_BLK_REV_ABOVE(revision, min_rev_full)) {
ESP_LOGE(TAG, "Image requires efuse blk rev >= v%"PRIu32".%"PRIu32", but chip is v%"PRIu32".%"PRIu32,
min_rev_full / 100, min_rev_full % 100, major_rev, minor_rev);
err = ESP_FAIL;
}
// If burnt `disable_blk_version_major` bit, skip the max version check
if ((IS_FIELD_SET(max_rev_full) && (revision > max_rev_full) && !efuse_hal_get_disable_blk_version_major())) {
ESP_LOGE(TAG, "Image requires efuse blk rev <= v%"PRIu32".%"PRIu32", but chip is v%"PRIu32".%"PRIu32,
max_rev_full / 100, max_rev_full % 100, major_rev, minor_rev);
err = ESP_FAIL;
}
#endif
return err;
}
#endif // !CONFIG_IDF_TARGET_ESP32
esp_err_t bootloader_common_check_chip_validity(const esp_image_header_t* img_hdr, esp_image_type type)
{
esp_err_t err = ESP_OK;
@@ -105,7 +80,7 @@ esp_err_t bootloader_common_check_chip_validity(const esp_image_header_t* img_hd
}
if (type == ESP_IMAGE_APPLICATION) {
unsigned max_rev = img_hdr->max_chip_rev_full;
if ((IS_FIELD_SET(max_rev) && (revision > max_rev) && !efuse_hal_get_disable_wafer_version_major())) {
if ((IS_MAX_REV_SET(max_rev) && (revision > max_rev) && !efuse_hal_get_disable_wafer_version_major())) {
ESP_LOGE(TAG, "Image requires chip rev <= v%d.%d, but chip is v%d.%d",
max_rev / 100, max_rev % 100,
major_rev, minor_rev);

View File

@@ -13,7 +13,7 @@
#include "soc/gpio_periph.h"
#include "soc/gpio_sig_map.h"
#include "soc/rtc.h"
#include "hal/gpio_ll.h"
#include "hal/gpio_hal.h"
#if CONFIG_IDF_TARGET_ESP32S2
#include "esp32s2/rom/usb/cdc_acm.h"
#include "esp32s2/rom/usb/usb_common.h"
@@ -63,17 +63,17 @@ void bootloader_console_init(void)
uart_tx_gpio != UART_NUM_0_TXD_DIRECT_GPIO_NUM ||
uart_rx_gpio != UART_NUM_0_RXD_DIRECT_GPIO_NUM) {
// Change default UART pins back to GPIOs
gpio_ll_func_sel(&GPIO, UART_NUM_0_RXD_DIRECT_GPIO_NUM, PIN_FUNC_GPIO);
gpio_ll_func_sel(&GPIO, UART_NUM_0_TXD_DIRECT_GPIO_NUM, PIN_FUNC_GPIO);
gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[UART_NUM_0_RXD_DIRECT_GPIO_NUM], PIN_FUNC_GPIO);
gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[UART_NUM_0_TXD_DIRECT_GPIO_NUM], PIN_FUNC_GPIO);
// Route GPIO signals to/from pins
const uint32_t tx_idx = UART_PERIPH_SIGNAL(uart_num, SOC_UART_TX_PIN_IDX);
const uint32_t rx_idx = UART_PERIPH_SIGNAL(uart_num, SOC_UART_RX_PIN_IDX);
gpio_ll_func_sel(&GPIO, uart_rx_gpio, PIN_FUNC_GPIO);
gpio_ll_input_enable(&GPIO, uart_rx_gpio);
gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[uart_rx_gpio], PIN_FUNC_GPIO);
PIN_INPUT_ENABLE(GPIO_PIN_MUX_REG[uart_rx_gpio]);
esp_rom_gpio_pad_pullup_only(uart_rx_gpio);
esp_rom_gpio_connect_out_signal(uart_tx_gpio, tx_idx, 0, 0);
esp_rom_gpio_connect_in_signal(uart_rx_gpio, rx_idx, 0);
gpio_ll_func_sel(&GPIO, uart_tx_gpio, PIN_FUNC_GPIO);
gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[uart_tx_gpio], PIN_FUNC_GPIO);
// Enable the peripheral
uart_ll_enable_bus_clock(uart_num, true);
uart_ll_reset_register(uart_num);

View File

@@ -14,6 +14,7 @@
#include "bootloader_random.h"
#include "bootloader_clock.h"
#include "bootloader_common.h"
#include "esp_flash_encrypt.h"
#include "esp_cpu.h"
#include "soc/rtc.h"
#include "hal/wdt_hal.h"
@@ -43,17 +44,10 @@ esp_err_t bootloader_read_bootloader_header(void)
esp_err_t bootloader_check_bootloader_validity(void)
{
unsigned int chip_revision = efuse_hal_chip_revision();
unsigned int chip_major_rev = chip_revision / 100;
unsigned int chip_minor_rev = chip_revision % 100;
ESP_EARLY_LOGI(TAG, "chip revision: v%d.%d", chip_major_rev, chip_minor_rev);
/* ESP32 doesn't have more memory and more efuse bits for block major version. */
#if !CONFIG_IDF_TARGET_ESP32
unsigned int efuse_revision = efuse_hal_blk_version();
unsigned int efuse_major_rev = efuse_revision / 100;
unsigned int efuse_minor_rev = efuse_revision % 100;
ESP_EARLY_LOGI(TAG, "efuse block revision: v%d.%d", efuse_major_rev, efuse_minor_rev);
#endif // !CONFIG_IDF_TARGET_ESP32
unsigned int revision = efuse_hal_chip_revision();
unsigned int major = revision / 100;
unsigned int minor = revision % 100;
ESP_EARLY_LOGI(TAG, "chip revision: v%d.%d", major, minor);
/* compare with the one set in bootloader image header */
if (bootloader_common_check_chip_validity(&bootloader_image_hdr, ESP_IMAGE_BOOTLOADER) != ESP_OK) {
return ESP_FAIL;

View File

@@ -16,7 +16,7 @@
#include "hal/apm_hal.h"
#endif
#if CONFIG_IDF_TARGET_ESP32C5 // TODO: IDF-8615 Remove the workaround when APM supported on C5!
#if CONFIG_IDF_TARGET_ESP32C5_BETA3_VERSION // TODO: IDF-8615 Remove the workaround when APM supported on C5!
#include "soc/hp_apm_reg.h"
#include "soc/lp_apm_reg.h"
#include "soc/lp_apm0_reg.h"
@@ -33,12 +33,10 @@ void bootloader_init_mem(void)
* So, at boot disabling these filters. They will enable as per the
* use case by TEE initialization code.
*/
#ifdef SOC_APM_CTRL_FILTER_SUPPORTED
apm_hal_apm_ctrl_filter_enable_all(false);
#endif
#endif
#if CONFIG_IDF_TARGET_ESP32C5 // TODO: IDF-8615 Remove the workaround when APM supported on C5!
#if CONFIG_IDF_TARGET_ESP32C5_BETA3_VERSION // TODO: IDF-8615 Remove the workaround when APM supported on C5!
// disable apm filter
REG_WRITE(LP_APM_FUNC_CTRL_REG, 0);
REG_WRITE(LP_APM0_FUNC_CTRL_REG, 0);

View File

@@ -53,7 +53,7 @@ void bootloader_random_enable(void)
// create patterns and set them in pattern table
uint32_t pattern_one = (SAR2_CHANNEL << 2) | SAR2_ATTEN; // we want channel 9 with max attenuation
uint32_t pattern_two = (SAR2_CHANNEL << 2) | SAR1_ATTEN; // we want channel 9 with max attenuation
uint32_t pattern_two = SAR1_ATTEN; // we want channel 0 with max attenuation, channel doesn't really matter here
uint32_t pattern_table = 0 | (pattern_two << 3 * PATTERN_BIT_WIDTH) | pattern_one << 2 * PATTERN_BIT_WIDTH;
REG_WRITE(APB_SARADC_SAR_PATT_TAB1_REG, pattern_table);
@@ -88,6 +88,9 @@ void bootloader_random_disable(void)
REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SARADC1_ENCAL_REF_ADDR, 0);
REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SARADC2_ENCAL_REF_ADDR, 0);
// Revert PMU_RF_PWC_REG to it's initial value
CLEAR_PERI_REG_MASK(PMU_RF_PWC_REG, PMU_PERIF_I2C_RSTB);
// disable ADC_CTRL_CLK (SAR ADC function clock)
REG_WRITE(PCR_SARADC_CLKM_CONF_REG, 0x00404000);

View File

@@ -9,7 +9,7 @@
#include "soc/pmu_reg.h"
#include "soc/regi2c_saradc.h"
#include "soc/hp_sys_clkrst_reg.h"
#include "soc/lp_adc_reg.h"
#include "soc/rtcadc_reg.h"
#include "esp_private/regi2c_ctrl.h"
#include "esp_rom_regi2c.h"

View File

@@ -25,7 +25,6 @@
#include "soc/rtc_periph.h"
#include "soc/timer_periph.h"
#include "hal/mmu_hal.h"
#include "hal/mmu_ll.h"
#include "hal/cache_types.h"
#include "hal/cache_ll.h"
#include "hal/cache_hal.h"
@@ -35,9 +34,6 @@
#include "esp_app_desc.h"
#include "esp_secure_boot.h"
#include "esp_flash_encrypt.h"
#ifndef BOOTLOADER_BUILD
#include "spi_flash_mmap.h"
#endif
#include "esp_flash_partitions.h"
#include "bootloader_flash_priv.h"
#include "bootloader_random.h"
@@ -47,7 +43,6 @@
#include "bootloader_sha.h"
#include "bootloader_console.h"
#include "bootloader_soc.h"
#include "bootloader_memory_utils.h"
#include "esp_efuse.h"
#include "esp_fault.h"
@@ -720,20 +715,10 @@ static void unpack_load_app(const esp_image_metadata_t *data)
// Find DROM & IROM addresses, to configure MMU mappings
for (int i = 0; i < data->image.segment_count; i++) {
const esp_image_segment_header_t *header = &data->segments[i];
bool text_or_rodata = false;
//`SOC_DROM_LOW` and `SOC_DROM_HIGH` are the same as `SOC_IROM_LOW` and `SOC_IROM_HIGH`, reasons are in above `note`
if (header->load_addr >= SOC_DROM_LOW && header->load_addr < SOC_DROM_HIGH) {
text_or_rodata = true;
}
#if SOC_MMU_PER_EXT_MEM_TARGET
if (header->load_addr >= SOC_EXTRAM_LOW && header->load_addr < SOC_EXTRAM_HIGH) {
text_or_rodata = true;
}
#endif
if (text_or_rodata) {
/**
* D/I are shared, but there should not be a third segment on flash/psram
* D/I are shared, but there should not be a third segment on flash
*/
assert(rom_index < 2);
rom_addr[rom_index] = data->segment_data[i];
@@ -800,20 +785,6 @@ static void unpack_load_app(const esp_image_metadata_t *data)
}
#endif //#if SOC_MMU_DI_VADDR_SHARED
//unused for esp32
__attribute__((unused))
static bool s_flash_seg_needs_map(uint32_t vaddr)
{
#if SOC_MMU_PER_EXT_MEM_TARGET
//For these chips, segments on PSRAM will be mapped in app
bool is_psram = esp_ptr_in_extram((void *)vaddr);
return !is_psram;
#else
//For these chips, segments on Flash always need to be mapped
return true;
#endif
}
static void set_cache_and_start_app(
uint32_t drom_addr,
uint32_t drom_load_addr,
@@ -851,13 +822,8 @@ static void set_cache_and_start_app(
ESP_EARLY_LOGV(TAG, "after mapping rodata, starting from paddr=0x%08" PRIx32 " and vaddr=0x%08" PRIx32 ", 0x%" PRIx32 " bytes are mapped", drom_addr_aligned, drom_load_addr_aligned, drom_page_count * SPI_FLASH_MMU_PAGE_SIZE);
#else
uint32_t actual_mapped_len = 0;
if (s_flash_seg_needs_map(drom_load_addr_aligned)) {
mmu_hal_map_region(0, MMU_TARGET_FLASH0, drom_load_addr_aligned, drom_addr_aligned, drom_size, &actual_mapped_len);
ESP_EARLY_LOGV(TAG, "after mapping rodata, starting from paddr=0x%08" PRIx32 " and vaddr=0x%08" PRIx32 ", 0x%" PRIx32 " bytes are mapped", drom_addr_aligned, drom_load_addr_aligned, actual_mapped_len);
}
//we use the MMU_LL_END_DROM_ENTRY_ID mmu entry as a map page for app to find the boot partition
mmu_hal_map_region(0, MMU_TARGET_FLASH0, MMU_LL_END_DROM_ENTRY_VADDR, drom_addr_aligned, CONFIG_MMU_PAGE_SIZE, &actual_mapped_len);
ESP_EARLY_LOGV(TAG, "mapped one page of the rodata, from paddr=0x%08" PRIx32 " and vaddr=0x%08" PRIx32 ", 0x%" PRIx32 " bytes are mapped", drom_addr_aligned, drom_load_addr_aligned, actual_mapped_len);
mmu_hal_map_region(0, MMU_TARGET_FLASH0, drom_load_addr_aligned, drom_addr_aligned, drom_size, &actual_mapped_len);
ESP_EARLY_LOGV(TAG, "after mapping rodata, starting from paddr=0x%08" PRIx32 " and vaddr=0x%08" PRIx32 ", 0x%" PRIx32 " bytes are mapped", drom_addr_aligned, drom_load_addr_aligned, actual_mapped_len);
#endif
//-----------------------MAP IROM--------------------------
@@ -874,10 +840,8 @@ static void set_cache_and_start_app(
ESP_LOGV(TAG, "rc=%d", rc);
ESP_EARLY_LOGV(TAG, "after mapping text, starting from paddr=0x%08" PRIx32 " and vaddr=0x%08" PRIx32 ", 0x%" PRIx32 " bytes are mapped", irom_addr_aligned, irom_load_addr_aligned, irom_page_count * SPI_FLASH_MMU_PAGE_SIZE);
#else
if (s_flash_seg_needs_map(irom_load_addr_aligned)) {
mmu_hal_map_region(0, MMU_TARGET_FLASH0, irom_load_addr_aligned, irom_addr_aligned, irom_size, &actual_mapped_len);
ESP_EARLY_LOGV(TAG, "after mapping text, starting from paddr=0x%08" PRIx32 " and vaddr=0x%08" PRIx32 ", 0x%" PRIx32 " bytes are mapped", irom_addr_aligned, irom_load_addr_aligned, actual_mapped_len);
}
mmu_hal_map_region(0, MMU_TARGET_FLASH0, irom_load_addr_aligned, irom_addr_aligned, irom_size, &actual_mapped_len);
ESP_EARLY_LOGV(TAG, "after mapping text, starting from paddr=0x%08" PRIx32 " and vaddr=0x%08" PRIx32 ", 0x%" PRIx32 " bytes are mapped", irom_addr_aligned, irom_load_addr_aligned, actual_mapped_len);
#endif
//----------------------Enable corresponding buses----------------

View File

@@ -91,8 +91,6 @@ static inline void bootloader_hardware_init(void)
SET_PERI_REG_MASK(PMU_RF_PWC_REG, PMU_XPD_FORCE_RFPLL);
/* Enable analog i2c master clock */
SET_PERI_REG_MASK(MODEM_LPCON_CLK_CONF_REG, MODEM_LPCON_CLK_I2C_MST_EN);
REGI2C_WRITE_MASK(I2C_BIAS, I2C_BIAS_DREG_0P8, 8); // fix low temp issue, need to increase this internal voltage
}
static inline void bootloader_ana_reset_config(void)
@@ -162,7 +160,7 @@ esp_err_t bootloader_init(void)
}
#endif // !CONFIG_APP_BUILD_TYPE_RAM
// check whether a WDT reset happened
// check whether a WDT reset happend
bootloader_check_wdt_reset();
// config WDT
bootloader_config_wdt();

View File

@@ -1,18 +1,15 @@
/*
* SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <stdint.h>
#include <strings.h>
#include "esp_flash_encrypt.h"
#include "esp_secure_boot.h"
#include "esp_efuse.h"
#include "esp_efuse_table.h"
#include "esp_log.h"
#include "hal/spi_flash_encrypted_ll.h"
#include "soc/soc_caps.h"
#include "sdkconfig.h"
static __attribute__((unused)) const char *TAG = "flash_encrypt";
@@ -36,14 +33,6 @@ esp_err_t esp_flash_encryption_enable_secure_features(void)
esp_efuse_write_field_bit(ESP_EFUSE_DIS_DIRECT_BOOT);
#if defined(CONFIG_SECURE_FLASH_ENCRYPTION_MODE_RELEASE) && defined(SOC_FLASH_ENCRYPTION_XTS_AES_SUPPORT_PSEUDO_ROUND)
if (spi_flash_encrypt_ll_is_pseudo_rounds_function_supported()) {
ESP_LOGI(TAG, "Enable XTS-AES pseudo rounds function...");
uint8_t xts_pseudo_level = CONFIG_SECURE_FLASH_PSEUDO_ROUND_FUNC_STRENGTH;
esp_efuse_write_field_blob(ESP_EFUSE_XTS_DPA_PSEUDO_LEVEL, &xts_pseudo_level, ESP_EFUSE_XTS_DPA_PSEUDO_LEVEL[0]->bit_count);
}
#endif
#if defined(CONFIG_SECURE_BOOT_V2_ENABLED) && !defined(CONFIG_SECURE_BOOT_V2_ALLOW_EFUSE_RD_DIS)
// This bit is set when enabling Secure Boot V2, but we can't enable it until this later point in the first boot
// otherwise the Flash Encryption key cannot be read protected

View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -29,7 +29,6 @@
#include "bootloader_flash_config.h"
#include "bootloader_mem.h"
#include "esp_private/regi2c_ctrl.h"
#include "soc/chip_revision.h"
#include "soc/regi2c_lp_bias.h"
#include "soc/regi2c_bias.h"
#include "bootloader_console.h"
@@ -41,13 +40,11 @@
#include "hal/cache_hal.h"
#include "hal/clk_tree_ll.h"
#include "hal/lpwdt_ll.h"
#include "hal/spimem_flash_ll.h"
#include "soc/lp_wdt_reg.h"
#include "hal/efuse_hal.h"
#include "soc/regi2c_syspll.h"
#include "soc/regi2c_cpll.h"
#include "soc/regi2c_bias.h"
#include "esp_private/periph_ctrl.h"
static const char *TAG = "boot.esp32p4";
@@ -92,24 +89,17 @@ static void bootloader_super_wdt_auto_feed(void)
static inline void bootloader_hardware_init(void)
{
int __DECLARE_RCC_ATOMIC_ENV __attribute__ ((unused));
// regi2c is enabled by default on ESP32P4, do nothing
unsigned chip_version = efuse_hal_chip_revision();
if (!ESP_CHIP_REV_ABOVE(chip_version, 1)) {
// On ESP32P4 ECO0, the default (power on reset) CPLL and SPLL frequencies are very high, lower them to avoid bias may not be enough in bootloader
// And we are fixing SPLL to be 480MHz after app is up
REGI2C_WRITE_MASK(I2C_CPLL, I2C_CPLL_OC_DIV_7_0, 6); // lower default cpu_pll freq to 400M
REGI2C_WRITE_MASK(I2C_SYSPLL, I2C_SYSPLL_OC_DIV_7_0, 8); // lower default sys_pll freq to 480M
esp_rom_delay_us(100);
}
// On ESP32P4 ECO0, the default (power on reset) CPLL and SPLL frequencies are very high, lower them to avoid bias may not be enough in bootloader
// And we are fixing SPLL to be 480MHz at all runtime
// Suppose to fix the issue on ECO1, will check when chip comes back
// TODO: IDF-8939
REGI2C_WRITE_MASK(I2C_CPLL, I2C_CPLL_OC_DIV_7_0, 6); // lower default cpu_pll freq to 400M
REGI2C_WRITE_MASK(I2C_SYSPLL, I2C_SYSPLL_OC_DIV_7_0, 8); // lower default sys_pll freq to 480M
esp_rom_delay_us(100);
REGI2C_WRITE_MASK(I2C_BIAS, I2C_BIAS_DREG_1P1, 10);
REGI2C_WRITE_MASK(I2C_BIAS, I2C_BIAS_DREG_1P1_PVT, 10);
// IDF-10019 TODO: This is temporarily for ESP32P4-ECO0, please remove it when eco0 is not widly used.
if (likely(ESP_CHIP_REV_ABOVE(chip_version, 1))) {
spimem_flash_ll_select_clk_source(0, FLASH_CLK_SRC_SPLL);
spimem_ctrlr_ll_set_core_clock(0, 6);
}
}
static inline void bootloader_ana_reset_config(void)
@@ -180,7 +170,7 @@ esp_err_t bootloader_init(void)
}
#endif // !CONFIG_APP_BUILD_TYPE_RAM
// check whether a WDT reset happened
// check whether a WDT reset happend
bootloader_check_wdt_reset();
// config WDT
bootloader_config_wdt();

View File

@@ -1,12 +1,9 @@
/*
* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <stdbool.h>
#include "soc/lp_analog_peri_reg.h"
#include "soc/soc.h"
#include "hal/brownout_ll.h"
void bootloader_ana_super_wdt_reset_config(bool enable)
{
@@ -15,9 +12,7 @@ void bootloader_ana_super_wdt_reset_config(bool enable)
void bootloader_ana_bod_reset_config(bool enable)
{
REG_CLR_BIT(LP_ANALOG_PERI_FIB_ENABLE_REG, LP_ANALOG_PERI_LP_ANA_FIB_BOD_RST);
brownout_ll_ana_reset_enable(enable);
//TODO: IDF-7514
}
void bootloader_ana_clock_glitch_reset_config(bool enable)

View File

@@ -691,28 +691,19 @@ static esp_err_t process_segment_data(int segment, intptr_t load_addr, uint32_t
const uint32_t *src = data;
#if CONFIG_BOOTLOADER_APP_ANTI_ROLLBACK
// Case I: Bootloader verifying application
// Case II: Bootloader verifying bootloader
// The esp_app_desc_t structure is located in DROM and is always in segment #0.
// Anti-rollback check and efuse block version check should handle only Case I from above.
// Anti-rollback check should handle only Case I from above.
if (segment == 0 && metadata->start_addr != ESP_BOOTLOADER_OFFSET) {
/* ESP32 doesn't have more memory and more efuse bits for block major version. */
#if !CONFIG_IDF_TARGET_ESP32
const esp_app_desc_t *app_desc = (const esp_app_desc_t *)src;
esp_err_t ret = bootloader_common_check_efuse_blk_validity(app_desc->min_efuse_blk_rev_full, app_desc->max_efuse_blk_rev_full);
if (ret != ESP_OK) {
bootloader_munmap(data);
return ret;
}
#endif // !CONFIG_IDF_TARGET_ESP32
#if CONFIG_BOOTLOADER_APP_ANTI_ROLLBACK
ESP_LOGD(TAG, "additional anti-rollback check 0x%"PRIx32, data_addr);
// The esp_app_desc_t structure is located in DROM and is always in segment #0.
size_t len = process_esp_app_desc_data(src, sha_handle, checksum, metadata);
data_len -= len;
src += len / 4;
// In BOOTLOADER_BUILD, for DROM (segment #0) we do not load it into dest (only map it), do_load = false.
#endif // CONFIG_BOOTLOADER_APP_ANTI_ROLLBACK
}
#endif // CONFIG_BOOTLOADER_APP_ANTI_ROLLBACK
for (size_t i = 0; i < data_len; i += 4) {
int w_i = i / 4; // Word index
@@ -780,14 +771,8 @@ static esp_err_t verify_segment_header(int index, const esp_image_segment_header
static bool should_map(uint32_t load_addr)
{
bool is_irom = (load_addr >= SOC_IROM_LOW) && (load_addr < SOC_IROM_HIGH);
bool is_drom = (load_addr >= SOC_DROM_LOW) && (load_addr < SOC_DROM_HIGH);
bool is_psram = false;
#if SOC_MMU_PER_EXT_MEM_TARGET
is_psram = (load_addr >= SOC_EXTRAM_LOW) && (load_addr < SOC_EXTRAM_HIGH);
#endif
return (is_irom || is_drom || is_psram);
return (load_addr >= SOC_IROM_LOW && load_addr < SOC_IROM_HIGH)
|| (load_addr >= SOC_DROM_LOW && load_addr < SOC_DROM_HIGH);
}
static bool should_load(uint32_t load_addr)
@@ -872,7 +857,7 @@ static esp_err_t process_appended_hash_and_sig(esp_image_metadata_t *data, uint3
// Case I: Bootloader part
if (part_offset == ESP_BOOTLOADER_OFFSET) {
// For bootloader with secure boot v1, signature stays in an independent flash
// For bootloader with secure boot v1, signature stays in an independant flash
// sector (offset 0x0) and does not get appended to the image.
#if CONFIG_SECURE_BOOT_V2_ENABLED
// Sanity check - secure boot v2 signature block starts on 4K boundary

View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -12,9 +12,6 @@
#include "esp_flash_encrypt.h"
#include "esp_secure_boot.h"
#include "hal/efuse_hal.h"
#include "hal/spi_flash_encrypted_ll.h"
#include "hal/spi_flash_encrypt_hal.h"
#include "soc/soc_caps.h"
//TODO:[ESP32C61] IDf-9232
@@ -212,13 +209,6 @@ void esp_flash_encryption_set_release_mode(void)
#endif // CONFIG_SOC_FLASH_ENCRYPTION_XTS_AES_128_DERIVED
#endif // !CONFIG_IDF_TARGET_ESP32
#ifdef SOC_FLASH_ENCRYPTION_XTS_AES_SUPPORT_PSEUDO_ROUND
if (spi_flash_encrypt_ll_is_pseudo_rounds_function_supported()) {
uint8_t xts_pseudo_level = ESP_XTS_AES_PSEUDO_ROUNDS_LOW;
esp_efuse_write_field_blob(ESP_EFUSE_XTS_DPA_PSEUDO_LEVEL, &xts_pseudo_level, ESP_EFUSE_XTS_DPA_PSEUDO_LEVEL[0]->bit_count);
}
#endif
#ifdef CONFIG_IDF_TARGET_ESP32
esp_efuse_write_field_bit(ESP_EFUSE_WR_DIS_DIS_CACHE);
#else
@@ -463,17 +453,6 @@ bool esp_flash_encryption_cfg_verify_release_mode(void)
}
result &= secure;
#if SOC_FLASH_ENCRYPTION_XTS_AES_SUPPORT_PSEUDO_ROUND
if (spi_flash_encrypt_ll_is_pseudo_rounds_function_supported()) {
uint8_t xts_pseudo_level = 0;
esp_efuse_read_field_blob(ESP_EFUSE_XTS_DPA_PSEUDO_LEVEL, &xts_pseudo_level, ESP_EFUSE_XTS_DPA_PSEUDO_LEVEL[0]->bit_count);
if (!xts_pseudo_level) {
result &= false;
ESP_LOGW(TAG, "Not enabled XTS-AES pseudo rounds function (set XTS_DPA_PSEUDO_LEVEL->1 or more)");
}
}
#endif
return result;
}
#endif // not CONFIG_IDF_TARGET_ESP32

View File

@@ -16,15 +16,10 @@
#include "esp_log.h"
#include "hal/wdt_hal.h"
#if SOC_KEY_MANAGER_FE_KEY_DEPLOY || CONFIG_IDF_TARGET_ESP32C5
#if CONFIG_IDF_TARGET_ESP32C5
#if SOC_KEY_MANAGER_SUPPORTED
#include "hal/key_mgr_hal.h"
#include "soc/keymng_reg.h"
#include "soc/pcr_reg.h"
#else /* CONFIG_IDF_TARGET_ESP32C5 */
#include "hal/key_mgr_ll.h"
#include "hal/mspi_timing_tuning_ll.h"
#endif /* !CONFIG_IDF_TARGET_ESP32C5 */
#endif /* SOC_KEY_MANAGER_FE_KEY_DEPLOY */
#endif
#ifdef CONFIG_SOC_EFUSE_CONSISTS_OF_ONE_KEY_BLOCK
#include "soc/sensitive_reg.h"
@@ -221,25 +216,11 @@ static esp_err_t check_and_generate_encryption_keys(void)
ESP_LOGI(TAG, "Using pre-loaded flash encryption key in efuse");
}
#if SOC_KEY_MANAGER_FE_KEY_DEPLOY || CONFIG_IDF_TARGET_ESP32C5
#if CONFIG_IDF_TARGET_ESP32C5
REG_SET_FIELD(KEYMNG_STATIC_REG, KEYMNG_USE_EFUSE_KEY, 2);
REG_SET_BIT(PCR_MSPI_CLK_CONF_REG, PCR_MSPI_AXI_RST_EN);
REG_CLR_BIT(PCR_MSPI_CLK_CONF_REG, PCR_MSPI_AXI_RST_EN);
#else /* CONFIG_IDF_TARGET_ESP32C5 */
// Enable and reset key manager
// To suppress build errors about spinlock's __DECLARE_RCC_ATOMIC_ENV
int __DECLARE_RCC_ATOMIC_ENV __attribute__ ((unused));
key_mgr_ll_enable_bus_clock(true);
key_mgr_ll_enable_peripheral_clock(true);
key_mgr_ll_reset_register();
while (key_mgr_ll_get_state() != ESP_KEY_MGR_STATE_IDLE) {
};
#if SOC_KEY_MANAGER_SUPPORTED
// Force Key Manager to use eFuse key for XTS-AES operation
key_mgr_ll_set_key_usage(ESP_KEY_MGR_XTS_AES_128_KEY, ESP_KEY_MGR_USE_EFUSE_KEY);
_mspi_timing_ll_reset_mspi();
#endif /* !CONFIG_IDF_TARGET_ESP32C5 */
#endif /* SOC_KEY_MANAGER_FE_KEY_DEPLOY */
key_mgr_hal_set_key_usage(ESP_KEY_MGR_XTS_AES_128_KEY, ESP_KEY_MGR_USE_EFUSE_KEY);
#endif
return ESP_OK;
}
@@ -282,6 +263,13 @@ esp_err_t esp_flash_encrypt_contents(void)
esp_partition_info_t partition_table[ESP_PARTITION_TABLE_MAX_ENTRIES];
int num_partitions;
#if CONFIG_IDF_TARGET_ESP32C5 && SOC_KEY_MANAGER_SUPPORTED
// TODO: [ESP32C5] IDF-8622 find a more proper place for these codes
REG_SET_BIT(KEYMNG_STATIC_REG, KEYMNG_USE_EFUSE_KEY_FLASH);
REG_SET_BIT(PCR_MSPI_CLK_CONF_REG, PCR_MSPI_AXI_RST_EN);
REG_CLR_BIT(PCR_MSPI_CLK_CONF_REG, PCR_MSPI_AXI_RST_EN);
#endif
#ifdef CONFIG_SOC_EFUSE_CONSISTS_OF_ONE_KEY_BLOCK
REG_WRITE(SENSITIVE_XTS_AES_KEY_UPDATE_REG, 1);
#endif
@@ -433,7 +421,7 @@ static esp_err_t encrypt_partition(int index, const esp_partition_info_t *partit
&partition->pos,
&image_data);
should_encrypt = (err == ESP_OK);
#ifdef CONFIG_SECURE_FLASH_ENCRYPT_ONLY_IMAGE_LEN_IN_APP_PART
#ifdef SECURE_FLASH_ENCRYPT_ONLY_IMAGE_LEN_IN_APP_PART
if (should_encrypt) {
// Encrypt only the app image instead of encrypting the whole partition
size = image_data.image_len;

View File

@@ -5,6 +5,6 @@ components/bootloader_support/test_apps/rtc_custom_section:
- if: SOC_RTC_MEM_SUPPORTED == 1
reason: this feature is supported on chips that have RTC memory
disable:
- if: IDF_TARGET in ["esp32c5", "esp32c61"]
- if: IDF_TARGET == "esp32c61"
temporary: true
reason: target(s) is not supported yet # IDF-9260
reason: IDF-9260

View File

@@ -1,2 +1,2 @@
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- |
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- |

View File

@@ -34,7 +34,6 @@ set(common_include_dirs
common/btc/profile/esp/blufi/include
common/btc/profile/esp/include
common/hci_log/include
common/ble_log/include
)
set(ble_mesh_include_dirs
@@ -50,20 +49,12 @@ set(ble_mesh_include_dirs
"esp_ble_mesh/api/core/include"
"esp_ble_mesh/api/models/include"
"esp_ble_mesh/api"
)
set(ble_mesh_v11_include_dirs
"esp_ble_mesh/lib/include"
"esp_ble_mesh/v1.1/api/core/include"
"esp_ble_mesh/v1.1/api/models/include"
"esp_ble_mesh/v1.1/btc/include"
)
if(CONFIG_IDF_DOC_BUILD)
list(APPEND ble_mesh_include_dirs
${ble_mesh_v11_include_dirs})
endif()
set(bluedroid_include_dirs host/bluedroid/api/include/api)
if(CONFIG_BT_CONTROLLER_ENABLED OR CONFIG_IDF_DOC_BUILD)
@@ -100,20 +91,14 @@ if(CONFIG_BT_ENABLED)
list(APPEND ldscripts "linker_rw_bt_controller.lf")
elseif(CONFIG_IDF_TARGET_ESP32C2)
list(APPEND srcs "controller/esp32c2/bt.c"
"controller/esp32c2/ble.c")
if(CONFIG_BT_CTRL_RUN_IN_FLASH_ONLY)
list(APPEND srcs "controller/esp32c2/dummy.c")
endif()
list(APPEND srcs "controller/esp32c2/bt.c")
set(ldscripts "linker_esp32c2.lf")
elseif(CONFIG_IDF_TARGET_ESP32C6)
list(APPEND srcs "controller/esp32c6/ble.c")
list(APPEND srcs "controller/esp32c6/bt.c")
list(APPEND ldscripts "linker_esp_ble_controller.lf")
elseif(CONFIG_IDF_TARGET_ESP32H2)
list(APPEND srcs "controller/esp32h2/ble.c")
list(APPEND srcs "controller/esp32h2/bt.c")
list(APPEND ldscripts "linker_esp_ble_controller.lf")
@@ -132,7 +117,6 @@ if(CONFIG_BT_ENABLED)
common/btc/include
common/include
porting/mem/
porting/include
)
list(APPEND include_dirs ${common_include_dirs})
@@ -159,7 +143,6 @@ if(CONFIG_BT_ENABLED)
"common/osi/osi.c"
"common/osi/semaphore.c"
"porting/mem/bt_osi_mem.c"
"common/ble_log/ble_log_spi_out.c"
)
# Host Bluedroid
@@ -556,93 +539,65 @@ if(CONFIG_BT_ENABLED)
"esp_ble_mesh/models/server/server_common.c"
"esp_ble_mesh/models/server/state_binding.c"
"esp_ble_mesh/models/server/state_transition.c"
"esp_ble_mesh/models/server/time_scene_server.c")
if(CONFIG_BLE_MESH_V11_SUPPORT)
list(APPEND include_dirs ${ble_mesh_v11_include_dirs})
"esp_ble_mesh/models/server/time_scene_server.c"
"esp_ble_mesh/v1.1/api/core/esp_ble_mesh_agg_model_api.c"
"esp_ble_mesh/v1.1/api/core/esp_ble_mesh_brc_model_api.c"
"esp_ble_mesh/v1.1/api/core/esp_ble_mesh_cm_data_api.c"
"esp_ble_mesh/v1.1/api/core/esp_ble_mesh_df_model_api.c"
"esp_ble_mesh/v1.1/api/core/esp_ble_mesh_lcd_model_api.c"
"esp_ble_mesh/v1.1/api/core/esp_ble_mesh_odp_model_api.c"
"esp_ble_mesh/v1.1/api/core/esp_ble_mesh_prb_model_api.c"
"esp_ble_mesh/v1.1/api/core/esp_ble_mesh_rpr_model_api.c"
"esp_ble_mesh/v1.1/api/core/esp_ble_mesh_sar_model_api.c"
"esp_ble_mesh/v1.1/api/core/esp_ble_mesh_srpl_model_api.c"
"esp_ble_mesh/v1.1/api/models/esp_ble_mesh_mbt_model_api.c"
"esp_ble_mesh/v1.1/btc/btc_ble_mesh_agg_model.c"
"esp_ble_mesh/v1.1/btc/btc_ble_mesh_brc_model.c"
"esp_ble_mesh/v1.1/btc/btc_ble_mesh_df_model.c"
"esp_ble_mesh/v1.1/btc/btc_ble_mesh_lcd_model.c"
"esp_ble_mesh/v1.1/btc/btc_ble_mesh_mbt_model.c"
"esp_ble_mesh/v1.1/btc/btc_ble_mesh_odp_model.c"
"esp_ble_mesh/v1.1/btc/btc_ble_mesh_prb_model.c"
"esp_ble_mesh/v1.1/btc/btc_ble_mesh_rpr_model.c"
"esp_ble_mesh/v1.1/btc/btc_ble_mesh_sar_model.c"
"esp_ble_mesh/v1.1/btc/btc_ble_mesh_srpl_model.c"
"esp_ble_mesh/lib/ext.c")
list(APPEND srcs
"esp_ble_mesh/v1.1/api/core/esp_ble_mesh_agg_model_api.c"
"esp_ble_mesh/v1.1/api/core/esp_ble_mesh_brc_model_api.c"
"esp_ble_mesh/v1.1/api/core/esp_ble_mesh_cm_data_api.c"
"esp_ble_mesh/v1.1/api/core/esp_ble_mesh_df_model_api.c"
"esp_ble_mesh/v1.1/api/core/esp_ble_mesh_lcd_model_api.c"
"esp_ble_mesh/v1.1/api/core/esp_ble_mesh_odp_model_api.c"
"esp_ble_mesh/v1.1/api/core/esp_ble_mesh_prb_model_api.c"
"esp_ble_mesh/v1.1/api/core/esp_ble_mesh_rpr_model_api.c"
"esp_ble_mesh/v1.1/api/core/esp_ble_mesh_sar_model_api.c"
"esp_ble_mesh/v1.1/api/core/esp_ble_mesh_srpl_model_api.c"
"esp_ble_mesh/v1.1/api/models/esp_ble_mesh_mbt_model_api.c"
"esp_ble_mesh/v1.1/btc/btc_ble_mesh_agg_model.c"
"esp_ble_mesh/v1.1/btc/btc_ble_mesh_brc_model.c"
"esp_ble_mesh/v1.1/btc/btc_ble_mesh_df_model.c"
"esp_ble_mesh/v1.1/btc/btc_ble_mesh_lcd_model.c"
"esp_ble_mesh/v1.1/btc/btc_ble_mesh_mbt_model.c"
"esp_ble_mesh/v1.1/btc/btc_ble_mesh_odp_model.c"
"esp_ble_mesh/v1.1/btc/btc_ble_mesh_prb_model.c"
"esp_ble_mesh/v1.1/btc/btc_ble_mesh_rpr_model.c"
"esp_ble_mesh/v1.1/btc/btc_ble_mesh_sar_model.c"
"esp_ble_mesh/v1.1/btc/btc_ble_mesh_srpl_model.c"
"esp_ble_mesh/lib/ext.c")
if(CONFIG_BLE_MESH_SAR_ENHANCEMENT)
list(APPEND srcs "esp_ble_mesh/core/transport.enh.c")
else()
list(APPEND srcs "esp_ble_mesh/core/transport.c")
endif()
if(CONFIG_BLE_MESH_SAR_ENHANCEMENT)
list(APPEND srcs "esp_ble_mesh/core/transport.enh.c")
else()
list(APPEND srcs
"esp_ble_mesh/core/transport.c")
list(APPEND srcs "esp_ble_mesh/core/transport.c")
endif()
endif()
if(CONFIG_BT_LE_CONTROLLER_NPL_OS_PORTING_SUPPORT)
list(APPEND srcs
"porting/npl/freertos/src/npl_os_freertos.c"
"porting/mem/os_msys_init.c"
"porting/transport/src/hci_transport.c"
)
if(CONFIG_BT_CONTROLLER_DISABLED)
list(APPEND srcs
"host/nimble/nimble/porting/nimble/src/hal_uart.c"
"porting/npl/freertos/src/npl_os_freertos.c"
"porting/nimble/src/os_msys_init.c"
)
elseif(CONFIG_BT_LE_HCI_INTERFACE_USE_RAM)
if(CONFIG_BT_NIMBLE_ENABLED)
list(APPEND srcs
"porting/transport/driver/vhci/hci_driver_nimble.c"
"host/nimble/nimble/nimble/transport/esp_ipc/src/hci_esp_ipc.c"
)
else()
list(APPEND srcs
"porting/transport/driver/vhci/hci_driver_standard.c"
)
endif()
elseif(CONFIG_BT_LE_HCI_INTERFACE_USE_UART)
list(APPEND srcs
"porting/transport/driver/common/hci_driver_util.c"
"porting/transport/driver/common/hci_driver_h4.c"
"porting/transport/driver/common/hci_driver_mem.c"
"porting/transport/driver/uart/hci_driver_uart_config.c"
)
if(CONFIG_BT_LE_UART_HCI_DMA_MODE)
list(APPEND srcs
"porting/transport/driver/uart/hci_driver_uart_dma.c"
)
else()
list(APPEND srcs
"porting/transport/driver/uart/hci_driver_uart.c"
)
endif()
endif()
list(APPEND include_dirs
porting/include
porting/npl/freertos/include
porting/transport/include
)
if(CONFIG_BT_CONTROLLER_DISABLED)
list(APPEND srcs
"host/nimble/nimble/porting/nimble/src/hal_uart.c"
)
endif()
list(APPEND include_dirs
porting/include
porting/nimble/include
porting/npl/freertos/include
porting/transport/include
)
if(CONFIG_BT_LE_HCI_INTERFACE_USE_UART)
list(APPEND srcs
"porting/transport/uart/hci_uart.c"
)
endif()
endif()
if(NOT (CONFIG_BT_LE_CRYPTO_STACK_MBEDTLS OR CONFIG_BT_NIMBLE_CRYPTO_STACK_MBEDTLS))
list(APPEND include_dirs
porting/ext/tinycrypt/include
@@ -667,6 +622,7 @@ if(CONFIG_BT_ENABLED)
if(CONFIG_BT_NIMBLE_ENABLED)
list(APPEND include_dirs
host/nimble/nimble/nimble/host/include
host/nimble/nimble/nimble/include
host/nimble/nimble/nimble/host/services/ans/include
@@ -684,7 +640,6 @@ if(CONFIG_BT_ENABLED)
host/nimble/nimble/nimble/host/services/tps/include
host/nimble/nimble/nimble/host/services/hid/include
host/nimble/nimble/nimble/host/services/sps/include
host/nimble/nimble/nimble/host/services/cte/include
host/nimble/nimble/nimble/host/util/include
host/nimble/nimble/nimble/host/store/ram/include
host/nimble/nimble/nimble/host/store/config/include
@@ -707,7 +662,6 @@ if(CONFIG_BT_ENABLED)
"host/nimble/nimble/nimble/host/services/cts/src/ble_svc_cts.c"
"host/nimble/nimble/nimble/host/services/hid/src/ble_svc_hid.c"
"host/nimble/nimble/nimble/host/services/sps/src/ble_svc_sps.c"
"host/nimble/nimble/nimble/host/services/cte/src/ble_svc_cte.c"
"host/nimble/nimble/nimble/host/src/ble_hs_conn.c"
"host/nimble/nimble/nimble/host/src/ble_store_util.c"
"host/nimble/nimble/nimble/host/src/ble_sm.c"
@@ -758,7 +712,6 @@ if(CONFIG_BT_ENABLED)
"host/nimble/nimble/nimble/host/store/config/src/ble_store_nvs.c"
"host/nimble/nimble/nimble/host/src/ble_gattc_cache.c"
"host/nimble/nimble/nimble/host/src/ble_gattc_cache_conn.c"
"host/nimble/nimble/nimble/host/src/ble_eatt.c"
)
if(CONFIG_BT_CONTROLLER_DISABLED AND CONFIG_BT_NIMBLE_TRANSPORT_UART)
@@ -773,12 +726,11 @@ if(CONFIG_BT_ENABLED)
"host/nimble/nimble/porting/npl/freertos/src/nimble_port_freertos.c"
"host/nimble/port/src/nvs_port.c"
)
list(APPEND include_dirs
porting/include
host/nimble/nimble/porting/nimble/include
host/nimble/port/include
host/nimble/nimble/nimble/transport/include
host/nimble/nimble/nimble/include
)
if(CONFIG_BT_CONTROLLER_DISABLED)
@@ -804,15 +756,15 @@ if(CONFIG_BT_ENABLED)
endif()
list(APPEND include_dirs
porting/include
host/nimble/nimble/porting/npl/freertos/include
host/nimble/nimble/porting/nimble/include
host/nimble/nimble/nimble/include
)
endif()
if(CONFIG_BT_NIMBLE_LEGACY_VHCI_ENABLE AND CONFIG_BT_CONTROLLER_ENABLED)
list(APPEND srcs
"host/nimble/esp-hci/src/esp_nimble_hci.c"
"host/nimble/nimble/nimble/transport/esp_ipc_legacy/src/hci_esp_ipc_legacy.c"
)
list(APPEND include_dirs ${nimble_hci_include_dirs})
endif()
@@ -873,27 +825,11 @@ if(CONFIG_BT_ENABLED)
endif()
set(bt_priv_requires
nvs_flash
soc
esp_pm
esp_phy
esp_coex
mbedtls
esp_driver_uart
vfs
esp_ringbuf
esp_driver_spi
esp_driver_gpio
esp_gdbstub
)
idf_component_register(SRCS "${srcs}"
INCLUDE_DIRS "${include_dirs}"
PRIV_INCLUDE_DIRS "${priv_include_dirs}"
REQUIRES esp_timer esp_wifi
PRIV_REQUIRES "${bt_priv_requires}"
PRIV_REQUIRES nvs_flash soc esp_pm esp_phy esp_coex mbedtls esp_driver_uart vfs esp_ringbuf
LDFRAGMENTS "${ldscripts}")
if(CONFIG_BT_ENABLED)
@@ -906,32 +842,13 @@ if(CONFIG_BT_ENABLED)
elseif(CONFIG_IDF_TARGET_ESP32C3)
target_link_directories(${COMPONENT_LIB} INTERFACE
"${CMAKE_CURRENT_LIST_DIR}/controller/lib_esp32c3_family/esp32c3")
if(CONFIG_BT_CTRL_RUN_IN_FLASH_ONLY)
target_link_libraries(${COMPONENT_LIB} PUBLIC btdm_app_flash)
else()
target_link_libraries(${COMPONENT_LIB} PUBLIC btdm_app)
endif()
target_link_libraries(${COMPONENT_LIB} PUBLIC btdm_app)
elseif(CONFIG_IDF_TARGET_ESP32S3)
target_link_directories(${COMPONENT_LIB} INTERFACE
"${CMAKE_CURRENT_LIST_DIR}/controller/lib_esp32c3_family/esp32s3")
if(CONFIG_BT_CTRL_RUN_IN_FLASH_ONLY)
target_link_libraries(${COMPONENT_LIB} PUBLIC btdm_app_flash)
else()
target_link_libraries(${COMPONENT_LIB} PUBLIC btdm_app)
endif()
target_link_libraries(${COMPONENT_LIB} PUBLIC btdm_app)
elseif(CONFIG_BT_CONTROLLER_ENABLED)
if(CONFIG_BT_LE_CONTROLLER_LOG_WRAP_PANIC_HANDLER_ENABLE)
target_link_libraries(${COMPONENT_LIB} INTERFACE "-Wl,--wrap=esp_panic_handler")
endif()
if(CONFIG_IDF_TARGET_ESP32C6)
add_prebuilt_library(libble_app "controller/lib_${target}/${target}-bt-lib/esp32c6/libble_app.a")
else()
if(CONFIG_BT_CTRL_RUN_IN_FLASH_ONLY AND CONFIG_IDF_TARGET_ESP32C2)
add_prebuilt_library(libble_app "controller/lib_${target}/${target}-bt-lib/libble_app_flash.a")
else()
add_prebuilt_library(libble_app "controller/lib_${target}/${target}-bt-lib/libble_app.a")
endif()
endif()
add_prebuilt_library(libble_app "controller/lib_${target}/${target}-bt-lib/libble_app.a")
target_link_libraries(${COMPONENT_LIB} PRIVATE libble_app)
endif()
@@ -945,7 +862,7 @@ if(CONFIG_BT_ENABLED)
target_compile_options(${COMPONENT_LIB} PRIVATE "-Wno-format")
endif()
if(CONFIG_BLE_MESH_V11_SUPPORT)
if(CONFIG_BLE_MESH)
if(CONFIG_IDF_TARGET_ESP32)
add_prebuilt_library(ble_mesh "esp_ble_mesh/lib/lib/esp32/libble_mesh.a")
target_link_libraries(${COMPONENT_LIB} PRIVATE ble_mesh)

View File

@@ -81,6 +81,8 @@ menu "Bluetooth"
So this option will disable the PMP (ESP_SYSTEM_PMP_IDRAM_SPLIT)
menu "Common Options"
visible if (BT_BLUEDROID_ENABLED || BT_NIMBLE_ENABLED)
source "$IDF_PATH/components/bt/common/Kconfig.in"
endmenu

View File

@@ -1,77 +1,6 @@
config BT_ALARM_MAX_NUM
int "Maximum number of Bluetooth alarms"
default 50
depends on (BT_BLUEDROID_ENABLED || BT_NIMBLE_ENABLED)
help
This option decides the maximum number of alarms which
could be used by Bluetooth host.
config BT_BLE_LOG_SPI_OUT_ENABLED
bool "Output ble logs to SPI bus (Experimental)"
default n
help
Output ble logs to SPI bus
config BT_BLE_LOG_SPI_OUT_HCI_ENABLED
bool "Enable HCI log output to SPI"
depends on BT_BLE_LOG_SPI_OUT_ENABLED
default n
help
Enable logging of HCI packets to the SPI bus when BLE SPI log output is enabled.
config BT_BLE_LOG_SPI_OUT_HOST_ENABLED
bool "Enable Host log output to SPI"
depends on BT_BLE_LOG_SPI_OUT_ENABLED
default n
help
This configuration applies to the logs of both Bluedroid Host and NimBLE Host.
When BLE SPI log output is enabled, this option allows host logs to be transmitted via SPI.
config BT_BLE_LOG_SPI_OUT_QUEUE_SIZE
int "Number of ble log async SPI output queues"
depends on BT_BLE_LOG_SPI_OUT_ENABLED
default 4
help
The number of ble log async SPI output queues
config BT_BLE_LOG_SPI_OUT_TRANS_BUF_SIZE
int "Size of ble log async SPI output transaction buffer size"
depends on BT_BLE_LOG_SPI_OUT_ENABLED
default 2048
help
The size of ble log async SPI output transaction buffer size
config BT_BLE_LOG_SPI_OUT_MOSI_IO_NUM
int "GPIO number of SPI MOSI"
depends on BT_BLE_LOG_SPI_OUT_ENABLED
default 0
help
GPIO number of SPI MOSI
config BT_BLE_LOG_SPI_OUT_SCLK_IO_NUM
int "GPIO number of SPI SCLK"
depends on BT_BLE_LOG_SPI_OUT_ENABLED
default 1
help
GPIO number of SPI SCLK
config BT_BLE_LOG_SPI_OUT_CS_IO_NUM
int "GPIO number of SPI CS"
depends on BT_BLE_LOG_SPI_OUT_ENABLED
default 2
help
GPIO number of SPI CS
config BT_BLE_LOG_SPI_OUT_TS_SYNC_ENABLED
bool "Enable ble log & logic analyzer log time sync"
depends on BT_BLE_LOG_SPI_OUT_ENABLED
default y
help
Enable ble log & logic analyzer log time sync
config BT_BLE_LOG_SPI_OUT_SYNC_IO_NUM
int "GPIO number of SYNC IO"
depends on BT_BLE_LOG_SPI_OUT_TS_SYNC_ENABLED
default 3
help
GPIO number of SYNC IO

View File

@@ -1,502 +0,0 @@
/*
* SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "ble_log/ble_log_spi_out.h"
#if CONFIG_BT_BLE_LOG_SPI_OUT_ENABLED
// Private defines
#define SPI_OUT_BUS SPI2_HOST
#define SPI_OUT_TAIL 0xAA
#define SPI_OUT_FLUSHOUT_TIMEOUT (1000 * 1000)
#define SPI_OUT_TS_SYNC_TIMEOUT (1000 * 1000)
// Private typedefs
typedef struct spi_out_trans {
spi_transaction_t trans;
struct spi_out_trans *next;
} spi_out_trans_t;
// Private variables
static spi_device_handle_t spi_handle = NULL;
static spi_out_trans_t *trans_head = NULL;
static SemaphoreHandle_t mutex_handle = NULL;
static bool spi_out_inited = false;
static esp_timer_handle_t flushout_timer_handle = NULL;
static uint32_t loss_frame_cnt = 0;
#if CONFIG_BT_BLE_LOG_SPI_OUT_TS_SYNC_ENABLED
static bool sync_io_level = false;
static esp_timer_handle_t ts_sync_timer_handle = NULL;
#endif // CONFIG_BT_BLE_LOG_SPI_OUT_TS_SYNC_ENABLED
// Private function declarations
static void spi_out_init_trans(void);
static void spi_out_deinit_trans(void);
static void spi_out_recycle_trans(uint32_t ms_to_wait);
static void spi_out_append_trans(void);
static int spi_out_write(const uint8_t *addr, uint16_t len);
static void esp_timer_cb_flushout(void);
static void esp_timer_cb_ts_sync(void);
#if CONFIG_BT_BLE_LOG_SPI_OUT_TS_SYNC_ENABLED
#if defined(CONFIG_IDF_TARGET_ESP32H2) || defined(CONFIG_IDF_TARGET_ESP32C6)
extern uint32_t r_ble_lll_timer_current_tick_get(void);
#endif // CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C6
#if defined(CONFIG_IDF_TARGET_ESP32C2)
extern uint32_t r_os_cputime_get32(void);
#endif // CONFIG_IDF_TARGET_ESP32C2
#endif // CONFIG_BT_BLE_LOG_SPI_OUT_TS_SYNC_ENABLED
// Private functions
static void spi_out_init_trans(void)
{
for (int i = 0; i < CONFIG_BT_BLE_LOG_SPI_OUT_QUEUE_SIZE; i++) {
// Allocate memory for SPI transaction
uint8_t *buf = (uint8_t *)heap_caps_malloc(CONFIG_BT_BLE_LOG_SPI_OUT_TRANS_BUF_SIZE, MALLOC_CAP_DMA);
assert(buf);
// Initialize new trans
spi_out_trans_t *new_trans = (spi_out_trans_t *)malloc(sizeof(spi_out_trans_t));
assert(new_trans);
memset(new_trans, 0, sizeof(spi_out_trans_t));
new_trans->trans.tx_buffer = buf;
new_trans->trans.length = 0;
// Append new trans to free trans list
new_trans->next = trans_head;
trans_head = new_trans;
}
return;
}
static void spi_out_deinit_trans(void)
{
// Wait up to QUEUE_SIZE * 100 ms for all transactions to complete and be recycled
spi_out_recycle_trans(100);
// Release memory
spi_out_trans_t *next;
while (trans_head != NULL) {
next = trans_head->next;
free((uint8_t *)trans_head->trans.tx_buffer);
free(trans_head);
trans_head = next;
}
trans_head = NULL;
return;
}
// CRITICAL: Do not recycle trans when trans_head is not empty!
IRAM_ATTR static void spi_out_recycle_trans(uint32_t ms_to_wait)
{
// Try to recycle transaction
spi_transaction_t *ret_trans;
spi_out_trans_t *recycled_trans;
while (ESP_OK == spi_device_get_trans_result(spi_handle, &ret_trans, pdMS_TO_TICKS(ms_to_wait))) {
recycled_trans = __containerof(ret_trans, spi_out_trans_t, trans);
recycled_trans->next = trans_head;
trans_head = recycled_trans;
trans_head->trans.length = 0;
trans_head->trans.rxlength = 0;
}
}
IRAM_ATTR static void spi_out_append_trans(void)
{
// Stop flushout timer
esp_timer_stop(flushout_timer_handle);
// Transaction head shall not be NULL for appending
if (trans_head) {
// Detach transaction head
spi_out_trans_t *trans_to_append = trans_head;
trans_head = trans_head->next;
trans_to_append->next = NULL;
// CRITICAL: Length unit conversion from bytes to bits
trans_to_append->trans.length *= 8;
ESP_ERROR_CHECK(spi_device_queue_trans(spi_handle, &trans_to_append->trans, 0));
}
// Try to recycle trans
spi_out_recycle_trans(0);
// Restart flushout timer
esp_timer_start_once(flushout_timer_handle, SPI_OUT_FLUSHOUT_TIMEOUT);
}
IRAM_ATTR static int spi_out_write(const uint8_t *addr, uint16_t len)
{
// Recycle trans if free buffer list is empty
if (!trans_head) {
spi_out_recycle_trans(0);
}
// Copy user data to buffer
uint16_t copy_buf_len;
uint16_t data_left_len = len;
uint16_t empty_buf_len = CONFIG_BT_BLE_LOG_SPI_OUT_TRANS_BUF_SIZE - trans_head->trans.length;
while (data_left_len) {
// There shall always be available buffer in free buffer list during write operation
if (!trans_head) {
return -1;
}
// Copy data to buffer and update length
copy_buf_len = (data_left_len > empty_buf_len) ? empty_buf_len : data_left_len;
memcpy((uint8_t *)trans_head->trans.tx_buffer + trans_head->trans.length, addr + (len - data_left_len), copy_buf_len);
trans_head->trans.length += copy_buf_len;
data_left_len -= copy_buf_len;
// If buffer is full, append transaction and reset buffer length
if (trans_head->trans.length == CONFIG_BT_BLE_LOG_SPI_OUT_TRANS_BUF_SIZE) {
spi_out_append_trans();
empty_buf_len = CONFIG_BT_BLE_LOG_SPI_OUT_TRANS_BUF_SIZE;
}
}
return 0;
}
// CRITICAL: This function is called in ESP Timer task
IRAM_ATTR static void esp_timer_cb_flushout(void)
{
// Take semaphore
assert(xSemaphoreTakeRecursive(mutex_handle, portMAX_DELAY) == pdTRUE);
// Flushout
if (trans_head) {
// Make sure there's enough space for loss frame counter
if (trans_head->next && loss_frame_cnt) {
ble_log_spi_out_write(BLE_LOG_SPI_OUT_SOURCE_LOSS, (uint8_t *)&loss_frame_cnt, sizeof(loss_frame_cnt));
loss_frame_cnt = 0;
}
if (trans_head->trans.length) {
spi_out_append_trans();
}
}
// Restart flushout timer if not active
if (!esp_timer_is_active(flushout_timer_handle)) {
esp_timer_start_once(flushout_timer_handle, SPI_OUT_FLUSHOUT_TIMEOUT);
}
// Release semaphore
xSemaphoreGiveRecursive(mutex_handle);
}
#if CONFIG_BT_BLE_LOG_SPI_OUT_TS_SYNC_ENABLED
// CRITICAL: This function is called in ESP Timer task
IRAM_ATTR static void esp_timer_cb_ts_sync(void)
{
// Initialize variables
uint32_t lc_ts = 0;
uint32_t esp_ts = 0;
// Toggle sync IO
sync_io_level = !sync_io_level;
// Enter critical
portMUX_TYPE spinlock = portMUX_INITIALIZER_UNLOCKED;
portENTER_CRITICAL_SAFE(&spinlock);
// Get LC timestamp
#if defined(CONFIG_IDF_TARGET_ESP32H2) || defined(CONFIG_IDF_TARGET_ESP32C6)
lc_ts = r_ble_lll_timer_current_tick_get();
#endif // CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C6
#if defined(CONFIG_IDF_TARGET_ESP32C2)
lc_ts = r_os_cputime_get32();
#endif // CONFIG_IDF_TARGET_ESP32C2
// Set sync IO level
gpio_set_level(CONFIG_BT_BLE_LOG_SPI_OUT_SYNC_IO_NUM, (uint32_t)sync_io_level);
// Get ESP timestamp
esp_ts = esp_timer_get_time();
portEXIT_CRITICAL_SAFE(&spinlock);
// Exit critical
// Write timestamp sync log
uint8_t sync_frame[9];
sync_frame[0] = ((uint8_t)sync_io_level & 0xFF);
memcpy(sync_frame + 1, &lc_ts, sizeof(lc_ts));
memcpy(sync_frame + 5, &esp_ts, sizeof(esp_ts));
ble_log_spi_out_write(BLE_LOG_SPI_OUT_SOURCE_SYNC, sync_frame, 9);
}
#endif // CONFIG_BT_BLE_LOG_SPI_OUT_TS_SYNC_ENABLED
// Public functions
void ble_log_spi_out_init(void)
{
// Avoid double init
if (spi_out_inited) {
return;
}
// Initialize mutex
mutex_handle = xSemaphoreCreateRecursiveMutex();
// Initialize SPI
spi_bus_config_t bus_config = {
.miso_io_num = -1,
.mosi_io_num = CONFIG_BT_BLE_LOG_SPI_OUT_MOSI_IO_NUM,
.sclk_io_num = CONFIG_BT_BLE_LOG_SPI_OUT_SCLK_IO_NUM,
.quadwp_io_num = -1,
.quadhd_io_num = -1,
.max_transfer_sz = 10240
};
spi_device_interface_config_t dev_config = {
.clock_speed_hz = SPI_MASTER_FREQ_20M,
.mode = 0,
.spics_io_num = CONFIG_BT_BLE_LOG_SPI_OUT_CS_IO_NUM,
.queue_size = CONFIG_BT_BLE_LOG_SPI_OUT_QUEUE_SIZE
};
ESP_ERROR_CHECK(spi_bus_initialize(SPI_OUT_BUS, &bus_config, SPI_DMA_CH_AUTO));
ESP_ERROR_CHECK(spi_bus_add_device(SPI_OUT_BUS, &dev_config, &spi_handle));
// Initialize transaction link nodes
spi_out_init_trans();
// Initialize flushout timer
esp_timer_create_args_t timer_args = {
.callback = (esp_timer_cb_t)esp_timer_cb_flushout,
.dispatch_method = ESP_TIMER_TASK
};
ESP_ERROR_CHECK(esp_timer_create(&timer_args, &flushout_timer_handle));
esp_timer_start_once(flushout_timer_handle, SPI_OUT_FLUSHOUT_TIMEOUT);
loss_frame_cnt = 0;
#if CONFIG_BT_BLE_LOG_SPI_OUT_TS_SYNC_ENABLED
// Initialize timestamp synchronizer
gpio_config_t io_conf = {
.intr_type = GPIO_INTR_DISABLE,
.mode = GPIO_MODE_OUTPUT,
.pin_bit_mask = (1UL << CONFIG_BT_BLE_LOG_SPI_OUT_SYNC_IO_NUM),
.pull_down_en = 0,
.pull_up_en = 0
};
ESP_ERROR_CHECK(gpio_config(&io_conf));
sync_io_level = false;
gpio_set_level(CONFIG_BT_BLE_LOG_SPI_OUT_SYNC_IO_NUM, sync_io_level);
esp_timer_create_args_t ts_sync_timer_args = {
.callback = (esp_timer_cb_t)esp_timer_cb_ts_sync,
.dispatch_method = ESP_TIMER_TASK
};
ESP_ERROR_CHECK(esp_timer_create(&ts_sync_timer_args, &ts_sync_timer_handle));
#endif // CONFIG_BT_BLE_LOG_SPI_OUT_TS_SYNC_ENABLED
// Set init flag
spi_out_inited = true;
}
void ble_log_spi_out_deinit(void)
{
// Avoid double deinit
if (!spi_out_inited) {
return;
}
#if CONFIG_BT_BLE_LOG_SPI_OUT_TS_SYNC_ENABLED
// Deinitialize timestamp synchronizer
esp_timer_stop(ts_sync_timer_handle);
esp_timer_delete(ts_sync_timer_handle);
gpio_reset_pin(CONFIG_BT_BLE_LOG_SPI_OUT_SYNC_IO_NUM);
#endif // CONFIG_BT_BLE_LOG_SPI_OUT_TS_SYNC_ENABLED
// Deinitialize flushout timer
esp_timer_stop(flushout_timer_handle);
esp_timer_delete(flushout_timer_handle);
// Deinitialize transaction link nodes
spi_out_deinit_trans();
// Deinitialize SPI
ESP_ERROR_CHECK(spi_bus_remove_device(spi_handle));
ESP_ERROR_CHECK(spi_bus_free(SPI_OUT_BUS));
spi_handle = NULL;
// Deinitialize mutex
vSemaphoreDelete(mutex_handle);
mutex_handle = NULL;
// Reset init flag
spi_out_inited = false;
}
#if CONFIG_BT_BLE_LOG_SPI_OUT_TS_SYNC_ENABLED
void ble_log_spi_out_ts_sync_start(void)
{
// Check if SPI out is initialized
if (!spi_out_inited) {
return;
}
// Start timestamp sync timer
if (ts_sync_timer_handle) {
if (!esp_timer_is_active(ts_sync_timer_handle)) {
esp_timer_start_periodic(ts_sync_timer_handle, SPI_OUT_TS_SYNC_TIMEOUT);
}
}
}
void ble_log_spi_out_ts_sync_stop(void)
{
// Check if SPI out is initialized
if (!spi_out_inited) {
return;
}
// Stop timestamp sync timer
if (ts_sync_timer_handle) {
if (esp_timer_is_active(ts_sync_timer_handle)) {
esp_timer_stop(ts_sync_timer_handle);
}
// Set sync IO to low level
sync_io_level = 0;
gpio_set_level(CONFIG_BT_BLE_LOG_SPI_OUT_SYNC_IO_NUM, (uint32_t)sync_io_level);
}
}
#endif // CONFIG_BT_BLE_LOG_SPI_OUT_TS_SYNC_ENABLED
IRAM_ATTR void ble_log_spi_out_write_esp(uint32_t len, const uint8_t *addr, bool end)
{
return ble_log_spi_out_write(BLE_LOG_SPI_OUT_SOURCE_ESP, addr, len);
}
IRAM_ATTR void ble_log_spi_out_write(uint8_t source, const uint8_t *addr, uint16_t len)
{
// Initialize frame sequence number
static uint8_t frame_sn = 0;
// Take semaphore
assert(xSemaphoreTakeRecursive(mutex_handle, portMAX_DELAY) == pdTRUE);
// Prepare frame head and frame tail
const uint8_t head[4] = {len & 0xFF, (len >> 8) & 0xFF, (uint8_t)source, frame_sn};
const uint8_t tail = SPI_OUT_TAIL;
// Write frame head first, then payload, finally frame tail
do {
if (spi_out_write(head, 4) != 0) {
loss_frame_cnt++;
break;
}
if (spi_out_write(addr, len) != 0) {
loss_frame_cnt++;
break;
}
if (spi_out_write(&tail, 1) != 0) {
loss_frame_cnt++;
break;
}
} while (0);
// Update frame sequence number
frame_sn++;
// Release semaphore
xSemaphoreGiveRecursive(mutex_handle);
return;
}
IRAM_ATTR int ble_log_spi_out_printf(uint8_t source, const char *format, ...)
{
// Get esp timestamp
uint32_t esp_ts = esp_timer_get_time();
// Get arguments
va_list args;
va_start(args, format);
// Get len as ref to allocate heap memory
va_list args_copy;
va_copy(args_copy, args);
int len = vsnprintf(NULL, 0, format, args_copy);
va_end(args_copy);
// Length validation
if ((len < 0) || (len > 0xFFFF)) {
va_end(args);
return -1;
}
// Allocate memory
uint8_t *buffer = malloc(len + 1);
if (!buffer) {
va_end(args);
return -1;
}
// Generate string
vsnprintf((char *)buffer, len + 1, format, args);
va_end(args);
// Write to SPI
ble_log_spi_out_write(source, (const uint8_t *)&esp_ts, 4);
ble_log_spi_out_write(source, (const uint8_t *)buffer, len);
// Release
free(buffer);
return 0;
}
IRAM_ATTR int ble_log_spi_out_printf_enh(uint8_t source, uint8_t level, const char *tag, const char *format, ...)
{
// Get ESP timestamp
uint32_t esp_ts = esp_timer_get_time();
// Create log prefix in the format: "[level][tag] "
char prefix[32];
int prefix_len = snprintf(prefix, sizeof(prefix), "[%d][%s] ", level, tag ? tag : "NULL");
// Compute the length of the formatted log message
va_list args;
va_start(args, format);
va_list args_copy;
va_copy(args_copy, args);
int log_len = vsnprintf(NULL, 0, format, args_copy);
va_end(args_copy);
// Validate length
if (log_len < 0 || log_len > 0xFFFF) {
va_end(args);
return -1;
}
// Compute total log length (prefix + formatted message)
int total_len = prefix_len + log_len;
// Allocate memory for the complete log message
uint8_t *buffer = malloc(total_len + 1);
if (!buffer) {
va_end(args);
return -1;
}
// Construct the final log message
memcpy(buffer, prefix, prefix_len); // Copy the prefix
vsnprintf((char *)(buffer + prefix_len), log_len + 1, format, args);
va_end(args);
// Transmit log data via SPI
ble_log_spi_out_write(source, (const uint8_t *)&esp_ts, 4);
ble_log_spi_out_write(source, buffer, total_len);
// Free allocated memory
free(buffer);
return 0;
}
IRAM_ATTR void ble_log_spi_out_write_with_ts(uint8_t source, const uint8_t *addr, uint16_t len)
{
// Get esp timestamp
uint32_t esp_ts = esp_timer_get_time();
// Write to SPI
ble_log_spi_out_write(source, (const uint8_t *)&esp_ts, 4);
ble_log_spi_out_write(source, addr, len);
}
#endif // CONFIG_BT_BLE_LOG_SPI_OUT_ENABLED

View File

@@ -1,47 +0,0 @@
/*
* SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef __BT_SPI_OUT_H__
#define __BT_SPI_OUT_H__
#include <stdarg.h>
#include <string.h>
#include "driver/spi_master.h"
#include "driver/gpio.h"
#include "esp_timer.h"
#include "freertos/semphr.h"
// Public typedefs
#define BLE_LOG_SPI_OUT_SOURCE_ESP 0
#define BLE_LOG_SPI_OUT_SOURCE_ESP_LEGACY 1
#define BLE_LOG_SPI_OUT_SOURCE_BLUEDROID 2
#define BLE_LOG_SPI_OUT_SOURCE_NIMBLE 3
#define BLE_LOG_SPI_OUT_SOURCE_HCI_UPSTREAM 4
#define BLE_LOG_SPI_OUT_SOURCE_HCI_DOWNSTREAM 5
#define BLE_LOG_SPI_OUT_SOURCE_USER 0x10
#define BLE_LOG_SPI_OUT_SOURCE_SYNC 0xFE
#define BLE_LOG_SPI_OUT_SOURCE_LOSS 0xFF
// SPI Log Level Definitions
#define BLE_LOG_SPI_OUT_LEVEL_NONE 0 /*!< No log output */
#define BLE_LOG_SPI_OUT_LEVEL_ERROR 1 /*!< Critical errors that SPI driver cannot recover from */
#define BLE_LOG_SPI_OUT_LEVEL_WARN 2 /*!< Recoverable error conditions in SPI communication */
#define BLE_LOG_SPI_OUT_LEVEL_INFO 3 /*!< Informational messages about SPI transactions */
#define BLE_LOG_SPI_OUT_LEVEL_DEBUG 4 /*!< Detailed debug information, such as SPI register values */
#define BLE_LOG_SPI_OUT_LEVEL_VERBOSE 5 /*!< Very detailed debugging logs, potentially flooding output */
#define BLE_LOG_SPI_OUT_LEVEL_MAX 6 /*!< Number of SPI log levels supported */
// Public functions
void ble_log_spi_out_init(void);
void ble_log_spi_out_deinit(void);
void ble_log_spi_out_write(uint8_t source, const uint8_t *addr, uint16_t len);
void ble_log_spi_out_write_esp(uint32_t len, const uint8_t *addr, bool end);
void ble_log_spi_out_ts_sync_start(void);
void ble_log_spi_out_ts_sync_stop(void);
int ble_log_spi_out_printf(uint8_t source, const char *format, ...);
int ble_log_spi_out_printf_enh(uint8_t source, uint8_t level, const char *tag, const char *format, ...);
void ble_log_spi_out_write_with_ts(uint8_t source, const uint8_t *addr, uint16_t len);
#endif // __BT_SPI_OUT_H__

View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -69,12 +69,6 @@
#include "btc_ble_mesh_prov.h"
#include "btc_ble_mesh_health_model.h"
#include "btc_ble_mesh_config_model.h"
#include "btc_ble_mesh_generic_model.h"
#include "btc_ble_mesh_lighting_model.h"
#include "btc_ble_mesh_sensor_model.h"
#include "btc_ble_mesh_time_scene_model.h"
#if CONFIG_BLE_MESH_V11_SUPPORT
#include "btc_ble_mesh_mbt_model.h"
#include "btc_ble_mesh_agg_model.h"
#include "btc_ble_mesh_brc_model.h"
#include "btc_ble_mesh_df_model.h"
@@ -84,7 +78,11 @@
#include "btc_ble_mesh_rpr_model.h"
#include "btc_ble_mesh_sar_model.h"
#include "btc_ble_mesh_srpl_model.h"
#endif /* CONFIG_BLE_MESH_V11_SUPPORT */
#include "btc_ble_mesh_generic_model.h"
#include "btc_ble_mesh_lighting_model.h"
#include "btc_ble_mesh_sensor_model.h"
#include "btc_ble_mesh_time_scene_model.h"
#include "btc_ble_mesh_mbt_model.h"
#endif /* #if CONFIG_BLE_MESH */
#define BTC_TASK_PINNED_TO_CORE (TASK_PINNED_TO_CORE)
@@ -297,8 +295,8 @@ static bt_status_t btc_task_post(btc_msg_t *msg, uint32_t timeout)
/**
* transfer an message to another module in the different task.
* @param msg message
* @param arg parameter
* @param arg_len length of parameter
* @param arg paramter
* @param arg_len length of paramter
* @param copy_func deep copy function
* @param free_func deep free function
* @return BT_STATUS_SUCCESS: success
@@ -344,7 +342,7 @@ bt_status_t btc_transfer_context(btc_msg_t *msg, void *arg, int arg_len, btc_arg
}
/**
* transfer an message to another module in the same task.
* transfer an message to another module in tha same task.
* @param msg message
* @return BT_STATUS_SUCCESS: success
* others: fail
@@ -382,8 +380,7 @@ static void btc_deinit_mem(void) {
btc_profile_cb_tab = NULL;
}
#if (BLE_42_FEATURE_SUPPORT == TRUE)
#if (BLE_42_ADV_EN == TRUE)
#if (BLE_INCLUDED == TRUE)
if (gl_bta_adv_data_ptr) {
osi_free(gl_bta_adv_data_ptr);
gl_bta_adv_data_ptr = NULL;
@@ -393,8 +390,7 @@ static void btc_deinit_mem(void) {
osi_free(gl_bta_scan_rsp_data_ptr);
gl_bta_scan_rsp_data_ptr = NULL;
}
#endif // #if (BLE_42_ADV_EN == TRUE)
#endif // BLE_42_FEATURE_SUPPORT
#endif ///BLE_INCLUDED == TRUE
#if GATTS_INCLUDED == TRUE && GATT_DYNAMIC_MEMORY == TRUE
if (btc_creat_tab_env_ptr) {
@@ -446,9 +442,7 @@ static bt_status_t btc_init_mem(void) {
}
memset((void *)btc_profile_cb_tab, 0, sizeof(void *) * BTC_PID_NUM);
#if BTC_DYNAMIC_MEMORY == TRUE
#if (BLE_42_FEATURE_SUPPORT == TRUE)
#if (BLE_42_ADV_EN == TRUE)
#if (BLE_INCLUDED == TRUE)
if ((gl_bta_adv_data_ptr = (tBTA_BLE_ADV_DATA *)osi_malloc(sizeof(tBTA_BLE_ADV_DATA))) == NULL) {
goto error_exit;
}
@@ -458,9 +452,7 @@ static bt_status_t btc_init_mem(void) {
goto error_exit;
}
memset((void *)gl_bta_scan_rsp_data_ptr, 0, sizeof(tBTA_BLE_ADV_DATA));
#endif // #if (BLE_42_ADV_EN == TRUE)
#endif // (BLE_42_FEATURE_SUPPORT == TRUE)
#endif // BTC_DYNAMIC_MEMORY == TRUE
#endif ///BLE_INCLUDED == TRUE
#if GATTS_INCLUDED == TRUE && GATT_DYNAMIC_MEMORY == TRUE
if ((btc_creat_tab_env_ptr = (esp_btc_creat_tab_t *)osi_malloc(sizeof(esp_btc_creat_tab_t))) == NULL) {
@@ -528,6 +520,9 @@ bt_status_t btc_init(void)
btc_gap_ble_init();
#endif ///BLE_INCLUDED == TRUE
#if SCAN_QUEUE_CONGEST_CHECK
btc_adv_list_init();
#endif
/* TODO: initial the profile_tab */
return BT_STATUS_SUCCESS;
}
@@ -543,6 +538,18 @@ void btc_deinit(void)
#if (BLE_INCLUDED == TRUE)
btc_gap_ble_deinit();
#endif ///BLE_INCLUDED == TRUE
#if SCAN_QUEUE_CONGEST_CHECK
btc_adv_list_deinit();
#endif
}
bool btc_check_queue_is_congest(void)
{
if (osi_thread_queue_wait_size(btc_thread, 0) >= BT_QUEUE_CONGEST_SIZE) {
return true;
}
return false;
}
int get_btc_work_queue_size(void)

View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -123,8 +123,8 @@ extern "C" {
/**
* transfer an message to another module in the different task.
* @param msg message
* @param arg parameter
* @param arg_len length of parameter
* @param arg paramter
* @param arg_len length of paramter
* @param copy_func deep copy function
* @param free_func deep free function
* @return BT_STATUS_SUCCESS: success
@@ -134,7 +134,7 @@ bt_status_t btc_transfer_context(btc_msg_t *msg, void *arg, int arg_len, btc_arg
btc_arg_deep_free_t free_func);
/**
* transfer an message to another module in the same task.
* transfer an message to another module in tha same task.
* @param msg message
* @return BT_STATUS_SUCCESS: success
* others: fail
@@ -143,6 +143,7 @@ bt_status_t btc_inter_profile_call(btc_msg_t *msg);
bt_status_t btc_init(void);
void btc_deinit(void);
bool btc_check_queue_is_congest(void);
int get_btc_work_queue_size(void);
/**

View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -160,31 +160,20 @@ static void blufi_profile_cb(tBTA_GATTS_EVT event, tBTA_GATTS *p_data)
if (p_data->req_data.p_data->write_req.is_prep) {
tBTA_GATT_STATUS status = GATT_SUCCESS;
do {
if (p_data->req_data.p_data->write_req.offset > BLUFI_PREPARE_BUF_MAX_SIZE) {
status = ESP_GATT_INVALID_OFFSET;
break;
}
if ((p_data->req_data.p_data->write_req.offset + p_data->req_data.p_data->write_req.len) > BLUFI_PREPARE_BUF_MAX_SIZE) {
status = ESP_GATT_INVALID_ATTR_LEN;
break;
}
if (blufi_env.prepare_buf == NULL) {
blufi_env.prepare_buf = osi_malloc(BLUFI_PREPAIR_BUF_MAX_SIZE);
blufi_env.prepare_len = 0;
if (blufi_env.prepare_buf == NULL) {
if (p_data->req_data.p_data->write_req.offset != 0) {
status = GATT_INVALID_OFFSET;
break;
}
blufi_env.prepare_buf = osi_malloc(BLUFI_PREPARE_BUF_MAX_SIZE);
blufi_env.prepare_len = 0;
if (blufi_env.prepare_buf == NULL) {
BLUFI_TRACE_ERROR("Blufi prep no mem\n");
status = GATT_NO_RESOURCES;
break;
}
BLUFI_TRACE_ERROR("Blufi prep no mem\n");
status = GATT_NO_RESOURCES;
}
} while (0);
} else {
if (p_data->req_data.p_data->write_req.offset > BLUFI_PREPAIR_BUF_MAX_SIZE) {
status = GATT_INVALID_OFFSET;
} else if ((p_data->req_data.p_data->write_req.offset + p_data->req_data.p_data->write_req.len) > BLUFI_PREPAIR_BUF_MAX_SIZE) {
status = GATT_INVALID_ATTR_LEN;
}
}
memset(&rsp, 0, sizeof(tGATTS_RSP));
rsp.attr_value.handle = p_data->req_data.p_data->write_req.handle;

View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -95,29 +95,7 @@ void btc_blufi_report_error(esp_blufi_error_state_t state)
void btc_blufi_recv_handler(uint8_t *data, int len)
{
if (len < sizeof(struct blufi_hdr)) {
BTC_TRACE_ERROR("%s invalid data length: %d", __func__, len);
btc_blufi_report_error(ESP_BLUFI_DATA_FORMAT_ERROR);
return;
}
struct blufi_hdr *hdr = (struct blufi_hdr *)data;
// Verify if the received data length matches the expected length based on the BLUFI protocol
int target_data_len;
if (BLUFI_FC_IS_CHECK(hdr->fc)) {
target_data_len = hdr->data_len + 4 + 2; // Data + (Type + Frame Control + Sequence Number + Data Length) + Checksum
} else {
target_data_len = hdr->data_len + 4; // Data + (Type + Frame Control + Sequence Number + Data Length)
}
if (len != target_data_len) {
BTC_TRACE_ERROR("%s: Invalid data length: %d, expected: %d", __func__, len, target_data_len);
btc_blufi_report_error(ESP_BLUFI_DATA_FORMAT_ERROR);
return;
}
uint16_t checksum, checksum_pkt;
int ret;

View File

@@ -36,9 +36,7 @@ typedef struct {
UINT32 trans_id;
UINT8 congest;
UINT16 frag_size;
// Deprecated: This macro will be removed in the future
#define BLUFI_PREPAIR_BUF_MAX_SIZE 1024
#define BLUFI_PREPARE_BUF_MAX_SIZE 1024
uint8_t *prepare_buf;
int prepare_len;
/* Control reference */

View File

@@ -44,7 +44,6 @@ void esp_blufi_gatt_svr_register_cb(struct ble_gatt_register_ctxt *ctxt, void *a
/* Initialise gatt server */
int esp_blufi_gatt_svr_init(void);
int esp_blufi_gatt_svr_deinit(void);
void esp_blufi_btc_init(void);
void esp_blufi_btc_deinit(void);
#endif

View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -124,31 +124,7 @@ static size_t write_value(uint16_t conn_handle, uint16_t attr_handle,
}
}
/* Data may come in linked om. So retrieve all data */
if (SLIST_NEXT(ctxt->om, om_next) != NULL) {
uint8_t *fw_buf = (uint8_t *)malloc(517 * sizeof(uint8_t));
memset(fw_buf, 0x0, 517);
memcpy(fw_buf, &ctxt->om->om_data[0], ctxt->om->om_len);
struct os_mbuf *last;
last = ctxt->om;
uint32_t offset = ctxt->om->om_len;
while (SLIST_NEXT(last, om_next) != NULL) {
struct os_mbuf *temp = SLIST_NEXT(last, om_next);
memcpy(fw_buf + offset , &temp->om_data[0], temp->om_len);
offset += temp->om_len;
last = SLIST_NEXT(last, om_next);
temp = NULL;
}
btc_blufi_recv_handler(fw_buf, offset);
free(fw_buf);
}
else {
btc_blufi_recv_handler(&ctxt->om->om_data[0], ctxt->om->om_len);
}
btc_blufi_recv_handler(&ctxt->om->om_data[0], ctxt->om->om_len);
rc = ble_hs_mbuf_to_flat(ctxt->om, value->buf->om_data,
value->buf->om_len, &len);
if (rc != 0) {
@@ -240,32 +216,6 @@ static void init_gatt_values(void)
}
static void deinit_gatt_values(void)
{
int i = 0;
const struct ble_gatt_svc_def *svc;
const struct ble_gatt_chr_def *chr;
const struct ble_gatt_dsc_def *dsc;
for (svc = gatt_svr_svcs; svc && svc->uuid; svc++) {
for (chr = svc->characteristics; chr && chr->uuid; chr++) {
if (i < SERVER_MAX_VALUES && gatt_values[i].buf != NULL) {
os_mbuf_free(gatt_values[i].buf); /* Free the buffer */
gatt_values[i].buf = NULL; /* Nullify the pointer to avoid dangling references */
}
++i;
for (dsc = chr->descriptors; dsc && dsc->uuid; dsc++) {
if (i < SERVER_MAX_VALUES && gatt_values[i].buf != NULL) {
os_mbuf_free(gatt_values[i].buf); /* Free the buffer */
gatt_values[i].buf = NULL; /* Nullify the pointer to avoid dangling references */
}
++i;
}
}
}
}
int esp_blufi_gatt_svr_init(void)
{
int rc;
@@ -286,18 +236,6 @@ int esp_blufi_gatt_svr_init(void)
return 0;
}
int esp_blufi_gatt_svr_deinit(void)
{
deinit_gatt_values();
ble_gatts_free_svcs();
/* Deinitialize BLE GATT and GAP services */
ble_svc_gatt_deinit();
ble_svc_gap_deinit();
return 0;
}
static int
esp_blufi_gap_event(struct ble_gap_event *event, void *arg)
{
@@ -480,10 +418,8 @@ uint8_t esp_blufi_init(void)
void esp_blufi_deinit(void)
{
blufi_env.enabled = false;
esp_blufi_cb_param_t param;
btc_msg_t msg;
memset (&msg, 0x0, sizeof (msg));
msg.sig = BTC_SIG_API_CB;
esp_blufi_cb_param_t param;
msg.pid = BTC_PID_BLUFI;
msg.act = ESP_BLUFI_EVENT_DEINIT_FINISH;
param.deinit_finish.state = ESP_BLUFI_DEINIT_OK;

View File

@@ -31,8 +31,8 @@ static const char s_hex_to_char_mapping[16] = {
'8', '9', 'a', 'b', 'c', 'd', 'e', 'f'
};
static bt_hci_log_t g_bt_hci_log_data_ctl = {0};
static bt_hci_log_t g_bt_hci_log_adv_ctl = {0};
bt_hci_log_t g_bt_hci_log_data_ctl = {0};
bt_hci_log_t g_bt_hci_log_adv_ctl = {0};
esp_err_t bt_hci_log_init(void)
{
@@ -98,35 +98,35 @@ static char IRAM_ATTR *bt_data_type_to_str(uint8_t data_type)
{
case HCI_LOG_DATA_TYPE_COMMAND:
// hci cmd data
tag = "C";
tag = "CMD";
break;
case HCI_LOG_DATA_TYPE_H2C_ACL:
// host to controller hci acl data
tag = "H";
tag = "HAL";
break;
case HCI_LOG_DATA_TYPE_SCO:
// hci sco data
tag = "S";
tag = "SCO";
break;
case HCI_LOG_DATA_TYPE_EVENT:
// hci event
tag = "E";
tag = "EVT";
break;
case HCI_LOG_DATA_TYPE_ADV:
// controller adv report data
tag = NULL;
tag = "ADV";
break;
case HCI_LOG_DATA_TYPE_C2H_ACL:
// controller to host hci acl data
tag = "D";
tag = "CAL";
break;
case HCI_LOG_DATA_TYPE_SELF_DEFINE:
// self-defining data
tag = "S";
tag = "ST";
break;
default:
// unknown data type
tag = "U";
tag = "UK";
break;
}
@@ -305,27 +305,19 @@ void bt_hci_log_data_show(bt_hci_log_t *p_hci_log_ctl)
osi_mutex_unlock(&mutex_lock);
}
static bool enable_hci_log_flag = true;
void bt_hci_log_record_hci_enable(bool enable)
{
enable_hci_log_flag = enable;
}
esp_err_t IRAM_ATTR bt_hci_log_record_hci_data(uint8_t data_type, uint8_t *data, uint8_t data_len)
{
if (!enable_hci_log_flag) return ESP_OK;
return bt_hci_log_record_data(&g_bt_hci_log_data_ctl, NULL, data_type, data, data_len);
}
esp_err_t IRAM_ATTR bt_hci_log_record_custom_data(char *string, uint8_t *data, uint8_t data_len)
{
if (!enable_hci_log_flag) return ESP_OK;
return bt_hci_log_record_data(&g_bt_hci_log_data_ctl, string, HCI_LOG_DATA_TYPE_SELF_DEFINE, data, data_len);
}
esp_err_t IRAM_ATTR bt_hci_log_record_hci_adv(uint8_t data_type, uint8_t *data, uint8_t data_len)
{
if (!enable_hci_log_flag) return ESP_OK;
return bt_hci_log_record_data(&g_bt_hci_log_adv_ctl, NULL, data_type, data, data_len);
}

View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -46,7 +46,6 @@
#define OSI_INITIAL_TRACE_LEVEL UC_BT_LOG_OSI_TRACE_LEVEL
#define BLUFI_INITIAL_TRACE_LEVEL UC_BT_LOG_BLUFI_TRACE_LEVEL
// MEMORY
#if UC_BT_BLE_DYNAMIC_ENV_MEMORY
#define BT_BLE_DYNAMIC_ENV_MEMORY TRUE
#define BTC_DYNAMIC_MEMORY TRUE
@@ -65,39 +64,12 @@
#define BT_BLE_DYNAMIC_ENV_MEMORY FALSE
#endif
#if UC_HEAP_ALLOCATION_FROM_SPIRAM_FIRST
#define HEAP_ALLOCATION_FROM_SPIRAM_FIRST TRUE
#else
#define HEAP_ALLOCATION_FROM_SPIRAM_FIRST FALSE
#endif
#if UC_BT_ABORT_WHEN_ALLOCATION_FAILS
#define HEAP_ALLOCATION_FAILS_ABORT TRUE
#else
#define HEAP_ALLOCATION_FAILS_ABORT FALSE
#endif
// HCI LOG
#if UC_BT_HCI_LOG_DEBUG_EN
#define BT_HCI_LOG_INCLUDED UC_BT_HCI_LOG_DEBUG_EN
#else
#define BT_HCI_LOG_INCLUDED FALSE
#endif
// HCI LOG TO SPI
#if UC_BT_BLE_LOG_SPI_OUT_HCI_ENABLED
#define BT_BLE_LOG_SPI_OUT_HCI_ENABLED UC_BT_BLE_LOG_SPI_OUT_HCI_ENABLED
#else
#define BT_BLE_LOG_SPI_OUT_HCI_ENABLED FALSE
#endif
// BLURDROID LOG TO SPI
#if UC_BT_BLE_LOG_SPI_OUT_HOST_ENABLED
#define BT_BLE_LOG_SPI_OUT_HOST_ENABLED UC_BT_BLE_LOG_SPI_OUT_HOST_ENABLED
#else
#define BT_BLE_LOG_SPI_OUT_HOST_ENABLED FALSE
#endif
#if UC_BT_HCI_LOG_DATA_BUFFER_SIZE
#define HCI_LOG_DATA_BUFFER_SIZE UC_BT_HCI_LOG_DATA_BUFFER_SIZE
#else

View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -100,46 +100,19 @@
#define UC_BT_BLUFI_ENABLE FALSE
#endif
//MEMORY
//MEMORY DEBUG
#ifdef CONFIG_BT_BLUEDROID_MEM_DEBUG
#define UC_BT_BLUEDROID_MEM_DEBUG TRUE
#else
#define UC_BT_BLUEDROID_MEM_DEBUG FALSE
#endif
#ifdef CONFIG_BT_ALLOCATION_FROM_SPIRAM_FIRST
#define UC_HEAP_ALLOCATION_FROM_SPIRAM_FIRST CONFIG_BT_ALLOCATION_FROM_SPIRAM_FIRST
#else
#define UC_HEAP_ALLOCATION_FROM_SPIRAM_FIRST FALSE
#endif
#ifdef CONFIG_BT_ABORT_WHEN_ALLOCATION_FAILS
#define UC_BT_ABORT_WHEN_ALLOCATION_FAILS CONFIG_BT_ABORT_WHEN_ALLOCATION_FAILS
#else
#define UC_BT_ABORT_WHEN_ALLOCATION_FAILS FALSE
#endif
//HCI LOG
#ifdef CONFIG_BT_HCI_LOG_DEBUG_EN
#define UC_BT_HCI_LOG_DEBUG_EN TRUE
#else
#define UC_BT_HCI_LOG_DEBUG_EN FALSE
#endif
//HCI LOG TO SPI
#ifdef CONFIG_BT_BLE_LOG_SPI_OUT_HCI_ENABLED
#define UC_BT_BLE_LOG_SPI_OUT_HCI_ENABLED TRUE
#else
#define UC_BT_BLE_LOG_SPI_OUT_HCI_ENABLED FALSE
#endif
//BLUEDROID LOG TO SPI
#ifdef CONFIG_BT_BLE_LOG_SPI_OUT_HOST_ENABLED
#define UC_BT_BLE_LOG_SPI_OUT_HOST_ENABLED TRUE
#else
#define UC_BT_BLE_LOG_SPI_OUT_HOST_ENABLED FALSE
#endif
#ifdef CONFIG_BT_HCI_LOG_DATA_BUFFER_SIZE
#define UC_BT_HCI_LOG_DATA_BUFFER_SIZE CONFIG_BT_HCI_LOG_DATA_BUFFER_SIZE
#else

View File

@@ -213,30 +213,42 @@ char *osi_strdup(const char *str)
void *osi_malloc_func(size_t size)
{
void *p = osi_malloc_base(size);
if (size != 0 && p == NULL) {
OSI_TRACE_ERROR("malloc failed (caller=%p size=%u)\n", __builtin_return_address(0), size);
#if HEAP_ALLOCATION_FAILS_ABORT
assert(0);
#endif
}
#if HEAP_MEMORY_DEBUG
void *p;
#if HEAP_ALLOCATION_FROM_SPIRAM_FIRST
p = heap_caps_malloc_prefer(size, 2, MALLOC_CAP_DEFAULT|MALLOC_CAP_SPIRAM, MALLOC_CAP_DEFAULT|MALLOC_CAP_INTERNAL);
#else
p = malloc(size);
#endif /* #if HEAP_ALLOCATION_FROM_SPIRAM_FIRST */
osi_mem_dbg_record(p, size, __func__, __LINE__);
return p;
#else
#if HEAP_ALLOCATION_FROM_SPIRAM_FIRST
return heap_caps_malloc_prefer(size, 2, MALLOC_CAP_DEFAULT|MALLOC_CAP_SPIRAM, MALLOC_CAP_DEFAULT|MALLOC_CAP_INTERNAL);
#else
return malloc(size);
#endif /* #if HEAP_ALLOCATION_FROM_SPIRAM_FIRST */
#endif /* #if HEAP_MEMORY_DEBUG */
}
void *osi_calloc_func(size_t size)
{
void *p = osi_calloc_base(size);
if (size != 0 && p == NULL) {
OSI_TRACE_ERROR("calloc failed (caller=%p size=%u)\n", __builtin_return_address(0), size);
#if HEAP_ALLOCATION_FAILS_ABORT
assert(0);
#endif
}
#if HEAP_MEMORY_DEBUG
void *p;
#if HEAP_ALLOCATION_FROM_SPIRAM_FIRST
p = heap_caps_calloc_prefer(1, size, 2, MALLOC_CAP_DEFAULT|MALLOC_CAP_SPIRAM, MALLOC_CAP_DEFAULT|MALLOC_CAP_INTERNAL);
#else
p = calloc(1, size);
#endif /* #if HEAP_ALLOCATION_FROM_SPIRAM_FIRST */
osi_mem_dbg_record(p, size, __func__, __LINE__);
return p;
#else
#if HEAP_ALLOCATION_FROM_SPIRAM_FIRST
return heap_caps_calloc_prefer(1, size, 2, MALLOC_CAP_DEFAULT|MALLOC_CAP_SPIRAM, MALLOC_CAP_DEFAULT|MALLOC_CAP_INTERNAL);
#else
return calloc(1, size);
#endif /* #if HEAP_ALLOCATION_FROM_SPIRAM_FIRST */
#endif /* #if HEAP_MEMORY_DEBUG */
}
void osi_free_func(void *ptr)

View File

@@ -29,15 +29,6 @@ void *osi_malloc_func(size_t size);
void *osi_calloc_func(size_t size);
void osi_free_func(void *ptr);
// Memory alloc function without print and assertion
#if HEAP_ALLOCATION_FROM_SPIRAM_FIRST
#define osi_malloc_base(size) heap_caps_malloc_prefer(size, 2, MALLOC_CAP_DEFAULT|MALLOC_CAP_SPIRAM, MALLOC_CAP_DEFAULT|MALLOC_CAP_INTERNAL)
#define osi_calloc_base(size) heap_caps_calloc_prefer(1, size, 2, MALLOC_CAP_DEFAULT|MALLOC_CAP_SPIRAM, MALLOC_CAP_DEFAULT|MALLOC_CAP_INTERNAL)
#else
#define osi_malloc_base(size) malloc((size))
#define osi_calloc_base(size) calloc(1, (size))
#endif /* #if HEAP_ALLOCATION_FROM_SPIRAM_FIRST */
#if HEAP_MEMORY_DEBUG
void osi_mem_dbg_init(void);
@@ -50,10 +41,13 @@ void osi_men_dbg_set_section_start(uint8_t index);
void osi_men_dbg_set_section_end(uint8_t index);
uint32_t osi_mem_dbg_get_max_size_section(uint8_t index);
#if HEAP_ALLOCATION_FROM_SPIRAM_FIRST
#define osi_malloc(size) \
({ \
void *p; \
p = osi_malloc_base(size); \
p = heap_caps_malloc_prefer(size, 2, \
MALLOC_CAP_DEFAULT|MALLOC_CAP_SPIRAM, \
MALLOC_CAP_DEFAULT|MALLOC_CAP_INTERNAL); \
osi_mem_dbg_record(p, size, __func__, __LINE__); \
(void *)p; \
})
@@ -61,11 +55,34 @@ uint32_t osi_mem_dbg_get_max_size_section(uint8_t index);
#define osi_calloc(size) \
({ \
void *p; \
p = osi_calloc_base(size); \
p = heap_caps_calloc_prefer(1, size, 2, \
MALLOC_CAP_DEFAULT|MALLOC_CAP_SPIRAM, \
MALLOC_CAP_DEFAULT|MALLOC_CAP_INTERNAL); \
osi_mem_dbg_record(p, size, __func__, __LINE__); \
(void *)p; \
})
#else
#define osi_malloc(size) \
({ \
void *p; \
p = malloc((size)); \
osi_mem_dbg_record(p, size, __func__, __LINE__); \
(void *)p; \
})
#define osi_calloc(size) \
({ \
void *p; \
p = calloc(1, (size)); \
osi_mem_dbg_record(p, size, __func__, __LINE__); \
(void *)p; \
})
#endif /* #if HEAP_ALLOCATION_FROM_SPIRAM_FIRST */
#if 0
#define osi_malloc(size) \
do { \
@@ -105,9 +122,13 @@ do { \
#else
// Memory alloc function with print and assertion when fails
#define osi_malloc(size) osi_malloc_func((size))
#define osi_calloc(size) osi_calloc_func((size))
#if HEAP_ALLOCATION_FROM_SPIRAM_FIRST
#define osi_malloc(size) heap_caps_malloc_prefer(size, 2, MALLOC_CAP_DEFAULT|MALLOC_CAP_SPIRAM, MALLOC_CAP_DEFAULT|MALLOC_CAP_INTERNAL)
#define osi_calloc(size) heap_caps_calloc_prefer(1, size, 2, MALLOC_CAP_DEFAULT|MALLOC_CAP_SPIRAM, MALLOC_CAP_DEFAULT|MALLOC_CAP_INTERNAL)
#else
#define osi_malloc(size) malloc((size))
#define osi_calloc(size) calloc(1, (size))
#endif /* #if HEAP_ALLOCATION_FROM_SPIRAM_FIRST */
#define osi_free(p) free((p))
#endif /* HEAP_MEMORY_DEBUG */

View File

@@ -76,8 +76,4 @@ void fixed_pkt_queue_unregister_dequeue(fixed_pkt_queue_t *queue);
void fixed_pkt_queue_process(fixed_pkt_queue_t *queue);
#ifdef __cplusplus
}
#endif
#endif

View File

@@ -25,7 +25,6 @@ struct pkt_queue *pkt_queue_create(void)
}
if (osi_mutex_new(&queue->lock) != 0) {
osi_free(queue);
return NULL;
}
struct pkt_queue_header *p = &queue->header;
STAILQ_INIT(p);

View File

@@ -271,10 +271,10 @@ _err:
}
for (int i = 0; i < thread->work_queue_num; i++) {
if (thread->work_queues && thread->work_queues[i]) {
if (thread->work_queues[i]) {
osi_work_queue_delete(thread->work_queues[i]);
thread->work_queues[i] = NULL;
}
thread->work_queues[i] = NULL;
}
if (thread->work_queues) {

View File

@@ -23,14 +23,6 @@ config BTDM_CTRL_BLE_MAX_CONN
BLE maximum connections of bluetooth controller.
Each connection uses 1KB static DRAM whenever the BT controller is enabled.
config BTDM_CTRL_BR_EDR_MIN_ENC_KEY_SZ_DFT
int "BR/EDR default minimum size of encryption key"
depends on BTDM_CTRL_MODE_BR_EDR_ONLY || BTDM_CTRL_MODE_BTDM
default 7
range 7 16
help
BR/EDR default minimum size of encryption key when start encryption.
config BTDM_CTRL_BR_EDR_MAX_ACL_CONN
int "BR/EDR ACL Max Connections"
depends on BTDM_CTRL_MODE_BR_EDR_ONLY || BTDM_CTRL_MODE_BTDM
@@ -147,11 +139,6 @@ config BTDM_CTRL_BLE_MAX_CONN_EFF
default BTDM_CTRL_BLE_MAX_CONN if BTDM_CTRL_MODE_BLE_ONLY || BTDM_CTRL_MODE_BTDM
default 0
config BTDM_CTRL_BR_EDR_MIN_ENC_KEY_SZ_DFT_EFF
int
default BTDM_CTRL_BR_EDR_MIN_ENC_KEY_SZ_DFT if BTDM_CTRL_MODE_BR_EDR_ONLY || BTDM_CTRL_MODE_BTDM
default 0
config BTDM_CTRL_BR_EDR_MAX_ACL_CONN_EFF
int
default BTDM_CTRL_BR_EDR_MAX_ACL_CONN if BTDM_CTRL_MODE_BR_EDR_ONLY || BTDM_CTRL_MODE_BTDM
@@ -275,10 +262,10 @@ menu "MODEM SLEEP Options"
the bluetooth low power clock source.
config BTDM_CTRL_LPCLK_SEL_EXT_32K_XTAL
bool "External 32kHz crystal/oscillator"
depends on RTC_CLK_SRC_EXT_CRYS || RTC_CLK_SRC_EXT_OSC
bool "External 32kHz crystal"
depends on RTC_CLK_SRC_EXT_CRYS
help
External 32kHz crystal/oscillator has a nominal frequency of 32.768kHz and provides good frequency
External 32kHz crystal has a nominal frequency of 32.768kHz and provides good frequency
stability. If used as Bluetooth low power clock, External 32kHz can support Bluetooth
modem sleep to be used with both DFS and light sleep.
endchoice
@@ -419,15 +406,6 @@ config BTDM_CTRL_SCAN_BACKOFF_UPPERLIMITMAX
minimize collision of scan request PDUs from nultiple scanners. If scan backoff is disabled, in active
scanning, scan request PDU will be sent every time when HW receives scannable ADV PDU.
config BTDM_CTRL_CHECK_CONNECT_IND_ACCESS_ADDRESS
bool "Enable enhanced Access Address check in CONNECT_IND"
default n
help
Enabling this option will add stricter verification of the Access Address in the CONNECT_IND PDU.
This improves security by ensuring that only connection requests with valid Access Addresses are accepted.
If disabled, only basic checks are applied, improving compatibility.
config BTDM_BLE_ADV_REPORT_FLOW_CTRL_SUPP
bool "BLE adv report flow control supported"
depends on (BTDM_CTRL_MODE_BTDM || BTDM_CTRL_MODE_BLE_ONLY)
@@ -462,49 +440,6 @@ config BTDM_BLE_ADV_REPORT_DISCARD_THRSHOLD
If you set `BTDM_BLE_ADV_REPORT_DISCARD_THRSHOLD` to a small value or printf every adv lost event, it
may cause adv packets lost more.
menu "BLE disconnect when instant passed"
config BTDM_BLE_LLCP_CONN_UPDATE
bool "BLE ACL connection update procedure"
depends on (BTDM_CTRL_MODE_BLE_ONLY || BTDM_CTRL_MODE_BTDM)
default n
help
If this option is enabled, Controller will terminate the connection
when instant passed during connection update procedure.
config BTDM_BLE_LLCP_CHAN_MAP_UPDATE
bool "BLE ACL channel map update procedure"
depends on (BTDM_CTRL_MODE_BLE_ONLY || BTDM_CTRL_MODE_BTDM)
default n
help
If this option is enabled, Controller will terminate the connection
when instant passed in channel map update procedure.
endmenu
config BTDM_BLE_CHAN_ASS_EN
bool "Enable channel assessment"
depends on (BTDM_CTRL_MODE_BLE_ONLY || BTDM_CTRL_MODE_BTDM)
default y
help
If this option is enabled, The Controller will records the communication quality
for each channel and then start a timer to check and update the channel map every 4 seconds.
config BTDM_BLE_PING_EN
bool "Enable LE Ping procedure"
depends on (BTDM_CTRL_MODE_BTDM || BTDM_CTRL_MODE_BLE_ONLY)
default y
help
If this option is disabled, The Controller will not start the LE authenticated payload timer.
This option is used for some compatibility problems related to LE ping procedure.
config BTDM_CTRL_CONTROLLER_DEBUG_MODE_1
visible if 0
bool "Enable Bluetooth controller debugging mode 1 (for internal use only)"
default n
depends on BT_ENABLED
help
Enables specific debugging features for the Bluetooth controller.
This option is strictly for internal debugging purposes and should not be enabled in production environments,
as it may impact performance and stability.
config BTDM_RESERVE_DRAM
hex

View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -48,10 +48,6 @@
#include "esp_rom_sys.h"
#include "hli_api.h"
#if CONFIG_BT_BLE_LOG_SPI_OUT_ENABLED
#include "ble_log/ble_log_spi_out.h"
#endif // CONFIG_BT_BLE_LOG_SPI_OUT_ENABLED
#if CONFIG_BT_ENABLED
/* Macro definition
@@ -100,7 +96,6 @@ do{\
#define OSI_VERSION 0x00010005
#define OSI_MAGIC_VALUE 0xFADEBEAD
#define BLE_CONTROLLER_MALLOC_CAPS (MALLOC_CAP_8BIT|MALLOC_CAP_DMA|MALLOC_CAP_INTERNAL)
/* Types definition
************************************************************************
*/
@@ -253,16 +248,6 @@ extern void config_bt_funcs_reset(void);
extern void config_ble_funcs_reset(void);
extern void config_btdm_funcs_reset(void);
#ifdef CONFIG_BT_BLUEDROID_ENABLED
extern void bt_stack_enableSecCtrlVsCmd(bool en);
#endif // CONFIG_BT_BLUEDROID_ENABLED
#if defined(CONFIG_BT_NIMBLE_ENABLED) || defined(CONFIG_BT_BLUEDROID_ENABLED)
extern void bt_stack_enableCoexVsCmd(bool en);
extern void scan_stack_enableAdvFlowCtrlVsCmd(bool en);
extern void adv_stack_enableClearLegacyAdvVsCmd(bool en);
extern void advFilter_stack_enableDupExcListVsCmd(bool en);
#endif // (CONFIG_BT_NIMBLE_ENABLED) || (CONFIG_BT_BLUEDROID_ENABLED)
/* Local Function Declare
*********************************************************************
*/
@@ -463,11 +448,7 @@ static DRAM_ATTR uint8_t btdm_lpcycle_us_frac = 0; // number of fractional bit f
#if CONFIG_BTDM_CTRL_MODEM_SLEEP_MODE_ORIG
// used low power clock
#if CONFIG_BTDM_CTRL_LPCLK_SEL_EXT_32K_XTAL
static DRAM_ATTR uint8_t btdm_lpclk_sel = ESP_BT_SLEEP_CLOCK_EXT_32K_XTAL;
#else
static DRAM_ATTR uint8_t btdm_lpclk_sel = ESP_BT_SLEEP_CLOCK_MAIN_XTAL;
#endif /* CONFIG_BTDM_CTRL_LPCLK_SEL_EXT_32K_XTAL */
static DRAM_ATTR uint8_t btdm_lpclk_sel;
#endif /* #ifdef CONFIG_BTDM_CTRL_MODEM_SLEEP_MODE_ORIG */
static DRAM_ATTR QueueHandle_t s_wakeup_req_sem = NULL;
@@ -887,21 +868,7 @@ static int IRAM_ATTR cause_sw_intr_to_core_wrapper(int core_id, int intr_no)
static void *malloc_internal_wrapper(size_t size)
{
return heap_caps_malloc(size, BLE_CONTROLLER_MALLOC_CAPS);
}
void *malloc_ble_controller_mem(size_t size)
{
void *p = heap_caps_malloc(size, BLE_CONTROLLER_MALLOC_CAPS);
if(p == NULL) {
ESP_LOGE(BTDM_LOG_TAG, "Malloc failed");
}
return p;
}
uint32_t get_ble_controller_free_heap_size(void)
{
return heap_caps_get_free_size(BLE_CONTROLLER_MALLOC_CAPS);
return heap_caps_malloc(size, MALLOC_CAP_8BIT|MALLOC_CAP_DMA|MALLOC_CAP_INTERNAL);
}
static int32_t IRAM_ATTR read_mac_wrapper(uint8_t mac[6])
@@ -1060,8 +1027,9 @@ static bool async_wakeup_request(int event)
switch (event) {
case BTDM_ASYNC_WAKEUP_REQ_HCI:
case BTDM_ASYNC_WAKEUP_REQ_CTRL_DISA:
btdm_in_wakeup_requesting_set(true);
// NO break
case BTDM_ASYNC_WAKEUP_REQ_CTRL_DISA:
if (!btdm_power_state_active()) {
do_wakeup_request = true;
@@ -1094,10 +1062,10 @@ static void async_wakeup_request_end(int event)
bool request_lock = false;
switch (event) {
case BTDM_ASYNC_WAKEUP_REQ_HCI:
case BTDM_ASYNC_WAKEUP_REQ_CTRL_DISA:
request_lock = true;
break;
case BTDM_ASYNC_WAKEUP_REQ_COEX:
case BTDM_ASYNC_WAKEUP_REQ_CTRL_DISA:
request_lock = false;
break;
default:
@@ -1362,8 +1330,7 @@ static esp_err_t esp_bt_controller_rom_mem_release(esp_bt_mode_t mode)
//already released
if (!(mode & btdm_dram_available_region[0].mode)) {
ESP_LOGW(BTDM_LOG_TAG, "%s already released, mode %d",__func__, mode);
return ESP_OK;
return ESP_ERR_INVALID_STATE;
}
for (int i = 0; i < sizeof(btdm_dram_available_region)/sizeof(btdm_dram_available_region_t); i++) {
@@ -1465,14 +1432,6 @@ esp_err_t esp_bt_mem_release(esp_bt_mode_t mode)
.name = "BT Controller Data"
};
/*
* Free data and BSS section for Bluetooth controller ROM code.
* Note that rom mem release must be performed before section _bt_data_start to _bt_data_end is released,
* otherwise `btdm_dram_available_region` will no longer be available when performing rom mem release and
* thus causing heap corruption.
*/
ret = esp_bt_controller_rom_mem_release(mode);
if (mode == ESP_BT_MODE_BTDM) {
/* Start by freeing Bluetooth BSS section */
if (ret == ESP_OK) {
@@ -1485,6 +1444,11 @@ esp_err_t esp_bt_mem_release(esp_bt_mode_t mode)
}
}
/* free data and BSS section for Bluetooth controller ROM code */
if (ret == ESP_OK) {
ret = esp_bt_controller_rom_mem_release(mode);
}
return ret;
}
@@ -1508,117 +1472,6 @@ static void hli_queue_setup_pinned_to_core(int core_id)
}
#endif /* CONFIG_BTDM_CTRL_HLI */
// init low-power control resources
static esp_err_t btdm_low_power_mode_init(void)
{
esp_err_t err = ESP_OK;
#ifdef CONFIG_PM_ENABLE
s_btdm_allow_light_sleep = false;
#endif
// set default sleep clock cycle and its fractional bits
btdm_lpcycle_us_frac = RTC_CLK_CAL_FRACT;
btdm_lpcycle_us = 2 << (btdm_lpcycle_us_frac);
#if CONFIG_BTDM_CTRL_MODEM_SLEEP_MODE_ORIG
if (btdm_lpclk_sel == ESP_BT_SLEEP_CLOCK_EXT_32K_XTAL) {
// check whether or not EXT_CRYS is working
if (rtc_clk_slow_src_get() == SOC_RTC_SLOW_CLK_SRC_XTAL32K) {
#ifdef CONFIG_PM_ENABLE
s_btdm_allow_light_sleep = true;
#endif
} else {
ESP_LOGW(BTDM_LOG_TAG, "32.768kHz XTAL not detected, fall back to main XTAL as Bluetooth sleep clock\n"
"light sleep mode will not be able to apply when bluetooth is enabled");
btdm_lpclk_sel = ESP_BT_SLEEP_CLOCK_MAIN_XTAL; // set default value
}
} else if (btdm_lpclk_sel != ESP_BT_SLEEP_CLOCK_MAIN_XTAL) {
assert(0);
}
bool select_src_ret __attribute__((unused));
bool set_div_ret __attribute__((unused));
if (btdm_lpclk_sel == ESP_BT_SLEEP_CLOCK_MAIN_XTAL) {
select_src_ret = btdm_lpclk_select_src(BTDM_LPCLK_SEL_XTAL);
set_div_ret = btdm_lpclk_set_div(esp_clk_xtal_freq() * 2 / MHZ - 1);
assert(select_src_ret && set_div_ret);
btdm_lpcycle_us_frac = RTC_CLK_CAL_FRACT;
btdm_lpcycle_us = 2 << (btdm_lpcycle_us_frac);
} else { // btdm_lpclk_sel == BTDM_LPCLK_SEL_XTAL32K
select_src_ret = btdm_lpclk_select_src(BTDM_LPCLK_SEL_XTAL32K);
set_div_ret = btdm_lpclk_set_div(0);
assert(select_src_ret && set_div_ret);
btdm_lpcycle_us_frac = RTC_CLK_CAL_FRACT;
btdm_lpcycle_us = (RTC_CLK_CAL_FRACT > 15) ? (1000000 << (RTC_CLK_CAL_FRACT - 15)) :
(1000000 >> (15 - RTC_CLK_CAL_FRACT));
assert(btdm_lpcycle_us != 0);
}
btdm_controller_set_sleep_mode(BTDM_MODEM_SLEEP_MODE_ORIG);
#elif CONFIG_BTDM_CTRL_MODEM_SLEEP_MODE_EVED
btdm_controller_set_sleep_mode(BTDM_MODEM_SLEEP_MODE_EVED);
#else
btdm_controller_set_sleep_mode(BTDM_MODEM_SLEEP_MODE_NONE);
#endif
#ifdef CONFIG_PM_ENABLE
if (!s_btdm_allow_light_sleep) {
if ((err = esp_pm_lock_create(ESP_PM_NO_LIGHT_SLEEP, 0, "btLS", &s_light_sleep_pm_lock)) != ESP_OK) {
return err;
}
}
if ((err = esp_pm_lock_create(ESP_PM_APB_FREQ_MAX, 0, "bt", &s_pm_lock)) != ESP_OK) {
return err;
}
esp_timer_create_args_t create_args = {
.callback = btdm_slp_tmr_callback,
.arg = NULL,
.name = "btSlp"
};
if ((err = esp_timer_create(&create_args, &s_btdm_slp_tmr)) != ESP_OK) {
return err;
}
s_pm_lock_acquired = true;
#endif
return err;
}
esp_bt_sleep_clock_t esp_bt_get_lpclk_src(void)
{
#if CONFIG_BTDM_CTRL_MODEM_SLEEP_MODE_ORIG
if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_INITED &&
btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
return ESP_BT_SLEEP_CLOCK_NONE;
}
return btdm_lpclk_sel;
#else
return ESP_BT_SLEEP_CLOCK_NONE;
#endif
}
esp_err_t esp_bt_set_lpclk_src(esp_bt_sleep_clock_t lpclk)
{
#if CONFIG_BTDM_CTRL_MODEM_SLEEP_MODE_ORIG
if (lpclk < ESP_BT_SLEEP_CLOCK_MAIN_XTAL || lpclk > ESP_BT_SLEEP_CLOCK_EXT_32K_XTAL) {
return ESP_ERR_INVALID_ARG;
}
if (btdm_controller_status == ESP_BT_CONTROLLER_STATUS_INITED ||
btdm_controller_status == ESP_BT_CONTROLLER_STATUS_ENABLED) {
ESP_LOGW(BTDM_LOG_TAG, "Please set the Bluetooth sleep clock source before Bluetooth initialization");
return ESP_ERR_INVALID_STATE;
}
btdm_lpclk_sel = lpclk;
return ESP_OK;
#else
return ESP_ERR_NOT_SUPPORTED;
#endif
}
esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
{
esp_err_t err;
@@ -1681,7 +1534,58 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
btdm_controller_mem_init();
periph_module_enable(PERIPH_BT_MODULE);
periph_module_reset(PERIPH_BT_MODULE);
#ifdef CONFIG_PM_ENABLE
s_btdm_allow_light_sleep = false;
#endif
// set default sleep clock cycle and its fractional bits
btdm_lpcycle_us_frac = RTC_CLK_CAL_FRACT;
btdm_lpcycle_us = 2 << (btdm_lpcycle_us_frac);
#if CONFIG_BTDM_CTRL_MODEM_SLEEP_MODE_ORIG
btdm_lpclk_sel = BTDM_LPCLK_SEL_XTAL; // set default value
#if CONFIG_BTDM_CTRL_LPCLK_SEL_EXT_32K_XTAL
// check whether or not EXT_CRYS is working
if (rtc_clk_slow_src_get() == SOC_RTC_SLOW_CLK_SRC_XTAL32K) {
btdm_lpclk_sel = BTDM_LPCLK_SEL_XTAL32K; // External 32kHz XTAL
#ifdef CONFIG_PM_ENABLE
s_btdm_allow_light_sleep = true;
#endif
} else {
ESP_LOGW(BTDM_LOG_TAG, "32.768kHz XTAL not detected, fall back to main XTAL as Bluetooth sleep clock\n"
"light sleep mode will not be able to apply when bluetooth is enabled");
btdm_lpclk_sel = BTDM_LPCLK_SEL_XTAL; // set default value
}
#else
btdm_lpclk_sel = BTDM_LPCLK_SEL_XTAL; // set default value
#endif
bool select_src_ret __attribute__((unused));
bool set_div_ret __attribute__((unused));
if (btdm_lpclk_sel == BTDM_LPCLK_SEL_XTAL) {
select_src_ret = btdm_lpclk_select_src(BTDM_LPCLK_SEL_XTAL);
set_div_ret = btdm_lpclk_set_div(esp_clk_xtal_freq() * 2 / MHZ - 1);
assert(select_src_ret && set_div_ret);
btdm_lpcycle_us_frac = RTC_CLK_CAL_FRACT;
btdm_lpcycle_us = 2 << (btdm_lpcycle_us_frac);
} else { // btdm_lpclk_sel == BTDM_LPCLK_SEL_XTAL32K
select_src_ret = btdm_lpclk_select_src(BTDM_LPCLK_SEL_XTAL32K);
set_div_ret = btdm_lpclk_set_div(0);
assert(select_src_ret && set_div_ret);
btdm_lpcycle_us_frac = RTC_CLK_CAL_FRACT;
btdm_lpcycle_us = (RTC_CLK_CAL_FRACT > 15) ? (1000000 << (RTC_CLK_CAL_FRACT - 15)) :
(1000000 >> (15 - RTC_CLK_CAL_FRACT));
assert(btdm_lpcycle_us != 0);
}
btdm_controller_set_sleep_mode(BTDM_MODEM_SLEEP_MODE_ORIG);
#elif CONFIG_BTDM_CTRL_MODEM_SLEEP_MODE_EVED
btdm_controller_set_sleep_mode(BTDM_MODEM_SLEEP_MODE_EVED);
#else
btdm_controller_set_sleep_mode(BTDM_MODEM_SLEEP_MODE_NONE);
#endif
#if CONFIG_BTDM_CTRL_HCI_UART_FLOW_CTRL_EN
sdk_config_set_uart_flow_ctrl_enable(true);
@@ -1689,39 +1593,38 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
sdk_config_set_uart_flow_ctrl_enable(false);
#endif
if ((err = btdm_low_power_mode_init()) != ESP_OK) {
ESP_LOGE(BTDM_LOG_TAG, "Low power module initialization failed");
#ifdef CONFIG_PM_ENABLE
if (!s_btdm_allow_light_sleep) {
if ((err = esp_pm_lock_create(ESP_PM_NO_LIGHT_SLEEP, 0, "btLS", &s_light_sleep_pm_lock)) != ESP_OK) {
goto error;
}
}
if ((err = esp_pm_lock_create(ESP_PM_APB_FREQ_MAX, 0, "bt", &s_pm_lock)) != ESP_OK) {
goto error;
}
esp_timer_create_args_t create_args = {
.callback = btdm_slp_tmr_callback,
.arg = NULL,
.name = "btSlp"
};
if ((err = esp_timer_create(&create_args, &s_btdm_slp_tmr)) != ESP_OK) {
goto error;
}
s_pm_lock_acquired = true;
#endif
#if CONFIG_SW_COEXIST_ENABLE
coex_init();
#endif
#if CONFIG_BT_BLE_LOG_SPI_OUT_ENABLED
ble_log_spi_out_init();
#endif // CONFIG_BT_BLE_LOG_SPI_OUT_ENABLED
btdm_cfg_mask = btdm_config_mask_load();
err = btdm_controller_init(btdm_cfg_mask, cfg);
if (err != 0) {
ESP_LOGE(BTDM_LOG_TAG, "%s %d\n",__func__,err);
if (btdm_controller_init(btdm_cfg_mask, cfg) != 0) {
err = ESP_ERR_NO_MEM;
goto error;
}
#ifdef CONFIG_BT_BLUEDROID_ENABLED
bt_stack_enableSecCtrlVsCmd(true);
#endif // CONFIG_BT_BLUEDROID_ENABLED
#if defined(CONFIG_BT_NIMBLE_ENABLED) || defined(CONFIG_BT_BLUEDROID_ENABLED)
bt_stack_enableCoexVsCmd(true);
scan_stack_enableAdvFlowCtrlVsCmd(true);
adv_stack_enableClearLegacyAdvVsCmd(true);
advFilter_stack_enableDupExcListVsCmd(true);
#endif // (CONFIG_BT_NIMBLE_ENABLED) || (CONFIG_BT_BLUEDROID_ENABLED)
btdm_controller_status = ESP_BT_CONTROLLER_STATUS_INITED;
return ESP_OK;
@@ -1739,30 +1642,17 @@ esp_err_t esp_bt_controller_deinit(void)
return ESP_ERR_INVALID_STATE;
}
#if CONFIG_BT_BLE_LOG_SPI_OUT_ENABLED
ble_log_spi_out_deinit();
#endif // CONFIG_BT_BLE_LOG_SPI_OUT_ENABLED
btdm_controller_deinit();
bt_controller_deinit_internal();
#ifdef CONFIG_BT_BLUEDROID_ENABLED
bt_stack_enableSecCtrlVsCmd(false);
#endif // CONFIG_BT_BLUEDROID_ENABLED
#if defined(CONFIG_BT_NIMBLE_ENABLED) || defined(CONFIG_BT_BLUEDROID_ENABLED)
bt_stack_enableCoexVsCmd(false);
scan_stack_enableAdvFlowCtrlVsCmd(false);
adv_stack_enableClearLegacyAdvVsCmd(false);
advFilter_stack_enableDupExcListVsCmd(false);
#endif // (CONFIG_BT_NIMBLE_ENABLED) || (CONFIG_BT_BLUEDROID_ENABLED)
return ESP_OK;
}
// deinit low power control resources
static void btdm_low_power_mode_deinit(void)
static void bt_controller_deinit_internal(void)
{
periph_module_disable(PERIPH_BT_MODULE);
#ifdef CONFIG_PM_ENABLE
if (!s_btdm_allow_light_sleep) {
esp_pm_lock_delete(s_light_sleep_pm_lock);
@@ -1783,16 +1673,6 @@ static void btdm_low_power_mode_deinit(void)
s_pm_lock_acquired = false;
#endif
btdm_lpcycle_us = 0;
btdm_controller_set_sleep_mode(BTDM_MODEM_SLEEP_MODE_NONE);
}
static void bt_controller_deinit_internal(void)
{
periph_module_disable(PERIPH_BT_MODULE);
btdm_low_power_mode_deinit();
if (s_wakeup_req_sem) {
semphr_delete_wrapper(s_wakeup_req_sem);
s_wakeup_req_sem = NULL;
@@ -1805,6 +1685,9 @@ static void bt_controller_deinit_internal(void)
btdm_controller_status = ESP_BT_CONTROLLER_STATUS_IDLE;
btdm_lpcycle_us = 0;
btdm_controller_set_sleep_mode(BTDM_MODEM_SLEEP_MODE_NONE);
esp_bt_power_domain_off();
esp_phy_modem_deinit();
@@ -1915,7 +1798,6 @@ esp_err_t esp_bt_controller_disable(void)
while (!btdm_power_state_active()) {
esp_rom_delay_us(1000);
}
async_wakeup_request_end(BTDM_ASYNC_WAKEUP_REQ_CTRL_DISA);
}
btdm_controller_disable();
@@ -2028,7 +1910,7 @@ esp_err_t esp_bredr_sco_datapath_set(esp_sco_data_path_t data_path)
return ESP_OK;
}
esp_err_t esp_ble_scan_duplicate_list_flush(void)
esp_err_t esp_ble_scan_dupilcate_list_flush(void)
{
if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
return ESP_ERR_INVALID_STATE;
@@ -2037,11 +1919,6 @@ esp_err_t esp_ble_scan_duplicate_list_flush(void)
return ESP_OK;
}
esp_err_t esp_ble_scan_dupilcate_list_flush(void)
{
return esp_ble_scan_duplicate_list_flush();
}
/**
* This function re-write controller's function,
* As coredump can not show parameters in function which is in a .a file.

View File

@@ -2,15 +2,15 @@
menu "HCI Config"
choice BT_LE_HCI_INTERFACE
prompt "HCI mode"
prompt "Select HCI interface"
default BT_LE_HCI_INTERFACE_USE_RAM
config BT_LE_HCI_INTERFACE_USE_RAM
bool "VHCI"
bool "ram"
help
Use RAM as HCI interface
config BT_LE_HCI_INTERFACE_USE_UART
bool "UART(H4)"
bool "uart"
help
Use UART as HCI interface
endchoice
@@ -73,26 +73,12 @@ menu "HCI Config"
UART_PARITY_ODD
endchoice
config BT_LE_HCI_UART_RX_BUFFER_SIZE
int "The size of rx ring buffer memory"
depends on !BT_LE_HCI_INTERFACE_USE_RAM
default 512
config BT_LE_HCI_UART_TASK_STACK_SIZE
int "HCI uart task stack size"
depends on BT_LE_HCI_INTERFACE_USE_UART
default 1000
help
The size of rx ring buffer memory
config BT_LE_HCI_UART_TX_BUFFER_SIZE
int "The size of tx ring buffer memory"
depends on !BT_LE_HCI_INTERFACE_USE_RAM
default 256
help
The size of tx ring buffer memory
config BT_LE_HCI_TRANS_TASK_STACK_SIZE
int "HCI transport task stack size"
depends on !BT_LE_HCI_INTERFACE_USE_RAM
default 1024
help
This configures stack size of hci transport task
Set the size of uart task stack
endmenu
config BT_LE_CONTROLLER_NPL_OS_PORTING_SUPPORT
@@ -109,100 +95,86 @@ menuconfig BT_LE_50_FEATURE_SUPPORT
help
Enable BLE 5 feature
if BT_LE_50_FEATURE_SUPPORT
config BT_LE_LL_CFG_FEAT_LE_2M_PHY
bool "Enable 2M Phy"
depends on BT_LE_50_FEATURE_SUPPORT
config BT_LE_LL_CFG_FEAT_LE_2M_PHY
bool "Enable 2M Phy"
depends on BT_LE_50_FEATURE_SUPPORT
default y
help
Enable 2M-PHY
config BT_LE_LL_CFG_FEAT_LE_CODED_PHY
bool "Enable coded Phy"
depends on BT_LE_50_FEATURE_SUPPORT
default y
help
Enable coded-PHY
config BT_LE_EXT_ADV
bool "Enable extended advertising"
depends on BT_LE_50_FEATURE_SUPPORT
default y
help
Enable this option to do extended advertising. Extended advertising
will be supported from BLE 5.0 onwards.
if BT_LE_EXT_ADV
config BT_LE_MAX_EXT_ADV_INSTANCES
int "Maximum number of extended advertising instances."
range 0 4
default 1
depends on BT_LE_EXT_ADV
help
Change this option to set maximum number of extended advertising
instances. Minimum there is always one instance of
advertising. Enter how many more advertising instances you
want.
Each extended advertising instance will take about 0.5k DRAM.
config BT_LE_EXT_ADV_MAX_SIZE
int "Maximum length of the advertising data."
range 0 1650
default 1650
depends on BT_LE_EXT_ADV
help
Defines the length of the extended adv data. The value should not
exceed 1650.
config BT_LE_ENABLE_PERIODIC_ADV
bool "Enable periodic advertisement."
default y
depends on BT_LE_EXT_ADV
help
Enable this option to start periodic advertisement.
config BT_LE_PERIODIC_ADV_SYNC_TRANSFER
bool "Enable Transfer Sync Events"
depends on BT_LE_ENABLE_PERIODIC_ADV
default y
help
Enable 2M-PHY
This enables controller transfer periodic sync events to host
config BT_LE_LL_CFG_FEAT_LE_CODED_PHY
bool "Enable coded Phy"
depends on BT_LE_50_FEATURE_SUPPORT
default y
help
Enable coded-PHY
config BT_LE_EXT_ADV
bool "Enable extended advertising"
depends on BT_LE_50_FEATURE_SUPPORT
default y
help
Enable this option to do extended advertising. Extended advertising
will be supported from BLE 5.0 onwards.
if BT_LE_EXT_ADV
config BT_LE_MAX_EXT_ADV_INSTANCES
int "Maximum number of extended advertising instances."
range 0 4
default 1
depends on BT_LE_EXT_ADV
help
Change this option to set maximum number of extended advertising
instances. Minimum there is always one instance of
advertising. Enter how many more advertising instances you
want.
Each extended advertising instance will take about 0.5k DRAM.
config BT_LE_EXT_ADV_MAX_SIZE
int "Maximum length of the advertising data."
range 0 1650
default 1650
depends on BT_LE_EXT_ADV
help
Defines the length of the extended adv data. The value should not
exceed 1650.
config BT_LE_ENABLE_PERIODIC_ADV
bool "Enable periodic advertisement."
default y
depends on BT_LE_EXT_ADV
help
Enable this option to start periodic advertisement.
config BT_LE_PERIODIC_ADV_SYNC_TRANSFER
bool "Enable Transfer Sync Events"
depends on BT_LE_ENABLE_PERIODIC_ADV
default y
help
This enables controller transfer periodic sync events to host
endif
config BT_LE_EXT_SCAN
bool "Enable extended scanning"
depends on BT_LE_50_FEATURE_SUPPORT && BT_LE_ROLE_OBSERVER_ENABLE
default y
help
Enable this option to do extended scanning.
config BT_LE_ENABLE_PERIODIC_SYNC
bool "Enable periodic sync"
default y
depends on BT_LE_EXT_SCAN
help
Enable this option to receive periodic advertisement.
if BT_LE_ENABLE_PERIODIC_SYNC
config BT_LE_MAX_PERIODIC_SYNCS
int "Maximum number of periodic advertising syncs"
range 0 3
default 1 if BT_LE_ENABLE_PERIODIC_ADV
default 0
help
Set this option to set the upper limit for number of periodic sync
connections. This should be less than maximum connections allowed by
controller.
config BT_LE_MAX_PERIODIC_ADVERTISER_LIST
int "Maximum number of periodic advertiser list"
range 1 5
default 5
help
Set this option to set the upper limit for number of periodic advertiser list.
endif
endif
config BT_LE_MAX_PERIODIC_SYNCS
int "Maximum number of periodic advertising syncs"
depends on BT_LE_50_FEATURE_SUPPORT && !BT_NIMBLE_ENABLED
range 0 3
default 1 if BT_LE_ENABLE_PERIODIC_ADV
default 0
help
Set this option to set the upper limit for number of periodic sync
connections. This should be less than maximum connections allowed by
controller.
config BT_LE_MAX_PERIODIC_ADVERTISER_LIST
int "Maximum number of periodic advertiser list"
depends on BT_LE_50_FEATURE_SUPPORT && !BT_NIMBLE_ENABLED
range 1 5
default 5
help
Set this option to set the upper limit for number of periodic advertiser list.
menu "Memory Settings"
depends on !BT_NIMBLE_ENABLED
@@ -308,33 +280,6 @@ config BT_LE_CONTROLLER_LOG_DUMP_ONLY
help
Only operate in dump mode
config BT_LE_CONTROLLER_LOG_SPI_OUT_ENABLED
bool "Output ble controller logs to SPI bus (Experimental)"
depends on BT_LE_CONTROLLER_LOG_ENABLED
depends on !BT_LE_CONTROLLER_LOG_DUMP_ONLY
select BT_BLE_LOG_SPI_OUT_ENABLED
default n
help
Output ble controller logs to SPI bus
config BT_LE_CONTROLLER_LOG_STORAGE_ENABLE
bool "Store ble controller logs to flash(Experimental)"
depends on !BT_LE_CONTROLLER_LOG_DUMP_ONLY
depends on BT_LE_CONTROLLER_LOG_ENABLED
default n
help
Store ble controller logs to flash memory.
config BT_LE_CONTROLLER_LOG_PARTITION_SIZE
int "size of ble controller log partition(Multiples of 4K)"
depends on BT_LE_CONTROLLER_LOG_STORAGE_ENABLE
default 65536
help
The size of ble controller log partition shall be a multiples of 4K.
The name of log partition shall be "bt_ctrl_log".
The partition type shall be ESP_PARTITION_TYPE_DATA.
The partition sub_type shall be ESP_PARTITION_SUBTYPE_ANY.
config BT_LE_LOG_CTRL_BUF1_SIZE
int "size of the first BLE controller LOG buffer"
depends on BT_LE_CONTROLLER_LOG_ENABLED
@@ -356,19 +301,6 @@ config BT_LE_LOG_HCI_BUF_SIZE
help
Configure the size of the BLE HCI LOG buffer.
config BT_LE_CONTROLLER_LOG_WRAP_PANIC_HANDLER_ENABLE
bool "Enable wrap panic handler"
depends on BT_LE_CONTROLLER_LOG_ENABLED
default n
help
Wrap esp_panic_handler to get controller logs when PC pointer exception crashes.
config BT_LE_CONTROLLER_LOG_TASK_WDT_USER_HANDLER_ENABLE
bool "Enable esp_task_wdt_isr_user_handler implementation"
depends on BT_LE_CONTROLLER_LOG_ENABLED
default n
help
Implement esp_task_wdt_isr_user_handler to get controller logs when task wdt issue is triggered.
config BT_LE_LL_RESOLV_LIST_SIZE
int "BLE LL Resolving list size"
range 1 5
@@ -417,6 +349,7 @@ config BT_LE_CRYPTO_STACK_MBEDTLS
bool "Override TinyCrypt with mbedTLS for crypto computations"
default y
depends on !BT_NIMBLE_ENABLED
select MBEDTLS_ECP_RESTARTABLE
select MBEDTLS_CMAC_C
help
Enable this option to choose mbedTLS instead of TinyCrypt for crypto
@@ -559,10 +492,6 @@ config BT_LE_TX_CCA_ENABLED
help
Enable CCA feature to cancel sending the packet if the signal power is stronger than CCA threshold.
config BT_LE_DTM_ENABLED
bool "Enable Direct Test Mode (DTM) feature"
default n
config BT_LE_CCA_RSSI_THRESH
int "CCA RSSI threshold value"
depends on BT_LE_TX_CCA_ENABLED
@@ -571,10 +500,6 @@ config BT_LE_CCA_RSSI_THRESH
help
Power threshold of CCA in unit of -1 dBm.
config BT_LE_FEAT_LL_ENCRYPTION
bool "Enable controller ACL encryption"
default y
config BT_LE_ROLE_CENTROL_ENABLE
bool "Enable BLE Centrol role function"
depends on !BT_NIMBLE_ENABLED
@@ -602,90 +527,3 @@ config BT_LE_ROLE_OBSERVER_ENABLE
default y
help
Enable observer role function.
choice BT_LE_DFT_TX_POWER_LEVEL_DBM
prompt "BLE default Tx power level(dBm)"
default BT_LE_DFT_TX_POWER_LEVEL_P9
help
Specify default Tx power level(dBm).
config BT_LE_DFT_TX_POWER_LEVEL_N24
bool "-24dBm"
config BT_LE_DFT_TX_POWER_LEVEL_N21
bool "-21dBm"
config BT_LE_DFT_TX_POWER_LEVEL_N18
bool "-18dBm"
config BT_LE_DFT_TX_POWER_LEVEL_N15
bool "-15dBm"
config BT_LE_DFT_TX_POWER_LEVEL_N12
bool "-12dBm"
config BT_LE_DFT_TX_POWER_LEVEL_N9
bool "-9dBm"
config BT_LE_DFT_TX_POWER_LEVEL_N6
bool "-6dBm"
config BT_LE_DFT_TX_POWER_LEVEL_N3
bool "-3dBm"
config BT_LE_DFT_TX_POWER_LEVEL_N0
bool "0dBm"
config BT_LE_DFT_TX_POWER_LEVEL_P3
bool "+3dBm"
config BT_LE_DFT_TX_POWER_LEVEL_P6
bool "+6dBm"
config BT_LE_DFT_TX_POWER_LEVEL_P9
bool "+9dBm"
config BT_LE_DFT_TX_POWER_LEVEL_P12
bool "+12dBm"
config BT_LE_DFT_TX_POWER_LEVEL_P15
bool "+15dBm"
config BT_LE_DFT_TX_POWER_LEVEL_P18
bool "+18dBm"
config BT_LE_DFT_TX_POWER_LEVEL_P20
bool "+20dBm"
endchoice
config BT_LE_DFT_TX_POWER_LEVEL_DBM_EFF
int
default -24 if BT_LE_DFT_TX_POWER_LEVEL_N24
default -21 if BT_LE_DFT_TX_POWER_LEVEL_N21
default -18 if BT_LE_DFT_TX_POWER_LEVEL_N18
default -15 if BT_LE_DFT_TX_POWER_LEVEL_N15
default -12 if BT_LE_DFT_TX_POWER_LEVEL_N12
default -9 if BT_LE_DFT_TX_POWER_LEVEL_N9
default -6 if BT_LE_DFT_TX_POWER_LEVEL_N6
default -3 if BT_LE_DFT_TX_POWER_LEVEL_N3
default 0 if BT_LE_DFT_TX_POWER_LEVEL_N0
default 3 if BT_LE_DFT_TX_POWER_LEVEL_P3
default 6 if BT_LE_DFT_TX_POWER_LEVEL_P6
default 9 if BT_LE_DFT_TX_POWER_LEVEL_P9
default 12 if BT_LE_DFT_TX_POWER_LEVEL_P12
default 15 if BT_LE_DFT_TX_POWER_LEVEL_P15
default 18 if BT_LE_DFT_TX_POWER_LEVEL_P18
default 20 if BT_LE_DFT_TX_POWER_LEVEL_P20
default 0
config BT_CTRL_RUN_IN_FLASH_ONLY
bool "Reduce BLE IRAM usage (READ DOCS FIRST) (EXPERIMENTAL)"
default n
help
Move most IRAM into flash. This will increase the usage of flash and reduce ble performance.
Because the code is moved to the flash, the execution speed of the code is reduced.
To have a small impact on performance, you need to enable flash suspend (SPI_FLASH_AUTO_SUSPEND).
- Only one Tx-Rx can be performed in each connection interval. Therefore, reduce the connection interval
as much as possible to improve the throughput. If you want higher connection performance, you can
enable BT_LE_PLACE_CONN_RELATED_INTO_IRAM to put the connection-related code into iram.
- For HCI_LE_Extended_Create_Connection command, only 1M phy's connection parameters will be applied.
Other phys' will be ignored.
- For extended scanning, we may be unable to receive the extended adv with 300us MAFS.
config BT_LE_PLACE_CONN_RELATED_INTO_IRAM
bool "Place the connection-related code into IRAM"
depends on BT_CTRL_RUN_IN_FLASH_ONLY
default n
config BT_LE_CTRL_CHECK_CONNECT_IND_ACCESS_ADDRESS
bool "Enable enhanced Access Address check in CONNECT_IND"
default n
help
Enabling this option will add stricter verification of the Access Address in the CONNECT_IND PDU.
This improves security by ensuring that only connection requests with valid Access Addresses are accepted.
If disabled, only basic checks are applied, improving compatibility.

Some files were not shown because too many files have changed in this diff Show More