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180 Commits

Author SHA1 Message Date
Jiang Jiang Jian
ae876915ec Merge branch 'fix/backport_wifi_fixes_v5.3' into 'release/v5.3'
fix(wifi): Add back WIFI_AUTH_WPA3_EXT_PSK and WIFI_AUTH_WPA3_EXT_PSK_MIXED_MODE

See merge request espressif/esp-idf!31218
2024-06-03 10:36:46 +08:00
Sarvesh Bodakhe
e22c101034 fix(wifi): Add back WIFI_AUTH_WPA3_EXT_PSK and WIFI_AUTH_WPA3_EXT_PSK_MIXED_MODE
Add back above authmodes instead of removing and merging them with WIFI_AUTH_WPA3_PSK
in minor releases during v5.x.

These authmodes will be removed from v6.0
2024-05-31 13:50:54 +08:00
wangtao@espressif.com
63f019565b fix(wifi): fix send mgmt err when eapol process 2024-05-31 13:50:12 +08:00
Jiang Jiang Jian
3f632df143 Merge branch 'ci/update-known-failed-cases-file-name(v5.3)' into 'release/v5.3'
ci: add 5.3 known failed cases file

See merge request espressif/esp-idf!30978
2024-05-22 07:42:26 +08:00
Jiang Jiang Jian
5ec2be4ba3 Merge branch 'fix/websocket_first_packet_v5.3' into 'release/v5.3'
fix(ws_transport): fixed `server-key` corruption (backport v5.3)

See merge request espressif/esp-idf!30963
2024-05-22 07:41:55 +08:00
Jiang Jiang Jian
1d3d63c438 Merge branch 'bugfix/fix_resetting_redirect_counter_v5.3' into 'release/v5.3'
fix: reset redirect counter for using same handler (v5.3)

See merge request espressif/esp-idf!30935
2024-05-22 07:41:24 +08:00
Jiang Jiang Jian
e7ba614a04 Merge branch 'set_gdb_remotetimeout_v5.3' into 'release/v5.3'
tools(gdbinit): set remote timeout for the gdb connection (v5.3)

See merge request espressif/esp-idf!30804
2024-05-22 07:40:07 +08:00
Jiang Jiang Jian
dbf757118a Merge branch 'bugfix/free_controlle_memory_in_init_fail_v5.3' into 'release/v5.3'
fix(nimble): Free controller memory if init fails (v5.3)

See merge request espressif/esp-idf!30749
2024-05-22 07:39:47 +08:00
Jiang Jiang Jian
0c2c962b19 Merge branch 'coredump_sanity_check_v5.3' into 'release/v5.3'
fix(coredump): increase sanity check before get summary (v5.3)

See merge request espressif/esp-idf!30527
2024-05-22 07:39:23 +08:00
Jiang Jiang Jian
1f0d27a2c6 Merge branch 'fix/pytest_session_dir_v5.3' into 'release/v5.3'
ci: apply new fix in pytest-embedded 1.10 (v5.3)

See merge request espressif/esp-idf!30676
2024-05-22 07:38:23 +08:00
Jiang Jiang Jian
1aaae85ad2 Merge branch 'bugfix/esp32c6eco1_coex_ble_deinit_wifi_bcn_timeout_v5.3' into 'release/v5.3'
backport v5.3: fix the issue where deinit ble in a coexist scenario causes the wifi mac tsf counter to stop

See merge request espressif/esp-idf!30981
2024-05-22 07:37:41 +08:00
Jiang Jiang Jian
85048f35e3 Merge branch 'bugfix/stop_tg_wdt_in_xpd_xtal_lightsleep_v5.3' into 'release/v5.3'
fix(esp_hw_support): stop tg wdt in xpd xtal lightsleep (v5.3)

See merge request espressif/esp-idf!30992
2024-05-22 07:37:32 +08:00
Jiang Jiang Jian
1a7c782905 Merge branch 'fix/backport_wifi_fixes_v5.3' into 'release/v5.3'
Fix(wifi):backport wifi fixes v5.3

See merge request espressif/esp-idf!30994
2024-05-22 07:37:14 +08:00
Jiang Jiang Jian
cf4cf23741 Merge branch 'contrib/github_pr_13560_v5.3' into 'release/v5.3'
esp_eth: DP83848: correct link detection to use BMSR (GitHub PR) (v5.3)

See merge request espressif/esp-idf!30450
2024-05-21 23:42:21 +08:00
Jiang Jiang Jian
236556d1ea Merge branch 'contrib/github_pr_13669_v5.3' into 'release/v5.3'
docs: clarify ESP_RETURN_ON_ERROR result (GitHub PR) (v5.3)

See merge request espressif/esp-idf!30405
2024-05-21 23:41:51 +08:00
Jiang Jiang Jian
07669b8012 Merge branch 'fix/core1_access_cache_when_core0_close_cache_during_sleep_v5.3' into 'release/v5.3'
fix(esp_system): fix core1 access cache when core0 close cache during sleep(backport v5.3)

See merge request espressif/esp-idf!30942
2024-05-21 23:41:17 +08:00
Li Shuai
e13bb3d734 fix(esp32c6): fix the issue of except wifi state caused by the missing mac retention config 2024-05-21 21:34:30 +08:00
morris
bb4ba96545 Merge branch 'feat/axi_icm_qos_v5.3' into 'release/v5.3'
feat(axi_icm): AXI interconnect QoS (v5.3)

See merge request espressif/esp-idf!30980
2024-05-21 21:24:36 +08:00
liuning
1bf9c822f9 feat(wifi): support coex pwr 2024-05-21 20:57:46 +08:00
wangtao@espressif.com
bb466097e5 feat(wifi): add softap csa&dtim&wait_bcast_data setting and ignore err nodata 2024-05-21 20:57:06 +08:00
wuzhenghui
8b369072f9 fix(esp_hw_support/sleep): stop TG0/TG1 watchdog if XTAL not power down in lightsleep 2024-05-21 20:30:28 +08:00
wuzhenghui
d91dfe3510 change(esp_hw_support/sleep): improve esp32c3 systimer stall bug workaround 2024-05-21 20:30:24 +08:00
Li Shuai
2396dc5ff7 fix(wifi): fix the issue where deinit ble in a coexist scenario causes the wifi mac tsf counter to stop 2024-05-21 16:39:20 +08:00
morris
5ec85c0bfd feat(axi_icm): AXI interconnect QoS configuration functions 2024-05-21 14:38:34 +08:00
igor.udot
7c49b1da55 ci: add 5.3 known failed cases filename 2024-05-21 14:01:08 +08:00
Island
8805685f72 Merge branch 'bugfix/fixed_issues_on_esp32c6_and_esp32h2_v5.3' into 'release/v5.3'
fixed some ble issues on esp32c6 and esp32h2 (v5.3)

See merge request espressif/esp-idf!30891
2024-05-21 11:52:32 +08:00
Suren Gabrielyan
a3d77114b6 fix(ws_transport): utility functions minor improvments 2024-05-20 17:54:43 +04:00
Richard Allen
021dc8747c fix(ws_transport): fixed server-key corruption
When first fragment is sent over HTTP during websocket
connection, defer buffering of fragment until after the
websocket server-key is validated.

This order is required because the first fragment buffering
overwrites the memory holding the server-key headers.

Fixes 2267d4b
Fixes https://github.com/espressif/esp-protocols/issues/396
PR https://github.com/espressif/esp-idf/pull/13724
2024-05-20 17:54:31 +04:00
Jiang Jiang Jian
c7f146b671 Merge branch 'fix/backport_wifi_fixes_v5.3' into 'release/v5.3'
fix(esp_wifi): backport some wifi fixes to v5.3

See merge request espressif/esp-idf!30933
2024-05-20 20:52:18 +08:00
Jiang Jiang Jian
86a49de1eb Merge branch 'fix/fix_esp32p4_kconfig_pd_cpu_dependcy_error_v5.3' into 'release/v5.3'
fix(esp_pm): fix esp32p4 kconfig pd cpu dependency error (v5.3)

See merge request espressif/esp-idf!30794
2024-05-20 20:12:05 +08:00
Marius Vikhammer
51b6d16b43 Merge branch 'doc/update-performance-guides-p4-c5_v5.3' into 'release/v5.3'
docs(performance): Add P4 and C5 information in the performance guides (backport v5.3)

See merge request espressif/esp-idf!30492
2024-05-20 16:16:48 +08:00
shenmengjing
9e74564ba5 docs: Update the CN Translation for ram-usage and speed 2024-05-20 09:34:12 +02:00
Lou Tianhao
7b10c2421f fix(esp_system): fix core1 access cache when core0 close cache during sleep 2024-05-20 15:01:08 +08:00
wuzhenghui
64c062047f fix(esp_hw_support): invalidate L1DCache before enter hardware sleep 2024-05-20 14:02:04 +08:00
wuzhenghui
157c5b52e3 change(esp_hw_support): put more code into TCM to speed up the sleep and wake-up process 2024-05-20 14:01:01 +08:00
wuzhenghui
c97ab134ef ci(esp_pm): add pd_top auto lightsleep test case for esp_pm 2024-05-20 14:01:00 +08:00
wuzhenghui
5899701b68 feat(esp_pm): fix esp32p4 cpu powerdown kconfig dependency error 2024-05-20 14:01:00 +08:00
Marius Vikhammer
4ec0065d74 Merge branch 'docs/p4_hw_design_v5.3' into 'release/v5.3'
docs(sys-time): update link to hw design guidelines (v5.3)

See merge request espressif/esp-idf!30934
2024-05-20 13:57:29 +08:00
Jiang Jiang Jian
fe92d9ee60 Merge branch 'doc/update_bt_sleep_process_v5.3' into 'release/v5.3'
docs: Update the process of Bluetooth entering sleep in the sleep_modes.rst(v5.3)

See merge request espressif/esp-idf!30729
2024-05-20 13:50:59 +08:00
Jiang Jiang Jian
4c6cf06838 Merge branch 'fix/fix_esp_pm_case_high_fail_ratio_v5.3' into 'release/v5.3'
fix(esp_pm): fix esp_pm test cases high fail ratio (v5.3)

See merge request espressif/esp-idf!30672
2024-05-20 13:44:53 +08:00
Jiang Jiang Jian
464f4c9cc6 Merge branch 'fix/assert_1024_in_rwbt_isr_v5.3' into 'release/v5.3'
fix(bt/ble): fix some issues in bluetooth controller(backport v5.3)

See merge request espressif/esp-idf!30813
2024-05-20 13:43:43 +08:00
Harshit Malpani
eb8dad2fa6 fix: Add warning to enable LWIP_NETIF_LOOPBACK to use control socket API
Closes https://github.com/espressif/esp-idf/issues/13659
2024-05-20 10:43:41 +05:30
Harshit Malpani
856a299ba8 fix: reset redirect counter for using same handler
Closes https://github.com/espressif/esp-idf/issues/13633
2024-05-20 10:43:41 +05:30
Mahavir Jain
be9c7145f9 Merge branch 'feat/enable_app_update_test_p4_v5.3' into 'release/v5.3'
feat: Enable app_update test app for ESP32P4 (v5.3)

See merge request espressif/esp-idf!30821
2024-05-20 12:32:42 +08:00
Mahavir Jain
d638267741 Merge branch 'fix/fix_flash_encryption_esp32p4_v5.3' into 'release/v5.3'
fix(bootloader_support): Fix flash encryption for esp32p4 (v5.3)

See merge request espressif/esp-idf!30921
2024-05-20 12:29:18 +08:00
Marius Vikhammer
f3a73cbce3 docs(sys-time): update link to hw design guidelines 2024-05-20 12:16:19 +08:00
Marius Vikhammer
41ff5a2f43 Merge branch 'fix/brownout_crash_v5.3' into 'release/v5.3'
fix(brownout): fixed brownout isr crashing if cache disabled (v5.3)

See merge request espressif/esp-idf!30831
2024-05-20 12:13:17 +08:00
Marius Vikhammer
95cfd3987b Merge branch 'bugfix/lp_core_tests_race_condition_v5.3' into 'release/v5.3'
fix(lp_core_test): fixed race-condition in lp core tests (v5.3)

See merge request espressif/esp-idf!30931
2024-05-20 12:12:49 +08:00
Marius Vikhammer
520beb865c Merge branch 'bugfix/c5_isr_masking_v5.3' into 'release/v5.3'
fix(interrupt): fixed interrupt thresholds not working on C5 (v5.3)

See merge request espressif/esp-idf!30843
2024-05-20 12:12:36 +08:00
Marius Vikhammer
e53ca8e018 fix(lp_core_test): fixed race-condition in lp core tests 2024-05-20 11:59:10 +08:00
muhaidong
68be49d2cf fix(wifi): fixed scan get ap number issue 2024-05-20 11:58:16 +08:00
Chen Yudong
686878497e docs: update wifi iperf README 2024-05-20 11:56:44 +08:00
zhangyanjiao
c046d87561 docs(wifi): update the docmentation for mesh API 2024-05-20 11:55:27 +08:00
Sarvesh Bodakhe
fdb4197d02 fix(esp_wifi): Add some bugfixes and cleanup in softAP
1. Fix wrong reason code in 'WIFI_EVENT_AP_STADISCONNECTED' event
2. cleanup in softAP for disconnecting connected station
3. Update examples to display reason while processing WIFI_EVENT_AP_STADISCONNECTED event
2024-05-20 11:50:09 +08:00
xuxiao
e11f030427 feat(wifi): add itwt teardown status 2024-05-20 11:49:54 +08:00
yinqingzhao
beebbada64 fix(wifi):esp32c6 wifi rx statistics is always zero 2024-05-20 11:47:43 +08:00
yinqingzhao
6da7a46bfa fix(bss_color):fix bss color issues 2024-05-20 11:46:50 +08:00
liuning
d2551d6e4b fix(wifi): fix esp32 unrecoverable m f issue 2024-05-20 11:46:08 +08:00
zhangyanjiao
4cf29dfcef fix(wifi): fixed sniffer and espnow issue
1. fix(wifi): fixed sniffer dump fcs error packets fail

Closes https://github.com/espressif/esp-idf/issues/10777

2. fix(wifi): fixed the espnow priv parameter get error

Closes https://github.com/espressif/esp-idf/issues/13693
2024-05-20 11:44:48 +08:00
Shyamal Khachane
3dbba47d8c fix(esp_wifi): Fix issues in NAN datapath establishment
1. Resolve indefinite waiting while stopping NAN
2. Increase NDP response timeout to 8 DW's
3. Set NAN discovery beacon interval to 100 TU's as per Section 9.2
   of Wi-Fi Aware Specification v4.0
2024-05-20 11:43:58 +08:00
Nachiket Kukade
02c2356cb1 fix(esp_wifi): Fix issue in selecting FTM compensation with external AP 2024-05-20 11:43:18 +08:00
zhangyanjiao
8639f69ed7 fix(wifi): fix the tx issue when mesh packet lifetime remain equal to zero 2024-05-20 11:42:34 +08:00
morris
19ab395364 Merge branch 'feat/csi_dsi_example_v5.3' into 'release/v5.3'
example: csi dsi example and isp af dsi example(v5.3)

See merge request espressif/esp-idf!30913
2024-05-20 11:12:30 +08:00
Jiang Jiang Jian
a7266400be Merge branch 'fix/freertos_scheduler_suspend_crit_v5.3' into 'release/v5.3'
fix(freertos/idf): Add missing critical sections to vTaskSuspendAll() (v5.3)

See merge request espressif/esp-idf!30922
2024-05-20 10:53:35 +08:00
Michael (XIAO Xufeng)
1847e53909 Merge branch 'bugfix/fix_isp_input_data_type_limit_v5.3' into 'release/v5.3'
fix(isp): updated to only support input data type as raw8 (v5.3)

See merge request espressif/esp-idf!30857
2024-05-20 10:15:21 +08:00
Mahavir Jain
285ba1fcf2 Merge branch 'fix/reduce-binary-size_v5.3' into 'release/v5.3'
Reduce binary size (v5.3)

See merge request espressif/esp-idf!30654
2024-05-20 01:09:17 +08:00
Mahavir Jain
5c9392d177 Merge branch 'bugfix/free_memory_if_failed_to_strart_http_server_v5.3' into 'release/v5.3'
fix(esp_https_server): fix memory leak during configuring http server (v5.3)

See merge request espressif/esp-idf!30662
2024-05-20 01:08:21 +08:00
Mahavir Jain
6a92c1485a Merge branch 'fix/pytest_server_start_command_failed_v5.3' into 'release/v5.3'
fix: Refactored script for initiating Python-based HTTPS server (v5.3)

See merge request espressif/esp-idf!30667
2024-05-20 01:07:55 +08:00
Michael (XIAO Xufeng)
c91bdda9f3 Merge branch 'refactor/isp_af_interrupt_and_callback_v5.3' into 'release/v5.3'
refactor(isp): refactor the interrupt and callback solution (v5.3)

See merge request espressif/esp-idf!30565
2024-05-20 00:51:38 +08:00
Michael (XIAO Xufeng)
f63e544dc3 Merge branch 'feature/support_chip912_cpll_spll_eco1_v5.3' into 'release/v5.3'
feat: support(esp32p4_eco1): modify cpll and spll config (v5.3)

See merge request espressif/esp-idf!30783
2024-05-20 00:48:27 +08:00
Michael (XIAO Xufeng)
0680af1269 Merge branch 'feature/usj_support_p4_v5.3' into 'release/v5.3'
feature(usb_serial_jtag): add usb serial jtag support for esp32p4 (backport v5.3)

See merge request espressif/esp-idf!30793
2024-05-20 00:48:22 +08:00
Mahavir Jain
2decfbc007 Merge branch 'fix/hello_world_linux_target_on_macos_v5.3' into 'release/v5.3'
fix(esp-tls): Fix compilation for linux target on macos (v5.3)

See merge request espressif/esp-idf!30808
2024-05-20 00:48:11 +08:00
Aditya Patwardhan
3640c1ecba fix(bootloader_support): Fix flash encryption for esp32p4 2024-05-17 21:19:14 +05:30
Darian Leung
cbb43bb4c4 refactor(freertos/idf): Add critical section requirements to function description
This commit adds a note regarding the critical section calling requires of some
internal functions.
2024-05-17 22:43:35 +08:00
Darian Leung
0dc29caf4a fix(freertos/idf): Add missing critical sections to vTaskSuspendAll()
vTaskSuspendAll() requires critical sections when building for SMP. Otherwise,
it is possible for a task to switch cores in between getting the core ID and
before incremented uxSchedulerSuspended.
2024-05-17 22:43:34 +08:00
Armando
5f07f64802 example(isp): added isp af example 2024-05-17 15:29:17 +08:00
Armando
e4f1c01197 fix(csi): fixed wrong assert when there's new transaction 2024-05-17 15:26:58 +08:00
Armando
2ed780b686 fix(isp): fixed af environment detector lack of configuration issue 2024-05-17 15:26:46 +08:00
Armando
a9383cb433 example(camera): added new camera dsi example 2024-05-17 15:26:39 +08:00
Erhan Kurubas
5e817df25f fix(coredump): don't allow mapping of non-encrypted coredump partition 2024-05-16 21:31:40 +02:00
Erhan Kurubas
bd8d7ea76a fix(coredump): increase sanity check before get summary
Closes https://github.com/espressif/esp-idf/issues/13594
2024-05-16 21:17:24 +02:00
zwl
352ee6fc26 ble: fixed some issues on ESP32C6 and ESP32H2 2024-05-16 17:46:07 +08:00
Armando
8472467721 fix(isp): updated to only support input data type as raw8 2024-05-16 10:40:26 +08:00
Marius Vikhammer
f324e75c64 fix(interrupt): fixed interrupt thresholds not working on C5 2024-05-15 16:02:48 +08:00
Marius Vikhammer
1a1a708699 fix(brownout): fixed brownout isr crashing if cache disabled
If a brownout ISR was triggered while cache was disabled the system would panic.

This was due to a print accessing a string stored in flash
2024-05-15 09:13:53 +08:00
Harshit Malpani
24e5e3aef1 feat: Enable app_update test app for ESP32P4 2024-05-14 10:27:32 +05:30
Jin Cheng
d8bc05c5d0 fix(bt/controller): Parse out the correct packet types from Host parameters
- For HCI command HCI_Enhanced_Setup_Synchronous_Connection
2024-05-14 11:52:58 +08:00
gongyantao
bfa95cdd75 fix(bt/ble): fix some issues in bluetooth controller
1: fix assert 1024 issue when bt tx and wifi coexist on esp32
2: fix ble scan backoff
3: parse out the correct packet types from host parameters for
   hci command hci_enhanced_setup_synchronous_connection
2024-05-14 10:09:37 +08:00
Sudeep Mohanty
199dc389cc fix(esp-tls): Fix compilation for linux target on macos
This commit fixes compilation errors for the esp-tls component for the
linux target on a MacOS system.
2024-05-13 13:44:25 +02:00
Erhan Kurubas
b400a8cd72 change(gdbinit): set remote timeout for the gdb connection 2024-05-13 13:34:13 +02:00
C.S.M
4dc565b7d0 feature(usb_serial_jtag): add usb serial jtag support for esp32p4 2024-05-13 12:19:14 +08:00
Xiao Xufeng
cbcd346171 feat(esp32p4): add eco1 revision config option 2024-05-11 11:46:08 +08:00
chaijie@espressif.com
f1d1dfd1ef feat(esp32p4_eco1): modify cpll and spll config 2024-05-11 11:43:24 +08:00
laokaiyao
dd20d1f2b5 refactor(isp): refactor the interrupt and callback solution
- Added async API
- Replaced the polling API
- Supported one more callback and event data
2024-05-11 11:11:49 +08:00
Fu Hanxi
4e850f158e ci: move log dir from pytest_embedded_log to pytest-embedded 2024-05-10 10:29:21 +02:00
Marius Vikhammer
ea010f84ef Merge branch 'fix/freertos_vtasklist_param_order_v5.3' into 'release/v5.3'
fix(freertos): Fix vTaskList() parameter print order (v5.3)

See merge request espressif/esp-idf!30476
2024-05-09 16:48:24 +08:00
Jiang Jiang Jian
68a9c09c49 Merge branch 'bugfix/gcmp_mr_regression_v5.3' into 'release/v5.3'
fix(wifi): Fix issue of wrong Rx control information of espnow packets (Backport v5.3)

See merge request espressif/esp-idf!30739
2024-05-09 16:37:30 +08:00
Jiang Jiang Jian
53c4c08283 Merge branch 'bugfix/libphy_chips_20240430_v5.3' into 'release/v5.3'
update c3 s3 c6 libphy fix coex reset and bug

See merge request espressif/esp-idf!30725
2024-05-09 15:55:08 +08:00
Rahul Tank
89a612aea0 fix(nimble): Free controller memory if init fails 2024-05-09 12:20:11 +05:30
Sarvesh Bodakhe
a9dcc3964d fix(wifi): Fix issue of wrong Rx control information of espnow packets
Only for esp32 and esp32s2
2024-05-09 13:57:12 +08:00
Mahavir Jain
8503709d85 Merge branch 'feature/update_mbedtls_to_3.6.0_v5.3' into 'release/v5.3'
feat(mbedtls): updated mbedtls version from 3.5.2 to 3.6.0 (v5.3)

See merge request espressif/esp-idf!30668
2024-05-09 12:16:22 +08:00
liuning
4eacfd6ee1 update c3 s3 c6 libphy fix coex reset and bug 2024-05-09 11:57:56 +08:00
xiongweichao
9eb61ef5a7 docs: Update the process of Bluetooth entering sleep in the sleep_modes.rst 2024-05-09 11:01:31 +08:00
morris
7165a3bdbb Merge branch 'feat/mipi_dsi_draw_pixel_round_boundary_v5.3' into 'release/v5.3'
feat(mipi_dsi): round to boundary when draw pixel (v5.3)

See merge request espressif/esp-idf!30694
2024-05-09 09:44:21 +08:00
Roland Dobai
1b331d24b3 Merge branch 'fix/idf_size_python_compat_v5.3' into 'release/v5.3'
fix: make idf_size.py compatible with python3.8 (v5.3)

See merge request espressif/esp-idf!30727
2024-05-09 02:01:36 +08:00
Frantisek Hrbata
fe4b401ab2 ci: add simple test for idf_size.py python compatibility
This adds a simple test that tries to run idf_size.py help and check
if the process does not exit with error. This is just to make sure
that idf_size.py can be used with minimum required python version.

Signed-off-by: Frantisek Hrbata <frantisek.hrbata@espressif.com>
2024-05-08 19:48:52 +02:00
Frantisek Hrbata
ebc9d02146 fix: make idf_size.py compatible with python3.8
Previous 6caa4a17ac ("fix: display correct help in the idf_size.py wrapper")
introduced a regression, because it uses exit_on_error parameter for
argparse.ArgumentParser, which was added in python3.9, making
idf_size.py incompatible with idf.py minimal required python3.8.

The objective is to inspect the arguments of idf_size.py using a wrapper
argparse to determine whether the legacy or refactored version should be
initiated, while always displaying help for the underlying version. The
exit_on_error function was previously utilized to prevent argparse from
exiting and displaying help/usage. This replaces exit_on_error with a
workaround that makes the --format argument optional. Since this is the
sole instance where the wrapper argparse might fail, it achieves the
same outcome as using exit_on_error.

Fixes: 6caa4a17ac ("fix: display correct help in the idf_size.py wrapper")
Signed-off-by: Frantisek Hrbata <frantisek.hrbata@espressif.com>
2024-05-08 19:48:51 +02:00
Jiang Jiang Jian
ec50cd7d7e Merge branch 'fix/backport_wifi_fixes_v5.3' into 'release/v5.3'
fix(wifi): backport wifi fixes to v5.3

See merge request espressif/esp-idf!30689
2024-05-08 19:16:26 +08:00
morris
0cf4889f22 Merge branch 'change/rename_csi_api_v5.3' into 'release/v5.3'
change(camera): change esp_cam_del_ctlr to esp_cam_ctlr_del (v5.3)

See merge request espressif/esp-idf!30692
2024-05-08 17:23:04 +08:00
morris
b9f15ba3ab feat(mipi_dsi): round to boundary when draw pixel 2024-05-08 16:31:51 +08:00
Armando
d22f9a97aa change(camera): change esp_cam_del_ctlr to esp_cam_ctlr_del 2024-05-08 15:29:20 +08:00
Li Shuai
90188040fb fix(esp_wifi): clear soc wakeup request signal at tbtt process 2024-05-08 13:44:54 +08:00
Sarvesh Bodakhe
ea1a10da17 fix(wifi): Fix issue in scan when AP advertises WPA and WPA2 with SAE AKM 2024-05-08 13:44:51 +08:00
Nachiket Kukade
7c54373146 feat(esp_wifi): Update FTM PHY Compensation with calibration 2024-05-08 13:42:23 +08:00
xuxiao
209fbfc18b fix(wifi): fix trc_ampdu_stop_rateidx value errors when DUT under softap + sta mode 2024-05-08 13:42:10 +08:00
alanmaxwell
8545eeb4ef fix(wifi): clear wifi buffer to fix ampdu compatibility issue 2024-05-08 13:41:58 +08:00
xuxiao
a22d0df155 fix(wifi): fix esp32c6 wdt issues when recv/send tcp packages 2024-05-08 13:41:36 +08:00
morris
c706096f45 Merge branch 'test/gdma_fetch_data_in_flash_v5.3' into 'release/v5.3'
test(gdma): can read data from flash rodata (v5.3)

See merge request espressif/esp-idf!30655
2024-05-08 10:50:53 +08:00
Fu Hanxi
b8ed93eec0 ci: apply new fix in pytest-embedded 1.10 2024-05-07 12:17:10 +02:00
Fu Hanxi
840ec6579f ci: update mypy check for python 3.12, check under python 3.8 rules 2024-05-07 12:17:10 +02:00
wuzhenghui
7aed3eb3bc fix(esp_pm): fix esp_pm test cases high fail ratio 2024-05-07 17:08:28 +08:00
nilesh.kale
fe628d5951 feat(mbedtls): updated mbedtls version from 3.5.2 to 3.6.0
This MR updated MbedTLS version to latest version 3.6.0.
2024-05-07 14:16:21 +05:30
nilesh.kale
855d1eb170 fix: Refactored script for initiating Python-based HTTPS server
This commit refactors the script responsible for starting a Python-based HTTPS server
to align with the latest Python version's requirements and best practices.

Closes https://github.com/espressif/esp-idf/issues/13575
2024-05-07 14:15:05 +05:30
morris
8ed42582fe Merge branch 'fix/jpeg_dri_issue_v5.3' into 'release/v5.3'
fix(jpeg): Fix several issues reported recently, (backport v5.3)

See merge request espressif/esp-idf!30657
2024-05-07 16:22:09 +08:00
nilesh.kale
5428555092 fix(esp_https_server): fix memory leak during configuring http server
This MR This restructured code to prevent memory leak during the starting HTTP server.

Closes https://github.com/espressif/esp-idf/issues/13526
2024-05-07 13:51:38 +05:30
Roland Dobai
8f091de9c2 Merge branch 'fix/idf_size_help_v5.3' into 'release/v5.3'
fix: display correct help in the idf_size.py wrapper (v5.3)

See merge request espressif/esp-idf!30661
2024-05-07 16:01:12 +08:00
Frantisek Hrbata
ae0eabec53 fix: display correct help in the idf_size.py wrapper
Currently the wrapper tries to figure out which version of
the esp-idf-size should be started. The legacy version is
used if explicitly requested by the -l/--legacy option or
if json format is specified. This works fine, but if help
is requested, it is printed for the wrapper as shown bellow

$ idf_size.py -h
usage: idf_size.py [-h] [--format FORMAT] [-l]

options:
  -h, --help       show this help message and exit
  --format FORMAT
  -l, --legacy

This is not convenient and the full help from the underlying
version should be displayed.

Fix this by only peeking into the args to figure out if legacy or
refactored version should be started and always spawn the underlying
esp_idf_size python module. This is done by using exit_on_error=False and
add_help=False for the ArgumentParser. When help for refactored version
is requested a note as following is printed to notify users that the
legacy version can still be used.

$ idf_size.py -h
Note: legacy esp_idf_size version can be invoked by specifying the -l/--legacy
option or by setting the ESP_IDF_SIZE_LEGACY environment variable.

Signed-off-by: Frantisek Hrbata <frantisek.hrbata@espressif.com>
2024-05-07 09:42:19 +02:00
Cao Sen Miao
6b0a815b78 fix(jpeg): Fix several issues reported recently,
1. Fix decode images with dri marker failed,
2. Fix encode sometimes get length error
2024-05-07 13:58:18 +08:00
morris
a04f786380 test(gdma): can read data from flash rodata 2024-05-07 13:01:11 +08:00
morris
a6d8251366 feat(gdma): set default valid memory range for gdma 2024-05-07 13:00:39 +08:00
Alexey Lapshin
9fd92e8bf4 fix(cxx): use __cxa_throw() stub in case exceptions disabled
Reduces binary size since the linker will drop some code due to --gc-sections.
2024-05-07 08:52:36 +04:00
Alexey Lapshin
d42e894a74 fix(system): discard eh_frame sections if disabled in sdkconfig 2024-05-07 08:52:36 +04:00
Rahul Tank
bf415f580f Merge branch 'bugfix/disable_mbedtls_options_v5.3' into 'release/v5.3'
fix(nimble): Deselect MBEDTLS_ECP_RESTARTABLE when mbedTLS is used (v5.3)

See merge request espressif/esp-idf!30618
2024-05-07 12:38:05 +08:00
Wang Meng Yang
55a8a18fb7 Merge branch 'bugfix/fix_hid_connection_failed_bug_v5.3' into 'release/v5.3'
fix(bt/bluedroid): Fix HID Device connection failed bug[backport 5.3]

See merge request espressif/esp-idf!30586
2024-05-06 17:57:27 +08:00
Rahul Tank
a61a367bc4 fix(nimble): Deselect MBEDTLS_ECP_RESTARTABLE when mbedTLS is used 2024-05-06 15:17:57 +05:30
Marius Vikhammer
c19e762c89 Merge branch 'doc/ringbuffer_v5.3' into 'release/v5.3'
docs(esp_ringbuf): Corrected example code block (v5.3)

See merge request espressif/esp-idf!30631
2024-05-06 17:11:41 +08:00
Jakob Hasse
6fea6aae8c docs(esp_ringbuf): Corrected example code block
* Closes https://github.com/espressif/esp-idf/issues/13730
2024-05-06 10:15:03 +02:00
Darian Leung
027193ca07 fix(freertos): Fix vTaskList() parameter print order
xCoreID was previously printed as the last parameter priority to IDF v5.1, but
was changed to the third paramtere from v5.2 onwards. This commit restores the
correct ordering.

Closes https://github.com/espressif/esp-idf/issues/13675
2024-05-06 16:05:31 +08:00
Jiang Jiang Jian
8bd2287233 Merge branch 'fix/increase_26mhz_esp32c2_slow_clock_calibration_wdt_threshold_v5.3' into 'release/v5.3'
fix(esp_system): increase 26Mhz esp32c2 slow clock calibration timeout watchdog threshold (v5.3)

See merge request espressif/esp-idf!30575
2024-05-06 14:04:39 +08:00
Mahavir Jain
aa1c3af4c4 Merge branch 'bugfix/nvs_enc_test_v5.3' into 'release/v5.3'
fix(tests): correct the flash write length for NVS encrypted test (v5.3)

See merge request espressif/esp-idf!30602
2024-05-06 13:31:26 +08:00
Marius Vikhammer
577a50b02a Merge branch 'bugfix/get_random_inside_assert_v5.3' into 'release/v5.3'
fix(linux): calling getrandom() outside assert() (v5.3)

See merge request espressif/esp-idf!30613
2024-05-06 10:29:02 +08:00
morris
b11014a7c6 Merge branch 'bugfix/mipi_dsi_1_data_lane_v5.3' into 'release/v5.3'
fix(mipi_dsi): only wait ready for enabled data lane (v5.3)

See merge request espressif/esp-idf!30580
2024-05-06 10:22:52 +08:00
Aditya Patwardhan
901f937698 Merge branch 'fix/esp_tls_use_64_bit_variable_for_time_v5.3' into 'release/v5.3'
fix(esp-tls): Use 64 bit variable for time instead of 32 bit (v5.3)

See merge request espressif/esp-idf!30615
2024-05-03 21:33:17 +08:00
Aditya Patwardhan
39771b6c81 fix(esp-tls): Use 64 bit variable for time instead of 32 bit
Use appropriate API available on respective platform for obtaining
    time
    Closes https://github.com/espressif/esp-idf/issues/13593
2024-05-03 09:03:05 +05:30
Jakob Hasse
b026a7c915 fix(linux): calling getrandom() outside assert()
* Expressions inside assert are completely removed in release builds
2024-05-02 16:56:39 +02:00
Mahavir Jain
f82fea4c1b fix(tests): correct the flash write length for NVS encrypted test
Write only till the embedded file size in the NVS partition. Earlier
the length was kept as the whole partition size and it could result
in accessing embedded rodata beyond the MMU mapped range.
2024-05-02 16:48:57 +05:30
Mahavir Jain
60ab9631d7 fix(tests): remove unused partition NVS bin file 2024-05-02 16:48:54 +05:30
liqigan
91c4a94f61 fix(bt/bluedroid): Fix HID Device connection failed bug
Closes https://github.com/espressif/esp-idf/issues/13671
2024-04-30 17:56:00 +08:00
morris
df211933ff fix(mipi_dsi): only wait ready for enabled data lane 2024-04-30 16:46:03 +08:00
Mahavir Jain
e486f3b944 Merge branch 'fix/error_reg_base_name_on_p4_v5.3' into 'release/v5.3'
fix(soc): fixed redefined soc reg names on P4 (v5.3)

See merge request espressif/esp-idf!30564
2024-04-30 12:09:21 +08:00
wuzhenghui
ccca8b74eb fix(esp_system): increase 26Mhz esp32c2 slow clock calibration timeout watchdog threshold 2024-04-30 11:48:42 +08:00
Marius Vikhammer
7d7d9d7090 Merge branch 'docs/p4_cleanup_v5.3' into 'release/v5.3'
docs(programming-guide): clean up misc leftover doc updates for P4 (v5.3)

See merge request espressif/esp-idf!30568
2024-04-30 10:31:20 +08:00
Marius Vikhammer
0ee7d4d17a docs(programming-guide): clean up misc leftover doc updates for P4 2024-04-30 09:46:25 +08:00
laokaiyao
a246aa2973 fix(soc): fixed redefined soc reg names on P4 2024-04-29 19:33:04 +08:00
Roland Dobai
2508d3f23b Merge branch 'fix/ci_cli_installer_cmake_v5.3' into 'release/v5.3'
ci(tools): Fix IDF_MIRROR_PREFIX_MAP for including all tools from local (v5.3)

See merge request espressif/esp-idf!30552
2024-04-29 17:45:50 +08:00
Roland Dobai
b494330381 Merge branch 'fix/docs_p4_tools_v5.3' into 'release/v5.3'
change(docs): Update checked tools doc pages for ESP32-P4 programming guide (v5.3)

See merge request espressif/esp-idf!30558
2024-04-29 17:45:24 +08:00
Roland Dobai
ddc357fcca change(docs): Update checked tools doc pages for ESP32-P4 programming guide 2024-04-29 09:54:00 +02:00
Roland Dobai
6a5ab20489 ci(tools): Fix IDF_MIRROR_PREFIX_MAP for including all tools from local 2024-04-29 09:00:55 +02:00
Island
30fce03e35 Merge branch 'bugfix/fix_ble_coex_assert_v5.3' into 'release/v5.3'
Update esp32 bt-lib (4012cfb)(backport v5.3)

See merge request espressif/esp-idf!30521
2024-04-28 10:48:02 +08:00
zhanghaipeng
212f316f24 feat(ble/bluedroid): Support BLE command status debug log 2024-04-26 17:13:39 +08:00
zhanghaipeng
0fcc940bc1 fix(ble/controller): Update esp32 bt-lib (4012cfb)
- Fixed BLE coex assert
- Fixed BLE DTM status and tx count
2024-04-26 16:53:39 +08:00
morris
b43fc4d63a Merge branch 'feat/dsi_lcd_iram_safe_v5.3' into 'release/v5.3'
MIPI DSI IRAM Safe (v5.3)

See merge request espressif/esp-idf!30510
2024-04-26 15:57:01 +08:00
Marius Vikhammer
7fb317655d Merge branch 'ci/fix-url-quote-v5.3' into 'release/v5.3'
ci: quote spec character in url

See merge request espressif/esp-idf!30500
2024-04-26 13:53:55 +08:00
morris
49aaac0013 feat(mipi_dsi): support isr iram safe 2024-04-26 10:41:04 +08:00
morris
d910ca7fa8 feat(mipi_dsi): add pm lock for clock source 2024-04-26 10:41:04 +08:00
morris
935da554c9 Merge branch 'refactor/dma_test_p4_v5.3' into 'release/v5.3'
change(gdma): improve the test cases to be target agnostic (v5.3)

See merge request espressif/esp-idf!30486
2024-04-26 10:33:14 +08:00
igor.udot
5b3996885c ci: quote spec character in url 2024-04-25 18:35:56 +08:00
Ivan Grokhotkov
7c57624b66 Merge branch 'ci/fix_app_size_json_path_v5.3' into 'release/v5.3'
CI: fix app size json path (v5.3)

See merge request espressif/esp-idf!30494
2024-04-25 16:37:00 +08:00
morris
e56f92aab4 Merge branch 'bugfix/fix_gpio_etm_multi_task_v5.3' into 'release/v5.3'
fix(gpio_etm): allow one GPIO binds to multiple ETM tasks (v5.3)

See merge request espressif/esp-idf!30455
2024-04-25 15:43:16 +08:00
Fu Hanxi
3386c594b4 ci: fix size.json path for app 2024-04-25 08:49:16 +02:00
Guillaume Souchere
0440d582dc docs(performance): Add esp32p4/c5 relevant information to the performance guides
in speed.rst:
- add startup time increase info when spiram test is enabled
- add startup time increase info when spiram is enabled and
  poisoning comprehensive is enabled
- add L2 cache variable size info to optimize IRAM space / cache misses
- update sections refencing bluetooth/wifi built-in tasks to not show
  related info for p4 targets.
- Add IDF_TARGET_RF_TYPE for esp32c5

in ram-usage.rst:
- add L2 cache variable size info to maximize RAM space

Remove the files from esp32c5.txt and esp32p4.txt
that are no longer in need of update.
2024-04-25 08:05:46 +02:00
morris
4fb58d56b4 change(gdma): improve the test cases to be target agnostic 2024-04-25 11:07:16 +08:00
Song Ruo Jing
665883229e fix(gpio_etm): allow one GPIO binds to multiple ETM tasks 2024-04-24 15:58:49 +08:00
Karl Palsson
a85d1e1eca fix(esp_eth): dp83848: correct link detection to use BMSR
Reading the link state via PHYSTS was incorrect, as it only reflects the
link state bit from BMSR.  BMSR latches link down events, and are not
cleared without being read.  (See 802.3-2008 section 2, section 22.2.4.2.13)
This leads to the original DP828xx code only supporting link up, then a
single link down event.

Switch to reading the link state via BMSR, but continuing to read the
negotiation results via PHYSTS and ANLPAR.  This is inline with
LAN8720x, RTL8201, KSZ80xx phy drivers, and other opensource drivers for
the DP838xx family of devices.

Tested on a private board with a DP83825i PHY.  No publically available
boards using the original DP83848 are known of for testing.

Signed-off-by: Karl Palsson <karl.palsson@marel.com>
2024-04-24 09:34:58 +02:00
Rahul Tank
14315bb751 Merge branch 'bugfix/rpa_timeout_api_v5.3' into 'release/v5.3'
fix(nimble): Expose API to set RPA Timeout (v5.3)

See merge request espressif/esp-idf!30407
2024-04-23 20:06:14 +08:00
Darian Leung
fa866b49ca docs(esp_common): Fix formatting issues in error-handling.rst
This commit fixes the following formatting issues in error-handling.rst:

- Incorrect indentation (3 spaces to 4 spaces)
- Fixed some italics that were supposed to be inline literals
- Used code-block directive for language highlighting
2024-04-23 14:49:48 +08:00
Richard Allen
ebe1141b25 docs: clarify ESP_RETURN_ON_ERROR result 2024-04-23 14:49:47 +08:00
Rahul Tank
cb5bc35f2e fix(nimble): Expose API to set RPA Timeout 2024-04-23 11:22:21 +05:30
Jiang Jiang Jian
55658d4c36 Merge branch 'maint/release_v5.3_codeowners' into 'release/v5.3'
change(gitlab): simplify approvals for backports (v5.3)

See merge request espressif/esp-idf!30398
2024-04-23 10:35:14 +08:00
Ivan Grokhotkov
f1b9b357e4 change(gitlab): simplify approvals for backports (v5.3) 2024-04-23 01:33:44 +02:00
9285 changed files with 1206739 additions and 1481016 deletions

View File

@@ -1,4 +1,4 @@
[codespell]
skip = build,*.yuv,components/fatfs/src/*,alice.txt,*.rgb,components/wpa_supplicant/*,components/esp_wifi/*,*.pem
ignore-words-list = ser,dout,rsource,fram,inout,shs,ans,aci,unstall,unstalling,hart,wheight,wel,ot,fane,assertIn,registr,oen,parms
skip = build,*.yuv,components/fatfs/src/*,alice.txt,*.rgb,components/wpa_supplicant/*,components/esp_wifi/*
ignore-words-list = ser,dout,rsource,fram,inout,shs,ans,aci,unstall,unstalling,hart
write-changes = true

View File

@@ -21,7 +21,7 @@ jobs:
# Disable the job in forks
if: ${{ github.repository_owner == 'espressif' }}
runs-on: ubuntu-24.04-X64-large
runs-on: ubuntu-latest
steps:
# Depending on the branch/tag, set CLONE_BRANCH_OR_TAG variable (used in the Dockerfile
# as a build arg) and TAG_NAME (used when tagging the image).

View File

@@ -40,5 +40,3 @@ jobs:
echo ""
exit 1
fi
# Run pre-commit for PowerShell scripts check
pre-commit run --hook-stage manual check-powershell-scripts --from-ref base_ref --to-ref pr_ref --show-diff-on-failure

View File

@@ -8,11 +8,10 @@ on:
jobs:
release_zips:
name: Create release zip file
runs-on: ubuntu-24.04
runs-on: ubuntu-20.04
steps:
- name: Create a recursive clone source zip
uses: espressif/release-zips-action@v1
with:
github_token: ${{ secrets.GITHUB_TOKEN }}
release_project_name: ESP-IDF
git_extra_args: --shallow-since="1 year ago"
uses: espressif/github-actions/release_zips@master
env:
RELEASE_PROJECT_NAME: ESP-IDF
GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}

1
.gitignore vendored
View File

@@ -102,7 +102,6 @@ pytest_embedded_log/
list_job*.txt
size_info*.txt
XUNIT_RESULT*.xml
.manifest_sha
# clang config (for LSP)
.clangd

View File

@@ -30,6 +30,4 @@ include:
- '.gitlab/ci/integration_test.yml'
- '.gitlab/ci/host-test.yml'
- '.gitlab/ci/deploy.yml'
- '.gitlab/ci/post_deploy.yml'
- '.gitlab/ci/retry_failed_jobs.yml'
- '.gitlab/ci/test-win.yml'

View File

@@ -1,7 +1,7 @@
.build_template:
stage: build
extends:
- .after_script:build:ccache-show-stats:upload-failed-job-logs
- .after_script:build:ccache:upload-when-fail
image: $ESP_ENV_IMAGE
tags:
- build
@@ -12,11 +12,11 @@
IDF_CCACHE_ENABLE: "1"
dependencies: []
.build_cmake_clang_template:
.build_cmake_template:
extends:
- .build_template
- .before_script:build
- .after_script:build:ccache-show-stats
- .after_script:build:ccache
dependencies: # set dependencies to null to avoid missing artifacts issue
needs:
- job: fast_template_app
@@ -34,11 +34,29 @@
- "**/build*/size.json"
expire_in: 1 week
when: always
script:
# CI specific options start from "--parallel-count xxx". could ignore when running locally
- run_cmd python tools/ci/ci_build_apps.py $TEST_DIR -v
-t $IDF_TARGET
--copy-sdkconfig
--parallel-count ${CI_NODE_TOTAL:-1}
--parallel-index ${CI_NODE_INDEX:-1}
--extra-preserve-dirs
examples/bluetooth/esp_ble_mesh/ble_mesh_console
examples/bluetooth/hci/controller_hci_uart_esp32
examples/wifi/iperf
--modified-components ${MR_MODIFIED_COMPONENTS}
--modified-files ${MR_MODIFIED_FILES}
# for detailed documents, please refer to .gitlab/ci/README.md#uploaddownload-artifacts-to-internal-minio-server
- python tools/ci/artifacts_handler.py upload
.build_cmake_clang_template:
extends:
- .build_cmake_template
variables:
IDF_TOOLCHAIN: clang
TEST_BUILD_OPTS_EXTRA: ""
TEST_DIR: tools/test_apps/system/clang_build_test
PYTEST_IGNORE_COLLECT_IMPORT_ERROR: "1"
TEST_DIR: tools/test_apps/system/cxx_pthread_bluetooth
script:
# CI specific options start from "--parallel-count xxx". could ignore when running locally
- run_cmd python tools/ci/ci_build_apps.py $TEST_DIR -v
@@ -94,22 +112,6 @@ fast_template_app:
BUILD_COMMAND_ARGS: "-p"
#------------------------------------------------------------------------------
#######################
# gnu_static_analyzer #
#######################
gcc_static_analyzer:
extends:
- .build_template_app_template
- .rules:build:target_test
stage: pre_check
tags: [build, shiny]
variables:
CI_CCACHE_DISABLE: 1
ANALYZING_APP: "examples/get-started/hello_world"
script:
- echo "CONFIG_COMPILER_STATIC_ANALYZER=y" >> ${ANALYZING_APP}/sdkconfig.defaults
- python -m idf_build_apps build -v -p ${ANALYZING_APP} -t all
########################################
# Clang Build Apps Without Tests Cases #
########################################
@@ -138,12 +140,11 @@ build_clang_test_apps_esp32s3:
extends:
- .build_cmake_clang_template
variables:
# https://reviews.llvm.org/D90108.
# GNU 'as' lets .weak override .globl since binutils-gdb
# https://github.com/bminor/binutils-gdb/commit/5ca547dc2399a0a5d9f20626d4bf5547c3ccfddd (1996)
# while MC lets the last directive win (PR38921).
# For RISCV chips we use integrated assembler by default, so suppress this warning to pass CI pipeline.
TEST_BUILD_OPTS_EXTRA: "--ignore-warning-str 'changed binding to STB_WEAK'"
# For RISCV clang generates '.linker-options' sections of type 'llvm_linker_options' in asm files.
# See (https://llvm.org/docs/Extensions.html#linker-options-section-linker-options).
# Binutils gas ignores them with warning.
# TODO: LLVM-112, Use integrated assembler.
TEST_BUILD_OPTS_EXTRA: "--ignore-warning-str 'Warning: unrecognized section type'"
build_clang_test_apps_esp32c3:
extends:
@@ -163,30 +164,11 @@ build_clang_test_apps_esp32c6:
extends:
- .build_clang_test_apps_riscv
- .rules:build
# TODO: c6 builds fail in master due to missing headers
allow_failure: true
variables:
IDF_TARGET: esp32c6
build_clang_test_apps_esp32c5:
extends:
- .build_clang_test_apps_riscv
- .rules:build
variables:
IDF_TARGET: esp32c5
build_clang_test_apps_esp32h2:
extends:
- .build_clang_test_apps_riscv
- .rules:build
variables:
IDF_TARGET: esp32h2
build_clang_test_apps_esp32p4:
extends:
- .build_clang_test_apps_riscv
- .rules:build
variables:
IDF_TARGET: esp32p4
######################
# Build System Tests #
######################
@@ -228,15 +210,14 @@ pytest_build_system_macos:
extends:
- .test_build_system_template
- .before_script:build:macos
- .after_script:build:macos:upload-failed-job-logs:ccache-show-stats
- .after_script:build:macos:upload-when-fail
- .rules:build:macos
tags:
- macos_shell
parallel: 3
variables:
PYENV_VERSION: "3.8"
# CCACHE_DIR: "/cache/idf_ccache". On macOS, you cannot write to this folder due to insufficient permissions.
CCACHE_DIR: "" # ccache will use "$HOME/Library/Caches/ccache".
CI_CCACHE_DISABLE: "1" # ccache: error: Read-only file system
build_docker:
extends:
@@ -283,8 +264,6 @@ generate_build_child_pipeline:
dependencies: # set dependencies to null to avoid missing artifacts issue
needs:
- pipeline_variables
- job: baseline_manifest_sha
optional: true
artifacts:
paths:
- build_child_pipeline.yml
@@ -292,11 +271,7 @@ generate_build_child_pipeline:
- non_test_related_apps.txt
expire_in: 1 week
when: always
variables:
PYTEST_IGNORE_COLLECT_IMPORT_ERROR: "1"
script:
# requires basic pytest dependencies
- run_cmd bash install.sh --enable-pytest
- run_cmd python tools/ci/dynamic_pipelines/scripts/generate_build_child_pipeline.py
build_child_pipeline:
@@ -313,7 +288,6 @@ build_child_pipeline:
MR_MODIFIED_FILES: $MR_MODIFIED_FILES
PARENT_PIPELINE_ID: $CI_PIPELINE_ID
BUILD_AND_TEST_ALL_APPS: $BUILD_AND_TEST_ALL_APPS
REPORT_EXIT_CODE: $REPORT_EXIT_CODE
# https://gitlab.com/gitlab-org/gitlab/-/issues/214340
inherit:
variables: false

View File

@@ -6,13 +6,12 @@ stages:
- pre_check
- build
- assign_test
- build_doc
- target_test
- host_test
- build_doc
- test_deploy
- deploy
- post_deploy
- retry_failed_jobs
variables:
# System environment
@@ -40,7 +39,7 @@ variables:
GIT_FETCH_EXTRA_FLAGS: "--no-recurse-submodules --prune --prune-tags"
# we're using .cache folder for caches
GIT_CLEAN_FLAGS: -ffdx -e .cache/
LATEST_GIT_TAG: v5.4.3
LATEST_GIT_TAG: v5.3-dev
SUBMODULE_FETCH_TOOL: "tools/ci/ci_fetch_submodule.py"
# by default we will fetch all submodules
@@ -55,12 +54,15 @@ variables:
CHECKOUT_REF_SCRIPT: "$CI_PROJECT_DIR/tools/ci/checkout_project_ref.py"
# Docker images
ESP_ENV_IMAGE: "${CI_DOCKER_REGISTRY}/esp-env-v5.4:2"
ESP_IDF_DOC_ENV_IMAGE: "${CI_DOCKER_REGISTRY}/esp-idf-doc-env-v5.4:2-1"
TARGET_TEST_ENV_IMAGE: "${CI_DOCKER_REGISTRY}/target-test-env-v5.4:2"
ESP_ENV_IMAGE: "${CI_DOCKER_REGISTRY}/esp-env-v5.3:1"
ESP_IDF_DOC_ENV_IMAGE: "${CI_DOCKER_REGISTRY}/esp-idf-doc-env-v5.3:1-1"
TARGET_TEST_ENV_IMAGE: "${CI_DOCKER_REGISTRY}/target-test-env-v5.3:1"
SONARQUBE_SCANNER_IMAGE: "${CI_DOCKER_REGISTRY}/sonarqube-scanner:5"
PRE_COMMIT_IMAGE: "${CI_DOCKER_REGISTRY}/esp-idf-pre-commit:1"
# target test repo parameters
TEST_ENV_CONFIG_REPO: "https://gitlab-ci-token:${BOT_TOKEN}@${CI_SERVER_HOST}:${CI_SERVER_PORT}/qa/ci-test-runner-configs.git"
# cache python dependencies
PIP_CACHE_DIR: "$CI_PROJECT_DIR/.cache/pip"
@@ -70,7 +72,7 @@ variables:
CI_PYTHON_CONSTRAINT_BRANCH: ""
# Update the filename for a specific ESP-IDF release. It is used only with CI_PYTHON_CONSTRAINT_BRANCH.
CI_PYTHON_CONSTRAINT_FILE: "espidf.constraints.v5.4.txt"
CI_PYTHON_CONSTRAINT_FILE: "espidf.constraints.v5.3.txt"
# Set this variable to repository name of a Python tool you wish to install and test in the context of ESP-IDF CI.
# Keep the variable empty when not used.
@@ -81,14 +83,8 @@ variables:
# This is used only if CI_PYTHON_TOOL_REPO is not empty.
CI_PYTHON_TOOL_BRANCH: ""
# Set this variable to Clang toolchain distro URL to be used.
# NOTE: We have separate toolchains for Xtensa and RISCV, therefore jobs for one arch will fail.
# This is OK as far as we use CI_CLANG_DISTRO_URL for pre-release tests purposes only.
# Keep the variable empty when not used.
CI_CLANG_DISTRO_URL: ""
# Set this variable to specify the file name for the known failure cases.
KNOWN_FAILURE_CASES_FILE_NAME: "5.4.txt"
KNOWN_FAILURE_CASES_FILE_NAME: "5.3.txt"
IDF_CI_BUILD: 1
@@ -100,8 +96,6 @@ variables:
CCACHE_DIR: "/cache/idf_ccache"
CCACHE_MAXSIZE: "50G"
FF_USE_NEW_BASH_EVAL_STRATEGY: "true"
################################################
# `before_script` and `after_script` Templates #
################################################
@@ -141,48 +135,40 @@ variables:
export IDF_MIRROR_PREFIX_MAP=
fi
if [[ "${CI_JOB_STAGE}" != "target_test" ]]; then
section_start "running_install_sh" "Running install.sh"
if [[ "${CI_JOB_STAGE}" == "build_doc" ]]; then
run_cmd bash install.sh --enable-ci --enable-docs
elif [[ "${CI_JOB_STAGE}" == "build" ]]; then
# install latest python packages
# target test jobs
if [[ "${CI_JOB_STAGE}" == "target_test" ]]; then
run_cmd bash install.sh --enable-ci --enable-pytest
elif [[ "${CI_JOB_STAGE}" == "build_doc" ]]; then
run_cmd bash install.sh --enable-ci --enable-docs
elif [[ "${CI_JOB_STAGE}" == "build" ]]; then
run_cmd bash install.sh --enable-ci --enable-pytest
else
if ! echo "${CI_JOB_NAME}" | egrep ".*pytest.*"; then
run_cmd bash install.sh --enable-ci
else
if ! echo "${CI_JOB_NAME}" | egrep ".*pytest.*"; then
run_cmd bash install.sh --enable-ci
else
run_cmd bash install.sh --enable-ci --enable-pytest --enable-test-specific
fi
run_cmd bash install.sh --enable-ci --enable-pytest
fi
section_end "running_install_sh"
else
section_start "install_python_env" "Install Python environment"
run_cmd python tools/idf_tools.py install-python-env --features ci,pytest,test-specific
section_end "install_python_env"
fi
if [[ ! -z "$INSTALL_EXTRA_TOOLS" ]]; then
section_start "installing_optional_tools" "Install optional tools ${INSTALL_EXTRA_TOOLS}"
$IDF_PATH/tools/idf_tools.py --non-interactive install $INSTALL_EXTRA_TOOLS
section_end "installing_optional_tools"
fi
# Install esp-clang if necessary (esp-clang is separately installed)
if [[ "$IDF_TOOLCHAIN" == "clang" && -z "$CI_CLANG_DISTRO_URL" ]]; then
# Install esp-clang if necessary
if [[ "$IDF_TOOLCHAIN" == "clang" ]]; then
$IDF_PATH/tools/idf_tools.py --non-interactive install esp-clang
fi
if [[ "${CI_JOB_STAGE}" == "target_test" ]]; then
section_start "IDF_SKIP_TOOLS_CHECK" "Skip required tools check"
export IDF_SKIP_TOOLS_CHECK=1
section_end "IDF_SKIP_TOOLS_CHECK"
# Install QEMU if necessary
if [[ ! -z "$INSTALL_QEMU" ]]; then
$IDF_PATH/tools/idf_tools.py --non-interactive install qemu-xtensa qemu-riscv32
fi
section_start "source_export" "Source export.sh"
source ./export.sh
section_end "source_export"
# Custom clang toolchain
if [[ "$IDF_TOOLCHAIN" == "clang" && ! -z "$CI_CLANG_DISTRO_URL" ]]; then
# Since the version 3.21 CMake passes source files and include dirs to ninja using absolute paths.
# Needed for pytest junit reports.
$IDF_PATH/tools/idf_tools.py --non-interactive install cmake
source ./export.sh
# Custom clang
if [[ ! -z "$CI_CLANG_DISTRO_URL" ]]; then
echo "Using custom clang from ${CI_CLANG_DISTRO_URL}"
wget $CI_CLANG_DISTRO_URL
ARCH_NAME=$(basename $CI_CLANG_DISTRO_URL)
@@ -191,21 +177,13 @@ variables:
fi
# Custom OpenOCD
if [[ "$CI_JOB_STAGE" == "target_test" ]]; then
machine="$(uname -m)"
if [[ "$machine" == "armv7l" ]] ; then
OOCD_DISTRO_URL="$OOCD_DISTRO_URL_ARMHF"
elif [[ "$machine" == "aarch64" ]] ; then
OOCD_DISTRO_URL="$OOCD_DISTRO_URL_ARM64"
fi
if [[ ! -z "$OOCD_DISTRO_URL" ]]; then
echo "Using custom OpenOCD from ${OOCD_DISTRO_URL}"
wget $OOCD_DISTRO_URL
ARCH_NAME=$(basename $OOCD_DISTRO_URL)
tar -x -f $ARCH_NAME
export OPENOCD_SCRIPTS=$PWD/openocd-esp32/share/openocd/scripts
export PATH=$PWD/openocd-esp32/bin:$PATH
fi
if [[ ! -z "$OOCD_DISTRO_URL" && "$CI_JOB_STAGE" == "target_test" ]]; then
echo "Using custom OpenOCD from ${OOCD_DISTRO_URL}"
wget $OOCD_DISTRO_URL
ARCH_NAME=$(basename $OOCD_DISTRO_URL)
tar -x -f $ARCH_NAME
export OPENOCD_SCRIPTS=$PWD/openocd-esp32/share/openocd/scripts
export PATH=$PWD/openocd-esp32/bin:$PATH
fi
if [[ -n "$CI_PYTHON_TOOL_REPO" ]]; then
@@ -214,8 +192,6 @@ variables:
rm -rf ${CI_PYTHON_TOOL_REPO}
fi
info "setup tools and python venv done"
.show_ccache_statistics: &show_ccache_statistics |
# Show ccache statistics if enabled globally
test "$CI_CCACHE_STATS" == 1 && test -n "$(which ccache)" && ccache --show-stats -vv || true
@@ -238,22 +214,18 @@ variables:
- *common-before_scripts
# On macOS, these tools need to be installed
- export IDF_TOOLS_PATH="${HOME}/.espressif_runner_${CI_RUNNER_ID}_${CI_CONCURRENT_ID}"
# remove idf-env.json, since it may contains enabled "features"
- rm -f $IDF_TOOLS_PATH/idf-env.json
- $IDF_PATH/tools/idf_tools.py --non-interactive install cmake ninja
# This adds tools (compilers) and the version-specific Python environment to PATH
- *setup_tools_and_idf_python_venv
- fetch_submodules
variables:
INSTALL_EXTRA_TOOLS: cmake ninja
.after_script:build:macos:upload-failed-job-logs:ccache-show-stats:
.after_script:build:macos:upload-when-fail:
after_script:
# macos is running shell executor, which means it would use
# the system installed /usr/local/bin/python3 by default.
# Ensure pyenv and PYENV_VERSION installed
- eval "$(pyenv init -)"
- *upload_failed_job_log_artifacts
- *show_ccache_statistics
.before_script:build:
before_script:
@@ -264,11 +236,11 @@ variables:
- export EXTRA_CFLAGS=${PEDANTIC_CFLAGS}
- export EXTRA_CXXFLAGS=${PEDANTIC_CXXFLAGS}
.after_script:build:ccache-show-stats:
.after_script:build:ccache:
after_script:
- *show_ccache_statistics
.after_script:build:ccache-show-stats:upload-failed-job-logs:
.after_script:build:ccache:upload-when-fail:
after_script:
- *show_ccache_statistics
- *upload_failed_job_log_artifacts
@@ -307,8 +279,8 @@ variables:
git remote add origin "${CI_REPOSITORY_URL}"
fi
.git_checkout_ci_commit_sha: &git_checkout_ci_commit_sha |
git checkout $CI_COMMIT_SHA
.git_checkout_fetch_head: &git_checkout_fetch_head |
git checkout FETCH_HEAD
git clean ${GIT_CLEAN_FLAGS}
# git diff requires two commits, with different CI env var
@@ -332,7 +304,6 @@ variables:
git fetch origin $CI_MERGE_REQUEST_DIFF_BASE_SHA --depth=1 ${GIT_FETCH_EXTRA_FLAGS}
git fetch origin $CI_MERGE_REQUEST_SOURCE_BRANCH_SHA --depth=1 ${GIT_FETCH_EXTRA_FLAGS}
export GIT_DIFF_OUTPUT=$(git diff --name-only $CI_MERGE_REQUEST_DIFF_BASE_SHA $CI_MERGE_REQUEST_SOURCE_BRANCH_SHA)
git fetch origin $CI_COMMIT_SHA --depth=1 ${GIT_FETCH_EXTRA_FLAGS}
# merge request pipelines, when the mr got conflicts
elif [[ -n $CI_MERGE_REQUEST_DIFF_BASE_SHA ]]; then
git fetch origin $CI_MERGE_REQUEST_DIFF_BASE_SHA --depth=1 ${GIT_FETCH_EXTRA_FLAGS}
@@ -348,7 +319,7 @@ variables:
git fetch origin $CI_COMMIT_SHA --depth=2 ${GIT_FETCH_EXTRA_FLAGS}
export GIT_DIFF_OUTPUT=$(git diff --name-only $CI_COMMIT_SHA~1 $CI_COMMIT_SHA)
fi
- *git_checkout_ci_commit_sha
- *git_checkout_fetch_head
- *common-before_scripts
- *setup_tools_and_idf_python_venv
- add_gitlab_ssh_keys
@@ -362,7 +333,7 @@ variables:
- *git_init
- *git_fetch_from_mirror_url_if_exists
- git fetch origin "${CI_COMMIT_SHA}" --depth=1 ${GIT_FETCH_EXTRA_FLAGS}
- *git_checkout_ci_commit_sha
- *git_checkout_fetch_head
- *common-before_scripts
- *setup_tools_and_idf_python_venv
- add_gitlab_ssh_keys

View File

@@ -1,4 +1,4 @@
# External DangerJS
# Extenal DangerJS
include:
- project: espressif/shared-ci-dangerjs
ref: master
@@ -10,6 +10,7 @@ run-danger-mr-linter:
GIT_STRATEGY: none # no repo checkout
ENABLE_CHECK_AREA_LABELS: 'true'
ENABLE_CHECK_DOCS_TRANSLATION: 'true'
ENABLE_CHECK_RELEASE_NOTES_DESCRIPTION: 'true'
ENABLE_CHECK_UPDATED_CHANGELOG: 'false'
before_script: []
cache: []

View File

@@ -7,12 +7,12 @@
#
# This file should ONLY be used during bringup. Should be reset to empty after the bringup process
extra_default_build_targets:
- esp32p4
- esp32c5
bypass_check_test_targets:
- esp32c5
- esp32c61
#
# These lines would
# - enable the README.md check for esp32c6. Don't forget to add the build jobs in .gitlab/ci/build.yml

View File

@@ -19,7 +19,6 @@ check_submodule_sync:
dependencies: []
script:
- git submodule deinit --force .
- rm -rf .git/modules # remove all the cached metadata
# setting the default remote URL to the public one, to resolve relative location URLs
- git config remote.origin.url ${PUBLIC_IDF_URL}
# check if all submodules are correctly synced to public repository

View File

@@ -37,16 +37,25 @@
.if-dev-push: &if-dev-push
if: '$CI_COMMIT_REF_NAME != "master" && $CI_COMMIT_BRANCH !~ /^release\/v/ && $CI_COMMIT_TAG !~ /^v\d+\.\d+(\.\d+)?($|-)/ && $CI_COMMIT_TAG !~ /^qa-test/ && ($CI_PIPELINE_SOURCE == "push" || $CI_PIPELINE_SOURCE == "merge_request_event")'
.if-schedule: &if-schedule
if: '$CI_PIPELINE_SOURCE == "schedule"'
.doc-rules:build:docs-full:
rules:
- <<: *if-qa-test-tag
when: never
- <<: *if-protected
- <<: *if-schedule
- <<: *if-label-build_docs
- <<: *if-label-docs_full
- <<: *if-dev-push
changes: *patterns-docs-full
.doc-rules:build:docs-full-prod:
rules:
- <<: *if-qa-test-tag
when: never
- <<: *if-protected-no_label
.doc-rules:build:docs-partial:
rules:
- <<: *if-qa-test-tag
@@ -83,18 +92,17 @@ check_docs_lang_sync:
stage: build_doc
tags:
- build_docs
needs:
- job: fast_template_app
artifacts: false
optional: true
script:
- if [ -n "${BREATHE_ALT_INSTALL_URL}" ]; then pip uninstall -y breathe && pip install -U ${BREATHE_ALT_INSTALL_URL}; fi
- cd docs
- build-docs -t $DOCTGT -bs $DOC_BUILDERS -l $DOCLANG build
artifacts:
expire_in: 4 days
when: always
parallel:
matrix:
- DOCLANG: ["en", "zh_CN"]
DOCTGT: ["esp32", "esp32s2", "esp32s3", "esp32c3", "esp32c2", "esp32c6", "esp32c61", "esp32c5","esp32h2", "esp32p4"]
DOCTGT: ["esp32", "esp32s2", "esp32s3", "esp32c3", "esp32c2", "esp32c6", "esp32c5","esp32h2", "esp32p4"]
check_docs_gh_links:
image: $ESP_IDF_DOC_ENV_IMAGE
@@ -111,12 +119,26 @@ build_docs_html_full:
extends:
- .build_docs_template
- .doc-rules:build:docs-full
needs:
- job: fast_template_app
artifacts: false
optional: true
artifacts:
paths:
- docs/_build/*/*/*.txt
- docs/_build/*/*/html/*
variables:
DOC_BUILDERS: "html"
build_docs_html_full_prod:
extends:
- .build_docs_template
- .doc-rules:build:docs-full-prod
dependencies: [] # Stop build_docs jobs from downloading all previous job's artifacts
artifacts:
when: always
paths:
- docs/_build/*/*/*.txt
- docs/_build/*/*/html/*
expire_in: 4 days
variables:
DOC_BUILDERS: "html"
@@ -124,12 +146,14 @@ build_docs_html_partial:
extends:
- .build_docs_template
- .doc-rules:build:docs-partial
needs:
- job: fast_template_app
artifacts: false
optional: true
artifacts:
when: always
paths:
- docs/_build/*/*/*.txt
- docs/_build/*/*/html/*
expire_in: 4 days
variables:
DOC_BUILDERS: "html"
parallel:
@@ -139,21 +163,41 @@ build_docs_html_partial:
- DOCLANG: "zh_CN"
DOCTGT: "esp32p4"
build_docs_pdf:
extends:
- .build_docs_template
- .doc-rules:build:docs-full
needs:
- job: fast_template_app
artifacts: false
optional: true
artifacts:
paths:
- docs/_build/*/*/latex/*
variables:
DOC_BUILDERS: "latex"
build_docs_pdf_prod:
extends:
- .build_docs_template
- .doc-rules:build:docs-full-prod
dependencies: [] # Stop build_docs jobs from downloading all previous job's artifacts
artifacts:
paths:
- docs/_build/*/*/latex/*
variables:
DOC_BUILDERS: "latex"
.deploy_docs_template:
image: $ESP_IDF_DOC_ENV_IMAGE
variables:
DOCS_BUILD_DIR: "${IDF_PATH}/docs/_build/"
PYTHONUNBUFFERED: 1
# ensure all tags are fetched, need to know the latest/stable tag for the docs
GIT_STRATEGY: clone
GIT_DEPTH: 0
stage: test_deploy
tags:
- deploy
- shiny
script:
# ensure all tags are fetched, need to know the latest/stable tag for the docs
- git fetch --tags --prune
- add_doc_server_ssh_keys $DOCS_DEPLOY_PRIVATEKEY $DOCS_DEPLOY_SERVER $DOCS_DEPLOY_SERVER_USER
- export GIT_VER=$(git describe --always ${PIPELINE_COMMIT_SHA} --)
- deploy-docs
@@ -172,6 +216,8 @@ deploy_docs_preview:
optional: true
- job: build_docs_html_full
optional: true
- job: build_docs_pdf
optional: true
variables:
TYPE: "preview"
# older branches use DOCS_DEPLOY_KEY, DOCS_SERVER, DOCS_SERVER_USER, DOCS_PATH for preview server so we keep these names for 'preview'
@@ -186,12 +232,12 @@ deploy_docs_production:
# The DOCS_PROD_* variables used by this job are "Protected" so these branches must all be marked "Protected" in Gitlab settings
extends:
- .deploy_docs_template
rules:
- <<: *if-protected-no_label
- .doc-rules:build:docs-full-prod
stage: post_deploy
dependencies: # set dependencies to null to avoid missing artifacts issue
needs: # ensure runs after push_to_github succeeded
- build_docs_html_full
- build_docs_html_full_prod
- build_docs_pdf_prod
- job: push_to_github
artifacts: false
variables:
@@ -206,19 +252,16 @@ deploy_docs_production:
check_doc_links:
extends:
- .build_docs_template
rules:
- <<: *if-protected-no_label
- .doc-rules:build:docs-full-prod
stage: post_deploy
needs:
- job: deploy_docs_production
artifacts: false
tags: ["build", "amd64", "internet"]
artifacts:
when: always
paths:
- docs/_build/*/*/*.txt
- docs/_build/*/*/linkcheck/*.txt
expire_in: 1 week
allow_failure: true
script:
- cd docs

View File

@@ -34,16 +34,22 @@ check_public_headers:
- IDF_TARGET=esp32p4 python tools/ci/check_public_headers.py --jobs 4 --prefix riscv32-esp-elf-
- IDF_TARGET=esp32c61 python tools/ci/check_public_headers.py --jobs 4 --prefix riscv32-esp-elf-
test_nvs_on_host:
extends: .host_test_template
script:
- cd components/nvs_flash/test_nvs_host
- make test
test_nvs_coverage:
extends:
- .host_test_template
- .rules:labels:nvs_coverage
artifacts:
paths:
- components/nvs_flash/host_test/nvs_host_test/coverage_report
- components/nvs_flash/test_nvs_host/coverage_report
script:
- cd components/nvs_flash/host_test/nvs_host_test
- idf.py build coverage
- cd components/nvs_flash/test_nvs_host
- make coverage_report
# the 'long' host tests take approx 11 hours on our current runners. Adding some margin here for possible CPU contention
timeout: 18 hours
@@ -62,6 +68,22 @@ test_ldgen_on_host:
variables:
LC_ALL: C.UTF-8
test_reproducible_build:
extends: .host_test_template
script:
- ./tools/ci/test_reproducible_build.sh
artifacts:
when: on_failure
paths:
- "**/sdkconfig"
- "**/build*/*.bin"
- "**/build*/*.elf"
- "**/build*/*.map"
- "**/build*/flasher_args.json"
- "**/build*/*.bin"
- "**/build*/bootloader/*.bin"
- "**/build*/partition_table/*.bin"
test_spiffs_on_host:
extends: .host_test_template
script:
@@ -111,8 +133,7 @@ test_cli_installer:
script:
# Tools must be downloaded for testing
# We could use "idf_tools.py download all", but we don't want to install clang because of its huge size
# cmake@version that is supported
- python3 ${IDF_PATH}/tools/idf_tools.py download required qemu-riscv32 qemu-xtensa cmake cmake@3.16.3
- python3 ${IDF_PATH}/tools/idf_tools.py download required qemu-riscv32 qemu-xtensa cmake
- cd ${IDF_PATH}/tools/test_idf_tools
- python3 -m pip install jsonschema
- python3 ./test_idf_tools.py -v
@@ -196,7 +217,7 @@ test_tools:
junit: ${IDF_PATH}/XUNIT_*.xml
variables:
LC_ALL: C.UTF-8
INSTALL_EXTRA_TOOLS: "qemu-xtensa qemu-riscv32" # for test_idf_qemu.py
INSTALL_QEMU: 1 # for test_idf_qemu.py
script:
- stat=0
- cd ${IDF_PATH}/tools/ci/test_autocomplete
@@ -234,7 +255,6 @@ test_mqtt_on_host:
test_transport_on_host:
extends: .host_test_template
allow_failure: true # IDFCI-2781 [v5.5, v5.4] test_transport_on_host fails on ubuntu 24.04
script:
- cd ${IDF_PATH}/components/tcp_transport/host_test
- idf.py build
@@ -279,17 +299,16 @@ test_pytest_qemu:
paths:
- XUNIT_RESULT.xml
- pytest-embedded/
- "**/build*/*.bin"
reports:
junit: XUNIT_RESULT.xml
allow_failure: true # IDFCI-1752
parallel:
matrix:
- IDF_TARGET: "esp32"
INSTALL_EXTRA_TOOLS: "qemu-xtensa"
- IDF_TARGET: "esp32c3"
INSTALL_EXTRA_TOOLS: "qemu-riscv32"
- IDF_TARGET: [esp32, esp32c3]
variables:
INSTALL_QEMU: 1
script:
- run_cmd python tools/ci/ci_build_apps.py . -v
- run_cmd python tools/ci/ci_build_apps.py . -vv
--target $IDF_TARGET
--pytest-apps
-m qemu
@@ -299,7 +318,6 @@ test_pytest_qemu:
- python tools/ci/get_known_failure_cases_file.py
- run_cmd pytest
--target $IDF_TARGET
--log-cli-level DEBUG
-m qemu
--embedded-services idf,qemu
--junitxml=XUNIT_RESULT.xml
@@ -319,7 +337,7 @@ test_pytest_linux:
reports:
junit: XUNIT_RESULT.xml
script:
- run_cmd python tools/ci/ci_build_apps.py components examples tools/test_apps -v
- run_cmd python tools/ci/ci_build_apps.py components examples tools/test_apps -vv
--target linux
--pytest-apps
-m host_test
@@ -330,38 +348,6 @@ test_pytest_linux:
- run_cmd pytest
--target linux
-m host_test
--embedded-services idf
--junitxml=XUNIT_RESULT.xml
--ignore-result-files ${KNOWN_FAILURE_CASES_FILE_NAME}
--app-info-filepattern \"list_job_*.txt\"
test_pytest_macos:
extends:
- .host_test_template
- .before_script:build:macos
tags:
- macos_shell
artifacts:
paths:
- XUNIT_RESULT.xml
- pytest-embedded/
- "**/build*/build_log.txt"
reports:
junit: XUNIT_RESULT.xml
variables:
PYTEST_IGNORE_COLLECT_IMPORT_ERROR: "1"
script:
- run_cmd python tools/ci/ci_build_apps.py components examples tools/test_apps -v
--target linux
--pytest-apps
-m \"host_test and macos_shell\"
--collect-app-info "list_job_${CI_JOB_NAME_SLUG}.txt"
--modified-components ${MR_MODIFIED_COMPONENTS}
--modified-files ${MR_MODIFIED_FILES}
- python tools/ci/get_known_failure_cases_file.py
- run_cmd pytest
--target linux
-m \"host_test and macos_shell\"
--junitxml=XUNIT_RESULT.xml
--ignore-result-files ${KNOWN_FAILURE_CASES_FILE_NAME}
--app-info-filepattern \"list_job_*.txt\"
@@ -376,55 +362,5 @@ test_idf_pytest_plugin:
reports:
junit: XUNIT_RESULT.xml
script:
- cd ${IDF_PATH}/tools/ci/dynamic_pipelines/tests/test_report_generator
- python -m unittest test_report_generator.py
- cd ${IDF_PATH}/tools/ci/idf_pytest
- cd tools/ci/idf_pytest
- pytest --junitxml=${CI_PROJECT_DIR}/XUNIT_RESULT.xml
test_idf_build_apps_load_soc_caps:
extends: .host_test_template
script:
- python tools/ci/check_soc_headers_load_in_idf_build_apps.py
test_nvs_gen_check:
extends: .host_test_template
artifacts:
paths:
- XUNIT_RESULT.xml
- components/nvs_flash/nvs_partition_tool
reports:
junit: XUNIT_RESULT.xml
variables:
LC_ALL: C.UTF-8
script:
- cd ${IDF_PATH}/components/nvs_flash/nvs_partition_tool
- pytest --noconftest test_nvs_gen_check.py --junitxml=XUNIT_RESULT.xml
test_esp_rom:
extends: .host_test_template
artifacts:
paths:
- XUNIT_RESULT.xml
reports:
junit: XUNIT_RESULT.xml
script:
- cd ${IDF_PATH}/components/esp_rom/
- pytest --noconftest test_esp_rom.py --junitxml=XUNIT_RESULT.xml
make_sure_soc_caps_compatible_in_idf_build_apps:
extends:
- .host_test_template
- .rules:dev-push
artifacts:
paths:
- new.json
- base.json
when: always
when: manual
script:
- python tools/ci/idf_build_apps_dump_soc_caps.py new.json
- git fetch --depth=1 origin $CI_MERGE_REQUEST_DIFF_BASE_SHA
- git checkout -f $CI_MERGE_REQUEST_DIFF_BASE_SHA
- git checkout $CI_COMMIT_SHA -- tools/ci/idf_build_apps_dump_soc_caps.py
- python tools/ci/idf_build_apps_dump_soc_caps.py base.json
- diff new.json base.json

View File

@@ -1,13 +0,0 @@
generate_failed_jobs_report:
stage: post_deploy
tags: [build, shiny]
image: $ESP_ENV_IMAGE
when: always
dependencies: [] # Do not download artifacts from the previous stages
artifacts:
expire_in: 1 week
when: always
paths:
- job_report.html
script:
- python tools/ci/dynamic_pipelines/scripts/generate_report.py --report-type job

View File

@@ -44,9 +44,6 @@ check_blobs:
- IDF_TARGET=esp32c2 $IDF_PATH/components/esp_wifi/test_md5/test_md5.sh
- IDF_TARGET=esp32c3 $IDF_PATH/components/esp_wifi/test_md5/test_md5.sh
- IDF_TARGET=esp32c6 $IDF_PATH/components/esp_wifi/test_md5/test_md5.sh
- IDF_TARGET=esp32c5 $IDF_PATH/components/esp_wifi/test_md5/test_md5.sh
- IDF_TARGET=esp32c61 $IDF_PATH/components/esp_wifi/test_md5/test_md5.sh
- IDF_TARGET=esp32_host $IDF_PATH/components/esp_wifi/test_md5/test_md5.sh
# Check if Coexistence library header files match between IDF and the version used when compiling the libraries
- IDF_TARGET=esp32 $IDF_PATH/components/esp_coex/test_md5/test_md5.sh
- IDF_TARGET=esp32s2 $IDF_PATH/components/esp_coex/test_md5/test_md5.sh
@@ -55,8 +52,6 @@ check_blobs:
- IDF_TARGET=esp32c3 $IDF_PATH/components/esp_coex/test_md5/test_md5.sh
- IDF_TARGET=esp32c6 $IDF_PATH/components/esp_coex/test_md5/test_md5.sh
- IDF_TARGET=esp32h2 $IDF_PATH/components/esp_coex/test_md5/test_md5.sh
- IDF_TARGET=esp32c5 $IDF_PATH/components/esp_coex/test_md5/test_md5.sh
- IDF_TARGET=esp32c61 $IDF_PATH/components/esp_coex/test_md5/test_md5.sh
# Check if Wi-Fi, PHY, BT blobs contain references to specific symbols
- bash $IDF_PATH/tools/ci/check_blobs.sh
@@ -117,10 +112,8 @@ check_test_scripts_build_test_rules:
extends:
- .pre_check_template
- .before_script:build
variables:
PYTEST_IGNORE_COLLECT_IMPORT_ERROR: "1"
script:
# requires basic pytest dependencies
# required pytest related packages
- run_cmd bash install.sh --enable-pytest
- python tools/ci/check_build_test_rules.py check-test-scripts examples/ tools/test_apps components
@@ -142,7 +135,6 @@ pipeline_variables:
# MODIFIED_FILES is a list of files that changed, could be used everywhere
- MODIFIED_FILES=$(echo "$GIT_DIFF_OUTPUT" | xargs)
- echo "MODIFIED_FILES=$MODIFIED_FILES" >> pipeline.env
- echo "REPORT_EXIT_CODE=0" >> pipeline.env
# MR_MODIFIED_FILES and MR_MODIFIED_COMPONENTS are semicolon separated lists that is used in MR only
# for non MR pipeline, these are empty lists
- |
@@ -165,9 +157,6 @@ pipeline_variables:
if [ -n "$CI_PYTHON_CONSTRAINT_BRANCH" ]; then
echo "BUILD_AND_TEST_ALL_APPS=1" >> pipeline.env
fi
- echo "OOCD_DISTRO_URL_ARMHF=$OOCD_DISTRO_URL_ARMHF" >> pipeline.env
- echo "OOCD_DISTRO_URL_ARM64=$OOCD_DISTRO_URL_ARM64" >> pipeline.env
- python tools/ci/ci_process_description.py
- cat pipeline.env
- python tools/ci/artifacts_handler.py upload --type modified_files_and_components_report
artifacts:
@@ -177,47 +166,3 @@ pipeline_variables:
- pipeline.env
expire_in: 1 week
when: always
baseline_manifest_sha:
extends:
- .pre_check_template
- .rules:dev-push
tags: [fast_run, shiny]
script:
- |
# merged results pipelines, by default
# diff between target-branch-head and merged-result-head
if [ -n "$CI_MERGE_REQUEST_TARGET_BRANCH_SHA" ]; then
git fetch origin $CI_MERGE_REQUEST_TARGET_BRANCH_SHA --depth=1
git checkout FETCH_HEAD
idf-build-apps dump-manifest-sha \
--manifest-files $(find . -name ".build-test-rules.yml" | xargs) \
--output .manifest_sha
# merge request pipelines, when the mr got conflicts
# diff between diff-base-sha and merge-request-head
elif [ -n "$CI_MERGE_REQUEST_DIFF_BASE_SHA" ]; then
git fetch origin $CI_MERGE_REQUEST_DIFF_BASE_SHA --depth=1
git checkout FETCH_HEAD
idf-build-apps dump-manifest-sha \
--manifest-files $(find . -name ".build-test-rules.yml" | xargs) \
--output .manifest_sha
# other pipelines, like the protected branches pipelines
# not triggered in this job
fi
artifacts:
paths:
- .manifest_sha
expire_in: 1 week
when: always
redundant_pass_job:
stage: pre_check
tags: [shiny, fast_run]
image: $ESP_ENV_IMAGE
dependencies: null
before_script: []
cache: []
extends: []
script:
- echo "This job is redundant to ensure the 'retry_failed_jobs' job can exist and not be skipped"
when: always

View File

@@ -45,36 +45,3 @@ check_pre_commit:
paths:
- .cache/submodule_archives
policy: pull
check_powershell:
extends:
- .before_script:minimal
stage: pre_check
image: docker:latest
services:
- docker:dind
tags:
- dind
- amd64
needs:
- pipeline_variables
variables:
# cache pre_commit
PRE_COMMIT_HOME: "$CI_PROJECT_DIR/.cache/pre-commit"
rules:
- changes:
- "*.ps1"
script:
- apk add python3
- apk add py3-pip
- pip install pre-commit --break-system-packages
- pre-commit run --hook-stage manual check-powershell-scripts --files $MODIFIED_FILES
cache:
- key: pre_commit-cache-${LATEST_GIT_TAG}
paths:
- .cache/pre-commit
policy: pull
- key: submodule-cache-${LATEST_GIT_TAG}
paths:
- .cache/submodule_archives
policy: pull

View File

@@ -1,15 +0,0 @@
retry_failed_jobs:
stage: retry_failed_jobs
tags: [shiny, fast_run]
allow_failure: true
image: $ESP_ENV_IMAGE
dependencies: null
before_script: []
cache: []
extends: []
script:
- echo "Retrieving and retrying all failed jobs for the pipeline..."
- python tools/ci/python_packages/gitlab_api.py retry_failed_jobs $CI_MERGE_REQUEST_PROJECT_ID --pipeline_id $CI_PIPELINE_ID
when: manual
needs:
- redundant_pass_job

View File

@@ -66,8 +66,6 @@
- "tools/ci/check_esp_memory_utils_headers.sh"
- "tools/ci/check_blobs.sh"
- "tools/ci/check_public_headers.py"
- "tools/ci/check_register_rw_half_word.cmake"
- "tools/ci/check_register_rw_half_word.py"
.patterns-host_test: &patterns-host_test
- ".gitlab/ci/host-test.yml"
@@ -83,8 +81,6 @@
- "tools/idf_monitor.py"
- "tools/activate.py"
- "tools/idf.py"
- "tools/idf_py_actions/**/*"
- "tools/test_idf_py/**/*"
@@ -98,11 +94,6 @@
- "tools/test_idf_tools/**/*"
- "tools/install_util.py"
- "tools/export_utils/utils.py"
- "tools/export_utils/shell_types.py"
- "tools/export_utils/console_output.py"
- "tools/export_utils/activate_venv.py"
- "tools/requirements/*"
- "tools/requirements.json"
- "tools/requirements_schema.json"
@@ -115,6 +106,8 @@
- "tools/detect_python.sh"
- "tools/detect_python.fish"
- "tools/ci/test_reproducible_build.sh"
- "tools/gen_soc_caps_kconfig/*"
- "tools/gen_soc_caps_kconfig/test/test_gen_soc_caps_kconfig.py"
@@ -155,7 +148,6 @@
.patterns-idf-pytest-plugin: &patterns-idf-pytest-plugin
- "tools/ci/idf_pytest/**/*"
- "tools/ci/dynamic_pipelines/tests/**/*"
##############
# if anchors #
@@ -225,10 +217,6 @@
rules:
- <<: *if-tag-release
.rules:dev-push:
rules:
- <<: *if-dev-push
# Do not upload caches on dev branches by default
.rules:upload-python-cache:
rules:
@@ -261,14 +249,14 @@
- <<: *if-dev-push
changes: *patterns-python-files
#.rules:patterns:static-code-analysis-preview:
# rules:
# - <<: *if-dev-push
# changes: *patterns-c-files
# - <<: *if-dev-push
# changes: *patterns-python-files
# - <<: *if-dev-push
# changes: *patterns-sonarqube-files
.rules:patterns:static-code-analysis-preview:
rules:
- <<: *if-dev-push
changes: *patterns-c-files
- <<: *if-dev-push
changes: *patterns-python-files
- <<: *if-dev-push
changes: *patterns-sonarqube-files
.rules:patterns:idf-pytest-plugin:
rules:

View File

@@ -38,84 +38,84 @@ check_pylint:
fi
- if [ -z "$files" ]; then echo "No python files found"; exit 0; fi
- run_cmd pylint --exit-zero --load-plugins=pylint_gitlab --output-format=gitlab-codeclimate:pylint.json $files
# build stage
# Sonarqube related jobs put here for this reason:
# Here we have two jobs. code_quality_check and code_quality_report.
#
## build stage
## Sonarqube related jobs put here for this reason:
## Here we have two jobs. code_quality_check and code_quality_report.
##
## code_quality_check will analyze the code changes between your MR and
## code repo stored in sonarqube server. The analysis result is only shown in
## the comments under this MR and won't be transferred to the server.
##
## code_quality_report will analyze and transfer both of the newly added code
## and the analysis result to the server.
##
## Put in the front to ensure that the newly merged code can be stored in
## sonarqube server ASAP, in order to avoid reporting unrelated code issues
#.sonar_scan_template:
# stage: build
# extends: .pre_check_template
# # full clone since this image does not support fetch --shallow-since-cutoff
# # shiny runners are used for full clone
# tags: [build, shiny]
# image: $SONARQUBE_SCANNER_IMAGE
# before_script:
# - source tools/ci/utils.sh
# - export PYTHONPATH="$CI_PROJECT_DIR/tools:$CI_PROJECT_DIR/tools/ci/python_packages:$PYTHONPATH"
# - fetch_submodules
# # Exclude the submodules, all paths ends with /**
# - submodules=$(get_all_submodules)
# # get all exclude paths specified in tools/ci/sonar_exclude_list.txt | ignore lines start with # | xargs | replace all <space> to <comma>
# - custom_excludes=$(cat $CI_PROJECT_DIR/tools/ci/sonar_exclude_list.txt | grep -v '^#' | xargs | sed -e 's/ /,/g')
# # Exclude the report dir as well
# - export EXCLUSIONS="$custom_excludes,$submodules"
# - export SONAR_SCANNER_OPTS="-Xmx2048m"
# variables:
# GIT_DEPTH: 0
# REPORT_PATTERN: clang_tidy_reports/**/*.txt
# artifacts:
# paths:
# - $REPORT_PATTERN
# expire_in: 1 week
# when: always
# dependencies: # Here is not a hard dependency relationship, could be skipped when only python files changed. so we do not use "needs" here.
# - clang_tidy_check
# code_quality_check will analyze the code changes between your MR and
# code repo stored in sonarqube server. The analysis result is only shown in
# the comments under this MR and won't be transferred to the server.
#
#code_quality_check:
# extends:
# - .sonar_scan_template
# - .rules:patterns:static-code-analysis-preview
# allow_failure: true # it's using exit code to indicate the code analysis result,
# # we don't want to block ci when critical issues founded
# script:
# - export CI_MERGE_REQUEST_COMMITS=$(python ${CI_PROJECT_DIR}/tools/ci/ci_get_mr_info.py commits --src-branch ${CI_COMMIT_REF_NAME} | tr '\n' ',')
# # test if this branch have merge request, if not, exit 0
# - test -n "$CI_MERGE_REQUEST_IID" || exit 0
# - test -n "$CI_MERGE_REQUEST_COMMITS" || exit 0
# - sonar-scanner
# -Dsonar.analysis.mode=preview
# -Dsonar.branch.name=$CI_MERGE_REQUEST_SOURCE_BRANCH_NAME
# -Dsonar.cxx.clangtidy.reportPath=$REPORT_PATTERN
# -Dsonar.exclusions=$EXCLUSIONS
# -Dsonar.gitlab.ci_merge_request_iid=$CI_MERGE_REQUEST_IID
# -Dsonar.gitlab.commit_sha=$CI_MERGE_REQUEST_COMMITS
# -Dsonar.gitlab.merge_request_discussion=true
# -Dsonar.gitlab.ref_name=$CI_MERGE_REQUEST_SOURCE_BRANCH_NAME
# -Dsonar.host.url=$SONAR_HOST_URL
# -Dsonar.login=$SONAR_LOGIN
# code_quality_report will analyze and transfer both of the newly added code
# and the analysis result to the server.
#
#code_quality_report:
# extends:
# - .sonar_scan_template
# - .rules:protected
# allow_failure: true # it's using exit code to indicate the code analysis result,
# # we don't want to block ci when critical issues founded
# script:
# - sonar-scanner
# -Dsonar.branch.name=$CI_COMMIT_REF_NAME
# -Dsonar.cxx.clangtidy.reportPath=$REPORT_PATTERN
# -Dsonar.exclusions=$EXCLUSIONS
# -Dsonar.gitlab.commit_sha=$PIPELINE_COMMIT_SHA
# -Dsonar.gitlab.ref_name=$CI_COMMIT_REF_NAME
# -Dsonar.host.url=$SONAR_HOST_URL
# -Dsonar.login=$SONAR_LOGIN
# Put in the front to ensure that the newly merged code can be stored in
# sonarqube server ASAP, in order to avoid reporting unrelated code issues
.sonar_scan_template:
stage: build
extends: .pre_check_template
# full clone since this image does not support fetch --shallow-since-cutoff
# shiny runners are used for full clone
tags: [build, shiny]
image: $SONARQUBE_SCANNER_IMAGE
before_script:
- source tools/ci/utils.sh
- export PYTHONPATH="$CI_PROJECT_DIR/tools:$CI_PROJECT_DIR/tools/ci/python_packages:$PYTHONPATH"
- fetch_submodules
# Exclude the submodules, all paths ends with /**
- submodules=$(get_all_submodules)
# get all exclude paths specified in tools/ci/sonar_exclude_list.txt | ignore lines start with # | xargs | replace all <space> to <comma>
- custom_excludes=$(cat $CI_PROJECT_DIR/tools/ci/sonar_exclude_list.txt | grep -v '^#' | xargs | sed -e 's/ /,/g')
# Exclude the report dir as well
- export EXCLUSIONS="$custom_excludes,$submodules"
- export SONAR_SCANNER_OPTS="-Xmx2048m"
variables:
GIT_DEPTH: 0
REPORT_PATTERN: clang_tidy_reports/**/*.txt
artifacts:
paths:
- $REPORT_PATTERN
expire_in: 1 week
when: always
dependencies: # Here is not a hard dependency relationship, could be skipped when only python files changed. so we do not use "needs" here.
- clang_tidy_check
code_quality_check:
extends:
- .sonar_scan_template
- .rules:patterns:static-code-analysis-preview
allow_failure: true # it's using exit code to indicate the code analysis result,
# we don't want to block ci when critical issues founded
script:
- export CI_MERGE_REQUEST_COMMITS=$(python ${CI_PROJECT_DIR}/tools/ci/ci_get_mr_info.py commits --src-branch ${CI_COMMIT_REF_NAME} | tr '\n' ',')
# test if this branch have merge request, if not, exit 0
- test -n "$CI_MERGE_REQUEST_IID" || exit 0
- test -n "$CI_MERGE_REQUEST_COMMITS" || exit 0
- sonar-scanner
-Dsonar.analysis.mode=preview
-Dsonar.branch.name=$CI_MERGE_REQUEST_SOURCE_BRANCH_NAME
-Dsonar.cxx.clangtidy.reportPath=$REPORT_PATTERN
-Dsonar.exclusions=$EXCLUSIONS
-Dsonar.gitlab.ci_merge_request_iid=$CI_MERGE_REQUEST_IID
-Dsonar.gitlab.commit_sha=$CI_MERGE_REQUEST_COMMITS
-Dsonar.gitlab.merge_request_discussion=true
-Dsonar.gitlab.ref_name=$CI_MERGE_REQUEST_SOURCE_BRANCH_NAME
-Dsonar.host.url=$SONAR_HOST_URL
-Dsonar.login=$SONAR_LOGIN
code_quality_report:
extends:
- .sonar_scan_template
- .rules:protected
allow_failure: true # it's using exit code to indicate the code analysis result,
# we don't want to block ci when critical issues founded
script:
- sonar-scanner
-Dsonar.branch.name=$CI_COMMIT_REF_NAME
-Dsonar.cxx.clangtidy.reportPath=$REPORT_PATTERN
-Dsonar.exclusions=$EXCLUSIONS
-Dsonar.gitlab.commit_sha=$PIPELINE_COMMIT_SHA
-Dsonar.gitlab.ref_name=$CI_COMMIT_REF_NAME
-Dsonar.host.url=$SONAR_HOST_URL
-Dsonar.login=$SONAR_LOGIN

View File

@@ -31,8 +31,7 @@ test_cli_installer_win:
IDF_PATH: "$CI_PROJECT_DIR"
script:
# Tools must be downloaded for testing
# cmake@version that is supported
- python ${IDF_PATH}\tools\idf_tools.py download required qemu-riscv32 qemu-xtensa cmake cmake@3.16.3
- python ${IDF_PATH}\tools\idf_tools.py download required qemu-riscv32 qemu-xtensa cmake
- cd ${IDF_PATH}\tools\test_idf_tools
- python -m pip install jsonschema
- python .\test_idf_tools.py

View File

@@ -13,17 +13,3 @@
<!-- Either state release notes or write "No release notes" -->
<!-- ## Breaking change notes --><!-- Optional -->
<!-- ## Dynamic Pipeline Configuration
```yaml
Test Case Filters:
# Only run tests that match the given substring expression (modified files/components will be ignored):
# Please use a list of strings.
# This will run the test cases filtered like `pytest -k "(<list_item_1>) or (<list_item_2>) or ...`
# The fast pipeline will fail at the final stage.
# For example:
- test_sdm and not sdmmc
- test_hello_world
# This example will include all tests containing 'test_hello_world' in the name,
# and include all tests containing 'test_sdm' but not 'sdmmc' in the name.
``` --><!-- Optional -->

5
.gitmodules vendored
View File

@@ -49,13 +49,12 @@
[submodule "components/json/cJSON"]
path = components/json/cJSON
url = ../../DaveGamble/cJSON.git
sbom-version = 1.7.19
sbom-version = 1.7.17
sbom-cpe = cpe:2.3:a:cjson_project:cjson:{}:*:*:*:*:*:*:*
sbom-cpe = cpe:2.3:a:davegamble:cjson:{}:*:*:*:*:*:*:*
sbom-supplier = Person: Dave Gamble
sbom-url = https://github.com/DaveGamble/cJSON
sbom-description = Ultralightweight JSON parser in ANSI C
sbom-hash = c859b25da02955fef659d658b8f324b5cde87be3
sbom-hash = 87d8f0961a01bf09bef98ff89bae9fdec42181ee
[submodule "components/mbedtls/mbedtls"]
path = components/mbedtls/mbedtls

View File

@@ -23,8 +23,7 @@ repos:
.*.pb-c.h|
.*.pb-c.c|
.*.yuv|
.*.rgb|
docs/sphinx-known-warnings\.txt
.*.rgb
)$
- id: end-of-file-fixer
exclude: *whitespace_excludes
@@ -54,10 +53,9 @@ repos:
.*_pb2.py
)$
- repo: https://github.com/codespell-project/codespell
rev: v2.3.0
rev: v2.2.6
hooks:
- id: codespell
exclude: ^docs/sphinx-known-warnings\.txt$
- repo: local
hooks:
- id: check-executables
@@ -72,6 +70,11 @@ repos:
language: python
pass_filenames: false
always_run: true
- id: check-deprecated-kconfigs-options
name: Check if any Kconfig Options Deprecated
entry: tools/ci/check_deprecated_kconfigs.py
language: python
files: 'sdkconfig\.ci$|sdkconfig\.rename$|sdkconfig.*$'
- id: cmake-lint
name: Check CMake Files Format
entry: cmakelint --linelength=120 --spaces=4 --filter=-whitespace/indent
@@ -151,7 +154,7 @@ repos:
require_serial: true
additional_dependencies:
- PyYAML == 5.3.1
- idf-build-apps~=2.5
- idf-build-apps~=2.0
- id: sort-yaml-files
name: sort yaml files
entry: tools/ci/sort_yaml.py
@@ -221,11 +224,6 @@ repos:
name: shellcheck dash (export.sh)
args: ['--shell', 'dash', '-x']
files: 'export.sh'
- repo: https://github.com/espressif/esp-pwsh-check
rev: v1.0.1
hooks:
- id: check-powershell-scripts
stages: [manual]
- repo: https://github.com/espressif/esp-idf-sbom.git
rev: v0.13.0
hooks:
@@ -238,7 +236,6 @@ repos:
name: Lint rST files in docs folder using Sphinx Lint
files: ^(docs/en|docs/zh_CN)/.*\.(rst|inc)$
- repo: https://github.com/espressif/esp-idf-kconfig.git
rev: v2.5.0
rev: v2.1.0
hooks:
- id: check-kconfig-files
- id: check-deprecated-kconfig-options

View File

@@ -16,11 +16,7 @@ endif()
if(NOT BOOTLOADER_BUILD)
if(CONFIG_COMPILER_OPTIMIZATION_SIZE)
if(CMAKE_C_COMPILER_ID MATCHES "Clang")
list(APPEND compile_options "-Oz")
else()
list(APPEND compile_options "-Os")
endif()
list(APPEND compile_options "-Os")
if(CMAKE_C_COMPILER_ID MATCHES "GNU")
list(APPEND compile_options "-freorder-blocks")
endif()
@@ -38,11 +34,7 @@ if(NOT BOOTLOADER_BUILD)
else() # BOOTLOADER_BUILD
if(CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_SIZE)
if(CMAKE_C_COMPILER_ID MATCHES "Clang")
list(APPEND compile_options "-Oz")
else()
list(APPEND compile_options "-Os")
endif()
list(APPEND compile_options "-Os")
if(CMAKE_C_COMPILER_ID MATCHES "GNU")
list(APPEND compile_options "-freorder-blocks")
endif()
@@ -104,7 +96,7 @@ if(CMAKE_C_COMPILER_ID MATCHES "Clang")
list(APPEND compile_options "-Wno-pointer-bool-conversion")
# mbedTLS md5.c triggers this warning in md5_test_buf (false positive)
list(APPEND compile_options "-Wno-string-concatenation")
# multiple cases of implicit conversions between unrelated enum types
# multiple cases of implict convertions between unrelated enum types
list(APPEND compile_options "-Wno-enum-conversion")
# When IRAM_ATTR is specified both in function declaration and definition,
# it produces different section names, since section names include __COUNTER__.
@@ -144,10 +136,6 @@ if(CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_DISABLE)
list(APPEND compile_definitions "-DNDEBUG")
endif()
if(CONFIG_COMPILER_NO_MERGE_CONSTANTS)
list(APPEND compile_options "-fno-merge-constants")
endif()
if(CONFIG_COMPILER_STACK_CHECK_MODE_NORM)
list(APPEND compile_options "-fstack-protector")
elseif(CONFIG_COMPILER_STACK_CHECK_MODE_STRONG)
@@ -160,8 +148,46 @@ if(CONFIG_COMPILER_DUMP_RTL_FILES)
list(APPEND compile_options "-fdump-rtl-expand")
endif()
__generate_prefix_map(prefix_map_compile_options)
list(APPEND compile_options ${prefix_map_compile_options})
if(NOT ${CMAKE_C_COMPILER_VERSION} VERSION_LESS 8.0.0)
if(CONFIG_COMPILER_HIDE_PATHS_MACROS)
list(APPEND compile_options "-fmacro-prefix-map=${CMAKE_SOURCE_DIR}=.")
list(APPEND compile_options "-fmacro-prefix-map=${IDF_PATH}=/IDF")
endif()
if(CONFIG_APP_REPRODUCIBLE_BUILD)
idf_build_set_property(DEBUG_PREFIX_MAP_GDBINIT "${BUILD_DIR}/prefix_map_gdbinit")
list(APPEND compile_options "-fdebug-prefix-map=${IDF_PATH}=/IDF")
list(APPEND compile_options "-fdebug-prefix-map=${PROJECT_DIR}=/IDF_PROJECT")
list(APPEND compile_options "-fdebug-prefix-map=${BUILD_DIR}=/IDF_BUILD")
# component dirs
idf_build_get_property(python PYTHON)
idf_build_get_property(idf_path IDF_PATH)
idf_build_get_property(component_dirs BUILD_COMPONENT_DIRS)
execute_process(
COMMAND ${python}
"${idf_path}/tools/generate_debug_prefix_map.py"
"${BUILD_DIR}"
"${component_dirs}"
OUTPUT_VARIABLE result
RESULT_VARIABLE ret
)
if(NOT ret EQUAL 0)
message(FATAL_ERROR "This is a bug. Please report to https://github.com/espressif/esp-idf/issues")
endif()
spaces2list(result)
list(LENGTH component_dirs length)
math(EXPR max_index "${length} - 1")
foreach(index RANGE ${max_index})
list(GET component_dirs ${index} folder)
list(GET result ${index} after)
list(APPEND compile_options "-fdebug-prefix-map=${folder}=${after}")
endforeach()
endif()
endif()
if(CONFIG_COMPILER_DISABLE_GCC12_WARNINGS)
list(APPEND compile_options "-Wno-address"
@@ -175,22 +201,10 @@ if(CONFIG_COMPILER_DISABLE_GCC13_WARNINGS)
"-Wno-dangling-reference")
endif()
if(CONFIG_COMPILER_DISABLE_GCC14_WARNINGS)
list(APPEND compile_options "-Wno-calloc-transposed-args")
endif()
if(CONFIG_COMPILER_DISABLE_DEFAULT_ERRORS)
if(NOT CMAKE_C_COMPILER_ID MATCHES "Clang")
idf_build_replace_option_from_property(COMPILE_OPTIONS "-Werror" "-Werror=all")
endif()
endif()
# GCC-specific options
if(CMAKE_C_COMPILER_ID STREQUAL "GNU")
list(APPEND compile_options "-fstrict-volatile-bitfields")
if(CONFIG_COMPILER_STATIC_ANALYZER)
list(APPEND compile_options "-fanalyzer")
endif()
list(APPEND compile_options "-fstrict-volatile-bitfields"
)
endif()
if(CONFIG_ESP_SYSTEM_USE_EH_FRAME)
@@ -201,35 +215,8 @@ endif()
list(APPEND link_options "-fno-lto")
if(CONFIG_IDF_TARGET_LINUX AND CMAKE_HOST_SYSTEM_NAME STREQUAL "Darwin")
# Not all versions of the MacOS linker support the -warn_commons flag.
# ld version 1053.12 (and above) have been tested to support it.
# Hence, we extract the version string from the linker output
# before including the flag.
# Get the ld version, capturing both stdout and stderr
execute_process(
COMMAND ${CMAKE_LINKER} -v
OUTPUT_VARIABLE LD_VERSION_OUTPUT
ERROR_VARIABLE LD_VERSION_ERROR
OUTPUT_STRIP_TRAILING_WHITESPACE
ERROR_STRIP_TRAILING_WHITESPACE
)
# Combine stdout and stderr
set(LD_VERSION_OUTPUT "${LD_VERSION_OUTPUT}\n${LD_VERSION_ERROR}")
# Extract the version string
string(REGEX MATCH "PROJECT:(ld|dyld)-([0-9]+)\\.([0-9]+)" LD_VERSION_MATCH "${LD_VERSION_OUTPUT}")
set(LD_VERSION_MAJOR_MINOR "${CMAKE_MATCH_2}.${CMAKE_MATCH_3}")
message(STATUS "Linker Version: ${LD_VERSION_MAJOR_MINOR}")
# Compare the version with 1053.12
if(LD_VERSION_MAJOR_MINOR VERSION_GREATER_EQUAL "1053.12")
list(APPEND link_options "-Wl,-warn_commons")
endif()
list(APPEND link_options "-Wl,-dead_strip")
list(APPEND link_options "-Wl,-warn_commons")
else()
list(APPEND link_options "-Wl,--gc-sections")
list(APPEND link_options "-Wl,--warn-common")
@@ -251,9 +238,7 @@ if(CMAKE_C_COMPILER_ID MATCHES "GNU")
endif()
if(CMAKE_C_COMPILER_ID MATCHES "Clang")
list(APPEND compile_options "-fno-use-cxa-atexit") # TODO IDF-10934
else()
list(APPEND cxx_compile_options "-fuse-cxa-atexit")
list(APPEND compile_options "-fno-use-cxa-atexit")
endif()
if(COMPILER_RT_LIB_NAME)

View File

@@ -84,18 +84,17 @@ Supported since ESP-IDF v4.4.
### ESP32-C2 & ESP8684
#### v1.0, v1.1
#### v1.0
Supported since ESP-IDF v5.0.
#### v1.1
To be added.
#### v1.2
| Release branch | Recommended | Required |
|------------------------|-------------|----------|
| release/v5.0 | v5.0.7+ | v5.0 |
| release/v5.1 | v5.1.4+ | v5.1 |
| release/v5.2 | v5.2.2+ | v5.2 |
| release/v5.3 and above | v5.3+ | v5.3 |
To be added.
### ESP32-C6

View File

@@ -84,18 +84,17 @@
### ESP32-C2 & ESP8684
#### v1.0, v1.1
#### v1.0
从 ESP-IDF v5.0 开始支持。
#### v1.1
待更新。
#### v1.2
| 发布分支 | 推荐版本 | 需求版本 |
|------------------------|-------------|----------|
| release/v5.0 | v5.0.7+ | v5.0 |
| release/v5.1 | v5.1.4+ | v5.1 |
| release/v5.2 | v5.2.2+ | v5.1 |
| release/v5.3 及以上 | v5.3+ | v5.3 |
待更新。
### ESP32-C6

115
Kconfig
View File

@@ -48,10 +48,6 @@ mainmenu "Espressif IoT Development Framework Configuration"
bool
default "y" if IDF_TOOLCHAIN="clang"
config IDF_TOOLCHAIN_GCC
bool
default "y" if IDF_TOOLCHAIN="gcc"
config IDF_TARGET_ARCH_RISCV
bool
default "n"
@@ -79,6 +75,10 @@ mainmenu "Espressif IoT Development Framework Configuration"
string
default "$IDF_INIT_VERSION"
config IDF_TARGET_LINUX
bool
default "y" if IDF_TARGET="linux"
config IDF_TARGET_ESP32
bool
default "y" if IDF_TARGET="esp32"
@@ -119,6 +119,28 @@ mainmenu "Espressif IoT Development Framework Configuration"
select FREERTOS_UNICORE
select IDF_TARGET_ARCH_RISCV
# TODO: IDF-9197
choice IDF_TARGET_ESP32C5_VERSION
prompt "ESP32-C5 version"
depends on IDF_TARGET_ESP32C5
default IDF_TARGET_ESP32C5_MP_VERSION
help
ESP32-C5 will support two versions for a period.
This option is for internal use only.
Select the one that matches your chip model.
config IDF_TARGET_ESP32C5_BETA3_VERSION
bool
prompt "ESP32-C5 beta3"
select ESPTOOLPY_NO_STUB
config IDF_TARGET_ESP32C5_MP_VERSION
bool
prompt "ESP32-C5 MP"
select ESPTOOLPY_NO_STUB
select IDF_ENV_FPGA
endchoice
config IDF_TARGET_ESP32P4
bool
default "y" if IDF_TARGET="esp32p4"
@@ -135,6 +157,7 @@ mainmenu "Espressif IoT Development Framework Configuration"
default "y" if IDF_TARGET="esp32c61"
select FREERTOS_UNICORE
select IDF_TARGET_ARCH_RISCV
select IDF_ENV_FPGA
config IDF_TARGET_LINUX
bool
@@ -150,7 +173,8 @@ mainmenu "Espressif IoT Development Framework Configuration"
default 0x000D if IDF_TARGET_ESP32C6
default 0x0010 if IDF_TARGET_ESP32H2
default 0x0012 if IDF_TARGET_ESP32P4
default 0x0017 if IDF_TARGET_ESP32C5
default 0x0011 if IDF_TARGET_ESP32C5 && IDF_TARGET_ESP32C5_BETA3_VERSION # TODO: IDF-9197
default 0x0017 if IDF_TARGET_ESP32C5 && IDF_TARGET_ESP32C5_MP_VERSION # TODO: IDF-9197
default 0x0014 if IDF_TARGET_ESP32C61
default 0xFFFF
@@ -323,8 +347,8 @@ mainmenu "Espressif IoT Development Framework Configuration"
help
This option sets compiler optimization level (gcc -O argument) for the app.
- The "Debug" setting will add the -Og flag to CFLAGS.
- The "Size" setting will add the -Os flag to CFLAGS (-Oz with Clang).
- The "Debug" setting will add the -0g flag to CFLAGS.
- The "Size" setting will add the -0s flag to CFLAGS.
- The "Performance" setting will add the -O2 flag to CFLAGS.
- The "None" setting will add the -O0 flag to CFLAGS.
@@ -345,7 +369,7 @@ mainmenu "Espressif IoT Development Framework Configuration"
config COMPILER_OPTIMIZATION_DEBUG
bool "Debug (-Og)"
config COMPILER_OPTIMIZATION_SIZE
bool "Optimize for size (-Os with GCC, -Oz with Clang)"
bool "Optimize for size (-Os)"
config COMPILER_OPTIMIZATION_PERF
bool "Optimize for performance (-O2)"
config COMPILER_OPTIMIZATION_NONE
@@ -388,21 +412,6 @@ mainmenu "Espressif IoT Development Framework Configuration"
endchoice # assertions
config COMPILER_ASSERT_NDEBUG_EVALUATE
bool "Enable the evaluation of the expression inside assert(X) when NDEBUG is set"
default y
help
When NDEBUG is set, assert(X) will not cause code to trigger an assertion.
With this option set, assert(X) will still evaluate the expression X, though
the result will never cause an assertion. This means that if X is a function
then the function will be called.
This is not according to the standard, which states that the assert(X) should
be replaced with ((void)0) if NDEBUG is defined.
In ESP-IDF v6.0 the default behavior will change to "no" to be in line with the
standard.
choice COMPILER_FLOAT_LIB_FROM
prompt "Compiler float lib source"
default COMPILER_FLOAT_LIB_FROM_RVFPLIB if ESP_ROM_HAS_RVFPLIB
@@ -524,15 +533,6 @@ mainmenu "Espressif IoT Development Framework Configuration"
help
Stack smashing protection.
config COMPILER_NO_MERGE_CONSTANTS
bool "Disable merging const sections"
depends on IDF_TOOLCHAIN_GCC
help
Disable merging identical constants (string/floating-point) across compilation units.
This helps in better size analysis of the application binary as the rodata section
distribution is more uniform across libraries. On downside, it may increase
the binary size and hence should be used during development phase only.
config COMPILER_WARN_WRITE_STRINGS
bool "Enable -Wwrite-strings warning flag"
default "n"
@@ -559,20 +559,6 @@ mainmenu "Espressif IoT Development Framework Configuration"
This option can be enabled for RISC-V targets only.
config COMPILER_DISABLE_DEFAULT_ERRORS
bool "Disable errors for default warnings"
default "y"
help
Enable this option if you do not want default warnings to be considered as errors,
especially when updating IDF.
This is a temporary flag that could help to allow upgrade while having
some time to address the warnings raised by those default warnings.
Alternatives are:
1) fix code (preferred),
2) remove specific warnings,
3) do not consider specific warnings as error.
config COMPILER_DISABLE_GCC12_WARNINGS
bool "Disable new warnings introduced in GCC 12"
default "n"
@@ -587,13 +573,6 @@ mainmenu "Espressif IoT Development Framework Configuration"
Enable this option if use GCC 13 or newer, and want to disable warnings which don't appear with
GCC 12.
config COMPILER_DISABLE_GCC14_WARNINGS
bool "Disable new warnings introduced in GCC 14"
default "n"
help
Enable this option if use GCC 14 or newer, and want to disable warnings which don't appear with
GCC 13.
config COMPILER_DUMP_RTL_FILES
bool "Dump RTL files during compilation"
help
@@ -628,34 +607,6 @@ mainmenu "Espressif IoT Development Framework Configuration"
default "gcc" if COMPILER_RT_LIB_GCCLIB
default "" if COMPILER_RT_LIB_HOST
choice COMPILER_ORPHAN_SECTIONS
prompt "Orphan sections handling"
default COMPILER_ORPHAN_SECTIONS_WARNING
depends on !IDF_TARGET_LINUX
help
If the linker finds orphan sections, it attempts to place orphan sections after sections of the same
attribute such as code vs data, loadable vs non-loadable, etc.
That means that orphan sections could placed between sections defined in IDF linker scripts.
This could lead to corruption of the binary image. Configure the linker action here.
config COMPILER_ORPHAN_SECTIONS_WARNING
bool "Place with warning"
help
Places orphan sections with a warning message.
config COMPILER_ORPHAN_SECTIONS_PLACE
bool "Place silently"
help
Places orphan sections without a warning/error message.
endchoice
config COMPILER_STATIC_ANALYZER
bool "Enable compiler static analyzer"
default "n"
depends on IDF_TOOLCHAIN_GCC
help
Enable compiler static analyzer. This may produce false-positive results and increases compile time.
endmenu # Compiler Options
menu "Component config"
@@ -676,6 +627,6 @@ mainmenu "Espressif IoT Development Framework Configuration"
- CONFIG_ESPTOOLPY_FLASHFREQ_120M && CONFIG_ESPTOOLPY_FLASH_SAMPLE_MODE_DTR
- CONFIG_SPIRAM_SPEED_120M && CONFIG_SPIRAM_MODE_OCT
- CONFIG_BOOTLOADER_CACHE_32BIT_ADDR_QUAD_FLASH
- CONFIG_MBEDTLS_USE_CRYPTO_ROM_IMPL
- CONFIG_ESP_WIFI_EAP_TLS1_3
- CONFIG_ESP_WIFI_ENABLE_ROAMING_APP
- CONFIG_USB_HOST_EXT_PORT_RESET_ATTEMPTS

View File

@@ -15,18 +15,17 @@ ESP-IDF is the development framework for Espressif SoCs supported on Windows, Li
The following table shows ESP-IDF support of Espressif SoCs where ![alt text][preview] and ![alt text][supported] denote preview status and support, respectively. The preview support is usually limited in time and intended for beta versions of chips. Please use an ESP-IDF release where the desired SoC is already supported.
|Chip | v5.0 | v5.1 | v5.2 | v5.3 | v5.4 | |
|:----------- | :---------------------:| :--------------------: | :--------------------: | :--------------------: | :--------------------: |:------------------------------------------------------------------- |
|ESP32 | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | |
|ESP32-S2 | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | |
|ESP32-C3 | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | |
|ESP32-S3 | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] |[Announcement](https://www.espressif.com/en/news/ESP32_S3) |
|ESP32-C2 | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] |[Announcement](https://www.espressif.com/en/news/ESP32-C2) |
|ESP32-C6 | | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] |[Announcement](https://www.espressif.com/en/news/ESP32_C6) |
|ESP32-H2 | | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] |[Announcement](https://www.espressif.com/en/news/ESP32_H2) |
|ESP32-P4 | | | | ![alt text][supported] | ![alt text][supported] |[Announcement](https://www.espressif.com/en/news/ESP32-P4) |
|ESP32-C5 | | | | | ![alt text][preview] |[Announcement](https://www.espressif.com/en/news/ESP32-C5) |
|ESP32-C61 | | | | | ![alt text][preview] |[Announcement](https://www.espressif.com/en/products/socs/esp32-c61) |
|Chip | v4.4 | v5.0 | v5.1 | v5.2 | v5.3 | |
|:----------- | :---------------------:| :---------------------:| :--------------------: | :--------------------: | :--------------------: | :--------------------------------------------------------- |
|ESP32 | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | |
|ESP32-S2 | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | |
|ESP32-C3 | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | |
|ESP32-S3 | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | [Announcement](https://www.espressif.com/en/news/ESP32_S3) |
|ESP32-C2 | | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | [Announcement](https://www.espressif.com/en/news/ESP32-C2) |
|ESP32-C6 | | | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | [Announcement](https://www.espressif.com/en/news/ESP32_C6) |
|ESP32-H2 | | | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | [Announcement](https://www.espressif.com/en/news/ESP32_H2) |
|ESP32-P4 | | | | | ![alt text][supported] | [Announcement](https://www.espressif.com/en/news/ESP32-P4) |
|ESP32-C5 | | | | | ![alt text][preview] | [Announcement](https://www.espressif.com/en/news/ESP32-C5) |
[supported]: https://img.shields.io/badge/-supported-green "supported"
[preview]: https://img.shields.io/badge/-preview-orange "preview"

View File

@@ -15,18 +15,17 @@ ESP-IDF 是乐鑫官方推出的物联网开发框架,支持 Windows、Linux
下表总结了乐鑫芯片在 ESP-IDF 各版本中的支持状态,其中 ![alt text][supported] 代表已支持,![alt text][preview] 代表目前处于预览支持状态。预览支持状态通常有时间限制,而且仅适用于测试版芯片。请确保使用与芯片相匹配的 ESP-IDF 版本。
|芯片 | v5.0 | v5.1 | v5.2 | v5.3 | v5.4 | |
|:----------- | :---------------------:| :--------------------: | :--------------------: | :--------------------: | :--------------------: | :------------------------------------------------------------------------ |
|ESP32 | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | |
|ESP32-S2 | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | |
|ESP32-C3 | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | |
|ESP32-S3 | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | [芯片发布公告](https://www.espressif.com/zh-hans/news/ESP32_S3) |
|ESP32-C2 | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | [芯片发布公告](https://www.espressif.com/zh-hans/news/ESP32-C2) |
|ESP32-C6 | | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | [芯片发布公告](https://www.espressif.com/zh-hans/news/ESP32_C6) |
|ESP32-H2 | | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | [芯片发布公告](https://www.espressif.com/zh-hans/news/ESP32_H2) |
|ESP32-P4 | | | | ![alt text][supported] | ![alt text][supported] | [芯片发布公告](https://www.espressif.com/zh-hans/news/ESP32-P4) |
|ESP32-C5 | | | | | ![alt text][preview] | [芯片发布公告](https://www.espressif.com/zh-hans/news/ESP32-C5) |
|ESP32-C61 | | | | | ![alt text][preview] | [芯片发布公告](https://www.espressif.com/zh-hans/products/socs/esp32-c61) |
|芯片 | v4.4 | v5.0 | v5.1 | v5.2 | v5.3 | |
|:----------- | :---------------------:| :---------------------:| :--------------------: | :--------------------: | :--------------------: | :-------------------------------------------------------------- |
|ESP32 | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | |
|ESP32-S2 | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | |
|ESP32-C3 | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | |
|ESP32-S3 | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | [芯片发布公告](https://www.espressif.com/zh-hans/news/ESP32_S3) |
|ESP32-C2 | | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | [芯片发布公告](https://www.espressif.com/zh-hans/news/ESP32-C2) |
|ESP32-C6 | | | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | [芯片发布公告](https://www.espressif.com/zh-hans/news/ESP32_C6) |
|ESP32-H2 | | | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | [芯片发布公告](https://www.espressif.com/zh-hans/news/ESP32_H2) |
|ESP32-P4 | | | | | ![alt text][supported] | [芯片发布公告](https://www.espressif.com/en/news/ESP32-P4) |
|ESP32-C5 | | | | | ![alt text][preview] | [芯片发布公告](https://www.espressif.com/zh-hans/news/ESP32-C5) |
[supported]: https://img.shields.io/badge/-%E6%94%AF%E6%8C%81-green "supported"
[preview]: https://img.shields.io/badge/-%E9%A2%84%E8%A7%88-orange "preview"
@@ -123,7 +122,7 @@ ESP-IDF 中的子模块采用相对路径([详见 .gitmodules 文件](.gitmodu
* 最新版的文档https://docs.espressif.com/projects/esp-idf/ ,该文档是由本仓库 [docs 目录](docs) 构建得到。
* [初学者指南:主要概念和资源](https://www.bilibili.com/video/BV1114y1r7du/)
* [初学者指南:主要概念和资源](https://www.bilibili.com/video/BV1114y1r7du/)
* 可以前往 [esp32.com 论坛](https://esp32.com/) 提问,挖掘社区资源。

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@@ -1,123 +0,0 @@
# ESP-IDF Project Roadmap2024
This document outlines the goals of ESP-IDF project and is shared for the convenience of our customers. It is important to clarify that this document is not a binding commitment to our customers. Instead, its primary purpose is to offer a clear roadmap and direction for the project's development. By openly sharing this information, we aim to enhance our customers' understanding, promote transparency and ensure alignment with the overarching objectives of the ESP-IDF project.
## Project Overview
### Project Goals
In both minor and major releases, we integrate new chip support to enhance our product range. By expanding the chip matrix, we broaden the scope of our offerings, catering to a wider audience with diverse needs. This proactive approach ensures that our products remain at the forefront of technological advancements, consistently meeting and exceeding customer expectations.
Furthermore, we prioritize bugfix releases for active branches, focusing on improving the stability and performance of products already in production. By addressing bugs promptly, we aim to enhance the overall user experience and provide tangible benefits to customers relying on our solutions. This proactive maintenance strategy reflects our commitment to delivering reliable, high-quality products to our valued customer base.
Below are the main objectives that ESP-IDF project/teams would like to implement in 2024.
- New Chip Support
- Add support for ESP32-P4
- Add support for ESP32-C5
- Add support for ESP32-C61
- More Minor Releases
- Release IDF v5.3 in 2024
- Release IDF v5.4 at the start of 2025
- More Bugfix Releases
- Release v4.4.8 for IDF v4.4 before ESP-IDF v4.4 goes End of Life in July 2024
- Do more bugfix releases for IDF v5.1 before release/5.1 enters maintenance period in June 2024
- Do more bug fixes releases for release/5.2 and release/5.3, and push the two releases to be more stable and production-ready
- Updates of Libraries
- Update GDB to 14.2
- Update LLVM to 18.1.2
- Update MbedTLS to 3.6 (LTS)
- Update LWIP to 2.2.0
- Change minimal Python requirement to 3.9
Please note that support status of previous silicones could be found on [ESP-IDF Release and SoC Compatibility](https://github.com/espressif/esp-idf#esp-idf-release-and-soc-compatibility).
### Roadmap Details
The ESP-IDF project prioritizes consistent maintenance and updates to ensure our customers remain at the forefront of technological advancements. Our commitment to ongoing development ensures that customers continuously benefit from the latest innovations in the field.
Moreover, we are dedicated to empowering our customers to leverage newly implemented features and enhanced functionalities through iterative improvements. Our steadfast commitment to pushing boundaries ensures that clients not only keep pace with evolving technology but also extract optimal value from the cutting-edge capabilities of our products.
Below are the main roadmap details for functional areas inside ESP-IDF.
- New Chip Support
- Add full support for ESP32-P4 in ESP-IDF v5.3, refer to [ESP32-P4 Support Status](https://github.com/espressif/esp-idf/issues/12996)
- Add preview support for ESP32-C5 in ESP-IDF v5.3 and full support for ESP32-C5 in ESP-IDF v5.4, refer to [ESP32-C5 Support Status](https://github.com/espressif/esp-idf/issues/14021)
- Add preview support for the early samples of ESP32-C61 in ESP-IDF v5.4 and full support for mass production version in ESP-IDF v5.4.x. Refer to [ESP32-C61 Support Status](https://developer.espressif.com/pages/chip-support-status/esp32c61/#esp-idf)
- Bugfix releases
- Do bugfix release IDF v4.4.8 and stop maintaining ESP-IDF v4.4 in July 2024
- Release bugfix IDF v5.0.6 and IDF v5.0.7 in 2024 (maintenance period)
- Release bugfix IDF v5.1.3 and IDF v5.1.4 in H1 of 2024, and release IDF v5.1.5 in H2 of 2024
- Push release/5.1 to maintenance period from June 2024
- Do more bug fixes releases for release/5.2 (IDF v5.2.1, IDF v5.2.2, IDF v5.2.3) and release/5.3 (IDF v5.3.1, IDF v5.3.2), and push releases to be more stable and more production-ready
## ESP-IDF Planning information
For the full list of ESP-IDF releases, please visit https://github.com/espressif/esp-idf/releases
### ESP-IDF Major Releases
No Major Releases planned
### ESP-IDF Minor Releases
#### Quarter One
- v5.2-RC1, estimate release date: 2024/02/02
- v5.2 final release, estimate release date: 2024/02/08
#### Quarter Two
- v5.3-beta1, estimate release date:: 2024/05/13
- v5.3-beta2, estimate release date:: 2024/05/31
- v5.3-RC1, estimate release date:: 2024/07/08
#### Quarter Three
- v5.3-RC2, estimate release date:: 2024/07/26
- v5.3 final release, estimate release date:: 2024/08/02
#### Quarter Four
- v5.4-beta1, estimate release date:: 2024/11/08
- v5.4-beta2, estimate release date:: 2024/11/29
- v5.4-RC1, estimate release date:: 2025/01/09
- v5.4-RC2, estimate release date:: 2025/01/29
- v5.4 final release, estimate release date: 2025/02/05
### ESP-IDF Bugfix Releases
#### Quarter One
- v5.1.3, estimate release date: 2024/02/08
- v5.0.6, estimate release date: 2024/02/18
- v4.4.7, estimate release date:: 2024/03/19
- v5.2.1, estimate release date:: 2024/03/31
#### Quarter Two
- v5.1.4, estimate release date:: 2024/05/06
- v5.2.2, estimate release date:: 2024/06/17
- v4.4.8, estimate release date:: 2024/07/19
#### Quarter Three
- v5.0.7, estimate release date: 2024/08/22
- v5.3.1, estimate release date: 2024/09/16
- v5.2.3, estimate release date: 2024/10/10
#### Quarter Four
- v5.1.5, estimate release date: 2024/11/04 (Maintenance period since June 2024)
- v5.3.2, estimate release date: 2024/12/31
- v5.2.4, estimate release date: 2025/02/20 (Service period ends Feb. 2025)

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@@ -1,123 +0,0 @@
# ESP-IDF 项目路线图 2024 (v1.0)
本文档概述了 ESP-IDF 项目的年度计划,方便客户据此规划自己的项目周期。需要说明的是该文档并不是我们对客户的约束性承诺。相反,其主要目的是为客户提供 ESP-IDF 项目开发的路线图和方向。通过公开这些信息,我们希望增进客户对 ESP-IDF 项目的理解,提高透明度,并确保与 ESP-IDF 项目的总体目标保持一致。
## 项目总览
### 项目目标
在 ESP-IDF 的主要版本和次要版本中,我们一般会增加对新芯片的支持,以扩展我们的产品线。通过扩展芯片矩阵,拓宽我们的产品范围,并满足广泛受众的各种需求。这样便能保证我们的产品始终处于技术进步的前沿,不断满足客户的需求并超越客户的期望。
此外ESP-IDF 各活跃分支的 Bugfix 版本发布也是我们项目的重中之重,着力提升已量产产品的稳定性和性能。通过及时解决问题,我们期待提升用户的整体体验,切实惠及使用乐鑫解决方案的客户。通过积极维护 ESP-IDF 的各活跃分支,我们践行了对宝贵的客户群提供可靠、高质量产品的承诺。
以下是 ESP-IDF 项目在 2024 年计划实现的主要目标。
* 新芯片支持
* 增加对 ESP32-P4 芯片的支持
* 增加对 ESP32-C5 芯片的支持
* 增加对 ESP32-C61 芯片的支持
* 发布更多的次要版本
* 在 2024 年发布 IDF v5.3
* 在 2025 年初发布 IDF v5.4
* 发布更多 Bugfix 版本
* 在 2024 年 7 月底 IDF v4.4 停止维护之前,发布 IDF v4.4.8
* 在 2024 年 6 月底release/5.1 分支进入维护周期之前,发布更多 Bugfix 版本
* release/5.2 分支和 release/5.3 分支发布更多 Bugfix 版本,使这两个分支更加稳定和产品化
* 上游库与工具链的更新
* 将 GDB 升级至 14.2
* 将 LLVM 升级至 18.1.2
* 更新 MbedTLS 至 3.6LTS
* 更新 LWIP 至 2.2.0
* 将最低 Python 要求更改为 3.9
请注意,获取之前芯片的支持状态,请参阅 [ESP-IDF 发布和 SoC 兼容性](https://github.com/espressif/esp-idf/blob/master/README_CN.md#esp-idf-与乐鑫芯片)。
### 路线图细节
ESP-IDF 项目重视持续维护和更新,确保我们的客户始终处于技术进步的前沿。我们承诺持续进行开发,并将该领域的最新创新成果呈现给客户。
此外,我们也在给客户赋能,客户通过迭代改进便能接触到新开发的功能和更高的性能。我们在突破技术界限方面的坚定承诺,使客户不仅能接触到最新的技术,还能从我们产品的尖端功能中获取最大价值。
以下是 ESP-IDF 路线图的主要信息。
* 新芯片支持
* 在 ESP-IDF v5.3 中为 ESP32-P4 提供完整支持,参考 [ESP32-P4 支持状态](https://github.com/espressif/esp-idf/issues/12996)
* 在 ESP-IDF v5.3 中为 ESP32-C5 提供预览支持,并在 ESP-IDF v5.4 中为 ESP32-C5 提供完整支持,参考 [ESP32-C5 支持状态](https://github.com/espressif/esp-idf/issues/14021)
* 在 ESP-IDF v5.4 中增加对 ESP32-C61 早期样品的预览支持,并在 IDF v5.4.x 中增加对 ESP32-C61 量产版本的完整支持,参考 [ESP32-C61 支持状态](https://developer.espressif.com/pages/chip-support-status/esp32c61/#esp-idf)
* Bugfix 版本发布
* 发布 Bugfix 版本 IDF v4.4.8,并在 2024 年 7 月底停止维护 ESP-IDF v4.4
* 2024 年release/5.0 分支已处于维护周期,发布 IDF v5.0.6 和 IDF v5.0.7
* 2024 年上半年发布 Bugfix 版本 IDF v5.1.3 和 IDF v5.1.4,并在 2024 年下半年发布 IDF v5.1.5
* 自 2024 年 6 月起release/5.1 分支进入到维护周期
* release/5.2 分支发布更多 Bugfix 版本,包括 IDF v5.2.1、IDF v5.2.2、IDF v5.2.3release/5.3 分支发布更多 Bugfix 版本,包括 IDF v5.3.1、IDF v5.3.2。通过发布这些 Bugfix 版本,使 release/5.2 分支和 release/5.3 分支更加稳定和产品化。
## ESP-IDF 发布计划
获取 ESP-IDF 的完整发布列表,请访问 https://github.com/espressif/esp-idf/releases
### ESP-IDF 主要版本发布
2024 年,无主要版本发布计划
### ESP-IDF 次要版本发布
#### 第一季度
* v5.2-RC1预计发布日期2024/02/02
* v5.2 正式发布预计发布日期2024/02/08
#### 第二季度
* v5.3-beta1预计发布日期2024/05/13
* v5.3-beta2预计发布日期2024/05/31
* v5.3-RC1预计发布日期2024/07/08
#### 第三季度
* v5.3-RC2预计发布日期2024/07/26
* v5.3 正式发布预计发布日期2024/08/02
#### 第四季度
* v5.4-beta1预计发布日期2024/11/08
* v5.4-beta2预计发布日期2024/11/29
* v5.4-RC1预计发布日期2025/01/09
* v5.4-RC2预计发布日期2025/01/29
* v5.4 正式发布预计发布日期2025/02/05
### ESP-IDF Bugfix 版本发布
#### 第一季度
* v5.1.3预计发布日期2024/02/08
* v5.0.6预计发布日期2024/02/18
* v4.4.7预计发布日期2024/03/19
* v5.2.1预计发布日期2024/03/31
#### 第二季度
* v5.1.4预计发布日期2024/05/06
* v5.2.2预计发布日期2024/06/17
* v4.4.8预计发布日期2024/07/19
#### 第三季度
* v5.0.7预计发布日期2024/08/22
* v5.3.1预计发布日期2024/09/16
* v5.2.3预计发布日期2024/10/10
#### 第四季度
* v5.1.5预计发布日期2024/11/04自 2024 年 6 月进入维护周期)
* v5.3.2预计发布日期2024/12/31
* v5.2.4预计发布日期2025/02/20服务周期截止至 2025 年 2 月)

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@@ -14,7 +14,6 @@ menu "Application Level Tracing"
config APPTRACE_DEST_NONE
bool "None"
endchoice
config APPTRACE_DEST_UART
@@ -61,7 +60,7 @@ menu "Application Level Tracing"
endchoice
config APPTRACE_UART_TX_GPIO
int "UART TX on GPIO<num>"
int "UART TX on GPIO#"
depends on APPTRACE_DEST_UART_NOUSB
range 0 46
default 12 if IDF_TARGET_ESP32
@@ -71,7 +70,7 @@ menu "Application Level Tracing"
This GPIO is used for UART TX pin.
config APPTRACE_UART_RX_GPIO
int "UART RX on GPIO<num>"
int "UART RX on GPIO#"
depends on APPTRACE_DEST_UART_NOUSB
range 0 46
default 13 if IDF_TARGET_ESP32
@@ -214,7 +213,7 @@ menu "Application Level Tracing"
depends on APPTRACE_SV_ENABLE
default APPTRACE_SV_DEST_JTAG
help
SystemView will transfer data through the defined interface.
SystemView witt transfer data trough defined interface.
config APPTRACE_SV_DEST_JTAG
bool "Data destination JTAG"

View File

@@ -26,6 +26,8 @@
#define ESP_APPTRACE_MAX_VPRINTF_ARGS 256
#define ESP_APPTRACE_HOST_BUF_SIZE 256
#define ESP_APPTRACE_PRINT_LOCK 0
const static char *TAG = "esp_apptrace";
/** tracing module internal data */
@@ -88,7 +90,7 @@ void esp_apptrace_down_buffer_config(uint8_t *buf, uint32_t size)
return;
}
// currently down buffer is supported for JTAG interface only
// TODO: one more argument should be added to this function to specify HW interface: JTAG, UART0 etc
// TODO: one more argument should be added to this function to specify HW inteface: JTAG, UART0 etc
ch = &s_trace_channels[ESP_APPTRACE_DEST_JTAG];
if (ch->hw != NULL) {
if (ch->hw->down_buffer_config != NULL) {

View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2021-2025 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0 OR MIT
*/
@@ -92,7 +92,7 @@ static esp_err_t esp_apptrace_membufs_swap(esp_apptrace_membufs_proto_data_t *pr
// switch to new block
proto->state.in_block++;
proto->hw->swap(new_block_num, proto->state.markers[prev_block_num]);
proto->hw->swap(new_block_num);
// handle data from host
esp_hostdata_hdr_t *hdr = (esp_hostdata_hdr_t *)proto->blocks[new_block_num].start;
@@ -148,18 +148,6 @@ static esp_err_t esp_apptrace_membufs_swap_waitus(esp_apptrace_membufs_proto_dat
if (res != ESP_OK) {
break;
}
#if CONFIG_IDF_TARGET_ESP32S3
/*
* ESP32S3 has a serious data corruption issue with the transferred data to host.
* This delay helps reduce the failure rate by temporarily reducing heavy memory writes
* from RTOS-level tracing and giving OpenOCD more time to read trace memory before
* the current thread continues execution. While this doesn't completely prevent
* memory access from other threads/cores/ISRs, it has shown to significantly improve
* reliability when combined with CRC checks in OpenOCD. In practice, this reduces the
* number of retries needed to read an entire block without corruption.
*/
esp_rom_delay_us(100);
#endif
}
return res;
}
@@ -351,7 +339,7 @@ uint8_t *esp_apptrace_membufs_up_buffer_get(esp_apptrace_membufs_proto_data_t *p
esp_err_t esp_apptrace_membufs_up_buffer_put(esp_apptrace_membufs_proto_data_t *proto, uint8_t *ptr, esp_apptrace_tmo_t *tmo)
{
esp_apptrace_membufs_pkt_end(ptr);
// TODO: mark block as busy in order not to reuse it for other tracing calls until it is completely written
// TODO: mark block as busy in order not to re-use it for other tracing calls until it is completely written
// TODO: avoid potential situation when all memory is consumed by low prio tasks which can not complete writing due to
// higher prio tasks and the latter can not allocate buffers at all
// this is abnormal situation can be detected on host which will receive only uncompleted buffers

View File

@@ -9,14 +9,12 @@
#include "esp_app_trace_util.h"
#include "sdkconfig.h"
#define ESP_APPTRACE_PRINT_LOCK 0
///////////////////////////////////////////////////////////////////////////////
///////////////////////////////// Locks /////////////////////////////////////
///////////////////////////////////////////////////////////////////////////////
#if ESP_APPTRACE_PRINT_LOCK
static esp_apptrace_lock_t s_log_lock = { .mux = portMUX_INITIALIZER_UNLOCKED };
static esp_apptrace_lock_t s_log_lock = {.irq_stat = 0, .portmux = portMUX_INITIALIZER_UNLOCKED};
#endif
int esp_apptrace_log_lock(void)
@@ -33,7 +31,7 @@ int esp_apptrace_log_lock(void)
void esp_apptrace_log_unlock(void)
{
#if ESP_APPTRACE_PRINT_LOCK
#if ESP_APPTRACE_PRINT_LOCK
esp_apptrace_lock_give(&s_log_lock);
#endif
}
@@ -89,7 +87,7 @@ esp_err_t esp_apptrace_lock_give(esp_apptrace_lock_t *lock)
uint8_t *esp_apptrace_rb_produce(esp_apptrace_rb_t *rb, uint32_t size)
{
uint8_t *ptr = rb->data + rb->wr;
// check for available space
// check for avalable space
if (rb->rd <= rb->wr) {
// |?R......W??|
if (rb->wr + size >= rb->size) {

View File

@@ -50,20 +50,14 @@ static uint8_t *esp_apptrace_riscv_down_buffer_get(esp_apptrace_riscv_data_t *hw
static esp_err_t esp_apptrace_riscv_down_buffer_put(esp_apptrace_riscv_data_t *hw_data, uint8_t *ptr, esp_apptrace_tmo_t *tmo);
static bool esp_apptrace_riscv_host_is_connected(esp_apptrace_riscv_data_t *hw_data);
static esp_err_t esp_apptrace_riscv_buffer_swap_start(uint32_t curr_block_id);
static esp_err_t esp_apptrace_riscv_buffer_swap(uint32_t new_block_id, uint32_t prev_block_len);
static esp_err_t esp_apptrace_riscv_buffer_swap(uint32_t new_block_id);
static esp_err_t esp_apptrace_riscv_buffer_swap_end(uint32_t new_block_id, uint32_t prev_block_len);
static bool esp_apptrace_riscv_host_data_pending(void);
const static char *TAG = "esp_apptrace";
#if SOC_CACHE_INTERNAL_MEM_VIA_L1CACHE
#define APPTRACE_DRAM_ATTR TCM_DRAM_ATTR
#else
#define APPTRACE_DRAM_ATTR
#endif
static APPTRACE_DRAM_ATTR esp_apptrace_riscv_ctrl_block_t s_tracing_ctrl[CONFIG_FREERTOS_NUMBER_OF_CORES];
static esp_apptrace_riscv_ctrl_block_t s_tracing_ctrl[CONFIG_FREERTOS_NUMBER_OF_CORES];
esp_apptrace_hw_t *esp_apptrace_jtag_hw_get(void **data)
{
@@ -98,7 +92,7 @@ esp_apptrace_hw_t *esp_apptrace_jtag_hw_get(void **data)
}
/* Advertises apptrace control block address to host.
This function can be overridden with custom implementation,
This function can be overriden with custom implementation,
e.g. OpenOCD flasher stub use own implementation of it. */
__attribute__((weak)) int esp_apptrace_advertise_ctrl_block(void *ctrl_block_addr)
{
@@ -109,7 +103,7 @@ __attribute__((weak)) int esp_apptrace_advertise_ctrl_block(void *ctrl_block_add
}
/* Returns up buffers config.
This function can be overridden with custom implementation,
This function can be overriden with custom implementation,
e.g. OpenOCD flasher stub use own implementation of it. */
__attribute__((weak)) void esp_apptrace_get_up_buffers(esp_apptrace_mem_block_t mem_blocks_cfg[2])
{
@@ -171,7 +165,7 @@ static esp_err_t esp_apptrace_riscv_init(esp_apptrace_riscv_data_t *hw_data)
}
// notify host about control block address
int res = esp_apptrace_advertise_ctrl_block(&s_tracing_ctrl[core_id]);
assert(res == 0 && "Failed to send config to host!");
assert(res == 0 && "Falied to send config to host!");
return ESP_OK;
}
@@ -353,7 +347,7 @@ static esp_err_t esp_apptrace_riscv_buffer_swap_end(uint32_t new_block_id, uint3
return ESP_OK;
}
static esp_err_t esp_apptrace_riscv_buffer_swap(uint32_t new_block_id, uint32_t prev_block_len)
static esp_err_t esp_apptrace_riscv_buffer_swap(uint32_t new_block_id)
{
/* do nothing */
return ESP_OK;

View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0 OR MIT
*/
@@ -12,7 +12,7 @@
// ======================
// Xtensa has useful feature: TRAX debug module. It allows recording program execution flow at run-time without disturbing CPU.
// Execution flow data are written to configurable Trace RAM block. Besides accessing Trace RAM itself TRAX module also allows to read/write
// Exectution flow data are written to configurable Trace RAM block. Besides accessing Trace RAM itself TRAX module also allows to read/write
// trace memory via its registers by means of JTAG, APB or ERI transactions.
// ESP32 has two Xtensa cores with separate TRAX modules on them and provides two special memory regions to be used as trace memory.
// Chip allows muxing access to those trace memory blocks in such a way that while one block is accessed by CPUs another one can be accessed by host
@@ -47,7 +47,7 @@
// 2. TRAX Registers layout
// ========================
// This module uses two TRAX HW registers and one Performance Monitor register to communicate with host SW (OpenOCD).
// This module uses two TRAX HW registers to communicate with host SW (OpenOCD).
// - Control register uses TRAX_DELAYCNT as storage. Only lower 24 bits of TRAX_DELAYCNT are writable. Control register has the following bitfields:
// | 31..XXXXXX..24 | 23 .(host_connect). 23| 22..(block_id)..15 | 14..(block_len)..0 |
// 14..0 bits - actual length of user data in trace memory block. Target updates it every time it fills memory block and exposes it to host.
@@ -55,15 +55,9 @@
// 21..15 bits - trace memory block transfer ID. Block counter. It can overflow. Updated by target, host should not modify it. Actually can be 2 bits;
// 22 bit - 'host data present' flag. If set to one there is data from host, otherwise - no host data;
// 23 bit - 'host connected' flag. If zero then host is not connected and tracing module works in post-mortem mode, otherwise in streaming mode;
// - Status register uses TRAX_TRIGGERPC as storage. If this register is not zero then current CPU is changing TRAX registers and
// this register holds address of the instruction which application will execute when it finishes with those registers modifications.
// See 'Targets Connection' section for details.
// - CRC16 register uses ERI_PERFMON_PM1 as storage. This register is used to store CRC16 checksum of the exposed trace memory block.
// The register has the following format:
// | 31..16 (CRC indicator) | 15..0 (CRC16 value) |
// CRC indicator (0xA55A) is used to distinguish valid CRC values from other data that might be in the register.
// CRC16 is calculated over the entire exposed block and is updated every time a block is exposed to the host.
// This allows the host to verify data integrity of the received trace data.
// - Status register uses TRAX_TRIGGERPC as storage. If this register is not zero then current CPU is changing TRAX registers and
// this register holds address of the instruction which application will execute when it finishes with those registers modifications.
// See 'Targets Connection' setion for details.
// 3. Modes of operation
// =====================
@@ -133,7 +127,7 @@
// Access to internal module's data is synchronized with custom mutex. Mutex is a wrapper for portMUX_TYPE and uses almost the same sync mechanism as in
// vPortCPUAcquireMutex/vPortCPUReleaseMutex. The mechanism uses S32C1I Xtensa instruction to implement exclusive access to module's data from tasks and
// ISRs running on both cores. Also custom mutex allows specifying timeout for locking operation. Locking routine checks underlying mutex in cycle until
// ISRs running on both cores. Also custom mutex allows specifying timeout for locking operation. Locking routine checks underlaying mutex in cycle until
// it gets its ownership or timeout expires. The differences of application tracing module's mutex implementation from vPortCPUAcquireMutex/vPortCPUReleaseMutex are:
// - Support for timeouts.
// - Local IRQs for CPU which owns the mutex are disabled till the call to unlocking routine. This is made to avoid possible task's prio inversion.
@@ -148,9 +142,9 @@
// Timeout mechanism is based on xthal_get_ccount() routine and supports timeout values in microseconds.
// There are two situations when task/ISR can be delayed by tracing API call. Timeout mechanism takes into account both conditions:
// - Trace data are locked by another task/ISR. When waiting on trace data lock.
// - Trace data are locked by another task/ISR. When wating on trace data lock.
// - Current TRAX memory input block is full when working in streaming mode (host is connected). When waiting for host to complete previous block reading.
// When waiting for any of above conditions xthal_get_ccount() is called periodically to calculate time elapsed from trace API routine entry. When elapsed
// When wating for any of above conditions xthal_get_ccount() is called periodically to calculate time elapsed from trace API routine entry. When elapsed
// time exceeds specified timeout value operation is canceled and ESP_ERR_TIMEOUT code is returned.
#include "sdkconfig.h"
#include "soc/soc.h"
@@ -165,15 +159,11 @@
#include "esp_log.h"
#include "esp_app_trace_membufs_proto.h"
#include "esp_app_trace_port.h"
#include "esp_rom_crc.h"
// TRAX is disabled, so we use its registers for our own purposes
// | 31..XXXXXX..24 | 23 .(host_connect). 23 | 22 .(host_data). 22| 21..(block_id)..15 | 14..(block_len)..0 |
#define ESP_APPTRACE_TRAX_CTRL_REG ERI_TRAX_DELAYCNT
#define ESP_APPTRACE_TRAX_STAT_REG ERI_TRAX_TRIGGERPC
#define ESP_APPTRACE_TRAX_CRC16_REG ERI_PERFMON_PM1
#define ESP_APPTRACE_CRC_INDICATOR (0xA55AU << 16)
#define ESP_APPTRACE_TRAX_BLOCK_LEN_MSK 0x7FFFUL
#define ESP_APPTRACE_TRAX_BLOCK_LEN(_l_) ((_l_) & ESP_APPTRACE_TRAX_BLOCK_LEN_MSK)
@@ -208,7 +198,7 @@ static uint8_t *esp_apptrace_trax_down_buffer_get(esp_apptrace_trax_data_t *hw_d
static esp_err_t esp_apptrace_trax_down_buffer_put(esp_apptrace_trax_data_t *hw_data, uint8_t *ptr, esp_apptrace_tmo_t *tmo);
static bool esp_apptrace_trax_host_is_connected(esp_apptrace_trax_data_t *hw_data);
static esp_err_t esp_apptrace_trax_buffer_swap_start(uint32_t curr_block_id);
static esp_err_t esp_apptrace_trax_buffer_swap(uint32_t new_block_id, uint32_t prev_block_len);
static esp_err_t esp_apptrace_trax_buffer_swap(uint32_t new_block_id);
static esp_err_t esp_apptrace_trax_buffer_swap_end(uint32_t new_block_id, uint32_t prev_block_len);
static bool esp_apptrace_trax_host_data_pending(void);
@@ -508,8 +498,7 @@ static esp_err_t esp_apptrace_trax_buffer_swap_start(uint32_t curr_block_id)
uint32_t acked_block = ESP_APPTRACE_TRAX_BLOCK_ID_GET(ctrl_reg);
uint32_t host_to_read = ESP_APPTRACE_TRAX_BLOCK_LEN_GET(ctrl_reg);
if (host_to_read != 0 || acked_block != (curr_block_id & ESP_APPTRACE_TRAX_BLOCK_ID_MSK)) {
ESP_APPTRACE_LOGD("HC[%d]: Can not switch %" PRIx32 " %" PRIu32 " %" PRIx32 " %" PRIx32 "/%" PRIx32,
esp_cpu_get_core_id(), ctrl_reg, host_to_read, acked_block,
ESP_APPTRACE_LOGD("HC[%d]: Can not switch %" PRIx32 " %" PRIu32 " %" PRIx32 " %" PRIx32 "/%" PRIx32, esp_cpu_get_core_id(), ctrl_reg, host_to_read, acked_block,
curr_block_id & ESP_APPTRACE_TRAX_BLOCK_ID_MSK, curr_block_id);
res = ESP_ERR_NO_MEM;
goto _on_err;
@@ -525,22 +514,14 @@ static esp_err_t esp_apptrace_trax_buffer_swap_end(uint32_t new_block_id, uint32
{
uint32_t ctrl_reg = eri_read(ESP_APPTRACE_TRAX_CTRL_REG);
uint32_t host_connected = ESP_APPTRACE_TRAX_HOST_CONNECT & ctrl_reg;
eri_write(ESP_APPTRACE_TRAX_CTRL_REG, ESP_APPTRACE_TRAX_BLOCK_ID(new_block_id) |
host_connected | ESP_APPTRACE_TRAX_BLOCK_LEN(prev_block_len));
esp_apptrace_trax_buffer_swap_unlock();
return ESP_OK;
}
static esp_err_t esp_apptrace_trax_buffer_swap(uint32_t new_block_id, uint32_t prev_block_len)
static esp_err_t esp_apptrace_trax_buffer_swap(uint32_t new_block_id)
{
/* Before switching to the new block, calculate CRC16 of the current block */
if (prev_block_len > 0) {
const uint8_t *prev_block_start = s_trax_blocks[!((new_block_id % 2))];
uint16_t crc16 = esp_rom_crc16_le(0, prev_block_start, prev_block_len);
eri_write(ESP_APPTRACE_TRAX_CRC16_REG, crc16 | ESP_APPTRACE_CRC_INDICATOR);
ESP_APPTRACE_LOGD("CRC16:%x %d @%x", crc16, prev_block_len, prev_block_start);
}
esp_apptrace_trax_select_memory_block(new_block_id);
return ESP_OK;
}

View File

@@ -29,7 +29,7 @@ typedef struct {
typedef struct {
esp_err_t (*swap_start)(uint32_t curr_block_id);
esp_err_t (*swap)(uint32_t new_block_id, uint32_t prev_block_len);
esp_err_t (*swap)(uint32_t new_block_id);
esp_err_t (*swap_end)(uint32_t new_block_id, uint32_t prev_block_len);
bool (*host_data_pending)(void);
} esp_apptrace_membufs_proto_hw_t;

View File

@@ -10,7 +10,7 @@
* The Embedded Experts *
**********************************************************************
* *
* (c) 1995 - 2024 SEGGER Microcontroller GmbH *
* (c) 1995 - 2021 SEGGER Microcontroller GmbH *
* *
* www.segger.com Support: support@segger.com *
* *
@@ -49,7 +49,7 @@
* *
**********************************************************************
* *
* SystemView version: 3.56 *
* SystemView version: 3.42 *
* *
**********************************************************************
----------------------------------------------------------------------

View File

@@ -8,7 +8,7 @@
* The Embedded Experts *
**********************************************************************
* *
* (c) 1995 - 2024 SEGGER Microcontroller GmbH *
* (c) 1995 - 2021 SEGGER Microcontroller GmbH *
* *
* www.segger.com Support: support@segger.com *
* *
@@ -47,7 +47,7 @@
* *
**********************************************************************
* *
* SystemView version: 3.56 *
* SystemView version: 3.42 *
* *
**********************************************************************
---------------------------END-OF-HEADER------------------------------
@@ -100,10 +100,6 @@ Revision: $Rev: 25842 $
#define _CORE_HAS_RTT_ASM_SUPPORT 1
#define _CORE_NEEDS_DMB 1
#define RTT__DMB() __asm volatile ("dmb\n" : : :);
#elif (defined(__ARM_ARCH_8_1M_MAIN__)) // Cortex-M85
#define _CORE_HAS_RTT_ASM_SUPPORT 1
#define _CORE_NEEDS_DMB 1
#define RTT__DMB() __asm volatile ("dmb\n" : : :);
#else
#define _CORE_HAS_RTT_ASM_SUPPORT 0
#endif
@@ -134,10 +130,6 @@ Revision: $Rev: 25842 $
#define _CORE_HAS_RTT_ASM_SUPPORT 1
#define _CORE_NEEDS_DMB 1
#define RTT__DMB() __asm volatile ("dmb\n" : : :);
#elif (defined __ARM_ARCH_8_1M_MAIN__) // Cortex-M85
#define _CORE_HAS_RTT_ASM_SUPPORT 1
#define _CORE_NEEDS_DMB 1
#define RTT__DMB() __asm volatile ("dmb\n" : : :);
#elif ((defined __ARM_ARCH_7A__) || (defined __ARM_ARCH_7R__)) // Cortex-A/R 32-bit ARMv7-A/R
#define _CORE_NEEDS_DMB 1
#define RTT__DMB() __asm volatile ("dmb\n" : : :);
@@ -164,10 +156,6 @@ Revision: $Rev: 25842 $
#define _CORE_HAS_RTT_ASM_SUPPORT 1
#define _CORE_NEEDS_DMB 1
#define RTT__DMB() __asm volatile ("dmb\n" : : :);
#elif (defined __ARM_ARCH_8_1M_MAIN__) // Cortex-M85
#define _CORE_HAS_RTT_ASM_SUPPORT 1
#define _CORE_NEEDS_DMB 1
#define RTT__DMB() __asm volatile ("dmb\n" : : :);
#elif ((defined __ARM_ARCH_7A__) || (defined __ARM_ARCH_7R__)) // Cortex-A/R 32-bit ARMv7-A/R
#define _CORE_NEEDS_DMB 1
#define RTT__DMB() __asm volatile ("dmb\n" : : :);
@@ -283,7 +271,6 @@ Revision: $Rev: 25842 $
#ifndef SEGGER_RTT_ASM // defined when SEGGER_RTT.h is included from assembly file
#include <stdlib.h>
#include <stdarg.h>
#include <stdint.h>
/*********************************************************************
*
@@ -425,7 +412,7 @@ unsigned SEGGER_RTT_ReadUpBufferNoLock (unsigned BufferIndex, void* pDa
unsigned SEGGER_RTT_WriteDownBuffer (unsigned BufferIndex, const void* pBuffer, unsigned NumBytes);
unsigned SEGGER_RTT_WriteDownBufferNoLock (unsigned BufferIndex, const void* pBuffer, unsigned NumBytes);
#define SEGGER_RTT_HASDATA_UP(n) (((SEGGER_RTT_BUFFER_UP*)((uintptr_t)&_SEGGER_RTT.aUp[n] + SEGGER_RTT_UNCACHED_OFF))->WrOff - ((SEGGER_RTT_BUFFER_UP*)((uintptr_t)&_SEGGER_RTT.aUp[n] + SEGGER_RTT_UNCACHED_OFF))->RdOff) // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
#define SEGGER_RTT_HASDATA_UP(n) (((SEGGER_RTT_BUFFER_UP*)((char*)&_SEGGER_RTT.aUp[n] + SEGGER_RTT_UNCACHED_OFF))->WrOff - ((SEGGER_RTT_BUFFER_UP*)((char*)&_SEGGER_RTT.aUp[n] + SEGGER_RTT_UNCACHED_OFF))->RdOff) // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
/*********************************************************************
*

View File

@@ -3,14 +3,14 @@
*
* SPDX-License-Identifier: BSD-1-Clause
*
* SPDX-FileContributor: 2023-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileContributor: 2023 Espressif Systems (Shanghai) CO LTD
*/
/*********************************************************************
* SEGGER Microcontroller GmbH *
* The Embedded Experts *
**********************************************************************
* *
* (c) 1995 - 2024 SEGGER Microcontroller GmbH *
* (c) 1995 - 2021 SEGGER Microcontroller GmbH *
* *
* www.segger.com Support: support@segger.com *
* *
@@ -49,14 +49,14 @@
* *
**********************************************************************
* *
* SystemView version: 3.56 *
* SystemView version: 3.42 *
* *
**********************************************************************
-------------------------- END-OF-HEADER -----------------------------
File : SEGGER_SYSVIEW.c
Purpose : System visualization API implementation.
Revision: $Rev: 29105 $
Revision: $Rev: 28341 $
Additional information:
Packet format:
@@ -66,10 +66,10 @@ Additional information:
Packets with IDs 24..31 are standard packets with extendible
structure and contain a length field.
<ID><Length><Data><TimeStampDelta>
<ID><Lenght><Data><TimeStampDelta>
Packet ID 31 is used for SystemView extended events.
<ID><Length><ID_EX><Data><TimeStampDelta>
<ID><Lenght><ID_EX><Data><TimeStampDelta>
Packets with IDs >= 32 always contain a length field.
<ID><Length><Data><TimeStampDelta>
@@ -150,7 +150,6 @@ Additional information:
#include <string.h>
#include <stdlib.h>
#include <stdarg.h>
#include <assert.h>
#include "SEGGER_SYSVIEW_Int.h"
#include "SEGGER_RTT.h"
@@ -189,7 +188,7 @@ Additional information:
// Timestamps may be less than full 32-bits, in which case we need to zero
// the unused bits to properly handle overflows.
// Note that this is a quite common scenario, as a 32-bit time such as
// SysTick might be scaled down to reduce bandwidth
// SysTick might be scaled down to reduce bandwith
// or a 16-bit hardware time might be used.
#if SEGGER_SYSVIEW_TIMESTAMP_BITS < 32 // Eliminate unused bits in case hardware timestamps are less than 32 bits
#define MAKE_DELTA_32BIT(Delta) Delta <<= 32 - SEGGER_SYSVIEW_TIMESTAMP_BITS; \
@@ -389,6 +388,8 @@ static U8 _NumModules;
pDest = pSysviewPointer; \
};
#if (SEGGER_SYSVIEW_USE_STATIC_BUFFER == 1)
static U8 _aPacket[SEGGER_SYSVIEW_MAX_PACKET_SIZE];
@@ -431,9 +432,6 @@ static U8 _aPacket[SEGGER_SYSVIEW_MAX_PACKET_SIZE];
static U8* _EncodeData(U8* pPayload, const char* pSrc, unsigned int NumBytes) {
unsigned int n;
const U8* p;
// Espressif doesn't support larger packages yet. Encode data length must be less than 255.
assert(NumBytes < 255);
//
n = 0;
p = (const U8*)pSrc;
@@ -444,8 +442,8 @@ static U8* _EncodeData(U8* pPayload, const char* pSrc, unsigned int NumBytes) {
*pPayload++ = (U8)NumBytes;
} else {
*pPayload++ = 255;
*pPayload++ = ((NumBytes >> 8) & 255);
*pPayload++ = (NumBytes & 255);
*pPayload++ = ((NumBytes >> 8) & 255);
}
while (n < NumBytes) {
*pPayload++ = *p++;
@@ -454,38 +452,6 @@ static U8* _EncodeData(U8* pPayload, const char* pSrc, unsigned int NumBytes) {
return pPayload;
}
/*********************************************************************
*
* _EncodeFloat()
*
* Function description
* Encode a float value in variable-length format.
*
* Parameters
* pPayload - Pointer to where value will be encoded.
* Value - Value to be encoded.
*
* Return value
* Pointer to the byte following the value, i.e. the first free
* byte in the payload and the next position to store payload
* content.
*/
static U8* _EncodeFloat(U8* pPayload, float Value) {
float Val = Value;
U8* pSysviewPointer;
U32* SysViewData;
pSysviewPointer = pPayload;
SysViewData = (U32*)&Val;
while((*SysViewData) > 0x7F) {
*pSysviewPointer++ = (U8)((*SysViewData) | 0x80);
(*SysViewData) >>= 7;
};
*pSysviewPointer++ = (U8)(*SysViewData);
pPayload = pSysviewPointer;
return pPayload;
}
/*********************************************************************
*
* _EncodeStr()
@@ -509,42 +475,38 @@ static U8* _EncodeFloat(U8* pPayload, float Value) {
* No more than 1 + Limit bytes will be encoded to the payload.
*/
static U8 *_EncodeStr(U8 *pPayload, const char *pText, unsigned int Limit) {
U8* pLen;
const char* sStart;
if (pText == NULL) {
*pPayload++ = (U8)0;
} else {
sStart = pText; // Remember start of string.
//
// Save space to store count byte(s).
//
pLen = pPayload++;
#if (SEGGER_SYSVIEW_MAX_STRING_LEN >= 255) // Length always encodes in 3 bytes
pPayload += 2;
#endif
//
// Limit string to maximum length and copy into payload buffer.
//
if (Limit > SEGGER_SYSVIEW_MAX_STRING_LEN) {
Limit = SEGGER_SYSVIEW_MAX_STRING_LEN;
unsigned int n;
unsigned int Len;
//
// Compute string len
//
Len = 0;
if (pText != NULL) {
while(*(pText + Len) != 0) {
Len++;
}
while ((Limit-- > 0) && (*pText != '\0')) {
*pPayload++ = *pText++;
if (Len > Limit) {
Len = Limit;
}
//
// Save string length to buffer.
//
#if (SEGGER_SYSVIEW_MAX_STRING_LEN >= 255) // Length always encodes in 3 bytes
Limit = (unsigned int)(pText - sStart);
*pLen++ = (U8)255;
*pLen++ = (U8)((Limit >> 8) & 255);
*pLen++ = (U8)(Limit & 255);
#else // Length always encodes in 1 byte
*pLen = (U8)(pText - sStart);
#endif
}
//
// Write Len
//
if (Len < 255) {
*pPayload++ = (U8)Len;
} else {
*pPayload++ = 255;
*pPayload++ = (Len & 255);
*pPayload++ = ((Len >> 8) & 255);
}
//
// copy string
//
n = 0;
while (n < Len) {
*pPayload++ = *pText++;
n++;
}
return pPayload;
}
@@ -731,6 +693,7 @@ static void _SendSyncInfo(void) {
for (n = 0; n < _NumModules; n++) {
SEGGER_SYSVIEW_SendModule(n);
}
SEGGER_SYSVIEW_SendModuleDescription();
}
}
#endif // (SEGGER_SYSVIEW_POST_MORTEM_MODE == 1)
@@ -1255,7 +1218,6 @@ static void _VPrintTarget(const char* sFormat, U32 Options, va_list* pParamList)
unsigned int FormatFlags;
unsigned int FieldWidth;
U8* pPayloadStart;
const char* s;
#if SEGGER_SYSVIEW_USE_STATIC_BUFFER == 0
RECORD_START(SEGGER_SYSVIEW_INFO_SIZE + SEGGER_SYSVIEW_MAX_STRING_LEN + 1 + 2 * SEGGER_SYSVIEW_QUANTA_U32);
SEGGER_SYSVIEW_LOCK();
@@ -1360,20 +1322,6 @@ static void _VPrintTarget(const char* sFormat, U32 Options, va_list* pParamList)
v = va_arg(*pParamList, int);
_PrintUnsigned(&BufferDesc, (unsigned int)v, 16u, NumDigits, FieldWidth, FormatFlags);
break;
case 's':
s = va_arg(*pParamList, const char*);
if (s == NULL) {
s = "(null)";
}
do {
c = *s;
s++;
if (c == '\0') {
break;
}
_StoreChar(&BufferDesc, c);
} while (BufferDesc.Cnt < SEGGER_SYSVIEW_MAX_STRING_LEN);
break;
case 'p':
v = va_arg(*pParamList, int);
_PrintUnsigned(&BufferDesc, (unsigned int)v, 16u, 8u, 8u, 0u);
@@ -2006,61 +1954,11 @@ void SEGGER_SYSVIEW_SendTaskInfo(const SEGGER_SYSVIEW_TASKINFO *pInfo) {
ENCODE_U32(pPayload, SHRINK_ID(pInfo->TaskID));
ENCODE_U32(pPayload, pInfo->StackBase);
ENCODE_U32(pPayload, pInfo->StackSize);
ENCODE_U32(pPayload, pInfo->StackUsage);
ENCODE_U32(pPayload, 0); // Stack End, future use
_SendPacket(pPayloadStart, pPayload, SYSVIEW_EVTID_STACK_INFO);
RECORD_END();
}
/*********************************************************************
*
* SEGGER_SYSVIEW_SendStackInfo()
*
* Function description
* Send a Stack Info Packet, containing TaskId for identification,
* stack base, stack size and stack usage.
*
*
* Parameters
* pInfo - Pointer to stack information to send.
*/
void SEGGER_SYSVIEW_SendStackInfo(const SEGGER_SYSVIEW_STACKINFO *pInfo) {
U8* pPayload;
U8* pPayloadStart;
RECORD_START(SEGGER_SYSVIEW_INFO_SIZE + 4 * SEGGER_SYSVIEW_QUANTA_U32);
//
pPayload = pPayloadStart;
ENCODE_U32(pPayload, SHRINK_ID(pInfo->TaskID));
ENCODE_U32(pPayload, pInfo->StackBase);
ENCODE_U32(pPayload, pInfo->StackSize);
ENCODE_U32(pPayload, pInfo->StackUsage);
RECORD_END();
}
/*********************************************************************
*
* SEGGER_SYSVIEW_SampleData()
*
* Function description
* Send a Data Sample Packet, containing the data Id and the value.
*
*
* Parameters
* pInfo - Pointer to data sample struct to send.
*/
void SEGGER_SYSVIEW_SampleData(const SEGGER_SYSVIEW_DATA_SAMPLE *pInfo) {
U8* pPayload;
U8* pPayloadStart;
RECORD_START(SEGGER_SYSVIEW_INFO_SIZE + 2 * SEGGER_SYSVIEW_QUANTA_U32);
//
pPayload = pPayloadStart;
ENCODE_U32(pPayload, pInfo->ID);
pPayload = _EncodeFloat(pPayload, *(pInfo->pFloat_Value));
_SendPacket(pPayloadStart, pPayload, SYSVIEW_EVTID_DATA_SAMPLE);
RECORD_END();
}
/*********************************************************************
*
* SEGGER_SYSVIEW_SendTaskList()
@@ -2550,63 +2448,6 @@ void SEGGER_SYSVIEW_NameResource(U32 ResourceId, const char* sName) {
RECORD_END();
}
/*********************************************************************
*
* SEGGER_SYSVIEW_RegisterData()
*
* Function description
* Register data to sample the values via SystemView.
*
* Register functions are usually set in the system description
* callback, to ensure it is only sent when the SystemView Application
* is connected.
*
* Parameters
* pInfo - Struct containing all possible properties that can be sent via this registration event.
*/
void SEGGER_SYSVIEW_RegisterData(SEGGER_SYSVIEW_DATA_REGISTER* pInfo) {
U8* pPayload;
U8* pPayloadStart;
RECORD_START(SEGGER_SYSVIEW_INFO_SIZE + 8 * SEGGER_SYSVIEW_QUANTA_U32 + 1 + SEGGER_SYSVIEW_MAX_STRING_LEN);
//
pPayload = pPayloadStart;
ENCODE_U32(pPayload, SYSVIEW_EVTID_EX_REGISTER_DATA);
ENCODE_U32(pPayload, pInfo->ID);
pPayload = _EncodeStr(pPayload, pInfo->sName, SEGGER_SYSVIEW_MAX_STRING_LEN);
if (pInfo->sName != 0) {
ENCODE_U32(pPayload, pInfo->DataType);
ENCODE_U32(pPayload, pInfo->Offset);
ENCODE_U32(pPayload, pInfo->RangeMin);
ENCODE_U32(pPayload, pInfo->RangeMax);
pPayload = _EncodeFloat(pPayload, pInfo->ScalingFactor);
pPayload = _EncodeStr(pPayload, pInfo->sUnit, SEGGER_SYSVIEW_MAX_STRING_LEN);
} else if (pInfo->ScalingFactor != 0) {
ENCODE_U32(pPayload, pInfo->DataType);
ENCODE_U32(pPayload, pInfo->Offset);
ENCODE_U32(pPayload, pInfo->RangeMin);
ENCODE_U32(pPayload, pInfo->RangeMax);
pPayload = _EncodeFloat(pPayload, pInfo->ScalingFactor);
} else if (pInfo->RangeMax != 0) {
ENCODE_U32(pPayload, pInfo->DataType);
ENCODE_U32(pPayload, pInfo->Offset);
ENCODE_U32(pPayload, pInfo->RangeMin);
ENCODE_U32(pPayload, pInfo->RangeMax);
} else if (pInfo->RangeMin != 0) {
ENCODE_U32(pPayload, pInfo->DataType);
ENCODE_U32(pPayload, pInfo->Offset);
ENCODE_U32(pPayload, pInfo->RangeMin);
} else if (pInfo->Offset != 0) {
ENCODE_U32(pPayload, pInfo->DataType);
ENCODE_U32(pPayload, pInfo->Offset);
} else if (pInfo->DataType != 0) {
ENCODE_U32(pPayload, pInfo->DataType);
}
_SendPacket(pPayloadStart, pPayload, SYSVIEW_EVTID_EX);
RECORD_END();
}
/*********************************************************************
*
* SEGGER_SYSVIEW_HeapDefine()
@@ -2979,6 +2820,9 @@ void SEGGER_SYSVIEW_RegisterModule(SEGGER_SYSVIEW_MODULE* pModule) {
_NumModules++;
}
SEGGER_SYSVIEW_SendModule(0);
if (pModule->pfSendModuleDesc) {
pModule->pfSendModuleDesc();
}
SEGGER_SYSVIEW_UNLOCK();
}
@@ -3062,9 +2906,6 @@ void SEGGER_SYSVIEW_SendModule(U8 ModuleId) {
_SendPacket(pPayloadStart, pPayload, SYSVIEW_EVTID_MODULEDESC);
RECORD_END();
}
if (pModule && pModule->pfSendModuleDesc) {
pModule->pfSendModuleDesc();
}
}
}
@@ -3145,39 +2986,6 @@ void SEGGER_SYSVIEW_PrintfHostEx(const char* s, U32 Options, ...) {
#endif
}
/*********************************************************************
*
* SEGGER_SYSVIEW_VPrintfHostEx()
*
* Function description
* Print a string which is formatted on the host by the SystemView Application
* with Additional information.
*
* Parameters
* s - String to be formatted.
* Options - Options for the string. i.e. Log level.
* pParamList - Pointer to the list of arguments for the format string
*
* Additional information
* All format arguments are treated as 32-bit scalar values.
*/
void SEGGER_SYSVIEW_VPrintfHostEx(const char* s, U32 Options, va_list *pParamList) {
#if SEGGER_SYSVIEW_PRINTF_IMPLICIT_FORMAT
int r;
va_list ParamListCopy;
va_copy(ParamListCopy, *pParamList);
r = _VPrintHost(s, Options, pParamList);
if (r == -1) {
_VPrintTarget(s, Options, &ParamListCopy);
}
va_end(ParamListCopy);
#else
_VPrintHost(s, Options, pParamList);
#endif
}
/*********************************************************************
*
* SEGGER_SYSVIEW_PrintfHost()
@@ -3212,37 +3020,6 @@ void SEGGER_SYSVIEW_PrintfHost(const char* s, ...) {
#endif
}
/*********************************************************************
*
* SEGGER_SYSVIEW_VPrintfHost()
*
* Function description
* Print a string which is formatted on the host by the SystemView Application.
*
* Parameters
* s - String to be formatted.
* pParamList - Pointer to the list of arguments for the format string
*
* Additional information
* All format arguments are treated as 32-bit scalar values.
*/
void SEGGER_SYSVIEW_VPrintfHost(const char* s, va_list *pParamList) {
#if SEGGER_SYSVIEW_PRINTF_IMPLICIT_FORMAT
int r;
va_list ParamListCopy;
va_copy(ParamListCopy, *pParamList);
r = _VPrintHost(s, SEGGER_SYSVIEW_LOG, pParamList);
if (r == -1) {
_VPrintTarget(s, SEGGER_SYSVIEW_LOG, &ParamListCopy);
}
va_end(ParamListCopy);
#else
_VPrintHost(s, SEGGER_SYSVIEW_LOG, pParamList);
#endif
}
/*********************************************************************
*
* SEGGER_SYSVIEW_WarnfHost()
@@ -3278,38 +3055,6 @@ void SEGGER_SYSVIEW_WarnfHost(const char* s, ...) {
#endif
}
/*********************************************************************
*
* SEGGER_SYSVIEW_VWarnfHost()
*
* Function description
* Print a warning string which is formatted on the host by
* the SystemView Application.
*
* Parameters
* s - String to be formatted.
* pParamList - Pointer to the list of arguments for the format string
*
* Additional information
* All format arguments are treated as 32-bit scalar values.
*/
void SEGGER_SYSVIEW_VWarnfHost(const char* s, va_list *pParamList) {
#if SEGGER_SYSVIEW_PRINTF_IMPLICIT_FORMAT
int r;
va_list ParamListCopy;
va_copy(ParamListCopy, *pParamList);
r = _VPrintHost(s, SEGGER_SYSVIEW_WARNING, pParamList);
if (r == -1) {
_VPrintTarget(s, SEGGER_SYSVIEW_WARNING, &ParamListCopy);
}
va_end(ParamListCopy);
#else
_VPrintHost(s, SEGGER_SYSVIEW_WARNING, pParamList);
#endif
}
/*********************************************************************
*
* SEGGER_SYSVIEW_ErrorfHost()
@@ -3345,38 +3090,6 @@ void SEGGER_SYSVIEW_ErrorfHost(const char* s, ...) {
#endif
}
/*********************************************************************
*
* SEGGER_SYSVIEW_VErrorfHost()
*
* Function description
* Print a warning string which is formatted on the host by
* the SystemView Application.
*
* Parameters
* s - String to be formatted.
* pParamList - Pointer to the list of arguments for the format string
*
* Additional information
* All format arguments are treated as 32-bit scalar values.
*/
void SEGGER_SYSVIEW_VErrorfHost(const char* s, va_list *pParamList) {
#if SEGGER_SYSVIEW_PRINTF_IMPLICIT_FORMAT
int r;
va_list ParamListCopy;
va_copy(ParamListCopy, *pParamList);
r = _VPrintHost(s, SEGGER_SYSVIEW_ERROR, pParamList);
if (r == -1) {
_VPrintTarget(s, SEGGER_SYSVIEW_ERROR, &ParamListCopy);
}
va_end(ParamListCopy);
#else
_VPrintHost(s, SEGGER_SYSVIEW_ERROR, pParamList);
#endif
}
/*********************************************************************
*
* SEGGER_SYSVIEW_PrintfTargetEx()
@@ -3397,23 +3110,6 @@ void SEGGER_SYSVIEW_PrintfTargetEx(const char* s, U32 Options, ...) {
va_end(ParamList);
}
/*********************************************************************
*
* SEGGER_SYSVIEW_VPrintfTargetEx()
*
* Function description
* Print a string which is formatted on the target before sent to
* the host with Additional information.
*
* Parameters
* s - String to be formatted.
* Options - Options for the string. i.e. Log level.
* pParamList - Pointer to the list of arguments for the format string
*/
void SEGGER_SYSVIEW_VPrintfTargetEx(const char* s, U32 Options, va_list *pParamList) {
_VPrintTarget(s, Options, pParamList);
}
/*********************************************************************
*
* SEGGER_SYSVIEW_PrintfTarget()
@@ -3433,22 +3129,6 @@ void SEGGER_SYSVIEW_PrintfTarget(const char* s, ...) {
va_end(ParamList);
}
/*********************************************************************
*
* SEGGER_SYSVIEW_VPrintfTarget()
*
* Function description
* Print a string which is formatted on the target before sent to
* the host.
*
* Parameters
* s - String to be formatted.
* pParamList - Pointer to the list of arguments for the format string
*/
void SEGGER_SYSVIEW_VPrintfTarget(const char* s, va_list* pParamList) {
_VPrintTarget(s, SEGGER_SYSVIEW_LOG, pParamList);
}
/*********************************************************************
*
* SEGGER_SYSVIEW_WarnfTarget()
@@ -3468,22 +3148,6 @@ void SEGGER_SYSVIEW_WarnfTarget(const char* s, ...) {
va_end(ParamList);
}
/*********************************************************************
*
* SEGGER_SYSVIEW_VWarnfTarget()
*
* Function description
* Print a warning string which is formatted on the target before
* sent to the host.
*
* Parameters
* s - String to be formatted.
* pParamList - Pointer to the list of arguments for the format string
*/
void SEGGER_SYSVIEW_VWarnfTarget(const char* s, va_list* pParamList) {
_VPrintTarget(s, SEGGER_SYSVIEW_WARNING, pParamList);
}
/*********************************************************************
*
* SEGGER_SYSVIEW_ErrorfTarget()
@@ -3502,22 +3166,6 @@ void SEGGER_SYSVIEW_ErrorfTarget(const char* s, ...) {
_VPrintTarget(s, SEGGER_SYSVIEW_ERROR, &ParamList);
va_end(ParamList);
}
/*********************************************************************
*
* SEGGER_SYSVIEW_VErrorfTarget()
*
* Function description
* Print an error string which is formatted on the target before
* sent to the host.
*
* Parameters
* s - String to be formatted.
* pParamList - Pointer to the list of arguments for the format string
*/
void SEGGER_SYSVIEW_VErrorfTarget(const char* s, va_list* pParamList) {
_VPrintTarget(s, SEGGER_SYSVIEW_ERROR, pParamList);
}
#endif // SEGGER_SYSVIEW_EXCLUDE_PRINTF
/*********************************************************************

View File

@@ -3,14 +3,14 @@
*
* SPDX-License-Identifier: BSD-1-Clause
*
* SPDX-FileContributor: 2023-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileContributor: 2023 Espressif Systems (Shanghai) CO LTD
*/
/*********************************************************************
* SEGGER Microcontroller GmbH *
* The Embedded Experts *
**********************************************************************
* *
* (c) 1995 - 2024 SEGGER Microcontroller GmbH *
* (c) 1995 - 2021 SEGGER Microcontroller GmbH *
* *
* www.segger.com Support: support@segger.com *
* *
@@ -49,13 +49,13 @@
* *
**********************************************************************
* *
* SystemView version: 3.56 *
* SystemView version: 3.42 *
* *
**********************************************************************
-------------------------- END-OF-HEADER -----------------------------
File : SEGGER_SYSVIEW.h
Purpose : System visualization API.
Revision: $Rev: 28768 $
Revision: $Rev: 28237 $
*/
#ifndef SEGGER_SYSVIEW_H
@@ -123,7 +123,7 @@ extern "C" {
#define SYSVIEW_EVTID_TIMER_EXIT 20
#define SYSVIEW_EVTID_STACK_INFO 21
#define SYSVIEW_EVTID_MODULEDESC 22
#define SYSVIEW_EVTID_DATA_SAMPLE 23
#define SYSVIEW_EVTID_INIT 24
#define SYSVIEW_EVTID_NAME_RESOURCE 25
#define SYSVIEW_EVTID_PRINT_FORMATTED 26
@@ -135,13 +135,12 @@ extern "C" {
//
// SystemView extended events. Sent with ID 31.
//
#define SYSVIEW_EVTID_EX_MARK 0
#define SYSVIEW_EVTID_EX_NAME_MARKER 1
#define SYSVIEW_EVTID_EX_HEAP_DEFINE 2
#define SYSVIEW_EVTID_EX_HEAP_ALLOC 3
#define SYSVIEW_EVTID_EX_HEAP_ALLOC_EX 4
#define SYSVIEW_EVTID_EX_HEAP_FREE 5
#define SYSVIEW_EVTID_EX_REGISTER_DATA 6
#define SYSVIEW_EVTID_EX_MARK 0
#define SYSVIEW_EVTID_EX_NAME_MARKER 1
#define SYSVIEW_EVTID_EX_HEAP_DEFINE 2
#define SYSVIEW_EVTID_EX_HEAP_ALLOC 3
#define SYSVIEW_EVTID_EX_HEAP_ALLOC_EX 4
#define SYSVIEW_EVTID_EX_HEAP_FREE 5
//
// Event masks to disable/enable events
//
@@ -168,7 +167,7 @@ extern "C" {
#define SYSVIEW_EVTMASK_TIMER_EXIT (1 << SYSVIEW_EVTID_TIMER_EXIT)
#define SYSVIEW_EVTMASK_STACK_INFO (1 << SYSVIEW_EVTID_STACK_INFO)
#define SYSVIEW_EVTMASK_MODULEDESC (1 << SYSVIEW_EVTID_MODULEDESC)
#define SYSVIEW_EVTMASK_DATA_SAMPLE (1 << SYSVIEW_EVTID_DATA_SAMPLE)
#define SYSVIEW_EVTMASK_INIT (1 << SYSVIEW_EVTID_INIT)
#define SYSVIEW_EVTMASK_NAME_RESOURCE (1 << SYSVIEW_EVTID_NAME_RESOURCE)
#define SYSVIEW_EVTMASK_PRINT_FORMATTED (1 << SYSVIEW_EVTID_PRINT_FORMATTED)
@@ -203,42 +202,8 @@ typedef struct {
U32 Prio;
U32 StackBase;
U32 StackSize;
U32 StackUsage;
} SEGGER_SYSVIEW_TASKINFO;
typedef struct {
U32 TaskID;
U32 StackBase;
U32 StackSize;
U32 StackUsage;
} SEGGER_SYSVIEW_STACKINFO;
typedef struct {
U32 ID;
union {
U32* pU32_Value;
I32* pI32_Value;
float* pFloat_Value;
};
} SEGGER_SYSVIEW_DATA_SAMPLE;
typedef enum {
SEGGER_SYSVIEW_TYPE_U32 = 0,
SEGGER_SYSVIEW_TYPE_I32 = 1,
SEGGER_SYSVIEW_TYPE_FLOAT = 2
} SEGGER_SYSVIEW_DATA_TYPE;
typedef struct {
U32 ID;
SEGGER_SYSVIEW_DATA_TYPE DataType;
I32 Offset;
I32 RangeMin;
I32 RangeMax;
float ScalingFactor;
const char* sName;
const char* sUnit;
} SEGGER_SYSVIEW_DATA_REGISTER;
typedef struct SEGGER_SYSVIEW_MODULE_STRUCT SEGGER_SYSVIEW_MODULE;
struct SEGGER_SYSVIEW_MODULE_STRUCT {
@@ -282,8 +247,8 @@ EXTERN unsigned int SEGGER_SYSVIEW_InterruptId;
*/
typedef struct {
U64 (*pfGetTime) (void);
void (*pfSendTaskList) (void);
U64 (*pfGetTime) (void);
void (*pfSendTaskList) (void);
} SEGGER_SYSVIEW_OS_API;
/*********************************************************************
@@ -297,13 +262,9 @@ void SEGGER_SYSVIEW_Stop (void);
void SEGGER_SYSVIEW_GetSysDesc (void);
void SEGGER_SYSVIEW_SendTaskList (void);
void SEGGER_SYSVIEW_SendTaskInfo (const SEGGER_SYSVIEW_TASKINFO* pInfo);
void SEGGER_SYSVIEW_SendStackInfo (const SEGGER_SYSVIEW_STACKINFO* pInfo);
void SEGGER_SYSVIEW_SendSysDesc (const char* sSysDesc);
int SEGGER_SYSVIEW_IsStarted (void);
int SEGGER_SYSVIEW_GetChannelID (void);
void SEGGER_SYSVIEW_SampleData (const SEGGER_SYSVIEW_DATA_SAMPLE *pInfo);
// Checks whether tracing has been started
U8 SEGGER_SYSVIEW_Started(void);
@@ -350,7 +311,6 @@ void SEGGER_SYSVIEW_HeapAllocEx (void* pHeap, void* pUserData,
void SEGGER_SYSVIEW_HeapFree (void* pHeap, void* pUserData);
void SEGGER_SYSVIEW_NameResource (U32 ResourceId, const char* sName);
void SEGGER_SYSVIEW_RegisterData ( SEGGER_SYSVIEW_DATA_REGISTER* pInfo);
int SEGGER_SYSVIEW_SendPacket (U8* pPacket, U8* pPayloadEnd, unsigned int EventId);
@@ -381,21 +341,13 @@ void SEGGER_SYSVIEW_SendNumModules (void);
*/
#ifndef SEGGER_SYSVIEW_EXCLUDE_PRINTF // Define in project to avoid warnings about variable parameter list
void SEGGER_SYSVIEW_PrintfHostEx (const char* s, U32 Options, ...);
void SEGGER_SYSVIEW_VPrintfHostEx (const char* s, U32 Options, va_list* pParamList);
void SEGGER_SYSVIEW_PrintfTargetEx (const char* s, U32 Options, ...);
void SEGGER_SYSVIEW_VPrintfTargetEx (const char* s, U32 Options, va_list* pParamList);
void SEGGER_SYSVIEW_PrintfHost (const char* s, ...);
void SEGGER_SYSVIEW_VPrintfHost (const char* s, va_list* pParamList);
void SEGGER_SYSVIEW_PrintfTarget (const char* s, ...);
void SEGGER_SYSVIEW_VPrintfTarget (const char* s, va_list* pParamList);
void SEGGER_SYSVIEW_WarnfHost (const char* s, ...);
void SEGGER_SYSVIEW_VWarnfHost (const char* s, va_list* pParamList);
void SEGGER_SYSVIEW_WarnfTarget (const char* s, ...);
void SEGGER_SYSVIEW_VWarnfTarget (const char* s, va_list* pParamList);
void SEGGER_SYSVIEW_ErrorfHost (const char* s, ...);
void SEGGER_SYSVIEW_VErrorfHost (const char* s, va_list* pParamList);
void SEGGER_SYSVIEW_ErrorfTarget (const char* s, ...);
void SEGGER_SYSVIEW_VErrorfTarget (const char* s, va_list* pParamList);
#endif
void SEGGER_SYSVIEW_Print (const char* s);

View File

@@ -3,14 +3,14 @@
*
* SPDX-License-Identifier: BSD-1-Clause
*
* SPDX-FileContributor: 2023-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileContributor: 2023 Espressif Systems (Shanghai) CO LTD
*/
/*********************************************************************
* SEGGER Microcontroller GmbH *
* The Embedded Experts *
**********************************************************************
* *
* (c) 1995 - 2024 SEGGER Microcontroller GmbH *
* (c) 1995 - 2021 SEGGER Microcontroller GmbH *
* *
* www.segger.com Support: support@segger.com *
* *
@@ -49,7 +49,7 @@
* *
**********************************************************************
* *
* SystemView version: 3.56 *
* SystemView version: 3.42 *
* *
**********************************************************************
-------------------------- END-OF-HEADER -----------------------------
@@ -72,8 +72,6 @@ Revision: $Rev: 26230 $
#include "SEGGER_SYSVIEW_Conf.h"
#include "SEGGER_RTT_Conf.h"
#include "esp_assert.h"
#ifdef __cplusplus
extern "C" {
#endif
@@ -372,14 +370,12 @@ extern "C" {
#define SEGGER_SYSVIEW_MAX_STRING_LEN 128
#endif
ESP_STATIC_ASSERT(SEGGER_SYSVIEW_MAX_STRING_LEN < 255, "SEGGER Sysview string length must be less than 255.");
/*********************************************************************
*
* Define: SEGGER_SYSVIEW_SUPPORT_LONG_ID
*
* Description
* It set, support encoding Evend Ids longer than 14 bit.
* It set, support enconding Evend Ids longer than 14 bit.
* Default
* 1
*/
@@ -392,7 +388,7 @@ ESP_STATIC_ASSERT(SEGGER_SYSVIEW_MAX_STRING_LEN < 255, "SEGGER Sysview string le
* Define: SEGGER_SYSVIEW_SUPPORT_LONG_DATA
*
* Description
* It set, support encoding event data longer than 14 bit.
* It set, support enconding event data longer than 14 bit.
* Default
* 0
*/
@@ -521,7 +517,7 @@ ESP_STATIC_ASSERT(SEGGER_SYSVIEW_MAX_STRING_LEN < 255, "SEGGER Sysview string le
* Define: SEGGER_SYSVIEW_SYNC_PERIOD_SHIFT
*
* Description
* Configure how frequently synchronization is sent in post-mortem
* Configure how frequently syncronization is sent in post-mortem
* mode.
* Default
* 8: (1 << 8) = Every 256 Events.

View File

@@ -8,7 +8,7 @@
* The Embedded Experts *
**********************************************************************
* *
* (c) 1995 - 2024 SEGGER Microcontroller GmbH *
* (c) 1995 - 2021 SEGGER Microcontroller GmbH *
* *
* www.segger.com Support: support@segger.com *
* *
@@ -47,7 +47,7 @@
* *
**********************************************************************
* *
* SystemView version: 3.56 *
* SystemView version: 3.42 *
* *
**********************************************************************
-------------------------- END-OF-HEADER -----------------------------

View File

@@ -1,6 +0,0 @@
name: 'SystemView'
version: '3.56'
cpe: cpe:2.3:a:segger:systemview:{}:*:*:*:*:*:*:*
supplier: 'Organization: Espressif Systems (Shanghai) CO LTD'
originator: 'Organization: SEGGER Microcontroller GmbH'
description: Real-time recording and visualization tool for embedded systems.

View File

@@ -3,7 +3,7 @@
*
* SPDX-License-Identifier: BSD-1-Clause
*
* SPDX-FileContributor: 2017-2025 Espressif Systems (Shanghai) CO LTD
* SPDX-FileContributor: 2017-2022 Espressif Systems (Shanghai) CO LTD
*/
/*********************************************************************
* SEGGER Microcontroller GmbH *
@@ -58,14 +58,12 @@ File : SEGGER_SYSVIEW_Config_FreeRTOS.c
Purpose : Sample setup configuration of SystemView with FreeRTOS.
Revision: $Rev: 7745 $
*/
#include <string.h>
#include "sdkconfig.h"
#include "freertos/FreeRTOS.h"
#include "SEGGER_SYSVIEW.h"
#include "esp_app_trace.h"
#include "esp_app_trace_util.h"
#include "esp_intr_alloc.h"
#include "esp_clk_tree.h"
#include "esp_cpu.h"
#include "soc/soc.h"
#include "soc/interrupts.h"
@@ -85,7 +83,11 @@ extern const SEGGER_SYSVIEW_OS_API SYSVIEW_X_OS_TraceAPI;
// The target device name
#define SYSVIEW_DEVICE_NAME CONFIG_IDF_TARGET
// The target core name
#define SYSVIEW_CORE_NAME "core0" // In dual core, this will be renamed by OpenOCD as core1
#if CONFIG_IDF_TARGET_ARCH_XTENSA
#define SYSVIEW_CORE_NAME "xtensa"
#elif CONFIG_IDF_TARGET_ARCH_RISCV
#define SYSVIEW_CORE_NAME "riscv"
#endif
// Determine which timer to use as timestamp source
#if CONFIG_APPTRACE_SV_TS_SOURCE_CCOUNT
@@ -102,6 +104,9 @@ extern const SEGGER_SYSVIEW_OS_API SYSVIEW_X_OS_TraceAPI;
// Timer group timer divisor
#define SYSVIEW_TIMER_DIV 2
// Frequency of the timestamp, using APB as GPTimer source clock
#define SYSVIEW_TIMESTAMP_FREQ (esp_clk_apb_freq() / SYSVIEW_TIMER_DIV)
// GPTimer handle
gptimer_handle_t s_sv_gptimer;
@@ -151,16 +156,15 @@ static esp_apptrace_lock_t s_sys_view_lock = {.mux = portMUX_INITIALIZER_UNLOCKE
* Sends SystemView description strings.
*/
static void _cbSendSystemDesc(void) {
char irq_str[32] = "I#";
char irq_str[32];
SEGGER_SYSVIEW_SendSysDesc("N="SYSVIEW_APP_NAME",D="SYSVIEW_DEVICE_NAME",C="SYSVIEW_CORE_NAME",O=FreeRTOS");
strcat(itoa(SYSTICK_INTR_ID, irq_str + 2, 10), "=SysTick");
snprintf(irq_str, sizeof(irq_str), "I#%d=SysTick", SYSTICK_INTR_ID);
SEGGER_SYSVIEW_SendSysDesc(irq_str);
size_t isr_count = sizeof(esp_isr_names)/sizeof(esp_isr_names[0]);
for (size_t i = 0; i < isr_count; ++i) {
if (esp_isr_names[i] == NULL || (ETS_INTERNAL_INTR_SOURCE_OFF + i) == SYSTICK_INTR_ID)
continue;
strcat(itoa(ETS_INTERNAL_INTR_SOURCE_OFF + i, irq_str + 2, 10), "=");
strncat(irq_str, esp_isr_names[i], sizeof(irq_str) - strlen(irq_str) - 1);
snprintf(irq_str, sizeof(irq_str), "I#%d=%s", ETS_INTERNAL_INTR_SOURCE_OFF + i, esp_isr_names[i]);
SEGGER_SYSVIEW_SendSysDesc(irq_str);
}
}
@@ -171,38 +175,30 @@ static void _cbSendSystemDesc(void) {
*
**********************************************************************
*/
static int SEGGER_SYSVIEW_TS_Init(void)
static void SEGGER_SYSVIEW_TS_Init(void)
{
/* We only need to initialize something if we use Timer Group.
* esp_timer and ccount can be used as is.
*/
#if TS_USE_TIMERGROUP
// get clock source frequency
uint32_t counter_src_hz = 0;
ESP_ERROR_CHECK(esp_clk_tree_src_get_freq_hz(
(soc_module_clk_t)GPTIMER_CLK_SRC_DEFAULT,
ESP_CLK_TREE_SRC_FREQ_PRECISION_CACHED, &counter_src_hz));
gptimer_config_t config = {
.clk_src = GPTIMER_CLK_SRC_DEFAULT,
.direction = GPTIMER_COUNT_UP,
.resolution_hz = counter_src_hz / SYSVIEW_TIMER_DIV,
.resolution_hz = SYSVIEW_TIMESTAMP_FREQ,
};
// pick any free GPTimer instance
ESP_ERROR_CHECK(gptimer_new_timer(&config, &s_sv_gptimer));
/* Start counting */
gptimer_enable(s_sv_gptimer);
gptimer_start(s_sv_gptimer);
return config.resolution_hz;
#else
return SYSVIEW_TIMESTAMP_FREQ;
#endif // TS_USE_TIMERGROUP
}
void SEGGER_SYSVIEW_Conf(void) {
U32 disable_evts = 0;
int timestamp_freq = SEGGER_SYSVIEW_TS_Init();
SEGGER_SYSVIEW_Init(timestamp_freq, SYSVIEW_CPU_FREQ,
SEGGER_SYSVIEW_TS_Init();
SEGGER_SYSVIEW_Init(SYSVIEW_TIMESTAMP_FREQ, SYSVIEW_CPU_FREQ,
&SYSVIEW_X_OS_TraceAPI, _cbSendSystemDesc);
SEGGER_SYSVIEW_SetRAMBase(SYSVIEW_RAM_BASE);

View File

@@ -108,7 +108,7 @@ static void _cbSendTaskList(void) {
* Called from SystemView when asked by the host, returns the
* current system time in micro seconds.
*/
__attribute__((unused)) static U64 _cbGetTime(void) {
static U64 _cbGetTime(void) {
U64 Time;
Time = xTaskGetTickCountFromISR();
@@ -260,10 +260,7 @@ void SYSVIEW_SendTaskInfo(U32 TaskID, const char* sName, unsigned Prio, U32 Stac
*/
// Callbacks provided to SYSTEMVIEW by FreeRTOS
const SEGGER_SYSVIEW_OS_API SYSVIEW_X_OS_TraceAPI = {
/* Callback _cbGetTime locks xKernelLock inside xTaskGetTickCountFromISR, this can cause deadlock on multi-core.
To prevent deadlock, always lock xKernelLock before s_sys_view_lock. Omitting the callback here results in sending
SYSVIEW_EVTID_SYSTIME_CYCLES events instead of SYSVIEW_EVTID_SYSTIME_US */
NULL,
_cbGetTime,
_cbSendTaskList,
};

View File

@@ -21,7 +21,7 @@ const static char *TAG = "sysview_heap_trace";
#endif
static SEGGER_SYSVIEW_MODULE s_esp_sysview_heap_module = {
.sModule = "M=ESP32 SystemView Heap Tracing Module",
.sModule = "ESP32 SystemView Heap Tracing Module",
.NumEvents = 2,
};

View File

@@ -8,6 +8,6 @@ components/app_trace/test_apps:
- driver
- esp_hw_support
disable:
- if: IDF_TARGET in ["esp32c5", "esp32c61"]
- if: IDF_TARGET == "esp32c5"
temporary: true
reason: not support yet # TODO: [ESP32C5] IDF-8705, [ESP32C61] IDF-9306
reason: not support yet # TODO: [ESP32C5] IDF-8705

View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -17,7 +17,6 @@
#include "esp_image_format.h"
#include "esp_secure_boot.h"
#include "esp_flash_encrypt.h"
#include "spi_flash_mmap.h"
#include "sdkconfig.h"
#include "esp_ota_ops.h"
@@ -41,7 +40,6 @@ typedef struct ota_ops_entry_ {
bool need_erase;
uint32_t wrote_size;
uint8_t partial_bytes;
bool ota_resumption;
WORD_ALIGNED_ATTR uint8_t partial_data[16];
LIST_ENTRY(ota_ops_entry_) entries;
} ota_ops_entry_t;
@@ -81,7 +79,7 @@ static const esp_partition_t *read_otadata(esp_ota_select_entry_t *two_otadata)
return NULL;
} else {
memcpy(&two_otadata[0], result, sizeof(esp_ota_select_entry_t));
memcpy(&two_otadata[1], result + otadata_partition->erase_size, sizeof(esp_ota_select_entry_t));
memcpy(&two_otadata[1], result + SPI_FLASH_SEC_SIZE, sizeof(esp_ota_select_entry_t));
esp_partition_munmap(ota_data_map);
}
return otadata_partition;
@@ -112,22 +110,6 @@ static esp_ota_img_states_t set_new_state_otadata(void)
#endif
}
static ota_ops_entry_t* esp_ota_init_entry(const esp_partition_t *partition)
{
ota_ops_entry_t *new_entry = (ota_ops_entry_t *) calloc(1, sizeof(ota_ops_entry_t));
if (new_entry == NULL) {
return NULL;
}
LIST_INSERT_HEAD(&s_ota_ops_entries_head, new_entry, entries);
new_entry->part = partition;
new_entry->handle = ++s_ota_ops_last_handle;
return new_entry;
}
esp_err_t esp_ota_begin(const esp_partition_t *partition, size_t image_size, esp_ota_handle_t *out_handle)
{
ota_ops_entry_t *new_entry;
@@ -161,19 +143,12 @@ esp_err_t esp_ota_begin(const esp_partition_t *partition, size_t image_size, esp
}
#endif
new_entry = esp_ota_init_entry(partition);
if (new_entry == NULL) {
return ESP_ERR_NO_MEM;
}
new_entry->need_erase = (image_size == OTA_WITH_SEQUENTIAL_WRITES);
*out_handle = new_entry->handle;
if (image_size != OTA_WITH_SEQUENTIAL_WRITES) {
// If input image size is 0 or OTA_SIZE_UNKNOWN, erase entire partition
if ((image_size == 0) || (image_size == OTA_SIZE_UNKNOWN)) {
ret = esp_partition_erase_range(partition, 0, partition->size);
} else {
const int aligned_erase_size = (image_size + partition->erase_size - 1) & ~(partition->erase_size - 1);
const int aligned_erase_size = (image_size + SPI_FLASH_SEC_SIZE - 1) & ~(SPI_FLASH_SEC_SIZE - 1);
ret = esp_partition_erase_range(partition, 0, aligned_erase_size);
}
if (ret != ESP_OK) {
@@ -181,44 +156,16 @@ esp_err_t esp_ota_begin(const esp_partition_t *partition, size_t image_size, esp
}
}
return ESP_OK;
}
esp_err_t esp_ota_resume(const esp_partition_t *partition, const size_t erase_size, const size_t image_offset, esp_ota_handle_t *out_handle)
{
ota_ops_entry_t *new_entry;
if ((partition == NULL) || (out_handle == NULL)) {
return ESP_ERR_INVALID_ARG;
}
if (image_offset > partition->size) {
return ESP_ERR_INVALID_ARG;
}
partition = esp_partition_verify(partition);
if (partition == NULL) {
return ESP_ERR_NOT_FOUND;
}
// The staging partition cannot be of type Factory, but the final partition can be.
if (!is_ota_partition(partition)) {
return ESP_ERR_INVALID_ARG;
}
const esp_partition_t* running_partition = esp_ota_get_running_partition();
if (partition == running_partition) {
return ESP_ERR_OTA_PARTITION_CONFLICT;
}
new_entry = esp_ota_init_entry(partition);
new_entry = (ota_ops_entry_t *) calloc(sizeof(ota_ops_entry_t), 1);
if (new_entry == NULL) {
return ESP_ERR_NO_MEM;
}
new_entry->ota_resumption = true;
new_entry->wrote_size = image_offset;
new_entry->need_erase = (erase_size == OTA_WITH_SEQUENTIAL_WRITES);
LIST_INSERT_HEAD(&s_ota_ops_entries_head, new_entry, entries);
new_entry->part = partition;
new_entry->handle = ++s_ota_ops_last_handle;
new_entry->need_erase = (image_size == OTA_WITH_SEQUENTIAL_WRITES);
*out_handle = new_entry->handle;
return ESP_OK;
}
@@ -244,14 +191,14 @@ esp_err_t esp_ota_write(esp_ota_handle_t handle, const void *data, size_t size)
if (it->handle == handle) {
if (it->need_erase) {
// must erase the partition before writing to it
uint32_t first_sector = it->wrote_size / it->part->erase_size; // first affected sector
uint32_t last_sector = (it->wrote_size + size - 1) / it->part->erase_size; // last affected sector
uint32_t first_sector = it->wrote_size / SPI_FLASH_SEC_SIZE; // first affected sector
uint32_t last_sector = (it->wrote_size + size - 1) / SPI_FLASH_SEC_SIZE; // last affected sector
ret = ESP_OK;
if ((it->wrote_size % it->part->erase_size) == 0) {
ret = esp_partition_erase_range(it->part, it->wrote_size, ((last_sector - first_sector) + 1) * it->part->erase_size);
if ((it->wrote_size % SPI_FLASH_SEC_SIZE) == 0) {
ret = esp_partition_erase_range(it->part, it->wrote_size, ((last_sector - first_sector) + 1) * SPI_FLASH_SEC_SIZE);
} else if (first_sector != last_sector) {
ret = esp_partition_erase_range(it->part, (first_sector + 1) * it->part->erase_size, (last_sector - first_sector) * it->part->erase_size);
ret = esp_partition_erase_range(it->part, (first_sector + 1) * SPI_FLASH_SEC_SIZE, (last_sector - first_sector) * SPI_FLASH_SEC_SIZE);
}
if (ret != ESP_OK) {
return ret;
@@ -421,11 +368,11 @@ static esp_err_t rewrite_ota_seq(esp_ota_select_entry_t *two_otadata, uint32_t s
two_otadata[sec_id].ota_seq = seq;
two_otadata[sec_id].crc = bootloader_common_ota_select_crc(&two_otadata[sec_id]);
esp_err_t ret = esp_partition_erase_range(ota_data_partition, sec_id * ota_data_partition->erase_size, ota_data_partition->erase_size);
esp_err_t ret = esp_partition_erase_range(ota_data_partition, sec_id * SPI_FLASH_SEC_SIZE, SPI_FLASH_SEC_SIZE);
if (ret != ESP_OK) {
return ret;
} else {
return esp_partition_write(ota_data_partition, ota_data_partition->erase_size * sec_id, &two_otadata[sec_id], sizeof(esp_ota_select_entry_t));
return esp_partition_write(ota_data_partition, SPI_FLASH_SEC_SIZE * sec_id, &two_otadata[sec_id], sizeof(esp_ota_select_entry_t));
}
}
@@ -958,7 +905,7 @@ esp_err_t esp_ota_erase_last_boot_app_partition(void)
}
int sec_id = inactive_otadata;
err = esp_partition_erase_range(ota_data_partition, sec_id * ota_data_partition->erase_size, ota_data_partition->erase_size);
err = esp_partition_erase_range(ota_data_partition, sec_id * SPI_FLASH_SEC_SIZE, SPI_FLASH_SEC_SIZE);
if (err != ESP_OK) {
return err;
}

View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -99,32 +99,6 @@ int esp_ota_get_app_elf_sha256(char* dst, size_t size) __attribute__((deprecated
*/
esp_err_t esp_ota_begin(const esp_partition_t* partition, size_t image_size, esp_ota_handle_t* out_handle);
/**
* @brief Resume an interrupted OTA update by continuing to write to the specified partition.
*
* This function is used when an OTA update was previously started and needs to be resumed after an interruption.
* It continues the OTA process from the specified offset within the partition.
*
* Unlike esp_ota_begin(), this function does not erase the partition which receives the OTA update, but rather expects that part of the image
* has already been written correctly, and it resumes writing from the given offset.
*
* @param partition Pointer to info for the partition which is receiving the OTA update. Required.
* @param erase_size Specifies how much flash memory to erase before resuming OTA, depending on whether a sequential write or a bulk erase is being used.
* @param image_offset Offset from where to resume the OTA process. Should be set to the number of bytes already written.
* @param out_handle On success, returns a handle that should be used for subsequent esp_ota_write() and esp_ota_end() calls.
*
* @return
* - ESP_OK: OTA operation resumed successfully.
* - ESP_ERR_INVALID_ARG: partition, out_handle were NULL or image_offset arguments is negative, or partition doesn't point to an OTA app partition.
* - ESP_ERR_NO_MEM: Cannot allocate memory for OTA operation.
* - ESP_ERR_OTA_PARTITION_CONFLICT: Partition holds the currently running firmware, cannot update in place.
* - ESP_ERR_NOT_FOUND: Partition argument not found in partition table.
* - ESP_ERR_OTA_SELECT_INFO_INVALID: The OTA data partition contains invalid data.
* - ESP_ERR_INVALID_SIZE: Partition doesn't fit in configured flash size.
* - ESP_ERR_FLASH_OP_TIMEOUT or ESP_ERR_FLASH_OP_FAIL: Flash write failed.
*/
esp_err_t esp_ota_resume(const esp_partition_t *partition, const size_t erase_size, const size_t image_offset, esp_ota_handle_t *out_handle);
/**
* @brief Write OTA update data to partition
*
@@ -142,8 +116,6 @@ esp_err_t esp_ota_resume(const esp_partition_t *partition, const size_t erase_si
* - ESP_ERR_OTA_VALIDATE_FAILED: First byte of image contains invalid app image magic byte.
* - ESP_ERR_FLASH_OP_TIMEOUT or ESP_ERR_FLASH_OP_FAIL: Flash write failed.
* - ESP_ERR_OTA_SELECT_INFO_INVALID: OTA data partition has invalid contents
* - ESP_ERR_INVALID_SIZE: if write would go out of bounds of the partition
* - or one of error codes from lower-level flash driver.
*/
esp_err_t esp_ota_write(esp_ota_handle_t handle, const void* data, size_t size);

View File

@@ -0,0 +1,7 @@
# Documentation: .gitlab/ci/README.md#manifest-file-to-control-the-buildtest-apps
components/app_update/test_apps:
disable:
- if: IDF_TARGET in ["esp32c6", "esp32h2", "esp32c5"]
temporary: true
reason: target esp32c6, esp32h2 esp32c5 is not supported yet # TODO: [ESP32C5] IDF-8638

View File

@@ -0,0 +1,2 @@
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- |

View File

@@ -0,0 +1,4 @@
idf_component_register(SRC_DIRS "."
PRIV_INCLUDE_DIRS "."
PRIV_REQUIRES cmock test_utils app_update bootloader_support nvs_flash driver spi_flash
WHOLE_ARCHIVE)

View File

@@ -6,7 +6,6 @@
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include "esp_log.h"
#include <freertos/FreeRTOS.h>
#include <freertos/task.h>
#include <freertos/semphr.h>
@@ -114,11 +113,3 @@ TEST_CASE("esp_ota_get_partition_description", "[ota]")
};
TEST_ESP_ERR(ESP_ERR_NOT_FOUND, bootloader_common_get_partition_description(&not_app_pos, &app_desc1));
}
TEST_CASE("esp_ota_get_running_partition points to correct address", "[spi_flash]")
{
const esp_partition_t *factory = esp_partition_find_first(ESP_PARTITION_TYPE_APP, ESP_PARTITION_SUBTYPE_ANY, "factory");
const esp_partition_t* part = esp_ota_get_running_partition();
ESP_LOGI("running bin", "0x%p", (void*)part->address);
TEST_ASSERT_EQUAL_HEX32(factory->address, part->address);
}

View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2021-2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -101,6 +101,24 @@ static void copy_app_partition_with_offset(esp_ota_handle_t update_handle, const
ESP_LOGI(TAG, "finish the copy process");
}
#if defined(CONFIG_BOOTLOADER_FACTORY_RESET) || defined(CONFIG_BOOTLOADER_APP_TEST)
/* @brief Copies partition from source partition to destination partition.
*
* Partitions can be of any types and subtypes.
* @param[in] dst_partition - Destination partition
* @param[in] src_partition - Source partition
*/
static void copy_partition(const esp_partition_t *dst_partition, const esp_partition_t *src_partition)
{
const void *partition_bin = NULL;
esp_partition_mmap_handle_t data_map;
TEST_ESP_OK(esp_partition_mmap(src_partition, 0, src_partition->size, ESP_PARTITION_MMAP_DATA, &partition_bin, &data_map));
TEST_ESP_OK(esp_partition_erase_range(dst_partition, 0, dst_partition->size));
TEST_ESP_OK(esp_partition_write(dst_partition, 0, (const void *)partition_bin, dst_partition->size));
esp_partition_munmap(data_map);
}
#endif
/* @brief Get the next partition of OTA for the update.
*
* @return The next partition of OTA(OTA0-15).
@@ -159,7 +177,7 @@ static void erase_ota_data(void)
{
const esp_partition_t *data_partition = esp_partition_find_first(ESP_PARTITION_TYPE_DATA, ESP_PARTITION_SUBTYPE_DATA_OTA, NULL);
TEST_ASSERT_NOT_EQUAL(NULL, data_partition);
TEST_ESP_OK(esp_partition_erase_range(data_partition, 0, 2 * data_partition->erase_size));
TEST_ESP_OK(esp_partition_erase_range(data_partition, 0, 2 * SPI_FLASH_SEC_SIZE));
}
/* @brief Reboots ESP using mode deep sleep. This mode guaranty that RTC_DATA_ATTR variables is not reset.
@@ -233,7 +251,7 @@ static void get_ota_data(const esp_partition_t *otadata_partition, esp_ota_selec
TEST_ASSERT_NOT_EQUAL(NULL, ota_select_map);
memcpy(ota_data_0, ota_select_map, sizeof(esp_ota_select_entry_t));
memcpy(ota_data_1, (uint8_t *)ota_select_map + otadata_partition->erase_size, sizeof(esp_ota_select_entry_t));
memcpy(ota_data_1, (uint8_t *)ota_select_map + SPI_FLASH_SEC_SIZE, sizeof(esp_ota_select_entry_t));
bootloader_munmap(ota_select_map);
}
}
@@ -246,7 +264,7 @@ static void get_ota_data(const esp_partition_t *otadata_partition, esp_ota_selec
*/
static void write_ota_data(const esp_partition_t *otadata_partition, esp_ota_select_entry_t *ota_data, int sec_id)
{
esp_partition_write(otadata_partition, otadata_partition->erase_size * sec_id, &ota_data[sec_id], sizeof(esp_ota_select_entry_t));
esp_partition_write(otadata_partition, SPI_FLASH_SEC_SIZE * sec_id, &ota_data[sec_id], sizeof(esp_ota_select_entry_t));
}
/* @brief Makes a corrupt of ota_data.
@@ -512,7 +530,7 @@ static void test_flow5(void)
ESP_LOGI(TAG, "Factory");
TEST_ASSERT_EQUAL(ESP_PARTITION_SUBTYPE_APP_FACTORY, cur_app->subtype);
set_output_pin(CONFIG_BOOTLOADER_NUM_PIN_APP_TEST);
esp_partition_copy(esp_partition_find_first(ESP_PARTITION_TYPE_APP, ESP_PARTITION_SUBTYPE_APP_TEST, NULL), 0, cur_app, 0, cur_app->size);
copy_partition(esp_partition_find_first(ESP_PARTITION_TYPE_APP, ESP_PARTITION_SUBTYPE_APP_TEST, NULL), cur_app);
esp_restart();
break;
case 3:
@@ -823,7 +841,8 @@ static void test_flow6(void)
// 3 Stage: run OTA0 -> check it -> erase OTA_DATA for next tests -> PASS
TEST_CASE_MULTIPLE_STAGES("Switching between factory, OTA0 using esp_ota_write_with_offset", "[app_update][timeout=90][reset=DEEPSLEEP_RESET, DEEPSLEEP_RESET]", start_test, test_flow6, test_flow6);
TEST_CASE("Test bootloader_common_get_sha256_of_partition returns ESP_ERR_IMAGE_INVALID when image is invalid", "[partitions]")
//IDF-5145
TEST_CASE("Test bootloader_common_get_sha256_of_partition returns ESP_ERR_IMAGE_INVALID when image is ivalid", "[partitions]")
{
const esp_partition_t *cur_app = esp_ota_get_running_partition();
ESP_LOGI(TAG, "copy current app to next part");

View File

@@ -7,3 +7,5 @@ factory, 0, 0, , 0xB0000
ota_0, 0, ota_0, , 0xB0000
ota_1, 0, ota_1, , 0xB0000
test, 0, test, , 0xB0000
# flash_test partition used for SPI flash tests, WL FAT tests, and SPIFFS tests
flash_test, data, fat, , 528K
1 # Special partition table for unit test app_update
7 ota_0, 0, ota_0, , 0xB0000
8 ota_1, 0, ota_1, , 0xB0000
9 test, 0, test, , 0xB0000
10 # flash_test partition used for SPI flash tests, WL FAT tests, and SPIFFS tests
11 flash_test, data, fat, , 528K

View File

@@ -7,3 +7,5 @@ factory, 0, 0, , 0x70000
ota_0, 0, ota_0, , 0x70000
ota_1, 0, ota_1, , 0x70000
test, 0, test, , 0x70000
# flash_test partition used for SPI flash tests, WL FAT tests, and SPIFFS tests
flash_test, data, fat, , 128K
1 # Special partition table for unit test app_update
7 ota_0, 0, ota_0, , 0x70000
8 ota_1, 0, ota_1, , 0x70000
9 test, 0, test, , 0x70000
10 # flash_test partition used for SPI flash tests, WL FAT tests, and SPIFFS tests
11 flash_test, data, fat, , 128K

View File

@@ -0,0 +1,32 @@
# SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
# SPDX-License-Identifier: Unlicense OR CC0-1.0
import re
import pytest
from pytest_embedded import Dut
DEFAULT_TIMEOUT = 20
TEST_SUBMENU_PATTERN_PYTEST = re.compile(rb'\s+\((\d+)\)\s+"([^"]+)"\r?\n')
def run_multiple_stages(dut: Dut, test_case_num: int, stages: int) -> None:
for stage in range(1, stages + 1):
dut.write(str(test_case_num))
dut.expect(TEST_SUBMENU_PATTERN_PYTEST, timeout=DEFAULT_TIMEOUT)
dut.write(str(stage))
if stage != stages:
dut.expect_exact('Press ENTER to see the list of tests.')
@pytest.mark.supported_targets
@pytest.mark.temp_skip_ci(targets=['esp32c6', 'esp32h2'], reason='c6/h2 support TBD')
@pytest.mark.generic
def test_app_update(dut: Dut) -> None:
extra_data = dut.parse_test_menu()
for test_case in extra_data:
if test_case.type != 'multi_stage':
dut.write(str(test_case.index))
else:
run_multiple_stages(dut, test_case.index, len(test_case.subcases))
dut.expect_unity_test_output(timeout=90)
dut.expect_exact("Enter next test, or 'enter' to see menu")

View File

@@ -0,0 +1,18 @@
# General options for additional checks
CONFIG_HEAP_POISONING_COMPREHENSIVE=y
CONFIG_COMPILER_WARN_WRITE_STRINGS=y
CONFIG_BOOTLOADER_LOG_LEVEL_WARN=y
CONFIG_FREERTOS_WATCHPOINT_END_OF_STACK=y
CONFIG_COMPILER_STACK_CHECK_MODE_STRONG=y
CONFIG_COMPILER_STACK_CHECK=y
CONFIG_ESP_TASK_WDT=n
CONFIG_ESPTOOLPY_FLASHSIZE_4MB=y
CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partition_table_unit_test_two_ota.csv"
CONFIG_PARTITION_TABLE_FILENAME="partition_table_unit_test_two_ota.csv"
CONFIG_PARTITION_TABLE_CUSTOM=y
CONFIG_PARTITION_TABLE_OFFSET=0x18000
CONFIG_BOOTLOADER_HOLD_TIME_GPIO=2
CONFIG_BOOTLOADER_OTA_DATA_ERASE=y

View File

@@ -0,0 +1,7 @@
CONFIG_IDF_TARGET="esp32"
CONFIG_BOOTLOADER_FACTORY_RESET=y
CONFIG_BOOTLOADER_APP_TEST=y
CONFIG_BOOTLOADER_DATA_FACTORY_RESET=""
CONFIG_BOOTLOADER_NUM_PIN_APP_TEST=32
CONFIG_BOOTLOADER_NUM_PIN_FACTORY_RESET=4
CONFIG_BOOTLOADER_HOLD_TIME_GPIO=2

View File

@@ -0,0 +1,5 @@
CONFIG_IDF_TARGET="esp32c2"
CONFIG_ESPTOOLPY_FLASHSIZE_2MB=y
CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partition_table_unit_test_two_ota_2m.csv"
CONFIG_PARTITION_TABLE_FILENAME="partition_table_unit_test_two_ota_2m.csv"
CONFIG_BOOTLOADER_NUM_PIN_APP_TEST=18

View File

@@ -0,0 +1,2 @@
CONFIG_IDF_TARGET="esp32c3"
CONFIG_BOOTLOADER_NUM_PIN_APP_TEST=18

View File

@@ -0,0 +1,2 @@
CONFIG_IDF_TARGET="esp32s2"
CONFIG_BOOTLOADER_NUM_PIN_APP_TEST=18

View File

@@ -1,12 +0,0 @@
# Documentation: .gitlab/ci/README.md#manifest-file-to-control-the-buildtest-apps
components/app_update/test_apps:
enable:
- if: CONFIG_NAME == "defaults" and IDF_TARGET != "linux"
- if: CONFIG_NAME == "xip_psram" and IDF_TARGET in ["esp32s2", "esp32s3", "esp32p4"]
# S2 doesn't have ROM for flash
- if: CONFIG_NAME == "xip_psram_with_rom_impl" and IDF_TARGET in ["esp32s3", "esp32p4"]
disable:
- if: IDF_TARGET in ["esp32c61"]
temporary: true
reason: target esp32c61 is not supported yet # TODO: [ESP32C61] IDF-9245

View File

@@ -1,2 +0,0 @@
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- |

View File

@@ -1,4 +0,0 @@
idf_component_register(SRC_DIRS "."
PRIV_INCLUDE_DIRS "."
PRIV_REQUIRES cmock test_utils app_update bootloader_support nvs_flash driver spi_flash esp_psram
WHOLE_ARCHIVE)

View File

@@ -1,52 +0,0 @@
# SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
# SPDX-License-Identifier: Unlicense OR CC0-1.0
import re
import pytest
from pytest_embedded import Dut
DEFAULT_TIMEOUT = 20
TEST_SUBMENU_PATTERN_PYTEST = re.compile(rb'\s+\((\d+)\)\s+"([^"]+)"\r?\n')
@pytest.mark.supported_targets
@pytest.mark.temp_skip_ci(targets=['esp32c5'], reason='C5 has not supported deep sleep') # TODO: [ESP32C5] IDF-8640, IDF-10317
@pytest.mark.generic
@pytest.mark.parametrize(
'config',
[
'defaults',
],
indirect=True,
)
def test_app_update(dut: Dut) -> None:
dut.run_all_single_board_cases(timeout=90)
@pytest.mark.supported_targets
# TODO: [ESP32C61] IDF-9245, IDF-10983
@pytest.mark.temp_skip_ci(targets=['esp32c61'], reason='C61 has not supported deep sleep')
@pytest.mark.generic
@pytest.mark.parametrize(
'config',
[
'xip_psram',
],
indirect=True,
)
def test_app_update_xip_psram(dut: Dut) -> None:
dut.run_all_single_board_cases(timeout=90)
@pytest.mark.supported_targets
@pytest.mark.temp_skip_ci(targets=['esp32c5'], reason='C5 has not supported deep sleep') # TODO: [ESP32C5] IDF-8640, IDF-10317
@pytest.mark.generic
@pytest.mark.parametrize(
'config',
[
'xip_psram_with_rom_impl',
],
indirect=True,
)
def test_app_update_xip_psram_rom_impl(dut: Dut) -> None:
dut.run_all_single_board_cases(timeout=90)

View File

@@ -1,2 +0,0 @@
CONFIG_SPIRAM=y
CONFIG_SPIRAM_XIP_FROM_PSRAM=y

View File

@@ -1,3 +0,0 @@
CONFIG_SPIRAM=y
CONFIG_SPIRAM_XIP_FROM_PSRAM=y
CONFIG_SPI_FLASH_ROM_IMPL=y

View File

@@ -1,22 +0,0 @@
# General options for additional checks
CONFIG_HEAP_POISONING_COMPREHENSIVE=y
CONFIG_COMPILER_WARN_WRITE_STRINGS=y
CONFIG_BOOTLOADER_LOG_LEVEL_WARN=y
CONFIG_FREERTOS_WATCHPOINT_END_OF_STACK=y
CONFIG_COMPILER_STACK_CHECK_MODE_STRONG=y
CONFIG_COMPILER_STACK_CHECK=y
CONFIG_ESP_TASK_WDT=n
CONFIG_ESPTOOLPY_FLASHSIZE_4MB=y
CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partition_table_unit_test_two_ota.csv"
CONFIG_PARTITION_TABLE_FILENAME="partition_table_unit_test_two_ota.csv"
CONFIG_PARTITION_TABLE_CUSTOM=y
CONFIG_PARTITION_TABLE_OFFSET=0x18000
CONFIG_BOOTLOADER_FACTORY_RESET=y
CONFIG_BOOTLOADER_APP_TEST=y
CONFIG_BOOTLOADER_DATA_FACTORY_RESET=""
CONFIG_BOOTLOADER_HOLD_TIME_GPIO=2
CONFIG_BOOTLOADER_OTA_DATA_ERASE=y

View File

@@ -1,3 +0,0 @@
CONFIG_IDF_TARGET="esp32"
CONFIG_BOOTLOADER_NUM_PIN_APP_TEST=32
CONFIG_BOOTLOADER_NUM_PIN_FACTORY_RESET=4

View File

@@ -1,6 +0,0 @@
CONFIG_IDF_TARGET="esp32c2"
CONFIG_ESPTOOLPY_FLASHSIZE_2MB=y
CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partition_table_unit_test_two_ota_2m.csv"
CONFIG_PARTITION_TABLE_FILENAME="partition_table_unit_test_two_ota_2m.csv"
CONFIG_BOOTLOADER_NUM_PIN_APP_TEST=18
CONFIG_BOOTLOADER_NUM_PIN_FACTORY_RESET=4

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@@ -1,3 +0,0 @@
CONFIG_IDF_TARGET="esp32c3"
CONFIG_BOOTLOADER_NUM_PIN_APP_TEST=18
CONFIG_BOOTLOADER_NUM_PIN_FACTORY_RESET=4

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@@ -1,3 +0,0 @@
CONFIG_IDF_TARGET="esp32c6"
CONFIG_BOOTLOADER_NUM_PIN_APP_TEST=18
CONFIG_BOOTLOADER_NUM_PIN_FACTORY_RESET=4

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@@ -1,3 +0,0 @@
CONFIG_IDF_TARGET="esp32h2"
CONFIG_BOOTLOADER_NUM_PIN_APP_TEST=22
CONFIG_BOOTLOADER_NUM_PIN_FACTORY_RESET=4

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@@ -1,3 +0,0 @@
CONFIG_IDF_TARGET="esp32p4"
CONFIG_BOOTLOADER_NUM_PIN_APP_TEST=18
CONFIG_BOOTLOADER_NUM_PIN_FACTORY_RESET=19

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@@ -1,3 +0,0 @@
CONFIG_IDF_TARGET="esp32s2"
CONFIG_BOOTLOADER_NUM_PIN_APP_TEST=18
CONFIG_BOOTLOADER_NUM_PIN_FACTORY_RESET=4

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@@ -1,3 +0,0 @@
CONFIG_IDF_TARGET="esp32s3"
CONFIG_BOOTLOADER_NUM_PIN_APP_TEST=18
CONFIG_BOOTLOADER_NUM_PIN_FACTORY_RESET=4

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@@ -1,34 +0,0 @@
menu "Log"
choice BOOTLOADER_LOG_LEVEL
bool "Bootloader log verbosity"
default BOOTLOADER_LOG_LEVEL_INFO
help
Specify how much output to see in bootloader logs.
config BOOTLOADER_LOG_LEVEL_NONE
bool "No output"
config BOOTLOADER_LOG_LEVEL_ERROR
bool "Error"
config BOOTLOADER_LOG_LEVEL_WARN
bool "Warning"
config BOOTLOADER_LOG_LEVEL_INFO
bool "Info"
config BOOTLOADER_LOG_LEVEL_DEBUG
bool "Debug"
config BOOTLOADER_LOG_LEVEL_VERBOSE
bool "Verbose"
endchoice
config BOOTLOADER_LOG_LEVEL
int
default 0 if BOOTLOADER_LOG_LEVEL_NONE
default 1 if BOOTLOADER_LOG_LEVEL_ERROR
default 2 if BOOTLOADER_LOG_LEVEL_WARN
default 3 if BOOTLOADER_LOG_LEVEL_INFO
default 4 if BOOTLOADER_LOG_LEVEL_DEBUG
default 5 if BOOTLOADER_LOG_LEVEL_VERBOSE
orsource "Kconfig.log.format"
endmenu

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@@ -1,38 +0,0 @@
menu "Format"
config BOOTLOADER_LOG_COLORS
bool "Color"
default n
help
Use ANSI terminal colors in log output
Enable ANSI terminal color codes.
In order to view these, your terminal program must support ANSI color codes.
choice BOOTLOADER_LOG_TIMESTAMP_SOURCE
prompt "Timestamp"
default BOOTLOADER_LOG_TIMESTAMP_SOURCE_CPU_TICKS
help
Choose what sort of timestamp is displayed in the log output:
- "None" - The log will only contain the actual log messages themselves
without any time-related information. Avoiding timestamps can help conserve
processing power and memory. It might useful when you
perform log analysis or debugging, sometimes it's more straightforward
to work with logs that lack timestamps, especially if the time of occurrence
is not critical for understanding the issues.
"I log_test: info message"
- "Milliseconds since boot" is calculated from the RTOS tick count multiplied
by the tick period. This time will reset after a software reboot.
"I (112500) log_test: info message"
config BOOTLOADER_LOG_TIMESTAMP_SOURCE_NONE
bool "None"
depends on NO_SYMBOL # hide it now, turn it on final MR
config BOOTLOADER_LOG_TIMESTAMP_SOURCE_CPU_TICKS
bool "Milliseconds Since Boot"
endchoice # BOOTLOADER_LOG_TIMESTAMP_SOURCE
endmenu

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@@ -20,14 +20,14 @@ menu "Bootloader config"
This option sets compiler optimization level (gcc -O argument)
for the bootloader.
- The default "Size" setting will add the -Os (-Oz with clang) flag to CFLAGS.
- The default "Size" setting will add the -0s flag to CFLAGS.
- The "Debug" setting will add the -Og flag to CFLAGS.
- The "Performance" setting will add the -O2 flag to CFLAGS.
Note that custom optimization levels may be unsupported.
config BOOTLOADER_COMPILER_OPTIMIZATION_SIZE
bool "Size (-Os with GCC, -Oz with Clang)"
bool "Size (-Os)"
config BOOTLOADER_COMPILER_OPTIMIZATION_DEBUG
bool "Debug (-Og)"
config BOOTLOADER_COMPILER_OPTIMIZATION_PERF
@@ -38,7 +38,34 @@ menu "Bootloader config"
endchoice
orsource "Kconfig.log"
choice BOOTLOADER_LOG_LEVEL
bool "Bootloader log verbosity"
default BOOTLOADER_LOG_LEVEL_INFO
help
Specify how much output to see in bootloader logs.
config BOOTLOADER_LOG_LEVEL_NONE
bool "No output"
config BOOTLOADER_LOG_LEVEL_ERROR
bool "Error"
config BOOTLOADER_LOG_LEVEL_WARN
bool "Warning"
config BOOTLOADER_LOG_LEVEL_INFO
bool "Info"
config BOOTLOADER_LOG_LEVEL_DEBUG
bool "Debug"
config BOOTLOADER_LOG_LEVEL_VERBOSE
bool "Verbose"
endchoice
config BOOTLOADER_LOG_LEVEL
int
default 0 if BOOTLOADER_LOG_LEVEL_NONE
default 1 if BOOTLOADER_LOG_LEVEL_ERROR
default 2 if BOOTLOADER_LOG_LEVEL_WARN
default 3 if BOOTLOADER_LOG_LEVEL_INFO
default 4 if BOOTLOADER_LOG_LEVEL_DEBUG
default 5 if BOOTLOADER_LOG_LEVEL_VERBOSE
menu "Serial Flash Configurations"
config BOOTLOADER_SPI_CUSTOM_WP_PIN
@@ -100,15 +127,9 @@ menu "Bootloader config"
help
This is a helper config for 32bits address flash. Invisible for users.
config BOOTLOADER_FLASH_NEEDS_32BIT_ADDR_QUAD_FLASH
bool
default y if BOOTLOADER_FLASH_NEEDS_32BIT_FEAT && SOC_SPI_MEM_SUPPORT_CACHE_32BIT_ADDR_MAP
help
This is a helper config for 32bits address quad flash. Invisible for users.
config BOOTLOADER_CACHE_32BIT_ADDR_QUAD_FLASH
bool "Enable cache access to 32-bit-address (over 16MB) range of SPI Flash (READ DOCS FIRST)"
depends on BOOTLOADER_FLASH_NEEDS_32BIT_ADDR_QUAD_FLASH && IDF_EXPERIMENTAL_FEATURES
depends on BOOTLOADER_FLASH_NEEDS_32BIT_FEAT && IDF_TARGET_ESP32S3 && IDF_EXPERIMENTAL_FEATURES
default n
help
Enabling this option allows the CPU to access 32-bit-address flash beyond 16M range.
@@ -145,7 +166,7 @@ menu "Bootloader config"
config BOOTLOADER_FACTORY_RESET
bool "GPIO triggers factory reset"
default n
default N
select BOOTLOADER_RESERVE_RTC_MEM if SOC_RTC_FAST_MEM_SUPPORTED
help
Allows to reset the device to factory settings:
@@ -158,23 +179,13 @@ menu "Bootloader config"
int "Number of the GPIO input for factory reset"
depends on BOOTLOADER_FACTORY_RESET
range 0 39 if IDF_TARGET_ESP32
range 0 46 if IDF_TARGET_ESP32S2
range 0 48 if IDF_TARGET_ESP32S3
range 0 20 if IDF_TARGET_ESP32C2
range 0 21 if IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32C61
range 0 28 if IDF_TARGET_ESP32C5
range 0 30 if IDF_TARGET_ESP32C6
range 0 27 if IDF_TARGET_ESP32H2
range 0 54 if IDF_TARGET_ESP32P4
range 0 44 if IDF_TARGET_ESP32S2
default 4
help
The selected GPIO will be configured as an input with internal pull-up enabled. To trigger a factory
The selected GPIO will be configured as an input with internal pull-up enabled (note that on some SoCs.
not all pins have an internal pull-up, consult the hardware datasheet for details.) To trigger a factory
reset, this GPIO must be held high or low (as configured) on startup.
Note that on some SoCs not all pins have an internal pull-up and certain pins are already
used by ROM bootloader as bootstrapping. Refer to the technical reference manual for further
details on the selected SoC.
choice BOOTLOADER_FACTORY_RESET_PIN_LEVEL
bool "Factory reset GPIO level"
depends on BOOTLOADER_FACTORY_RESET
@@ -210,7 +221,7 @@ menu "Bootloader config"
config BOOTLOADER_APP_TEST
bool "GPIO triggers boot from test app partition"
default n
default N
depends on !BOOTLOADER_APP_ANTI_ROLLBACK
help
Allows to run the test app from "TEST" partition.
@@ -220,25 +231,14 @@ menu "Bootloader config"
config BOOTLOADER_NUM_PIN_APP_TEST
int "Number of the GPIO input to boot TEST partition"
depends on BOOTLOADER_APP_TEST
range 0 39 if IDF_TARGET_ESP32
range 0 46 if IDF_TARGET_ESP32S2
range 0 48 if IDF_TARGET_ESP32S3
range 0 20 if IDF_TARGET_ESP32C2
range 0 21 if IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32C61
range 0 28 if IDF_TARGET_ESP32C5
range 0 30 if IDF_TARGET_ESP32C6
range 0 27 if IDF_TARGET_ESP32H2
range 0 54 if IDF_TARGET_ESP32P4
range 0 39
default 18
help
The selected GPIO will be configured as an input with internal pull-up enabled.
To trigger a test app, this GPIO must be pulled low on reset.
After the GPIO input is deactivated and the device reboots, the old application will boot.
(factory or OTA[x]).
Note that on some SoCs not all pins have an internal pull-up and certain pins are already
used by ROM bootloader as bootstrapping. Refer to the technical reference manual for further
details on the selected SoC.
Note that GPIO34-39 do not have an internal pullup and an external one must be provided.
choice BOOTLOADER_APP_TEST_PIN_LEVEL
bool "App test GPIO level"
@@ -269,8 +269,6 @@ menu "Bootloader config"
Protects the unmapped memory regions of the entire address space from unintended accesses.
This will ensure that an exception will be triggered whenever the CPU performs a memory
operation on unmapped regions of the address space.
NOTE: Disabling this config on some targets (ESP32-C6, ESP32-H2, ESP32-C5) would not generate
an exception when reading from or writing to 0x0.
config BOOTLOADER_WDT_ENABLE
bool "Use RTC watchdog in start code"
@@ -383,9 +381,9 @@ menu "Bootloader config"
# options, allowing to turn on "allow insecure options" and have secure boot with
# "skip validation when existing deep sleep". Keeping this to avoid a breaking change,
# but - as noted in help - it invalidates the integrity of Secure Boot checks
depends on ((SECURE_BOOT && SECURE_BOOT_INSECURE) || !SECURE_BOOT)
depends on SOC_RTC_FAST_MEM_SUPPORTED && ((SECURE_BOOT && SECURE_BOOT_INSECURE) || !SECURE_BOOT)
default n
select BOOTLOADER_RESERVE_RTC_MEM if SOC_RTC_FAST_MEM_SUPPORTED
select BOOTLOADER_RESERVE_RTC_MEM
help
This option disables the normal validation of an image coming out of
deep sleep (checksums, SHA256, and signature). This is a trade-off
@@ -784,7 +782,7 @@ menu "Security features"
config SECURE_BOOT_ENABLE_AGGRESSIVE_KEY_REVOKE
bool "Enable Aggressive key revoke strategy"
depends on SECURE_BOOT && SOC_SUPPORT_SECURE_BOOT_REVOKE_KEY
default n
default N
help
If this option is set, ROM bootloader will revoke the public key digest burned in efuse block
if it fails to verify the signature of software bootloader with it.
@@ -797,37 +795,10 @@ menu "Security features"
This can lead to permanent bricking of the device, in case all keys are revoked
because of signature verification failure.
config SECURE_BOOT_V2_ALLOW_EFUSE_RD_DIS
bool "Do not disable the ability to further read protect eFuses"
depends on SECURE_BOOT_V2_ENABLED
default n
help
If not set (default, recommended), on first boot the bootloader will burn the WR_DIS_RD_DIS
efuse when Secure Boot is enabled. This prevents any more efuses from being read protected.
If this option is set, it will remain possible to write the EFUSE_RD_DIS efuse field after Secure
Boot is enabled. This may allow an attacker to read-protect the BLK2 efuse (for ESP32) and
BLOCK4-BLOCK10 (i.e. BLOCK_KEY0-BLOCK_KEY5)(for other chips) holding the secure boot public key digest,
causing an immediate denial of service and possibly allowing an additional fault injection attack to
bypass the signature protection.
The option must be set when you need to program any read-protected key type into the efuses,
e.g., HMAC, ECDSA etc. after secure boot has already been enabled on the device.
Please refer to secure boot V2 documentation guide for more details.
NOTE: Once a BLOCK is read-protected, the application will read all zeros from that block
NOTE: If "UART ROM download mode (Permanently disabled (recommended))" or
"UART ROM download mode (Permanently switch to Secure mode (recommended))" is set,
then it is __NOT__ possible to read/write efuses using espefuse.py utility.
However, efuse can be read/written from the application
Please refer to the Secure Boot V2 documentation guide for more information.
config SECURE_BOOT_FLASH_BOOTLOADER_DEFAULT
bool "Flash bootloader along with other artifacts when using the default flash command"
depends on SECURE_BOOT_V2_ENABLED && SECURE_BOOT_BUILD_SIGNED_BINARIES
default n
default N
help
When Secure Boot V2 is enabled, by default the bootloader is not flashed along with other artifacts
like the application and the partition table images, i.e. bootloader has to be separately flashed
@@ -867,7 +838,7 @@ menu "Security features"
config SECURE_BOOT_INSECURE
bool "Allow potentially insecure options"
depends on SECURE_BOOT
default n
default N
help
You can disable some of the default protections offered by secure boot, in order to enable testing or a
custom combination of security features.
@@ -878,7 +849,7 @@ menu "Security features"
config SECURE_FLASH_ENC_ENABLED
bool "Enable flash encryption on boot (READ DOCS FIRST)"
default n
default N
select SPI_FLASH_ENABLE_ENCRYPTED_READ_WRITE
help
If this option is set, flash contents will be encrypted by the bootloader on first boot.
@@ -965,7 +936,7 @@ menu "Security features"
config SECURE_BOOT_ALLOW_ROM_BASIC
bool "Leave ROM BASIC Interpreter available on reset"
depends on (SECURE_BOOT_INSECURE || SECURE_FLASH_ENCRYPTION_MODE_DEVELOPMENT) && IDF_TARGET_ESP32
default n
default N
help
By default, the BASIC ROM Console starts on reset if no valid bootloader is
read from the flash.
@@ -980,7 +951,7 @@ menu "Security features"
bool "Allow JTAG Debugging"
depends on SECURE_BOOT_INSECURE || SECURE_FLASH_ENCRYPTION_MODE_DEVELOPMENT
select SECURE_FLASH_SKIP_WRITE_PROTECTION_CACHE if SECURE_FLASH_HAS_WRITE_PROTECTION_CACHE
default n
default N
help
If not set (default), the bootloader will permanently disable JTAG (across entire chip) on first boot
when either secure boot or flash encryption is enabled.
@@ -1004,10 +975,30 @@ menu "Security features"
image to this length. It is generally not recommended to set this option, unless you have a legacy
partitioning scheme which doesn't support 64KB aligned partition lengths.
config SECURE_BOOT_V2_ALLOW_EFUSE_RD_DIS
bool "Allow additional read protecting of efuses"
depends on SECURE_BOOT_INSECURE && SECURE_BOOT_V2_ENABLED
help
If not set (default, recommended), on first boot the bootloader will burn the WR_DIS_RD_DIS
efuse when Secure Boot is enabled. This prevents any more efuses from being read protected.
If this option is set, it will remain possible to write the EFUSE_RD_DIS efuse field after Secure
Boot is enabled. This may allow an attacker to read-protect the BLK2 efuse (for ESP32) and
BLOCK4-BLOCK10 (i.e. BLOCK_KEY0-BLOCK_KEY5)(for other chips) holding the public key digest, causing an
immediate denial of service and possibly allowing an additional fault injection attack to
bypass the signature protection.
NOTE: Once a BLOCK is read-protected, the application will read all zeros from that block
NOTE: If "UART ROM download mode (Permanently disabled (recommended))" or
"UART ROM download mode (Permanently switch to Secure mode (recommended))" is set,
then it is __NOT__ possible to read/write efuses using espefuse.py utility.
However, efuse can be read/written from the application
config SECURE_BOOT_ALLOW_UNUSED_DIGEST_SLOTS
bool "Leave unused digest slots available (not revoke)"
depends on SECURE_BOOT_INSECURE && SOC_EFUSE_REVOKE_BOOT_KEY_DIGESTS
default n
default N
help
If not set (default), during startup in the app all unused digest slots will be revoked.
To revoke unused slot will be called esp_efuse_set_digest_revoke(num_digest) for each digest.
@@ -1026,7 +1017,7 @@ menu "Security features"
bool "Leave UART bootloader encryption enabled"
depends on SECURE_FLASH_ENCRYPTION_MODE_DEVELOPMENT
select SECURE_FLASH_SKIP_WRITE_PROTECTION_CACHE if SECURE_FLASH_HAS_WRITE_PROTECTION_CACHE
default n
default N
help
If not set (default), the bootloader will permanently disable UART bootloader encryption access on
first boot. If set, the UART bootloader will still be able to access hardware encryption.
@@ -1036,7 +1027,7 @@ menu "Security features"
config SECURE_FLASH_UART_BOOTLOADER_ALLOW_DEC
bool "Leave UART bootloader decryption enabled"
depends on SECURE_FLASH_ENCRYPTION_MODE_DEVELOPMENT && IDF_TARGET_ESP32
default n
default N
help
If not set (default), the bootloader will permanently disable UART bootloader decryption access on
first boot. If set, the UART bootloader will still be able to access hardware decryption.
@@ -1048,7 +1039,7 @@ menu "Security features"
bool "Leave UART bootloader flash cache enabled"
depends on SECURE_FLASH_ENCRYPTION_MODE_DEVELOPMENT && \
(IDF_TARGET_ESP32 || SOC_EFUSE_DIS_DOWNLOAD_ICACHE || SOC_EFUSE_DIS_DOWNLOAD_DCACHE) # NOERROR
default n
default N
select SECURE_FLASH_SKIP_WRITE_PROTECTION_CACHE if SECURE_FLASH_HAS_WRITE_PROTECTION_CACHE
help
If not set (default), the bootloader will permanently disable UART bootloader flash cache access on
@@ -1059,7 +1050,7 @@ menu "Security features"
config SECURE_FLASH_REQUIRE_ALREADY_ENABLED
bool "Require flash encryption to be already enabled"
depends on SECURE_FLASH_ENCRYPTION_MODE_DEVELOPMENT
default n
default N
help
If not set (default), and flash encryption is not yet enabled in eFuses, the 2nd stage bootloader
will enable flash encryption: generate the flash encryption key and program eFuses.
@@ -1107,7 +1098,7 @@ menu "Security features"
endmenu # Potentially Insecure
config SECURE_FLASH_ENCRYPT_ONLY_IMAGE_LEN_IN_APP_PART
bool "Encrypt contents upto app image length in app partition"
bool "Encrypt only the app image that is present in the partition of type app"
depends on SECURE_FLASH_ENC_ENABLED && !SECURE_FLASH_REQUIRE_ALREADY_ENABLED
default y
help
@@ -1134,45 +1125,6 @@ menu "Security features"
If not set, the app does not care if the flash encryption eFuse bit is set or not.
config SECURE_FLASH_PSEUDO_ROUND_FUNC
bool "Permanently enable XTS-AES's pseudo rounds function"
default y if SECURE_FLASH_ENCRYPTION_MODE_RELEASE
default n
depends on SECURE_FLASH_ENC_ENABLED && SOC_FLASH_ENCRYPTION_XTS_AES_SUPPORT_PSEUDO_ROUND
help
If set (default), the bootloader will permanently enable the XTS-AES peripheral's pseudo rounds function.
Note: Enabling this config would burn an efuse.
choice SECURE_FLASH_PSEUDO_ROUND_FUNC_STRENGTH
prompt "Strength of the pseudo rounds function"
depends on SECURE_FLASH_PSEUDO_ROUND_FUNC
default SECURE_FLASH_PSEUDO_ROUND_FUNC_STRENGTH_LOW
help
The strength of the pseudo rounds functions can be configured to low, medium and high,
each denoting the values that would be stored in the efuses field.
By default the value to set to low.
You can configure the strength of the pseudo rounds functions according to your use cases,
for example, increasing the strength would provide higher security but would slow down the
flash encryption/decryption operations.
For more info regarding the performance impact, please checkout the pseudo round function section of the
security guide documentation.
config SECURE_FLASH_PSEUDO_ROUND_FUNC_STRENGTH_LOW
bool "Low"
config SECURE_FLASH_PSEUDO_ROUND_FUNC_STRENGTH_MEDIUM
bool "Medium"
config SECURE_FLASH_PSEUDO_ROUND_FUNC_STRENGTH_HIGH
bool "High"
endchoice
config SECURE_FLASH_PSEUDO_ROUND_FUNC_STRENGTH
int
default 1 if SECURE_FLASH_PSEUDO_ROUND_FUNC_STRENGTH_LOW
default 2 if SECURE_FLASH_PSEUDO_ROUND_FUNC_STRENGTH_MEDIUM
default 3 if SECURE_FLASH_PSEUDO_ROUND_FUNC_STRENGTH_HIGH
config SECURE_ROM_DL_MODE_ENABLED
bool
default y if SOC_SUPPORTS_SECURE_DL_MODE && !SECURE_FLASH_ENCRYPTION_MODE_DEVELOPMENT
@@ -1224,7 +1176,7 @@ menu "Security features"
It is also possible to enable secure download mode at runtime by calling
esp_efuse_enable_rom_secure_download_mode()
Note: Secure Download mode is not available for ESP32.
Note: Secure Download mode is not available for ESP32 (includes revisions till ECO3).
config SECURE_INSECURE_ALLOW_DL_MODE
bool "UART ROM download mode (Enabled (not recommended))"

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@@ -30,6 +30,12 @@ idf_build_get_property(project_dir PROJECT_DIR)
if(CONFIG_SECURE_SIGNED_APPS)
add_custom_target(gen_secure_boot_keys)
if(CONFIG_SECURE_SIGNED_APPS_ECDSA_SCHEME)
set(secure_apps_signing_version "1")
elseif(CONFIG_SECURE_SIGNED_APPS_RSA_SCHEME OR CONFIG_SECURE_SIGNED_APPS_ECDSA_V2_SCHEME)
set(secure_apps_signing_version "2")
endif()
if(CONFIG_SECURE_BOOT_V1_ENABLED)
# Check that the configuration is sane
if((CONFIG_SECURE_BOOTLOADER_REFLASHABLE AND CONFIG_SECURE_BOOTLOADER_ONE_TIME_FLASH) OR
@@ -59,10 +65,11 @@ if(CONFIG_SECURE_SIGNED_APPS)
# If the signing key is not found, create a phony gen_secure_boot_signing_key target that
# fails the build. fail_at_build_time causes a cmake run next time
# (to pick up a new signing key if one exists, etc.)
if(CONFIG_SECURE_SIGNED_APPS_RSA_SCHEME OR CONFIG_SECURE_SIGNED_APPS_ECDSA_SCHEME)
if(CONFIG_SECURE_SIGNED_APPS_RSA_SCHEME)
fail_at_build_time(gen_secure_boot_signing_key
"Secure Boot Signing Key ${CONFIG_SECURE_BOOT_SIGNING_KEY} does not exist. Generate using:"
"\tidf.py secure-generate-signing-key ${CONFIG_SECURE_BOOT_SIGNING_KEY}")
"\tespsecure.py generate_signing_key --version ${secure_apps_signing_version} \
${CONFIG_SECURE_BOOT_SIGNING_KEY}")
else()
if(CONFIG_SECURE_BOOT_ECDSA_KEY_LEN_192_BITS)
set(scheme "ecdsa192")
@@ -71,7 +78,8 @@ if(CONFIG_SECURE_SIGNED_APPS)
endif()
fail_at_build_time(gen_secure_boot_signing_key
"Secure Boot Signing Key ${CONFIG_SECURE_BOOT_SIGNING_KEY} does not exist. Generate using:"
"\tidf.py secure-generate-signing-key --scheme ${scheme} ${CONFIG_SECURE_BOOT_SIGNING_KEY}")
"\tespsecure.py generate_signing_key --version ${secure_apps_signing_version} \
--scheme ${scheme} ${CONFIG_SECURE_BOOT_SIGNING_KEY}")
endif()
else()
add_custom_target(gen_secure_boot_signing_key)
@@ -116,7 +124,7 @@ idf_build_get_property(sdkconfig SDKCONFIG)
idf_build_get_property(python PYTHON)
idf_build_get_property(extra_cmake_args EXTRA_CMAKE_ARGS)
# We cannot pass lists are a parameter to the external project without modifying the ';' separator
# We cannot pass lists are a parameter to the external project without modifying the ';' spearator
string(REPLACE ";" "|" BOOTLOADER_IGNORE_EXTRA_COMPONENT "${BOOTLOADER_IGNORE_EXTRA_COMPONENT}")
externalproject_add(bootloader

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@@ -58,7 +58,6 @@ foreach(component ${proj_components})
endforeach()
set(BOOTLOADER_BUILD 1)
set(NON_OS_BUILD 1)
include("${IDF_PATH}/tools/cmake/project.cmake")
set(common_req log esp_rom esp_common esp_hw_support newlib)
idf_build_set_property(EXTRA_COMPONENT_EXCLUDE_DIRS "${EXTRA_COMPONENT_EXCLUDE_DIRS}")
@@ -67,7 +66,6 @@ idf_build_set_property(__OUTPUT_SDKCONFIG 0)
project(bootloader)
idf_build_set_property(COMPILE_DEFINITIONS "BOOTLOADER_BUILD=1" APPEND)
idf_build_set_property(COMPILE_DEFINITIONS "NON_OS_BUILD=1" APPEND)
idf_build_set_property(COMPILE_OPTIONS "-fno-stack-protector" APPEND)
idf_component_get_property(main_args esptool_py FLASH_ARGS)
@@ -209,7 +207,7 @@ elseif(CONFIG_SECURE_BOOTLOADER_REFLASHABLE)
COMMAND ${CMAKE_COMMAND} -E echo
"* After first boot, only re-flashes of this kind (with same key) will be accepted."
COMMAND ${CMAKE_COMMAND} -E echo
"* Not recommended to reuse the same secure boot keyfile on multiple production devices."
"* Not recommended to re-use the same secure boot keyfile on multiple production devices."
DEPENDS gen_secure_bootloader_key gen_bootloader_digest_bin
VERBATIM)
elseif(

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@@ -1,7 +1,13 @@
idf_component_register(SRCS "bootloader_start.c"
REQUIRES bootloader bootloader_support)
set(target_folder "${target}")
if(CONFIG_IDF_TARGET_ESP32C5_BETA3_VERSION)
set(target_folder "esp32c5/beta3")
elseif(CONFIG_IDF_TARGET_ESP32C5_MP_VERSION)
set(target_folder "esp32c5/mp")
else()
set(target_folder "${target}")
endif()
idf_build_get_property(target IDF_TARGET)
set(scripts "ld/${target_folder}/bootloader.ld")

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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -119,7 +119,6 @@ SECTIONS
.dram0.data : ALIGN(0x10)
{
*(.dram1 .dram1.*) /* catch stray DRAM_ATTR */
*(.data)
*(.data.*)
*(.gnu.linkonce.d.*)
@@ -145,7 +144,6 @@ SECTIONS
*(.gcc_except_table)
*(.gnu.linkonce.e.*)
*(.gnu.version_r)
*(.eh_frame_hdr)
*(.eh_frame)
. = (. + 3) & ~ 3;
/* C++ constructor and destructor tables, properly ordered: */
@@ -210,55 +208,12 @@ SECTIONS
*/
.xt.prop 0 :
{
KEEP (*(.xt.prop .xt.prop.* .gnu.linkonce.prop.*))
KEEP (*(.xt.prop .gnu.linkonce.prop.*))
}
.xt.lit 0 :
{
KEEP (*(.xt.lit .xt.lit.* .gnu.linkonce.p.*))
KEEP (*(.xt.lit .gnu.linkonce.p.*))
}
.xtensa.info 0: { *(.xtensa.info) }
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
.debug_pubtypes 0 : { *(.debug_pubtypes) }
/* DWARF 3 */
.debug_ranges 0 : { *(.debug_ranges) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
/* GNU DWARF 2 extensions */
.debug_gnu_pubnames 0 : { *(.debug_gnu_pubnames) }
.debug_gnu_pubtypes 0 : { *(.debug_gnu_pubtypes) }
/* DWARF 4 */
.debug_types 0 : { *(.debug_types) }
/* DWARF 5 */
.debug_addr 0 : { *(.debug_addr) }
.debug_line_str 0 : { *(.debug_line_str) }
.debug_loclists 0 : { *(.debug_loclists) }
.debug_macro 0 : { *(.debug_macro) }
.debug_names 0 : { *(.debug_names) }
.debug_rnglists 0 : { *(.debug_rnglists) }
.debug_str_offsets 0 : { *(.debug_str_offsets) }
.comment 0 : { *(.comment) }
.note.GNU-stack 0: { *(.note.GNU-stack) }
}

View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -140,7 +140,6 @@ SECTIONS
.dram0.data :
{
*(.dram1 .dram1.*) /* catch stray DRAM_ATTR */
*(.data)
*(.data.*)
*(.gnu.linkonce.d.*)
@@ -166,7 +165,6 @@ SECTIONS
*(.gcc_except_table)
*(.gnu.linkonce.e.*)
*(.gnu.version_r)
*(.eh_frame_hdr)
*(.eh_frame)
. = (. + 3) & ~ 3;
/* C++ constructor and destructor tables, properly ordered: */
@@ -220,57 +218,6 @@ SECTIONS
_etext = .;
} > iram_seg
.riscv.attributes 0: { *(.riscv.attributes) }
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
.debug_pubtypes 0 : { *(.debug_pubtypes) }
/* DWARF 3 */
.debug_ranges 0 : { *(.debug_ranges) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
/* GNU DWARF 2 extensions */
.debug_gnu_pubnames 0 : { *(.debug_gnu_pubnames) }
.debug_gnu_pubtypes 0 : { *(.debug_gnu_pubtypes) }
/* DWARF 4 */
.debug_types 0 : { *(.debug_types) }
/* DWARF 5 */
.debug_addr 0 : { *(.debug_addr) }
.debug_line_str 0 : { *(.debug_line_str) }
.debug_loclists 0 : { *(.debug_loclists) }
.debug_macro 0 : { *(.debug_macro) }
.debug_names 0 : { *(.debug_names) }
.debug_rnglists 0 : { *(.debug_rnglists) }
.debug_str_offsets 0 : { *(.debug_str_offsets) }
.comment 0 : { *(.comment) }
.note.GNU-stack 0: { *(.note.GNU-stack) }
/**
* Discarding .rela.* sections results in the following mapping:
* .rela.text.* -> .text.*
* .rela.data.* -> .data.*
* And so forth...
*/
/DISCARD/ : { *(.rela.*) }
}
/**

View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -140,7 +140,6 @@ SECTIONS
.dram0.data :
{
*(.dram1 .dram1.*) /* catch stray DRAM_ATTR */
*(.data)
*(.data.*)
*(.gnu.linkonce.d.*)
@@ -166,7 +165,6 @@ SECTIONS
*(.gcc_except_table)
*(.gnu.linkonce.e.*)
*(.gnu.version_r)
*(.eh_frame_hdr)
*(.eh_frame)
. = (. + 3) & ~ 3;
/* C++ constructor and destructor tables, properly ordered: */
@@ -220,58 +218,6 @@ SECTIONS
_etext = .;
} > iram_seg
.riscv.attributes 0: { *(.riscv.attributes) }
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
.debug_pubtypes 0 : { *(.debug_pubtypes) }
/* DWARF 3 */
.debug_ranges 0 : { *(.debug_ranges) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
/* GNU DWARF 2 extensions */
.debug_gnu_pubnames 0 : { *(.debug_gnu_pubnames) }
.debug_gnu_pubtypes 0 : { *(.debug_gnu_pubtypes) }
/* DWARF 4 */
.debug_types 0 : { *(.debug_types) }
/* DWARF 5 */
.debug_addr 0 : { *(.debug_addr) }
.debug_line_str 0 : { *(.debug_line_str) }
.debug_loclists 0 : { *(.debug_loclists) }
.debug_macro 0 : { *(.debug_macro) }
.debug_names 0 : { *(.debug_names) }
.debug_rnglists 0 : { *(.debug_rnglists) }
.debug_str_offsets 0 : { *(.debug_str_offsets) }
.comment 0 : { *(.comment) }
.note.GNU-stack 0: { *(.note.GNU-stack) }
/**
* Discarding .rela.* sections results in the following mapping:
* .rela.text.* -> .text.*
* .rela.data.* -> .data.*
* And so forth...
*/
/DISCARD/ : { *(.rela.*) }
}

View File

@@ -0,0 +1,256 @@
/*
* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
/** Simplified memory map for the bootloader.
* Make sure the bootloader can load into main memory without overwriting itself.
*
* TODO: [ESP32C5] IDF-9358 Check this file whether need update for MP ROM
* ESP32-C5 ROM static data usage is as follows:
* - 0x4086b2b8 - 0x4087cbc0: Shared buffers, used in UART/USB/SPI download mode only
* - 0x4087cbc0 - 0x4087ebc0: PRO CPU stack, can be reclaimed as heap after RTOS startup
* - 0x4087ebc0 - 0x40880000: ROM .bss and .data (not easily reclaimable)
*
* The 2nd stage bootloader can take space up to the end of ROM shared
* buffers area (0x4087cbc0).
*/
/* We consider 0x4087cbc0 to be the last usable address for 2nd stage bootloader stack overhead, dram_seg,
* and work out iram_seg and iram_loader_seg addresses from there, backwards.
*/
/* These lengths can be adjusted, if necessary: */
bootloader_usable_dram_end = 0x4087cbc0;
bootloader_stack_overhead = 0x2000; /* For safety margin between bootloader data section and startup stacks */
bootloader_dram_seg_len = 0x5000;
bootloader_iram_loader_seg_len = 0x7000;
bootloader_iram_seg_len = 0x2200;
/* Start of the lower region is determined by region size and the end of the higher region */
bootloader_dram_seg_end = bootloader_usable_dram_end - bootloader_stack_overhead;
bootloader_dram_seg_start = bootloader_dram_seg_end - bootloader_dram_seg_len;
bootloader_iram_loader_seg_start = bootloader_dram_seg_start - bootloader_iram_loader_seg_len;
bootloader_iram_seg_start = bootloader_iram_loader_seg_start - bootloader_iram_seg_len;
MEMORY
{
iram_seg (RWX) : org = bootloader_iram_seg_start, len = bootloader_iram_seg_len
iram_loader_seg (RWX) : org = bootloader_iram_loader_seg_start, len = bootloader_iram_loader_seg_len
dram_seg (RW) : org = bootloader_dram_seg_start, len = bootloader_dram_seg_len
}
/* The app may use RAM for static allocations up to the start of iram_loader_seg.
* If you have changed something above and this assert fails:
* 1. Check what the new value of bootloader_iram_loader_seg start is.
* 2. Update the value in this assert.
* 3. Update SRAM_DRAM_END in components/esp_system/ld/esp32c5/memory.ld.in to the same value.
*/
ASSERT(bootloader_iram_loader_seg_start == 0x4086EBC0, "bootloader_iram_loader_seg_start inconsistent with SRAM_DRAM_END");
/* Default entry point: */
ENTRY(call_start_cpu0);
SECTIONS
{
.iram_loader.text :
{
. = ALIGN (16);
_loader_text_start = ABSOLUTE(.);
*(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
*(.iram1 .iram1.*) /* catch stray IRAM_ATTR */
*liblog.a:(.literal .text .literal.* .text.*)
/* we use either libgcc or compiler-rt, so put similar entries for them here */
*libgcc.a:(.literal .text .literal.* .text.*)
*libclang_rt.builtins.a:(.literal .text .literal.* .text.*)
*libbootloader_support.a:bootloader_clock_loader.*(.literal .text .literal.* .text.*)
*libbootloader_support.a:bootloader_common_loader.*(.literal .text .literal.* .text.*)
*libbootloader_support.a:bootloader_flash.*(.literal .text .literal.* .text.*)
*libbootloader_support.a:bootloader_random.*(.literal .text .literal.* .text.*)
*libbootloader_support.a:bootloader_random*.*(.literal.bootloader_random_disable .text.bootloader_random_disable)
*libbootloader_support.a:bootloader_random*.*(.literal.bootloader_random_enable .text.bootloader_random_enable)
*libbootloader_support.a:bootloader_efuse.*(.literal .text .literal.* .text.*)
*libbootloader_support.a:bootloader_utility.*(.literal .text .literal.* .text.*)
*libbootloader_support.a:bootloader_sha.*(.literal .text .literal.* .text.*)
*libbootloader_support.a:bootloader_console_loader.*(.literal .text .literal.* .text.*)
*libbootloader_support.a:bootloader_panic.*(.literal .text .literal.* .text.*)
*libbootloader_support.a:bootloader_soc.*(.literal .text .literal.* .text.*)
*libbootloader_support.a:esp_image_format.*(.literal .text .literal.* .text.*)
*libbootloader_support.a:flash_encrypt.*(.literal .text .literal.* .text.*)
*libbootloader_support.a:flash_encryption_secure_features.*(.literal .text .literal.* .text.*)
*libbootloader_support.a:flash_partitions.*(.literal .text .literal.* .text.*)
*libbootloader_support.a:secure_boot.*(.literal .text .literal.* .text.*)
*libbootloader_support.a:secure_boot_secure_features.*(.literal .text .literal.* .text.*)
*libbootloader_support.a:secure_boot_signatures_bootloader.*(.literal .text .literal.* .text.*)
*libmicro-ecc.a:*.*(.literal .text .literal.* .text.*)
*libspi_flash.a:*.*(.literal .text .literal.* .text.*)
*libhal.a:wdt_hal_iram.*(.literal .text .literal.* .text.*)
*libhal.a:mmu_hal.*(.literal .text .literal.* .text.*)
*libhal.a:cache_hal.*(.literal .text .literal.* .text.*)
*libhal.a:efuse_hal.*(.literal .text .literal.* .text.*)
*libesp_hw_support.a:rtc_clk.*(.literal .text .literal.* .text.*)
*libesp_hw_support.a:rtc_time.*(.literal .text .literal.* .text.*)
*libesp_hw_support.a:regi2c_ctrl.*(.literal .text .literal.* .text.*)
*libefuse.a:*.*(.literal .text .literal.* .text.*)
*(.fini.literal)
*(.fini)
*(.gnu.version)
_loader_text_end = ABSOLUTE(.);
} > iram_loader_seg
.iram.text :
{
. = ALIGN (16);
*(.entry.text)
*(.init.literal)
*(.init)
} > iram_seg
/* Shared RAM */
.dram0.bss (NOLOAD) :
{
. = ALIGN (8);
_dram_start = ABSOLUTE(.);
_bss_start = ABSOLUTE(.);
*(.dynsbss)
*(.sbss)
*(.sbss.*)
*(.gnu.linkonce.sb.*)
*(.scommon)
*(.sbss2)
*(.sbss2.*)
*(.gnu.linkonce.sb2.*)
*(.dynbss)
*(.bss)
*(.bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
. = ALIGN (8);
_bss_end = ABSOLUTE(.);
} > dram_seg
.dram0.bootdesc : ALIGN(0x10)
{
_data_start = ABSOLUTE(.);
*(.data_bootloader_desc .data_bootloader_desc.*) /* Should be the first. Bootloader version info. DO NOT PUT ANYTHING BEFORE IT! */
} > dram_seg
.dram0.data :
{
*(.data)
*(.data.*)
*(.gnu.linkonce.d.*)
*(.data1)
*(.sdata)
*(.sdata.*)
*(.gnu.linkonce.s.*)
*(.gnu.linkonce.s2.*)
*(.jcr)
_data_end = ABSOLUTE(.);
} > dram_seg
.dram0.rodata :
{
_rodata_start = ABSOLUTE(.);
*(.rodata)
*(.rodata.*)
*(.gnu.linkonce.r.*)
*(.rodata1)
*(.sdata2 .sdata2.* .srodata .srodata.*)
__XT_EXCEPTION_TABLE_ = ABSOLUTE(.);
*(.xt_except_table)
*(.gcc_except_table)
*(.gnu.linkonce.e.*)
*(.gnu.version_r)
*(.eh_frame)
. = (. + 3) & ~ 3;
/* C++ constructor and destructor tables, properly ordered: */
__init_array_start = ABSOLUTE(.);
KEEP (*crtbegin.*(.ctors))
KEEP (*(EXCLUDE_FILE (*crtend.*) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
__init_array_end = ABSOLUTE(.);
KEEP (*crtbegin.*(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend.*) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
/* C++ exception handlers table: */
__XT_EXCEPTION_DESCS_ = ABSOLUTE(.);
*(.xt_except_desc)
*(.gnu.linkonce.h.*)
__XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
*(.xt_except_desc_end)
*(.dynamic)
*(.gnu.version_d)
_rodata_end = ABSOLUTE(.);
/* Literals are also RO data. */
_lit4_start = ABSOLUTE(.);
*(*.lit4)
*(.lit4.*)
*(.gnu.linkonce.lit4.*)
_lit4_end = ABSOLUTE(.);
. = ALIGN(4);
_dram_end = ABSOLUTE(.);
} > dram_seg
.iram.text :
{
_stext = .;
_text_start = ABSOLUTE(.);
*(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
*(.iram .iram.*) /* catch stray IRAM_ATTR */
*(.fini.literal)
*(.fini)
*(.gnu.version)
/** CPU will try to prefetch up to 16 bytes of
* of instructions. This means that any configuration (e.g. MMU, PMS) must allow
* safe access to up to 16 bytes after the last real instruction, add
* dummy bytes to ensure this
*/
. += 16;
_text_end = ABSOLUTE(.);
_etext = .;
} > iram_seg
}
/**
* Appendix: Memory Usage of ROM bootloader
*
* 0x4086b2b8 ------------------> _dram0_0_start
* | |
* | |
* | | 1. Large buffers that are only used in certain boot modes, see shared_buffers.h
* | |
* | |
* 0x4087cbc0 ------------------> __stack_sentry
* | |
* | | 2. Startup pro cpu stack (freed when IDF app is running)
* | |
* 0x4087ebc0 ------------------> __stack (pro cpu)
* | |
* | |
* | | 3. Shared memory only used in startup code or nonos/early boot*
* | | (can be freed when IDF runs)
* | |
* | |
* 0x4087fb14 ------------------> _dram0_rtos_reserved_start
* | |
* | |
* | | 4. Shared memory used in startup code and when IDF runs
* | |
* | |
* 0x4087fefc ------------------> _dram0_rtos_reserved_end
* | |
* 0x4087ffb8 ------------------> _data_start_interface
* | |
* | | 5. End of DRAM is the 'interface' data with constant addresses (ECO compatible)
* | |
* 0x40880000 ------------------> _data_end_interface
*/

View File

@@ -1,309 +0,0 @@
/*
* SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
/** Simplified memory map for the bootloader.
* Make sure the bootloader can load into main memory without overwriting itself.
*
* ESP32-C5 ROM static data usage is as follows:
* - 0x4084e9a0 - 0x4085c9a0: Shared buffers, used in UART/USB/SPI download mode only
* - 0x4085c9a0 - 0x4085e9a0: PRO CPU stack, can be reclaimed as heap after RTOS startup
* - 0x4085e9a0 - 0x40860000: ROM .bss and .data (not easily reclaimable)
*
* The 2nd stage bootloader can take space up to the end of ROM shared
* buffers area (0x4085c9a0).
*/
/* We consider 0x4085c9a0 to be the last usable address for 2nd stage bootloader stack overhead, dram_seg,
* and work out iram_seg and iram_loader_seg addresses from there, backwards.
*/
/* These lengths can be adjusted, if necessary: */
bootloader_usable_dram_end = 0x4085c9a0;
bootloader_stack_overhead = 0x2000; /* For safety margin between bootloader data section and startup stacks */
bootloader_dram_seg_len = 0x5000;
bootloader_iram_loader_seg_len = 0x7000;
bootloader_iram_seg_len = 0x2200;
/* Start of the lower region is determined by region size and the end of the higher region */
bootloader_dram_seg_end = bootloader_usable_dram_end - bootloader_stack_overhead;
bootloader_dram_seg_start = bootloader_dram_seg_end - bootloader_dram_seg_len;
bootloader_iram_loader_seg_start = bootloader_dram_seg_start - bootloader_iram_loader_seg_len;
bootloader_iram_seg_start = bootloader_iram_loader_seg_start - bootloader_iram_seg_len;
MEMORY
{
iram_seg (RWX) : org = bootloader_iram_seg_start, len = bootloader_iram_seg_len
iram_loader_seg (RWX) : org = bootloader_iram_loader_seg_start, len = bootloader_iram_loader_seg_len
dram_seg (RW) : org = bootloader_dram_seg_start, len = bootloader_dram_seg_len
}
/* The app may use RAM for static allocations up to the start of iram_loader_seg.
* If you have changed something above and this assert fails:
* 1. Check what the new value of bootloader_iram_loader_seg start is.
* 2. Update the value in this assert.
* 3. Update SRAM_DRAM_END in components/esp_system/ld/esp32c5/memory.ld.in to the same value.
*/
ASSERT(bootloader_iram_loader_seg_start == 0x4084E9A0, "bootloader_iram_loader_seg_start inconsistent with SRAM_DRAM_END");
/* Default entry point: */
ENTRY(call_start_cpu0);
SECTIONS
{
.iram_loader.text :
{
. = ALIGN (16);
_loader_text_start = ABSOLUTE(.);
*(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
*(.iram1 .iram1.*) /* catch stray IRAM_ATTR */
*liblog.a:(.literal .text .literal.* .text.*)
/* we use either libgcc or compiler-rt, so put similar entries for them here */
*libgcc.a:(.literal .text .literal.* .text.*)
*libclang_rt.builtins.a:(.literal .text .literal.* .text.*)
*libbootloader_support.a:bootloader_clock_loader.*(.literal .text .literal.* .text.*)
*libbootloader_support.a:bootloader_common_loader.*(.literal .text .literal.* .text.*)
*libbootloader_support.a:bootloader_flash.*(.literal .text .literal.* .text.*)
*libbootloader_support.a:bootloader_random.*(.literal .text .literal.* .text.*)
*libbootloader_support.a:bootloader_random*.*(.literal.bootloader_random_disable .text.bootloader_random_disable)
*libbootloader_support.a:bootloader_random*.*(.literal.bootloader_random_enable .text.bootloader_random_enable)
*libbootloader_support.a:bootloader_efuse.*(.literal .text .literal.* .text.*)
*libbootloader_support.a:bootloader_utility.*(.literal .text .literal.* .text.*)
*libbootloader_support.a:bootloader_sha.*(.literal .text .literal.* .text.*)
*libbootloader_support.a:bootloader_console_loader.*(.literal .text .literal.* .text.*)
*libbootloader_support.a:bootloader_panic.*(.literal .text .literal.* .text.*)
*libbootloader_support.a:bootloader_soc.*(.literal .text .literal.* .text.*)
*libbootloader_support.a:esp_image_format.*(.literal .text .literal.* .text.*)
*libbootloader_support.a:flash_encrypt.*(.literal .text .literal.* .text.*)
*libbootloader_support.a:flash_encryption_secure_features.*(.literal .text .literal.* .text.*)
*libbootloader_support.a:flash_partitions.*(.literal .text .literal.* .text.*)
*libbootloader_support.a:secure_boot.*(.literal .text .literal.* .text.*)
*libbootloader_support.a:secure_boot_secure_features.*(.literal .text .literal.* .text.*)
*libbootloader_support.a:secure_boot_signatures_bootloader.*(.literal .text .literal.* .text.*)
*libmicro-ecc.a:*.*(.literal .text .literal.* .text.*)
*libspi_flash.a:*.*(.literal .text .literal.* .text.*)
*libhal.a:wdt_hal_iram.*(.literal .text .literal.* .text.*)
*libhal.a:mmu_hal.*(.literal .text .literal.* .text.*)
*libhal.a:cache_hal.*(.literal .text .literal.* .text.*)
*libhal.a:efuse_hal.*(.literal .text .literal.* .text.*)
*libesp_hw_support.a:rtc_clk.*(.literal .text .literal.* .text.*)
*libesp_hw_support.a:rtc_time.*(.literal .text .literal.* .text.*)
*libesp_hw_support.a:regi2c_ctrl.*(.literal .text .literal.* .text.*)
*libefuse.a:*.*(.literal .text .literal.* .text.*)
*(.fini.literal)
*(.fini)
*(.gnu.version)
_loader_text_end = ABSOLUTE(.);
} > iram_loader_seg
.iram.text :
{
. = ALIGN (16);
*(.entry.text)
*(.init.literal)
*(.init)
} > iram_seg
/* Shared RAM */
.dram0.bss (NOLOAD) :
{
. = ALIGN (8);
_dram_start = ABSOLUTE(.);
_bss_start = ABSOLUTE(.);
*(.dynsbss)
*(.sbss)
*(.sbss.*)
*(.gnu.linkonce.sb.*)
*(.scommon)
*(.sbss2)
*(.sbss2.*)
*(.gnu.linkonce.sb2.*)
*(.dynbss)
*(.bss)
*(.bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
. = ALIGN (8);
_bss_end = ABSOLUTE(.);
} > dram_seg
.dram0.bootdesc : ALIGN(0x10)
{
_data_start = ABSOLUTE(.);
*(.data_bootloader_desc .data_bootloader_desc.*) /* Should be the first. Bootloader version info. DO NOT PUT ANYTHING BEFORE IT! */
} > dram_seg
.dram0.data :
{
*(.dram1 .dram1.*) /* catch stray DRAM_ATTR */
*(.data)
*(.data.*)
*(.gnu.linkonce.d.*)
*(.data1)
*(.sdata)
*(.sdata.*)
*(.gnu.linkonce.s.*)
*(.gnu.linkonce.s2.*)
*(.jcr)
_data_end = ABSOLUTE(.);
} > dram_seg
.dram0.rodata :
{
_rodata_start = ABSOLUTE(.);
*(.rodata)
*(.rodata.*)
*(.gnu.linkonce.r.*)
*(.rodata1)
*(.sdata2 .sdata2.* .srodata .srodata.*)
__XT_EXCEPTION_TABLE_ = ABSOLUTE(.);
*(.xt_except_table)
*(.gcc_except_table)
*(.gnu.linkonce.e.*)
*(.gnu.version_r)
*(.eh_frame_hdr)
*(.eh_frame)
. = (. + 3) & ~ 3;
/* C++ constructor and destructor tables, properly ordered: */
__init_array_start = ABSOLUTE(.);
KEEP (*crtbegin.*(.ctors))
KEEP (*(EXCLUDE_FILE (*crtend.*) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
__init_array_end = ABSOLUTE(.);
KEEP (*crtbegin.*(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend.*) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
/* C++ exception handlers table: */
__XT_EXCEPTION_DESCS_ = ABSOLUTE(.);
*(.xt_except_desc)
*(.gnu.linkonce.h.*)
__XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
*(.xt_except_desc_end)
*(.dynamic)
*(.gnu.version_d)
_rodata_end = ABSOLUTE(.);
/* Literals are also RO data. */
_lit4_start = ABSOLUTE(.);
*(*.lit4)
*(.lit4.*)
*(.gnu.linkonce.lit4.*)
_lit4_end = ABSOLUTE(.);
. = ALIGN(4);
_dram_end = ABSOLUTE(.);
} > dram_seg
.iram.text :
{
_stext = .;
_text_start = ABSOLUTE(.);
*(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
*(.iram .iram.*) /* catch stray IRAM_ATTR */
*(.fini.literal)
*(.fini)
*(.gnu.version)
/** CPU will try to prefetch up to 16 bytes of
* of instructions. This means that any configuration (e.g. MMU, PMS) must allow
* safe access to up to 16 bytes after the last real instruction, add
* dummy bytes to ensure this
*/
. += 16;
_text_end = ABSOLUTE(.);
_etext = .;
} > iram_seg
.riscv.attributes 0: { *(.riscv.attributes) }
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
.debug_pubtypes 0 : { *(.debug_pubtypes) }
/* DWARF 3 */
.debug_ranges 0 : { *(.debug_ranges) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
/* GNU DWARF 2 extensions */
.debug_gnu_pubnames 0 : { *(.debug_gnu_pubnames) }
.debug_gnu_pubtypes 0 : { *(.debug_gnu_pubtypes) }
/* DWARF 4 */
.debug_types 0 : { *(.debug_types) }
/* DWARF 5 */
.debug_addr 0 : { *(.debug_addr) }
.debug_line_str 0 : { *(.debug_line_str) }
.debug_loclists 0 : { *(.debug_loclists) }
.debug_macro 0 : { *(.debug_macro) }
.debug_names 0 : { *(.debug_names) }
.debug_rnglists 0 : { *(.debug_rnglists) }
.debug_str_offsets 0 : { *(.debug_str_offsets) }
.comment 0 : { *(.comment) }
.note.GNU-stack 0: { *(.note.GNU-stack) }
/**
* Discarding .rela.* sections results in the following mapping:
* .rela.text.* -> .text.*
* .rela.data.* -> .data.*
* And so forth...
*/
/DISCARD/ : { *(.rela.*) }
}
/**
* Appendix: Memory Usage of ROM bootloader
*
* 0x4084e9a0 ------------------> _dram0_0_start
* | |
* | |
* | | 1. Large buffers that are only used in certain boot modes, see shared_buffers.h
* | |
* | |
* 0x4085c9a0 ------------------> __stack_sentry
* | |
* | | 2. Startup pro cpu stack (freed when IDF app is running)
* | |
* 0x4085e9a0 ------------------> __stack (pro cpu)
* | |
* | |
* | | 3. Shared memory only used in startup code or nonos/early boot*
* | | (can be freed when IDF runs)
* | |
* | |
* 0x4085f500 ------------------> _dram0_rtos_reserved_start
* | |
* | |
* | | 4. Shared memory used in startup code and when IDF runs
* | |
* | |
* 0x4085fc5c ------------------> _dram0_rtos_reserved_end
* | |
* 0x4085fc70 ------------------> _data_start_interface
* | |
* | | 5. End of DRAM is the 'interface' data with constant addresses (ECO compatible)
* | |
* 0x40860000 ------------------> _data_end_interface
*/

View File

@@ -0,0 +1,255 @@
/*
* SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
/** Simplified memory map for the bootloader.
* Make sure the bootloader can load into main memory without overwriting itself.
*
* ESP32-C5 ROM static data usage is as follows:
* - 0x4084e9a0 - 0x4085c9a0: Shared buffers, used in UART/USB/SPI download mode only
* - 0x4085c9a0 - 0x4085e9a0: PRO CPU stack, can be reclaimed as heap after RTOS startup
* - 0x4085e9a0 - 0x40860000: ROM .bss and .data (not easily reclaimable)
*
* The 2nd stage bootloader can take space up to the end of ROM shared
* buffers area (0x4085c9a0).
*/
/* We consider 0x4085c9a0 to be the last usable address for 2nd stage bootloader stack overhead, dram_seg,
* and work out iram_seg and iram_loader_seg addresses from there, backwards.
*/
/* These lengths can be adjusted, if necessary: */
bootloader_usable_dram_end = 0x4085c9a0;
bootloader_stack_overhead = 0x2000; /* For safety margin between bootloader data section and startup stacks */
bootloader_dram_seg_len = 0x5000;
bootloader_iram_loader_seg_len = 0x7000;
bootloader_iram_seg_len = 0x2200;
/* Start of the lower region is determined by region size and the end of the higher region */
bootloader_dram_seg_end = bootloader_usable_dram_end - bootloader_stack_overhead;
bootloader_dram_seg_start = bootloader_dram_seg_end - bootloader_dram_seg_len;
bootloader_iram_loader_seg_start = bootloader_dram_seg_start - bootloader_iram_loader_seg_len;
bootloader_iram_seg_start = bootloader_iram_loader_seg_start - bootloader_iram_seg_len;
MEMORY
{
iram_seg (RWX) : org = bootloader_iram_seg_start, len = bootloader_iram_seg_len
iram_loader_seg (RWX) : org = bootloader_iram_loader_seg_start, len = bootloader_iram_loader_seg_len
dram_seg (RW) : org = bootloader_dram_seg_start, len = bootloader_dram_seg_len
}
/* The app may use RAM for static allocations up to the start of iram_loader_seg.
* If you have changed something above and this assert fails:
* 1. Check what the new value of bootloader_iram_loader_seg start is.
* 2. Update the value in this assert.
* 3. Update SRAM_DRAM_END in components/esp_system/ld/esp32c5/memory.ld.in to the same value.
*/
ASSERT(bootloader_iram_loader_seg_start == 0x4084E9A0, "bootloader_iram_loader_seg_start inconsistent with SRAM_DRAM_END");
/* Default entry point: */
ENTRY(call_start_cpu0);
SECTIONS
{
.iram_loader.text :
{
. = ALIGN (16);
_loader_text_start = ABSOLUTE(.);
*(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
*(.iram1 .iram1.*) /* catch stray IRAM_ATTR */
*liblog.a:(.literal .text .literal.* .text.*)
/* we use either libgcc or compiler-rt, so put similar entries for them here */
*libgcc.a:(.literal .text .literal.* .text.*)
*libclang_rt.builtins.a:(.literal .text .literal.* .text.*)
*libbootloader_support.a:bootloader_clock_loader.*(.literal .text .literal.* .text.*)
*libbootloader_support.a:bootloader_common_loader.*(.literal .text .literal.* .text.*)
*libbootloader_support.a:bootloader_flash.*(.literal .text .literal.* .text.*)
*libbootloader_support.a:bootloader_random.*(.literal .text .literal.* .text.*)
*libbootloader_support.a:bootloader_random*.*(.literal.bootloader_random_disable .text.bootloader_random_disable)
*libbootloader_support.a:bootloader_random*.*(.literal.bootloader_random_enable .text.bootloader_random_enable)
*libbootloader_support.a:bootloader_efuse.*(.literal .text .literal.* .text.*)
*libbootloader_support.a:bootloader_utility.*(.literal .text .literal.* .text.*)
*libbootloader_support.a:bootloader_sha.*(.literal .text .literal.* .text.*)
*libbootloader_support.a:bootloader_console_loader.*(.literal .text .literal.* .text.*)
*libbootloader_support.a:bootloader_panic.*(.literal .text .literal.* .text.*)
*libbootloader_support.a:bootloader_soc.*(.literal .text .literal.* .text.*)
*libbootloader_support.a:esp_image_format.*(.literal .text .literal.* .text.*)
*libbootloader_support.a:flash_encrypt.*(.literal .text .literal.* .text.*)
*libbootloader_support.a:flash_encryption_secure_features.*(.literal .text .literal.* .text.*)
*libbootloader_support.a:flash_partitions.*(.literal .text .literal.* .text.*)
*libbootloader_support.a:secure_boot.*(.literal .text .literal.* .text.*)
*libbootloader_support.a:secure_boot_secure_features.*(.literal .text .literal.* .text.*)
*libbootloader_support.a:secure_boot_signatures_bootloader.*(.literal .text .literal.* .text.*)
*libmicro-ecc.a:*.*(.literal .text .literal.* .text.*)
*libspi_flash.a:*.*(.literal .text .literal.* .text.*)
*libhal.a:wdt_hal_iram.*(.literal .text .literal.* .text.*)
*libhal.a:mmu_hal.*(.literal .text .literal.* .text.*)
*libhal.a:cache_hal.*(.literal .text .literal.* .text.*)
*libhal.a:efuse_hal.*(.literal .text .literal.* .text.*)
*libesp_hw_support.a:rtc_clk.*(.literal .text .literal.* .text.*)
*libesp_hw_support.a:rtc_time.*(.literal .text .literal.* .text.*)
*libesp_hw_support.a:regi2c_ctrl.*(.literal .text .literal.* .text.*)
*libefuse.a:*.*(.literal .text .literal.* .text.*)
*(.fini.literal)
*(.fini)
*(.gnu.version)
_loader_text_end = ABSOLUTE(.);
} > iram_loader_seg
.iram.text :
{
. = ALIGN (16);
*(.entry.text)
*(.init.literal)
*(.init)
} > iram_seg
/* Shared RAM */
.dram0.bss (NOLOAD) :
{
. = ALIGN (8);
_dram_start = ABSOLUTE(.);
_bss_start = ABSOLUTE(.);
*(.dynsbss)
*(.sbss)
*(.sbss.*)
*(.gnu.linkonce.sb.*)
*(.scommon)
*(.sbss2)
*(.sbss2.*)
*(.gnu.linkonce.sb2.*)
*(.dynbss)
*(.bss)
*(.bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
. = ALIGN (8);
_bss_end = ABSOLUTE(.);
} > dram_seg
.dram0.bootdesc : ALIGN(0x10)
{
_data_start = ABSOLUTE(.);
*(.data_bootloader_desc .data_bootloader_desc.*) /* Should be the first. Bootloader version info. DO NOT PUT ANYTHING BEFORE IT! */
} > dram_seg
.dram0.data :
{
*(.data)
*(.data.*)
*(.gnu.linkonce.d.*)
*(.data1)
*(.sdata)
*(.sdata.*)
*(.gnu.linkonce.s.*)
*(.gnu.linkonce.s2.*)
*(.jcr)
_data_end = ABSOLUTE(.);
} > dram_seg
.dram0.rodata :
{
_rodata_start = ABSOLUTE(.);
*(.rodata)
*(.rodata.*)
*(.gnu.linkonce.r.*)
*(.rodata1)
*(.sdata2 .sdata2.* .srodata .srodata.*)
__XT_EXCEPTION_TABLE_ = ABSOLUTE(.);
*(.xt_except_table)
*(.gcc_except_table)
*(.gnu.linkonce.e.*)
*(.gnu.version_r)
*(.eh_frame)
. = (. + 3) & ~ 3;
/* C++ constructor and destructor tables, properly ordered: */
__init_array_start = ABSOLUTE(.);
KEEP (*crtbegin.*(.ctors))
KEEP (*(EXCLUDE_FILE (*crtend.*) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
__init_array_end = ABSOLUTE(.);
KEEP (*crtbegin.*(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend.*) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
/* C++ exception handlers table: */
__XT_EXCEPTION_DESCS_ = ABSOLUTE(.);
*(.xt_except_desc)
*(.gnu.linkonce.h.*)
__XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
*(.xt_except_desc_end)
*(.dynamic)
*(.gnu.version_d)
_rodata_end = ABSOLUTE(.);
/* Literals are also RO data. */
_lit4_start = ABSOLUTE(.);
*(*.lit4)
*(.lit4.*)
*(.gnu.linkonce.lit4.*)
_lit4_end = ABSOLUTE(.);
. = ALIGN(4);
_dram_end = ABSOLUTE(.);
} > dram_seg
.iram.text :
{
_stext = .;
_text_start = ABSOLUTE(.);
*(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
*(.iram .iram.*) /* catch stray IRAM_ATTR */
*(.fini.literal)
*(.fini)
*(.gnu.version)
/** CPU will try to prefetch up to 16 bytes of
* of instructions. This means that any configuration (e.g. MMU, PMS) must allow
* safe access to up to 16 bytes after the last real instruction, add
* dummy bytes to ensure this
*/
. += 16;
_text_end = ABSOLUTE(.);
_etext = .;
} > iram_seg
}
/**
* Appendix: Memory Usage of ROM bootloader
*
* 0x4084e9a0 ------------------> _dram0_0_start
* | |
* | |
* | | 1. Large buffers that are only used in certain boot modes, see shared_buffers.h
* | |
* | |
* 0x4085c9a0 ------------------> __stack_sentry
* | |
* | | 2. Startup pro cpu stack (freed when IDF app is running)
* | |
* 0x4085e9a0 ------------------> __stack (pro cpu)
* | |
* | |
* | | 3. Shared memory only used in startup code or nonos/early boot*
* | | (can be freed when IDF runs)
* | |
* | |
* 0x4085f500 ------------------> _dram0_rtos_reserved_start
* | |
* | |
* | | 4. Shared memory used in startup code and when IDF runs
* | |
* | |
* 0x4085fc5c ------------------> _dram0_rtos_reserved_end
* | |
* 0x4085fc70 ------------------> _data_start_interface
* | |
* | | 5. End of DRAM is the 'interface' data with constant addresses (ECO compatible)
* | |
* 0x40860000 ------------------> _data_end_interface
*/

View File

@@ -0,0 +1,6 @@
/*
* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
/* No definition for ESP32-C5 target */

View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -138,7 +138,6 @@ SECTIONS
.dram0.data :
{
*(.dram1 .dram1.*) /* catch stray DRAM_ATTR */
*(.data)
*(.data.*)
*(.gnu.linkonce.d.*)
@@ -164,7 +163,6 @@ SECTIONS
*(.gcc_except_table)
*(.gnu.linkonce.e.*)
*(.gnu.version_r)
*(.eh_frame_hdr)
*(.eh_frame)
. = (. + 3) & ~ 3;
/* C++ constructor and destructor tables, properly ordered: */
@@ -218,58 +216,6 @@ SECTIONS
_etext = .;
} > iram_seg
.riscv.attributes 0: { *(.riscv.attributes) }
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
.debug_pubtypes 0 : { *(.debug_pubtypes) }
/* DWARF 3 */
.debug_ranges 0 : { *(.debug_ranges) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
/* GNU DWARF 2 extensions */
.debug_gnu_pubnames 0 : { *(.debug_gnu_pubnames) }
.debug_gnu_pubtypes 0 : { *(.debug_gnu_pubtypes) }
/* DWARF 4 */
.debug_types 0 : { *(.debug_types) }
/* DWARF 5 */
.debug_addr 0 : { *(.debug_addr) }
.debug_line_str 0 : { *(.debug_line_str) }
.debug_loclists 0 : { *(.debug_loclists) }
.debug_macro 0 : { *(.debug_macro) }
.debug_names 0 : { *(.debug_names) }
.debug_rnglists 0 : { *(.debug_rnglists) }
.debug_str_offsets 0 : { *(.debug_str_offsets) }
.comment 0 : { *(.comment) }
.note.GNU-stack 0: { *(.note.GNU-stack) }
/**
* Discarding .rela.* sections results in the following mapping:
* .rela.text.* -> .text.*
* .rela.data.* -> .data.*
* And so forth...
*/
/DISCARD/ : { *(.rela.*) }
}

View File

@@ -7,20 +7,20 @@
* Make sure the bootloader can load into main memory without overwriting itself.
*
* ESP32-C61 ROM static data usage is as follows:
* - 0x4083ea70 - 0x4084ca70: Shared buffers, used in UART/USB/SPI download mode only
* - 0x4084ca70 - 0x4084ea70: PRO CPU stack, can be reclaimed as heap after RTOS startup
* - 0x4084ea70 - 0x40850000: ROM .bss and .data (not easily reclaimable)
* - 0x4086ad08 - 0x4087c610: Shared buffers, used in UART/USB/SPI download mode only
* - 0x4087c610 - 0x4087e610: PRO CPU stack, can be reclaimed as heap after RTOS startup
* - 0x4087e610 - 0x40880000: ROM .bss and .data (not easily reclaimable)
*
* The 2nd stage bootloader can take space up to the end of ROM shared
* buffers area (0x4084ca70).
* buffers area (0x4087c610).
*/
/* We consider 0x4084ca70 to be the last usable address for 2nd stage bootloader stack overhead, dram_seg,
/* We consider 0x4087c610 to be the last usable address for 2nd stage bootloader stack overhead, dram_seg,
* and work out iram_seg and iram_loader_seg addresses from there, backwards.
*/
/* These lengths can be adjusted, if necessary: */
bootloader_usable_dram_end = 0x4084ca70;
bootloader_usable_dram_end = 0x4084c9f0;
bootloader_stack_overhead = 0x2000; /* For safety margin between bootloader data section and startup stacks */
bootloader_dram_seg_len = 0x5000;
bootloader_iram_loader_seg_len = 0x7000;
@@ -45,7 +45,7 @@ MEMORY
* 2. Update the value in this assert.
* 3. Update SRAM_DRAM_END in components/esp_system/ld/esp32c61/memory.ld.in to the same value.
*/
ASSERT(bootloader_iram_loader_seg_start == 0x4083ea70, "bootloader_iram_loader_seg_start inconsistent with SRAM_DRAM_END");
ASSERT(bootloader_iram_loader_seg_start == 0x4083E9F0, "bootloader_iram_loader_seg_start inconsistent with SRAM_DRAM_END");
/* Default entry point: */
ENTRY(call_start_cpu0);
@@ -138,7 +138,6 @@ SECTIONS
.dram0.data :
{
*(.dram1 .dram1.*) /* catch stray DRAM_ATTR */
*(.data)
*(.data.*)
*(.gnu.linkonce.d.*)
@@ -164,7 +163,6 @@ SECTIONS
*(.gcc_except_table)
*(.gnu.linkonce.e.*)
*(.gnu.version_r)
*(.eh_frame_hdr)
*(.eh_frame)
. = (. + 3) & ~ 3;
/* C++ constructor and destructor tables, properly ordered: */
@@ -218,92 +216,40 @@ SECTIONS
_etext = .;
} > iram_seg
.riscv.attributes 0: { *(.riscv.attributes) }
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
.debug_pubtypes 0 : { *(.debug_pubtypes) }
/* DWARF 3 */
.debug_ranges 0 : { *(.debug_ranges) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
/* GNU DWARF 2 extensions */
.debug_gnu_pubnames 0 : { *(.debug_gnu_pubnames) }
.debug_gnu_pubtypes 0 : { *(.debug_gnu_pubtypes) }
/* DWARF 4 */
.debug_types 0 : { *(.debug_types) }
/* DWARF 5 */
.debug_addr 0 : { *(.debug_addr) }
.debug_line_str 0 : { *(.debug_line_str) }
.debug_loclists 0 : { *(.debug_loclists) }
.debug_macro 0 : { *(.debug_macro) }
.debug_names 0 : { *(.debug_names) }
.debug_rnglists 0 : { *(.debug_rnglists) }
.debug_str_offsets 0 : { *(.debug_str_offsets) }
.comment 0 : { *(.comment) }
.note.GNU-stack 0: { *(.note.GNU-stack) }
/**
* Discarding .rela.* sections results in the following mapping:
* .rela.text.* -> .text.*
* .rela.data.* -> .data.*
* And so forth...
*/
/DISCARD/ : { *(.rela.*) }
}
/**
/** TODO: [ESP32C61] IDF-9405, update after rom freeze
* Appendix: Memory Usage of ROM bootloader
*
* 0x4083ea70 ------------------> _dram0_0_start
* 0x4086ad08 ------------------> _dram0_0_start
* | |
* | |
* | | 1. Large buffers that are only used in certain boot modes, see shared_buffers.h
* | |
* | |
* 0x4084ca70 ------------------> __stack_sentry
* 0x4087c610 ------------------> __stack_sentry
* | |
* | | 2. Startup pro cpu stack (freed when IDF app is running)
* | |
* 0x4084ea70 ------------------> __stack (pro cpu)
* 0x4087e610 ------------------> __stack (pro cpu)
* | |
* | |
* | | 3. Shared memory only used in startup code or nonos/early boot*
* | | (can be freed when IDF runs)
* | |
* | |
* 0x4084f5d0 ------------------> _dram0_rtos_reserved_start
* 0x4087f564 ------------------> _dram0_rtos_reserved_start
* | |
* | |
* | | 4. Shared memory used in startup code and when IDF runs
* | |
* | |
* 0x4084fc58 ------------------> _dram0_rtos_reserved_end
* 0x4087fab0 ------------------> _dram0_rtos_reserved_end
* | |
* 0x4084fc6c ------------------> _data_start_interface
* 0x4087fce8 ------------------> _data_start_interface
* | |
* | | 5. End of DRAM is the 'interface' data with constant addresses (ECO compatible)
* | |
* 0x40850000 ------------------> _data_end_interface
* 0x40880000 ------------------> _data_end_interface
*/

View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -138,7 +138,7 @@ SECTIONS
.dram0.data :
{
*(.dram1 .dram1.*) /* catch stray DRAM_ATTR */
_data_start = ABSOLUTE(.);
*(.data)
*(.data.*)
*(.gnu.linkonce.d.*)
@@ -164,7 +164,6 @@ SECTIONS
*(.gcc_except_table)
*(.gnu.linkonce.e.*)
*(.gnu.version_r)
*(.eh_frame_hdr)
*(.eh_frame)
. = (. + 3) & ~ 3;
/* C++ constructor and destructor tables, properly ordered: */
@@ -218,58 +217,6 @@ SECTIONS
_etext = .;
} > iram_seg
.riscv.attributes 0: { *(.riscv.attributes) }
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
.debug_pubtypes 0 : { *(.debug_pubtypes) }
/* DWARF 3 */
.debug_ranges 0 : { *(.debug_ranges) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
/* GNU DWARF 2 extensions */
.debug_gnu_pubnames 0 : { *(.debug_gnu_pubnames) }
.debug_gnu_pubtypes 0 : { *(.debug_gnu_pubtypes) }
/* DWARF 4 */
.debug_types 0 : { *(.debug_types) }
/* DWARF 5 */
.debug_addr 0 : { *(.debug_addr) }
.debug_line_str 0 : { *(.debug_line_str) }
.debug_loclists 0 : { *(.debug_loclists) }
.debug_macro 0 : { *(.debug_macro) }
.debug_names 0 : { *(.debug_names) }
.debug_rnglists 0 : { *(.debug_rnglists) }
.debug_str_offsets 0 : { *(.debug_str_offsets) }
.comment 0 : { *(.comment) }
.note.GNU-stack 0: { *(.note.GNU-stack) }
/**
* Discarding .rela.* sections results in the following mapping:
* .rela.text.* -> .text.*
* .rela.data.* -> .data.*
* And so forth...
*/
/DISCARD/ : { *(.rela.*) }
}
/**

View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -131,15 +131,9 @@ SECTIONS
_bss_end = ABSOLUTE(.);
} > dram_seg
.dram0.bootdesc : ALIGN(0x10)
{
_data_start = ABSOLUTE(.);
*(.data_bootloader_desc .data_bootloader_desc.*) /* Should be the first. Bootloader version info. DO NOT PUT ANYTHING BEFORE IT! */
} > dram_seg
.dram0.data :
{
*(.dram1 .dram1.*) /* catch stray DRAM_ATTR */
_data_start = ABSOLUTE(.);
*(.data)
*(.data.*)
*(.gnu.linkonce.d.*)
@@ -165,7 +159,6 @@ SECTIONS
*(.gcc_except_table)
*(.gnu.linkonce.e.*)
*(.gnu.version_r)
*(.eh_frame_hdr)
*(.eh_frame)
. = (. + 3) & ~ 3;
/* C++ constructor and destructor tables, properly ordered: */
@@ -219,58 +212,6 @@ SECTIONS
_etext = .;
} > iram_seg
.riscv.attributes 0: { *(.riscv.attributes) }
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
.debug_pubtypes 0 : { *(.debug_pubtypes) }
/* DWARF 3 */
.debug_ranges 0 : { *(.debug_ranges) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
/* GNU DWARF 2 extensions */
.debug_gnu_pubnames 0 : { *(.debug_gnu_pubnames) }
.debug_gnu_pubtypes 0 : { *(.debug_gnu_pubtypes) }
/* DWARF 4 */
.debug_types 0 : { *(.debug_types) }
/* DWARF 5 */
.debug_addr 0 : { *(.debug_addr) }
.debug_line_str 0 : { *(.debug_line_str) }
.debug_loclists 0 : { *(.debug_loclists) }
.debug_macro 0 : { *(.debug_macro) }
.debug_names 0 : { *(.debug_names) }
.debug_rnglists 0 : { *(.debug_rnglists) }
.debug_str_offsets 0 : { *(.debug_str_offsets) }
.comment 0 : { *(.comment) }
.note.GNU-stack 0: { *(.note.GNU-stack) }
/**
* Discarding .rela.* sections results in the following mapping:
* .rela.text.* -> .text.*
* .rela.data.* -> .data.*
* And so forth...
*/
/DISCARD/ : { *(.rela.*) }
}

View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2021-2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -108,7 +108,6 @@ SECTIONS
.dram0.data :
{
*(.dram1 .dram1.*) /* catch stray DRAM_ATTR */
*(.data)
*(.data.*)
*(.gnu.linkonce.d.*)
@@ -134,7 +133,6 @@ SECTIONS
*(.gcc_except_table)
*(.gnu.linkonce.e.*)
*(.gnu.version_r)
*(.eh_frame_hdr)
*(.eh_frame)
. = (. + 3) & ~ 3;
/* C++ constructor and destructor tables, properly ordered: */
@@ -207,48 +205,4 @@ SECTIONS
KEEP (*(.xt.lit .gnu.linkonce.p.*))
}
.xtensa.info 0: { *(.xtensa.info) }
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
.debug_pubtypes 0 : { *(.debug_pubtypes) }
/* DWARF 3 */
.debug_ranges 0 : { *(.debug_ranges) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
/* GNU DWARF 2 extensions */
.debug_gnu_pubnames 0 : { *(.debug_gnu_pubnames) }
.debug_gnu_pubtypes 0 : { *(.debug_gnu_pubtypes) }
/* DWARF 4 */
.debug_types 0 : { *(.debug_types) }
/* DWARF 5 */
.debug_addr 0 : { *(.debug_addr) }
.debug_line_str 0 : { *(.debug_line_str) }
.debug_loclists 0 : { *(.debug_loclists) }
.debug_macro 0 : { *(.debug_macro) }
.debug_names 0 : { *(.debug_names) }
.debug_rnglists 0 : { *(.debug_rnglists) }
.debug_str_offsets 0 : { *(.debug_str_offsets) }
.comment 0 : { *(.comment) }
.note.GNU-stack 0: { *(.note.GNU-stack) }
}

Some files were not shown because too many files have changed in this diff Show More