forked from yath/ghidra-xtensa
Add fake iX and oX registers to get a better decompilation for esp32 binaries
This commit is contained in:
Olof Astrand
10
build.gradle
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10
build.gradle
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@ -0,0 +1,10 @@
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apply from: "$rootProject.projectDir/gradle/distributableGhidraModule.gradle"
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apply from: "$rootProject.projectDir/gradle/javaProject.gradle"
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apply from: "$rootProject.projectDir/gradle/javaTestProject.gradle"
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apply from: "$rootProject.projectDir/gradle/processorProject.gradle"
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apply plugin: 'eclipse'
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eclipse.project.name = 'Processors Xtensa'
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dependencies {
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compile project(':Base')
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}
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@ -30,22 +30,22 @@
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<prototype name="__stdcall" extrapop="0" stackshift="0">
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<input>
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<pentry minsize="1" maxsize="4" extension="inttype">
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<register name="a2"/>
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<register name="i2"/>
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</pentry>
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<pentry minsize="1" maxsize="4" extension="inttype">
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<register name="a3"/>
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<register name="i3"/>
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</pentry>
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<pentry minsize="1" maxsize="4" extension="inttype">
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<register name="a4"/>
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<register name="i4"/>
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</pentry>
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<pentry minsize="1" maxsize="4" extension="inttype">
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<register name="a5"/>
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<register name="i5"/>
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</pentry>
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<pentry minsize="1" maxsize="4" extension="inttype">
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<register name="a6"/>
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<register name="i6"/>
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</pentry>
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<pentry minsize="1" maxsize="4" extension="inttype">
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<register name="a7"/>
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<register name="i7"/>
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</pentry>
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<pentry minsize="1" maxsize="500" align="4">
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<addr offset="0" space="stack"/>
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@ -53,16 +53,16 @@
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</input>
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<output>
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<pentry minsize="1" maxsize="4" extension="inttype">
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<register name="a2"/>
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<register name="o2"/>
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</pentry>
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<pentry minsize="1" maxsize="4" extension="inttype">
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<register name="a3"/>
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<register name="o3"/>
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</pentry>
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<pentry minsize="1" maxsize="4" extension="inttype">
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<register name="a4"/>
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<register name="o4"/>
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</pentry>
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<pentry minsize="1" maxsize="4" extension="inttype">
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<register name="a5"/>
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<register name="o5"/>
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</pentry>
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</output>
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<returnaddress>
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@ -70,6 +70,15 @@
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</returnaddress>
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<unaffected>
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<register name="a1"/>
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<register name="a3"/>
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<register name="a4"/>
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<register name="a5"/>
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<register name="a6"/>
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<register name="a7"/>
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<register name="a8"/>
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<register name="a9"/>
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<register name="a10"/>
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<register name="a11"/>
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<register name="a12"/>
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<register name="a13"/>
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<register name="a14"/>
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@ -15,6 +15,8 @@ define save_register offset=0x0000 size=4 [
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# Address registers (AR).
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define register offset=0x0000 size=4 [
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a0 a1 a2 a3 a4 a5 a6 a7 a8 a9 a10 a11 a12 a13 a14 a15
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i2 i3 i4 i5 i6 i7
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o2 o3 o4 o5 o6 o7
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];
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# Floating Point registers (FR + FCR (control) + FSR (status)).
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@ -303,15 +303,29 @@ macro extract_bit(val, bit, result) {
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# CALL0 - Non-windowed Call, pg. 297.
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:call0 srel_6.23_sb2 is srel_6.23_sb2 & u2_4.5 = 0 & op0 = 0b0101 {
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i2 = a2;
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i3 = a3;
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i4 = a4;
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i5 = a5;
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i6 = a6;
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i7 = a7;
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a0 = inst_start + 3;
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call srel_6.23_sb2;
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a2=o2;
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}
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# CALLX0 - Non-windowed Call Register, pg. 304.
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:callx0 as is op2 = 0 & op1 = 0 & ar = 0 & as & u2_6.7 = 0b11 & u2_4.5 = 0 & op0 = 0 {
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local dst = as;
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i2 = a2;
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i3 = a3;
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i4 = a4;
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i5 = a5;
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i6 = a6;
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i7 = a7;
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a0 = inst_start + 3;
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call [dst];
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a2=o2;
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}
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# CEIL.S - Ceiling Single to Fixed, pg. 311.
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@ -931,6 +945,7 @@ macro extract_bit(val, bit, result) {
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# RET.N - Narrow Non-Windowed Return, pg. 479.
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:ret.n is n_ar = 0b1111 & n_as = 0 & n_at = 0 & n_op0 = 0b1101 {
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return [a0];
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o2=a2;
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}
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# RFDD - Return from Debug and Dispatch, pg. 484.
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@ -33,130 +33,92 @@ macro restore() {
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# CALL4 - Call PC-relative, Rotate Window by 4, pg. 298.
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:call4 srel_6.23_sb2 is srel_6.23_sb2 & u2_4.5 = 0b01 & op0 = 0b0101 {
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local dst = srel_6.23_sb2;
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a2=a6;
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a3=a7;
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a4=a8;
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a5=a9;
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i2=a6;
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i3=a7;
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i4=a8;
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i5=a9;
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a0 = inst_start + 3;
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call [dst];
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a6=o2;
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}
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# CALL8 - Call PC-relative, Rotate Window by 8, pg. 300.
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:call8 srel_6.23_sb2 is srel_6.23_sb2 & u2_4.5 = 0b10 & op0 = 0b0101 {
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local dst = srel_6.23_sb2;
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save();
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#s2=a2;
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#s3=a3;
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#s4=a4;
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#s5=a5;
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#s6=a6;
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#s7=a7;
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a2=a10;
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a3=a11;
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a4=a12;
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a5=a13;
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a6=a14;
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a7=a15;
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i2=a10;
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i3=a11;
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i4=a12;
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i5=a13;
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i6=a14;
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i7=a15;
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a0 = inst_start + 3;
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call [dst];
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restore();
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a10=o2;
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}
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# CALL12 - Call PC-relative, Rotate Window by 12, pg. 302.
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:call12 srel_6.23_sb2 is srel_6.23_sb2 & u2_4.5 = 0b11 & op0 = 0b0101 {
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local dst = srel_6.23_sb2;
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a2=a14;
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a3=a15;
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i2=a14;
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i3=a15;
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a0 = inst_start + 3;
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call [dst];
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a14=o2;
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}
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# ENTRY - Subroutine Entry, pg. 340.
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:entry as, u15_12.23_sb3 is u15_12.23_sb3 & as & u2_6.7 = 0b00 & u2_4.5 = 0b11 & op0 = 0b0110 {
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local amn = sext(u15_12.23_sb3);
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a2=i2;
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a3=i3;
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a4=i4;
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a5=i5;
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a6=i6;
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a7=i7;
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#as = as + amn;
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WindowBase = amn;
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a1 = a1 - amn;
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}
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# if (u15_12.23_sb3 ==4)
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# goto <shift4>;
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# if (u15_12.23_sb3 ==8)
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# goto <shift8>;
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# if (u15_12.23_sb3 ==12)
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# goto <shift12>;
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# <shift4>
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# a2=a6;
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# a3=a7;
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# a4=a8;
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# a5=a9;
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# a6=a10;
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# a7=a11;
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# a8=a12;
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# a9=a13;
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# a10=a14;
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# a11=a15;
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# goto <end>;
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# <shift8>
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# a2=a10;
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# a3=a11;
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# a4=a12;
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# a5=a13;
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# a6=a14;
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# a7=a15;
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# goto <end>;
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# <shift12>
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# a2=a14;
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# a3=a15;
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# <end>
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# CALLX4 - Call Register, Rotate Window by 4, pg. 305.
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:callx4 as is op2 = 0 & op1 = 0 & ar = 0 & as & u2_6.7 = 0b11 & u2_4.5 = 0b01 & op0 = 0 {
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local dst = as;
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a2=a6;
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a3=a7;
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a4=a8;
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a5=a9;
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a6=a10;
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a7=a11;
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a8=a12;
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a9=a13;
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a10=a14;
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a11=a15;
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i2=a6;
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i3=a7;
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i4=a8;
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i5=a9;
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i6=a10;
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i7=a11;
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a0 = inst_start + 3;
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call [dst];
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a6=o2;
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}
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# CALLX8 - Call Register, Rotate Window by 8, pg. 307.
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:callx8 as is op2 = 0 & op1 = 0 & ar = 0 & as & u2_6.7 = 0b11 & u2_4.5 = 0b10 & op0 = 0 {
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local dst = as;
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#s2=a2;
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#s3=a3;
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#s4=a4;
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#s5=a5;
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#s6=a6;
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#s7=a7;
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a2=a10;
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a3=a11;
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a4=a12;
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a5=a13;
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a6=a14;
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a7=a15;
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i2=a10;
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i3=a11;
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i4=a12;
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i5=a13;
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i6=a14;
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i7=a15;
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a0 = inst_start + 3;
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call [dst];
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a10=o2;
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}
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# CALLX12 - Call Register, Rotate Window by 12, pg. 308.
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:callx12 as is op2 = 0 & op1 = 0 & ar = 0 & as & u2_6.7 = 0b11 & u2_4.5 = 0b11 & op0 = 0 {
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local dst = as;
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a2=a14;
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a3=a15;
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i2=a14;
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i3=a15;
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a0 = inst_start + 3;
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call [dst];
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a14=o2;
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}
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@ -170,30 +132,23 @@ macro restore() {
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# RETW - Windowed Return, pg. 480.
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:retw is op2 = 0 & op1 = 0 & ar = 0 & as = 0 & u2_6.7 = 0b10 & u2_4.5 = 0b01 & op0 = 0 {
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# Assume call8
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a10=a2;
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a11=a3;
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a12=a4;
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a13=a5;
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a14=a6;
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a15=a7;
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#a2=s2;
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#a3=s3;
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#a4=s4;
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#a5=s5;
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#a6=s6;
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#a7=s7;
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o2=a2;
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o3=a3;
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o4=a4;
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a10=a2;
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a1 = a1 + WindowBase;
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return [a0];
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}
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# RETW.N - Narrow Windowed Return, pg. 482.
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:retw.n is n_ar = 0b1111 & n_as = 0 & n_at = 0b0001 & n_op0 = 0b1101 {
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o2=a2;
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o3=a3;
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o4=a4;
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o5=a5;
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o6=a6;
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o7=a7;
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a10=a2;
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a11=a3;
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a12=a4;
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a13=a5;
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a14=a6;
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a15=a7;
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a1 = a1 + WindowBase;
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return [a0];
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}
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