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feedc0de/ghidra-xtensa
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Olof Astrand 4c6216bcd7 Updates to work with Ghidra 10.0
2021-07-19 16:03:11 +02:00
..
xtensa.cspec
Add fake iX and oX registers to get a better decompilation for esp32 binaries
2020-07-31 03:16:54 +02:00
xtensa.dwarf
Updated with upstream manual merge
2020-05-16 12:21:28 +02:00
xtensa.ldefs
Updated with upstream manual merge
2020-05-16 12:21:28 +02:00
xtensa.opinion
Add opinion file for ELF and titlecase the processor name
2019-06-26 16:28:50 +02:00
xtensa.pspec
Initial commit
2019-06-22 15:04:45 +02:00
xtensa.sinc
Updates to work with Ghidra 10.0
2021-07-19 16:03:11 +02:00
xtensa.slaspec
Initial commit
2019-06-22 15:04:45 +02:00
xtensaInstructions.sinc
slli high bit correction
2020-12-04 17:32:07 +01:00
xtensaTodo.sinc
Improved decoding of special registers
2020-08-05 16:56:42 +02:00
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