Olof Astrand 0fdb885926 Only one output variable

2020-08-03 02:38:54 +02:00

..

xtensa.cspec

Add fake iX and oX registers to get a better decompilation for esp32 binaries

2020-07-31 03:16:54 +02:00

xtensa.dwarf

Updated with upstream manual merge

2020-05-16 12:21:28 +02:00

xtensa.ldefs

Updated with upstream manual merge

2020-05-16 12:21:28 +02:00

xtensa.opinion

Add opinion file for ELF and titlecase the processor name

2019-06-26 16:28:50 +02:00

xtensa.pspec

Initial commit

2019-06-22 15:04:45 +02:00

xtensa.sinc

Add fake iX and oX registers to get a better decompilation for esp32 binaries

2020-07-31 03:16:54 +02:00

xtensa.slaspec

Initial commit

2019-06-22 15:04:45 +02:00

xtensaInstructions.sinc

Updated call0

2020-08-03 01:53:02 +02:00

xtensaTodo.sinc

Only one output variable

2020-08-03 02:38:54 +02:00