Support for STM32H5

This commit is contained in:
David Garske
2023-03-27 11:49:32 -07:00
parent 0210dcd98d
commit 0201662094
4 changed files with 24 additions and 6 deletions

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@@ -97,16 +97,19 @@ The section for "Hardware platform" may need to be adjusted depending on your pr
* To enable STM32L5 support define `WOLFSSL_STM32L5`.
* To enable STM32H7 support define `WOLFSSL_STM32H7`.
* To enable STM32WB support define `WOLFSSL_STM32WB`.
* To enable STM32U5 support define `WOLFSSL_STM32U5`.
* To enable STM32H5 support define `WOLFSSL_STM32H5`.
To use the STM32 Cube HAL support make sure `WOLFSSL_STM32_CUBEMX` is defined.
The PKA acceleration for ECC is avaialble on some U5, L5 and WB55 chips.
The PKA acceleration for ECC is available on some U5, L5 and WB55 chips.
This is enabled with `WOLFSSL_STM32_PKA`. You can see some of the benchmarks [here](STM32_Benchmarks.md).
To disable hardware crypto acceleration you can define:
* `NO_STM32_HASH`
* `NO_STM32_CRYPTO`
* `NO_STM32_RNG`
To enable the latest Cube HAL support please define `STM32_HAL_V2`.

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@@ -152,6 +152,12 @@ extern ${variable.value} ${variable.name};
#undef NO_STM32_CRYPTO
#define WOLFSSL_STM32_PKA
#endif
#elif defined(STM32H563xx)
#define WOLFSSL_STM32H5
#define HAL_CONSOLE_UART huart3
#define STM32_HAL_V2
#undef NO_STM32_HASH
#else
#warning Please define a hardware platform!
/* This means there is not a pre-defined platform for your board/CPU */

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@@ -46,8 +46,12 @@
#if !defined(HASH_ALGOMODE_HASH) && defined(HASH_AlgoMode_HASH)
#define HASH_ALGOMODE_HASH HASH_AlgoMode_HASH
#endif
#if !defined(HASH_DATATYPE_8B) && defined(HASH_DataType_8b)
#define HASH_DATATYPE_8B HASH_DataType_8b
#if !defined(HASH_DATATYPE_8B)
#if defined(HASH_DataType_8b)
#define HASH_DATATYPE_8B HASH_DataType_8b
#elif defined(HASH_BYTE_SWAP)
#define HASH_DATATYPE_8B HASH_BYTE_SWAP
#endif
#endif
#ifndef HASH_STR_NBW
#define HASH_STR_NBW HASH_STR_NBLW
@@ -120,7 +124,8 @@ int wc_Stm32_Hash_Final(STM32_HASH_Context* stmCtx, word32 algo,
/* Detect newer CubeMX crypto HAL (HAL_CRYP_Encrypt / HAL_CRYP_Decrypt) */
#if !defined(STM32_HAL_V2) && defined(CRYP_AES_GCM) && \
(defined(WOLFSSL_STM32F7) || defined(WOLFSSL_STM32L5) || \
defined(WOLFSSL_STM32H7) || defined(WOLFSSL_STM32U5))
defined(WOLFSSL_STM32H7) || defined(WOLFSSL_STM32U5)) || \
defined(WOLFSSL_STM32H5)
#define STM32_HAL_V2
#endif

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@@ -1368,7 +1368,8 @@ extern void uITRON4_free(void *p) ;
defined(WOLFSSL_STM32F7) || defined(WOLFSSL_STM32F1) || \
defined(WOLFSSL_STM32L4) || defined(WOLFSSL_STM32L5) || \
defined(WOLFSSL_STM32WB) || defined(WOLFSSL_STM32H7) || \
defined(WOLFSSL_STM32G0) || defined(WOLFSSL_STM32U5)
defined(WOLFSSL_STM32G0) || defined(WOLFSSL_STM32U5) || \
defined(WOLFSSL_STM32H5)
#define SIZEOF_LONG_LONG 8
#ifndef CHAR_BIT
@@ -1423,6 +1424,8 @@ extern void uITRON4_free(void *p) ;
#include "stm32g0xx_hal.h"
#elif defined(WOLFSSL_STM32U5)
#include "stm32u5xx_hal.h"
#elif defined(WOLFSSL_STM32H5)
#include "stm32h5xx_hal.h"
#endif
#if defined(WOLFSSL_CUBEMX_USE_LL) && defined(WOLFSSL_STM32L4)
#include "stm32l4xx_ll_rng.h"
@@ -1474,7 +1477,8 @@ extern void uITRON4_free(void *p) ;
#endif /* WOLFSSL_STM32_CUBEMX */
#endif /* WOLFSSL_STM32F2 || WOLFSSL_STM32F4 || WOLFSSL_STM32L4 ||
WOLFSSL_STM32L5 || WOLFSSL_STM32F7 || WOLFSSL_STMWB ||
WOLFSSL_STM32H7 || WOLFSSL_STM32G0 || WOLFSSL_STM32U5 */
WOLFSSL_STM32H7 || WOLFSSL_STM32G0 || WOLFSSL_STM32U5 ||
WOLFSSL_STM32H5 */
#ifdef WOLFSSL_DEOS
#include <deos.h>
#include <timeout.h>