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Support for STM32H5
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@@ -97,16 +97,19 @@ The section for "Hardware platform" may need to be adjusted depending on your pr
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* To enable STM32L5 support define `WOLFSSL_STM32L5`.
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* To enable STM32H7 support define `WOLFSSL_STM32H7`.
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* To enable STM32WB support define `WOLFSSL_STM32WB`.
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* To enable STM32U5 support define `WOLFSSL_STM32U5`.
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* To enable STM32H5 support define `WOLFSSL_STM32H5`.
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To use the STM32 Cube HAL support make sure `WOLFSSL_STM32_CUBEMX` is defined.
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The PKA acceleration for ECC is avaialble on some U5, L5 and WB55 chips.
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The PKA acceleration for ECC is available on some U5, L5 and WB55 chips.
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This is enabled with `WOLFSSL_STM32_PKA`. You can see some of the benchmarks [here](STM32_Benchmarks.md).
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To disable hardware crypto acceleration you can define:
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* `NO_STM32_HASH`
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* `NO_STM32_CRYPTO`
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* `NO_STM32_RNG`
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To enable the latest Cube HAL support please define `STM32_HAL_V2`.
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@@ -152,6 +152,12 @@ extern ${variable.value} ${variable.name};
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#undef NO_STM32_CRYPTO
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#define WOLFSSL_STM32_PKA
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#endif
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#elif defined(STM32H563xx)
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#define WOLFSSL_STM32H5
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#define HAL_CONSOLE_UART huart3
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#define STM32_HAL_V2
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#undef NO_STM32_HASH
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#else
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#warning Please define a hardware platform!
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/* This means there is not a pre-defined platform for your board/CPU */
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@@ -46,8 +46,12 @@
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#if !defined(HASH_ALGOMODE_HASH) && defined(HASH_AlgoMode_HASH)
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#define HASH_ALGOMODE_HASH HASH_AlgoMode_HASH
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#endif
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#if !defined(HASH_DATATYPE_8B) && defined(HASH_DataType_8b)
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#define HASH_DATATYPE_8B HASH_DataType_8b
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#if !defined(HASH_DATATYPE_8B)
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#if defined(HASH_DataType_8b)
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#define HASH_DATATYPE_8B HASH_DataType_8b
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#elif defined(HASH_BYTE_SWAP)
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#define HASH_DATATYPE_8B HASH_BYTE_SWAP
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#endif
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#endif
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#ifndef HASH_STR_NBW
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#define HASH_STR_NBW HASH_STR_NBLW
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@@ -120,7 +124,8 @@ int wc_Stm32_Hash_Final(STM32_HASH_Context* stmCtx, word32 algo,
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/* Detect newer CubeMX crypto HAL (HAL_CRYP_Encrypt / HAL_CRYP_Decrypt) */
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#if !defined(STM32_HAL_V2) && defined(CRYP_AES_GCM) && \
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(defined(WOLFSSL_STM32F7) || defined(WOLFSSL_STM32L5) || \
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defined(WOLFSSL_STM32H7) || defined(WOLFSSL_STM32U5))
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defined(WOLFSSL_STM32H7) || defined(WOLFSSL_STM32U5)) || \
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defined(WOLFSSL_STM32H5)
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#define STM32_HAL_V2
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#endif
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@@ -1368,7 +1368,8 @@ extern void uITRON4_free(void *p) ;
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defined(WOLFSSL_STM32F7) || defined(WOLFSSL_STM32F1) || \
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defined(WOLFSSL_STM32L4) || defined(WOLFSSL_STM32L5) || \
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defined(WOLFSSL_STM32WB) || defined(WOLFSSL_STM32H7) || \
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defined(WOLFSSL_STM32G0) || defined(WOLFSSL_STM32U5)
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defined(WOLFSSL_STM32G0) || defined(WOLFSSL_STM32U5) || \
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defined(WOLFSSL_STM32H5)
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#define SIZEOF_LONG_LONG 8
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#ifndef CHAR_BIT
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@@ -1423,6 +1424,8 @@ extern void uITRON4_free(void *p) ;
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#include "stm32g0xx_hal.h"
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#elif defined(WOLFSSL_STM32U5)
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#include "stm32u5xx_hal.h"
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#elif defined(WOLFSSL_STM32H5)
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#include "stm32h5xx_hal.h"
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#endif
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#if defined(WOLFSSL_CUBEMX_USE_LL) && defined(WOLFSSL_STM32L4)
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#include "stm32l4xx_ll_rng.h"
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@@ -1474,7 +1477,8 @@ extern void uITRON4_free(void *p) ;
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#endif /* WOLFSSL_STM32_CUBEMX */
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#endif /* WOLFSSL_STM32F2 || WOLFSSL_STM32F4 || WOLFSSL_STM32L4 ||
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WOLFSSL_STM32L5 || WOLFSSL_STM32F7 || WOLFSSL_STMWB ||
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WOLFSSL_STM32H7 || WOLFSSL_STM32G0 || WOLFSSL_STM32U5 */
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WOLFSSL_STM32H7 || WOLFSSL_STM32G0 || WOLFSSL_STM32U5 ||
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WOLFSSL_STM32H5 */
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#ifdef WOLFSSL_DEOS
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#include <deos.h>
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#include <timeout.h>
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