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sha256: check no hw accelleartion is enabled with CB_ONLY_SHA256
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@@ -97,6 +97,42 @@ on the specific device platform.
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#undef WOLFSSL_USE_ESP32_CRYPT_HASH_HW
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#endif
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/* WOLF_CRYPTO_CB_ONLY_SHA256 strips the software SHA-256 implementation and
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* routes every operation through the crypto callback. It is mutually exclusive
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* with any in-tree SHA-256 hardware/asm backend below: keep this list in sync
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* with the #elif chain at the start of the "Hardware Acceleration" section. */
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#if defined(WOLF_CRYPTO_CB_ONLY_SHA256) && ( \
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defined(WOLFSSL_TI_HASH) || \
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defined(WOLFSSL_CRYPTOCELL) || \
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defined(MAX3266X_SHA) || \
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defined(FREESCALE_LTC_SHA) || \
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defined(FREESCALE_MMCAU_SHA) || \
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defined(WOLFSSL_PIC32MZ_HASH) || \
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defined(STM32_HASH_SHA2) || \
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(defined(WOLFSSL_IMX6_CAAM) && !defined(NO_IMX6_CAAM_HASH)) || \
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(defined(WOLFSSL_SE050) && defined(WOLFSSL_SE050_HASH)) || \
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defined(WOLFSSL_AFALG_HASH) || \
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defined(WOLFSSL_DEVCRYPTO_HASH) || \
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(defined(WOLFSSL_SCE) && !defined(WOLFSSL_SCE_NO_HASH)) || \
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defined(WOLFSSL_USE_ESP32_CRYPT_HASH_HW) || \
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defined(WOLFSSL_RENESAS_TSIP_TLS) || \
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defined(WOLFSSL_RENESAS_SCEPROTECT) || \
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defined(WOLFSSL_RENESAS_RSIP) || \
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defined(PSOC6_HASH_SHA2) || \
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defined(WOLFSSL_IMXRT_DCP) || \
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defined(WOLFSSL_NXP_HASHCRYPT_SHA) || \
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defined(WOLFSSL_SILABS_SE_ACCEL) || \
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defined(WOLFSSL_KCAPI_HASH) || \
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(defined(WOLFSSL_HAVE_PSA) && !defined(WOLFSSL_PSA_NO_HASH)) || \
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defined(WOLFSSL_RENESAS_RX64_HASH) || \
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defined(WOLFSSL_PPC32_ASM) || \
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defined(WOLFSSL_ARMASM) || \
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(defined(WOLFSSL_X86_64_BUILD) && defined(USE_INTEL_SPEEDUP) && \
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(defined(HAVE_INTEL_AVX1) || defined(HAVE_INTEL_AVX2))))
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#error "WOLF_CRYPTO_CB_ONLY_SHA256 is incompatible with SHA-256 hardware" \
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" acceleration backends"
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#endif
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#ifdef WOLFSSL_ESPIDF
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/* Define the ESP_LOGx(TAG, WOLFSSL_ESPIDF_BLANKLINE_MESSAGE value for output messages here.
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**
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