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https://github.com/wolfSSL/wolfssl.git
synced 2025-07-29 18:27:29 +02:00
Update esp32 sha uintptr_t types; ret (0/1 not TRUE/FALSE)
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@ -209,7 +209,7 @@ int esp_set_hw(WC_ESP32SHA* ctx)
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*/
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int esp_sha_need_byte_reversal(WC_ESP32SHA* ctx)
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{
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int ret = TRUE; /* Assume we'll need reversal, look for exceptions. */
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int ret = 1; /* Assume we'll need reversal, look for exceptions. */
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CTX_STACK_CHECK(ctx);
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#if defined(CONFIG_IDF_TARGET_ESP32C2) || \
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defined(CONFIG_IDF_TARGET_ESP8684) || \
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@ -227,10 +227,10 @@ int esp_sha_need_byte_reversal(WC_ESP32SHA* ctx)
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#endif
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if (ctx->mode == ESP32_SHA_HW) {
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ESP_LOGV(TAG, " No reversal, ESP32_SHA_HW");
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ret = FALSE;
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ret = 0;
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}
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else {
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ret = TRUE;
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ret = 1;
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ESP_LOGV(TAG, " Need byte reversal, %d", ctx->mode);
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/* Return true for SW; only HW C3 skips reversal at this time. */
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#ifdef WOLFSSL_HW_METRICS
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@ -400,7 +400,7 @@ int esp_sha_init_ctx(WC_ESP32SHA* ctx)
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/* Reminder: always start isfirstblock = 1 (true) when using HW engine. */
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/* We're always on the first block at init time. (not zero-based!) */
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ctx->isfirstblock = true;
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ctx->isfirstblock = 1;
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ctx->lockDepth = 0; /* new objects will always start with lock depth = 0 */
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#if defined(MUTEX_DURING_INIT)
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@ -824,7 +824,7 @@ static int wc_esp_wait_until_idle(void)
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defined(CONFIG_IDF_TARGET_ESP32C3) || \
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defined(CONFIG_IDF_TARGET_ESP32C6)
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/* ESP32-C3 and ESP32-C6 RISC-V */
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while ((sha_ll_busy() == true) && (loop_ct > 0)) {
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while ((sha_ll_busy() == 1) && (loop_ct > 0)) {
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loop_ct--;
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/* do nothing while waiting. */
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}
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@ -948,20 +948,22 @@ int esp_unroll_sha_module_enable(WC_ESP32SHA* ctx)
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return ret;
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} /* esp_unroll_sha_module_enable */
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int esp_sha_set_stray(WC_ESP32SHA* ctx)
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/* Set and return a stray ctx value stray_ctx. Useful for multi-task debugging.
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* Returns zero if not debugging. */
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uintptr_t esp_sha_set_stray(WC_ESP32SHA* ctx)
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{
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int ret = 0;
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uintptr_t ret = 0;
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CTX_STACK_CHECK(ctx);
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#ifdef WOLFSSL_DEBUG_MUTEX
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stray_ctx = ctx;
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ret= (int)stray_ctx;
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ret = (uintptr_t)stray_ctx;
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#endif
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CTX_STACK_CHECK(ctx);
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return ret;
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}
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/* Return 1 if the SHA HW is in use, 0 otherwise*/
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/* Return 1 if the SHA HW is in use, 0 otherwise. */
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int esp_sha_hw_in_use()
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{
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int ret;
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@ -974,6 +976,7 @@ int esp_sha_hw_in_use()
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ESP_LOGV(TAG, "esp_sha_hw_in_use is %d", ret);
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return ret;
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}
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/*
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** return HW lock owner, otherwise zero if not locked.
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**
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@ -1057,10 +1060,13 @@ uintptr_t esp_sha_hw_islocked(WC_ESP32SHA* ctx)
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* The HW is typically unlocked when the SHA hash wc_Sha[nn]Final() is called.
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* However, in the case of TLS connections the in-progress hash may at times be
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* abandoned. Thus this function should be called at free time. See internal.c
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*
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* Returns the owner of the current lock, typically used for debugging.
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* Returns zero if there was no unfinished lock found to clean up.
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*/
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int esp_sha_release_unfinished_lock(WC_ESP32SHA* ctx)
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uintptr_t esp_sha_release_unfinished_lock(WC_ESP32SHA* ctx)
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{
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int ret = 0;
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uintptr_t ret = 0;
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CTX_STACK_CHECK(ctx);
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ret = esp_sha_hw_islocked(ctx); /* get the owner of the current lock */
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@ -1075,7 +1081,7 @@ int esp_sha_release_unfinished_lock(WC_ESP32SHA* ctx)
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#endif
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if (ret == (uintptr_t)ctx) {
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/* found a match for this object */
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if (ret == (uintptr_t)(ctx->initializer)) {
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if (ret == ctx->initializer) {
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/* confirmed match*/
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ESP_LOGW(TAG, "New mutex_ctx_owner = NULL");
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#ifdef ESP_MONITOR_HW_TASK_LOCK
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@ -1087,7 +1093,7 @@ int esp_sha_release_unfinished_lock(WC_ESP32SHA* ctx)
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else {
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/* the only mismatch expected may be in a multi-thread RTOS */
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ESP_LOGE(TAG, "ERROR: Release unfinished lock for %x but "
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"found %x", ret, (uintptr_t)(ctx->initializer));
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"found %x", ret, ctx->initializer);
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}
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#ifdef WOLFSSL_DEBUG_MUTEX
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ESP_LOGE(TAG, "\n>>>> esp_sha_release_unfinished_lock %x\n", ret);
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@ -1605,7 +1611,7 @@ static int esp_sha_start_process(WC_ESP32SHA* sha)
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ESP_LOGV(TAG, "SHA1 SHA_START_REG");
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if (sha->isfirstblock) {
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sha_ll_start_block(SHA2_256);
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sha->isfirstblock = false;
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sha->isfirstblock = 0;
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ESP_LOGV(TAG, " set sha->isfirstblock = 0");
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@ -1658,7 +1664,7 @@ static int esp_sha_start_process(WC_ESP32SHA* sha)
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if (sha->isfirstblock) {
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REG_WRITE(SHA_START_REG, 1);
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sha->isfirstblock = false;
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sha->isfirstblock = 0;
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ESP_LOGV(TAG, " set sha->isfirstblock = 0");
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@ -1709,7 +1715,7 @@ static int esp_sha_start_process(WC_ESP32SHA* sha)
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break;
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}
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sha->isfirstblock = false;
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sha->isfirstblock = 0;
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ESP_LOGV(TAG, " set sha->isfirstblock = 0");
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#if defined(DEBUG_WOLFSSL)
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@ -1976,7 +1982,7 @@ int wc_esp_digest_state(WC_ESP32SHA* ctx, byte* hash)
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}
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#if defined(CONFIG_IDF_TARGET_ESP32S2) || defined(CONFIG_IDF_TARGET_ESP32S3)
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if (ctx->isfirstblock == true) {
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if (ctx->isfirstblock == 1) {
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/* no hardware use yet. Nothing to do yet */
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return ESP_OK;
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}
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@ -2064,7 +2070,7 @@ int wc_esp_digest_state(WC_ESP32SHA* ctx, byte* hash)
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return ESP_FAIL;
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}
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if (ctx->isfirstblock == true) {
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if (ctx->isfirstblock == 1) {
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/* no hardware use yet. Nothing to do yet */
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return ESP_OK;
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}
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@ -772,11 +772,11 @@ extern "C"
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WOLFSSL_LOCAL uintptr_t esp_sha_hw_islocked(WC_ESP32SHA* ctx);
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/* esp_sha_hw_in_use returns 1 (true) if SHA HW in use, otherwise 0 */
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WOLFSSL_LOCAL int esp_sha_hw_in_use();
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WOLFSSL_LOCAL int esp_sha_call_count();
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WOLFSSL_LOCAL int esp_sha_lock_count();
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WOLFSSL_LOCAL int esp_sha_release_unfinished_lock(WC_ESP32SHA* ctx);
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WOLFSSL_LOCAL int esp_sha_set_stray(WC_ESP32SHA* ctx);
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WOLFSSL_LOCAL int esp_sha_hw_in_use(void);
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WOLFSSL_LOCAL int esp_sha_call_count(void);
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WOLFSSL_LOCAL int esp_sha_lock_count(void);
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WOLFSSL_LOCAL uintptr_t esp_sha_release_unfinished_lock(WC_ESP32SHA* ctx);
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WOLFSSL_LOCAL uintptr_t esp_sha_set_stray(WC_ESP32SHA* ctx);
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#ifndef NO_SHA
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struct wc_Sha;
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@ -886,7 +886,7 @@ extern "C"
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#define WOLFSSL_HAS_METRICS
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/* Allow sha256 code to keep track of SW fallback during active HW */
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WOLFSSL_LOCAL int esp_sw_sha256_count_add();
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WOLFSSL_LOCAL int esp_sw_sha256_count_add(void);
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/* show MP HW Metrics*/
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WOLFSSL_LOCAL int esp_hw_show_mp_metrics(void);
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