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add option for building sgx with assembly optimizations

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This commit is contained in:
JacobBarthelmeh
2025-02-17 13:52:31 -07:00
parent 9cdbc03a23
commit 59ac260ae8
3 changed files with 53 additions and 15 deletions
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11
IDE/LINUX-SGX/build.sh
View File

@@ -1,9 +1,16 @@
#!/bin/sh
CFLAGS_NEW="-DDEBUG_WOLFSSL"
CFLAGS_NEW="-DDEBUG_WOLFSSL -I/usr/lib/gcc/x86_64-linux-gnu/$(gcc -dumpversion)/include"
export CFLAGS="${CFLAGS} ${CFLAGS_NEW}"
echo ${CFLAGS}
make -f sgx_t_static.mk HAVE_WOLFSSL_BENCHMARK=1 HAVE_WOLFSSL_TEST=1 HAVE_WOLFSSL_SP=1
export C_INCLUDE_PATH="$C_INCLUDE_PATH:/usr/lib/gcc/x86_64-linux-gnu/$(gcc -dumpversion)/include"
# Build without assembly optimizations
#make -f sgx_t_static.mk HAVE_WOLFSSL_BENCHMARK=1 HAVE_WOLFSSL_TEST=1 HAVE_WOLFSSL_SP=1
# Build with assembly optimizations
make -f sgx_t_static.mk HAVE_WOLFSSL_BENCHMARK=1 HAVE_WOLFSSL_TEST=1 HAVE_WOLFSSL_SP=1 HAVE_WOLFSSL_ASSEMBLY=1

39
IDE/LINUX-SGX/sgx_t_static.mk
View File

@@ -44,7 +44,8 @@ endif
Crypto_Library_Name := sgx_tcrypto
Wolfssl_C_Extra_Flags := -DWOLFSSL_SGX
Wolfssl_C_Extra_Flags := -DWOLFSSL_SGX\
-DWOLFSSL_CUSTOM_CONFIG
Wolfssl_C_Files :=$(WOLFSSL_ROOT)/wolfcrypt/src/aes.c\
$(WOLFSSL_ROOT)/wolfcrypt/src/arc4.c\
@@ -52,6 +53,7 @@ Wolfssl_C_Files :=$(WOLFSSL_ROOT)/wolfcrypt/src/aes.c\
$(WOLFSSL_ROOT)/wolfcrypt/src/blake2b.c\
$(WOLFSSL_ROOT)/wolfcrypt/src/camellia.c\
$(WOLFSSL_ROOT)/wolfcrypt/src/coding.c\
$(WOLFSSL_ROOT)/wolfcrypt/src/cpuid.c\
$(WOLFSSL_ROOT)/wolfcrypt/src/chacha.c\
$(WOLFSSL_ROOT)/wolfcrypt/src/chacha20_poly1305.c\
$(WOLFSSL_ROOT)/src/crl.c\
@@ -88,12 +90,39 @@ Wolfssl_C_Files :=$(WOLFSSL_ROOT)/wolfcrypt/src/aes.c\
$(WOLFSSL_ROOT)/wolfcrypt/src/signature.c\
$(WOLFSSL_ROOT)/wolfcrypt/src/sp_c32.c\
$(WOLFSSL_ROOT)/wolfcrypt/src/sp_c64.c\
$(WOLFSSL_ROOT)/wolfcrypt/src/sp_x86_64.c\
$(WOLFSSL_ROOT)/wolfcrypt/src/sp_int.c\
$(WOLFSSL_ROOT)/src/ssl.c\
$(WOLFSSL_ROOT)/src/tls.c\
$(WOLFSSL_ROOT)/wolfcrypt/src/wc_encrypt.c\
$(WOLFSSL_ROOT)/wolfcrypt/src/wolfevent.c\
ifeq ($(HAVE_WOLFSSL_ASSEMBLY), 1)
Wolfssl_ASM_Files := $(WOLFSSL_ROOT)/wolfcrypt/src/aes_asm.asm\
$(WOLFSSL_ROOT)/wolfcrypt/src/sp_x86_64_asm.asm
Wolfssl_S_Files := $(WOLFSSL_ROOT)/wolfcrypt/src/aes_asm.S\
$(WOLFSSL_ROOT)/wolfcrypt/src/aes_gcm_asm.S\
$(WOLFSSL_ROOT)/wolfcrypt/src/poly1305_asm.S\
$(WOLFSSL_ROOT)/wolfcrypt/src/sha256_asm.S\
$(WOLFSSL_ROOT)/wolfcrypt/src/sp_x86_64_asm.S\
$(WOLFSSL_ROOT)/wolfcrypt/src/aes_xts_asm.S\
$(WOLFSSL_ROOT)/wolfcrypt/src/sha3_asm.S\
$(WOLFSSL_ROOT)/wolfcrypt/src/wc_kyber_asm.S\
$(WOLFSSL_ROOT)/wolfcrypt/src/chacha_asm.S\
$(WOLFSSL_ROOT)/wolfcrypt/src/sha512_asm.S
Wolfssl_C_Extra_Flags += -DWOLFSSL_X86_64_BUILD\
-DWOLFSSL_AESNI\
-maes -masm=intel
ifeq ($(HAVE_WOLFSSL_SP), 1)
Wolfssl_C_Extra_Flags += -DWOLFSSL_SP_X86_64_ASM\
-DWOLFSSL_SP_X86_64\
-DWOLFSSL_SP_ASM
endif
endif
Wolfssl_Include_Paths := -I$(WOLFSSL_ROOT)/ \
-I$(WOLFSSL_ROOT)/wolfcrypt/ \
-I$(SGX_SDK)/include -I$(SGX_SDK)/include/tlibc -I$(SGX_SDK)/include/stlport
@@ -111,7 +140,8 @@ endif
ifeq ($(HAVE_WOLFSSL_SP), 1)
Wolfssl_C_Extra_Flags += -DWOLFSSL_HAVE_SP_RSA \
-DWOLFSSL_HAVE_SP_DH \
-DWOLFSSL_HAVE_SP_ECC
-DWOLFSSL_HAVE_SP_ECC \
-DWOLFSSL_SP_MATH_ALL
endif
@@ -128,6 +158,8 @@ Wolfssl_Link_Flags := $(SGX_COMMON_CFLAGS) -Wl,--no-undefined -nostdlib -nodefau
-Wl,--version-script=trusted/wolfcrypt.lds
Wolfssl_C_Objects := $(Wolfssl_C_Files:.c=.o)
Wolfssl_C_Objects += $(Wolfssl_S_Files:.S=.o)
Wolfssl_C_Objects += $(Wolfssl_ASM_Files:.asm=.o)
ifeq ($(SGX_MODE), HW)
ifneq ($(SGX_DEBUG), 1)
@@ -137,14 +169,13 @@ endif
endif
endif
override CFLAGS += $(Wolfssl_C_Flags)
override CPPFLAGS += $(Wolfssl_C_Flags)
.PHONY: all run
all: libwolfssl.sgx.static.lib.a
######## WolfSSL Objects ########
libwolfssl.sgx.static.lib.a: $(Wolfssl_C_Objects)
ar rcs libwolfssl.sgx.static.lib.a $(Wolfssl_C_Objects)
@echo "LINK => $@"

18
wolfcrypt/src/sp_x86_64.c
View File

@@ -487,7 +487,7 @@ static WC_INLINE sp_digit div_2048_word_16(sp_digit d1, sp_digit d0,
static WC_INLINE sp_digit div_2048_word_16(sp_digit d1, sp_digit d0,
sp_digit div)
{
register sp_digit r asm("rax");
register sp_digit r __asm__("rax");
ASSERT_SAVED_VECTOR_REGISTERS();
__asm__ __volatile__ (
"divq %3"
@@ -1169,7 +1169,7 @@ static WC_INLINE sp_digit div_2048_word_32(sp_digit d1, sp_digit d0,
static WC_INLINE sp_digit div_2048_word_32(sp_digit d1, sp_digit d0,
sp_digit div)
{
register sp_digit r asm("rax");
register sp_digit r __asm__("rax");
ASSERT_SAVED_VECTOR_REGISTERS();
__asm__ __volatile__ (
"divq %3"
@@ -3494,7 +3494,7 @@ static WC_INLINE sp_digit div_3072_word_24(sp_digit d1, sp_digit d0,
static WC_INLINE sp_digit div_3072_word_24(sp_digit d1, sp_digit d0,
sp_digit div)
{
register sp_digit r asm("rax");
register sp_digit r __asm__("rax");
ASSERT_SAVED_VECTOR_REGISTERS();
__asm__ __volatile__ (
"divq %3"
@@ -4176,7 +4176,7 @@ static WC_INLINE sp_digit div_3072_word_48(sp_digit d1, sp_digit d0,
static WC_INLINE sp_digit div_3072_word_48(sp_digit d1, sp_digit d0,
sp_digit div)
{
register sp_digit r asm("rax");
register sp_digit r __asm__("rax");
ASSERT_SAVED_VECTOR_REGISTERS();
__asm__ __volatile__ (
"divq %3"
@@ -6307,7 +6307,7 @@ static WC_INLINE sp_digit div_4096_word_64(sp_digit d1, sp_digit d0,
static WC_INLINE sp_digit div_4096_word_64(sp_digit d1, sp_digit d0,
sp_digit div)
{
register sp_digit r asm("rax");
register sp_digit r __asm__("rax");
ASSERT_SAVED_VECTOR_REGISTERS();
__asm__ __volatile__ (
"divq %3"
@@ -24991,7 +24991,7 @@ static WC_INLINE sp_digit div_256_word_4(sp_digit d1, sp_digit d0,
static WC_INLINE sp_digit div_256_word_4(sp_digit d1, sp_digit d0,
sp_digit div)
{
register sp_digit r asm("rax");
register sp_digit r __asm__("rax");
ASSERT_SAVED_VECTOR_REGISTERS();
__asm__ __volatile__ (
"divq %3"
@@ -50030,7 +50030,7 @@ static WC_INLINE sp_digit div_384_word_6(sp_digit d1, sp_digit d0,
static WC_INLINE sp_digit div_384_word_6(sp_digit d1, sp_digit d0,
sp_digit div)
{
register sp_digit r asm("rax");
register sp_digit r __asm__("rax");
ASSERT_SAVED_VECTOR_REGISTERS();
__asm__ __volatile__ (
"divq %3"
@@ -91150,7 +91150,7 @@ static WC_INLINE sp_digit div_521_word_9(sp_digit d1, sp_digit d0,
static WC_INLINE sp_digit div_521_word_9(sp_digit d1, sp_digit d0,
sp_digit div)
{
register sp_digit r asm("rax");
register sp_digit r __asm__("rax");
ASSERT_SAVED_VECTOR_REGISTERS();
__asm__ __volatile__ (
"divq %3"
@@ -93393,7 +93393,7 @@ static WC_INLINE sp_digit div_1024_word_16(sp_digit d1, sp_digit d0,
static WC_INLINE sp_digit div_1024_word_16(sp_digit d1, sp_digit d0,
sp_digit div)
{
register sp_digit r asm("rax");
register sp_digit r __asm__("rax");
ASSERT_SAVED_VECTOR_REGISTERS();
__asm__ __volatile__ (
"divq %3"