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Falcon: enable SSE2 for the fpr asm object in the LinuxKM build

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The generated wc_falcon_fpr_x86_64_asm.S implements the fpr seam with SSE2
scalar double math (mulsd/divsd/sqrtsd/ucomisd on xmm; no x87), so its object
needs the vector instructions enabled in the assembler -- the same
ASFLAGS_FPU_DISABLE_SIMD_ENABLE the other vectorized _asm.o files use -- plus
OBJECT_FILES_NON_STANDARD for objtool. Run-time FPU state is handled by the
SAVE_VECTOR_REGISTERS2() wrapping added in falcon.c. The C file falcon.o needs
no rule: the kernel module uses the asm (or emulated) fpr backend, where
falcon.c is integer-only, exactly as the ML-KEM/ML-DSA C poly files do.
This commit is contained in:
Daniele Lacamera
2026-07-20 20:13:05 +02:00
parent c03d48ea93
commit 662b7978fc
1 changed files with 6 additions and 0 deletions
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linuxkm/Kbuild
+6
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@@ -230,6 +230,12 @@ $(obj)/wolfcrypt/src/wc_mlkem_asm.o: asflags-y := $(WOLFSSL_ASFLAGS) $(ASFLAGS_F
$(obj)/wolfcrypt/src/wc_mlkem_asm.o: OBJECT_FILES_NON_STANDARD := y
$(obj)/wolfcrypt/src/wc_mldsa_asm.o: asflags-y := $(WOLFSSL_ASFLAGS) $(ASFLAGS_FPU_DISABLE_SIMD_ENABLE)
$(obj)/wolfcrypt/src/wc_mldsa_asm.o: OBJECT_FILES_NON_STANDARD := y
# Native Falcon fpr backend: scalar double math on SSE2 (mulsd/divsd/sqrtsd,
# no x87), so it needs the vector insns enabled in the assembler like the other
# _asm.o here. The vector registers are saved at run time by the SAVE_VECTOR_
# REGISTERS2() wrapping in falcon.c around signing and keygen.
$(obj)/wolfcrypt/src/wc_falcon_fpr_x86_64_asm.o: asflags-y := $(WOLFSSL_ASFLAGS) $(ASFLAGS_FPU_DISABLE_SIMD_ENABLE)
$(obj)/wolfcrypt/src/wc_falcon_fpr_x86_64_asm.o: OBJECT_FILES_NON_STANDARD := y
ifndef READELF
READELF := readelf