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fix trailing whitespace, adding files to am and know macro

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This commit is contained in:
Hideki Miyazaki
2025-08-01 17:36:23 +09:00
parent a63bb12f6b
commit 8e6b13822b
5 changed files with 4 additions and 3 deletions
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1
.wolfssl_known_macro_extras
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@@ -212,6 +212,7 @@ ESP_PLATFORM
ESP_TASK_MAIN_STACK
ETHERNET_AVAILABLE
EV_TRIGGER
EXTERNAL_LOADER_APP
FORCE_FAILURE_GETRANDOM
FP_ECC_CONTROL
FREERTOS_TCP_WINSIM

1
IDE/Renesas/e2studio/RA6M4/test/src/test_main.c
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@@ -171,7 +171,6 @@ void Clr_CallbackCtx(FSPSM_ST *g)
if (g->wrapped_key_rsapub2048 != NULL)
g->wrapped_key_rsapub2048 = NULL;
#endif
}
#endif

2
IDE/Renesas/e2studio/RA6M4/test/src/wolfssl_sce_unit_test.c
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@@ -1020,7 +1020,7 @@ int sce_crypt_AesCbc_multitest(int devId)
info_aes2.devId = devId;
info_aes256_1.devId = devId;
info_aes256_2.devId = devId;
#if defined(HAVE_AES_CBC) && defined(WOLFSSL_AES_128)
XMEMCPY(&info_aes1.aes_key, &g_user_aes128_key_index1,
sizeof(sce_aes_wrapped_key_t));

1
IDE/Renesas/e2studio/RZN2L/include.am
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@@ -7,6 +7,7 @@ EXTRA_DIST+= IDE/Renesas/e2studio/RZN2L/test/.cproject
EXTRA_DIST+= IDE/Renesas/e2studio/RZN2L/test/.project
EXTRA_DIST+= IDE/Renesas/e2studio/RZN2L/test/src/rzn2l_tst_thread_entry.c
EXTRA_DIST+= IDE/Renesas/e2studio/RZN2L/test/src/wolfssl_dummy.c
EXTRA_DIST+= IDE/Renesas/e2studio/RZN2L/test/src/local_system_init.c
EXTRA_DIST+= IDE/Renesas/e2studio/RZN2L/test/src/test/wolf_client.c
EXTRA_DIST+= IDE/Renesas/e2studio/RZN2L/test/src/test/wolf_server.c
EXTRA_DIST+= IDE/Renesas/e2studio/RZN2L/test/src/test/wolfssl_rsip_unit_test.c

2
IDE/Renesas/e2studio/RZN2L/test/src/test/wolfssl_rsip_unit_test.c
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@@ -1319,7 +1319,7 @@ int rsip_crypt_test()
}
#if defined(WOLFSSL_RENESAS_RSIP_CRYPTONLY)
/*
/*
* Need to be cleaned up before context clear
* for internal instance
*/