Merge pull request #10487 from embhorn/zd21842

Add check for ARM to set WOLFSS_USE_ALIGN

.wolfssl_known_macro_extras

@@ -1012,6 +1012,7 @@ __ARCH_STRNCPY_NO_REDIRECT
 __ARCH_STRSTR_NO_REDIRECT
 __ARM_ARCH_7M__
 __ARM_FEATURE_CRYPTO
+__ARM_FEATURE_UNALIGNED
 __ASSEMBLER__
 __ATOMIC_CONSUME
 __ATOMIC_RELAXED

src/ssl.c

@@ -7536,6 +7536,11 @@ int wolfDTLS_accept_stateless(WOLFSSL* ssl)
     return ret;
 }
 
+/* WC_NO_INLINE: wolfDTLS_accept_stateless passes the address of a stack-local
+ * context here; the restore call before return clears it again. Preventing
+ * inlining hides that cross-frame assignment from GCC's -Wdangling-pointer
+ * analysis, which otherwise flags a false positive on GCC 14+. */
+WC_NO_INLINE
 int wolfDTLS_SetChGoodCb(WOLFSSL* ssl, ClientHelloGoodCb cb, void* user_ctx)
 {
     WOLFSSL_ENTER("wolfDTLS_SetChGoodCb");

wolfssl/wolfcrypt/types.h

@@ -1726,6 +1726,19 @@ WOLFSSL_API word32 CheckRunTimeSettings(void);
 #endif /* WOLFSSL_AESNI || WOLFSSL_ARMASM || USE_INTEL_SPEEDUP || \
         * WOLFSSL_AFALG_XILINX */
 
+/* ARM C-only builds: if the toolchain reports that the target does NOT
+ * support unaligned access, force the alignment-safe code paths. This
+ * catches Cortex-M (ARMv6-M, and ARMv7-M/v8-M built with
+ * -mno-unaligned-access) without penalizing unaligned-capable cores
+ * such as Cortex-A and AArch64. __ARM_FEATURE_UNALIGNED is defined by
+ * GCC, Clang and armclang per the ARM ACLE when unaligned access is
+ * available. */
+#if defined(__arm__) && !defined(__ARM_FEATURE_UNALIGNED)
+    #ifndef WOLFSSL_USE_ALIGN
+        #define WOLFSSL_USE_ALIGN
+    #endif
+#endif
+
 /* Helpers for memory alignment */
 #ifndef XALIGNED
     #if defined(__GNUC__) || defined(__llvm__) || \