enable RNG clock when WOLFSSL_STM32F427_RNG is defined

This commit is contained in:
Chris Conlon
2018-09-04 16:13:09 -06:00
parent 31e37ea5df
commit d3ea903c55

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@@ -1620,6 +1620,9 @@ int wc_GenerateSeed(OS_Seed* os, byte* output, word32 sz)
int i;
(void)os;
/* enable RNG peripheral clock */
RCC->AHB2ENR |= RCC_AHB2ENR_RNGEN;
/* enable RNG interrupt, set IE bit in RNG->CR register */
RNG->CR |= RNG_CR_IE;