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SP int ARM: Fix div word asm to indicate flags changed

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"cc" needs to be set in assembly code as a modified register for div
word for ARM64 and ARM32.
This commit is contained in:
Sean Parkinson
2023-01-14 17:10:51 +10:00
parent 2d8c19ac42
commit e6ef66a777
1 changed files with 4 additions and 4 deletions
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8
wolfcrypt/src/sp_int.c
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@ -1049,7 +1049,7 @@ static WC_INLINE sp_int_digit sp_div_word(sp_int_digit hi, sp_int_digit lo,
: [hi] "+r" (hi), [lo] "+r" (lo), [d] "+r" (d)
:
: "x3", "x4", "x5", "x6"
: "x3", "x4", "x5", "x6", "cc"
);
return hi;
@ -1292,7 +1292,7 @@ static WC_INLINE sp_int_digit sp_div_word(sp_int_digit hi, sp_int_digit lo,
#else
:
#endif
: "r4", "r5", "r6", "r8", "r9"
: "r4", "r5", "r6", "r8", "r9", "cc"
);
return r;
@ -1362,7 +1362,7 @@ static WC_INLINE sp_int_digit sp_div_word(sp_int_digit hi, sp_int_digit lo,
: [hi] "+r" (hi), [lo] "+r" (lo), [d] "+r" (d)
:
: "r3", "r4", "r5", "r6"
: "r3", "r4", "r5", "r6", "cc"
);
return hi;
@ -3222,7 +3222,7 @@ static WC_INLINE sp_int_digit sp_div_word(sp_int_digit hi, sp_int_digit lo,
"movs %[hi], r3\n\t"
: [hi] "+l" (hi), [lo] "+l" (lo), [d] "+l" (d)
:
: "r3", "r4", "r5", "r6", "r7", "r8", "r9"
: "r3", "r4", "r5", "r6", "r7", "r8", "r9", "cc"
);
return (uint32_t)(size_t)hi;
}