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https://github.com/wolfSSL/wolfssl.git
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200 lines
6.1 KiB
Markdown
200 lines
6.1 KiB
Markdown
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# wolfSSL Espressif IDE
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This directory contains documentation and examples for the Espressif SoC devices.
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Although wolfSSL _should_ work on any Espressif device, there's explicit support for these:
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- esp32
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- esp32c2
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- esp32c3
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- esp32c6
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- esp32s2
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- esp32s3
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- esp32h2
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## Getting Started
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If you are new to wolfSSL on the Espressif ESP32, [this video](https://www.youtube.com/watch?v=CzwA3ZBZBZ8)
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can help to get started:
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[](https://www.youtube.com/watch?v=CzwA3ZBZBZ8)
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Additional ESP-IDF specifics can be found in [Espressif/ESP-IDF](./ESP-IDF/README.md). The [wolfSSL Manual](https://www.wolfssl.com/documentation/manuals/wolfssl/index.html) is also a useful
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resource.
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## Requirements
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The wolfSSL Espressif code requires the ESP-IDF to be installed for
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Windows or Linux / MacOS.
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See the Espressif Getting Started Guide.
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Any editor can be used.
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The [wolfSSL examples](./ESP-IDF/examples/README.md) all include a `./VisualGDB` directory with SoC-specific configurations
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to help get started quickly.
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Although not required, a JTAG Adapter can be helpful for development.
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When not using a built-in JTAG from Espressif, the examples typically
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use the open source [Tigard board](https://github.com/tigard-tools/tigard#readme).
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## Examples:
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There are a variety of examples to help get started:
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* [ESP-IDF Examples](./ESP-IDF/README.md)
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## Managed Component
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The wolfSSL library can be installed as a managed component:
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* [Espressif Managed Component Registry](https://www.wolfssl.com/wolfssl-now-available-in-espressif-component-registry/)
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## Notes:
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WSL environment:
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Contents of `/etc/wsl.conf`:
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```text
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[automount]
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options = "metadata"
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```
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To ignore changes in file attributes, see https://github.com/microsoft/WSL/issues/936#issuecomment-1751469229
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```
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git config core.filemode false
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```
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Quick start
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```
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WORKSPACE=/mnt/c/workspace
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WRK_IDF_PATH=/mnt/c/SysGCC/esp32/esp-idf/v5.1
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WRK_WOLFSSL_PATH=${WORKSPACE}/wolfssl-$USER
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WRK_PROJECT_DIR=${WRK_WOLFSSL_PATH}/IDE/Espressif/ESP-IDF/examples/wolfssl_test
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echo "Run export.sh from ${WRK_IDF_PATH}"
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. ${WRK_IDF_PATH}/export.sh
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echo "Build and flash project in ${WRK_PROJECT_DIR}"
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cd ${WRK_PROJECT_DIR}
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idf.py build flash -p /dev/ttyS9 -b 115200 monitor
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```
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Bad chip version:
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```
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ESP-ROM:esp32c3-20200918
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Build:Sep 18 2020
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rst:0x3 (RTC_SW_SYS_RST),boot:0xc (SPI_FAST_FLASH_BOOT)
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Saved PC:0x403d151e
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SPIWP:0xee
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mode:DIO, clock div:2
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load:0x3fcd6100,len:0x16c8
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load:0x403ce000,len:0x930
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load:0x403d0000,len:0x2d28
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entry 0x403ce000
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I (34) boot: ESP-IDF v4.4.2-1-g0aba20e63d-dirty 2nd stage bootloader
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I (35) boot: compile time 08:29:06
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I (35) boot: chip revision: 2
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E (38) boot_comm: This chip is revision 2 but the application is configured for minimum revision 3. Can't run.
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```
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If you've encountered a chip version earlier than that confirmed to be working
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at wolfSSL, try adjusting the settings in `menuconfig`.
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#### A fatal error occurred: This chip is esp[X] not esp[Y]
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```
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A fatal error occurred: This chip is ESP32-S3 not ESP32-C3. Wrong --chip argument?
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CMake Error at run_serial_tool.cmake:56 (message):
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/home/gojimmypi/.espressif/python_env/idf4.4_py3.8_env/bin/python
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/mnt/c/SysGCC/esp32/esp-idf/v4.4.2/components/esptool_py/esptool/esptool.py
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--chip esp32c3 failed
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```
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Delete the `./build` and rename/delete your `sdkconfig` file, then run
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`idf.py set-target`, in this example setting to `esp32c3`:
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```bash
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idf.py set-target esp32c3
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```
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#### Cmake Cache Warning
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```
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Executing action: clean
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Project sdkconfig was generated for target 'esp32s3', but CMakeCache.txt contains 'esp32c3'. To keep the setting in sdkconfig (esp32s3) and re-generate CMakeCache.txt, run 'idf.py fullclean'. To re-generate sdkconfig for 'esp32c3' target, run 'idf.py set-target esp32c3'.
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```
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As indicated, run `idf.py set-target` and/or delete the `./build` directory.
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#### Connecting, but fails to connect.
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Some devices, particularly 3rd party, non-Espressif dev boards may not have implemented
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the reset-program hardware properly, causing devices to not be programmed with the
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`idf.py flash` command:
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```
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Connecting......................................
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A fatal error occurred: Failed to connect to ESP32: Wrong boot mode detected (0x13)! The chip needs to be in download mode.
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CMake Error at run_serial_tool.cmake:56 (message):
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/home/gojimmypi/.espressif/python_env/idf4.4_py3.8_env/bin/python
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/mnt/c/SysGCC/esp32/esp-idf/v4.4.2/components/esptool_py/esptool/esptool.py
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--chip esp32 failed
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```
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Solution:
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Press and hold `EN` button, press and release `IO0` button, then release `EN` button.
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### Unknown CMake command "esptool_py_flash_project_args".
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This unintuitive error was observed when including an unneeded `set(COMPONENTS` in the project-level CMakeLists.txt
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and attempting to build with an older toolchain, such as the RTOS SDK 3.4 for the ESP8266.
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### PermissionError: [Errno 13] Permission denied could not open port {}
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This error, other than the obvious permissions, also occurs when the port is in use by another application:
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```text
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Traceback (most recent call last):
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File "/home/gojimmypi/.espressif/python_env/rtos3.4_py3.10_env/lib/python3.10/site-packages/serial/serialposix.py", line 322, in open
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self.fd = os.open(self.portstr, os.O_RDWR | os.O_NOCTTY | os.O_NONBLOCK)
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PermissionError: [Errno 13] Permission denied: '/dev/ttyS55'
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During handling of the above exception, another exception occurred:
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Traceback (most recent call last):
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[... snip ...]
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raise SerialException(msg.errno, "could not open port {}: {}".format(self._port, msg))
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serial.serialutil.SerialException: [Errno 13] could not open port /dev/ttyS55: [Errno 13] Permission denied: '/dev/ttyS55'
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```
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### Panic Task watchdog got triggered.
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Long-running code may trip the watchdog timer.
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```
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Task watchdog got triggered.
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Guru Meditation Error: Core 0 panic'ed (unknown). Exception was unhandled.
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```
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The watchdog needs to be fed on a regular basis
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with `void esp_task_wdt_reset(void)` from `esp8266/include/esp_task_wdt.h`.
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Try turning off the WDT in menuconfig, or for Makefiles:
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```
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EXTRA_CFLAGS += -DNO_WATCHDOG
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```
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#### Other Solutions
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See also Espressif `esp-faq-en-master.pdf`
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