Sean Parkinson bc5262a5d0 SP ARM 32: Fixes to get building for armv7-a ...

Change ldrd to either have even first register or change over to ldm
with even first register.
Ensure shift value in ORR instruction has a hash before it.
Don't index loads and stores by 256 or more - make them post-index.
div2 for P521 simplified.

2022-05-20 12:15:58 +10:00

..

benchmark

Fix main signature in benchmark.c.

2022-05-17 14:28:43 -07:00

src

SP ARM 32: Fixes to get building for armv7-a

2022-05-20 12:15:58 +10:00

test

Merge pull request #5080 from JacobBarthelmeh/DH

2022-05-13 08:57:33 -07:00

user-crypto

typographic cleanup: fix whitespace, remove unneeded UTF-8, convert C++ comment constructs to C.

2021-11-08 17:35:05 -06:00