yath/ghidra-xtensa
1
0
Fork 1
mirror of https://github.com/yath/ghidra-xtensa.git synced 2025-08-04 03:14:28 +02:00
Code Issues Packages Projects Releases Wiki Activity

Fix DWARF register mappings

Browse Source 
auto_count apparently counts the starting register as the 1st, so count
one further to get to a15.
This commit is contained in:
Sebastian Schmidt
2020-01-05 17:22:42 +01:00
parent 33ca0710c9
commit 83112e48da
2 changed files with 2 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
data/languages/xtensa.dwarf
View File

@@ -2,6 +2,6 @@
<register_mappings>
<register_mapping dwarf="0" ghidra="a0"/>
<register_mapping dwarf="1" ghidra="a1" stackpointer="true"/>
<register_mapping dwarf="2" ghidra="a2" auto_count="13"/> <!-- a2..a15 -->
<register_mapping dwarf="2" ghidra="a2" auto_count="14"/> <!-- a2..a15 -->
</register_mappings>
</dwarf>

2
data/languages/xtensa.ldefs
View File

@@ -12,6 +12,6 @@
id="Xtensa:LE:32:default">
<description>Tensilica Xtensa 32-bit little-endian</description>
<compiler name="default" spec="xtensa.cspec" id="default"/>
<!-- <external_name tool="DWARF.register.mapping.file" name="xtensa.dwarf"/> -->
<external_name tool="DWARF.register.mapping.file" name="xtensa.dwarf"/>
</language>
</language_definitions>