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mmu: simplify mmu_hal_init

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This commit is contained in:
Armando
2022-04-21 21:55:44 +08:00
parent 63ac5e4a99
commit 2764cd5682
8 changed files with 92 additions and 19 deletions
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25
components/hal/esp32/include/hal/mmu_ll.h
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@@ -9,10 +9,10 @@
#pragma once
#include "soc/ext_mem_defs.h"
#include "soc/dport_reg.h"
#include "soc/dport_access.h"
#include "hal/assert.h"
#include "hal/mmu_types.h"
#include "soc/mmu.h"
#include "soc/dport_access.h"
#ifdef __cplusplus
extern "C" {
@@ -82,11 +82,11 @@ static inline void mmu_ll_set_entry_invalid(uint32_t mmu_id, uint32_t entry_id)
DPORT_INTERRUPT_DISABLE();
switch (mmu_id) {
case MMU_TABLE_PRO:
DPORT_WRITE_PERI_REG((uint32_t)&SOC_MMU_DPORT_PRO_FLASH_MMU_TABLE[entry_id], SOC_MMU_INVALID_ENTRY_VAL);
case 0:
DPORT_WRITE_PERI_REG((uint32_t)&DPORT_PRO_FLASH_MMU_TABLE[entry_id], DPORT_FLASH_MMU_TABLE_INVALID_VAL);
break;
case MMU_TABLE_APP:
DPORT_WRITE_PERI_REG((uint32_t)&SOC_MMU_DPORT_APP_FLASH_MMU_TABLE[entry_id], SOC_MMU_INVALID_ENTRY_VAL);
case 1:
DPORT_WRITE_PERI_REG((uint32_t)&DPORT_APP_FLASH_MMU_TABLE[entry_id], DPORT_FLASH_MMU_TABLE_INVALID_VAL);
break;
default:
HAL_ASSERT(false && "invalid mmu_id");
@@ -94,6 +94,19 @@ static inline void mmu_ll_set_entry_invalid(uint32_t mmu_id, uint32_t entry_id)
DPORT_INTERRUPT_RESTORE();
}
/**
* Unmap all the items in the MMU table
*
* @param mmu_id MMU ID
*/
__attribute__((always_inline))
static inline void mmu_ll_unmap_all(uint32_t mmu_id)
{
for (int i = 0; i < MMU_MAX_ENTRY_NUM; i++) {
mmu_ll_set_entry_invalid(mmu_id, i);
}
}
#ifdef __cplusplus
}
#endif

13
components/hal/esp32c2/include/hal/mmu_ll.h
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@@ -162,6 +162,19 @@ static inline void mmu_ll_set_entry_invalid(uint32_t mmu_id, uint32_t entry_id)
*(uint32_t *)(DR_REG_MMU_TABLE + entry_id * 4) = MMU_INVALID;
}
/**
* Unmap all the items in the MMU table
*
* @param mmu_id MMU ID
*/
__attribute__((always_inline))
static inline void mmu_ll_unmap_all(uint32_t mmu_id)
{
for (int i = 0; i < MMU_MAX_ENTRY_NUM; i++) {
mmu_ll_set_entry_invalid(mmu_id, i);
}
}
#ifdef __cplusplus
}
#endif

13
components/hal/esp32c3/include/hal/mmu_ll.h
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@@ -129,6 +129,19 @@ static inline void mmu_ll_set_entry_invalid(uint32_t mmu_id, uint32_t entry_id)
*(uint32_t *)(DR_REG_MMU_TABLE + entry_id * 4) = MMU_INVALID;
}
/**
* Unmap all the items in the MMU table
*
* @param mmu_id MMU ID
*/
__attribute__((always_inline))
static inline void mmu_ll_unmap_all(uint32_t mmu_id)
{
for (int i = 0; i < MMU_MAX_ENTRY_NUM; i++) {
mmu_ll_set_entry_invalid(mmu_id, i);
}
}
#ifdef __cplusplus
}
#endif

13
components/hal/esp32h2/include/hal/mmu_ll.h
View File

@@ -129,6 +129,19 @@ static inline void mmu_ll_set_entry_invalid(uint32_t mmu_id, uint32_t entry_id)
*(uint32_t *)(DR_REG_MMU_TABLE + entry_id * 4) = MMU_INVALID;
}
/**
* Unmap all the items in the MMU table
*
* @param mmu_id MMU ID
*/
__attribute__((always_inline))
static inline void mmu_ll_unmap_all(uint32_t mmu_id)
{
for (int i = 0; i < MMU_MAX_ENTRY_NUM; i++) {
mmu_ll_set_entry_invalid(mmu_id, i);
}
}
#ifdef __cplusplus
}
#endif

13
components/hal/esp32s2/include/hal/mmu_ll.h
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@@ -153,6 +153,19 @@ static inline void mmu_ll_set_entry_invalid(uint32_t mmu_id, uint32_t entry_id)
*(uint32_t *)(DR_REG_MMU_TABLE + entry_id * 4) = MMU_INVALID;
}
/**
* Unmap all the items in the MMU table
*
* @param mmu_id MMU ID
*/
__attribute__((always_inline))
static inline void mmu_ll_unmap_all(uint32_t mmu_id)
{
for (int i = 0; i < MMU_MAX_ENTRY_NUM; i++) {
mmu_ll_set_entry_invalid(mmu_id, i);
}
}
#ifdef __cplusplus
}
#endif

13
components/hal/esp32s3/include/hal/mmu_ll.h
View File

@@ -129,6 +129,19 @@ static inline void mmu_ll_set_entry_invalid(uint32_t mmu_id, uint32_t entry_id)
*(uint32_t *)(DR_REG_MMU_TABLE + entry_id * 4) = MMU_INVALID;
}
/**
* Unmap all the items in the MMU table
*
* @param mmu_id MMU ID
*/
__attribute__((always_inline))
static inline void mmu_ll_unmap_all(uint32_t mmu_id)
{
for (int i = 0; i < MMU_MAX_ENTRY_NUM; i++) {
mmu_ll_set_entry_invalid(mmu_id, i);
}
}
#ifdef __cplusplus
}
#endif

15
components/hal/mmu_hal.c
View File

@@ -30,20 +30,9 @@
void mmu_hal_init(void)
{
#if CONFIG_IDF_TARGET_ESP32
mmu_init(0);
mmu_ll_unmap_all(0);
#if !CONFIG_FREERTOS_UNICORE
/**
* The lines which manipulate DPORT_APP_CACHE_MMU_IA_CLR bit are necessary to work around a hardware bug.
* See ESP32 Errata 3.1
*/
DPORT_REG_SET_BIT(DPORT_APP_CACHE_CTRL1_REG, DPORT_APP_CACHE_MMU_IA_CLR);
mmu_init(1);
DPORT_REG_CLR_BIT(DPORT_APP_CACHE_CTRL1_REG, DPORT_APP_CACHE_MMU_IA_CLR);
#endif
#else //!esp32
Cache_MMU_Init();
mmu_ll_unmap_all(1);
#endif
}

6
components/soc/esp32/include/soc/ext_mem_defs.h
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@@ -37,6 +37,12 @@ extern "C" {
#define ADDRESS_IN_DRAM1_CACHE(vaddr) ADDRESS_IN_BUS(DRAM1_CACHE, vaddr)
#define ADDRESS_IN_DROM0_CACHE(vaddr) ADDRESS_IN_BUS(DROM0_CACHE, vaddr)
/**
* Max MMU entry num.
* `MMU_MAX_ENTRY_NUM * MMU_PAGE_SIZE` means the max paddr and vaddr region supported by the MMU. e.g.:
* 256 * 64KB, means MMU can map 16MB at most
*/
#define MMU_MAX_ENTRY_NUM 256
#ifdef __cplusplus
}