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Merge branch 'fix/flash_qio_read_failed' into 'master'

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fix(spi_flash): Fix spi flash qio read failed on gpspi flash

See merge request espressif/esp-idf!41204
This commit is contained in:
C.S.M
2025-08-20 16:11:06 +08:00
parent e31611d6a3 34f9863115
commit 65a6e9c294
3 changed files with 5 additions and 8 deletions
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6
components/hal/spi_flash_hal_common.inc
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@@ -125,9 +125,9 @@ esp_err_t spi_flash_hal_configure_host_io_mode(
* - DIO is similar.
*/
if (conf_required) {
#if !SOC_SPI_MEM_SUPPORT_WB_MODE_INDEPENDENT_CONTROL
int line_width = (io_mode == SPI_FLASH_DIO? 2: 4);
dummy_cyclelen_base -= SPI_FLASH_LL_CONTINUOUS_MODE_BIT_NUMS / line_width;
#if !SOC_SPI_MEM_SUPPORT_WB_MODE_INDEPENDENT_CONTROL
addr_bitlen += SPI_FLASH_LL_CONTINUOUS_MODE_BIT_NUMS;
#endif
spi_flash_ll_set_extra_address(dev, 0);
@@ -145,7 +145,9 @@ esp_err_t spi_flash_hal_configure_host_io_mode(
}
#endif
#else
gpspi_flash_ll_set_dummy_out(dev, (conf_required? 1: 0), 1);
if (conf_required) {
gpspi_flash_ll_set_dummy_out(dev, (conf_required? 1: 0), 1);
}
#endif
#if SOC_IS(ESP32P4)

2
components/spi_flash/esp_flash_spi_init.c
View File

@@ -294,7 +294,7 @@ static uint32_t init_gpspi_clock(esp_flash_t *chip, const esp_flash_spi_device_c
#if GPSPI_FLASH_LL_SUPPORT_CLK_SRC_PRE_DIV
uint32_t pre_div = s_spi_find_clock_src_pre_div(clk_src_freq, GPSPI_FLASH_LL_PERIPHERAL_FREQUENCY_MHZ * 1000 * 1000);
gpspi_flash_ll_clk_source_pre_div(spi_flash_ll_get_hw(config->host_id), pre_div / 2, 2);
final_freq_mhz = clk_src_freq / (1 * 1000 * 1000) / (pre_div);
final_freq_mhz = clk_src_freq / (pre_div);
#else
final_freq_mhz = clk_src_freq / (1 * 1000 * 1000);
#endif

5
components/spi_flash/include/spi_flash/spi_flash_defs.h
View File

@@ -57,13 +57,8 @@
#define CMD_RDSFDP 0x5A /* Read the SFDP of the flash */
#if !SOC_SPI_MEM_SUPPORT_WB_MODE_INDEPENDENT_CONTROL
#define SPI_FLASH_DIO_DUMMY_BITLEN 4
#define SPI_FLASH_QIO_DUMMY_BITLEN 6
#else
#define SPI_FLASH_DIO_DUMMY_BITLEN 0
#define SPI_FLASH_QIO_DUMMY_BITLEN 4
#endif
#define SPI_FLASH_DIO_ADDR_BITLEN 24
#define SPI_FLASH_QIO_ADDR_BITLEN 24
#define SPI_FLASH_QOUT_ADDR_BITLEN 24