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Merge branch 'bugfix/esp32s2_disable_bss_extram_v4.3' into 'release/v4.3'
esp32s2: disable bss extram option, clean up spiram init code a bit (v4.3) See merge request espressif/esp-idf!13733
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@@ -135,21 +135,9 @@ void IRAM_ATTR esp_spiram_init_cache(void)
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Cache_Dbus_MMU_Set(MMU_ACCESS_SPIRAM, SPIRAM_SMALL_SIZE_MAP_VADDR, SPIRAM_SMALL_SIZE_MAP_PADDR, 64, SPIRAM_SMALL_SIZE_MAP_SIZE >> 16, 0);
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REG_CLR_BIT(EXTMEM_PRO_DCACHE_CTRL1_REG, EXTMEM_PRO_DCACHE_MASK_DRAM1 | EXTMEM_PRO_DCACHE_MASK_DRAM0 | EXTMEM_PRO_DCACHE_MASK_DPORT);
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} else {
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#if CONFIG_SPIRAM_USE_AHB_DBUS3// TODO Ready to remove this macro esp32s2 no AHB bus access cache
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if (spiram_size <= DRAM0_DRAM1_DPORT_DBUS3_CACHE_SIZE) {
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/* cache size <= 14MB + 512KB, map DRAM0, DRAM1, DPORT bus, as well as data bus3 */
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Cache_Dbus_MMU_Set(MMU_ACCESS_SPIRAM, SPIRAM_MID_SIZE_MAP_VADDR, SPIRAM_MID_SIZE_MAP_PADDR, 64, SPIRAM_MID_SIZE_MAP_SIZE >> 16, 0);
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} else {
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/* cache size > 14MB + 512KB, map DRAM0, DRAM1, DPORT bus, as well as data bus3 */
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Cache_Dbus_MMU_Set(MMU_ACCESS_SPIRAM, SPIRAM_BIG_SIZE_MAP_VADDR, SPIRAM_BIG_SIZE_MAP_PADDR, 64, SPIRAM_BIG_SIZE_MAP_SIZE >> 16, 0);
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}
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Cache_Dbus_MMU_Set(MMU_ACCESS_SPIRAM, SPIRAM_MID_BIG_SIZE_MAP_VADDR, SPIRAM_MID_BIG_SIZE_MAP_PADDR, 64, SPIRAM_MID_BIG_SIZE_MAP_SIZE >> 16, 0);
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REG_CLR_BIT(EXTMEM_PRO_DCACHE_CTRL1_REG, EXTMEM_PRO_DCACHE_MASK_DRAM1 | EXTMEM_PRO_DCACHE_MASK_DRAM0 | EXTMEM_PRO_DCACHE_MASK_DPORT | EXTMEM_PRO_DCACHE_MASK_BUS3);
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#else
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/* cache size > 10MB + 512KB, map DRAM0, DRAM1, DPORT bus , only remap 0x3f500000 ~ 0x3ff90000*/
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Cache_Dbus_MMU_Set(MMU_ACCESS_SPIRAM, DPORT_CACHE_ADDRESS_LOW, SPIRAM_SMALL_SIZE_MAP_PADDR, 64, DRAM0_DRAM1_DPORT_CACHE_SIZE >> 16, 0);
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REG_CLR_BIT(EXTMEM_PRO_DCACHE_CTRL1_REG, EXTMEM_PRO_DCACHE_MASK_DRAM1 | EXTMEM_PRO_DCACHE_MASK_DRAM0 | EXTMEM_PRO_DCACHE_MASK_DPORT);
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#endif
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}
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Cache_Resume_DCache(0);
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}
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@@ -330,53 +318,25 @@ esp_err_t esp_spiram_add_to_heapalloc(void)
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{
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size_t spiram_size = esp_spiram_get_size();
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uint32_t size_for_flash = (pages_for_flash << 16);
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intptr_t vaddr;
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ESP_EARLY_LOGI(TAG, "Adding pool of %dK of external SPI memory to heap allocator", (spiram_size - (pages_for_flash << 16))/1024);
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//Add entire external RAM region to heap allocator. Heap allocator knows the capabilities of this type of memory, so there's
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//no need to explicitly specify them.
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if (spiram_size <= DRAM0_DRAM1_DPORT_CACHE_SIZE) {
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/* cache size <= 10MB + 512KB, map DRAM0, DRAM1, DPORT bus */
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return heap_caps_add_region((intptr_t)SPIRAM_SMALL_SIZE_MAP_VADDR + size_for_flash, (intptr_t)SPIRAM_SMALL_SIZE_MAP_VADDR + SPIRAM_SMALL_SIZE_MAP_SIZE -1);
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} else {
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#if CONFIG_SPIRAM_USE_AHB_DBUS3 //TODO
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if (spiram_size <= DRAM0_DRAM1_DPORT_DBUS3_CACHE_SIZE) {
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/* cache size <= 14MB + 512KB, map DRAM0, DRAM1, DPORT bus, as well as data bus3 */
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if (size_for_flash <= SPIRAM_MID_SIZE_MAP_SIZE) {
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esp_err_t err = heap_caps_add_region((intptr_t)SPIRAM_MID_SIZE_MAP_VADDR + size_for_flash, (intptr_t)SPIRAM_MID_SIZE_MAP_VADDR + SPIRAM_MID_SIZE_MAP_SIZE -1);
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if (err) {
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return err;
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}
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return heap_caps_add_region((intptr_t)SPIRAM_MID_BIG_SIZE_MAP_VADDR, (intptr_t)SPIRAM_MID_BIG_SIZE_MAP_VADDR + SPIRAM_MID_BIG_SIZE_MAP_SIZE -1);
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} else {
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return heap_caps_add_region((intptr_t)SPIRAM_MID_BIG_SIZE_MAP_VADDR + size_for_flash - SPIRAM_MID_SIZE_MAP_SIZE, (intptr_t)SPIRAM_MID_BIG_SIZE_MAP_VADDR + SPIRAM_MID_BIG_SIZE_MAP_SIZE -1);
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}
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} else {
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if (size_for_flash <= SPIRAM_SIZE_EXC_DATA_CACHE) {
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esp_err_t err = heap_caps_add_region((intptr_t)SPIRAM_BIG_SIZE_MAP_VADDR, (intptr_t)SPIRAM_BIG_SIZE_MAP_VADDR + SPIRAM_BIG_SIZE_MAP_SIZE -1);
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if (err) {
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return err;
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}
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return heap_caps_add_region((intptr_t)SPIRAM_MID_BIG_SIZE_MAP_VADDR, (intptr_t)SPIRAM_MID_BIG_SIZE_MAP_VADDR + SPIRAM_MID_BIG_SIZE_MAP_SIZE -1);
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} else if (size_for_flash <= SPIRAM_SIZE_EXC_DRAM0_DRAM1_DPORT) {
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esp_err_t err = heap_caps_add_region((intptr_t)SPIRAM_BIG_SIZE_MAP_VADDR + size_for_flash - SPIRAM_SIZE_EXC_DATA_CACHE, (intptr_t)SPIRAM_MID_SIZE_MAP_VADDR + SPIRAM_MID_SIZE_MAP_SIZE -1);
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if (err) {
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return err;
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}
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return heap_caps_add_region((intptr_t)SPIRAM_MID_BIG_SIZE_MAP_VADDR, (intptr_t)SPIRAM_MID_BIG_SIZE_MAP_VADDR + SPIRAM_MID_BIG_SIZE_MAP_SIZE -1);
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} else {
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return heap_caps_add_region((intptr_t)SPIRAM_MID_BIG_SIZE_MAP_VADDR + size_for_flash - SPIRAM_SIZE_EXC_DRAM0_DRAM1_DPORT, (intptr_t)SPIRAM_MID_BIG_SIZE_MAP_VADDR + SPIRAM_MID_BIG_SIZE_MAP_SIZE -1);
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}
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}
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#else
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Cache_Dbus_MMU_Set(MMU_ACCESS_SPIRAM, DPORT_CACHE_ADDRESS_LOW, SPIRAM_SMALL_SIZE_MAP_PADDR, 64, DRAM0_DRAM1_DPORT_CACHE_SIZE >> 16, 0);
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if (size_for_flash <= SPIRAM_SIZE_EXC_DRAM0_DRAM1_DPORT) {
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return heap_caps_add_region((intptr_t)DPORT_CACHE_ADDRESS_LOW, (intptr_t)DPORT_CACHE_ADDRESS_LOW + DRAM0_DRAM1_DPORT_CACHE_SIZE -1);
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} else {
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return heap_caps_add_region((intptr_t)DPORT_CACHE_ADDRESS_LOW + size_for_flash, (intptr_t)DPORT_CACHE_ADDRESS_LOW + DRAM0_DRAM1_DPORT_CACHE_SIZE -1);
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}
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return ESP_OK;
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#endif
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vaddr = SPIRAM_SMALL_SIZE_MAP_VADDR;
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return heap_caps_add_region(vaddr + size_for_flash, vaddr + spiram_size - 1);
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}
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vaddr = DPORT_CACHE_ADDRESS_LOW;
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Cache_Dbus_MMU_Set(MMU_ACCESS_SPIRAM, vaddr, SPIRAM_SMALL_SIZE_MAP_PADDR, 64, DRAM0_DRAM1_DPORT_CACHE_SIZE >> 16, 0);
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if (size_for_flash <= SPIRAM_SIZE_EXC_DRAM0_DRAM1_DPORT) {
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return heap_caps_add_region(vaddr, vaddr + DRAM0_DRAM1_DPORT_CACHE_SIZE - 1);
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}
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// Largest size
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return heap_caps_add_region(vaddr + size_for_flash, vaddr + DRAM0_DRAM1_DPORT_CACHE_SIZE -1);
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}
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@@ -92,7 +92,7 @@ config SPIRAM_MALLOC_RESERVE_INTERNAL
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config SPIRAM_ALLOW_BSS_SEG_EXTERNAL_MEMORY
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bool "Allow .bss segment placed in external memory"
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default n
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depends on SPIRAM
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depends on SPIRAM && IDF_TARGET_ESP32 # TODO ESP32-S2 IDFGH-4320, ESP32-S3 IDF-1974
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select ESP_ALLOW_BSS_SEG_EXTERNAL_MEMORY
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help
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If enabled, variables with EXT_RAM_ATTR attribute will be placed in SPIRAM instead of internal DRAM.
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@@ -31,10 +31,12 @@ Configuring External RAM
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ESP-IDF fully supports the use of external memory in applications. Once the external RAM is initialized at startup, ESP-IDF can be configured to handle it in several ways:
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* :ref:`external_ram_config_memory_map`
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* :ref:`external_ram_config_capability_allocator`
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* :ref:`external_ram_config_malloc` (default)
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* :ref:`external_ram_config_bss`
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.. list::
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* :ref:`external_ram_config_memory_map`
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* :ref:`external_ram_config_capability_allocator`
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* :ref:`external_ram_config_malloc` (default)
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:esp32: * :ref:`external_ram_config_bss`
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.. _external_ram_config_memory_map:
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@@ -83,23 +85,24 @@ If a suitable block of preferred internal/external memory is not available, the
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Because some buffers can only be allocated in internal memory, a second configuration item :ref:`CONFIG_SPIRAM_MALLOC_RESERVE_INTERNAL` defines a pool of internal memory which is reserved for *only* explicitly internal allocations (such as memory for DMA use). Regular ``malloc()`` will not allocate from this pool. The :ref:`MALLOC_CAP_DMA <dma-capable-memory>` and ``MALLOC_CAP_INTERNAL`` flags can be used to allocate memory from this pool.
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.. _external_ram_config_bss:
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.. only:: esp32
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.. _external_ram_config_bss:
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Allow .bss segment placed in external memory
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--------------------------------------------
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Allow .bss segment placed in external memory
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--------------------------------------------
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Enable this option by checking :ref:`CONFIG_SPIRAM_ALLOW_BSS_SEG_EXTERNAL_MEMORY`. This configuration setting is independent of the other three.
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Enable this option by checking :ref:`CONFIG_SPIRAM_ALLOW_BSS_SEG_EXTERNAL_MEMORY`. This configuration setting is independent of the other three.
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If enabled, a region of the address space starting from 0x3F800000 will be used to store zero-initialized data (BSS segment) from the lwIP, net80211, libpp, and bluedroid ESP-IDF libraries.
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If enabled, a region of the address space starting from 0x3F800000 will be used to store zero-initialized data (BSS segment) from the lwIP, net80211, libpp, and bluedroid ESP-IDF libraries.
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Additional data can be moved from the internal BSS segment to external RAM by applying the macro ``EXT_RAM_ATTR`` to any static declaration (which is not initialized to a non-zero value).
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Additional data can be moved from the internal BSS segment to external RAM by applying the macro ``EXT_RAM_ATTR`` to any static declaration (which is not initialized to a non-zero value).
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It is also possible to place the BSS section of a component or a library to external RAM using linker fragment scheme ``extram_bss``.
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It is also possible to place the BSS section of a component or a library to external RAM using linker fragment scheme ``extram_bss``.
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This option reduces the internal static memory used by the BSS segment.
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This option reduces the internal static memory used by the BSS segment.
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Remaining external RAM can also be added to the capability heap allocator using the method shown above.
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Remaining external RAM can also be added to the capability heap allocator using the method shown above.
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Restrictions
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@@ -31,10 +31,12 @@
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ESP-IDF 完全支持将外部存储器集成到您的应用程序中。在启动并完成片外 RAM 初始化后,可以将 ESP-IDF 配置为以多种方式处理片外 RAM:
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* :ref:`external_ram_config_memory_map`
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* :ref:`external_ram_config_capability_allocator`
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* :ref:`external_ram_config_malloc` (默认)
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* :ref:`external_ram_config_bss`
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.. list::
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* :ref:`external_ram_config_memory_map`
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* :ref:`external_ram_config_capability_allocator`
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* :ref:`external_ram_config_malloc` (默认)
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:esp32: * :ref:`external_ram_config_bss`
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.. _external_ram_config_memory_map:
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@@ -83,23 +85,25 @@ ESP-IDF 启动过程中,片外 RAM 被映射到以 0x3F800000 起始的数据
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由于有些 Buffer 仅可在内部存储器中分配,因此需要使用第二个配置项 :ref:`CONFIG_SPIRAM_MALLOC_RESERVE_INTERNAL` 定义一个内部存储池,仅限显式的内部存储器分配使用(例如用于 DMA 的存储器)。常规 ``malloc()`` 将不会从该池中分配,但可以使用 :ref:`MALLOC_CAP_DMA <dma-capable-memory>` 和 ``MALLOC_CAP_INTERNAL`` 旗标从该池中分配存储器。
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.. _external_ram_config_bss:
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.. only:: esp32
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.. _external_ram_config_bss:
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允许 .bss 段放入片外存储器
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-----------------------------
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允许 .bss 段放入片外存储器
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-----------------------------
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通过检查 :ref:`CONFIG_SPIRAM_ALLOW_BSS_SEG_EXTERNAL_MEMORY` 启用该选项,此选项配置与上面三个选项互不影响。
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通过检查 :ref:`CONFIG_SPIRAM_ALLOW_BSS_SEG_EXTERNAL_MEMORY` 启用该选项,此选项配置与上面三个选项互不影响。
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启用该选项后,从 0x3F800000 起始的地址空间将用于存储来自 lwip、net80211、libpp 和 bluedroid ESP-IDF 库中零初始化的数据(BSS 段)。
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启用该选项后,从 0x3F800000 起始的地址空间将用于存储来自 lwip、net80211、libpp 和 bluedroid ESP-IDF 库中零初始化的数据(BSS 段)。
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``EXT_RAM_ATTR`` 宏应用于任何静态声明(未初始化为非零值)之后,可以将附加数据从内部 BSS 段移到片外 RAM。
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``EXT_RAM_ATTR`` 宏应用于任何静态声明(未初始化为非零值)之后,可以将附加数据从内部 BSS 段移到片外 RAM。
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也可以使用链接器片段方案 ``extram_bss`` 将组件或库的 BSS 段放到片外 RAM 中。
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也可以使用链接器片段方案 ``extram_bss`` 将组件或库的 BSS 段放到片外 RAM 中。
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启用此选项可以减少 BSS 段占用的内部静态存储。
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启用此选项可以减少 BSS 段占用的内部静态存储。
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剩余的片外 RAM 也可以通过上述方法添加到堆分配器中。
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剩余的片外 RAM 也可以通过上述方法添加到堆分配器中。
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片外 RAM 使用限制
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===================
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@@ -114,8 +118,11 @@ ESP-IDF 启动过程中,片外 RAM 被映射到以 0x3F800000 起始的数据
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* 片外 RAM 不可用作任务堆栈存储器。因此 :cpp:func:`xTaskCreate` 及类似函数将始终为堆栈和任务 TCB 分配片上储存器,而 :cpp:func:`xTaskCreateStatic` 类型的函数将检查传递的 Buffer 是否属于片上存储器。
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* 默认情况下,片外 RAM 初始化失败将终止 ESP-IDF 启动。如果想禁用此功能,可启用 :ref:`CONFIG_SPIRAM_IGNORE_NOTFOUND` 配置选项。如果启用 :ref:`CONFIG_SPIRAM_ALLOW_BSS_SEG_EXTERNAL_MEMORY`,:ref:`CONFIG_SPIRAM_IGNORE_NOTFOUND` 选项将不能使用,这是因为在链接时,链接器已经向片外 RAM 分配符号。
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* 默认情况下,片外 RAM 初始化失败将终止 ESP-IDF 启动。如果想禁用此功能,可启用 :ref:`CONFIG_SPIRAM_IGNORE_NOTFOUND` 配置选项。
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.. only:: esp32
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如果启用 :ref:`CONFIG_SPIRAM_ALLOW_BSS_SEG_EXTERNAL_MEMORY`,:ref:`CONFIG_SPIRAM_IGNORE_NOTFOUND` 选项将不能使用,这是因为在链接时,链接器已经向片外 RAM 分配符号。
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.. only:: esp32
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