versions: Update version to 4.4.1

Merge branch 'bugfix/iperf_performance_v4.4' into 'release/v4.4'
Bugfix/iperf performance (v4.4) See merge request espressif/esp-idf!17600
2026-06-17 09:23:56 +02:00 · 2022-04-16 09:43:14 +08:00 · 2022-04-15 15:52:13 +08:00 · 2022-04-15 15:07:05 +08:00 · 2022-04-14 18:26:35 +08:00 · 2022-04-13 12:15:38 +08:00
641 changed files with 26545 additions and 18137 deletions
@@ -56,7 +56,7 @@ variables:

  # Docker images
  BOT_DOCKER_IMAGE_TAG: ":latest"
-  ESP_IDF_DOC_ENV_IMAGE: "$CI_DOCKER_REGISTRY/esp-idf-doc-env:v4.4-1-v4"
+  ESP_IDF_DOC_ENV_IMAGE: "$CI_DOCKER_REGISTRY/esp-idf-doc-env:v4.4-1-v5"
  ESP_ENV_IMAGE: "$CI_DOCKER_REGISTRY/esp-env:v4.4-1"
  AFL_FUZZER_TEST_IMAGE: "$CI_DOCKER_REGISTRY/afl-fuzzer-test:v4.4-1-1"
  CLANG_STATIC_ANALYSIS_IMAGE: "${CI_DOCKER_REGISTRY}/clang-static-analysis:v4.4-1-2"
@@ -68,7 +68,7 @@ variables:
  # target test repo parameters
  TEST_ENV_CONFIG_REPO: "https://gitlab-ci-token:${BOT_TOKEN}@${CI_SERVER_HOST}:${CI_SERVER_PORT}/qa/ci-test-runner-configs.git"
  CI_AUTO_TEST_SCRIPT_REPO_URL: "https://gitlab-ci-token:${BOT_TOKEN}@${CI_SERVER_HOST}:${CI_SERVER_PORT}/qa/auto_test_script.git"
-  CI_AUTO_TEST_SCRIPT_REPO_BRANCH: "ci/v3.1"
+  CI_AUTO_TEST_SCRIPT_REPO_BRANCH: "ci/v4.1"

 .setup_tools_unless_target_test: &setup_tools_unless_target_test |
  if [[ -n "$IDF_DONT_USE_MIRRORS" ]]; then
@@ -1,54 +1,134 @@
-assign_test:
-  extends: .rules:test:any_test
-  tags:
-    - assign_test
+.assign_test_template:
  image: $CI_DOCKER_REGISTRY/ubuntu-test-env$BOT_DOCKER_IMAGE_TAG
  stage: assign_test
-  # gitlab ci do not support match job with RegEx or wildcard now in dependencies.
-  # we have a lot build example jobs. now we don't use dependencies, just download all artifacts of build stage.
-  dependencies: # Here is not a hard dependency relationship, could be skipped. so we do not use "needs" here.
-    - build_ssc_esp32
-    - build_esp_idf_tests_cmake_esp32
-    - build_esp_idf_tests_cmake_esp32s2
-    - build_esp_idf_tests_cmake_esp32s3
-    - build_esp_idf_tests_cmake_esp32c3
+  tags:
+    - assign_test
  variables:
-    SUBMODULES_TO_FETCH: "components/esptool_py/esptool"
-    EXAMPLE_TEST_DIR: "${CI_PROJECT_DIR}/examples"
-    CUSTOM_TEST_DIR: "${CI_PROJECT_DIR}/tools/test_apps"
-    UNIT_TEST_DIR: "${CI_PROJECT_DIR}/components/idf_test/unit_test"
+    SUBMODULES_TO_FETCH: components/esptool_py/esptool
+  artifacts:
+    paths:
+      - ${TEST_DIR}/test_configs
+      - ${BUILD_DIR}/artifact_index.json
+    when: always
+    expire_in: 1 week
+  script:
+    - python tools/ci/python_packages/ttfw_idf/IDFAssignTest.py $TEST_TYPE $TEST_DIR -c $CI_TARGET_TEST_CONFIG_FILE -o $TEST_DIR/test_configs
+
+assign_example_test:
+  extends:
+    - .assign_test_template
+    - .rules:build:example_test
+  needs:
+    - job: build_examples_cmake_esp32
+      artifacts: false
+      optional: true
+    - job: build_examples_cmake_esp32s2
+      artifacts: false
+      optional: true
+    - job: build_examples_cmake_esp32c3
+      artifacts: false
+      optional: true
+    - job: build_examples_cmake_esp32s3
+      artifacts: false
+      optional: true
+  variables:
+    TEST_TYPE: example_test
+    TEST_DIR: ${CI_PROJECT_DIR}/examples
+    BUILD_DIR: ${CI_PROJECT_DIR}/build_examples
+
+assign_custom_test:
+  extends:
+    - .assign_test_template
+    - .rules:build:custom_test
+  needs:
+    - job: build_test_apps_esp32
+      artifacts: false
+      optional: true
+    - job: build_test_apps_esp32s2
+      artifacts: false
+      optional: true
+    - job: build_test_apps_esp32c3
+      artifacts: false
+      optional: true
+    - job: build_test_apps_esp32s3
+      artifacts: false
+      optional: true
+  variables:
+    TEST_TYPE: custom_test
+    TEST_DIR: ${CI_PROJECT_DIR}/tools/test_apps
+    BUILD_DIR: ${CI_PROJECT_DIR}/build_test_apps
+
+assign_component_ut:
+  extends:
+    - .assign_test_template
+    - .rules:build:component_ut
+  needs:
+    - job: build_component_ut_esp32
+      artifacts: false
+      optional: true
+    - job: build_component_ut_esp32s2
+      artifacts: false
+      optional: true
+    - job: build_component_ut_esp32c3
+      artifacts: false
+      optional: true
+    - job: build_component_ut_esp32s3
+      artifacts: false
+      optional: true
+  variables:
+    TEST_TYPE: component_ut
+    TEST_DIR: ${CI_PROJECT_DIR}/component_ut
+    BUILD_DIR: ${CI_PROJECT_DIR}/build_component_ut
+  script:
    # COMPONENT_UT_DIRS is set by `set_component_ut_vars` in `utils.sh`
-    COMPONENT_UT_OUTPUT_DIR: "${CI_PROJECT_DIR}/component_ut"
-    INTEGRATION_CONFIG_OUTPUT_PATH: "${CI_PROJECT_DIR}/components/idf_test/integration_test/CIConfigs"
+    - set_component_ut_vars
+    - python tools/ci/python_packages/ttfw_idf/IDFAssignTest.py $TEST_TYPE $COMPONENT_UT_DIRS -c $CI_TARGET_TEST_CONFIG_FILE -o $TEST_DIR/test_configs
+
+assign_unit_test:
+  extends:
+    - .assign_test_template
+    - .rules:build:unit_test
+  needs:
+    - job: build_esp_idf_tests_cmake_esp32
+      optional: true
+    - job: build_esp_idf_tests_cmake_esp32s2
+      optional: true
+    - job: build_esp_idf_tests_cmake_esp32c3
+      optional: true
+    - job: build_esp_idf_tests_cmake_esp32s3
+      optional: true
+  variables:
+    TEST_TYPE: unit_test
+    TEST_DIR: ${CI_PROJECT_DIR}/components/idf_test/unit_test
+    BUILD_DIR: ${CI_PROJECT_DIR}/tools/unit-test-app/builds
+  script:
+    - python tools/ci/python_packages/ttfw_idf/IDFAssignTest.py $TEST_TYPE $TEST_DIR -c $CI_TARGET_TEST_CONFIG_FILE -o $TEST_DIR/test_configs
+
+assign_integration_test:
+  extends:
+    - .assign_test_template
+    - .rules:test:integration_test
+  needs:
+    - build_ssc_esp32
+    - build_ssc_esp32c3
+  artifacts:
+    paths:
+      - $TEST_DIR/test_configs
+  variables:
+    TEST_DIR: ${CI_PROJECT_DIR}/tools/ci/integration_test
+    BUILD_DIR: ${CI_PROJECT_DIR}/SSC/ssc_bin
    INTEGRATION_TEST_CASE_PATH: "${CI_PROJECT_DIR}/auto_test_script/TestCaseFiles"
    ASSIGN_TEST_CASE_SCRIPT: "${CI_PROJECT_DIR}/auto_test_script/bin/CIAssignTestCases.py"
    PYTHONPATH: ${CI_PROJECT_DIR}/auto_test_script/packages
-    # auto_test_script only supports python 3.7.x
    PYTHON_VER: 3.7.7
-  artifacts:
-    paths:
-      - components/idf_test/*/CIConfigs
-      - $EXAMPLE_TEST_DIR/test_configs
-      - $CUSTOM_TEST_DIR/test_configs
-      - $COMPONENT_UT_OUTPUT_DIR/test_configs
-      - build_examples/artifact_index.json
-      - build_test_apps/artifact_index.json
-      - build_component_ut/artifact_index.json
-      - tools/unit-test-app/builds/artifact_index.json
-    expire_in: 1 week
  script:
-    - set_component_ut_vars
-    - python tools/ci/python_packages/ttfw_idf/IDFAssignTest.py example_test $EXAMPLE_TEST_DIR -c $CI_TARGET_TEST_CONFIG_FILE -o $EXAMPLE_TEST_DIR/test_configs
-    - python tools/ci/python_packages/ttfw_idf/IDFAssignTest.py custom_test $CUSTOM_TEST_DIR -c $CI_TARGET_TEST_CONFIG_FILE -o $CUSTOM_TEST_DIR/test_configs
-    - python tools/ci/python_packages/ttfw_idf/IDFAssignTest.py component_ut $COMPONENT_UT_DIRS -c $CI_TARGET_TEST_CONFIG_FILE -o $COMPONENT_UT_OUTPUT_DIR/test_configs
-    - python tools/ci/python_packages/ttfw_idf/IDFAssignTest.py unit_test $UNIT_TEST_DIR -c $CI_TARGET_TEST_CONFIG_FILE -o $UNIT_TEST_DIR/CIConfigs
    # clone test script to assign tests
    # can not retry if downing git lfs files failed, so using empty_branch first.
    - retry_failed git clone ${CI_AUTO_TEST_SCRIPT_REPO_URL} -b empty_branch
    - retry_failed git -C auto_test_script checkout -f ${CI_AUTO_TEST_SCRIPT_REPO_BRANCH}
    - python $CHECKOUT_REF_SCRIPT auto_test_script auto_test_script --customized_only
    # assign integration test cases
-    - python ${ASSIGN_TEST_CASE_SCRIPT} -t ${INTEGRATION_TEST_CASE_PATH} -c $CI_TARGET_TEST_CONFIG_FILE -b $IDF_PATH/SSC/ssc_bin -o $INTEGRATION_CONFIG_OUTPUT_PATH
+    - python ${ASSIGN_TEST_CASE_SCRIPT} -t ${INTEGRATION_TEST_CASE_PATH} -c $CI_TARGET_TEST_CONFIG_FILE -b ${BUILD_DIR} -o $TEST_DIR/test_configs

 update_test_cases:
  extends: .rules:ref:master-schedule
@@ -70,7 +150,7 @@ update_test_cases:
    SUBMODULES_TO_FETCH: "components/esptool_py/esptool"
    UNIT_TEST_DIR: "${CI_PROJECT_DIR}/components/idf_test/unit_test"
    BOT_ACCOUNT_CONFIG_FILE: "${CI_PROJECT_DIR}/test-management/Config/Account.local.yml"
-    AUTO_TEST_SCRIPT_PATH: "${CI_PROJECT_DIR}/auto_test_script"
+    PYTHONPATH: ${CI_PROJECT_DIR}/auto_test_script/packages
    PYTHON_VER: 3.7.7
  script:
    - export GIT_SHA=$(echo ${PIPELINE_COMMIT_SHA} | cut -c 1-8)
@@ -5,6 +5,11 @@
    - build
  variables:
    SIZE_INFO_LOCATION: "$CI_PROJECT_DIR/size_info.txt"
+    # Enable ccache for all build jobs. See configure_ci_environment.sh for more ccache related settings.
+    IDF_CCACHE_ENABLE: "1"
+  after_script:
+    # Show ccache statistics if enabled globally
+    - test "$CI_CCACHE_STATS" == 1 && test -n "$(which ccache)" && ccache --show-stats || true
  dependencies: []

 .build_template_app_template:
@@ -34,10 +39,6 @@
    - export EXTRA_CXXFLAGS=${PEDANTIC_CXXFLAGS}
    # Only do the default cmake build for each target, remaining part are done in the build_template_app job
    - tools/ci/build_template_app.sh ${BUILD_COMMAND_ARGS}
-    # Check if there are any stray printf/ets_printf references in WiFi libs
-    - cd components/esp_wifi/lib
-    - for dir in esp32 esp32s2; do test $(xtensa-esp32-elf-nm $dir/*.a | grep -w printf | wc -l) -eq 0; done;
-    - for dir in esp32 esp32s2; do test $(xtensa-esp32-elf-nm $dir/*.a | grep -w ets_printf | wc -l) -eq 0; done;

 # build-related-pre-check-jobs ------------------------------------------------
 # Build at least one project for each target at earliest stage to reduce build cost for obvious failing commits
@@ -61,6 +61,9 @@
  patterns:
    - build_components
    - build_system
+  included_in:
+    - "build:{0}"
+    - build:target_test

 build:integration_test:
  labels:
@@ -68,6 +71,8 @@ build:integration_test:
  patterns:
    - build_components
    - build_system
+  included_in:
+    - build:target_test

 ####################
 # Target Test Jobs #
@@ -79,14 +84,14 @@ build:integration_test:
  labels: # For each rule, use labels <test_type> and <test_type>-<target>
    - "{0}"
    - "{0}_{1}"
+    - target_test
  patterns: # For each rule, use patterns <test_type> and build-<test_type>
    - "{0}"
    - "build-{0}"
  included_in: # Parent rules
+    - "build:{0}"
    - "build:{0}-{1}"
    - build:target_test
-    - test:target_test
-    - test:any_test

 # -------------
 # Special Cases
@@ -99,33 +104,30 @@ build:integration_test:
    - "component_ut_{0}"
    - unit_test
    - "unit_test_{0}"
+    - target_test
  patterns:
    - component_ut
    - "build-component_ut-{0}"
  included_in:
+    - build:component_ut
    - "build:component_ut-{0}"
    - build:target_test
-    - test:target_test
-    - test:any_test

 "test:integration_test":
  labels:
-    - "integration_test"
+    - integration_test
+    - target_test
  patterns:
-    - "integration_test"
+    - integration_test
  included_in:
-    - "build:integration_test"
+    - build:integration_test
    - build:target_test
-    - test:target_test
-    - test:any_test

 "test:host_test":
  labels:
    - host_test
  patterns:
    - host_test
-  included_in:
-    - test:any_test

 "test:submodule":
  labels:
@@ -140,17 +142,17 @@ build:integration_test:
  labels:
    - iperf_stress_test
  included_in:
+    - build:example_test
    - build:example_test-esp32
    - build:target_test
-    - test:any_test

 "labels:weekend_test": # custom test
  labels:
    - weekend_test
  included_in:
+    - build:custom_test
    - build:custom_test-esp32
    - build:target_test
-    - test:any_test

 "labels:nvs_coverage": # host_test
  labels:
@@ -83,15 +83,20 @@ test_check_kconfigs:
  script:
    - python ${IDF_PATH}/tools/ci/test_check_kconfigs.py

-check_wifi_lib_md5:
+check_blobs:
  extends: .pre_check_base_template
  tags:
    - build
  variables:
-    SUBMODULES_TO_FETCH: "components/esp_wifi/lib"
+    SUBMODULES_TO_FETCH: "components/esp_wifi/lib;components/esp_phy/lib"
  script:
+    # Check if Wi-Fi library header files match between IDF and the version used when compiling the libraries
    - IDF_TARGET=esp32 $IDF_PATH/components/esp_wifi/test_md5/test_md5.sh
    - IDF_TARGET=esp32s2 $IDF_PATH/components/esp_wifi/test_md5/test_md5.sh
+    - IDF_TARGET=esp32s3 $IDF_PATH/components/esp_wifi/test_md5/test_md5.sh
+    - IDF_TARGET=esp32c3 $IDF_PATH/components/esp_wifi/test_md5/test_md5.sh
+    # Check if Wi-Fi, PHY, BT blobs contain references to specific symbols
+    - bash $IDF_PATH/tools/ci/check_blobs.sh

 check_fuzzer_compilation:
   extends: .pre_check_base_template
@@ -89,6 +89,7 @@

 .patterns-integration_test: &patterns-integration_test
  - "tools/ci/python_packages/tiny_test_fw/**/*"
+  - "tools/ci/integration_test/**/*"

 .patterns-host_test: &patterns-host_test
  - ".gitlab/ci/host-test.yml"
@@ -336,6 +337,9 @@
 .if-label-submodule: &if-label-submodule
  if: '$BOT_LABEL_SUBMODULE || $CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*submodule(?:,[^,\n\r]+)*$/i'

+.if-label-target_test: &if-label-target_test
+  if: '$BOT_LABEL_TARGET_TEST || $CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*target_test(?:,[^,\n\r]+)*$/i'
+
 .if-label-unit_test: &if-label-unit_test
  if: '$BOT_LABEL_UNIT_TEST || $CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*unit_test(?:,[^,\n\r]+)*$/i'

@@ -366,12 +370,35 @@
    - <<: *if-dev-push
      changes: *patterns-build_system

+.rules:build:component_ut:
+  rules:
+    - <<: *if-protected
+    - <<: *if-label-build
+    - <<: *if-label-component_ut
+    - <<: *if-label-component_ut_esp32
+    - <<: *if-label-component_ut_esp32c3
+    - <<: *if-label-component_ut_esp32s2
+    - <<: *if-label-component_ut_esp32s3
+    - <<: *if-label-target_test
+    - <<: *if-label-unit_test
+    - <<: *if-label-unit_test_esp32
+    - <<: *if-label-unit_test_esp32c3
+    - <<: *if-label-unit_test_esp32s2
+    - <<: *if-label-unit_test_esp32s3
+    - <<: *if-dev-push
+      changes: *patterns-build_components
+    - <<: *if-dev-push
+      changes: *patterns-build_system
+    - <<: *if-dev-push
+      changes: *patterns-component_ut
+
 .rules:build:component_ut-esp32:
  rules:
    - <<: *if-protected
    - <<: *if-label-build
    - <<: *if-label-component_ut
    - <<: *if-label-component_ut_esp32
+    - <<: *if-label-target_test
    - <<: *if-label-unit_test
    - <<: *if-label-unit_test_esp32
    - <<: *if-dev-push
@@ -387,6 +414,7 @@
    - <<: *if-label-build
    - <<: *if-label-component_ut
    - <<: *if-label-component_ut_esp32c3
+    - <<: *if-label-target_test
    - <<: *if-label-unit_test
    - <<: *if-label-unit_test_esp32c3
    - <<: *if-dev-push
@@ -402,6 +430,7 @@
    - <<: *if-label-build
    - <<: *if-label-component_ut
    - <<: *if-label-component_ut_esp32s2
+    - <<: *if-label-target_test
    - <<: *if-label-unit_test
    - <<: *if-label-unit_test_esp32s2
    - <<: *if-dev-push
@@ -417,6 +446,7 @@
    - <<: *if-label-build
    - <<: *if-label-component_ut
    - <<: *if-label-component_ut_esp32s3
+    - <<: *if-label-target_test
    - <<: *if-label-unit_test
    - <<: *if-label-unit_test_esp32s3
    - <<: *if-dev-push
@@ -426,12 +456,31 @@
    - <<: *if-dev-push
      changes: *patterns-component_ut

+.rules:build:custom_test:
+  rules:
+    - <<: *if-protected
+    - <<: *if-label-build
+    - <<: *if-label-custom_test
+    - <<: *if-label-custom_test_esp32
+    - <<: *if-label-custom_test_esp32c3
+    - <<: *if-label-custom_test_esp32s2
+    - <<: *if-label-custom_test_esp32s3
+    - <<: *if-label-target_test
+    - <<: *if-label-weekend_test
+    - <<: *if-dev-push
+      changes: *patterns-build_components
+    - <<: *if-dev-push
+      changes: *patterns-build_system
+    - <<: *if-dev-push
+      changes: *patterns-custom_test
+
 .rules:build:custom_test-esp32:
  rules:
    - <<: *if-protected
    - <<: *if-label-build
    - <<: *if-label-custom_test
    - <<: *if-label-custom_test_esp32
+    - <<: *if-label-target_test
    - <<: *if-label-weekend_test
    - <<: *if-dev-push
      changes: *patterns-build_components
@@ -446,6 +495,7 @@
    - <<: *if-label-build
    - <<: *if-label-custom_test
    - <<: *if-label-custom_test_esp32c3
+    - <<: *if-label-target_test
    - <<: *if-dev-push
      changes: *patterns-build_components
    - <<: *if-dev-push
@@ -459,6 +509,7 @@
    - <<: *if-label-build
    - <<: *if-label-custom_test
    - <<: *if-label-custom_test_esp32s2
+    - <<: *if-label-target_test
    - <<: *if-dev-push
      changes: *patterns-build_components
    - <<: *if-dev-push
@@ -472,6 +523,7 @@
    - <<: *if-label-build
    - <<: *if-label-custom_test
    - <<: *if-label-custom_test_esp32s3
+    - <<: *if-label-target_test
    - <<: *if-dev-push
      changes: *patterns-build_components
    - <<: *if-dev-push
@@ -487,6 +539,26 @@
    - <<: *if-dev-push
      changes: *patterns-docker

+.rules:build:example_test:
+  rules:
+    - <<: *if-protected
+    - <<: *if-label-build
+    - <<: *if-label-example_test
+    - <<: *if-label-example_test_esp32
+    - <<: *if-label-example_test_esp32c3
+    - <<: *if-label-example_test_esp32s2
+    - <<: *if-label-example_test_esp32s3
+    - <<: *if-label-iperf_stress_test
+    - <<: *if-label-target_test
+    - <<: *if-dev-push
+      changes: *patterns-build-example_test
+    - <<: *if-dev-push
+      changes: *patterns-build_components
+    - <<: *if-dev-push
+      changes: *patterns-build_system
+    - <<: *if-dev-push
+      changes: *patterns-example_test
+
 .rules:build:example_test-esp32:
  rules:
    - <<: *if-protected
@@ -494,6 +566,7 @@
    - <<: *if-label-example_test
    - <<: *if-label-example_test_esp32
    - <<: *if-label-iperf_stress_test
+    - <<: *if-label-target_test
    - <<: *if-dev-push
      changes: *patterns-build-example_test
    - <<: *if-dev-push
@@ -509,6 +582,7 @@
    - <<: *if-label-build
    - <<: *if-label-example_test
    - <<: *if-label-example_test_esp32c3
+    - <<: *if-label-target_test
    - <<: *if-dev-push
      changes: *patterns-build-example_test
    - <<: *if-dev-push
@@ -524,6 +598,7 @@
    - <<: *if-label-build
    - <<: *if-label-example_test
    - <<: *if-label-example_test_esp32s2
+    - <<: *if-label-target_test
    - <<: *if-dev-push
      changes: *patterns-build-example_test
    - <<: *if-dev-push
@@ -539,6 +614,7 @@
    - <<: *if-label-build
    - <<: *if-label-example_test
    - <<: *if-label-example_test_esp32s3
+    - <<: *if-label-target_test
    - <<: *if-dev-push
      changes: *patterns-build-example_test
    - <<: *if-dev-push
@@ -553,6 +629,7 @@
    - <<: *if-protected
    - <<: *if-label-build
    - <<: *if-label-integration_test
+    - <<: *if-label-target_test
    - <<: *if-dev-push
      changes: *patterns-build_components
    - <<: *if-dev-push
@@ -590,6 +667,7 @@
    - <<: *if-label-example_test_esp32s3
    - <<: *if-label-integration_test
    - <<: *if-label-iperf_stress_test
+    - <<: *if-label-target_test
    - <<: *if-label-unit_test
    - <<: *if-label-unit_test_esp32
    - <<: *if-label-unit_test_esp32c3
@@ -613,10 +691,28 @@
    - <<: *if-dev-push
      changes: *patterns-unit_test

+.rules:build:unit_test:
+  rules:
+    - <<: *if-protected
+    - <<: *if-label-build
+    - <<: *if-label-target_test
+    - <<: *if-label-unit_test
+    - <<: *if-label-unit_test_esp32
+    - <<: *if-label-unit_test_esp32c3
+    - <<: *if-label-unit_test_esp32s2
+    - <<: *if-label-unit_test_esp32s3
+    - <<: *if-dev-push
+      changes: *patterns-build_components
+    - <<: *if-dev-push
+      changes: *patterns-build_system
+    - <<: *if-dev-push
+      changes: *patterns-unit_test
+
 .rules:build:unit_test-esp32:
  rules:
    - <<: *if-protected
    - <<: *if-label-build
+    - <<: *if-label-target_test
    - <<: *if-label-unit_test
    - <<: *if-label-unit_test_esp32
    - <<: *if-dev-push
@@ -630,6 +726,7 @@
  rules:
    - <<: *if-protected
    - <<: *if-label-build
+    - <<: *if-label-target_test
    - <<: *if-label-unit_test
    - <<: *if-label-unit_test_esp32c3
    - <<: *if-dev-push
@@ -643,6 +740,7 @@
  rules:
    - <<: *if-protected
    - <<: *if-label-build
+    - <<: *if-label-target_test
    - <<: *if-label-unit_test
    - <<: *if-label-unit_test_esp32s2
    - <<: *if-dev-push
@@ -656,6 +754,7 @@
  rules:
    - <<: *if-protected
    - <<: *if-label-build
+    - <<: *if-label-target_test
    - <<: *if-label-unit_test
    - <<: *if-label-unit_test_esp32s3
    - <<: *if-dev-push
@@ -692,50 +791,6 @@
  rules:
    - <<: *if-label-weekend_test

-.rules:test:any_test:
-  rules:
-    - <<: *if-protected
-    - <<: *if-label-build-only
-      when: never
-    - <<: *if-label-component_ut
-    - <<: *if-label-component_ut_esp32
-    - <<: *if-label-component_ut_esp32c3
-    - <<: *if-label-component_ut_esp32s2
-    - <<: *if-label-component_ut_esp32s3
-    - <<: *if-label-custom_test
-    - <<: *if-label-custom_test_esp32
-    - <<: *if-label-custom_test_esp32c3
-    - <<: *if-label-custom_test_esp32s2
-    - <<: *if-label-custom_test_esp32s3
-    - <<: *if-label-example_test
-    - <<: *if-label-example_test_esp32
-    - <<: *if-label-example_test_esp32c3
-    - <<: *if-label-example_test_esp32s2
-    - <<: *if-label-example_test_esp32s3
-    - <<: *if-label-host_test
-    - <<: *if-label-integration_test
-    - <<: *if-label-iperf_stress_test
-    - <<: *if-label-unit_test
-    - <<: *if-label-unit_test_esp32
-    - <<: *if-label-unit_test_esp32c3
-    - <<: *if-label-unit_test_esp32s2
-    - <<: *if-label-unit_test_esp32s3
-    - <<: *if-label-weekend_test
-    - <<: *if-dev-push
-      changes: *patterns-build-example_test
-    - <<: *if-dev-push
-      changes: *patterns-component_ut
-    - <<: *if-dev-push
-      changes: *patterns-custom_test
-    - <<: *if-dev-push
-      changes: *patterns-example_test
-    - <<: *if-dev-push
-      changes: *patterns-host_test
-    - <<: *if-dev-push
-      changes: *patterns-integration_test
-    - <<: *if-dev-push
-      changes: *patterns-unit_test
-
 .rules:test:component_ut-esp32:
  rules:
    - <<: *if-protected
@@ -743,6 +798,7 @@
      when: never
    - <<: *if-label-component_ut
    - <<: *if-label-component_ut_esp32
+    - <<: *if-label-target_test
    - <<: *if-label-unit_test
    - <<: *if-label-unit_test_esp32
    - <<: *if-dev-push
@@ -755,6 +811,7 @@
      when: never
    - <<: *if-label-component_ut
    - <<: *if-label-component_ut_esp32c3
+    - <<: *if-label-target_test
    - <<: *if-label-unit_test
    - <<: *if-label-unit_test_esp32c3
    - <<: *if-dev-push
@@ -767,6 +824,7 @@
      when: never
    - <<: *if-label-component_ut
    - <<: *if-label-component_ut_esp32s2
+    - <<: *if-label-target_test
    - <<: *if-label-unit_test
    - <<: *if-label-unit_test_esp32s2
    - <<: *if-dev-push
@@ -779,6 +837,7 @@
      when: never
    - <<: *if-label-component_ut
    - <<: *if-label-component_ut_esp32s3
+    - <<: *if-label-target_test
    - <<: *if-label-unit_test
    - <<: *if-label-unit_test_esp32s3
    - <<: *if-dev-push
@@ -791,6 +850,7 @@
      when: never
    - <<: *if-label-custom_test
    - <<: *if-label-custom_test_esp32
+    - <<: *if-label-target_test
    - <<: *if-dev-push
      changes: *patterns-custom_test

@@ -801,6 +861,7 @@
      when: never
    - <<: *if-label-custom_test
    - <<: *if-label-custom_test_esp32c3
+    - <<: *if-label-target_test
    - <<: *if-dev-push
      changes: *patterns-custom_test

@@ -811,6 +872,7 @@
      when: never
    - <<: *if-label-custom_test
    - <<: *if-label-custom_test_esp32s2
+    - <<: *if-label-target_test
    - <<: *if-dev-push
      changes: *patterns-custom_test

@@ -821,6 +883,7 @@
      when: never
    - <<: *if-label-custom_test
    - <<: *if-label-custom_test_esp32s3
+    - <<: *if-label-target_test
    - <<: *if-dev-push
      changes: *patterns-custom_test

@@ -831,6 +894,7 @@
      when: never
    - <<: *if-label-example_test
    - <<: *if-label-example_test_esp32
+    - <<: *if-label-target_test
    - <<: *if-dev-push
      changes: *patterns-build-example_test
    - <<: *if-dev-push
@@ -843,6 +907,7 @@
      when: never
    - <<: *if-label-example_test
    - <<: *if-label-example_test_esp32c3
+    - <<: *if-label-target_test
    - <<: *if-dev-push
      changes: *patterns-build-example_test
    - <<: *if-dev-push
@@ -855,6 +920,7 @@
      when: never
    - <<: *if-label-example_test
    - <<: *if-label-example_test_esp32s2
+    - <<: *if-label-target_test
    - <<: *if-dev-push
      changes: *patterns-build-example_test
    - <<: *if-dev-push
@@ -867,6 +933,7 @@
      when: never
    - <<: *if-label-example_test
    - <<: *if-label-example_test_esp32s3
+    - <<: *if-label-target_test
    - <<: *if-dev-push
      changes: *patterns-build-example_test
    - <<: *if-dev-push
@@ -887,6 +954,7 @@
    - <<: *if-label-build-only
      when: never
    - <<: *if-label-integration_test
+    - <<: *if-label-target_test
    - <<: *if-dev-push
      changes: *patterns-integration_test

@@ -899,50 +967,12 @@
    - <<: *if-dev-push
      changes: *patterns-submodule

-.rules:test:target_test:
-  rules:
-    - <<: *if-protected
-    - <<: *if-label-build-only
-      when: never
-    - <<: *if-label-component_ut
-    - <<: *if-label-component_ut_esp32
-    - <<: *if-label-component_ut_esp32c3
-    - <<: *if-label-component_ut_esp32s2
-    - <<: *if-label-component_ut_esp32s3
-    - <<: *if-label-custom_test
-    - <<: *if-label-custom_test_esp32
-    - <<: *if-label-custom_test_esp32c3
-    - <<: *if-label-custom_test_esp32s2
-    - <<: *if-label-custom_test_esp32s3
-    - <<: *if-label-example_test
-    - <<: *if-label-example_test_esp32
-    - <<: *if-label-example_test_esp32c3
-    - <<: *if-label-example_test_esp32s2
-    - <<: *if-label-example_test_esp32s3
-    - <<: *if-label-integration_test
-    - <<: *if-label-unit_test
-    - <<: *if-label-unit_test_esp32
-    - <<: *if-label-unit_test_esp32c3
-    - <<: *if-label-unit_test_esp32s2
-    - <<: *if-label-unit_test_esp32s3
-    - <<: *if-dev-push
-      changes: *patterns-build-example_test
-    - <<: *if-dev-push
-      changes: *patterns-component_ut
-    - <<: *if-dev-push
-      changes: *patterns-custom_test
-    - <<: *if-dev-push
-      changes: *patterns-example_test
-    - <<: *if-dev-push
-      changes: *patterns-integration_test
-    - <<: *if-dev-push
-      changes: *patterns-unit_test
-
 .rules:test:unit_test-esp32:
  rules:
    - <<: *if-protected
    - <<: *if-label-build-only
      when: never
+    - <<: *if-label-target_test
    - <<: *if-label-unit_test
    - <<: *if-label-unit_test_esp32
    - <<: *if-dev-push
@@ -953,6 +983,7 @@
    - <<: *if-protected
    - <<: *if-label-build-only
      when: never
+    - <<: *if-label-target_test
    - <<: *if-label-unit_test
    - <<: *if-label-unit_test_esp32c3
    - <<: *if-dev-push
@@ -963,6 +994,7 @@
    - <<: *if-protected
    - <<: *if-label-build-only
      when: never
+    - <<: *if-label-target_test
    - <<: *if-label-unit_test
    - <<: *if-label-unit_test_esp32s2
    - <<: *if-dev-push
@@ -973,6 +1005,7 @@
    - <<: *if-protected
    - <<: *if-label-build-only
      when: never
+    - <<: *if-label-target_test
    - <<: *if-label-unit_test
    - <<: *if-label-unit_test_esp32s3
    - <<: *if-dev-push
@@ -7,13 +7,13 @@

 .target_test_job_template:
  stage: target_test
-  needs:
-    - assign_test
  artifacts:
    when: always
    paths:
      - "**/*.log"
      - $LOG_PATH
+    exclude:
+      - .git/**/*
    expire_in: 1 week
    reports:
      junit: $LOG_PATH/*/XUNIT_RESULT.xml
@@ -38,6 +38,8 @@

 .example_test_template:
  extends: .target_test_job_template
+  needs:
+    - assign_example_test
  variables:
    TEST_CASE_PATH: "$CI_PROJECT_DIR/examples"
    CONFIG_FILE_PATH: "${CI_PROJECT_DIR}/examples/test_configs"
@@ -115,10 +117,9 @@ example_test_001D:

 example_test_OTA:
  extends: .example_test_esp32_template
-  parallel: 2
  tags:
    - ESP32
-    - Example_WIFI_OTA
+    - EXAMPLE_ETH_OTA

 example_test_protocols:
  extends: .example_test_esp32_template
@@ -127,6 +128,13 @@ example_test_protocols:
    - ESP32
    - Example_WIFI_Protocols

+# This job is only triggered by env var `NIGHTLY_RUN`, please do NOT remove
+example_test_esp32_WIFI_OTA:
+  extends: .example_test_esp32_template
+  tags:
+    - ESP32
+    - Example_WIFI_OTA
+
 example_test_002:
  extends: .example_test_esp32_template
  image: $CI_DOCKER_REGISTRY/ubuntu-test-env$BOT_DOCKER_IMAGE_TAG
@@ -295,6 +303,8 @@ example_test_ESP32C3_SDSPI:

 .test_app_template:
  extends: .target_test_job_template
+  needs:
+    - assign_custom_test
  variables:
    TEST_CASE_PATH: "$CI_PROJECT_DIR/tools/test_apps"
    CONFIG_FILE_PATH: "${CI_PROJECT_DIR}/tools/test_apps/test_configs"
@@ -333,6 +343,12 @@ test_app_test_002:
    - ESP32
    - Example_WIFI

+test_app_test_eth:
+  extends: .test_app_esp32_template
+  tags:
+    - ESP32
+    - Example_EthKitV1
+
 test_app_test_003:
  extends: .test_app_esp32_template
  tags:
@@ -381,6 +397,8 @@ test_app_test_flash_psram_f8r8:

 .component_ut_template:
  extends: .target_test_job_template
+  needs: # the assign already needs all the build jobs
+    - assign_component_ut
  variables:
    CONFIG_FILE_PATH: "${CI_PROJECT_DIR}/component_ut/test_configs"
  script:
@@ -443,9 +461,11 @@ component_ut_test_esp32c3:

 .unit_test_template:
  extends: .target_test_job_template
+  needs: # the assign already needs all the build jobs
+    - assign_unit_test
  variables:
    TEST_CASE_PATH: "$CI_PROJECT_DIR/tools/unit-test-app"
-    CONFIG_FILE_PATH: "${CI_PROJECT_DIR}/components/idf_test/unit_test/CIConfigs"
+    CONFIG_FILE_PATH: "${CI_PROJECT_DIR}/components/idf_test/unit_test/test_configs"

 .unit_test_esp32_template:
  extends:
@@ -513,7 +533,7 @@ UT_006:

 UT_007:
  extends: .unit_test_esp32_template
-  parallel: 4
+  parallel: 7
  tags:
    - ESP32_IDF
    - UT_T1_1
@@ -664,7 +684,7 @@ UT_046:

 UT_047:
  extends: .unit_test_esp32s2_template
-  parallel: 6
+  parallel: 7
  tags:
    - ESP32S2_IDF
    - UT_T1_1
@@ -683,7 +703,7 @@ UT_S2_SDSPI:

 UT_C3:
  extends: .unit_test_esp32c3_template
-  parallel: 34
+  parallel: 35
  tags:
    - ESP32C3_IDF
    - UT_T1_1
@@ -727,7 +747,7 @@ UT_C3_SDSPI:

 UT_S3:
  extends: .unit_test_esp32s3_template
-  parallel: 31
+  parallel: 32
  tags:
    - ESP32S3_IDF
    - UT_T1_1
@@ -761,18 +781,18 @@ component_ut_test_lan8720:
  extends:
    - .target_test_job_template
    - .rules:test:integration_test
-  needs:
-    - assign_test
-    - build_ssc_esp32
+  needs: # the assign already needs all the build jobs
+    - assign_integration_test
  variables:
    LOCAL_ENV_CONFIG_PATH: "$CI_PROJECT_DIR/ci-test-runner-configs/$CI_RUNNER_DESCRIPTION/ESP32_IDF"
    LOG_PATH: "${CI_PROJECT_DIR}/TEST_LOGS"
    TEST_CASE_FILE_PATH: "$CI_PROJECT_DIR/auto_test_script/TestCaseFiles"
-    MODULE_UPDATE_FILE: "$CI_PROJECT_DIR/components/idf_test/ModuleDefinition.yml"
-    CONFIG_FILE_PATH: "${CI_PROJECT_DIR}/components/idf_test/integration_test/CIConfigs"
-    KNOWN_ISSUE_FILE: "${CI_PROJECT_DIR}/components/idf_test/integration_test/KnownIssues"
+    CONFIG_FILE_PATH: "${CI_PROJECT_DIR}/tools/ci/integration_test/test_configs"
+    KNOWN_ISSUE_FILE: "${CI_PROJECT_DIR}/tools/ci/integration_test/KnownIssues"
    CI_RUNNER_SCRIPT: "${CI_PROJECT_DIR}/auto_test_script/bin/CIRunner.py"
-    PYTHONPATH: ${CI_PROJECT_DIR}/auto_test_script/packages
+    PREPARE_TEST_BIN_SCRIPT: "${CI_PROJECT_DIR}/tools/ci/integration_test/prepare_test_bins.py"
+    PYTHONPATH: "${CI_PROJECT_DIR}/auto_test_script/packages:${PYTHONPATH}"
+    INITIAL_CONDITION_RETRY_COUNT: "1"
    # auto_test_script only supports python 3.7.x
    PYTHON_VER: 3.7.7
  script:
@@ -789,8 +809,15 @@ component_ut_test_lan8720:
    - python $CHECKOUT_REF_SCRIPT auto_test_script auto_test_script --customized_only
    - cat ${KNOWN_ISSUE_FILE} >> ${TEST_CASE_FILE_PATH}/KnownIssues
    # run test
+    - python ${PREPARE_TEST_BIN_SCRIPT} $CONFIG_FILE
    - python ${CI_RUNNER_SCRIPT} -l "$LOG_PATH/$JOB_FULL_NAME" -c $CONFIG_FILE -e $LOCAL_ENV_CONFIG_PATH -t $TEST_CASE_FILE_PATH

+.integration_test_esp32c3_template:
+  extends:
+    - .integration_test_template
+  variables:
+    LOCAL_ENV_CONFIG_PATH: "$CI_PROJECT_DIR/ci-test-runner-configs/$CI_RUNNER_DESCRIPTION/ESP32C3_IDF"
+
 nvs_compatible_test:
  extends: .integration_test_template
  artifacts:
@@ -818,11 +845,12 @@ nvs_compatible_test:
    - cd auto_test_script
    - ./tools/prepare_nvs_bin.sh
    # run test
+    - python ${PREPARE_TEST_BIN_SCRIPT} $CONFIG_FILE
    - python ${CI_RUNNER_SCRIPT} -l "$LOG_PATH/$JOB_FULL_NAME" -c $CONFIG_FILE -e $LOCAL_ENV_CONFIG_PATH -t $TEST_CASE_FILE_PATH

 IT_001:
  extends: .integration_test_template
-  parallel: 3
+  parallel: 2
  tags:
    - ESP32_IDF
    - SSC_T1_4
@@ -835,34 +863,26 @@ IT_002:

 IT_003:
  extends: .integration_test_template
-  parallel: 14
+  parallel: 9
  tags:
    - ESP32_IDF
    - SSC_T2_5

-IT_004:
-  extends: .integration_test_template
-  tags:
-    - ESP32_IDF
-    - SSC_T1_APC
-
 IT_005:
  extends: .integration_test_template
-  parallel: 2
  tags:
    - ESP32_IDF
    - SSC_T1_5

 IT_006:
  extends: .integration_test_template
-  parallel: 12
+  parallel: 5
  tags:
    - ESP32_IDF
    - SSC_T1_6

 IT_007:
  extends: .integration_test_template
-  parallel: 3
  tags:
    - ESP32_IDF
    - SSC_T1_7
@@ -873,12 +893,6 @@ IT_008:
    - ESP32_IDF
    - SSC_T1_8

-IT_009:
-  extends: .integration_test_template
-  tags:
-    - ESP32_IDF
-    - SSC_T1_3
-
 IT_011:
  extends: .integration_test_template
  tags:
@@ -931,7 +945,6 @@ IT_018:

 IT_019:
  extends: .integration_test_template
-  parallel: 2
  tags:
    - ESP32_IDF
    - SSC_T2_2
@@ -942,8 +955,15 @@ IT_020:
    - ESP32_IDF
    - SSC_T2_3

-IT_021:
+IT_022:
  extends: .integration_test_template
  tags:
    - ESP32_IDF
-    - SSC_T2_4
+    - SSC_T3_2
+
+IT_C3_001:
+  extends: .integration_test_esp32c3_template
+  parallel: 6
+  tags:
+    - ESP32C3_IDF
+    - SSC_T2_5
@@ -18,11 +18,13 @@ menu "Application Level Tracing"

    config APPTRACE_DEST_TRAX
        bool
-        depends on IDF_TARGET_ARCH_XTENSA && !ESP32_TRAX && !ESP32S2_TRAX
+        depends on IDF_TARGET_ARCH_XTENSA && !ESP32_TRAX && !ESP32S2_TRAX && !ESP32S3_TRAX
        select ESP32_MEMMAP_TRACEMEM
        select ESP32S2_MEMMAP_TRACEMEM
+        select ESP32S3_MEMMAP_TRACEMEM
        select ESP32_MEMMAP_TRACEMEM_TWOBANKS
        select ESP32S2_MEMMAP_TRACEMEM_TWOBANKS
+        select ESP32S3_MEMMAP_TRACEMEM_TWOBANKS
        default n
        help
            Enables/disable TRAX tracing HW.
@@ -1,3 +1,9 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
 #include <sys/param.h>
 #include <string.h>
 #include "sdkconfig.h"
@@ -93,7 +99,8 @@ static esp_err_t esp_apptrace_membufs_swap(esp_apptrace_membufs_proto_data_t *pr
    if (proto->hw->host_data_pending() && hdr->block_sz > 0) {
        // TODO: add support for multiple blocks from host, currently there is no need for that
        uint8_t *p = proto->blocks[new_block_num].start + proto->blocks[new_block_num].sz;
-        ESP_APPTRACE_LOGD("Recvd %d bytes from host [%x %x %x %x %x %x %x %x .. %x %x %x %x %x %x %x %x]", hdr->block_sz,
+        ESP_APPTRACE_LOGD("Recvd %d bytes from host (@ 0x%x) [%x %x %x %x %x %x %x %x .. %x %x %x %x %x %x %x %x]",
+            hdr->block_sz, proto->blocks[new_block_num].start,
            *(proto->blocks[new_block_num].start+0), *(proto->blocks[new_block_num].start+1),
            *(proto->blocks[new_block_num].start+2), *(proto->blocks[new_block_num].start+3),
            *(proto->blocks[new_block_num].start+4), *(proto->blocks[new_block_num].start+5),
@@ -52,18 +52,11 @@ void gcov_dump_task(void *pvParameter)
    }
    ESP_EARLY_LOGV(TAG, "Config apptrace down buf");
    esp_apptrace_down_buffer_config(down_buf, ESP_GCOV_DOWN_BUF_SIZE);
-    /* we are directing the std outputs to the fake ones in order to reduce stack usage */
-    FILE *old_stderr = stderr;
-    FILE *old_stdout = stdout;
-    stderr = (FILE *) &__sf_fake_stderr;
-    stdout = (FILE *) &__sf_fake_stdout;
    ESP_EARLY_LOGV(TAG, "Dump data...");
    __gcov_dump();
    // reset dump status to allow incremental data accumulation
    __gcov_reset();
    free(down_buf);
-    stderr = old_stderr;
-    stdout = old_stdout;
    ESP_EARLY_LOGV(TAG, "Finish file transfer session");
    dump_result = esp_apptrace_fstop(ESP_APPTRACE_DEST_TRAX);
    if (dump_result != ESP_OK) {
@@ -1,3 +1,9 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
 #include "esp_log.h"
 #include "esp_app_trace_membufs_proto.h"
 #include "esp_app_trace_port.h"
@@ -94,25 +100,10 @@ esp_apptrace_hw_t *esp_apptrace_jtag_hw_get(void **data)
   e.g. OpenOCD flasher stub use own implementation of it. */
 __attribute__((weak)) int esp_apptrace_advertise_ctrl_block(void *ctrl_block_addr)
 {
-    register int sys_nr = RISCV_APPTRACE_SYSNR;
-    register int host_ret = 0;
-
    if (!esp_cpu_in_ocd_debug_mode()) {
        return 0;
    }
-    __asm__ volatile ( \
-        ".option push\n" \
-        ".option norvc\n" \
-        "mv a0, %[sys_nr]\n" \
-        "mv a1, %[arg1]\n" \
-        "slli    zero,zero,0x1f\n" \
-        "ebreak\n" \
-        "srai    zero,zero,0x7\n" \
-        "mv %[host_ret], a0\n" \
-    	".option pop\n" \
-        :[host_ret]"=r"(host_ret)
-        :[sys_nr]"r"(sys_nr),[arg1]"r"(ctrl_block_addr):"a0","a1");
-    return host_ret;
+    return cpu_hal_syscall(RISCV_APPTRACE_SYSNR, (int)ctrl_block_addr, 0, 0, 0, NULL);
 }

 /* Returns up buffers config.
@@ -1,3 +1,9 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
 //
 // How It Works
 // ************
@@ -143,9 +149,9 @@
 #include "sdkconfig.h"
 #include "soc/soc.h"
 #include "soc/dport_access.h"
-#if CONFIG_IDF_TARGET_ESP32
 #include "soc/dport_reg.h"
-#elif CONFIG_IDF_TARGET_ESP32S2
+#include "soc/tracemem_config.h"
+#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
 #include "soc/sensitive_reg.h"
 #endif
 #include "eri.h"
@@ -154,18 +160,6 @@
 #include "esp_app_trace_membufs_proto.h"
 #include "esp_app_trace_port.h"

-// TODO: move these (and same definitions in trax.c to dport_reg.h)
-#if CONFIG_IDF_TARGET_ESP32
-#define TRACEMEM_MUX_PROBLK0_APPBLK1            0
-#define TRACEMEM_MUX_BLK0_ONLY                  1
-#define TRACEMEM_MUX_BLK1_ONLY                  2
-#define TRACEMEM_MUX_PROBLK1_APPBLK0            3
-#elif CONFIG_IDF_TARGET_ESP32S2
-#define TRACEMEM_MUX_BLK0_NUM                   19
-#define TRACEMEM_MUX_BLK1_NUM                   20
-#define TRACEMEM_BLK_NUM2ADDR(_n_)              (0x3FFB8000UL + 0x4000UL*((_n_)-4))
-#endif
-
 // TRAX is disabled, so we use its registers for our own purposes
 // | 31..XXXXXX..24 | 23 .(host_connect). 23 | 22 .(host_data). 22| 21..(block_id)..15 | 14..(block_len)..0 |
 #define ESP_APPTRACE_TRAX_CTRL_REG              ERI_TRAX_DELAYCNT
@@ -182,18 +176,6 @@

 #define ESP_APPTRACE_TRAX_INITED(_hw_)          ((_hw_)->inited & (1 << cpu_hal_get_core_id()))

-#if CONFIG_IDF_TARGET_ESP32
-static uint8_t * const s_trax_blocks[] = {
-    (uint8_t *) 0x3FFFC000,
-    (uint8_t *) 0x3FFF8000
-};
-#elif CONFIG_IDF_TARGET_ESP32S2
-static uint8_t * const s_trax_blocks[] = {
-    (uint8_t *)TRACEMEM_BLK_NUM2ADDR(TRACEMEM_MUX_BLK0_NUM),
-    (uint8_t *)TRACEMEM_BLK_NUM2ADDR(TRACEMEM_MUX_BLK1_NUM)
-};
-#endif
-
 #define ESP_APPTRACE_TRAX_BLOCK_SIZE            (0x4000UL)

 /** TRAX HW transport data */
@@ -223,6 +205,12 @@ static bool esp_apptrace_trax_host_data_pending(void);

 const static char *TAG = "esp_apptrace";

+static uint8_t * const s_trax_blocks[] = {
+    (uint8_t *)TRACEMEM_BLK0_ADDR,
+    (uint8_t *)TRACEMEM_BLK1_ADDR
+};
+
+
 esp_apptrace_hw_t *esp_apptrace_uart_hw_get(int num, void **data)
 {
    return NULL;
@@ -300,6 +288,14 @@ static inline void esp_apptrace_trax_select_memory_block(int block_num)
    DPORT_WRITE_PERI_REG(DPORT_TRACEMEM_MUX_MODE_REG, block_num ? TRACEMEM_MUX_BLK0_ONLY : TRACEMEM_MUX_BLK1_ONLY);
 #elif CONFIG_IDF_TARGET_ESP32S2
    WRITE_PERI_REG(DPORT_PMS_OCCUPY_3_REG, block_num ? BIT(TRACEMEM_MUX_BLK0_NUM-4) : BIT(TRACEMEM_MUX_BLK1_NUM-4));
+#elif CONFIG_IDF_TARGET_ESP32S3
+    // select memory block to be exposed to the TRAX module (accessed by host)
+    uint32_t block_bits = block_num ? TRACEMEM_CORE0_MUX_BLK_BITS(TRACEMEM_MUX_BLK0_NUM)
+                        : TRACEMEM_CORE0_MUX_BLK_BITS(TRACEMEM_MUX_BLK1_NUM);
+    block_bits |= block_num ? TRACEMEM_CORE1_MUX_BLK_BITS(TRACEMEM_MUX_BLK0_NUM)
+                        : TRACEMEM_CORE1_MUX_BLK_BITS(TRACEMEM_MUX_BLK1_NUM);
+    ESP_EARLY_LOGV(TAG, "Select block %d @ %p (bits 0x%x)", block_num, s_trax_blocks[block_num], block_bits);
+    DPORT_WRITE_PERI_REG(SENSITIVE_INTERNAL_SRAM_USAGE_2_REG, block_bits);
 #endif
 }

@@ -73,6 +73,8 @@ Revision: $Rev: 3734 $
 #include "esp32/clk.h"
 #elif CONFIG_IDF_TARGET_ESP32S2
 #include "esp32s2/clk.h"
+#elif CONFIG_IDF_TARGET_ESP32S3
+#include "esp32s3/clk.h"
 #elif CONFIG_IDF_TARGET_ESP32C3
 #include "esp32c3/clk.h"
 #endif
@@ -142,6 +144,8 @@ extern const SEGGER_SYSVIEW_OS_API SYSVIEW_X_OS_TraceAPI;
 #define SYSVIEW_TIMESTAMP_FREQ  (CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ * 1000000)
 #elif CONFIG_IDF_TARGET_ESP32S2
 #define SYSVIEW_TIMESTAMP_FREQ  (CONFIG_ESP32S2_DEFAULT_CPU_FREQ_MHZ * 1000000)
+#elif CONFIG_IDF_TARGET_ESP32S3
+#define SYSVIEW_TIMESTAMP_FREQ  (CONFIG_ESP32S3_DEFAULT_CPU_FREQ_MHZ * 1000000)
 #endif
 #endif // TS_USE_CCOUNT

@@ -76,9 +76,6 @@ Notes:
 *
 **********************************************************************
 */
-#ifndef portSTACK_GROWTH
-  #define portSTACK_GROWTH              ( -1 )
-#endif

 #define SYSVIEW_FREERTOS_MAX_NOF_TASKS  CONFIG_APPTRACE_SV_MAX_TASKS

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
 *
 * SPDX-License-Identifier: Apache-2.0
 */
@@ -824,3 +824,25 @@ static void test_flow6(void)
 // 2 Stage: run factory -> check it -> copy factory to OTA0             -> reboot  --//--
 // 3 Stage: run OTA0    -> check it -> erase OTA_DATA for next tests    -> PASS
 TEST_CASE_MULTIPLE_STAGES("Switching between factory, OTA0 using esp_ota_write_with_offset", "[app_update][timeout=90][reset=DEEPSLEEP_RESET, DEEPSLEEP_RESET]", start_test, test_flow6, test_flow6);
+
+TEST_CASE("Test bootloader_common_get_sha256_of_partition returns ESP_ERR_IMAGE_INVALID when image is ivalid", "[partitions]")
+{
+    const esp_partition_t *cur_app = esp_ota_get_running_partition();
+    ESP_LOGI(TAG, "copy current app to next part");
+    const esp_partition_t *other_app = get_next_update_partition();
+    copy_current_app_to_next_part(cur_app, other_app);
+    erase_ota_data();
+
+    uint8_t sha_256_cur_app[32];
+    uint8_t sha_256_other_app[32];
+    TEST_ESP_OK(bootloader_common_get_sha256_of_partition(cur_app->address, cur_app->size, cur_app->type, sha_256_cur_app));
+    TEST_ESP_OK(bootloader_common_get_sha256_of_partition(other_app->address, other_app->size, other_app->type, sha_256_other_app));
+
+    TEST_ASSERT_EQUAL_MEMORY_MESSAGE(sha_256_cur_app, sha_256_other_app, sizeof(sha_256_cur_app), "must be the same");
+
+    uint32_t data = 0;
+    bootloader_flash_write(other_app->address + 0x50, &data, sizeof(data), false);
+
+    TEST_ESP_ERR(ESP_ERR_IMAGE_INVALID, bootloader_common_get_sha256_of_partition(other_app->address, other_app->size, other_app->type, sha_256_other_app));
+    TEST_ASSERT_EQUAL_MEMORY_MESSAGE(sha_256_cur_app, sha_256_other_app, sizeof(sha_256_cur_app), "must be the same");
+}
@@ -168,6 +168,12 @@ esp_err_t bootloader_common_get_sha256_of_partition (uint32_t address, uint32_t
        }
        if (data.image.hash_appended) {
            memcpy(out_sha_256, data.image_digest, ESP_PARTITION_HASH_LEN);
+            uint8_t calc_sha256[ESP_PARTITION_HASH_LEN];
+            // The hash is verified before returning, if app content is invalid then the function returns ESP_ERR_IMAGE_INVALID.
+            esp_err_t error = bootloader_sha256_flash_contents(address, data.image_len - ESP_PARTITION_HASH_LEN, calc_sha256);
+            if (error || memcmp(data.image_digest, calc_sha256, ESP_PARTITION_HASH_LEN) != 0) {
+                return ESP_ERR_IMAGE_INVALID;
+            }
            return ESP_OK;
        }
        // If image doesn't have a appended hash then hash calculates for entire image.
@@ -73,10 +73,12 @@ void bootloader_console_init(void)
        // Route GPIO signals to/from pins
        const uint32_t tx_idx = UART_PERIPH_SIGNAL(uart_num, SOC_UART_TX_PIN_IDX);
        const uint32_t rx_idx = UART_PERIPH_SIGNAL(uart_num, SOC_UART_RX_PIN_IDX);
+        gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[uart_rx_gpio], PIN_FUNC_GPIO);
        PIN_INPUT_ENABLE(GPIO_PIN_MUX_REG[uart_rx_gpio]);
        esp_rom_gpio_pad_pullup_only(uart_rx_gpio);
        esp_rom_gpio_connect_out_signal(uart_tx_gpio, tx_idx, 0, 0);
        esp_rom_gpio_connect_in_signal(uart_rx_gpio, rx_idx, 0);
+        gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[uart_tx_gpio], PIN_FUNC_GPIO);
        // Enable the peripheral
        periph_ll_enable_clk_clear_rst(PERIPH_UART0_MODULE + uart_num);
    }
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2019-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2019-2022 Espressif Systems (Shanghai) CO LTD
 *
 * SPDX-License-Identifier: Apache-2.0
 */
@@ -12,8 +12,7 @@
 uint8_t bootloader_common_get_chip_revision(void)
 {
    // should return the same value as esp_efuse_get_chip_ver()
-    /* No other revisions for ESP32-S2 */
-    return 0;
+    return REG_GET_FIELD(EFUSE_RD_MAC_SPI_SYS_3_REG, EFUSE_WAFER_VERSION);
 }

 uint32_t bootloader_common_get_chip_ver_pkg(void)
@@ -43,15 +43,15 @@

 #define BYTESHIFT(VAR, IDX)    (((VAR) >> ((IDX) * 8)) & 0xFF)
 #define ISSI_ID                0x9D
+#define MXIC_ID                0xC2
 #define GD_Q_ID_HIGH           0xC8
 #define GD_Q_ID_MID            0x40
 #define GD_Q_ID_LOW            0x16

 #define ESP_BOOTLOADER_SPIFLASH_BP_MASK_ISSI    (BIT7 | BIT5 | BIT4 | BIT3 | BIT2)
-#define ESP_BOOTLOADER_SPIFLASH_QE_16B           BIT9   // QE position when you write 16 bits at one time.
-#define ESP_BOOTLOADER_SPIFLASH_QE_8B            BIT1   // QE position when you write 8 bits(for SR2) at one time.
-#define ESP_BOOTLOADER_SPIFLASH_WRITE_8B         (8)
-#define ESP_BOOTLOADER_SPIFLASH_WRITE_16B        (16)
+#define ESP_BOOTLOADER_SPIFLASH_QE_GD_SR2        BIT1   // QE position when you write 8 bits(for SR2) at one time.
+#define ESP_BOOTLOADER_SPIFLASH_QE_SR1_2BYTE     BIT9   // QE position when you write 16 bits at one time.
+

 #ifndef BOOTLOADER_BUILD
 /* Normal app version maps to esp_spi_flash.h operations...
@@ -495,72 +495,77 @@ FORCE_INLINE_ATTR bool is_gd_q_chip(const esp_rom_spiflash_chip_t* chip)
    return BYTESHIFT(chip->device_id, 2) == GD_Q_ID_HIGH && BYTESHIFT(chip->device_id, 1) == GD_Q_ID_MID && BYTESHIFT(chip->device_id, 0) >= GD_Q_ID_LOW;
 }

+FORCE_INLINE_ATTR bool is_mxic_chip(const esp_rom_spiflash_chip_t* chip)
+{
+    return BYTESHIFT(chip->device_id, 2) == MXIC_ID;
+}
+
 esp_err_t IRAM_ATTR __attribute__((weak)) bootloader_flash_unlock(void)
 {
+    // At the beginning status == new_status == status_sr2 == new_status_sr2 == 0.
+    // If the register doesn't need to be updated, keep them the same (0), so that no command will be actually sent.
    uint16_t status = 0;    // status for SR1 or SR1+SR2 if writing SR with 01H + 2Bytes.
    uint16_t new_status = 0;
    uint8_t status_sr2 = 0;    // status_sr2 for SR2.
    uint8_t new_status_sr2 = 0;
-    uint8_t write_sr_bit = 0;
+    uint8_t sr1_bit_num = 0;
    esp_err_t err = ESP_OK;

    esp_rom_spiflash_wait_idle(&g_rom_flashchip);
-    if (is_issi_chip(&g_rom_flashchip)) {
-        write_sr_bit = ESP_BOOTLOADER_SPIFLASH_WRITE_8B;
-        // ISSI chips have different QE position
-
+    if (is_issi_chip(&g_rom_flashchip) || is_mxic_chip(&g_rom_flashchip)) {
+        // Currently ISSI & MXIC share the same command and register layout, which is different from the default model.
+        // If any code here needs to be modified, check both chips.
        status = bootloader_execute_flash_command(CMD_RDSR, 0, 0, 8);

        /* Clear all bits in the mask.
        (This is different from ROM esp_rom_spiflash_unlock, which keeps all bits as-is.)
        */
+        sr1_bit_num = 8;
        new_status = status & (~ESP_BOOTLOADER_SPIFLASH_BP_MASK_ISSI);
-        // Skip if nothing needs to be cleared. Otherwise will waste time waiting for the flash to clear nothing.
    } else if (is_gd_q_chip(&g_rom_flashchip)) {
        /* The GD chips behaviour is to clear all bits in SR1 and clear bits in SR2 except QE bit.
           Use 01H to write SR1 and 31H to write SR2.
        */
-        write_sr_bit = ESP_BOOTLOADER_SPIFLASH_WRITE_8B;
-
        status = bootloader_execute_flash_command(CMD_RDSR, 0, 0, 8);
+        sr1_bit_num = 8;
        new_status = 0;

        status_sr2 = bootloader_execute_flash_command(CMD_RDSR2, 0, 0, 8);
-        new_status_sr2 = status_sr2 & ESP_BOOTLOADER_SPIFLASH_QE_8B;
+        new_status_sr2 = status_sr2 & ESP_BOOTLOADER_SPIFLASH_QE_GD_SR2;
    } else {
        /* For common behaviour, like XMC chips, Use 01H+2Bytes to write both SR1 and SR2*/
-        write_sr_bit = ESP_BOOTLOADER_SPIFLASH_WRITE_16B;
        status = bootloader_execute_flash_command(CMD_RDSR, 0, 0, 8) | (bootloader_execute_flash_command(CMD_RDSR2, 0, 0, 8) << 8);

        /* Clear all bits except QE, if it is set.
        (This is different from ROM esp_rom_spiflash_unlock, which keeps all bits as-is.)
        */
-        new_status = status & ESP_BOOTLOADER_SPIFLASH_QE_16B;
+        sr1_bit_num = 16;
+        new_status = status & ESP_BOOTLOADER_SPIFLASH_QE_SR1_2BYTE;
    }

+    // When SR is written, set to true to indicate that WRDI need to be sent to ensure the protection is ON before return.
+    bool status_written = false;
+    // Skip if nothing needs to be changed. Meaningless writing to SR increases the risk during write and wastes time.
    if (status != new_status) {
-        /* if the status in SR not equal to the ideal status, the status need to be updated */
        esp_rom_spiflash_wait_idle(&g_rom_flashchip);
        bootloader_execute_flash_command(CMD_WREN, 0, 0, 0);
-        esp_rom_spiflash_wait_idle(&g_rom_flashchip);
-        bootloader_execute_flash_command(CMD_WRSR, new_status, write_sr_bit, 0);
-        esp_rom_spiflash_wait_idle(&g_rom_flashchip);
+        bootloader_execute_flash_command(CMD_WRSR, new_status, sr1_bit_num, 0);
+        status_written = true;
    }

    if (status_sr2 != new_status_sr2) {
-        /* If the status in SR2 not equal to the ideal status, the status need to be updated.
-           It doesn't need to be updated if status in SR2 is 0.
-           Note: if we need to update both SR1 and SR2, the `CMD_WREN` needs to be sent again.
-        */
        esp_rom_spiflash_wait_idle(&g_rom_flashchip);
        bootloader_execute_flash_command(CMD_WREN, 0, 0, 0);
+        bootloader_execute_flash_command(CMD_WRSR2, new_status_sr2, 8, 0);
+        status_written = true;
+    }
+
+    if (status_written) {
+        //Call esp_rom_spiflash_wait_idle to make sure previous WRSR is completed.
        esp_rom_spiflash_wait_idle(&g_rom_flashchip);
-        bootloader_execute_flash_command(CMD_WRSR2, new_status_sr2, write_sr_bit, 0);
-        esp_rom_spiflash_wait_idle(&g_rom_flashchip);
+        bootloader_execute_flash_command(CMD_WRDI, 0, 0, 0);
    }

-    bootloader_execute_flash_command(CMD_WRDI, 0, 0, 0);
-    esp_rom_spiflash_wait_idle(&g_rom_flashchip);
    return err;
 }

@@ -74,6 +74,7 @@ void bootloader_random_enable(void)
    REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SARADC_DTEST_RTC_ADDR, 0);
 }

+//TODO: IDF-4714
 void bootloader_random_disable(void)
 {
    /* Restore internal I2C bus state */
@@ -82,13 +83,19 @@ void bootloader_random_disable(void)
    REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SARADC_ENT_RTC_ADDR, 0);
    REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SARADC_DTEST_RTC_ADDR, 0);

-    /* Restore SARADC to default mode */
-    CLEAR_PERI_REG_MASK(SENS_SAR_MEAS1_MUX_REG, SENS_SAR1_DIG_FORCE);
-    SET_PERI_REG_MASK(SYSTEM_PERIP_CLK_EN0_REG, SYSTEM_APB_SARADC_CLK_EN);
-    REG_SET_FIELD(SENS_SAR_POWER_XPD_SAR_REG, SENS_FORCE_XPD_SAR, 0);
-    CLEAR_PERI_REG_MASK(APB_SARADC_CTRL2_REG, APB_SARADC_TIMER_EN);
+    //Stop SAR ADC clock
    CLEAR_PERI_REG_MASK(SENS_SAR_PERI_CLK_GATE_CONF_REG, SENS_SARADC_CLK_EN);
+    //Power off SAR ADC
+    REG_SET_FIELD(SENS_SAR_POWER_XPD_SAR_REG, SENS_FORCE_XPD_SAR, 0);
+    //return to ADC RTC controller
+    CLEAR_PERI_REG_MASK(SENS_SAR_MEAS1_MUX_REG, SENS_SAR1_DIG_FORCE);
+    //Invalidate ADC digital trigger timer
+    CLEAR_PERI_REG_MASK(APB_SARADC_CTRL2_REG, APB_SARADC_TIMER_EN);
+
+    //Disable ADC digital part
    CLEAR_PERI_REG_MASK(SYSTEM_PERIP_CLK_EN0_REG, SYSTEM_APB_SARADC_CLK_EN);
+    //Hold reset bit for ADC digital part
+    SET_PERI_REG_MASK(SYSTEM_PERIP_RST_EN0_REG, SYSTEM_APB_SARADC_RST);

    /* Note: the 8M CLK entropy source continues running even after this function is called,
       but as mentioned above it's better to enable Wi-Fi or BT or call bootloader_random_enable()
@@ -82,6 +82,7 @@ const static qio_info_t chip_data[] = {
    { "WinBond",     0xEF,   0x4000, 0xFF00,    read_status_16b_rdsr_rdsr2, write_status_16b_wrsr,      9 },
    { "GD",          0xC8,   0x6000, 0xFF00,    read_status_16b_rdsr_rdsr2, write_status_16b_wrsr,      9 },
    { "XM25QU64A",   0x20,   0x3817, 0xFFFF,    read_status_8b_xmc25qu64a,  write_status_8b_xmc25qu64a, 6 },
+    { "TH",          0xcd,   0x6000, 0xFF00,    read_status_16b_rdsr_rdsr2, write_status_16b_wrsr,      9 },

    /* Final entry is default entry, if no other IDs have matched.

@@ -550,10 +550,12 @@ static void config_parse(nvs_handle_t fp, config_t *config)
    const size_t keyname_bufsz = sizeof(CONFIG_KEY) + 5 + 1; // including log10(sizeof(i))
    char *keyname = osi_calloc(keyname_bufsz);
    int buf_size = get_config_size_from_flash(fp);
-    char *buf = osi_calloc(buf_size);
+    char *buf = NULL;
+
    if(buf_size == 0) { //First use nvs
        goto error;
    }
+    buf = osi_calloc(buf_size);
    if (!line || !section || !buf || !keyname) {
        err_code |= 0x01;
        goto error;
@@ -66,6 +66,13 @@ config BT_CTRL_HW_CCA
    help
        It enables HW CCA feature in controller

+config BT_CTRL_HW_CCA_VAL
+    int "CCA threshold value"
+    range 20 60
+    default 20
+    help
+        It is the threshold value of HW CCA, if the value is 30, it means CCA threshold is -30 dBm.
+
 config BT_CTRL_HW_CCA_EFF
    int
    default 1 if BT_CTRL_HW_CCA
@@ -81,6 +81,13 @@ config BT_CTRL_HW_CCA
    help
        It enables HW CCA feature in controller

+config BT_CTRL_HW_CCA_VAL
+    int "CCA threshold value"
+    range 20 60
+    default 20
+    help
+        It is the threshold value of HW CCA, if the value is 30, it means CCA threshold is -30 dBm.
+
 config BT_CTRL_HW_CCA_EFF
    int
    default 1 if BT_CTRL_HW_CCA
@@ -877,6 +877,8 @@ typedef enum {
    ESP_BLE_MESH_PROXY_CLIENT_SET_FILTER_TYPE_COMP_EVT,         /*!< Proxy Client set filter type completion event */
    ESP_BLE_MESH_PROXY_CLIENT_ADD_FILTER_ADDR_COMP_EVT,         /*!< Proxy Client add filter address completion event */
    ESP_BLE_MESH_PROXY_CLIENT_REMOVE_FILTER_ADDR_COMP_EVT,      /*!< Proxy Client remove filter address completion event */
+    ESP_BLE_MESH_PROXY_SERVER_CONNECTED_EVT,                    /*!< Proxy Server establishes connection successfully event */
+    ESP_BLE_MESH_PROXY_SERVER_DISCONNECTED_EVT,                 /*!< Proxy Server terminates connection successfully event */
    ESP_BLE_MESH_MODEL_SUBSCRIBE_GROUP_ADDR_COMP_EVT,           /*!< Local model subscribes group address completion event */
    ESP_BLE_MESH_MODEL_UNSUBSCRIBE_GROUP_ADDR_COMP_EVT,         /*!< Local model unsubscribes group address completion event */
    ESP_BLE_MESH_DEINIT_MESH_COMP_EVT,                          /*!< De-initialize BLE Mesh stack completion event */
@@ -1459,6 +1461,19 @@ typedef union {
        uint8_t conn_handle;                    /*!< Proxy connection handle */
        uint16_t net_idx;                       /*!< Corresponding NetKey Index */
    } proxy_client_remove_filter_addr_comp;     /*!< Event parameter of ESP_BLE_MESH_PROXY_CLIENT_REMOVE_FILTER_ADDR_COMP_EVT */
+    /**
+     * @brief ESP_BLE_MESH_PROXY_SERVER_CONNECTED_EVT
+     */
+    struct ble_mesh_proxy_server_connected_param {
+        uint8_t conn_handle;                    /*!< Proxy connection handle */
+    } proxy_server_connected;                   /*!< Event parameter of ESP_BLE_MESH_PROXY_SERVER_CONNECTED_EVT */
+    /**
+     * @brief ESP_BLE_MESH_PROXY_SERVER_DISCONNECTED_EVT
+     */
+    struct ble_mesh_proxy_server_disconnected_param {
+        uint8_t conn_handle;                    /*!< Proxy connection handle */
+        uint8_t reason;                         /*!< Proxy disconnect reason */
+    } proxy_server_disconnected;                /*!< Event parameter of ESP_BLE_MESH_PROXY_SERVER_DISCONNECTED_EVT */
    /**
     * @brief ESP_BLE_MESH_MODEL_SUBSCRIBE_GROUP_ADDR_COMP_EVT
     */
@@ -1002,6 +1002,41 @@ static void btc_ble_mesh_proxy_client_filter_status_recv_cb(uint8_t conn_handle,
 }
 #endif /* CONFIG_BLE_MESH_GATT_PROXY_CLIENT */

+#if CONFIG_BLE_MESH_GATT_PROXY_SERVER
+static void btc_ble_mesh_proxy_server_connect_cb(uint8_t conn_handle)
+{
+    esp_ble_mesh_prov_cb_param_t mesh_param = {0};
+
+    if (conn_handle >= BLE_MESH_MAX_CONN) {
+        BT_ERR("%s, Invalid parameter", __func__);
+        return;
+    }
+
+    BT_DBG("%s", __func__);
+
+    mesh_param.proxy_server_connected.conn_handle = conn_handle;
+
+    btc_ble_mesh_prov_callback(&mesh_param, ESP_BLE_MESH_PROXY_SERVER_CONNECTED_EVT);
+}
+
+static void btc_ble_mesh_proxy_server_disconnect_cb(uint8_t conn_handle, uint8_t reason)
+{
+    esp_ble_mesh_prov_cb_param_t mesh_param = {0};
+
+    if (conn_handle >= BLE_MESH_MAX_CONN) {
+        BT_ERR("%s, Invalid parameter", __func__);
+        return;
+    }
+
+    BT_DBG("%s", __func__);
+
+    mesh_param.proxy_server_disconnected.conn_handle = conn_handle;
+    mesh_param.proxy_server_disconnected.reason = reason;
+
+    btc_ble_mesh_prov_callback(&mesh_param, ESP_BLE_MESH_PROXY_SERVER_DISCONNECTED_EVT);
+}
+#endif /* CONFIG_BLE_MESH_GATT_PROXY_SERVER */
+
 int btc_ble_mesh_client_model_init(esp_ble_mesh_model_t *model)
 {
    if (!bt_mesh_is_initialized()) {
@@ -1769,6 +1804,10 @@ void btc_ble_mesh_prov_call_handler(btc_msg_t *msg)
        bt_mesh_proxy_client_set_disconn_cb(btc_ble_mesh_proxy_client_disconnect_cb);
        bt_mesh_proxy_client_set_filter_status_cb(btc_ble_mesh_proxy_client_filter_status_recv_cb);
 #endif /* CONFIG_BLE_MESH_GATT_PROXY_CLIENT */
+#if CONFIG_BLE_MESH_GATT_PROXY_SERVER
+        bt_mesh_proxy_server_set_conn_cb(btc_ble_mesh_proxy_server_connect_cb);
+        bt_mesh_proxy_server_set_disconn_cb(btc_ble_mesh_proxy_server_disconnect_cb);
+#endif /* CONFIG_BLE_MESH_GATT_PROXY_SERVER */
        int err_code = bt_mesh_init((struct bt_mesh_prov *)arg->mesh_init.prov,
                                    (struct bt_mesh_comp *)arg->mesh_init.comp);
        /* Give the semaphore when BLE Mesh initialization is finished. */
@@ -539,7 +539,8 @@ static int disc_cb(struct ble_gap_event *event, void *arg)
                }
            }
        } else if (bt_mesh_gattc_info[i].service_uuid == BLE_MESH_UUID_MESH_PROXY_VAL) {
-            if (bt_mesh_gattc_conn_cb != NULL && bt_mesh_gattc_conn_cb->proxy_notify != NULL) {
+            if (bt_mesh_gattc_conn_cb != NULL && bt_mesh_gattc_conn_cb->proxy_notify != NULL &&
+                bt_mesh_gattc_info[i].wr_desc_done) {
                len = bt_mesh_gattc_conn_cb->proxy_notify(&bt_mesh_gattc_info[i].conn,
                        notif_data, notif_len);
                if (len < 0) {
@@ -159,6 +159,23 @@ static void proxy_sar_timeout(struct k_work *work)
 }

 #if defined(CONFIG_BLE_MESH_GATT_PROXY_SERVER)
+/**
+ * The following callbacks are used to notify proper information
+ * to the application layer.
+ */
+static proxy_server_connect_cb_t proxy_server_connect_cb;
+static proxy_server_disconnect_cb_t proxy_server_disconnect_cb;
+
+void bt_mesh_proxy_server_set_conn_cb(proxy_server_connect_cb_t cb)
+{
+    proxy_server_connect_cb = cb;
+}
+
+void bt_mesh_proxy_server_set_disconn_cb(proxy_server_disconnect_cb_t cb)
+{
+    proxy_server_disconnect_cb = cb;
+}
+
 /* Next subnet in queue to be advertised */
 static int next_idx;

@@ -605,6 +622,10 @@ static void proxy_connected(struct bt_mesh_conn *conn, uint8_t err)
    client->filter_type = NONE;
 #if defined(CONFIG_BLE_MESH_GATT_PROXY_SERVER)
    (void)memset(client->filter, 0, sizeof(client->filter));
+
+    if (proxy_server_connect_cb) {
+        proxy_server_connect_cb(conn->handle);
+    }
 #endif
    net_buf_simple_reset(&client->buf);
 }
@@ -621,6 +642,11 @@ static void proxy_disconnected(struct bt_mesh_conn *conn, uint8_t reason)
        struct bt_mesh_proxy_client *client = &clients[i];

        if (client->conn == conn) {
+#if CONFIG_BLE_MESH_GATT_PROXY_SERVER
+            if (proxy_server_disconnect_cb) {
+                proxy_server_disconnect_cb(conn->handle, reason);
+            }
+#endif
            if (IS_ENABLED(CONFIG_BLE_MESH_PB_GATT) &&
                    client->filter_type == PROV) {
                bt_mesh_pb_gatt_close(conn);
@@ -38,6 +38,9 @@ extern "C" {
 #define DEVICE_NAME_SIZE    (BLE_MESH_GAP_ADV_MAX_LEN - 2)
 #endif

+typedef void (*proxy_server_connect_cb_t)(uint8_t conn_handle);
+typedef void (*proxy_server_disconnect_cb_t)(uint8_t conn_handle, uint8_t reason);
+
 int bt_mesh_set_device_name(const char *name);

 int bt_mesh_proxy_server_send(struct bt_mesh_conn *conn, uint8_t type,
@@ -46,6 +49,9 @@ int bt_mesh_proxy_server_send(struct bt_mesh_conn *conn, uint8_t type,
 int bt_mesh_proxy_server_prov_enable(void);
 int bt_mesh_proxy_server_prov_disable(bool disconnect);

+void bt_mesh_proxy_server_set_conn_cb(proxy_server_connect_cb_t cb);
+void bt_mesh_proxy_server_set_disconn_cb(proxy_server_disconnect_cb_t cb);
+
 int bt_mesh_proxy_server_gatt_enable(void);
 int bt_mesh_proxy_server_gatt_disable(void);

@@ -236,7 +236,7 @@ typedef enum {
 #define ESP_BT_GAP_MIN_INQ_LEN                (0x01)  /*!< Minimum inquiry duration, unit is 1.28s */
 #define ESP_BT_GAP_MAX_INQ_LEN                (0x30)  /*!< Maximum inquiry duration, unit is 1.28s */

-/// A2DP state callback parameters
+/// GAP state callback parameters
 typedef union {
    /**
     * @brief ESP_BT_GAP_DISC_RES_EVT
@@ -60,6 +60,9 @@ typedef enum {
 #define ESP_HF_CLIENT_PEER_FEAT_ECC        0x80        /* Enhanced Call Control */
 #define ESP_HF_CLIENT_PEER_FEAT_EXTERR    0x100        /* Extended error codes */
 #define ESP_HF_CLIENT_PEER_FEAT_CODEC     0x200        /* Codec Negotiation */
+/* HFP 1.7+ */
+#define ESP_HF_CLIENT_PEER_FEAT_HF_IND    0x400        /* HF Indicators */
+#define ESP_HF_CLIENT_PEER_FEAT_ESCO_S4   0x800        /* eSCO S4 Setting Supported */

 /* CHLD feature masks of AG */
 #define ESP_HF_CLIENT_CHLD_FEAT_REL           0x01       /* 0  Release waiting call or held calls */
@@ -232,7 +232,7 @@ const tBTA_HF_CLIENT_ST_TBL bta_hf_client_st_tbl[] = {
    bta_hf_client_st_closing
 };

-const char *bta_hf_client_version = "1.6";
+const int bta_hf_client_version = HFP_HF_VERSION_1_7;

 /* HF Client control block */
 #if BTA_DYNAMIC_MEMORY == FALSE
@@ -387,7 +387,7 @@ static void bta_hf_client_api_enable(tBTA_HF_CLIENT_DATA *p_data)
    bta_hf_client_cb.p_cback = p_data->api_enable.p_cback;

    /* check if mSBC support enabled */
-    if (strcmp(bta_hf_client_version, "1.6") == 0) {
+    if (bta_hf_client_version >= HFP_HF_VERSION_1_6) {
        bta_hf_client_cb.msbc_enabled = TRUE;
    } else{
        bta_hf_client_cb.msbc_enabled = FALSE;
@@ -18,6 +18,7 @@
 ******************************************************************************/

 #include "bta_hf_client_int.h"
+#include "bta/bta_hf_client_api.h"
 #include "common/bt_trace.h"
 #include <string.h>
 #include "common/bt_defs.h"
@@ -34,6 +35,11 @@
                                    BTM_SCO_PKT_TYPES_MASK_NO_2_EV5 | \
                                    BTM_SCO_PKT_TYPES_MASK_NO_3_EV5)

+#define BTA_HF_CLIENT_SCO_PARAM_IDX_CVSD      0   /* SCO setting for CVSD     */
+#define BTA_HF_CLIENT_ESCO_PARAM_IDX_CVSD_S3  1   /* eSCO setting for CVSD S3 */
+#define BTA_HF_CLIENT_ESCO_PARAM_IDX_MSBC_T2  2   /* eSCO setting for mSBC T2 */
+#define BTA_HF_CLIENT_ESCO_PARAM_IDX_CVSD_S4  3   /* eSCO setting for CVSD S4 */
+
 static const tBTM_ESCO_PARAMS bta_hf_client_esco_params[] = {
    /* SCO CVSD */
    {
@@ -72,6 +78,19 @@ static const tBTM_ESCO_PARAMS bta_hf_client_esco_params[] = {
        BTM_SCO_PKT_TYPES_MASK_NO_2_EV5 |
        BTM_SCO_PKT_TYPES_MASK_NO_3_EV5),
        .retrans_effort = BTM_ESCO_RETRANS_QUALITY,
+    },
+    /* HFP 1.7+ */
+    /* ESCO CVSD S4 */
+    {
+        .rx_bw = BTM_64KBITS_RATE,
+        .tx_bw = BTM_64KBITS_RATE,
+        .max_latency = 12,
+        .voice_contfmt = BTM_VOICE_SETTING_CVSD,
+        /* Allow controller to use all types available except 5-slot EDR */
+        .packet_types = (BTM_SCO_LINK_ALL_PKT_MASK |
+        BTM_SCO_PKT_TYPES_MASK_NO_2_EV5 |
+        BTM_SCO_PKT_TYPES_MASK_NO_3_EV5),
+        .retrans_effort = BTM_ESCO_RETRANS_QUALITY,
    }
 };

@@ -178,18 +197,27 @@ static void bta_hf_client_sco_conn_rsp(tBTM_ESCO_CONN_REQ_EVT_DATA *p_data)
 {
    tBTM_ESCO_PARAMS    resp;
    UINT8               hci_status = HCI_SUCCESS;
+    UINT8            index = BTA_HF_CLIENT_ESCO_PARAM_IDX_CVSD_S3;
 #if (BTM_SCO_HCI_INCLUDED == TRUE )
    tBTA_HFP_CODEC_INFO     codec_info = {BTA_HFP_SCO_CODEC_PCM};
    UINT32              pcm_sample_rate;
 #endif
-    APPL_TRACE_DEBUG("%s", __FUNCTION__);
+
+    APPL_TRACE_DEBUG("%s: negotiated codec = %d", __FUNCTION__, bta_hf_client_cb.scb.negotiated_codec);

    if (bta_hf_client_cb.scb.sco_state == BTA_HF_CLIENT_SCO_LISTEN_ST) {
        if (p_data->link_type == BTM_LINK_TYPE_SCO) {
-            resp = bta_hf_client_esco_params[0];
+            index = BTA_HF_CLIENT_SCO_PARAM_IDX_CVSD;
        } else {
-            resp = bta_hf_client_esco_params[bta_hf_client_cb.scb.negotiated_codec];
+            if ((bta_hf_client_cb.scb.negotiated_codec == BTM_SCO_CODEC_CVSD) &&
+                 (bta_hf_client_cb.scb.features && BTA_HF_CLIENT_FEAT_ESCO_S4) &&
+                 (bta_hf_client_cb.scb.peer_features && BTA_HF_CLIENT_PEER_ESCO_S4)) {
+                index = BTA_HF_CLIENT_ESCO_PARAM_IDX_CVSD_S4;
+            } else if (bta_hf_client_cb.scb.negotiated_codec == BTM_SCO_CODEC_MSBC) {
+                index = BTA_HF_CLIENT_ESCO_PARAM_IDX_MSBC_T2;
+            }
        }
+        resp = bta_hf_client_esco_params[index];

        /* tell sys to stop av if any */
        bta_sys_sco_use(BTA_ID_HS, 1, bta_hf_client_cb.scb.peer_addr);
@@ -350,6 +378,7 @@ static void bta_hf_client_sco_create(BOOLEAN is_orig)
    tBTM_STATUS       status;
    UINT8            *p_bd_addr = NULL;
    tBTM_ESCO_PARAMS params;
+    UINT8            index = BTA_HF_CLIENT_ESCO_PARAM_IDX_CVSD_S3;
 #if (BTM_SCO_HCI_INCLUDED == TRUE )
    tBTM_SCO_ROUTE_TYPE sco_route;
    tBTA_HFP_CODEC_INFO codec_info = {BTA_HFP_SCO_CODEC_PCM};
@@ -364,7 +393,15 @@ static void bta_hf_client_sco_create(BOOLEAN is_orig)
        return;
    }

-    params = bta_hf_client_esco_params[1];
+    if (bta_hf_client_cb.scb.negotiated_codec == BTM_SCO_CODEC_CVSD) {
+        if ((bta_hf_client_cb.scb.features && BTA_HF_CLIENT_FEAT_ESCO_S4) &&
+                (bta_hf_client_cb.scb.peer_features && BTA_HF_CLIENT_PEER_ESCO_S4)) {
+            index = BTA_HF_CLIENT_ESCO_PARAM_IDX_CVSD_S4;
+        }
+    } else if (bta_hf_client_cb.scb.negotiated_codec == BTM_SCO_CODEC_MSBC) {
+        index = BTA_HF_CLIENT_ESCO_PARAM_IDX_MSBC_T2;
+    }
+    params = bta_hf_client_esco_params[index];

    /* if initiating set current scb and peer bd addr */
    if (is_orig) {
@@ -114,7 +114,7 @@ BOOLEAN bta_hf_client_add_record(char *p_service_name, UINT8 scn,

    /* add profile descriptor list */
    profile_uuid = UUID_SERVCLASS_HF_HANDSFREE;
-    version = HFP_VERSION_1_6;
+    version = HFP_VERSION_1_7;

    result &= SDP_AddProfileDescriptorList(sdp_handle, profile_uuid, version);

@@ -29,6 +29,7 @@
 #define HFP_VERSION_1_1         0x0101
 #define HFP_VERSION_1_5         0x0105
 #define HFP_VERSION_1_6         0x0106
+#define HFP_VERSION_1_7         0x0107

 /* RFCOMM MTU SIZE */
 #define BTA_HF_CLIENT_MTU       256
@@ -33,6 +33,10 @@
 **  Constants and data types
 *****************************************************************************/

+/* Hands-Free unit(HF) version */
+#define HFP_HF_VERSION_1_6             0x0106       /* v1.6 */
+#define HFP_HF_VERSION_1_7             0x0107       /* v1.7 */
+
 /* HFP peer (AG) features*/
 #define BTA_HF_CLIENT_PEER_FEAT_3WAY   0x00000001  /* Three-way calling */
 #define BTA_HF_CLIENT_PEER_FEAT_ECNR   0x00000002  /* Echo cancellation and/or noise reduction */
@@ -44,6 +48,9 @@
 #define BTA_HF_CLIENT_PEER_ECC         0x00000080  /* Enhanced Call Control */
 #define BTA_HF_CLIENT_PEER_EXTERR      0x00000100  /* Extended error codes */
 #define BTA_HF_CLIENT_PEER_CODEC       0x00000200  /* Codec Negotiation */
+/* HFP 1.7+ */
+#define BTA_HF_CLIENT_PEER_HF_IND      0x00000400  /* HF Indicators */
+#define BTA_HF_CLIENT_PEER_ESCO_S4     0x00000800  /* eSCO S4 Setting Supported */

 typedef UINT16 tBTA_HF_CLIENT_PEER_FEAT;

@@ -56,6 +63,8 @@ typedef UINT16 tBTA_HF_CLIENT_PEER_FEAT;
 #define BTA_HF_CLIENT_FEAT_ECS         0x00000020  /* Enhanced Call Status */
 #define BTA_HF_CLIENT_FEAT_ECC         0x00000040  /* Enhanced Call Control */
 #define BTA_HF_CLIENT_FEAT_CODEC       0x00000080  /* Codec Negotiation */
+#define BTA_HF_CLIENT_FEAT_HF_IND      0x00000100  /* HF indicators */
+#define BTA_HF_CLIENT_FEAT_ESCO_S4     0x00000200  /* eSCO S4 Setting Supported */

 /* HFP HF extended call handling - masks not related to any spec */
 #define BTA_HF_CLIENT_CHLD_REL          0x00000001  /* 0  Release waiting call or held calls */
@@ -1,16 +1,8 @@
-// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */

 /*****************************************************************************
 *
@@ -33,7 +25,7 @@
 #if BTC_AV_INCLUDED

 typedef struct {
-    BOOLEAN data_channel_open;
+    BOOLEAN data_channel_open; /* used only by A2DP sink */
    UINT8 a2dp_cmd_pending; /* we can have max one command pending */
 } tBTC_AA_CTRL_CB;

@@ -83,7 +75,9 @@ static void btc_a2dp_datapath_open(void)
        btc_a2dp_source_encoder_update();
    }
 #endif
+#if (BTC_AV_SINK_INCLUDED == TRUE)
    btc_aa_ctrl_cb.data_channel_open = TRUE;
+#endif
 }

 BOOLEAN btc_a2dp_control_get_datachnl_stat(void)
@@ -96,22 +90,6 @@ void btc_a2dp_control_set_datachnl_stat(BOOLEAN open)
    btc_aa_ctrl_cb.data_channel_open = open;
 }

-static void btc_a2dp_dispatch_datapath_evt(uint32_t dp_evt)
-{
-    btc_msg_t msg;
-    msg.sig = BTC_SIG_API_CALL;
-    msg.pid = BTC_PID_A2DP;
-    msg.act = BTC_AV_DATAPATH_CTRL_EVT;
-
-    btc_av_args_t arg;
-    memset(&arg, 0, sizeof(btc_av_args_t));
-    arg.dp_evt = dp_evt;
-
-    /* Switch to BTC context */
-    APPL_TRACE_DEBUG("%s sig %u act %u, dp_evt %u\n", __func__, msg.sig, msg.act, arg.dp_evt);
-    btc_transfer_context(&msg, &arg, sizeof(btc_av_args_t), NULL);
-}
-
 void btc_a2dp_control_media_ctrl(esp_a2d_media_ctrl_t ctrl)
 {
    APPL_TRACE_DEBUG("BTC MEDIA (A2DP-DATA) EVENT %u", ctrl);
@@ -146,17 +124,14 @@ void btc_a2dp_control_media_ctrl(esp_a2d_media_ctrl_t ctrl)
        break;
    case ESP_A2D_MEDIA_CTRL_START:
        if (btc_av_stream_ready() == TRUE ) {
-            /* post start event and wait for audio path to open */
+            /* post start event */
            btc_dispatch_sm_event(BTC_AV_START_STREAM_REQ_EVT, NULL, 0);
-
-            btc_a2dp_dispatch_datapath_evt(BTC_AV_DATAPATH_OPEN_EVT);
 #if (BTC_AV_SINK_INCLUDED == TRUE)
            if (btc_av_get_peer_sep() == AVDT_TSEP_SRC && btc_av_get_service_id() == BTA_A2DP_SINK_SERVICE_ID) {
                btc_a2dp_control_command_ack(ESP_A2D_MEDIA_CTRL_ACK_SUCCESS);
            }
 #endif
        } else if (btc_av_stream_started_ready()) {
-            btc_a2dp_dispatch_datapath_evt(BTC_AV_DATAPATH_OPEN_EVT);
            btc_a2dp_control_command_ack(ESP_A2D_MEDIA_CTRL_ACK_SUCCESS);
        } else {
            btc_a2dp_control_command_ack(ESP_A2D_MEDIA_CTRL_ACK_FAILURE);
@@ -1,16 +1,8 @@
-// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */

 /******************************************************************************
 **
@@ -1579,7 +1571,6 @@ static void btc_a2dp_source_thread_init(UNUSED_ATTR void *context)

 static void btc_a2dp_source_thread_cleanup(UNUSED_ATTR void *context)
 {
-    btc_a2dp_control_set_datachnl_stat(FALSE);
    /* Clear media task flag */
    btc_a2dp_source_state = BTC_A2DP_SOURCE_STATE_OFF;

@@ -1,16 +1,8 @@
-// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */

 /*****************************************************************************
 *
@@ -681,6 +673,9 @@ static BOOLEAN btc_av_state_opened_handler(btc_sm_event_t event, void *p_data)
            /* pending start flag will be cleared when exit current state */
        }
 #endif /* BTC_AV_SRC_INCLUDED */
+        /* wait for audio path to open */
+        btc_a2dp_control_datapath_ctrl(BTC_AV_DATAPATH_OPEN_EVT);
+
        btc_sm_change_state(btc_av_cb.sm_handle, BTC_AV_STATE_STARTED);

    } break;
@@ -1509,10 +1504,6 @@ void btc_a2dp_call_handler(btc_msg_t *msg)
        btc_a2dp_control_media_ctrl(arg->ctrl);
        break;
    }
-    case BTC_AV_DATAPATH_CTRL_EVT: {
-        btc_a2dp_control_datapath_ctrl(arg->dp_evt);
-        break;
-    }
    case BTC_AV_CONNECT_REQ_EVT:
        btc_sm_dispatch(btc_av_cb.sm_handle, msg->act, (char *)msg->arg);
        break;
@@ -51,13 +51,13 @@
 #endif

 #ifndef BTC_HF_CLIENT_FEATURES
-#define BTC_HF_CLIENT_FEATURES   ( BTA_HF_CLIENT_FEAT_ECNR  | \
-                                    BTA_HF_CLIENT_FEAT_3WAY  | \
-                                    BTA_HF_CLIENT_FEAT_CLI   | \
-                                    BTA_HF_CLIENT_FEAT_VREC  | \
-                                    BTA_HF_CLIENT_FEAT_VOL   | \
-                                    BTA_HF_CLIENT_FEAT_ECS   | \
-                                    BTA_HF_CLIENT_FEAT_ECC   | \
+#define BTC_HF_CLIENT_FEATURES   ( BTA_HF_CLIENT_FEAT_ECNR    | \
+                                    BTA_HF_CLIENT_FEAT_3WAY   | \
+                                    BTA_HF_CLIENT_FEAT_CLI    | \
+                                    BTA_HF_CLIENT_FEAT_VREC   | \
+                                    BTA_HF_CLIENT_FEAT_VOL    | \
+                                    BTA_HF_CLIENT_FEAT_ECS    | \
+                                    BTA_HF_CLIENT_FEAT_ECC    | \
                                    BTA_HF_CLIENT_FEAT_CODEC)
 #endif

@@ -66,7 +66,7 @@
 /************************************************************************************
 **  Static variables
 ************************************************************************************/
-const char *btc_hf_client_version = "1.6";
+const int btc_hf_client_version = HFP_HF_VERSION_1_7;

 #if HFP_DYNAMIC_MEMORY == FALSE
 static hf_client_local_param_t hf_client_local_param;
@@ -200,7 +200,7 @@ static bt_status_t connect_int( bt_bdaddr_t *bd_addr, uint16_t uuid )

 bt_status_t btc_hf_client_connect( bt_bdaddr_t *bd_addr )
 {
-    BTC_TRACE_EVENT("HFP Client version is  %s", btc_hf_client_version);
+    BTC_TRACE_EVENT("HFP Client version is  0x%04x", btc_hf_client_version);
    CHECK_HF_CLIENT_INIT();
    return btc_queue_connect(UUID_SERVCLASS_HF_HANDSFREE, bd_addr, connect_int);
 }
@@ -690,33 +690,36 @@ bt_status_t btc_hf_client_execute_service(BOOLEAN b_enable)
 {
    BTC_TRACE_EVENT("%s enable:%d", __FUNCTION__, b_enable);

-     if (b_enable)
-     {
-          /* Enable and register with BTA-HFClient */
-          BTA_HfClientEnable(bte_hf_client_evt);
-          if (strcmp(btc_hf_client_version, "1.6") == 0)
-          {
-              BTC_TRACE_EVENT("Support Codec Nego. %d ", BTC_HF_CLIENT_FEATURES);
-              BTA_HfClientRegister(BTC_HF_CLIENT_SECURITY, BTC_HF_CLIENT_FEATURES,
-                      BTC_HF_CLIENT_SERVICE_NAME);
-          }
-          else
-          {
-              BTC_TRACE_EVENT("No Codec Nego Supported");
-              hf_client_local_param.btc_hf_client_features = BTC_HF_CLIENT_FEATURES;
-              hf_client_local_param.btc_hf_client_features = hf_client_local_param.btc_hf_client_features & (~BTA_HF_CLIENT_FEAT_CODEC);
-              BTC_TRACE_EVENT("hf_client_local_param.btc_hf_client_features is   %d", hf_client_local_param.btc_hf_client_features);
-              BTA_HfClientRegister(BTC_HF_CLIENT_SECURITY, hf_client_local_param.btc_hf_client_features,
-                      BTC_HF_CLIENT_SERVICE_NAME);
-          }
+    if (b_enable)
+    {
+        /* Enable and register with BTA-HFClient */
+        BTA_HfClientEnable(bte_hf_client_evt);
+        hf_client_local_param.btc_hf_client_features = BTC_HF_CLIENT_FEATURES;
+        if (btc_hf_client_version >= HFP_HF_VERSION_1_7)
+        {
+            hf_client_local_param.btc_hf_client_features |= BTA_HF_CLIENT_FEAT_ESCO_S4;
+            BTC_TRACE_EVENT("eSCO S4 Setting Supported");

-     }
-     else
-     {
-         BTA_HfClientDeregister(hf_client_local_param.btc_hf_client_cb.handle);
-         BTA_HfClientDisable();
-     }
-     return BT_STATUS_SUCCESS;
+        }
+        else if (btc_hf_client_version >= HFP_HF_VERSION_1_6)
+        {
+            BTC_TRACE_EVENT("No eSCO S4 Setting Supported");
+        }
+        else
+        {
+            BTC_TRACE_EVENT("No Codec Nego Supported");
+            hf_client_local_param.btc_hf_client_features = hf_client_local_param.btc_hf_client_features & (~BTA_HF_CLIENT_FEAT_CODEC);
+        }
+        BTC_TRACE_EVENT("hf_client_local_param.btc_hf_client_features is   %d", hf_client_local_param.btc_hf_client_features);
+        BTA_HfClientRegister(BTC_HF_CLIENT_SECURITY, hf_client_local_param.btc_hf_client_features,
+                    BTC_HF_CLIENT_SERVICE_NAME);
+    }
+    else
+    {
+        BTA_HfClientDeregister(hf_client_local_param.btc_hf_client_cb.handle);
+        BTA_HfClientDisable();
+    }
+    return BT_STATUS_SUCCESS;
 }

 static void process_ind_evt(tBTA_HF_CLIENT_IND *ind)
@@ -1,16 +1,8 @@
-// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */


 /*******************************************************************************
@@ -79,7 +71,6 @@ typedef enum {
    BTC_AV_SRC_API_REG_DATA_CB_EVT,
 #endif  /* BTC_AV_SRC_INCLUDED */
    BTC_AV_API_MEDIA_CTRL_EVT,
-    BTC_AV_DATAPATH_CTRL_EVT,
 } btc_av_act_t;

 /* btc_av_args_t */
@@ -104,8 +95,6 @@ typedef union {
 #endif /* BTC_AV_SRC_INCLUDED */
    // BTC_AV_API_MEDIA_CTRL_EVT
    esp_a2d_media_ctrl_t ctrl;
-    // BTC_AV_DATAPATH_CTRL_EVT
-    uint32_t dp_evt;
 } btc_av_args_t;

 /*******************************************************************************
@@ -209,7 +209,8 @@ static void parse_ble_read_adv_max_len_response(
 {

    uint8_t *stream = read_command_complete_header(response, HCI_BLE_RD_MAX_ADV_DATA_LEN, 1 /* bytes after */);
-    STREAM_TO_UINT8(*adv_max_len_ptr, stream);
+    // Size: 2 Octets ; Value: 0x001F – 0x0672 ; Maximum supported advertising data length
+    STREAM_TO_UINT16(*adv_max_len_ptr, stream);

    osi_free(response);
 }
@@ -693,23 +693,16 @@ tBTM_STATUS BTM_BlePeriodicAdvCfgDataRaw(UINT8 instance, UINT16 len, UINT8 *data
 {
    tBTM_STATUS status = BTM_SUCCESS;
    tHCI_STATUS err = HCI_SUCCESS;
-    uint16_t rem_len;
+    uint16_t rem_len = len;
    UINT8 operation = 0;
    UINT16 data_offset = 0;
    tBTM_BLE_5_GAP_CB_PARAMS cb_params = {0};

    if ((status = btm_ble_ext_adv_set_data_validate(instance, len, data)) != BTM_SUCCESS) {
       BTM_TRACE_ERROR("%s, invalid extend adv data.", __func__);
+       goto end;
    }

-    if (len > controller_get_interface()->ble_get_ext_adv_data_max_len()) {
-        BTM_TRACE_ERROR("%s, The adv data len(%d) is longer then the controller adv max len(%d)",
-            __func__, len, controller_get_interface()->ble_get_ext_adv_data_max_len());
-        status = BTM_ILLEGAL_VALUE;
-    }
-
-    rem_len = len;
-
    do {
        UINT8 send_data_len = (rem_len > BTM_BLE_PERIODIC_ADV_DATA_LEN_MAX) ? BTM_BLE_PERIODIC_ADV_DATA_LEN_MAX : rem_len;

@@ -733,8 +726,8 @@ tBTM_STATUS BTM_BlePeriodicAdvCfgDataRaw(UINT8 instance, UINT16 len, UINT8 *data
 	data_offset += send_data_len;
    } while(rem_len);

+end:
    cb_params.status = status;
-
    BTM_ExtBleCallbackTrigger(BTM_BLE_5_GAP_PERIODIC_ADV_DATA_SET_COMPLETE_EVT, &cb_params);

    return status;
@@ -1112,6 +1105,12 @@ static tBTM_STATUS btm_ble_ext_adv_set_data_validate(UINT8 instance, UINT16 len,
            BTM_TRACE_ERROR("%s, for the legacy adv, the adv data length can't exceed 31. line %d", __func__, __LINE__);
            return BTM_ILLEGAL_VALUE;
        }
+    } else {
+        if (len > controller_get_interface()->ble_get_ext_adv_data_max_len()) {
+            BTM_TRACE_ERROR("%s, The adv data len(%d) is longer then the controller adv max len(%d)",
+                __func__, len, controller_get_interface()->ble_get_ext_adv_data_max_len());
+            return BTM_ILLEGAL_VALUE;
+        }
    }

    return BTM_SUCCESS;
@@ -1539,13 +1539,12 @@ void smp_idle_terminate(tSMP_CB *p_cb, tSMP_INT_DATA *p_data)
 *******************************************************************************/
 void smp_fast_conn_param(tSMP_CB *p_cb, tSMP_INT_DATA *p_data)
 {
-#if (BT_MULTI_CONNECTION_ENBALE == FALSE)
    if(p_cb->role == BTM_ROLE_MASTER) {
+#if (BT_MULTI_CONNECTION_ENBALE == FALSE)
        L2CA_EnableUpdateBleConnParams(p_cb->pairing_bda, FALSE);
-    }
 #endif
+    } else {
 #if (SMP_SLAVE_CON_PARAMS_UPD_ENABLE == TRUE)
-    else {
        tBTM_SEC_DEV_REC    *p_rec = btm_find_dev (p_cb->pairing_bda);
        if(p_rec && p_rec->ble.skip_update_conn_param) {
            //do nothing
@@ -1558,8 +1557,8 @@ void smp_fast_conn_param(tSMP_CB *p_cb, tSMP_INT_DATA *p_data)
        #if (BT_MULTI_CONNECTION_ENBALE == FALSE)
        L2CA_EnableUpdateBleConnParams(p_cb->pairing_bda, FALSE);
        #endif
-    }
 #endif
+    }
 }

 /*******************************************************************************
@@ -18,7 +18,7 @@ extern "C" {
 #endif

 #define ESP_BT_CTRL_CONFIG_MAGIC_VAL    0x5A5AA5A5
-#define ESP_BT_CTRL_CONFIG_VERSION      0x02104270
+#define ESP_BT_CTRL_CONFIG_VERSION      0x02112280

 #define ESP_BT_HCI_TL_MAGIC_VALUE   0xfadebead
 #define ESP_BT_HCI_TL_VERSION       0x00010000
@@ -178,6 +178,7 @@ typedef void (* esp_bt_hci_tl_callback_t) (void *arg, uint8_t status);
    .hw_target_code = BLE_HW_TARGET_CODE_ESP32C3_CHIP_ECO0,                \
    .slave_ce_len_min = SLAVE_CE_LEN_MIN_DEFAULT,                          \
    .hw_recorrect_en = AGC_RECORRECT_EN,                                   \
+    .cca_thresh = CONFIG_BT_CTRL_HW_CCA_VAL,                               \
 };

 #else
@@ -244,6 +245,7 @@ typedef struct {
    uint32_t hw_target_code;                /*!< hardware target */
    uint8_t slave_ce_len_min;
    uint8_t hw_recorrect_en;
+    uint8_t cca_thresh;                     /*!< cca threshold*/
 } esp_bt_controller_config_t;

 /**
@@ -18,7 +18,7 @@ extern "C" {
 #endif

 #define ESP_BT_CTRL_CONFIG_MAGIC_VAL    0x5A5AA5A5
-#define ESP_BT_CTRL_CONFIG_VERSION      0x02104270
+#define ESP_BT_CTRL_CONFIG_VERSION      0x02112280

 #define ESP_BT_HCI_TL_MAGIC_VALUE   0xfadebead
 #define ESP_BT_HCI_TL_VERSION       0x00010000
@@ -177,6 +177,7 @@ typedef void (* esp_bt_hci_tl_callback_t) (void *arg, uint8_t status);
    .hw_target_code = BLE_HW_TARGET_CODE_ESP32S3_CHIP_ECO0,                \
    .slave_ce_len_min = SLAVE_CE_LEN_MIN_DEFAULT,                          \
    .hw_recorrect_en = AGC_RECORRECT_EN,                                   \
+    .cca_thresh = CONFIG_BT_CTRL_HW_CCA_VAL,                               \
 };

 #else
@@ -243,6 +244,7 @@ typedef struct {
    uint32_t hw_target_code;                /*!< hardware target */
    uint8_t slave_ce_len_min;               /*!< slave minimum ce length*/
    uint8_t hw_recorrect_en;
+    uint8_t cca_thresh;                     /*!< cca threshold*/
 } esp_bt_controller_config_t;

 /**
@@ -865,7 +865,7 @@ static int linenoiseEdit(char *buf, size_t buflen, const char *prompt)
        nread = read(in_fd, &c, 1);
        if (nread <= 0) return l.len;

-        if ( (getMillis() - t1) < LINENOISE_PASTE_KEY_DELAY ) {
+        if ( (getMillis() - t1) < LINENOISE_PASTE_KEY_DELAY && c != ENTER) {
            /* Pasting data, insert characters without formatting.
             * This can only be performed when the cursor is at the end of the
             * line. */
@@ -284,8 +284,10 @@ esp_err_t adc_digi_initialize(const adc_digi_init_config_t *init_config)
    };
    adc_hal_context_config(&s_adc_digi_ctx->hal, &config);

-    //enable SARADC module clock
+    //enable ADC digital part
    periph_module_enable(PERIPH_SARADC_MODULE);
+    //reset ADC digital part
+    periph_module_reset(PERIPH_SARADC_MODULE);

 #if SOC_ADC_CALIBRATION_V1_SUPPORTED
    adc_hal_calibration_init(ADC_NUM_1);
@@ -248,6 +248,10 @@ esp_err_t touch_pad_config(touch_pad_t touch_num)

 esp_err_t touch_pad_init(void)
 {
+    //TODO: IDF-4813
+    extern bool esp_no_sleep;
+    esp_no_sleep = true;
+
    if (rtc_touch_mux == NULL) {
        rtc_touch_mux = xSemaphoreCreateMutex();
    }
@@ -491,15 +491,21 @@ esp_err_t gpio_isr_handler_remove(gpio_num_t gpio_num)

 void gpio_uninstall_isr_service(void)
 {
+    gpio_isr_func_t *gpio_isr_func_free = NULL;
+    gpio_isr_handle_t gpio_isr_handle_free = NULL;
+    portENTER_CRITICAL(&gpio_context.gpio_spinlock);
    if (gpio_context.gpio_isr_func == NULL) {
+        portEXIT_CRITICAL(&gpio_context.gpio_spinlock);
        return;
    }
-    portENTER_CRITICAL(&gpio_context.gpio_spinlock);
-    esp_intr_free(gpio_context.gpio_isr_handle);
-    free(gpio_context.gpio_isr_func);
+    gpio_isr_func_free = gpio_context.gpio_isr_func;
    gpio_context.gpio_isr_func = NULL;
+    gpio_isr_handle_free = gpio_context.gpio_isr_handle;
+    gpio_context.gpio_isr_handle = NULL;
    gpio_context.isr_core_id = GPIO_ISR_CORE_ID_UNINIT;
    portEXIT_CRITICAL(&gpio_context.gpio_spinlock);
+    esp_intr_free(gpio_isr_handle_free);
+    free(gpio_isr_func_free);
    return;
 }

@@ -532,7 +538,12 @@ esp_err_t gpio_isr_register(void (*fn)(void *), void *arg, int intr_alloc_flags,
 #else /* CONFIG_FREERTOS_UNICORE */
    ret = esp_ipc_call_blocking(gpio_context.isr_core_id, gpio_isr_register_on_core_static, (void *)&p);
 #endif /* !CONFIG_FREERTOS_UNICORE */
-    if(ret != ESP_OK || p.ret != ESP_OK) {
+    if (ret != ESP_OK) {
+        ESP_LOGE(GPIO_TAG, "esp_ipc_call_blocking failed (0x%x)", ret);
+        return ESP_ERR_NOT_FOUND;
+    }
+    if (p.ret != ESP_OK) {
+        ESP_LOGE(GPIO_TAG, "esp_intr_alloc failed (0x%x)", p.ret);
        return ESP_ERR_NOT_FOUND;
    }
    return ESP_OK;
@@ -39,7 +39,7 @@ static const char *I2C_TAG = "i2c";
 #define I2C_DRIVER_ERR_STR             "i2c driver install error"
 #define I2C_DRIVER_MALLOC_ERR_STR      "i2c driver malloc error"
 #define I2C_NUM_ERROR_STR              "i2c number error"
-#define I2C_TIMEING_VAL_ERR_STR        "i2c timing value error"
+#define I2C_TIMING_VAL_ERR_STR        "i2c timing value error"
 #define I2C_ADDR_ERROR_STR             "i2c null address error"
 #define I2C_DRIVER_NOT_INSTALL_ERR_STR "i2c driver not installed"
 #define I2C_SLAVE_BUFFER_LEN_ERR_STR   "i2c buffer size too small for slave mode"
@@ -705,8 +705,8 @@ esp_err_t i2c_param_config(i2c_port_t i2c_num, const i2c_config_t *i2c_conf)
 esp_err_t i2c_set_period(i2c_port_t i2c_num, int high_period, int low_period)
 {
    ESP_RETURN_ON_FALSE(i2c_num < I2C_NUM_MAX, ESP_ERR_INVALID_ARG, I2C_TAG, I2C_NUM_ERROR_STR);
-    ESP_RETURN_ON_FALSE((high_period <= I2C_SCL_HIGH_PERIOD_V) && (high_period > 0), ESP_ERR_INVALID_ARG, I2C_TAG, I2C_TIMEING_VAL_ERR_STR);
-    ESP_RETURN_ON_FALSE((low_period <= I2C_SCL_LOW_PERIOD_V) && (low_period > 0), ESP_ERR_INVALID_ARG, I2C_TAG, I2C_TIMEING_VAL_ERR_STR);
+    ESP_RETURN_ON_FALSE((high_period <= I2C_SCL_HIGH_PERIOD_V) && (high_period > 0), ESP_ERR_INVALID_ARG, I2C_TAG, I2C_TIMING_VAL_ERR_STR);
+    ESP_RETURN_ON_FALSE((low_period <= I2C_SCL_LOW_PERIOD_V) && (low_period > 0), ESP_ERR_INVALID_ARG, I2C_TAG, I2C_TIMING_VAL_ERR_STR);

    I2C_ENTER_CRITICAL(&(i2c_context[i2c_num].spinlock));
    i2c_hal_set_scl_timing(&(i2c_context[i2c_num].hal), high_period, low_period);
@@ -748,8 +748,8 @@ esp_err_t i2c_filter_disable(i2c_port_t i2c_num)
 esp_err_t i2c_set_start_timing(i2c_port_t i2c_num, int setup_time, int hold_time)
 {
    ESP_RETURN_ON_FALSE(i2c_num < I2C_NUM_MAX, ESP_ERR_INVALID_ARG, I2C_TAG, I2C_NUM_ERROR_STR);
-    ESP_RETURN_ON_FALSE((hold_time <= I2C_SCL_START_HOLD_TIME_V) && (hold_time > 0), ESP_ERR_INVALID_ARG, I2C_TAG, I2C_TIMEING_VAL_ERR_STR);
-    ESP_RETURN_ON_FALSE((setup_time <= I2C_SCL_RSTART_SETUP_TIME_V) && (setup_time > 0), ESP_ERR_INVALID_ARG, I2C_TAG, I2C_TIMEING_VAL_ERR_STR);
+    ESP_RETURN_ON_FALSE((hold_time <= I2C_SCL_START_HOLD_TIME_V) && (hold_time > 0), ESP_ERR_INVALID_ARG, I2C_TAG, I2C_TIMING_VAL_ERR_STR);
+    ESP_RETURN_ON_FALSE((setup_time <= I2C_SCL_RSTART_SETUP_TIME_V) && (setup_time > 0), ESP_ERR_INVALID_ARG, I2C_TAG, I2C_TIMING_VAL_ERR_STR);

    I2C_ENTER_CRITICAL(&(i2c_context[i2c_num].spinlock));
    i2c_hal_set_start_timing(&(i2c_context[i2c_num].hal), setup_time, hold_time);
@@ -770,8 +770,8 @@ esp_err_t i2c_get_start_timing(i2c_port_t i2c_num, int *setup_time, int *hold_ti
 esp_err_t i2c_set_stop_timing(i2c_port_t i2c_num, int setup_time, int hold_time)
 {
    ESP_RETURN_ON_FALSE(i2c_num < I2C_NUM_MAX, ESP_ERR_INVALID_ARG, I2C_TAG, I2C_NUM_ERROR_STR);
-    ESP_RETURN_ON_FALSE((setup_time <= I2C_SCL_STOP_SETUP_TIME_V) && (setup_time > 0), ESP_ERR_INVALID_ARG, I2C_TAG, I2C_TIMEING_VAL_ERR_STR);
-    ESP_RETURN_ON_FALSE((hold_time <= I2C_SCL_STOP_HOLD_TIME_V) && (hold_time > 0), ESP_ERR_INVALID_ARG, I2C_TAG, I2C_TIMEING_VAL_ERR_STR);
+    ESP_RETURN_ON_FALSE((setup_time <= I2C_SCL_STOP_SETUP_TIME_V) && (setup_time > 0), ESP_ERR_INVALID_ARG, I2C_TAG, I2C_TIMING_VAL_ERR_STR);
+    ESP_RETURN_ON_FALSE((hold_time <= I2C_SCL_STOP_HOLD_TIME_V) && (hold_time > 0), ESP_ERR_INVALID_ARG, I2C_TAG, I2C_TIMING_VAL_ERR_STR);

    I2C_ENTER_CRITICAL(&(i2c_context[i2c_num].spinlock));
    i2c_hal_set_stop_timing(&(i2c_context[i2c_num].hal), setup_time, hold_time);
@@ -792,8 +792,8 @@ esp_err_t i2c_get_stop_timing(i2c_port_t i2c_num, int *setup_time, int *hold_tim
 esp_err_t i2c_set_data_timing(i2c_port_t i2c_num, int sample_time, int hold_time)
 {
    ESP_RETURN_ON_FALSE(i2c_num < I2C_NUM_MAX, ESP_ERR_INVALID_ARG, I2C_TAG, I2C_NUM_ERROR_STR);
-    ESP_RETURN_ON_FALSE((sample_time <= I2C_SDA_SAMPLE_TIME_V) && (sample_time > 0), ESP_ERR_INVALID_ARG, I2C_TAG, I2C_TIMEING_VAL_ERR_STR);
-    ESP_RETURN_ON_FALSE((hold_time <= I2C_SDA_HOLD_TIME_V) && (hold_time > 0), ESP_ERR_INVALID_ARG, I2C_TAG, I2C_TIMEING_VAL_ERR_STR);
+    ESP_RETURN_ON_FALSE((sample_time <= I2C_SDA_SAMPLE_TIME_V) && (sample_time > 0), ESP_ERR_INVALID_ARG, I2C_TAG, I2C_TIMING_VAL_ERR_STR);
+    ESP_RETURN_ON_FALSE((hold_time <= I2C_SDA_HOLD_TIME_V) && (hold_time > 0), ESP_ERR_INVALID_ARG, I2C_TAG, I2C_TIMING_VAL_ERR_STR);

    I2C_ENTER_CRITICAL(&(i2c_context[i2c_num].spinlock));
    i2c_hal_set_sda_timing(&(i2c_context[i2c_num].hal), sample_time, hold_time);
@@ -814,7 +814,7 @@ esp_err_t i2c_get_data_timing(i2c_port_t i2c_num, int *sample_time, int *hold_ti
 esp_err_t i2c_set_timeout(i2c_port_t i2c_num, int timeout)
 {
    ESP_RETURN_ON_FALSE(i2c_num < I2C_NUM_MAX, ESP_ERR_INVALID_ARG, I2C_TAG, I2C_NUM_ERROR_STR);
-    ESP_RETURN_ON_FALSE((timeout <= I2C_LL_MAX_TIMEOUT) && (timeout > 0), ESP_ERR_INVALID_ARG, I2C_TAG, I2C_TIMEING_VAL_ERR_STR);
+    ESP_RETURN_ON_FALSE((timeout <= I2C_LL_MAX_TIMEOUT) && (timeout > 0), ESP_ERR_INVALID_ARG, I2C_TAG, I2C_TIMING_VAL_ERR_STR);

    I2C_ENTER_CRITICAL(&(i2c_context[i2c_num].spinlock));
    i2c_hal_set_tout(&(i2c_context[i2c_num].hal), timeout);
@@ -1342,7 +1342,9 @@ static void IRAM_ATTR i2c_master_cmd_begin_static(i2c_port_t i2c_num)
            p_i2c->cmd_idx = 0;
            if (i2c_cmd_is_single_byte(cmd) || cmd->total_bytes == cmd->bytes_used) {
                p_i2c->cmd_link.head = p_i2c->cmd_link.head->next;
-                p_i2c->cmd_link.head->cmd.bytes_used = 0;
+                if(p_i2c->cmd_link.head) {
+                    p_i2c->cmd_link.head->cmd.bytes_used = 0;
+                }
            }
            p_i2c->status = I2C_STATUS_WRITE;
            break;
@@ -1375,16 +1377,18 @@ static void IRAM_ATTR i2c_master_cmd_begin_static(i2c_port_t i2c_num)
 //Check whether read or write buffer in cmd_link is internal.
 static bool is_cmd_link_buffer_internal(const i2c_cmd_link_t *link)
 {
-    const i2c_cmd_link_t *cmd_link = link;
-    while (cmd_link != NULL)  {
-        if (cmd_link->cmd.hw_cmd.op_code == I2C_LL_CMD_WRITE || cmd_link->cmd.hw_cmd.op_code == I2C_LL_CMD_READ) {
-            if (cmd_link->cmd.data != NULL && !esp_ptr_internal(cmd_link->cmd.data)) {
-                return false;
-            }
-        }
-        cmd_link = cmd_link->next;
+    bool is_internal = true;
+    for (const i2c_cmd_link_t *cmd_link = link;
+         cmd_link != NULL && is_internal;
+         cmd_link = cmd_link->next)
+    {
+        /* A command node has a valid pointer if it is a read command or a write command with more than one byte. */
+        const bool data_pointer = (cmd_link->cmd.hw_cmd.op_code == I2C_LL_CMD_WRITE && !i2c_cmd_is_single_byte(&cmd_link->cmd))
+                                || cmd_link->cmd.hw_cmd.op_code == I2C_LL_CMD_READ;
+        /* Check if the (non-NULL) pointer points to internal memory. */
+        is_internal &= !data_pointer || cmd_link->cmd.data == NULL || esp_ptr_internal(cmd_link->cmd.data);
    }
-    return true;
+    return is_internal;
 }
 #endif

@@ -1398,11 +1402,10 @@ esp_err_t i2c_master_cmd_begin(i2c_port_t i2c_num, i2c_cmd_handle_t cmd_handle,
 #if CONFIG_SPIRAM_USE_MALLOC
    //If the i2c read or write buffer is not in internal RAM, we will return ESP_FAIL
    //to avoid the ISR handler function crashing when the cache is disabled.
-    if ((p_i2c_obj[i2c_num]->intr_alloc_flags & ESP_INTR_FLAG_IRAM)) {
-        if (!is_cmd_link_buffer_internal(((const i2c_cmd_desc_t *)cmd_handle)->head) ) {
-            ESP_LOGE(I2C_TAG, I2C_PSRAM_BUFFER_WARN_STR);
-            return ESP_ERR_INVALID_ARG;
-        }
+    if ( (p_i2c_obj[i2c_num]->intr_alloc_flags & ESP_INTR_FLAG_IRAM) &&
+         !is_cmd_link_buffer_internal(((const i2c_cmd_desc_t *)cmd_handle)->head) ) {
+        ESP_LOGE(I2C_TAG, I2C_PSRAM_BUFFER_WARN_STR);
+        return ESP_ERR_INVALID_ARG;
    }
 #endif
    // Sometimes when the FSM get stuck, the ACK_ERR interrupt will occur endlessly until we reset the FSM and clear bus.
@@ -1000,9 +1000,9 @@ static esp_err_t i2s_calculate_adc_dac_clock(int i2s_num, i2s_hal_clock_cfg_t *c
    ESP_RETURN_ON_FALSE(p_i2s[i2s_num]->hal_cfg.mode & (I2S_MODE_DAC_BUILT_IN | I2S_MODE_ADC_BUILT_IN), ESP_ERR_INVALID_ARG, TAG, "current mode is not built-in ADC/DAC");

    /* Set I2S bit clock */
-    clk_cfg->bclk = p_i2s[i2s_num]->hal_cfg.sample_rate * I2S_LL_AD_BCK_FACTOR * 2;
+    clk_cfg->bclk = p_i2s[i2s_num]->hal_cfg.sample_rate * I2S_LL_AD_BCK_FACTOR;
    /* Set I2S bit clock default division */
-    clk_cfg->bclk_div = I2S_LL_AD_BCK_FACTOR;
+    clk_cfg->bclk_div = p_i2s[i2s_num]->hal_cfg.chan_bits;
    /* If fixed_mclk and use_apll are set, use fixed_mclk as mclk frequency, otherwise calculate by mclk = sample_rate * multiple */
    clk_cfg->mclk = (p_i2s[i2s_num]->use_apll && p_i2s[i2s_num]->fixed_mclk) ?
                    p_i2s[i2s_num]->fixed_mclk : clk_cfg->bclk * clk_cfg->bclk_div;
@@ -1213,7 +1213,7 @@ static esp_err_t i2s_calculate_clock(i2s_port_t i2s_num, i2s_hal_clock_cfg_t *cl
 static uint32_t i2s_get_max_channel_num(i2s_channel_t chan_mask)
 {
    uint32_t max_chan = 0;
-    uint32_t channel = chan_mask & 0xFFFF;
+    uint32_t channel = chan_mask >> 16;
    for (int i = 0; channel && i < 16; i++, channel >>= 1) {
        if (channel & 0x01) {
            max_chan = i + 1;
@@ -1246,7 +1246,7 @@ static uint32_t i2s_get_active_channel_num(const i2s_hal_config_t *hal_cfg)
 #if SOC_I2S_SUPPORTS_TDM
    case I2S_CHANNEL_FMT_MULTIPLE: {
        uint32_t num = 0;
-        uint32_t chan_mask = hal_cfg->chan_mask & 0xFFFF;
+        uint32_t chan_mask = hal_cfg->chan_mask >> 16;
        for (int i = 0; chan_mask && i < 16; i++, chan_mask >>= 1) {
            if (chan_mask & 0x01) {
                num++;
@@ -1566,18 +1566,36 @@ esp_err_t i2s_set_clk(i2s_port_t i2s_num, uint32_t rate, uint32_t bits_cfg, i2s_
    ESP_RETURN_ON_FALSE(p_i2s[i2s_num], ESP_ERR_INVALID_ARG, TAG, "I2S%d has not installed yet", i2s_num);

    i2s_hal_config_t *cfg = &p_i2s[i2s_num]->hal_cfg;
+
+    /* Stop I2S */
+    i2s_stop(i2s_num);
+
    /* If not the first time, update configuration */
    if (p_i2s[i2s_num]->last_buf_size) {
        cfg->sample_rate = rate;
        cfg->sample_bits = bits_cfg & 0xFFFF;
        cfg->chan_bits = (bits_cfg >> 16) > cfg->sample_bits ? (bits_cfg >> 16) : cfg->sample_bits;
 #if SOC_I2S_SUPPORTS_TDM
-        cfg->chan_mask = ch;
-        cfg->chan_fmt = ch == I2S_CHANNEL_MONO ? I2S_CHANNEL_FMT_ONLY_RIGHT : cfg->chan_fmt;
-        cfg->active_chan   = i2s_get_active_channel_num(cfg);
-        uint32_t max_channel = i2s_get_max_channel_num(cfg->chan_mask);
-        /* If total channel is smaller than max actived channel number then set it to the max active channel number */
-        cfg->total_chan = p_i2s[i2s_num]->hal_cfg.total_chan < max_channel ? max_channel : p_i2s[i2s_num]->hal_cfg.total_chan;
+        if (ch & I2S_CHANNEL_MONO) {
+            cfg->chan_fmt = I2S_CHANNEL_FMT_ONLY_RIGHT;
+            cfg->chan_mask = I2S_TDM_ACTIVE_CH0; // Only activate one channel in mono
+            if (ch >> 16) {
+                cfg->total_chan = i2s_get_max_channel_num(ch);
+            } else {
+                cfg->total_chan = 2;
+            }
+        } else {
+            if (ch >> 16) {
+                cfg->chan_fmt = I2S_CHANNEL_FMT_MULTIPLE;
+                cfg->chan_mask = ch & 0xFFFF0000;
+                cfg->total_chan = i2s_get_max_channel_num(cfg->chan_mask);
+            } else {
+                /* If no TDM channels activated, use 2 channels as defualt */
+                cfg->chan_fmt = I2S_CHANNEL_FMT_RIGHT_LEFT;
+                cfg->chan_mask = I2S_TDM_ACTIVE_CH0 | I2S_TDM_ACTIVE_CH1;
+                cfg->total_chan = 2;
+            }
+        }
 #else
        /* Default */
        cfg->chan_fmt = ch == I2S_CHANNEL_MONO ? I2S_CHANNEL_FMT_ONLY_RIGHT : cfg->chan_fmt;
@@ -1601,9 +1619,6 @@ esp_err_t i2s_set_clk(i2s_port_t i2s_num, uint32_t rate, uint32_t bits_cfg, i2s_
    ESP_RETURN_ON_FALSE((data_bits % 8 == 0), ESP_ERR_INVALID_ARG, TAG, "Invalid bits per sample");
    ESP_RETURN_ON_FALSE((data_bits <= I2S_BITS_PER_SAMPLE_32BIT), ESP_ERR_INVALID_ARG, TAG, "Invalid bits per sample");

-    /* Stop I2S */
-    i2s_stop(i2s_num);
-
    i2s_hal_clock_cfg_t clk_cfg;
    /* To get sclk, mclk, mclk_div bclk and bclk_div */
    i2s_calculate_clock(i2s_num, &clk_cfg);
@@ -1779,8 +1794,8 @@ static esp_err_t i2s_driver_init(i2s_port_t i2s_num, const i2s_config_t *i2s_con
        p_i2s[i2s_num]->hal_cfg.total_chan = 2;
        break;
    case I2S_CHANNEL_FMT_MULTIPLE:
-        ESP_RETURN_ON_FALSE(i2s_config->chan_mask, ESP_ERR_INVALID_ARG, TAG, "i2s all channel are disabled");
-        p_i2s[i2s_num]->hal_cfg.chan_mask = i2s_config->chan_mask;
+        ESP_RETURN_ON_FALSE((i2s_config->chan_mask >> 16), ESP_ERR_INVALID_ARG, TAG, "i2s all channel are disabled");
+        p_i2s[i2s_num]->hal_cfg.chan_mask = i2s_config->chan_mask & 0xFFFF0000;
        /* Get the max actived channel number */
        uint32_t max_channel = i2s_get_max_channel_num(p_i2s[i2s_num]->hal_cfg.chan_mask);
        /* If total channel is smaller than max actived channel number then set it to the max active channel number */
@@ -1895,6 +1910,14 @@ esp_err_t i2s_driver_install(i2s_port_t i2s_num, const i2s_config_t *i2s_config,
 #endif
    /* Enable module clock */
    i2s_hal_enable_module_clock(&p_i2s[i2s_num]->hal);
+#if SOC_I2S_SUPPORTS_TDM
+    if (i2s_config->mode & I2S_MODE_TX) {
+        i2s_ll_tx_enable_clock(p_i2s[i2s_num]->hal.dev);
+    }
+    if (i2s_config->mode & I2S_MODE_RX) {
+        i2s_ll_rx_enable_clock(p_i2s[i2s_num]->hal.dev);
+    }
+#endif

    /* Step 5: Initialize I2S configuration and set the configurations to register */
    i2s_hal_config_param(&(pre_alloc_i2s_obj->hal), &pre_alloc_i2s_obj->hal_cfg);
@@ -1911,6 +1934,7 @@ esp_err_t i2s_driver_install(i2s_port_t i2s_num, const i2s_config_t *i2s_config,

    /* Step 7: Set I2S clocks and start. No need to give parameters since configurations has been set in 'i2s_driver_init' */
    ESP_GOTO_ON_ERROR(i2s_set_clk(i2s_num, 0, 0, 0), err, TAG, "I2S set clock failed");
+
    return ESP_OK;

 err:
@@ -1972,6 +1996,14 @@ esp_err_t i2s_driver_uninstall(i2s_port_t i2s_num)
        esp_pm_lock_delete(p_i2s[i2s_num]->pm_lock);
        p_i2s[i2s_num]->pm_lock = NULL;
    }
+#endif
+#if SOC_I2S_SUPPORTS_TDM
+    if (p_i2s[i2s_num]->hal_cfg.mode & I2S_MODE_TX) {
+        i2s_ll_tx_disable_clock(p_i2s[i2s_num]->hal.dev);
+    }
+    if (p_i2s[i2s_num]->hal_cfg.mode & I2S_MODE_RX) {
+        i2s_ll_rx_disable_clock(p_i2s[i2s_num]->hal.dev);
+    }
 #endif
    /* Disable module clock */
    i2s_hal_disable_module_clock(&p_i2s[i2s_num]->hal);
@@ -78,7 +78,7 @@ typedef struct  {
 *
 */
 typedef struct {
-    int mck_io_num;     /*!< MCK in out pin*/
+    int mck_io_num;     /*!< MCK in out pin. Note that ESP32 supports setting MCK on GPIO0/GPIO1/GPIO3 only*/
    int bck_io_num;     /*!< BCK in out pin*/
    int ws_io_num;      /*!< WS in out pin*/
    int data_out_num;   /*!< DATA out pin*/
@@ -97,8 +97,22 @@ typedef struct {
    i2s_channel_fmt_t       channel_format;             /*!< I2S channel format.*/
    i2s_comm_format_t       communication_format;       /*!< I2S communication format */
    int                     intr_alloc_flags;           /*!< Flags used to allocate the interrupt. One or multiple (ORred) ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info */
-    int                     dma_buf_count;              /*!< I2S DMA Buffer Count */
-    int                     dma_buf_len;                /*!< I2S DMA Buffer Length */
+    int                     dma_buf_count;              /**< The total number of DMA buffers to receive/transmit data.
+                                                          * A descriptor includes some information such as buffer address,
+                                                          * the address of the next descriptor, and the buffer length.
+                                                          * Since one descriptor points to one buffer, therefore, 'dma_desc_num' can be interpreted as the total number of DMA buffers used to store data from DMA interrupt.
+                                                          * Notice that these buffers are internal to'i2s_read' and descriptors are created automatically inside of the I2S driver.
+                                                          * Users only need to set the buffer number while the length is derived from the parameter described below.
+                                                          */
+    int                     dma_buf_len;                /**< Number of frames in a DMA buffer.
+                                                          *  A frame means the data of all channels in a WS cycle.
+                                                          *  The real_dma_buf_size = dma_buf_len * chan_num * bits_per_chan / 8.
+                                                          *  For example, if two channels in stereo mode (i.e., 'channel_format' is set to 'I2S_CHANNEL_FMT_RIGHT_LEFT') are active,
+                                                          *  and each channel transfers 32 bits (i.e., 'bits_per_sample' is set to 'I2S_BITS_PER_CHAN_32BIT'),
+                                                          *  then the total number of bytes of a frame is 'channel_format' * 'bits_per_sample' = 2 * 32 / 8 = 8 bytes.
+                                                          *  We assume that the current 'dma_buf_len' is 100, then the real length of the DMA buffer is 8 * 100 = 800 bytes.
+                                                          *  Note that the length of an internal real DMA buffer shouldn't be greater than 4092.
+                                                          */
    bool                    use_apll;                   /*!< I2S using APLL as main I2S clock, enable it to get accurate clock */
    bool                    tx_desc_auto_clear;         /*!< I2S auto clear tx descriptor if there is underflow condition (helps in avoiding noise in case of data unavailability) */
    int                     fixed_mclk;                 /*!< I2S using fixed MCLK output. If use_apll = true and fixed_mclk > 0, then the clock output for i2s is fixed and equal to the fixed_mclk value. If fixed_mclk set, mclk_multiple won't take effect */
@@ -85,6 +85,7 @@ esp_err_t ledc_timer_config(const ledc_timer_config_t* timer_conf);
 * @brief LEDC update channel parameters
 * @note  Call this function to activate the LEDC updated parameters.
 *        After ledc_set_duty, we need to call this function to update the settings.
+ *        And the new LEDC parameters don't take effect until the next PWM cycle.
 * @note  ledc_set_duty, ledc_set_duty_with_hpoint and ledc_update_duty are not thread-safe, do not call these functions to
 *        control one LEDC channel in different tasks at the same time.
 *        A thread-safe version of API is ledc_set_duty_and_update
@@ -203,6 +204,9 @@ esp_err_t ledc_set_duty(ledc_mode_t speed_mode, ledc_channel_t channel, uint32_t

 /**
 * @brief LEDC get duty
+ *        This function returns the duty at the present PWM cycle.
+ *        You shouldn't expect the function to return the new duty in the same cycle of calling ledc_update_duty,
+ *        because duty update doesn't take effect until the next cycle.
 *
 * @param speed_mode Select the LEDC channel group with specified speed mode. Note that not all targets support high speed mode.
 * @param channel LEDC channel (0 - LEDC_CHANNEL_MAX-1), select from ledc_channel_t
@@ -385,7 +389,8 @@ void ledc_fade_func_uninstall(void);
 *        Other duty operations will have to wait until the fade operation has finished.
 * @param speed_mode Select the LEDC channel group with specified speed mode. Note that not all targets support high speed mode.
 * @param channel LEDC channel number
- * @param fade_mode Whether to block until fading done.
+ * @param fade_mode Whether to block until fading done. See ledc_types.h ledc_fade_mode_t for more info.
+ *        Note that this function will not return until fading to the target duty if LEDC_FADE_WAIT_DONE mode is selected.
 *
 * @return
 *     - ESP_OK Success
@@ -443,9 +448,6 @@ esp_err_t ledc_set_fade_time_and_start(ledc_mode_t speed_mode, ledc_channel_t ch
 *     - ESP_FAIL Fade function init error
 */
 esp_err_t ledc_set_fade_step_and_start(ledc_mode_t speed_mode, ledc_channel_t channel, uint32_t target_duty, uint32_t scale, uint32_t cycle_num, ledc_fade_mode_t fade_mode);
-#ifdef __cplusplus
-}
-#endif

 /**
 * @brief LEDC callback registration function
@@ -461,3 +463,6 @@ esp_err_t ledc_set_fade_step_and_start(ledc_mode_t speed_mode, ledc_channel_t ch
 *     - ESP_FAIL Fade function init error
 */
 esp_err_t ledc_cb_register(ledc_mode_t speed_mode, ledc_channel_t channel, ledc_cbs_t *cbs, void *user_arg);
+#ifdef __cplusplus
+}
+#endif
@@ -63,9 +63,9 @@ static portMUX_TYPE ledc_spinlock = portMUX_INITIALIZER_UNLOCKED;
 #define LEDC_FADE_TOO_SLOW_STR    "LEDC FADE TOO SLOW"
 #define LEDC_FADE_TOO_FAST_STR    "LEDC FADE TOO FAST"

-static const char *LEDC_NOT_INIT = "LEDC is not initialized";
-static const char *LEDC_FADE_SERVICE_ERR_STR = "LEDC fade service not installed";
-static const char *LEDC_FADE_INIT_ERROR_STR = "LEDC fade channel init error, not enough memory or service not installed";
+static __attribute__((unused)) const char *LEDC_NOT_INIT = "LEDC is not initialized";
+static __attribute__((unused)) const char *LEDC_FADE_SERVICE_ERR_STR = "LEDC fade service not installed";
+static __attribute__((unused)) const char *LEDC_FADE_INIT_ERROR_STR = "LEDC fade channel init error, not enough memory or service not installed";

 //This value will be calibrated when in use.
 static uint32_t s_ledc_slow_clk_8M = 0;
@@ -184,7 +184,7 @@ esp_err_t ledc_timer_set(ledc_mode_t speed_mode, ledc_timer_t timer_sel, uint32_
 static IRAM_ATTR esp_err_t ledc_duty_config(ledc_mode_t speed_mode, ledc_channel_t channel, int hpoint_val, int duty_val,
    ledc_duty_direction_t duty_direction, uint32_t duty_num, uint32_t duty_cycle, uint32_t duty_scale)
 {
-    portENTER_CRITICAL(&ledc_spinlock);
+    portENTER_CRITICAL_SAFE(&ledc_spinlock);
    if (hpoint_val >= 0) {
        ledc_hal_set_hpoint(&(p_ledc_obj[speed_mode]->ledc_hal), channel, hpoint_val);
    }
@@ -196,7 +196,7 @@ static IRAM_ATTR esp_err_t ledc_duty_config(ledc_mode_t speed_mode, ledc_channel
    ledc_hal_set_duty_cycle(&(p_ledc_obj[speed_mode]->ledc_hal), channel, duty_cycle);
    ledc_hal_set_duty_scale(&(p_ledc_obj[speed_mode]->ledc_hal), channel, duty_scale);
    ledc_ls_channel_update(speed_mode, channel);
-    portEXIT_CRITICAL(&ledc_spinlock);
+    portEXIT_CRITICAL_SAFE(&ledc_spinlock);
    return ESP_OK;
 }

@@ -466,8 +466,8 @@ esp_err_t ledc_set_duty_with_hpoint(ledc_mode_t speed_mode, ledc_channel_t chann
                     hpoint,          //uint32_t hpoint_val,
                     duty,           //uint32_t duty_val,
                     1,               //uint32_t increase,
-                     1,               //uint32_t duty_num,
-                     1,               //uint32_t duty_cycle,
+                     0,               //uint32_t duty_num,
+                     0,               //uint32_t duty_cycle,
                     0                //uint32_t duty_scale
                     );
    _ledc_fade_hw_release(speed_mode, channel);
@@ -486,8 +486,8 @@ esp_err_t ledc_set_duty(ledc_mode_t speed_mode, ledc_channel_t channel, uint32_t
                     LEDC_VAL_NO_CHANGE,
                     duty,           //uint32_t duty_val,
                     1,               //uint32_t increase,
-                     1,               //uint32_t duty_num,
-                     1,               //uint32_t duty_cycle,
+                     0,               //uint32_t duty_num,
+                     0,               //uint32_t duty_cycle,
                     0                //uint32_t duty_scale
                     );
    _ledc_fade_hw_release(speed_mode, channel);
@@ -568,9 +568,9 @@ void IRAM_ATTR ledc_fade_isr(void* arg)
            ledc_calc_fade_end_channel(&intr_status, &channel);

            // clear interrupt
-            portENTER_CRITICAL(&ledc_spinlock);
+            portENTER_CRITICAL_ISR(&ledc_spinlock);
            ledc_hal_clear_fade_end_intr_status(&(p_ledc_obj[speed_mode]->ledc_hal), channel);
-            portEXIT_CRITICAL(&ledc_spinlock);
+            portEXIT_CRITICAL_ISR(&ledc_spinlock);

            if (s_ledc_fade_rec[speed_mode][channel] == NULL) {
                //fade object not initialized yet.
@@ -620,9 +620,9 @@ void IRAM_ATTR ledc_fade_isr(void* arg)
                    1,
                    0);
            }
-            portENTER_CRITICAL(&ledc_spinlock);
+            portENTER_CRITICAL_ISR(&ledc_spinlock);
            ledc_hal_set_duty_start(&(p_ledc_obj[speed_mode]->ledc_hal), channel, true);
-            portEXIT_CRITICAL(&ledc_spinlock);
+            portEXIT_CRITICAL_ISR(&ledc_spinlock);
        }
    }
    if (HPTaskAwoken == pdTRUE || cb_yield) {
@@ -765,7 +765,10 @@ static void _ledc_fade_start(ledc_mode_t speed_mode, ledc_channel_t channel, led
    ledc_enable_intr_type(speed_mode, channel, LEDC_INTR_FADE_END);
    ledc_update_duty(speed_mode, channel);
    if (fade_mode == LEDC_FADE_WAIT_DONE) {
-        xSemaphoreTake(s_ledc_fade_rec[speed_mode][channel]->ledc_fade_sem, portMAX_DELAY);
+        // Waiting for fade done
+        _ledc_fade_hw_acquire(speed_mode, channel);
+        // Release hardware to support next time fade configure
+        _ledc_fade_hw_release(speed_mode, channel);
    }
 }

@@ -807,7 +810,6 @@ esp_err_t ledc_fade_start(ledc_mode_t speed_mode, ledc_channel_t channel, ledc_f
    LEDC_CHECK(p_ledc_obj[speed_mode] != NULL, LEDC_NOT_INIT, ESP_ERR_INVALID_STATE);
    _ledc_fade_hw_acquire(speed_mode, channel);
    _ledc_fade_start(speed_mode, channel, fade_mode);
-    _ledc_fade_hw_release(speed_mode, channel);
    return ESP_OK;
 }

@@ -855,14 +857,13 @@ esp_err_t ledc_set_duty_and_update(ledc_mode_t speed_mode, ledc_channel_t channe
    LEDC_ARG_CHECK(speed_mode < LEDC_SPEED_MODE_MAX, "speed_mode");
    LEDC_ARG_CHECK(channel < LEDC_CHANNEL_MAX, "channel");
    LEDC_ARG_CHECK(duty <= ledc_get_max_duty(speed_mode, channel), "target_duty");
+    LEDC_ARG_CHECK(hpoint <= LEDC_HPOINT_VAL_MAX, "hpoint");
    LEDC_CHECK(p_ledc_obj[speed_mode] != NULL, LEDC_NOT_INIT, ESP_ERR_INVALID_STATE);
-    LEDC_CHECK(ledc_fade_channel_init_check(speed_mode, channel) == ESP_OK , LEDC_FADE_INIT_ERROR_STR, ESP_FAIL);
-    _ledc_op_lock_acquire(speed_mode, channel);
+    LEDC_CHECK(ledc_fade_channel_init_check(speed_mode, channel) == ESP_OK, LEDC_FADE_INIT_ERROR_STR, ESP_FAIL);
    _ledc_fade_hw_acquire(speed_mode, channel);
-    _ledc_set_fade_with_step(speed_mode, channel, duty, 0, 1);
-    _ledc_fade_start(speed_mode, channel, LEDC_FADE_WAIT_DONE);
+    ledc_duty_config(speed_mode, channel, hpoint, duty, 1, 0, 0, 0);
+    ledc_update_duty(speed_mode, channel);
    _ledc_fade_hw_release(speed_mode, channel);
-    _ledc_op_lock_release(speed_mode, channel);
    return ESP_OK;
 }

@@ -878,9 +879,6 @@ esp_err_t ledc_set_fade_time_and_start(ledc_mode_t speed_mode, ledc_channel_t ch
    _ledc_fade_hw_acquire(speed_mode, channel);
    _ledc_set_fade_with_time(speed_mode, channel, target_duty, max_fade_time_ms);
    _ledc_fade_start(speed_mode, channel, fade_mode);
-    if (fade_mode == LEDC_FADE_WAIT_DONE) {
-        _ledc_fade_hw_release(speed_mode, channel);
-    }
    _ledc_op_lock_release(speed_mode, channel);
    return ESP_OK;
 }
@@ -899,9 +897,6 @@ esp_err_t ledc_set_fade_step_and_start(ledc_mode_t speed_mode, ledc_channel_t ch
    _ledc_fade_hw_acquire(speed_mode, channel);
    _ledc_set_fade_with_step(speed_mode, channel, target_duty, scale, cycle_num);
    _ledc_fade_start(speed_mode, channel, fade_mode);
-    if (fade_mode == LEDC_FADE_WAIT_DONE) {
-        _ledc_fade_hw_release(speed_mode, channel);
-    }
    _ledc_op_lock_release(speed_mode, channel);
    return ESP_OK;
 }
@@ -65,11 +65,15 @@ IRAM_ATTR void wifi_bt_common_module_disable(void)

 void wifi_module_enable(void)
 {
+    portENTER_CRITICAL_SAFE(&periph_spinlock);
    periph_ll_wifi_module_enable_clk_clear_rst();
+    portEXIT_CRITICAL_SAFE(&periph_spinlock);
 }

 void wifi_module_disable(void)
 {
+    portENTER_CRITICAL_SAFE(&periph_spinlock);
    periph_ll_wifi_module_disable_clk_set_rst();
+    portEXIT_CRITICAL_SAFE(&periph_spinlock);
 }
 #endif // CONFIG_ESP32_WIFI_ENABLED
@@ -236,7 +236,7 @@ static esp_err_t init_context(const sdio_slave_config_t *config)
    sdio_ringbuf_t *buf = &(context.hal->send_desc_queue);
    //one item is not used.
    buf->size = SDIO_SLAVE_SEND_DESC_SIZE * (config->send_queue_size + 1);
-    buf->data = (uint8_t *)heap_caps_malloc(buf->size, MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT);
+    buf->data = (uint8_t *)heap_caps_malloc(buf->size, MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT | MALLOC_CAP_DMA);
    if (buf->data == NULL) {
        goto no_mem;
    }
@@ -738,7 +738,7 @@ sdio_slave_buf_handle_t sdio_slave_recv_register_buf(uint8_t *start)
 {
    SDIO_SLAVE_CHECK(esp_ptr_dma_capable(start) && (uint32_t)start % 4 == 0,
                     "buffer to register should be DMA capable and 32-bit aligned", NULL);
-    recv_desc_t *desc = (recv_desc_t *)heap_caps_malloc(sizeof(recv_desc_t), MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT);
+    recv_desc_t *desc = (recv_desc_t *)heap_caps_malloc(sizeof(recv_desc_t), MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT | MALLOC_CAP_DMA);
    if (desc == NULL) {
        SDIO_SLAVE_LOGE("cannot allocate lldesc for new buffer");
        return NULL;
@@ -164,7 +164,7 @@ typedef struct spi_bus_lock_t spi_bus_lock_t;
 #define REQUEST_BIT(mask)   ((mask) << REQ_SHIFT)
 #define PENDING_BIT(mask)   ((mask) << PENDING_SHIFT)
 #define DEV_MASK(id)        (LOCK_BIT(1<<id) | PENDING_BIT(1<<id) | REQUEST_BIT(1<<id))
-#define ID_DEV_MASK(mask)   (ffs(mask) - 1)
+#define ID_DEV_MASK(mask)   (__builtin_ffs(mask) - 1)

 #define REQ_MASK            BIT1_MASK(REQ_SHIFT+MAX_DEV_NUM, REQ_SHIFT)
 #define PEND_MASK           BIT1_MASK(PENDING_SHIFT+MAX_DEV_NUM, PENDING_SHIFT)
@@ -20,6 +20,7 @@
 #include "sdkconfig.h"
 #include "esp_rom_uart.h"
 #include "esp_rom_sys.h"
+#include "test_utils.h"


 #define WAKE_UP_IGNORE 1  // gpio_wakeup function development is not completed yet, set it deprecated.
@@ -57,7 +58,7 @@
 #define TEST_GPIO_EXT_OUT_IO            2  // default output GPIO
 #define TEST_GPIO_EXT_IN_IO             3  // default input GPIO
 #define TEST_GPIO_OUTPUT_PIN            1
-#define TEST_GPIO_OUTPUT_MAX            GPIO_NUM_21
+#define TEST_GPIO_OUTPUT_MAX            GPIO_NUM_MAX
 #define TEST_GPIO_USB_DM_IO             18  // USB D- GPIO
 #define TEST_GPIO_USB_DP_IO             19  // USB D+ GPIO
 #define TEST_GPIO_INPUT_LEVEL_HIGH_PIN  10
@@ -100,7 +101,7 @@ static gpio_config_t init_io(gpio_num_t num)
 __attribute__((unused)) static void gpio_isr_edge_handler(void *arg)
 {
    uint32_t gpio_num = (uint32_t) arg;
-    esp_rom_printf("GPIO[%d] intr, val: %d\n", gpio_num, gpio_get_level(gpio_num));
+    esp_rom_printf("GPIO[%d] intr on core %d, val: %d\n", gpio_num, cpu_hal_get_core_id(), gpio_get_level(gpio_num));
    edge_intr_times++;
 }

@@ -408,6 +409,42 @@ TEST_CASE("GPIO enable and disable interrupt test", "[gpio][test_env=UT_T1_GPIO]
 }
 #endif //DISABLED_FOR_TARGETS(ESP32S2, ESP32S3, ESP32C3)

+#if !CONFIG_FREERTOS_UNICORE
+static void install_isr_service_task(void *arg)
+{
+    uint32_t gpio_num = (uint32_t) arg;
+    //rising edge intr
+    TEST_ESP_OK(gpio_set_intr_type(gpio_num, GPIO_INTR_POSEDGE));
+    TEST_ESP_OK(gpio_install_isr_service(0));
+    gpio_isr_handler_add(gpio_num, gpio_isr_edge_handler, (void *) gpio_num);
+    vTaskSuspend(NULL);
+}
+
+TEST_CASE("GPIO interrupt on other CPUs test", "[gpio]")
+{
+    TaskHandle_t gpio_task_handle;
+    gpio_config_t input_output_io = init_io(TEST_GPIO_EXT_OUT_IO);
+    input_output_io.mode = GPIO_MODE_INPUT_OUTPUT;
+    input_output_io.pull_up_en = 1;
+    TEST_ESP_OK(gpio_config(&input_output_io));
+
+    for (int cpu_num = 1; cpu_num < portNUM_PROCESSORS; ++cpu_num) {
+        // We assume unit-test task is running on core 0, so we install gpio interrupt on other cores
+        edge_intr_times = 0;
+        TEST_ESP_OK(gpio_set_level(TEST_GPIO_EXT_OUT_IO, 0));
+        xTaskCreatePinnedToCore(install_isr_service_task, "install_isr_service_task", 2048, (void *) TEST_GPIO_EXT_OUT_IO, 1, &gpio_task_handle, cpu_num);
+
+        vTaskDelay(200 / portTICK_RATE_MS);
+        TEST_ESP_OK(gpio_set_level(TEST_GPIO_EXT_OUT_IO, 1));
+        vTaskDelay(100 / portTICK_RATE_MS);
+        TEST_ASSERT_EQUAL_INT(edge_intr_times, 1);
+        gpio_isr_handler_remove(TEST_GPIO_EXT_OUT_IO);
+        gpio_uninstall_isr_service();
+        test_utils_task_delete(gpio_task_handle);
+    }
+}
+#endif //!CONFIG_FREERTOS_UNICORE
+
 // ESP32 Connect GPIO18 with GPIO19, ESP32-S2 Connect GPIO17 with GPIO21,
 // ESP32-S3 Connect GPIO17 with GPIO21, ESP32C3 Connect GPIO2 with GPIO3
 // use multimeter to test the voltage, so it is ignored in CI
@@ -756,11 +793,11 @@ static void gpio_isr_handler(void *arg)
 */
 TEST_CASE("GPIO ISR service test", "[gpio][ignore]")
 {
-    static gpio_isr_param_t io9_param = {
+    gpio_isr_param_t io9_param = {
        .gpio_num =  TEST_IO_9,
        .isr_cnt = 0,
    };
-    static gpio_isr_param_t io10_param = {
+    gpio_isr_param_t io10_param = {
        .gpio_num =  TEST_IO_10,
        .isr_cnt = 0,
    };
@@ -34,6 +34,8 @@
 #define HIGHEST_LIMIT 10000
 #define LOWEST_LIMIT -10000

+#define TEST_PWM_FREQ 2000
+
 #if SOC_LEDC_SUPPORT_HS_MODE
 #define TEST_SPEED_MODE LEDC_HIGH_SPEED_MODE
 #define SPEED_MODE_LIST {LEDC_HIGH_SPEED_MODE, LEDC_LOW_SPEED_MODE}
@@ -63,17 +65,31 @@ static ledc_timer_config_t create_default_timer_config(void)
    ledc_time_config.speed_mode = TEST_SPEED_MODE;
    ledc_time_config.duty_resolution = LEDC_TIMER_13_BIT;
    ledc_time_config.timer_num = LEDC_TIMER_0;
-    ledc_time_config.freq_hz = 2000;
+    ledc_time_config.freq_hz = TEST_PWM_FREQ;
    ledc_time_config.clk_cfg = LEDC_USE_APB_CLK;
    return ledc_time_config;
 }

+static void fade_setup(void)
+{
+    ledc_channel_config_t ledc_ch_config = initialize_channel_config();
+    ledc_ch_config.duty = 0;
+    ledc_timer_config_t ledc_time_config = create_default_timer_config();
+
+    TEST_ESP_OK(ledc_channel_config(&ledc_ch_config));
+    TEST_ESP_OK(ledc_timer_config(&ledc_time_config));
+    vTaskDelay(5 / portTICK_PERIOD_MS);
+
+    //initialize fade service
+    TEST_ESP_OK(ledc_fade_func_install(0));
+}
+
 static void timer_duty_set_get(ledc_mode_t speed_mode, ledc_channel_t channel, uint32_t duty)
 {
    TEST_ESP_OK(ledc_set_duty(speed_mode, channel, duty));
    TEST_ESP_OK(ledc_update_duty(speed_mode, channel));
-    vTaskDelay(1000 / portTICK_RATE_MS);
-    TEST_ASSERT_EQUAL_INT32(ledc_get_duty(speed_mode, channel), duty);
+    vTaskDelay(100 / portTICK_RATE_MS);
+    TEST_ASSERT_EQUAL_INT32(duty, ledc_get_duty(speed_mode, channel));
 }

 // use logic analyzer to view
@@ -302,9 +318,9 @@ TEST_CASE("LEDC memory leak test", "[ledc]")
    TEST_ESP_OK(ledc_stop(ledc_time_config.speed_mode, LEDC_CHANNEL_0, 0));
 }

-// the duty need to be detected by waveform given by the logic analyzer
-// can't get it directly, so set it "ignore"
-TEST_CASE("LEDC set and get dut(with logic analyzer)", "[ledc][ignore]")
+// duty should be manually checked from the waveform using a logic analyzer
+// this test is enabled only for testting the settings
+TEST_CASE("LEDC set and get duty", "[ledc]")
 {
    ledc_timer_t timer_list[4] = {LEDC_TIMER_0, LEDC_TIMER_1, LEDC_TIMER_2, LEDC_TIMER_3};
    ledc_mode_t speed_mode_list[LEDC_SPEED_MODE_MAX] = SPEED_MODE_LIST;
@@ -315,61 +331,111 @@ TEST_CASE("LEDC set and get dut(with logic analyzer)", "[ledc][ignore]")
    }
 }

-TEST_CASE("LEDC fade with time(logic analyzer)", "[ledc][ignore]")
+TEST_CASE("LEDC fade with time", "[ledc]")
 {
    const ledc_mode_t test_speed_mode = TEST_SPEED_MODE;
-    ledc_channel_config_t ledc_ch_config = initialize_channel_config();
-    ledc_ch_config.duty = 0;
-    ledc_timer_config_t ledc_time_config = create_default_timer_config();
+    fade_setup();

-    TEST_ESP_OK(ledc_channel_config(&ledc_ch_config));
-    TEST_ESP_OK(ledc_timer_config(&ledc_time_config));
-
-    //initialize fade service
-    TEST_ESP_OK(ledc_fade_func_install(0));
-
-    TEST_ESP_OK(ledc_set_fade_with_time(test_speed_mode, LEDC_CHANNEL_0, 4000, 1000));
+    TEST_ESP_OK(ledc_set_fade_with_time(test_speed_mode, LEDC_CHANNEL_0, 4000, 200));
    TEST_ESP_OK(ledc_fade_start(test_speed_mode, LEDC_CHANNEL_0, LEDC_FADE_WAIT_DONE));
-    // TODO: allows for 5% deviation here due to driver code (IDF-2099)
-    vTaskDelay(1050 / portTICK_RATE_MS);
-    TEST_ASSERT_EQUAL_INT32(ledc_get_duty(test_speed_mode, LEDC_CHANNEL_0), 4000);
+    TEST_ASSERT_EQUAL_INT32(4000, ledc_get_duty(test_speed_mode, LEDC_CHANNEL_0));

-    TEST_ESP_OK(ledc_set_fade_with_time(test_speed_mode, LEDC_CHANNEL_0, 0, 1000));
+    TEST_ESP_OK(ledc_set_fade_with_time(test_speed_mode, LEDC_CHANNEL_0, 0, 200));
    TEST_ESP_OK(ledc_fade_start(test_speed_mode, LEDC_CHANNEL_0, LEDC_FADE_NO_WAIT));
-    vTaskDelay(1050 / portTICK_RATE_MS);
-    TEST_ASSERT_EQUAL_INT32(ledc_get_duty(test_speed_mode, LEDC_CHANNEL_0), 0);
+    // duty should not be too far from initial value
+    TEST_ASSERT_INT32_WITHIN(20, 4000, ledc_get_duty(test_speed_mode, LEDC_CHANNEL_0));
+    vTaskDelay(210 / portTICK_PERIOD_MS);
+    TEST_ASSERT_EQUAL_INT32(0, ledc_get_duty(test_speed_mode, LEDC_CHANNEL_0));

-    //deinitial fade service
+    //deinitialize fade service
    ledc_fade_func_uninstall();
 }

-TEST_CASE("LEDC fade with step(logic analyzer)", "[ledc][ignore]")
+TEST_CASE("LEDC fade with step", "[ledc]")
 {
    const ledc_mode_t test_speed_mode = TEST_SPEED_MODE;
-    ledc_channel_config_t ledc_ch_config = initialize_channel_config();
-    ledc_ch_config.duty = 0;
-    ledc_timer_config_t ledc_time_config = create_default_timer_config();
+    fade_setup();

-    TEST_ESP_OK(ledc_channel_config(&ledc_ch_config));
-    TEST_ESP_OK(ledc_timer_config(&ledc_time_config));
-
-    //initialize fade service.
-    TEST_ESP_OK(ledc_fade_func_install(0));
-
-    TEST_ESP_OK(ledc_set_fade_with_step(test_speed_mode, LEDC_CHANNEL_0, 4000, 2, 1));
+    TEST_ESP_OK(ledc_set_fade_with_step(test_speed_mode, LEDC_CHANNEL_0, 4000, 4, 1));
    TEST_ESP_OK(ledc_fade_start(test_speed_mode, LEDC_CHANNEL_0, LEDC_FADE_WAIT_DONE));
-    vTaskDelay(1050 / portTICK_RATE_MS);
-    TEST_ASSERT_EQUAL_INT32(ledc_get_duty(test_speed_mode, LEDC_CHANNEL_0), 4000);
+    TEST_ASSERT_EQUAL_INT32(4000, ledc_get_duty(test_speed_mode, LEDC_CHANNEL_0));

-    TEST_ESP_OK(ledc_set_fade_with_step(test_speed_mode, LEDC_CHANNEL_0, 0, 4, 2));
+    TEST_ESP_OK(ledc_set_fade_with_step(test_speed_mode, LEDC_CHANNEL_0, 0, 4, 1));
    TEST_ESP_OK(ledc_fade_start(test_speed_mode, LEDC_CHANNEL_0, LEDC_FADE_NO_WAIT));
-    vTaskDelay(1050 / portTICK_RATE_MS);
-    TEST_ASSERT_EQUAL_INT32(ledc_get_duty(test_speed_mode, LEDC_CHANNEL_0), 0);
+    // duty should not be too far from initial value
+    TEST_ASSERT_INT32_WITHIN(20, 4000, ledc_get_duty(test_speed_mode, LEDC_CHANNEL_0));
+    vTaskDelay(525 / portTICK_PERIOD_MS);
+    TEST_ASSERT_EQUAL_INT32(0, ledc_get_duty(test_speed_mode, LEDC_CHANNEL_0));

    //scaler=0 check
    TEST_ASSERT(ledc_set_fade_with_step(test_speed_mode, LEDC_CHANNEL_0, 4000, 0, 1) == ESP_ERR_INVALID_ARG);

-    //deinitial fade service
+    //deinitialize fade service
+    ledc_fade_func_uninstall();
+}
+
+TEST_CASE("LEDC fast switching duty with fade_wait_done", "[ledc]")
+{
+    const ledc_mode_t test_speed_mode = TEST_SPEED_MODE;
+    fade_setup();
+
+    // fade function will block until fading to the target duty
+    int64_t fade_start, fade_stop;
+    fade_start = esp_timer_get_time();
+    TEST_ESP_OK(ledc_set_fade_with_time(test_speed_mode, LEDC_CHANNEL_0, 4000, 200));
+    TEST_ESP_OK(ledc_fade_start(test_speed_mode, LEDC_CHANNEL_0, LEDC_FADE_WAIT_DONE));
+    TEST_ASSERT_EQUAL_INT32(4000, ledc_get_duty(test_speed_mode, LEDC_CHANNEL_0));
+    TEST_ESP_OK(ledc_set_fade_with_time(test_speed_mode, LEDC_CHANNEL_0, 1000, 150));
+    TEST_ESP_OK(ledc_fade_start(test_speed_mode, LEDC_CHANNEL_0, LEDC_FADE_WAIT_DONE));
+    TEST_ASSERT_EQUAL_INT32(1000, ledc_get_duty(test_speed_mode, LEDC_CHANNEL_0));
+    fade_stop = esp_timer_get_time();
+    int time_ms = (fade_stop - fade_start) / 1000;
+    TEST_ASSERT_TRUE(fabs(time_ms - 350) < 20);
+
+    // next duty update will not take place until last fade reaches its target duty
+    TEST_ESP_OK(ledc_set_fade_with_time(test_speed_mode, LEDC_CHANNEL_0, 4000, 200));
+    TEST_ESP_OK(ledc_fade_start(test_speed_mode, LEDC_CHANNEL_0, LEDC_FADE_WAIT_DONE));
+    TEST_ASSERT_EQUAL_INT32(4000, ledc_get_duty(test_speed_mode, LEDC_CHANNEL_0));
+    TEST_ESP_OK(ledc_set_duty(test_speed_mode, LEDC_CHANNEL_0, 500));
+    TEST_ESP_OK(ledc_update_duty(test_speed_mode, LEDC_CHANNEL_0));
+    vTaskDelay(5 / portTICK_PERIOD_MS);
+    TEST_ASSERT_EQUAL_INT32(500, ledc_get_duty(test_speed_mode, LEDC_CHANNEL_0));
+
+    //deinitialize fade service
+    ledc_fade_func_uninstall();
+}
+
+TEST_CASE("LEDC fast switching duty with fade_no_wait", "[ledc]")
+{
+    const ledc_mode_t test_speed_mode = TEST_SPEED_MODE;
+    fade_setup();
+
+    // fade function returns immediately, but next fade still needs to wait for last fade ends
+    int64_t fade_start, first_fade_complete;
+    fade_start = esp_timer_get_time();
+    TEST_ESP_OK(ledc_set_fade_with_time(test_speed_mode, LEDC_CHANNEL_0, 4000, 200));
+    TEST_ESP_OK(ledc_fade_start(test_speed_mode, LEDC_CHANNEL_0, LEDC_FADE_NO_WAIT));
+    TEST_ASSERT_LESS_THAN(4000, ledc_get_duty(test_speed_mode, LEDC_CHANNEL_0));
+    TEST_ESP_OK(ledc_set_fade_with_time(test_speed_mode, LEDC_CHANNEL_0, 1000, 150));
+    TEST_ESP_OK(ledc_fade_start(test_speed_mode, LEDC_CHANNEL_0, LEDC_FADE_NO_WAIT));
+    first_fade_complete = esp_timer_get_time();
+    // duty should not be too far from first fade target duty
+    TEST_ASSERT_INT32_WITHIN(20, 4000, ledc_get_duty(test_speed_mode, LEDC_CHANNEL_0));
+    int time_ms = (first_fade_complete - fade_start) / 1000;
+    TEST_ASSERT_TRUE(fabs(time_ms - 200) < 20);
+    vTaskDelay(158 / portTICK_PERIOD_MS);
+    TEST_ASSERT_EQUAL_INT32(1000, ledc_get_duty(test_speed_mode, LEDC_CHANNEL_0));
+
+    // next duty update will not take place until last fade reaches its target duty
+    TEST_ESP_OK(ledc_set_fade_with_time(test_speed_mode, LEDC_CHANNEL_0, 4000, 200));
+    TEST_ESP_OK(ledc_fade_start(test_speed_mode, LEDC_CHANNEL_0, LEDC_FADE_NO_WAIT));
+    TEST_ASSERT_LESS_THAN(4000, ledc_get_duty(test_speed_mode, LEDC_CHANNEL_0));
+    TEST_ESP_OK(ledc_set_duty(test_speed_mode, LEDC_CHANNEL_0, 500));
+    TEST_ESP_OK(ledc_update_duty(test_speed_mode, LEDC_CHANNEL_0));
+    vTaskDelay(5 / portTICK_PERIOD_MS);
+    TEST_ASSERT_EQUAL_INT32(500, ledc_get_duty(test_speed_mode, LEDC_CHANNEL_0));
+
+    //deinitialize fade service
    ledc_fade_func_uninstall();
 }

@@ -492,6 +558,30 @@ TEST_CASE("LEDC timer pause and resume", "[ledc][test_env=UT_T1_LEDC]")
    TEST_ASSERT_UINT32_WITHIN(5, count, 5000);
 }

+static void ledc_cpu_reset_test_first_stage(void)
+{
+    ledc_channel_config_t ledc_ch_config = initialize_channel_config();
+    TEST_ESP_OK(ledc_channel_config(&ledc_ch_config));
+
+    ledc_timer_config_t ledc_time_config = create_default_timer_config();
+    TEST_ESP_OK(ledc_timer_config(&ledc_time_config));
+    vTaskDelay(50 / portTICK_RATE_MS);
+    esp_restart();
+}
+
+static void ledc_cpu_reset_test_second_stage(void)
+{
+    TEST_ASSERT_EQUAL(ESP_RST_SW, esp_reset_reason());
+    int16_t count;
+    count = wave_count(1000);
+    TEST_ASSERT_UINT32_WITHIN(5, count, TEST_PWM_FREQ);
+}
+
+TEST_CASE_MULTIPLE_STAGES("LEDC software reset test",
+                          "[ledc][test_env=UT_T1_LEDC]",
+                          ledc_cpu_reset_test_first_stage,
+                          ledc_cpu_reset_test_second_stage);
+
 #endif  //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32S3)

 #endif // SOC_PCNT_SUPPORTED
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
 *
 * SPDX-License-Identifier: Apache-2.0
 */
@@ -22,7 +22,7 @@
 #define RMT_TX_CHANNEL_ENCODING_END   (SOC_RMT_TX_CANDIDATES_PER_GROUP-1)

 // CI ONLY: Don't connect any other signals to this GPIO
-#define RMT_DATA_IO (4) // bind signal RMT_SIG_OUT0_IDX and RMT_SIG_IN0_IDX on the same GPIO
+#define RMT_DATA_IO (0) // bind signal RMT_SIG_OUT0_IDX and RMT_SIG_IN0_IDX on the same GPIO

 #define RMT_TESTBENCH_FLAGS_ALWAYS_ON (1<<0)
 #define RMT_TESTBENCH_FLAGS_CARRIER_ON (1<<1)
@@ -408,6 +408,10 @@ static void uart_test_custom_isr_core0(void* param) {
    TEST_ESP_OK(uart_param_config(uart_echo, &uart_config));
    TEST_ESP_OK(uart_set_pin(uart_echo, uart_tx, uart_rx, UART_PIN_NO_CHANGE, UART_PIN_NO_CHANGE));

+    /* Prevent the custom ISR handler from being called if UART_INTR_BRK_DET interrupt occurs.
+     * It shall only be called for TX interrupts. */
+    uart_disable_intr_mask(uart_echo, UART_INTR_BRK_DET);
+
    /* Unregister the default ISR setup by the function call above */
    TEST_ESP_OK(uart_isr_free(uart_echo));
    TEST_ESP_OK(uart_isr_register(uart_echo, uart_custom_isr, NULL, intr_alloc_flags, &handle));
@@ -450,10 +454,83 @@ TEST_CASE("uart can register and free custom ISRs", "[uart]")
                                             5,
                                             &task_handle,
                                             0);
-    TEST_ASSERT(ret)
+    TEST_ASSERT(ret);
    TEST_ASSERT(xTaskNotifyWait(0, 0, NULL, 1000 / portTICK_PERIOD_MS));
    (void) task_handle;
 #else
    uart_test_custom_isr_core0(NULL);
 #endif //!CONFIG_FREERTOS_UNICORE
 }
+
+TEST_CASE("uart int state restored after flush", "[uart]")
+{
+    /**
+     * The first goal of this test is to make sure that when our RX FIFO is full,
+     * we can continue receiving back data after flushing
+     * For more details, check IDF-4374
+     */
+    uart_config_t uart_config = {
+        .baud_rate = 115200,
+        .data_bits = UART_DATA_8_BITS,
+        .parity    = UART_PARITY_DISABLE,
+        .stop_bits = UART_STOP_BITS_1,
+        .flow_ctrl = UART_HW_FLOWCTRL_DISABLE,
+        .source_clk = UART_SCLK_APB,
+    };
+
+    const uart_port_t uart_echo = UART_NUM_1;
+    const int uart_tx_signal = U1TXD_OUT_IDX;
+    const int uart_tx = 4;
+    const int uart_rx = 5;
+    const int buf_size = 256;
+    const int intr_alloc_flags = 0;
+
+    TEST_ESP_OK(uart_driver_install(uart_echo, buf_size * 2, 0, 0, NULL, intr_alloc_flags));
+    TEST_ESP_OK(uart_param_config(uart_echo, &uart_config));
+    TEST_ESP_OK(uart_set_pin(uart_echo, uart_tx, uart_rx, UART_PIN_NO_CHANGE, UART_PIN_NO_CHANGE));
+
+    /* Make sure UART2's RX signal is connected to TX pin
+     * This creates a loop that lets us receive anything we send on the UART */
+    esp_rom_gpio_connect_out_signal(uart_rx, uart_tx_signal, false, false);
+
+    uint8_t *data = (uint8_t *) malloc(buf_size);
+    TEST_ASSERT_NOT_NULL(data);
+    uart_write_bytes(uart_echo, (const char *) data, buf_size);
+
+    /* As we set up a loopback, we can read them back on RX */
+    int len = uart_read_bytes(uart_echo, data, buf_size, 1000 / portTICK_RATE_MS);
+    TEST_ASSERT_EQUAL(len, buf_size);
+
+    /* Fill the RX buffer, this should disable the RX interrupts */
+    int written = uart_write_bytes(uart_echo, (const char *) data, buf_size);
+    TEST_ASSERT_NOT_EQUAL(-1, written);
+    written = uart_write_bytes(uart_echo, (const char *) data, buf_size);
+    TEST_ASSERT_NOT_EQUAL(-1, written);
+    written = uart_write_bytes(uart_echo, (const char *) data, buf_size);
+    TEST_ASSERT_NOT_EQUAL(-1, written);
+
+    /* Flush the input buffer, RX interrupts should be re-enabled */
+    uart_flush_input(uart_echo);
+    written = uart_write_bytes(uart_echo, (const char *) data, buf_size);
+    TEST_ASSERT_NOT_EQUAL(-1, written);
+    len = uart_read_bytes(uart_echo, data, buf_size, 1000 / portTICK_RATE_MS);
+    /* len equals buf_size bytes if interrupts were indeed re-enabled */
+    TEST_ASSERT_EQUAL(len, buf_size);
+
+    /**
+     * Second test, make sure that if we explicitly disable the RX interrupts,
+     * they are NOT re-enabled after flushing
+     * To do so, start by cleaning the RX FIFO, disable the RX interrupts,
+     * flush again, send data to the UART and check that we haven't received
+     * any of the bytes */
+    uart_flush_input(uart_echo);
+    uart_disable_rx_intr(uart_echo);
+    uart_flush_input(uart_echo);
+    written = uart_write_bytes(uart_echo, (const char *) data, buf_size);
+    TEST_ASSERT_NOT_EQUAL(-1, written);
+    len = uart_read_bytes(uart_echo, data, buf_size, 250 / portTICK_RATE_MS);
+    TEST_ASSERT_EQUAL(len, 0);
+
+    TEST_ESP_OK(uart_driver_delete(uart_echo));
+    free(data);
+}
@@ -1977,6 +1977,10 @@ static void test_deep_sleep_init(void)

 TEST_CASE("Touch Sensor sleep pad wakeup deep sleep test", "[touch][ignore]")
 {
+//TODO: IDF-4813
+#if TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32S3)
+    abort();
+#endif //TEMPORARY_DISABLED_FOR_TARGETS(..)
    test_deep_sleep_init();

    /* Change the work duty of touch sensor to reduce current. */
@@ -114,6 +114,7 @@ typedef struct {
    uint8_t *rx_head_ptr;               /*!< pointer to the head of RX item*/
    uint8_t rx_data_buf[SOC_UART_FIFO_LEN]; /*!< Data buffer to stash FIFO data*/
    uint8_t rx_stash_len;               /*!< stashed data length.(When using flow control, after reading out FIFO data, if we fail to push to buffer, we can just stash them.) */
+    uint32_t rx_int_usr_mask;           /*!< RX interrupt status. Valid at any time, regardless of RX buffer status. */
    uart_pat_rb_t rx_pattern_pos;
    int tx_buf_size;                    /*!< TX ring buffer size */
    bool tx_waiting_fifo;               /*!< this flag indicates that some task is waiting for FIFO empty interrupt, used to send all data without any data buffer*/
@@ -357,16 +358,45 @@ esp_err_t uart_enable_intr_mask(uart_port_t uart_num, uint32_t enable_mask)
 {
    ESP_RETURN_ON_FALSE((uart_num < UART_NUM_MAX), ESP_FAIL, UART_TAG, "uart_num error");
    UART_ENTER_CRITICAL(&(uart_context[uart_num].spinlock));
+    /* Keep track of the interrupt toggling. In fact, without such variable,
+     * once the RX buffer is full and the RX interrupts disabled, it is
+     * impossible what was the previous state (enabled/disabled) of these
+     * interrupt masks. Thus, this will be very particularly handy when
+     * emptying a filled RX buffer. */
+    p_uart_obj[uart_num]->rx_int_usr_mask |= enable_mask;
    uart_hal_clr_intsts_mask(&(uart_context[uart_num].hal), enable_mask);
    uart_hal_ena_intr_mask(&(uart_context[uart_num].hal), enable_mask);
    UART_EXIT_CRITICAL(&(uart_context[uart_num].spinlock));
    return ESP_OK;
 }

+/**
+ * @brief Function re-enabling the given interrupts (mask) if and only if
+ *        they have not been disabled by the user.
+ *
+ * @param uart_num      UART number to perform the operation on
+ * @param enable_mask   Interrupts (flags) to be re-enabled
+ *
+ * @return ESP_OK in success, ESP_FAIL if uart_num is incorrect
+ */
+static esp_err_t uart_reenable_intr_mask(uart_port_t uart_num, uint32_t enable_mask)
+{
+    ESP_RETURN_ON_FALSE((uart_num < UART_NUM_MAX), ESP_FAIL, UART_TAG, "uart_num error");
+    UART_ENTER_CRITICAL(&(uart_context[uart_num].spinlock));
+    /* Mask will only contain the interrupt flags that needs to be re-enabled
+     * AND which have NOT been explicitly disabled by the user. */
+    uint32_t mask = p_uart_obj[uart_num]->rx_int_usr_mask & enable_mask;
+    uart_hal_clr_intsts_mask(&(uart_context[uart_num].hal), mask);
+    uart_hal_ena_intr_mask(&(uart_context[uart_num].hal), mask);
+    UART_EXIT_CRITICAL(&(uart_context[uart_num].spinlock));
+    return ESP_OK;
+}
+
 esp_err_t uart_disable_intr_mask(uart_port_t uart_num, uint32_t disable_mask)
 {
    ESP_RETURN_ON_FALSE((uart_num < UART_NUM_MAX), ESP_FAIL, UART_TAG, "uart_num error");
    UART_ENTER_CRITICAL(&(uart_context[uart_num].spinlock));
+    p_uart_obj[uart_num]->rx_int_usr_mask &= ~disable_mask;
    uart_hal_disable_intr_mask(&(uart_context[uart_num].hal), disable_mask);
    UART_EXIT_CRITICAL(&(uart_context[uart_num].spinlock));
    return ESP_OK;
@@ -1235,7 +1265,9 @@ static bool uart_check_buf_full(uart_port_t uart_num)
            p_uart_obj[uart_num]->rx_buffered_len += p_uart_obj[uart_num]->rx_stash_len;
            p_uart_obj[uart_num]->rx_buffer_full_flg = false;
            UART_EXIT_CRITICAL(&(uart_context[uart_num].spinlock));
-            uart_enable_rx_intr(p_uart_obj[uart_num]->uart_num);
+            /* Only re-activate UART_INTR_RXFIFO_TOUT or UART_INTR_RXFIFO_FULL
+             * interrupts if they were NOT explicitly disabled by the user. */
+            uart_reenable_intr_mask(p_uart_obj[uart_num]->uart_num, UART_INTR_RXFIFO_TOUT | UART_INTR_RXFIFO_FULL);
            return true;
        }
    }
@@ -1313,16 +1345,6 @@ esp_err_t uart_get_buffered_data_len(uart_port_t uart_num, size_t *size)

 esp_err_t uart_flush(uart_port_t uart_num) __attribute__((alias("uart_flush_input")));

-static esp_err_t uart_disable_intr_mask_and_return_prev(uart_port_t uart_num, uint32_t disable_mask, uint32_t *prev_mask)
-{
-    ESP_RETURN_ON_FALSE((uart_num < UART_NUM_MAX), ESP_FAIL, UART_TAG, "uart_num error");
-    UART_ENTER_CRITICAL(&(uart_context[uart_num].spinlock));
-    *prev_mask = uart_hal_get_intr_ena_status(&uart_context[uart_num].hal) & disable_mask;
-    uart_hal_disable_intr_mask(&(uart_context[uart_num].hal), disable_mask);
-    UART_EXIT_CRITICAL(&(uart_context[uart_num].spinlock));
-    return ESP_OK;
-}
-
 esp_err_t uart_flush_input(uart_port_t uart_num)
 {
    ESP_RETURN_ON_FALSE((uart_num < UART_NUM_MAX), ESP_FAIL, UART_TAG, "uart_num error");
@@ -1330,11 +1352,12 @@ esp_err_t uart_flush_input(uart_port_t uart_num)
    uart_obj_t *p_uart = p_uart_obj[uart_num];
    uint8_t *data;
    size_t size;
-    uint32_t prev_mask;

    //rx sem protect the ring buffer read related functions
    xSemaphoreTake(p_uart->rx_mux, (portTickType)portMAX_DELAY);
-    uart_disable_intr_mask_and_return_prev(uart_num, UART_INTR_RXFIFO_FULL | UART_INTR_RXFIFO_TOUT, &prev_mask);
+    UART_ENTER_CRITICAL(&(uart_context[uart_num].spinlock));
+    uart_hal_disable_intr_mask(&(uart_context[uart_num].hal), UART_INTR_RXFIFO_FULL | UART_INTR_RXFIFO_TOUT);
+    UART_EXIT_CRITICAL(&(uart_context[uart_num].spinlock));
    while (true) {
        if (p_uart->rx_head_ptr) {
            vRingbufferReturnItem(p_uart->rx_ring_buf, p_uart->rx_head_ptr);
@@ -1382,7 +1405,9 @@ esp_err_t uart_flush_input(uart_port_t uart_num)
    p_uart->rx_cur_remain = 0;
    p_uart->rx_head_ptr = NULL;
    uart_hal_rxfifo_rst(&(uart_context[uart_num].hal));
-    uart_enable_intr_mask(uart_num, prev_mask);
+    /* Only re-enable UART_INTR_RXFIFO_TOUT or UART_INTR_RXFIFO_FULL if they
+     * were explicitly enabled by the user. */
+    uart_reenable_intr_mask(uart_num, UART_INTR_RXFIFO_TOUT | UART_INTR_RXFIFO_FULL);
    xSemaphoreGive(p_uart->rx_mux);
    return ESP_OK;
 }
@@ -1561,6 +1586,7 @@ esp_err_t uart_driver_install(uart_port_t uart_num, int rx_buffer_size, int tx_b
        p_uart_obj[uart_num]->tx_waiting_fifo = false;
        p_uart_obj[uart_num]->rx_ptr = NULL;
        p_uart_obj[uart_num]->rx_cur_remain = 0;
+        p_uart_obj[uart_num]->rx_int_usr_mask = UART_INTR_RXFIFO_FULL | UART_INTR_RXFIFO_TOUT;
        p_uart_obj[uart_num]->rx_head_ptr = NULL;
        p_uart_obj[uart_num]->tx_buf_size = tx_buffer_size;
        p_uart_obj[uart_num]->uart_select_notif_callback = NULL;
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2017-2022 Espressif Systems (Shanghai) CO LTD
 *
 * SPDX-License-Identifier: Apache-2.0
 */
@@ -9,7 +9,7 @@
 #include <assert.h>
 #include "esp_efuse_table.h"

-// md5_digest_table ef33779021404fbaddc878eefebaddc1
+// md5_digest_table 720eb12a076091cb1a236c15d9fa3308
 // This file was generated from the file esp_efuse_table.csv. DO NOT CHANGE THIS FILE MANUALLY.
 // If you want to change some fields, you need to change esp_efuse_table.csv file
 // then run `efuse_common_table` or `efuse_custom_table` command it will generate this file.
@@ -175,10 +175,6 @@ static const esp_efuse_desc_t DIS_FORCE_DOWNLOAD[] = {
    {EFUSE_BLK0, 44, 1}, 	 // Disable force chip go to download mode function,
 };

-static const esp_efuse_desc_t DIS_USB[] = {
-    {EFUSE_BLK0, 45, 1}, 	 // Disable USB function,
-};
-
 static const esp_efuse_desc_t DIS_CAN[] = {
    {EFUSE_BLK0, 46, 1}, 	 // Disable CAN function,
 };
@@ -295,10 +291,6 @@ static const esp_efuse_desc_t UART_PRINT_CHANNEL[] = {
    {EFUSE_BLK0, 130, 1}, 	 // 0: UART0. 1: UART1,
 };

-static const esp_efuse_desc_t FLASH_ECC_MODE[] = {
-    {EFUSE_BLK0, 131, 1}, 	 // Set this bit to set flsah ecc mode. 0:flash ecc 16to18 byte mode. 1:flash ecc 16to17 byte mode,
-};
-
 static const esp_efuse_desc_t DIS_USB_DOWNLOAD_MODE[] = {
    {EFUSE_BLK0, 132, 1}, 	 // Disable download through USB,
 };
@@ -311,22 +303,6 @@ static const esp_efuse_desc_t UART_PRINT_CONTROL[] = {
    {EFUSE_BLK0, 134, 2}, 	 // b00:force print. b01:control by GPIO8 - low level print. b10:control by GPIO8 - high level print. b11:force disable print.,
 };

-static const esp_efuse_desc_t PIN_POWER_SELECTION[] = {
-    {EFUSE_BLK0, 136, 1}, 	 // GPIO33-GPIO37 power supply selection in ROM code. 0:VDD3P3_CPU. 1:VDD_SPI.,
-};
-
-static const esp_efuse_desc_t FLASH_TYPE[] = {
-    {EFUSE_BLK0, 137, 1}, 	 // Connected Flash interface type. 0: 4 data line. 1: 8 data line,
-};
-
-static const esp_efuse_desc_t FLASH_PAGE_SIZE[] = {
-    {EFUSE_BLK0, 138, 2}, 	 // Flash page size,
-};
-
-static const esp_efuse_desc_t FLASH_ECC_EN[] = {
-    {EFUSE_BLK0, 140, 1}, 	 // Enable ECC for flash boot,
-};
-
 static const esp_efuse_desc_t FORCE_SEND_RESUME[] = {
    {EFUSE_BLK0, 141, 1}, 	 // Force ROM code to send a resume command during SPI boot,
 };
@@ -712,11 +688,6 @@ const esp_efuse_desc_t* ESP_EFUSE_DIS_FORCE_DOWNLOAD[] = {
    NULL
 };

-const esp_efuse_desc_t* ESP_EFUSE_DIS_USB[] = {
-    &DIS_USB[0],    		// Disable USB function
-    NULL
-};
-
 const esp_efuse_desc_t* ESP_EFUSE_DIS_CAN[] = {
    &DIS_CAN[0],    		// Disable CAN function
    NULL
@@ -862,11 +833,6 @@ const esp_efuse_desc_t* ESP_EFUSE_UART_PRINT_CHANNEL[] = {
    NULL
 };

-const esp_efuse_desc_t* ESP_EFUSE_FLASH_ECC_MODE[] = {
-    &FLASH_ECC_MODE[0],    		// Set this bit to set flsah ecc mode. 0:flash ecc 16to18 byte mode. 1:flash ecc 16to17 byte mode
-    NULL
-};
-
 const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_DOWNLOAD_MODE[] = {
    &DIS_USB_DOWNLOAD_MODE[0],    		// Disable download through USB
    NULL
@@ -882,26 +848,6 @@ const esp_efuse_desc_t* ESP_EFUSE_UART_PRINT_CONTROL[] = {
    NULL
 };

-const esp_efuse_desc_t* ESP_EFUSE_PIN_POWER_SELECTION[] = {
-    &PIN_POWER_SELECTION[0],    		// GPIO33-GPIO37 power supply selection in ROM code. 0:VDD3P3_CPU. 1:VDD_SPI.
-    NULL
-};
-
-const esp_efuse_desc_t* ESP_EFUSE_FLASH_TYPE[] = {
-    &FLASH_TYPE[0],    		// Connected Flash interface type. 0: 4 data line. 1: 8 data line
-    NULL
-};
-
-const esp_efuse_desc_t* ESP_EFUSE_FLASH_PAGE_SIZE[] = {
-    &FLASH_PAGE_SIZE[0],    		// Flash page size
-    NULL
-};
-
-const esp_efuse_desc_t* ESP_EFUSE_FLASH_ECC_EN[] = {
-    &FLASH_ECC_EN[0],    		// Enable ECC for flash boot
-    NULL
-};
-
 const esp_efuse_desc_t* ESP_EFUSE_FORCE_SEND_RESUME[] = {
    &FORCE_SEND_RESUME[0],    		// Force ROM code to send a resume command during SPI boot
    NULL
@@ -55,7 +55,6 @@
        DIS_DOWNLOAD_ICACHE,              EFUSE_BLK0,   42,    1,     Disable Icache in download mode
        DIS_USB_DEVICE,                   EFUSE_BLK0,   43,    1,     Disable USB_DEVICE
        DIS_FORCE_DOWNLOAD,               EFUSE_BLK0,   44,    1,     Disable force chip go to download mode function
-        DIS_USB,                          EFUSE_BLK0,   45,    1,     Disable USB function
        DIS_CAN,                          EFUSE_BLK0,   46,    1,     Disable CAN function
        JTAG_SEL_ENABLE,                  EFUSE_BLK0,   47,    1,     Set this bit to enable selection between usb_to_jtag and pad_to_jtag through strapping gpio10 when both reg_dis_usb_jtag and reg_dis_pad_jtag are equal to 0.
        SOFT_DIS_JTAG,                    EFUSE_BLK0,   48,    3,     Set these bits to disable JTAG in the soft way (odd number 1 means disable). JTAG can be enabled in HMAC module.
@@ -91,14 +90,9 @@
        DIS_DOWNLOAD_MODE,                EFUSE_BLK0,  128,    1,     Disble download mode include boot_mode[3:0] is 0 1 2 3 6 7
        DIS_LEGACY_SPI_BOOT,              EFUSE_BLK0,  129,    1,     Disable_Legcy_SPI_boot mode include boot_mode[3:0] is 4
        UART_PRINT_CHANNEL,               EFUSE_BLK0,  130,    1,     0: UART0. 1: UART1
-        FLASH_ECC_MODE,                   EFUSE_BLK0,  131,    1,     Set this bit to set flsah ecc mode. 0:flash ecc 16to18 byte mode. 1:flash ecc 16to17 byte mode
        DIS_USB_DOWNLOAD_MODE,            EFUSE_BLK0,  132,    1,     Disable download through USB
        ENABLE_SECURITY_DOWNLOAD,         EFUSE_BLK0,  133,    1,     Enable security download mode
        UART_PRINT_CONTROL,               EFUSE_BLK0,  134,    2,     b00:force print. b01:control by GPIO8 - low level print. b10:control by GPIO8 - high level print. b11:force disable print.
-        PIN_POWER_SELECTION,              EFUSE_BLK0,  136,    1,     GPIO33-GPIO37 power supply selection in ROM code. 0:VDD3P3_CPU. 1:VDD_SPI.
-        FLASH_TYPE,                       EFUSE_BLK0,  137,    1,     Connected Flash interface type. 0: 4 data line. 1: 8 data line
-        FLASH_PAGE_SIZE,                  EFUSE_BLK0,  138,    2,     Flash page size
-        FLASH_ECC_EN,                     EFUSE_BLK0,  140,    1,     Enable ECC for flash boot
        FORCE_SEND_RESUME,                EFUSE_BLK0,  141,    1,     Force ROM code to send a resume command during SPI boot
        SECURE_VERSION,                   EFUSE_BLK0,  142,   16,     Secure version for anti-rollback

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2017-2022 Espressif Systems (Shanghai) CO LTD
 *
 * SPDX-License-Identifier: Apache-2.0
 */
@@ -51,26 +51,44 @@ const esp_efuse_range_addr_t range_write_addr_blocks[] = {
    {(uint32_t) &write_mass_blocks[EFUSE_BLK10][0], (uint32_t) &write_mass_blocks[EFUSE_BLK10][7]},
 };

-#ifndef CONFIG_EFUSE_VIRTUAL
 // Update Efuse timing configuration
 static esp_err_t esp_efuse_set_timing(void)
 {
-    // efuse clock is fixed in ESP32-C3, so the ets_efuse_set_timing() function
-    // takes an argument for compatibility with older ROM functions but it's ignored.
-    int res = ets_efuse_set_timing(0);
-    assert(res == 0);
-    (void)res;
-
-    REG_SET_FIELD(EFUSE_WR_TIM_CONF2_REG, EFUSE_PWR_OFF_NUM, 0x60);
-
+    REG_SET_FIELD(EFUSE_WR_TIM_CONF2_REG, EFUSE_PWR_OFF_NUM, 0x190);
    return ESP_OK;
 }
+
+static void efuse_read(void)
+{
+    esp_efuse_set_timing();
+    REG_WRITE(EFUSE_CONF_REG, EFUSE_READ_OP_CODE);
+    REG_WRITE(EFUSE_CMD_REG, EFUSE_READ_CMD);
+
+    while (REG_GET_BIT(EFUSE_CMD_REG, EFUSE_READ_CMD) != 0) { }
+    /*Due to a hardware error, we have to read READ_CMD again to make sure the efuse clock is normal*/
+    while (REG_GET_BIT(EFUSE_CMD_REG, EFUSE_READ_CMD) != 0) { }
+}
+
+#ifndef CONFIG_EFUSE_VIRTUAL
+static void efuse_program(esp_efuse_block_t block)
+{
+    esp_efuse_set_timing();
+
+    REG_WRITE(EFUSE_CONF_REG, EFUSE_WRITE_OP_CODE);
+
+    REG_WRITE(EFUSE_CMD_REG, ((block << EFUSE_BLK_NUM_S) & EFUSE_BLK_NUM_M) | EFUSE_PGM_CMD);
+
+    while (REG_GET_BIT(EFUSE_CMD_REG, EFUSE_PGM_CMD) != 0) { };
+
+    ets_efuse_clear_program_registers();
+    efuse_read();
+}
 #endif // ifndef CONFIG_EFUSE_VIRTUAL

 // Efuse read operation: copies data from physical efuses to efuse read registers.
 void esp_efuse_utility_clear_program_registers(void)
 {
-    ets_efuse_read();
+    efuse_read();
    ets_efuse_clear_program_registers();
 }

@@ -104,7 +122,7 @@ void esp_efuse_utility_burn_chip(void)
                    }
                    int data_len = (range_write_addr_blocks[num_block].end - range_write_addr_blocks[num_block].start) + sizeof(uint32_t);
                    memcpy((void *)EFUSE_PGM_DATA0_REG, (void *)range_write_addr_blocks[num_block].start, data_len);
-                    ets_efuse_program(num_block);
+                    efuse_program(num_block);
                    break;
                }
            }
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2017-2022 Espressif Systems (Shanghai) CO LTD
 *
 * SPDX-License-Identifier: Apache-2.0
 */
@@ -9,7 +9,7 @@ extern "C" {
 #endif


-// md5_digest_table ef33779021404fbaddc878eefebaddc1
+// md5_digest_table 720eb12a076091cb1a236c15d9fa3308
 // This file was generated from the file esp_efuse_table.csv. DO NOT CHANGE THIS FILE MANUALLY.
 // If you want to change some fields, you need to change esp_efuse_table.csv file
 // then run `efuse_common_table` or `efuse_custom_table` command it will generate this file.
@@ -56,7 +56,6 @@ extern const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_JTAG[];
 extern const esp_efuse_desc_t* ESP_EFUSE_DIS_DOWNLOAD_ICACHE[];
 extern const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_DEVICE[];
 extern const esp_efuse_desc_t* ESP_EFUSE_DIS_FORCE_DOWNLOAD[];
-extern const esp_efuse_desc_t* ESP_EFUSE_DIS_USB[];
 extern const esp_efuse_desc_t* ESP_EFUSE_DIS_CAN[];
 extern const esp_efuse_desc_t* ESP_EFUSE_JTAG_SEL_ENABLE[];
 extern const esp_efuse_desc_t* ESP_EFUSE_SOFT_DIS_JTAG[];
@@ -86,14 +85,9 @@ extern const esp_efuse_desc_t* ESP_EFUSE_FLASH_TPUW[];
 extern const esp_efuse_desc_t* ESP_EFUSE_DIS_DOWNLOAD_MODE[];
 extern const esp_efuse_desc_t* ESP_EFUSE_DIS_LEGACY_SPI_BOOT[];
 extern const esp_efuse_desc_t* ESP_EFUSE_UART_PRINT_CHANNEL[];
-extern const esp_efuse_desc_t* ESP_EFUSE_FLASH_ECC_MODE[];
 extern const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_DOWNLOAD_MODE[];
 extern const esp_efuse_desc_t* ESP_EFUSE_ENABLE_SECURITY_DOWNLOAD[];
 extern const esp_efuse_desc_t* ESP_EFUSE_UART_PRINT_CONTROL[];
-extern const esp_efuse_desc_t* ESP_EFUSE_PIN_POWER_SELECTION[];
-extern const esp_efuse_desc_t* ESP_EFUSE_FLASH_TYPE[];
-extern const esp_efuse_desc_t* ESP_EFUSE_FLASH_PAGE_SIZE[];
-extern const esp_efuse_desc_t* ESP_EFUSE_FLASH_ECC_EN[];
 extern const esp_efuse_desc_t* ESP_EFUSE_FORCE_SEND_RESUME[];
 extern const esp_efuse_desc_t* ESP_EFUSE_SECURE_VERSION[];
 extern const esp_efuse_desc_t* ESP_EFUSE_MAC_FACTORY[];
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2017-2022 Espressif Systems (Shanghai) CO LTD
 *
 * SPDX-License-Identifier: Apache-2.0
 */
@@ -9,7 +9,7 @@
 #include <assert.h>
 #include "esp_efuse_table.h"

-// md5_digest_table 6aaac59bd3f6d31bea4aef43b1f0d78a
+// md5_digest_table d3317916050c9ac3f0b2056ee72173af
 // This file was generated from the file esp_efuse_table.csv. DO NOT CHANGE THIS FILE MANUALLY.
 // If you want to change some fields, you need to change esp_efuse_table.csv file
 // then run `efuse_common_table` or `efuse_custom_table` command it will generate this file.
@@ -175,10 +175,6 @@ static const esp_efuse_desc_t DIS_FORCE_DOWNLOAD[] = {
    {EFUSE_BLK0, 44, 1}, 	 // Disable force chip go to download mode function,
 };

-static const esp_efuse_desc_t DIS_USB[] = {
-    {EFUSE_BLK0, 45, 1}, 	 // Disable USB function,
-};
-
 static const esp_efuse_desc_t DIS_CAN[] = {
    {EFUSE_BLK0, 46, 1}, 	 // Disable CAN function,
 };
@@ -295,10 +291,6 @@ static const esp_efuse_desc_t UART_PRINT_CHANNEL[] = {
    {EFUSE_BLK0, 130, 1}, 	 // 0: UART0. 1: UART1,
 };

-static const esp_efuse_desc_t FLASH_ECC_MODE[] = {
-    {EFUSE_BLK0, 131, 1}, 	 // Set this bit to set flsah ecc mode. 0:flash ecc 16to18 byte mode. 1:flash ecc 16to17 byte mode,
-};
-
 static const esp_efuse_desc_t DIS_USB_DOWNLOAD_MODE[] = {
    {EFUSE_BLK0, 132, 1}, 	 // Disable download through USB,
 };
@@ -311,22 +303,6 @@ static const esp_efuse_desc_t UART_PRINT_CONTROL[] = {
    {EFUSE_BLK0, 134, 2}, 	 // b00:force print. b01:control by GPIO8 - low level print. b10:control by GPIO8 - high level print. b11:force disable print.,
 };

-static const esp_efuse_desc_t PIN_POWER_SELECTION[] = {
-    {EFUSE_BLK0, 136, 1}, 	 // GPIO33-GPIO37 power supply selection in ROM code. 0:VDD3P3_CPU. 1:VDD_SPI.,
-};
-
-static const esp_efuse_desc_t FLASH_TYPE[] = {
-    {EFUSE_BLK0, 137, 1}, 	 // Connected Flash interface type. 0: 4 data line. 1: 8 data line,
-};
-
-static const esp_efuse_desc_t FLASH_PAGE_SIZE[] = {
-    {EFUSE_BLK0, 138, 2}, 	 // Flash page size,
-};
-
-static const esp_efuse_desc_t FLASH_ECC_EN[] = {
-    {EFUSE_BLK0, 140, 1}, 	 // Enable ECC for flash boot,
-};
-
 static const esp_efuse_desc_t FORCE_SEND_RESUME[] = {
    {EFUSE_BLK0, 141, 1}, 	 // Force ROM code to send a resume command during SPI boot,
 };
@@ -697,11 +673,6 @@ const esp_efuse_desc_t* ESP_EFUSE_DIS_FORCE_DOWNLOAD[] = {
    NULL
 };

-const esp_efuse_desc_t* ESP_EFUSE_DIS_USB[] = {
-    &DIS_USB[0],    		// Disable USB function
-    NULL
-};
-
 const esp_efuse_desc_t* ESP_EFUSE_DIS_CAN[] = {
    &DIS_CAN[0],    		// Disable CAN function
    NULL
@@ -847,11 +818,6 @@ const esp_efuse_desc_t* ESP_EFUSE_UART_PRINT_CHANNEL[] = {
    NULL
 };

-const esp_efuse_desc_t* ESP_EFUSE_FLASH_ECC_MODE[] = {
-    &FLASH_ECC_MODE[0],    		// Set this bit to set flsah ecc mode. 0:flash ecc 16to18 byte mode. 1:flash ecc 16to17 byte mode
-    NULL
-};
-
 const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_DOWNLOAD_MODE[] = {
    &DIS_USB_DOWNLOAD_MODE[0],    		// Disable download through USB
    NULL
@@ -867,26 +833,6 @@ const esp_efuse_desc_t* ESP_EFUSE_UART_PRINT_CONTROL[] = {
    NULL
 };

-const esp_efuse_desc_t* ESP_EFUSE_PIN_POWER_SELECTION[] = {
-    &PIN_POWER_SELECTION[0],    		// GPIO33-GPIO37 power supply selection in ROM code. 0:VDD3P3_CPU. 1:VDD_SPI.
-    NULL
-};
-
-const esp_efuse_desc_t* ESP_EFUSE_FLASH_TYPE[] = {
-    &FLASH_TYPE[0],    		// Connected Flash interface type. 0: 4 data line. 1: 8 data line
-    NULL
-};
-
-const esp_efuse_desc_t* ESP_EFUSE_FLASH_PAGE_SIZE[] = {
-    &FLASH_PAGE_SIZE[0],    		// Flash page size
-    NULL
-};
-
-const esp_efuse_desc_t* ESP_EFUSE_FLASH_ECC_EN[] = {
-    &FLASH_ECC_EN[0],    		// Enable ECC for flash boot
-    NULL
-};
-
 const esp_efuse_desc_t* ESP_EFUSE_FORCE_SEND_RESUME[] = {
    &FORCE_SEND_RESUME[0],    		// Force ROM code to send a resume command during SPI boot
    NULL
@@ -56,7 +56,6 @@
        DIS_DOWNLOAD_ICACHE,              EFUSE_BLK0,   42,    1,     Disable Icache in download mode
        DIS_USB_DEVICE,                   EFUSE_BLK0,   43,    1,     Disable USB_DEVICE
        DIS_FORCE_DOWNLOAD,               EFUSE_BLK0,   44,    1,     Disable force chip go to download mode function
-        DIS_USB,                          EFUSE_BLK0,   45,    1,     Disable USB function
        DIS_CAN,                          EFUSE_BLK0,   46,    1,     Disable CAN function
        JTAG_SEL_ENABLE,                  EFUSE_BLK0,   47,    1,     Set this bit to enable selection between usb_to_jtag and pad_to_jtag through strapping gpio10 when both reg_dis_usb_jtag and reg_dis_pad_jtag are equal to 0.
        SOFT_DIS_JTAG,                    EFUSE_BLK0,   48,    3,     Set these bits to disable JTAG in the soft way (odd number 1 means disable). JTAG can be enabled in HMAC module.
@@ -92,14 +91,9 @@
        DIS_DOWNLOAD_MODE,                EFUSE_BLK0,  128,    1,     Disble download mode include boot_mode[3:0] is 0 1 2 3 6 7
        DIS_LEGACY_SPI_BOOT,              EFUSE_BLK0,  129,    1,     Disable_Legcy_SPI_boot mode include boot_mode[3:0] is 4
        UART_PRINT_CHANNEL,               EFUSE_BLK0,  130,    1,     0: UART0. 1: UART1
-        FLASH_ECC_MODE,                   EFUSE_BLK0,  131,    1,     Set this bit to set flsah ecc mode. 0:flash ecc 16to18 byte mode. 1:flash ecc 16to17 byte mode
        DIS_USB_DOWNLOAD_MODE,            EFUSE_BLK0,  132,    1,     Disable download through USB
        ENABLE_SECURITY_DOWNLOAD,         EFUSE_BLK0,  133,    1,     Enable security download mode
        UART_PRINT_CONTROL,               EFUSE_BLK0,  134,    2,     b00:force print. b01:control by GPIO8 - low level print. b10:control by GPIO8 - high level print. b11:force disable print.
-        PIN_POWER_SELECTION,              EFUSE_BLK0,  136,    1,     GPIO33-GPIO37 power supply selection in ROM code. 0:VDD3P3_CPU. 1:VDD_SPI.
-        FLASH_TYPE,                       EFUSE_BLK0,  137,    1,     Connected Flash interface type. 0: 4 data line. 1: 8 data line
-        FLASH_PAGE_SIZE,                  EFUSE_BLK0,  138,    2,     Flash page size
-        FLASH_ECC_EN,                     EFUSE_BLK0,  140,    1,     Enable ECC for flash boot
        FORCE_SEND_RESUME,                EFUSE_BLK0,  141,    1,     Force ROM code to send a resume command during SPI boot
        SECURE_VERSION,                   EFUSE_BLK0,  142,   16,     Secure version for anti-rollback
        BOOT_DISABLE_FAST_WAKE,           EFUSE_BLK0,  158,    1,     Fast verify on wake option in ROM for Secure Boot
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2017-2022 Espressif Systems (Shanghai) CO LTD
 *
 * SPDX-License-Identifier: Apache-2.0
 */
@@ -9,7 +9,7 @@ extern "C" {
 #endif


-// md5_digest_table 6aaac59bd3f6d31bea4aef43b1f0d78a
+// md5_digest_table d3317916050c9ac3f0b2056ee72173af
 // This file was generated from the file esp_efuse_table.csv. DO NOT CHANGE THIS FILE MANUALLY.
 // If you want to change some fields, you need to change esp_efuse_table.csv file
 // then run `efuse_common_table` or `efuse_custom_table` command it will generate this file.
@@ -56,7 +56,6 @@ extern const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_JTAG[];
 extern const esp_efuse_desc_t* ESP_EFUSE_DIS_DOWNLOAD_ICACHE[];
 extern const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_DEVICE[];
 extern const esp_efuse_desc_t* ESP_EFUSE_DIS_FORCE_DOWNLOAD[];
-extern const esp_efuse_desc_t* ESP_EFUSE_DIS_USB[];
 extern const esp_efuse_desc_t* ESP_EFUSE_DIS_CAN[];
 extern const esp_efuse_desc_t* ESP_EFUSE_JTAG_SEL_ENABLE[];
 extern const esp_efuse_desc_t* ESP_EFUSE_SOFT_DIS_JTAG[];
@@ -86,14 +85,9 @@ extern const esp_efuse_desc_t* ESP_EFUSE_FLASH_TPUW[];
 extern const esp_efuse_desc_t* ESP_EFUSE_DIS_DOWNLOAD_MODE[];
 extern const esp_efuse_desc_t* ESP_EFUSE_DIS_LEGACY_SPI_BOOT[];
 extern const esp_efuse_desc_t* ESP_EFUSE_UART_PRINT_CHANNEL[];
-extern const esp_efuse_desc_t* ESP_EFUSE_FLASH_ECC_MODE[];
 extern const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_DOWNLOAD_MODE[];
 extern const esp_efuse_desc_t* ESP_EFUSE_ENABLE_SECURITY_DOWNLOAD[];
 extern const esp_efuse_desc_t* ESP_EFUSE_UART_PRINT_CONTROL[];
-extern const esp_efuse_desc_t* ESP_EFUSE_PIN_POWER_SELECTION[];
-extern const esp_efuse_desc_t* ESP_EFUSE_FLASH_TYPE[];
-extern const esp_efuse_desc_t* ESP_EFUSE_FLASH_PAGE_SIZE[];
-extern const esp_efuse_desc_t* ESP_EFUSE_FLASH_ECC_EN[];
 extern const esp_efuse_desc_t* ESP_EFUSE_FORCE_SEND_RESUME[];
 extern const esp_efuse_desc_t* ESP_EFUSE_SECURE_VERSION[];
 extern const esp_efuse_desc_t* ESP_EFUSE_BOOT_DISABLE_FAST_WAKE[];
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2017-2022 Espressif Systems (Shanghai) CO LTD
 *
 * SPDX-License-Identifier: Apache-2.0
 */
@@ -25,7 +25,7 @@ uint8_t esp_efuse_get_chip_ver(void)
 {
    // should return the same value as bootloader_common_get_chip_revision()
    uint32_t chip_ver = 0;
-    // TODO: ESP32S2 does not have this field
+    esp_efuse_read_field_blob(ESP_EFUSE_WAFER_VERSION, &chip_ver, ESP_EFUSE_WAFER_VERSION[0]->bit_count);
    return chip_ver;
 }

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2017-2022 Espressif Systems (Shanghai) CO LTD
 *
 * SPDX-License-Identifier: Apache-2.0
 */
@@ -51,19 +51,44 @@ const esp_efuse_range_addr_t range_write_addr_blocks[] = {
    {(uint32_t) &write_mass_blocks[EFUSE_BLK10][0], (uint32_t) &write_mass_blocks[EFUSE_BLK10][7]},
 };

-#ifndef CONFIG_EFUSE_VIRTUAL
 // Update Efuse timing configuration
 static esp_err_t esp_efuse_set_timing(void)
 {
-    uint32_t clock_hz = esp_clk_apb_freq();
-    return ets_efuse_set_timing(clock_hz) ? ESP_FAIL : ESP_OK;
+    REG_SET_FIELD(EFUSE_WR_TIM_CONF2_REG, EFUSE_PWR_OFF_NUM, 0x190);
+    return ESP_OK;
+}
+
+static void efuse_read(void)
+{
+    esp_efuse_set_timing();
+    REG_WRITE(EFUSE_CONF_REG, EFUSE_READ_OP_CODE);
+    REG_WRITE(EFUSE_CMD_REG, EFUSE_READ_CMD);
+
+    while (REG_GET_BIT(EFUSE_CMD_REG, EFUSE_READ_CMD) != 0) { }
+    /*Due to a hardware error, we have to read READ_CMD again to make sure the efuse clock is normal*/
+    while (REG_GET_BIT(EFUSE_CMD_REG, EFUSE_READ_CMD) != 0) { }
+}
+
+#ifndef CONFIG_EFUSE_VIRTUAL
+static void efuse_program(esp_efuse_block_t block)
+{
+    esp_efuse_set_timing();
+
+    REG_WRITE(EFUSE_CONF_REG, EFUSE_WRITE_OP_CODE);
+
+    REG_WRITE(EFUSE_CMD_REG, ((block << EFUSE_BLK_NUM_S) & EFUSE_BLK_NUM_M) | EFUSE_PGM_CMD);
+
+    while (REG_GET_BIT(EFUSE_CMD_REG, EFUSE_PGM_CMD) != 0) { };
+
+    ets_efuse_clear_program_registers();
+    efuse_read();
 }
 #endif // ifndef CONFIG_EFUSE_VIRTUAL

 // Efuse read operation: copies data from physical efuses to efuse read registers.
 void esp_efuse_utility_clear_program_registers(void)
 {
-    ets_efuse_read();
+    efuse_read();
    ets_efuse_clear_program_registers();
 }

@@ -97,7 +122,7 @@ void esp_efuse_utility_burn_chip(void)
                    }
                    int data_len = (range_write_addr_blocks[num_block].end - range_write_addr_blocks[num_block].start) + sizeof(uint32_t);
                    memcpy((void *)EFUSE_PGM_DATA0_REG, (void *)range_write_addr_blocks[num_block].start, data_len);
-                    ets_efuse_program(num_block);
+                    efuse_program(num_block);
                    break;
                }
            }
@@ -56,14 +56,6 @@ menu "ESP32C3-Specific"
            The FreeRTOS panic and unhandled exception handers can detect a JTAG OCD debugger and
            instead of panicking, have the debugger stop on the offending instruction.

-    config ESP32C3_DEBUG_STUBS_ENABLE
-        bool "OpenOCD debug stubs"
-        default COMPILER_OPTIMIZATION_LEVEL_DEBUG
-        depends on !ESP32C3_TRAX
-        help
-            Debug stubs are used by OpenOCD to execute pre-compiled onboard code which does some useful debugging,
-            e.g. GCOV data dump.
-
    config ESP32C3_BROWNOUT_DET
        bool "Hardware brownout detect & reset"
        depends on !IDF_ENV_FPGA
@@ -53,14 +53,6 @@ menu "ESP32H2-Specific"
            The FreeRTOS panic and unhandled exception handers can detect a JTAG OCD debugger and
            instead of panicking, have the debugger stop on the offending instruction.

-    config ESP32H2_DEBUG_STUBS_ENABLE
-        bool "OpenOCD debug stubs"
-        default COMPILER_OPTIMIZATION_LEVEL_DEBUG
-        depends on !ESP32H2_TRAX
-        help
-            Debug stubs are used by OpenOCD to execute pre-compiled onboard code which does some useful debugging,
-            e.g. GCOV data dump.
-
    config ESP32H2_BROWNOUT_DET
        bool "Hardware brownout detect & reset"
        default y
@@ -256,14 +256,6 @@ menu "ESP32S2-specific"
            The FreeRTOS panic and unhandled exception handers can detect a JTAG OCD debugger and
            instead of panicking, have the debugger stop on the offending instruction.

-    config ESP32S2_DEBUG_STUBS_ENABLE
-        bool "OpenOCD debug stubs"
-        default COMPILER_OPTIMIZATION_LEVEL_DEBUG
-        depends on !ESP32S2_TRAX
-        help
-            Debug stubs are used by OpenOCD to execute pre-compiled onboard code which does some useful debugging,
-            e.g. GCOV data dump.
-
    config ESP32S2_BROWNOUT_DET
        bool "Hardware brownout detect & reset"
        depends on !IDF_ENV_FPGA
@@ -328,14 +328,6 @@ menu "ESP32S3-Specific"
            The FreeRTOS panic and unhandled exception handers can detect a JTAG OCD debugger and
            instead of panicking, have the debugger stop on the offending instruction.

-    config ESP32S3_DEBUG_STUBS_ENABLE
-        bool "OpenOCD debug stubs"
-        default COMPILER_OPTIMIZATION_LEVEL_DEBUG
-        depends on !ESP32S3_TRAX
-        help
-            Debug stubs are used by OpenOCD to execute pre-compiled onboard code which does some useful debugging,
-            e.g. GCOV data dump.
-
    config ESP32S3_BROWNOUT_DET
        bool "Hardware brownout detect & reset"
        depends on !IDF_ENV_FPGA
@@ -1,22 +1,12 @@
 idf_build_get_property(target IDF_TARGET)

-if(${target} STREQUAL "esp32")
-    idf_component_register(SRCS "esp_adc_cal_esp32.c"
-                    INCLUDE_DIRS "include"
-                    REQUIRES driver efuse)
-
-elseif(${target} STREQUAL "esp32s2")
-    idf_component_register(SRCS "esp_adc_cal_esp32s2.c"
-                    INCLUDE_DIRS "include"
-                    REQUIRES driver efuse)
-
-elseif(${target} STREQUAL "esp32c3")
-    idf_component_register(SRCS "esp_adc_cal_esp32c3.c"
-                    INCLUDE_DIRS "include"
-                    REQUIRES driver efuse)
-
-elseif(${target} STREQUAL "esp32s3")
-idf_component_register(SRCS "esp_adc_cal_esp32s3.c"
-                INCLUDE_DIRS "include"
-                REQUIRES driver efuse)
+set(srcs "esp_adc_cal_common.c")
+set(src_target "${target}/esp_adc_cal.c")
+if(EXISTS "${CMAKE_CURRENT_LIST_DIR}/${src_target}")
+    list(APPEND srcs ${src_target})
 endif()
+
+idf_component_register(SRCS ${srcs}
+                       INCLUDE_DIRS include
+                       REQUIRES driver
+                       PRIV_REQUIRES efuse)
@@ -2,5 +2,5 @@
 # Component Makefile
 #

+COMPONENT_SRCDIRS := . $(IDF_TARGET)
 COMPONENT_ADD_INCLUDEDIRS := include
-COMPONENT_OBJEXCLUDE += esp_adc_cal_esp32s2.o esp_adc_cal_esp32c3.o esp_adc_cal_esp32h2.o esp_adc_cal_esp32s3.o
@@ -1,16 +1,8 @@
-// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */

 #include <stdint.h>
 #include "esp_types.h"
@@ -83,8 +75,6 @@
 #define LUT_HIGH_THRESH                 (LUT_LOW_THRESH + LUT_ADC_STEP_SIZE)
 #define ADC_12_BIT_RES                  4096

-const static char LOG_TAG[] = "ADC_CALI";
-
 /* ------------------------ Characterization Constants ---------------------- */
 static const uint32_t adc1_tp_atten_scale[4] = {65504, 86975, 120389, 224310};
 static const uint32_t adc2_tp_atten_scale[4] = {65467, 86861, 120416, 224708};
@@ -363,26 +353,3 @@ uint32_t esp_adc_cal_raw_to_voltage(uint32_t adc_reading, const esp_adc_cal_char
        return calculate_voltage_linear(adc_reading, chars->coeff_a, chars->coeff_b);
    }
 }
-
-esp_err_t esp_adc_cal_get_voltage(adc_channel_t channel,
-                                  const esp_adc_cal_characteristics_t *chars,
-                                  uint32_t *voltage)
-{
-    //Check parameters
-    ESP_RETURN_ON_FALSE(chars != NULL, ESP_ERR_INVALID_ARG, LOG_TAG, "No characteristic input");
-    ESP_RETURN_ON_FALSE(voltage != NULL, ESP_ERR_INVALID_ARG, LOG_TAG, "No output buffer");
-
-    esp_err_t ret = ESP_OK;
-    int adc_reading;
-    if (chars->adc_num == ADC_UNIT_1) {
-        //Check channel is valid on ADC1
-        ESP_RETURN_ON_FALSE(channel < SOC_ADC_CHANNEL_NUM(0), ESP_ERR_INVALID_ARG, LOG_TAG, "Invalid channel");
-        adc_reading = adc1_get_raw(channel);
-    } else {
-        //Check channel is valid on ADC2
-        ESP_RETURN_ON_FALSE(channel < SOC_ADC_CHANNEL_NUM(1), ESP_ERR_INVALID_ARG, LOG_TAG, "Invalid channel");
-        ret = adc2_get_raw(channel, chars->bit_width, &adc_reading);
-    }
-    *voltage = esp_adc_cal_raw_to_voltage((uint32_t)adc_reading, chars);
-    return ret;
-}
@@ -1,16 +1,8 @@
-// Copyright 2019-2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2019-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */

 #include <stdint.h>
 #include <stdbool.h>
@@ -23,16 +15,47 @@
 #include "hal/adc_ll.h"
 #include "esp_efuse_rtc_calib.h"
 #include "esp_adc_cal.h"
+#include "../esp_adc_cal_internal.h"

-const static char LOG_TAG[] = "adc_calib";
+const static char LOG_TAG[] = "ADC_CALI";


 /* ------------------------ Characterization Constants ---------------------- */

-// coeff_a and coeff_b are actually floats
-// they are scaled to put them into uint32_t so that the headers do not have to be changed
+// coeff_a is actually a float number
+// it is scaled to put them into uint32_t so that the headers do not have to be changed
 static const int coeff_a_scaling = 65536;
-static const int coeff_b_scaling = 1024;
+
+/**
+ * @note Error Calculation
+ * Coefficients for calculating the reading voltage error.
+ * Four sets of coefficients for atten0 ~ atten3 respectively.
+ *
+ * For each item, first element is the Coefficient, second element is the Multiple. (Coefficient / Multiple) is the real coefficient.
+ *
+ * @note {0,0} stands for unused item
+ * @note In case of the overflow, these coeffcients are recorded as Absolute Value
+ * @note For atten0 ~ 2, error = (K0 * X^0) + (K1 * X^1) + (K2 * X^2); For atten3, error = (K0 * X^0) + (K1 * X^1)  + (K2 * X^2) + (K3 * X^3) + (K4 * X^4);
+ * @note Above formula is rewritten from the original documentation, please note that the coefficients are re-ordered.
+ * @note ADC1 and ADC2 use same coeffients
+ */
+const static uint64_t adc_error_coef_atten[4][5][2] = {
+                                                        {{225966470500043, 1e15}, {7265418501948, 1e16}, {109410402681, 1e16}, {0, 0}, {0, 0}},                         //atten0
+                                                        {{4229623392600516, 1e16}, {731527490903, 1e16}, {88166562521, 1e16}, {0, 0}, {0, 0}},                          //atten1
+                                                        {{1017859239236435, 1e15}, {97159265299153, 1e16}, {149794028038, 1e16}, {0, 0}, {0, 0}},                       //atten2
+                                                        {{14912262772850453, 1e16}, {228549975564099, 1e16}, {356391935717, 1e16}, {179964582, 1e16}, {42046, 1e16}}    //atten3
+                                                       };
+/**
+ * Term sign
+ * @note ADC1 and ADC2 use same coeffients
+ */
+const static int32_t adc_error_sign[4][5] = {
+                                                {-1, -1, 1,  0,  0}, //atten0
+                                                { 1, -1, 1,  0,  0}, //atten1
+                                                {-1, -1, 1,  0,  0}, //atten2
+                                                {-1, -1, 1, -1,  1}  //atten3
+                                             };
+
 /* -------------------- Characterization Helper Data Types ------------------ */
 typedef struct {
    uint32_t voltage;
@@ -46,9 +69,9 @@ typedef struct {
    union {
        adc_calib_data_ver1 ver1;
    } efuse_data;
-} adc_calib_parsed_info;
+} adc_calib_parsed_info_t;

-static esp_err_t prepare_calib_data_for(int version_num, adc_unit_t adc_num, adc_atten_t atten, adc_calib_parsed_info *parsed_data_storage)
+static esp_err_t prepare_calib_data_for(int version_num, adc_unit_t adc_num, adc_atten_t atten, adc_calib_parsed_info_t *parsed_data_storage)
 {
    assert(version_num == 1);
    esp_err_t ret;
@@ -72,7 +95,7 @@ static esp_err_t prepare_calib_data_for(int version_num, adc_unit_t adc_num, adc
 * Estimate the (assumed) linear relationship btwn the measured raw value and the voltage
 * with the previously done measurement when the chip was manufactured.
 */
-static void calculate_characterization_coefficients(const adc_calib_parsed_info *parsed_data, esp_adc_cal_characteristics_t *chars)
+static void calculate_characterization_coefficients(const adc_calib_parsed_info_t *parsed_data, esp_adc_cal_characteristics_t *chars)
 {
    ESP_LOGD(LOG_TAG, "Calib V1, Cal Voltage = %d, Digi out = %d\n", parsed_data->efuse_data.ver1.voltage, parsed_data->efuse_data.ver1.digi);

@@ -101,7 +124,7 @@ esp_adc_cal_value_t esp_adc_cal_characterize(adc_unit_t adc_num,
        esp_adc_cal_characteristics_t *chars)
 {
    esp_err_t ret;
-    adc_calib_parsed_info efuse_parsed_data = {0};
+    adc_calib_parsed_info_t efuse_parsed_data = {0};
    // Check parameters
    ESP_RETURN_ON_FALSE(adc_num == ADC_UNIT_1 || adc_num == ADC_UNIT_2, ESP_ADC_CAL_VAL_NOT_SUPPORTED, LOG_TAG, "Invalid unit num");
    ESP_RETURN_ON_FALSE(chars != NULL, ESP_ADC_CAL_VAL_NOT_SUPPORTED, LOG_TAG, "Ivalid characteristic");
@@ -134,28 +157,16 @@ esp_adc_cal_value_t esp_adc_cal_characterize(adc_unit_t adc_num,
 uint32_t esp_adc_cal_raw_to_voltage(uint32_t adc_reading, const esp_adc_cal_characteristics_t *chars)
 {
    assert(chars != NULL);
-    return adc_reading * chars->coeff_a / coeff_a_scaling + chars->coeff_b / coeff_b_scaling;
-}

-esp_err_t esp_adc_cal_get_voltage(adc_channel_t channel,
-                                  const esp_adc_cal_characteristics_t *chars,
-                                  uint32_t *voltage)
-{
-    // Check parameters
-    ESP_RETURN_ON_FALSE(chars != NULL, ESP_ERR_INVALID_ARG, LOG_TAG, "No characteristic input");
-    ESP_RETURN_ON_FALSE(voltage != NULL, ESP_ERR_INVALID_ARG, LOG_TAG, "No output buffer");
+    int32_t error = 0;
+    uint64_t v_cali_1 = adc_reading * chars->coeff_a / coeff_a_scaling;
+    esp_adc_error_calc_param_t param = {
+        .v_cali_input = v_cali_1,
+        .term_num = (chars->atten == 3) ? 5 : 3,
+        .coeff = &adc_error_coef_atten,
+        .sign = &adc_error_sign,
+    };
+    error = esp_adc_cal_get_reading_error(&param, chars->atten);

-    esp_err_t ret = ESP_OK;
-    int adc_reading;
-    if (chars->adc_num == ADC_UNIT_1) {
-        //Check if channel is valid on ADC1
-        ESP_RETURN_ON_FALSE(channel < SOC_ADC_CHANNEL_NUM(0), ESP_ERR_INVALID_ARG, LOG_TAG, "Invalid channel");
-        adc_reading = adc1_get_raw(channel);
-    } else {
-        //Check if channel is valid on ADC2
-        ESP_RETURN_ON_FALSE(channel < SOC_ADC_CHANNEL_NUM(1), ESP_ERR_INVALID_ARG, LOG_TAG, "Invalid channel");
-        ret = adc2_get_raw(channel, chars->bit_width, &adc_reading);
-    }
-    *voltage = esp_adc_cal_raw_to_voltage((uint32_t)adc_reading, chars);
-    return ret;
+    return (int32_t)v_cali_1 - error;
 }
@@ -1,16 +1,8 @@
-// Copyright 2019-2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2019-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */

 #include <stdint.h>
 #include "esp_types.h"
@@ -206,26 +198,3 @@ uint32_t esp_adc_cal_raw_to_voltage(uint32_t adc_reading, const esp_adc_cal_char
    assert(chars != NULL);
    return adc_reading * chars->coeff_a / coeff_a_scaling + chars->coeff_b / coeff_b_scaling;
 }
-
-esp_err_t esp_adc_cal_get_voltage(adc_channel_t channel,
-                                  const esp_adc_cal_characteristics_t *chars,
-                                  uint32_t *voltage)
-{
-    // Check parameters
-    ESP_RETURN_ON_FALSE(chars != NULL, ESP_ERR_INVALID_ARG, LOG_TAG, "No characteristic input");
-    ESP_RETURN_ON_FALSE(voltage != NULL, ESP_ERR_INVALID_ARG, LOG_TAG, "No output buffer");
-
-    esp_err_t ret = ESP_OK;
-    int adc_reading;
-    if (chars->adc_num == ADC_UNIT_1) {
-        //Check if channel is valid on ADC1
-        ESP_RETURN_ON_FALSE(channel < SOC_ADC_CHANNEL_NUM(0), ESP_ERR_INVALID_ARG, LOG_TAG, "Invalid channel");
-        adc_reading = adc1_get_raw(channel);
-    } else {
-        //Check if channel is valid on ADC2
-        ESP_RETURN_ON_FALSE(channel < SOC_ADC_CHANNEL_NUM(1), ESP_ERR_INVALID_ARG, LOG_TAG, "Invalid channel");
-        ret = adc2_get_raw(channel, chars->bit_width, &adc_reading);
-    }
-    *voltage = esp_adc_cal_raw_to_voltage((uint32_t)adc_reading, chars);
-    return ret;
-}
@@ -15,6 +15,7 @@
 #include "hal/adc_types.h"
 #include "esp_efuse_rtc_calib.h"
 #include "esp_adc_cal.h"
+#include "../esp_adc_cal_internal.h"

 const static char LOG_TAG[] = "ADC_CALI";

@@ -33,33 +34,35 @@ static const int coeff_a_scaling = 1000000;
 *
 * @note {0,0} stands for unused item
 * @note In case of the overflow, these coeffcients are recorded as Absolute Value
- * @note For atten0 ~ 2, error = a1 * X^2 + a2 * X + a3; For atten3, error = a1 * X^4 + a2 * X^3 + a3 * X^2 + a4 * X + a5;
+ * @note For atten0 ~ 2, error = (K0 * X^0) + (K1 * X^1) + (K2 * X^2); For atten3, error = (K0 * X^0) + (K1 * X^1)  + (K2 * X^2) + (K3 * X^3) + (K4 * X^4);
+ * @note Above formula is rewritten from the original documentation, please note that the coefficients are re-ordered.
 */
-const static uint64_t adc_error_coef_atten[4][10][2] = {
-                                                            {{9798249589, 1e15}, {50871540569528, 1e16}, {3, 1}, {0, 0}, {0, 0},     //ADC1 atten0
-                                                             {36615265189, 1e16}, {1353548869615, 1e16}, {3, 1}, {0, 0}, {0, 0}},    //ADC2 atten0
-
-                                                            {{101379430548, 1e16}, {49393185868806, 1e16}, {3, 1}, {0, 0}, {0, 0},   //ADC1 atten1
-                                                             {118964995959, 1e16}, {66319894226185, 1e16}, {2, 1}, {0, 0}, {0, 0}},  //ADC2 atten1
-
-                                                            {{208385525314, 1e16}, {147640181047414, 1e16}, {2, 1}, {0, 0}, {0, 0},  //ADC1 atten2
-                                                             {259011467956, 1e16}, {200996773954387, 1e16}, {1, 1}, {0, 0}, {0, 0}}, //ADC2 atten2
-
-                                                            {{13515, 1e15}, {70769718, 1e15}, {1297891447611, 1e16}, {644334888647536, 1e16}, {1,1},    //ADC1 atten3
-                                                             {15038, 1e15}, {79672528, 1e15}, {1478791187119, 1e16}, {755717904943462, 1e16}, {1,1}}    //ADC2 atten3
+const static uint64_t adc1_error_coef_atten[4][5][2] = {
+                                                            {{27856531419538344, 1e16}, {50871540569528, 1e16}, {9798249589, 1e15}, {0, 0}, {0, 0}},                       //ADC1 atten0
+                                                            {{29831022915028695, 1e16}, {49393185868806, 1e16}, {101379430548, 1e16}, {0, 0}, {0, 0}},                     //ADC1 atten1
+                                                            {{23285545746296417, 1e16}, {147640181047414, 1e16}, {208385525314, 1e16}, {0, 0}, {0, 0}},                    //ADC1 atten2
+                                                            {{644403418269478, 1e15}, {644334888647536, 1e16}, {1297891447611, 1e16}, {70769718, 1e15}, {13515, 1e15}}     //ADC1 atten3
                                                        };
-const static int32_t adc_error_sign[4][10] = {
-                                                {1, -1, -1, 0, 0,   //ADC1 atten0
-                                                 1,  1, -1, 0, 0},  //ADC2 atten0
-
-                                                {1, -1, -1, 0, 0,   //ADC1 atten1
-                                                 1, -1, -1, 0, 0},  //ADC2 atten1
-
-                                                {1, -1, -1, 0, 0,   //ADC1 atten2
-                                                 1, -1, -1, 0, 0},  //ADC2 atten2
-
-                                                {1, -1, 1, -1, -1,  //ADC1 atten3
-                                                 1, -1, 1, -1,  1}  //ADC2 atten3
+const static uint64_t adc2_error_coef_atten[4][5][2] = {
+                                                            {{25668651654328927, 1e16}, {1353548869615, 1e16}, {36615265189, 1e16}, {0, 0}, {0, 0}},                       //ADC2 atten0
+                                                            {{23690184690298404, 1e16}, {66319894226185, 1e16}, {118964995959, 1e16}, {0, 0}, {0, 0}},                     //ADC2 atten1
+                                                            {{9452499397020617, 1e16}, {200996773954387, 1e16}, {259011467956, 1e16}, {0, 0}, {0, 0}},                     //ADC2 atten2
+                                                            {{12247719764336924,1e16}, {755717904943462, 1e16}, {1478791187119, 1e16}, {79672528, 1e15}, {15038, 1e15}}    //ADC2 atten3
+                                                        };
+/**
+ * Term sign
+ */
+const static int32_t adc1_error_sign[4][5] = {
+                                                {-1, -1, 1, 0,  0},  //ADC1 atten0
+                                                {-1, -1, 1, 0,  0},  //ADC1 atten1
+                                                {-1, -1, 1, 0,  0},  //ADC1 atten2
+                                                {-1, -1, 1, -1, 1}   //ADC1 atten3
+                                            };
+const static int32_t adc2_error_sign[4][5] = {
+                                                {-1,  1, 1,  0, 0},  //ADC2 atten0
+                                                {-1, -1, 1,  0, 0},  //ADC2 atten1
+                                                {-1, -1, 1,  0, 0},  //ADC2 atten2
+                                                { 1, -1, 1, -1, 1}   //ADC2 atten3
                                            };

 /* -------------------- Characterization Helper Data Types ------------------ */
@@ -151,47 +154,6 @@ esp_adc_cal_value_t esp_adc_cal_characterize(adc_unit_t adc_num,
    return ESP_ADC_CAL_VAL_EFUSE_TP_FIT;
 }

-static int32_t get_reading_error(uint64_t v_cali_1, uint8_t adc_num, uint8_t atten)
-{
-    if (v_cali_1 == 0) {
-        return 0;
-    }
-
-    uint8_t term_max = (atten == 3) ? 5 : 3;
-    int32_t error = 0;
-    uint64_t coeff = 0;
-    uint64_t term[5] = {0};
-
-    /**
-     * For atten0 ~ 2:
-     * error = a1 * X^2 + a2 * X + a3;
-     *
-     * For atten3:
-     * error = a1 * X^4 + a2 * X^3 + a3 * X^2 + a4 * X + a5;
-     */
-
-    //Calculate all the power beforehand
-    term[term_max-1] = 1;
-    term[term_max-2] = v_cali_1;
-    for (int term_id = term_max - 3; term_id >= 0; term_id--) {
-        term[term_id] = term[term_id + 1] * v_cali_1;
-    }
-
-    //Calculate each term
-    uint8_t coef_id_start = (adc_num == ADC_UNIT_1) ? 0 : 5;
-    for (int i = 0; i < term_max; i++) {
-        coeff = adc_error_coef_atten[atten][coef_id_start + i][0];
-        term[i] = term[i] * coeff;
-        ESP_LOGV(LOG_TAG, "big coef is %llu, big term%d is %llu, coef_id is %d", coeff, i, term[i], coef_id_start + i);
-
-        term[i] = term[i] / adc_error_coef_atten[atten][coef_id_start + i][1];
-        error += (int32_t)term[i] * adc_error_sign[atten][i];
-        ESP_LOGV(LOG_TAG, "term%d is %llu, error is %d", i, term[i], error);
-    }
-
-    return error;
-}
-
 uint32_t esp_adc_cal_raw_to_voltage(uint32_t adc_reading, const esp_adc_cal_characteristics_t *chars)
 {
    assert(chars != NULL);
@@ -209,29 +171,16 @@ uint32_t esp_adc_cal_raw_to_voltage(uint32_t adc_reading, const esp_adc_cal_char
    v_cali_1 = v_cali_1 / coeff_a_scaling;
    ESP_LOGV(LOG_TAG, "v_cali_1 is %llu", v_cali_1);

-    error = get_reading_error(v_cali_1, chars->adc_num, chars->atten);
+    //Curve Fitting error correction
+    esp_adc_error_calc_param_t param = {
+        .v_cali_input = v_cali_1,
+        .term_num = (chars->atten == 3) ? 5 : 3,
+        .coeff = (chars->adc_num == ADC_UNIT_1) ? &adc1_error_coef_atten : &adc2_error_coef_atten,
+        .sign = (chars->adc_num == ADC_UNIT_1) ? &adc1_error_sign : &adc2_error_sign,
+    };
+    error = esp_adc_cal_get_reading_error(&param, chars->atten);
+
    voltage = (int32_t)v_cali_1 - error;

    return voltage;
 }
-
-esp_err_t esp_adc_cal_get_voltage(adc_channel_t channel,
-                                  const esp_adc_cal_characteristics_t *chars,
-                                  uint32_t *voltage)
-{
-    // Check parameters
-    ESP_RETURN_ON_FALSE(chars != NULL, ESP_ERR_INVALID_ARG, LOG_TAG, "No characteristic input");
-    ESP_RETURN_ON_FALSE(voltage != NULL, ESP_ERR_INVALID_ARG, LOG_TAG, "No output buffer");
-
-    esp_err_t ret = ESP_OK;
-    int adc_reading;
-    if (chars->adc_num == ADC_UNIT_1) {
-        ESP_RETURN_ON_FALSE(channel < SOC_ADC_CHANNEL_NUM(0), ESP_ERR_INVALID_ARG, LOG_TAG, "Invalid channel");
-        adc_reading = adc1_get_raw(channel);
-    } else {
-        ESP_RETURN_ON_FALSE(channel < SOC_ADC_CHANNEL_NUM(1), ESP_ERR_INVALID_ARG, LOG_TAG, "Invalid channel");
-        ret = adc2_get_raw(channel, chars->bit_width, &adc_reading);
-    }
-    *voltage = esp_adc_cal_raw_to_voltage((uint32_t)adc_reading, chars);
-    return ret;
-}
@@ -0,0 +1,85 @@
+/*
+ * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <stdint.h>
+#include <string.h>
+#include "esp_types.h"
+#include "esp_err.h"
+#include "esp_log.h"
+#include "esp_check.h"
+#include "driver/adc.h"
+#include "hal/adc_types.h"
+#include "esp_adc_cal.h"
+#include "esp_adc_cal_internal.h"
+
+const static char *TAG = "ADC_CALI";
+
+esp_err_t esp_adc_cal_get_voltage(adc_channel_t channel,
+                                  const esp_adc_cal_characteristics_t *chars,
+                                  uint32_t *voltage)
+{
+    // Check parameters
+    ESP_RETURN_ON_FALSE(chars != NULL, ESP_ERR_INVALID_ARG, TAG, "No characteristic input");
+    ESP_RETURN_ON_FALSE(voltage != NULL, ESP_ERR_INVALID_ARG, TAG, "No output buffer");
+
+    esp_err_t ret = ESP_OK;
+    int adc_reading;
+    if (chars->adc_num == ADC_UNIT_1) {
+        ESP_RETURN_ON_FALSE(channel < SOC_ADC_CHANNEL_NUM(0), ESP_ERR_INVALID_ARG, TAG, "Invalid channel");
+        adc_reading = adc1_get_raw(channel);
+    } else {
+        ESP_RETURN_ON_FALSE(channel < SOC_ADC_CHANNEL_NUM(1), ESP_ERR_INVALID_ARG, TAG, "Invalid channel");
+        ret = adc2_get_raw(channel, chars->bit_width, &adc_reading);
+    }
+    *voltage = esp_adc_cal_raw_to_voltage((uint32_t)adc_reading, chars);
+    return ret;
+}
+
+#if ESP_ADC_CAL_CURVE_FITTING_SUPPORTED
+/*------------------------------------------------------------------------------
+ * Private API
+ *----------------------------------------------------------------------------*/
+int32_t esp_adc_cal_get_reading_error(const esp_adc_error_calc_param_t *param, uint8_t atten)
+{
+    if (param->v_cali_input == 0) {
+        return 0;
+    }
+
+    uint64_t v_cali_1 = param->v_cali_input;
+    uint8_t term_num = param->term_num;
+    int32_t error = 0;
+    uint64_t coeff = 0;
+    uint64_t variable[term_num];
+    uint64_t term[term_num];
+    memset(variable, 0, term_num * sizeof(uint64_t));
+    memset(term, 0, term_num * sizeof(uint64_t));
+
+    /**
+     * For atten0 ~ 2:
+     * error = (K0 * X^0) + (K1 * X^1) + (K2 * X^2);
+     *
+     * For atten3:
+     * error = (K0 * X^0) + (K1 * X^1)  + (K2 * X^2) + (K3 * X^3) + (K4 * X^4);
+     */
+    variable[0] = 1;
+    coeff = (*param->coeff)[atten][0][0];
+    term[0] = variable[0] * coeff / (*param->coeff)[atten][0][1];
+    error = (int32_t)term[0] * (*param->sign)[atten][0];
+
+    for (int i = 1; i < term_num; i++) {
+        variable[i] = variable[i-1] * v_cali_1;
+        coeff = (*param->coeff)[atten][i][0];
+        term[i] = variable[i] * coeff;
+        ESP_LOGV(TAG, "big coef is %llu, big term%d is %llu, coef_id is %d", coeff, i, term[i], i);
+
+        term[i] = term[i] / (*param->coeff)[atten][i][1];
+        error += (int32_t)term[i] * (*param->sign)[atten][i];
+        ESP_LOGV(TAG, "term%d is %llu, error is %d", i, term[i], error);
+    }
+
+    return error;
+}
+#endif  //#if ESP_ADC_CAL_CURVE_FITTING_SUPPORTED
@@ -0,0 +1,50 @@
+/*
+ * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include <stdint.h>
+#include "sdkconfig.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3
+#define ESP_ADC_CAL_CURVE_FITTING_SUPPORTED    1
+
+#define COEFF_GROUP_NUM    4
+#define TERM_MAX           5
+#endif
+
+#if ESP_ADC_CAL_CURVE_FITTING_SUPPORTED
+/**
+ * Calculation parameters used for curve fitting calibration algorithm error
+ *
+ * @note For atten0 ~ 2, error = (K0 * X^0) + (K1 * X^1) + (K2 * X^2); For atten3, error = (K0 * X^0) + (K1 * X^1)  + (K2 * X^2) + (K3 * X^3) + (K4 * X^4);
+ *       Where X is the `v_cali_input`.
+ */
+typedef struct {
+    uint64_t v_cali_input;                                      //Input to calculate the error
+    uint8_t  term_num;                                          //Term number of the algorithm formula
+    const uint64_t (*coeff)[COEFF_GROUP_NUM][TERM_MAX][2];      //Coeff of each term. See `adc_error_coef_atten` for details (and the magic number 2)
+    const int32_t  (*sign)[COEFF_GROUP_NUM][TERM_MAX];          //Sign of each term
+} esp_adc_error_calc_param_t;
+
+/**
+ * Calculate the curve fitting error
+ *
+ * @param param   see `esp_adc_error_calc_param_t`
+ * @param atten   ADC attenuation
+ */
+int32_t esp_adc_cal_get_reading_error(const esp_adc_error_calc_param_t *param, uint8_t atten);
+
+#endif  //#if ESP_ADC_CAL_CURVE_FITTING_SUPPORTED
+
+
+#ifdef __cplusplus
+}
+#endif
@@ -1,16 +1,8 @@
-// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */

 #ifndef __ESP_ADC_CAL_H__
 #define __ESP_ADC_CAL_H__
@@ -33,7 +33,8 @@ set(optional_reqs ulp
                    esp_netif
                    soc
                    esp-tls
-                    esp_https_ota)
+                    esp_https_ota
+                    esp_hw_support)

 idf_build_get_property(build_components BUILD_COMPONENTS)
 foreach(req ${optional_reqs})
@@ -1,17 +1,9 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */

-// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
 #ifndef __ESP_ATTR_H__
 #define __ESP_ATTR_H__

@@ -33,17 +25,24 @@ extern "C" {
 // Forces data into DRAM instead of flash
 #define DRAM_ATTR _SECTION_ATTR_IMPL(".dram1", __COUNTER__)

-#ifdef CONFIG_ESP32_IRAM_AS_8BIT_ACCESSIBLE_MEMORY
+// IRAM can only be accessed as an 8-bit memory on ESP32, when CONFIG_ESP32_IRAM_AS_8BIT_ACCESSIBLE_MEMORY is set
+#define IRAM_8BIT_ACCESSIBLE (CONFIG_IDF_TARGET_ESP32 && CONFIG_ESP32_IRAM_AS_8BIT_ACCESSIBLE_MEMORY)
+
+// Make sure that IRAM is accessible as an 8-bit memory on ESP32.
+// If that's not the case, coredump cannot dump data from IRAM.
+#if IRAM_8BIT_ACCESSIBLE
 // Forces data into IRAM instead of DRAM
 #define IRAM_DATA_ATTR __attribute__((section(".iram.data")))

 // Forces data into IRAM instead of DRAM and map it to coredump
-#define COREDUMP_IRAM_DATA_ATTR _SECTION_ATTR_IMPL(".iram.data.coredump", __COUNTER__)
+#define COREDUMP_IRAM_DATA_ATTR _SECTION_ATTR_IMPL(".iram2.coredump", __COUNTER__)

 // Forces bss into IRAM instead of DRAM
 #define IRAM_BSS_ATTR __attribute__((section(".iram.bss")))
 #else
-#define COREDUMP_IRAM_DATA_ATTR
+
+// IRAM is not accessible as an 8-bit memory, put IRAM coredump variables in DRAM
+#define COREDUMP_IRAM_DATA_ATTR COREDUMP_DRAM_ATTR
 #define IRAM_DATA_ATTR

 #define IRAM_BSS_ATTR
@@ -103,7 +102,9 @@ extern "C" {
 #define RTC_NOINIT_ATTR  _SECTION_ATTR_IMPL(".rtc_noinit", __COUNTER__)

 // Forces code into DRAM instead of flash and map it to coredump
-#define COREDUMP_DRAM_ATTR _SECTION_ATTR_IMPL(".dram1.coredump", __COUNTER__)
+// Use dram2 instead of dram1 to make sure this section will not be included
+// by dram1 section in the linker script
+#define COREDUMP_DRAM_ATTR _SECTION_ATTR_IMPL(".dram2.coredump", __COUNTER__)

 // Forces data into RTC memory and map it to coredump
 #define COREDUMP_RTC_DATA_ATTR _SECTION_ATTR_IMPL(".rtc.coredump", __COUNTER__)
@@ -25,6 +25,7 @@ extern "C" {
 */
 #if defined(CONFIG_COMPILER_OPTIMIZATION_CHECKS_SILENT)
 #define ESP_RETURN_ON_ERROR(x, log_tag, format, ...) do {                                       \
+        (void)log_tag;                                                                          \
        esp_err_t err_rc_ = (x);                                                                \
        if (unlikely(err_rc_ != ESP_OK)) {                                                      \
            return err_rc_;                                                                     \
@@ -35,6 +36,7 @@ extern "C" {
 * A version of ESP_RETURN_ON_ERROR() macro that can be called from ISR.
 */
 #define ESP_RETURN_ON_ERROR_ISR(x, log_tag, format, ...) do {                                   \
+        (void)log_tag;                                                                          \
        esp_err_t err_rc_ = (x);                                                                \
        if (unlikely(err_rc_ != ESP_OK)) {                                                      \
            return err_rc_;                                                                     \
@@ -46,6 +48,7 @@ extern "C" {
 * sets the local variable 'ret' to the code, and then exits by jumping to 'goto_tag'.
 */
 #define ESP_GOTO_ON_ERROR(x, goto_tag, log_tag, format, ...) do {                               \
+        (void)log_tag;                                                                          \
        esp_err_t err_rc_ = (x);                                                                \
        if (unlikely(err_rc_ != ESP_OK)) {                                                      \
            ret = err_rc_;                                                                      \
@@ -57,6 +60,7 @@ extern "C" {
 * A version of ESP_GOTO_ON_ERROR() macro that can be called from ISR.
 */
 #define ESP_GOTO_ON_ERROR_ISR(x, goto_tag, log_tag, format, ...) do {                           \
+        (void)log_tag;                                                                          \
        esp_err_t err_rc_ = (x);                                                                \
        if (unlikely(err_rc_ != ESP_OK)) {                                                      \
            ret = err_rc_;                                                                      \
@@ -69,6 +73,7 @@ extern "C" {
 * and returns with the supplied 'err_code'.
 */
 #define ESP_RETURN_ON_FALSE(a, err_code, log_tag, format, ...) do {                             \
+        (void)log_tag;                                                                          \
        if (unlikely(!(a))) {                                                                   \
            return err_code;                                                                    \
        }                                                                                       \
@@ -78,6 +83,7 @@ extern "C" {
 * A version of ESP_RETURN_ON_FALSE() macro that can be called from ISR.
 */
 #define ESP_RETURN_ON_FALSE_ISR(a, err_code, log_tag, format, ...) do {                         \
+        (void)log_tag;                                                                          \
        if (unlikely(!(a))) {                                                                   \
            return err_code;                                                                    \
        }                                                                                       \
@@ -88,6 +94,7 @@ extern "C" {
 * sets the local variable 'ret' to the supplied 'err_code', and then exits by jumping to 'goto_tag'.
 */
 #define ESP_GOTO_ON_FALSE(a, err_code, goto_tag, log_tag, format, ...) do {                     \
+        (void)log_tag;                                                                          \
        if (unlikely(!(a))) {                                                                   \
            ret = err_code;                                                                     \
            goto goto_tag;                                                                      \
@@ -98,6 +105,7 @@ extern "C" {
 * A version of ESP_GOTO_ON_FALSE() macro that can be called from ISR.
 */
 #define ESP_GOTO_ON_FALSE_ISR(a, err_code, goto_tag, log_tag, format, ...) do {                 \
+        (void)log_tag;                                                                          \
        if (unlikely(!(a))) {                                                                   \
            ret = err_code;                                                                     \
            goto goto_tag;                                                                      \
@@ -1,16 +1,9 @@
-// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */

-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
 #pragma once

 #include <stdint.h>
@@ -46,6 +39,7 @@ typedef int esp_err_t;
 #define ESP_ERR_MESH_BASE           0x4000  /*!< Starting number of MESH error codes */
 #define ESP_ERR_FLASH_BASE          0x6000  /*!< Starting number of flash error codes */
 #define ESP_ERR_HW_CRYPTO_BASE      0xc000  /*!< Starting number of HW cryptography module error codes */
+#define ESP_ERR_MEMPROT_BASE        0xd000  /*!< Starting number of Memory Protection API error codes */

 /**
  * @brief Returns string for esp_err_t error codes
@@ -23,7 +23,7 @@ extern "C" {
 /** Minor version number (x.X.x) */
 #define ESP_IDF_VERSION_MINOR   4
 /** Patch version number (x.x.X) */
-#define ESP_IDF_VERSION_PATCH   0
+#define ESP_IDF_VERSION_PATCH   1

 /**
 * Macro to convert IDF version number into an integer
@@ -23,6 +23,9 @@
 #if __has_include("esp_image_format.h")
 #include "esp_image_format.h"
 #endif
+#if __has_include("esp_memprot_err.h")
+#include "esp_memprot_err.h"
+#endif
 #if __has_include("esp_mesh.h")
 #include "esp_mesh.h"
 #endif
@@ -758,6 +761,33 @@ static const esp_err_msg_t esp_err_msg_table[] = {
 #   endif
 #   ifdef      ESP_ERR_HW_CRYPTO_DS_INVALID_PADDING
    ERR_TBL_IT(ESP_ERR_HW_CRYPTO_DS_INVALID_PADDING),           /* 49157 0xc005 */
+#   endif
+    // components/esp_common/include/esp_err.h
+#   ifdef      ESP_ERR_MEMPROT_BASE
+    ERR_TBL_IT(ESP_ERR_MEMPROT_BASE),                           /* 53248 0xd000 Starting number of Memory Protection API
+                                                                                error codes */
+#   endif
+    // components/esp_hw_support/include/esp_memprot_err.h
+#   ifdef      ESP_ERR_MEMPROT_MEMORY_TYPE_INVALID
+    ERR_TBL_IT(ESP_ERR_MEMPROT_MEMORY_TYPE_INVALID),            /* 53249 0xd001 */
+#   endif
+#   ifdef      ESP_ERR_MEMPROT_SPLIT_ADDR_INVALID
+    ERR_TBL_IT(ESP_ERR_MEMPROT_SPLIT_ADDR_INVALID),             /* 53250 0xd002 */
+#   endif
+#   ifdef      ESP_ERR_MEMPROT_SPLIT_ADDR_OUT_OF_RANGE
+    ERR_TBL_IT(ESP_ERR_MEMPROT_SPLIT_ADDR_OUT_OF_RANGE),        /* 53251 0xd003 */
+#   endif
+#   ifdef      ESP_ERR_MEMPROT_SPLIT_ADDR_UNALIGNED
+    ERR_TBL_IT(ESP_ERR_MEMPROT_SPLIT_ADDR_UNALIGNED),           /* 53252 0xd004 */
+#   endif
+#   ifdef      ESP_ERR_MEMPROT_UNIMGMT_BLOCK_INVALID
+    ERR_TBL_IT(ESP_ERR_MEMPROT_UNIMGMT_BLOCK_INVALID),          /* 53253 0xd005 */
+#   endif
+#   ifdef      ESP_ERR_MEMPROT_WORLD_INVALID
+    ERR_TBL_IT(ESP_ERR_MEMPROT_WORLD_INVALID),                  /* 53254 0xd006 */
+#   endif
+#   ifdef      ESP_ERR_MEMPROT_AREA_INVALID
+    ERR_TBL_IT(ESP_ERR_MEMPROT_AREA_INVALID),                   /* 53255 0xd007 */
 #   endif
 };
 #endif //CONFIG_ESP_ERR_TO_NAME_LOOKUP
@@ -1,16 +1,8 @@
-// Copyright 2019-2021 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2019-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */

 #include <sys/cdefs.h>
 #include <stdatomic.h>
@@ -270,13 +262,11 @@ esp_err_t esp_eth_start(esp_eth_handle_t hdl)
    esp_eth_driver_t *eth_driver = (esp_eth_driver_t *)hdl;
    ESP_GOTO_ON_FALSE(eth_driver, ESP_ERR_INVALID_ARG, err, TAG, "ethernet driver handle can't be null");
    esp_eth_phy_t *phy = eth_driver->phy;
-    esp_eth_mac_t *mac = eth_driver->mac;
    // check if driver has stopped
    esp_eth_fsm_t expected_fsm = ESP_ETH_FSM_STOP;
    ESP_GOTO_ON_FALSE(atomic_compare_exchange_strong(&eth_driver->fsm, &expected_fsm, ESP_ETH_FSM_START),
                      ESP_ERR_INVALID_STATE, err, TAG, "driver started already");
    ESP_GOTO_ON_ERROR(phy->negotiate(phy), err, TAG, "phy negotiation failed");
-    ESP_GOTO_ON_ERROR(mac->start(mac), err, TAG, "start mac failed");
    ESP_GOTO_ON_ERROR(esp_event_post(ETH_EVENT, ETHERNET_EVENT_START, &eth_driver, sizeof(esp_eth_driver_t *), 0),
                      err, TAG, "send ETHERNET_EVENT_START event failed");
    ESP_GOTO_ON_ERROR(phy->get_link(phy), err, TAG, "phy get link status failed");
@@ -1,16 +1,8 @@
-// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2019-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 #include <string.h>
 #include <stdlib.h>
 #include <sys/cdefs.h>
@@ -41,7 +33,7 @@
 static const char *TAG = "esp.emac";

 #define PHY_OPERATION_TIMEOUT_US (1000)
-#define MAC_STOP_TIMEOUT_MS (100)
+#define MAC_STOP_TIMEOUT_US (250)
 #define FLOW_CONTROL_LOW_WATER_MARK (CONFIG_ETH_DMA_RX_BUFFER_NUM / 3)
 #define FLOW_CONTROL_HIGH_WATER_MARK (FLOW_CONTROL_LOW_WATER_MARK * 2)

@@ -72,6 +64,8 @@ typedef struct {

 static esp_err_t esp_emac_alloc_driver_obj(const eth_mac_config_t *config, emac_esp32_t **emac_out_hdl, void **out_descriptors);
 static void esp_emac_free_driver_obj(emac_esp32_t *emac, void *descriptors);
+static esp_err_t emac_esp32_start(esp_eth_mac_t *mac);
+static esp_err_t emac_esp32_stop(esp_eth_mac_t *mac);

 static esp_err_t emac_esp32_set_mediator(esp_eth_mac_t *mac, esp_eth_mediator_t *eth)
 {
@@ -158,11 +152,11 @@ static esp_err_t emac_esp32_set_link(esp_eth_mac_t *mac, eth_link_t link)
    switch (link) {
    case ETH_LINK_UP:
        ESP_GOTO_ON_ERROR(esp_intr_enable(emac->intr_hdl), err, TAG, "enable interrupt failed");
-        emac_hal_start(&emac->hal);
+        emac_esp32_start(mac);
        break;
    case ETH_LINK_DOWN:
        ESP_GOTO_ON_ERROR(esp_intr_disable(emac->intr_hdl), err, TAG, "disable interrupt failed");
-        emac_hal_stop(&emac->hal);
+        emac_esp32_stop(mac);
        break;
    default:
        ESP_GOTO_ON_FALSE(false, ESP_ERR_INVALID_ARG, err, TAG, "unknown link status");
@@ -232,7 +226,7 @@ static esp_err_t emac_esp32_transmit(esp_eth_mac_t *mac, uint8_t *buf, uint32_t
    esp_err_t ret = ESP_OK;
    emac_esp32_t *emac = __containerof(mac, emac_esp32_t, parent);
    uint32_t sent_len = emac_hal_transmit_frame(&emac->hal, buf, length);
-    ESP_GOTO_ON_FALSE(sent_len == length, ESP_ERR_INVALID_SIZE, err, TAG, "insufficient TX buffer size");
+    ESP_GOTO_ON_FALSE(sent_len == length, ESP_ERR_NO_MEM, err, TAG, "insufficient TX buffer size");
    return ESP_OK;
 err:
    return ret;
@@ -404,9 +398,9 @@ static esp_err_t emac_esp32_stop(esp_eth_mac_t *mac)
        if ((ret = emac_hal_stop(&emac->hal)) == ESP_OK) {
            break;
        }
-        to += 20;
-        vTaskDelay(pdMS_TO_TICKS(20));
-    } while (to < MAC_STOP_TIMEOUT_MS);
+        to += 25;
+        esp_rom_delay_us(25);
+    } while (to < MAC_STOP_TIMEOUT_US);
    return ret;
 }

@@ -1,7 +1,15 @@
+# EMAC Test
 | Supported Targets | ESP32 |
 | ----------------- | ----- |

 This test app is used to test MAC layer behavior with different PHY chips:

- ip101
- lan8720
+- IP101
+- LAN8720
+
+## Prerequisites
+Install third part Python packages:
+
+```bash
+pip install scapy
+```
@@ -1,9 +1,12 @@
 import os
 import re
 import socket
+from collections.abc import Callable
+from threading import Thread

 import tiny_test_fw
 import ttfw_idf
+from scapy.all import Ether, raw
 from ttfw_idf import TestFormat

 try:
@@ -39,26 +42,52 @@ def configure_eth_if(func):         # type: (typing.Any) -> typing.Any
 def check_eth_recv_packet(so):    # type: (socket.socket) -> None
    so.settimeout(10)
    try:
-        pkt = so.recv(1024)
-        for i in range(128, 1024):
-            if pkt[i] != i & 0xff:
+        eth_frame = Ether(so.recv(1024))
+        for i in range(0, 1010):
+            if eth_frame.load[i] != i & 0xff:
                raise Exception('Packet content mismatch')
    except Exception as e:
        raise e


@configure_eth_if
-def send_eth_packet(so, mac):    # type: (socket.socket, bytes) -> None
+def send_eth_packet(so, mac):    # type: (socket.socket, str) -> None
    so.settimeout(10)
-    pkt = bytearray()
-    pkt += mac                      # dest
-    pkt += so.getsockname()[4]      # src
-    pkt += bytes.fromhex('2222')    # proto
-    pkt += bytes(1010)              # padding to 1024
-    for i in range(128, 1024):
-        pkt[i] = i & 0xff
+    payload = bytearray(1010)
+    for i, _ in enumerate(payload):
+        payload[i] = i & 0xff
+    eth_frame = Ether(dst=mac, src=so.getsockname()[4], type=0x2222) / raw(payload)
    try:
-        so.send(pkt)
+        so.send(raw(eth_frame))
+    except Exception as e:
+        raise e
+
+
+@configure_eth_if
+def recv_resp_poke(so, i):    # type: (socket.socket, int) -> None
+    so.settimeout(10)
+    try:
+        eth_frame = Ether(so.recv(60))
+
+        if eth_frame.type == 0x2222 and eth_frame.load[0] == 0xfa:
+            if eth_frame.load[1] != i:
+                raise Exception('Missed Poke Packet')
+            eth_frame.dst = eth_frame.src
+            eth_frame.src = so.getsockname()[4]
+            eth_frame.load = bytes.fromhex('fb')    # POKE_RESP code
+            so.send(raw(eth_frame))
+    except Exception as e:
+        raise e
+
+
+@configure_eth_if
+def traffic_gen(so, mac, enabled):  # type: (socket.socket, str, Callable) -> None
+    payload = bytes.fromhex('ff')    # DUMMY_TRAFFIC code
+    payload += bytes(1485)
+    eth_frame = Ether(dst=mac, src=so.getsockname()[4], type=0x2222) / raw(payload)
+    try:
+        while enabled() == 1:
+            so.send(raw(eth_frame))
    except Exception as e:
        raise e

@@ -78,14 +107,43 @@ def test_component_ut_esp_eth(env, appname):  # type: (tiny_test_fw.Env, str) ->
    stdout = dut.expect("Enter next test, or 'enter' to see menu", full_stdout=True)
    ttfw_idf.ComponentUTResult.parse_result(stdout, test_format=TestFormat.UNITY_BASIC)
    dut.write('"recv_pkt"')
-    expect_result = dut.expect(re.compile(r'([\s\S]*)DUT MAC: ([0-9a-zA-Z:]*)'), timeout=10)
+    expect_result = dut.expect(re.compile(
+        r'([\s\S]*)'
+        r'DUT MAC: ([0-9A-Fa-f]{2}:[0-9A-Fa-f]{2}:[0-9A-Fa-f]{2}:[0-9A-Fa-f]{2}:[0-9A-Fa-f]{2}:[0-9A-Fa-f]{2})'),
+        timeout=10
+    )
    stdout = expect_result[0]
-    send_eth_packet(bytes.fromhex('ffffffffffff'))      # broadcast frame
-    send_eth_packet(bytes.fromhex('010000000000'))      # multicast frame
-    send_eth_packet(bytes.fromhex(expect_result[1].replace(':', '')))   # unicast frame
+    send_eth_packet('ff:ff:ff:ff:ff:ff')      # broadcast frame
+    send_eth_packet('01:00:00:00:00:00')      # multicast frame
+    send_eth_packet(expect_result[1])   # unicast frame
    stdout += dut.expect("Enter next test, or 'enter' to see menu", full_stdout=True)
    ttfw_idf.ComponentUTResult.parse_result(stdout, test_format=TestFormat.UNITY_BASIC)

+    dut.write('"start_stop_stress_test"')
+    expect_result = dut.expect(re.compile(
+        r'([\s\S]*)'
+        r'DUT MAC: ([0-9A-Fa-f]{2}:[0-9A-Fa-f]{2}:[0-9A-Fa-f]{2}:[0-9A-Fa-f]{2}:[0-9A-Fa-f]{2}:[0-9A-Fa-f]{2})'),
+        timeout=10
+    )
+
+    # Start/stop under heavy Tx traffic
+    for tx_i in range(10):
+        recv_resp_poke(tx_i)
+
+    # Start/stop under heavy Rx traffic
+    traffic_en = 1
+    thread = Thread(target=traffic_gen, args=(expect_result[1], lambda:traffic_en, ))
+    thread.start()
+    try:
+        for rx_i in range(10):
+            recv_resp_poke(rx_i)
+    finally:
+        traffic_en = 0
+        thread.join()
+
+    stdout = dut.expect("Enter next test, or 'enter' to see menu", full_stdout=True)
+    ttfw_idf.ComponentUTResult.parse_result(stdout, test_format=TestFormat.UNITY_BASIC)
+

@ttfw_idf.idf_component_unit_test(env_tag='COMPONENT_UT_IP101', target=['esp32'])
 def test_component_ut_esp_eth_ip101(env, _):  # type: (tiny_test_fw.Env, typing.Any) -> None
@@ -17,6 +17,10 @@
 #define ETH_MULTICAST_RECV_BIT BIT(1)
 #define ETH_UNICAST_RECV_BIT BIT(2)

+#define POKE_REQ 0xFA
+#define POKE_RESP 0xFB
+#define DUMMY_TRAFFIC 0xFF
+
 typedef struct {
    uint8_t dest[6];
    uint8_t src[6];
@@ -170,12 +174,14 @@ TEST_CASE("ethernet_broadcast_transmit", "[esp_eth]")
    TEST_ASSERT_EQUAL(ESP_OK, esp_eth_start(eth_handle)); // start Ethernet driver state machine

    TEST_ASSERT(xSemaphoreTake(mutex, pdMS_TO_TICKS(3000)));
+    // even if PHY (IP101) indicates autonegotiation done and link up, it sometimes may miss few packets after atonego reset, hence wait a bit
+    vTaskDelay(pdMS_TO_TICKS(100));

    emac_frame_t *pkt = malloc(1024);
    pkt->proto = 0x2222;
    memset(pkt->dest, 0xff, 6);     // broadcast addr
-    for (int i = 128; i < 1024; ++i){
-        ((uint8_t*)pkt)[i] = i & 0xff;
+    for (int i = 0; i < (1024 - ETH_HEADER_LEN); ++i){
+        pkt->data[i] = i & 0xff;
    }

    TEST_ASSERT_EQUAL(ESP_OK, esp_eth_transmit(eth_handle, pkt, 1024));
@@ -198,8 +204,8 @@ esp_err_t l2_packet_txrx_test_cb(esp_eth_handle_t hdl, uint8_t *buffer, uint32_t
    // check header
    if (pkt->proto == 0x2222 && length == 1024) {
        // check content
-        for (int i = 128; i < 1024; ++i) {
-            if (buffer[i] != (i & 0xff)) {
+        for (int i = 0; i < (length - ETH_HEADER_LEN); ++i) {
+            if (pkt->data[i] != (i & 0xff)) {
                return ESP_OK;
            }
        }
@@ -259,6 +265,171 @@ TEST_CASE("recv_pkt", "[esp_eth]")
    vEventGroupDelete(eth_event_group);
 }

+typedef struct
+{
+    SemaphoreHandle_t mutex;
+    int rx_pkt_cnt;
+} recv_info_t;
+
+TEST_CASE("start_stop_stress_test", "[esp_eth]")
+{
+    void eth_event_handler(void *arg, esp_event_base_t event_base,
+                              int32_t event_id, void *event_data)
+    {
+        EventGroupHandle_t eth_event_group = (EventGroupHandle_t)arg;
+        switch (event_id) {
+        case ETHERNET_EVENT_CONNECTED:
+            xEventGroupSetBits(eth_event_group, ETH_CONNECT_BIT);
+            break;
+        case ETHERNET_EVENT_DISCONNECTED:
+            break;
+        case ETHERNET_EVENT_START:
+            xEventGroupSetBits(eth_event_group, ETH_START_BIT);
+            break;
+        case ETHERNET_EVENT_STOP:
+            xEventGroupSetBits(eth_event_group, ETH_STOP_BIT);
+            break;
+        default:
+            break;
+        }
+    }
+    esp_err_t eth_recv_cb(esp_eth_handle_t hdl, uint8_t *buffer, uint32_t length, void *priv)
+    {
+        emac_frame_t *pkt = (emac_frame_t *)buffer;
+        recv_info_t *recv_info = (recv_info_t *)priv;
+
+        if (pkt->proto == 0x2222) {
+            switch (pkt->data[0])
+            {
+            case POKE_RESP:
+                xSemaphoreGive(recv_info->mutex);
+                break;
+
+            case DUMMY_TRAFFIC:
+                (recv_info->rx_pkt_cnt)++;
+                break;
+            default:
+                break;
+            }
+        }
+        free(buffer);
+        return ESP_OK;
+    }
+
+    recv_info_t recv_info;
+    recv_info.mutex = xSemaphoreCreateBinary();
+    TEST_ASSERT_NOT_NULL(recv_info.mutex);
+    recv_info.rx_pkt_cnt = 0;
+
+    eth_mac_config_t mac_config = ETH_MAC_DEFAULT_CONFIG();  // apply default MAC configuration
+    esp_eth_mac_t *mac = esp_eth_mac_new_esp32(&mac_config); // create MAC instance
+    TEST_ASSERT_NOT_NULL(mac);
+    eth_phy_config_t phy_config = ETH_PHY_DEFAULT_CONFIG(); // apply default PHY configuration
+#if defined(CONFIG_TARGET_ETH_PHY_DEVICE_IP101)
+    esp_eth_phy_t *phy = esp_eth_phy_new_ip101(&phy_config); // create PHY instance
+#elif defined(CONFIG_TARGET_ETH_PHY_DEVICE_LAN8720)
+    esp_eth_phy_t *phy = esp_eth_phy_new_lan8720(&phy_config);
+#endif
+    TEST_ASSERT_NOT_NULL(phy);
+    esp_eth_config_t config = ETH_DEFAULT_CONFIG(mac, phy); // apply default driver configuration
+    esp_eth_handle_t eth_handle = NULL; // after driver installed, we will get the handle of the driver
+    TEST_ASSERT_EQUAL(ESP_OK, esp_eth_driver_install(&config, &eth_handle)); // install driver
+    TEST_ASSERT_NOT_NULL(eth_handle);
+
+    TEST_ASSERT_EQUAL(ESP_OK, mac->get_addr(mac, local_mac_addr));
+    // test app will parse the DUT MAC from this line of log output
+    printf("DUT MAC: %.2x:%.2x:%.2x:%.2x:%.2x:%.2x\n", local_mac_addr[0], local_mac_addr[1], local_mac_addr[2],
+           local_mac_addr[3], local_mac_addr[4], local_mac_addr[5]);
+
+    TEST_ESP_OK(esp_eth_update_input_path(eth_handle, eth_recv_cb, &recv_info));
+
+    EventBits_t bits = 0;
+    EventGroupHandle_t eth_event_group = xEventGroupCreate();
+    TEST_ASSERT(eth_event_group != NULL);
+    TEST_ESP_OK(esp_event_loop_create_default());
+    TEST_ESP_OK(esp_event_handler_register(ETH_EVENT, ESP_EVENT_ANY_ID, &eth_event_handler, eth_event_group));
+
+    // create a control frame to control test flow between the UT and the Python test script
+    emac_frame_t *ctrl_pkt = calloc(1, 60);
+    ctrl_pkt->proto = 0x2222;
+    memset(ctrl_pkt->dest, 0xff, 6); // broadcast addr
+    memcpy(ctrl_pkt->src, local_mac_addr, 6);
+
+    // create dummy data packet used for traffic generation
+    emac_frame_t *pkt = calloc(1, 1500);
+    pkt->proto = 0x2222;
+    // we don't care about dest MAC address much, however it is better to not be broadcast or multifcast to not flood
+    // other network nodes
+    memset(pkt->dest, 0xBA, 6);
+    memcpy(pkt->src, local_mac_addr, 6);
+
+    printf("EMAC start/stop stress test under heavy Tx traffic\n");
+    for (int tx_i = 0; tx_i < 10; tx_i++) {
+        TEST_ASSERT_EQUAL(ESP_OK, esp_eth_start(eth_handle)); // start Ethernet driver state machine
+        bits = xEventGroupWaitBits(eth_event_group, ETH_CONNECT_BIT, true, true, pdMS_TO_TICKS(3000));
+        TEST_ASSERT((bits & ETH_CONNECT_BIT) == ETH_CONNECT_BIT);
+        // even if PHY (IP101) indicates autonegotiation done and link up, it sometimes may miss few packets after atonego reset, hence wait a bit
+        vTaskDelay(pdMS_TO_TICKS(100));
+
+        // at first, check that Tx/Rx path works as expected by poking the test script
+        // this also serves as main PASS/FAIL criteria
+        ctrl_pkt->data[0] = POKE_REQ;
+        ctrl_pkt->data[1] = tx_i;
+        TEST_ASSERT_EQUAL(ESP_OK, esp_eth_transmit(eth_handle, ctrl_pkt, 60));
+        TEST_ASSERT(xSemaphoreTake(recv_info.mutex, pdMS_TO_TICKS(3000)));
+        printf("Tx Test iteration %d\n", tx_i);
+
+        // generate heavy Tx traffic
+        printf("Note: transmit errors are expected...\n");
+        for (int j = 0; j < 150; j++) {
+            // return value is not checked on purpose since it is expected that it may fail time to time because
+            // we may try to queue more packets than hardware is able to handle
+            pkt->data[0] = j & 0xFF;
+            esp_eth_transmit(eth_handle, pkt, 1500);
+        }
+        TEST_ASSERT_EQUAL(ESP_OK, esp_eth_stop(eth_handle));
+        bits = xEventGroupWaitBits(eth_event_group, ETH_STOP_BIT, true, true, pdMS_TO_TICKS(3000));
+        TEST_ASSERT((bits & ETH_STOP_BIT) == ETH_STOP_BIT);
+        printf("Ethernet stopped\n");
+    }
+
+    printf("EMAC start/stop stress test under heavy Rx traffic\n");
+    for (int rx_i = 0; rx_i < 10; rx_i++) {
+        recv_info.rx_pkt_cnt = 0;
+        TEST_ASSERT_EQUAL(ESP_OK, esp_eth_start(eth_handle)); // start Ethernet driver state machine
+        bits = xEventGroupWaitBits(eth_event_group, ETH_CONNECT_BIT, true, true, pdMS_TO_TICKS(3000));
+        TEST_ASSERT((bits & ETH_CONNECT_BIT) == ETH_CONNECT_BIT);
+        // even if PHY (IP101) indicates autonegotiation done and link up, it sometimes may miss few packets after atonego reset, hence wait a bit
+        vTaskDelay(pdMS_TO_TICKS(100));
+
+        ctrl_pkt->data[0] = POKE_REQ;
+        ctrl_pkt->data[1] = rx_i;
+        TEST_ASSERT_EQUAL(ESP_OK, esp_eth_transmit(eth_handle, ctrl_pkt, 60));
+        TEST_ASSERT(xSemaphoreTake(recv_info.mutex, pdMS_TO_TICKS(3000)));
+        printf("Rx Test iteration %d\n", rx_i);
+
+        vTaskDelay(pdMS_TO_TICKS(500));
+
+        TEST_ASSERT_EQUAL(ESP_OK, esp_eth_stop(eth_handle));
+        bits = xEventGroupWaitBits(eth_event_group, ETH_STOP_BIT, true, true, pdMS_TO_TICKS(3000));
+        TEST_ASSERT((bits & ETH_STOP_BIT) == ETH_STOP_BIT);
+        printf("Recv packets: %d\n", recv_info.rx_pkt_cnt);
+        TEST_ASSERT_GREATER_THAN_INT32(0, recv_info.rx_pkt_cnt);
+        printf("Ethernet stopped\n");
+    }
+
+    free(ctrl_pkt);
+    free(pkt);
+
+    TEST_ESP_OK(esp_event_handler_unregister(ETH_EVENT, ESP_EVENT_ANY_ID, eth_event_handler));
+    TEST_ASSERT_EQUAL(ESP_OK, esp_event_loop_delete_default());
+    TEST_ASSERT_EQUAL(ESP_OK, esp_eth_driver_uninstall(eth_handle));
+    phy->del(phy);
+    mac->del(mac);
+    vEventGroupDelete(eth_event_group);
+    vSemaphoreDelete(recv_info.mutex);
+}
+
 void app_main(void)
 {
    unity_run_menu();
--- a/Show More
+++ b/Show More