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fix(esp_rom): correct typos defalut -> default

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This commit is contained in:
Samuel Obuch
2025-09-29 11:49:35 +02:00
parent 9063a6c279
commit 66de4ef8ca
8 changed files with 8 additions and 8 deletions
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components/esp_rom/esp32c2/include/esp32c2/rom/cache.h
+1 -1
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@@ -401,7 +401,7 @@ void Cache_Set_Default_Mode(void);
*
* @return None
*/
void Cache_Enable_Defalut_ICache_Mode(void);
void Cache_Enable_Default_ICache_Mode(void);
/**
* @brief Enable freeze for ICache.
components/esp_rom/esp32c2/ld/esp32c2.rom.ld
+1 -1
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@@ -304,7 +304,7 @@ PROVIDE( Cache_Get_Mode = 0x400006e4 );
PROVIDE( Cache_Address_Through_IBus = 0x400006e8 );
PROVIDE( Cache_Address_Through_DBus = 0x400006ec );
PROVIDE( Cache_Set_Default_Mode = 0x400006f0 );
PROVIDE( Cache_Enable_Defalut_ICache_Mode = 0x400006f4 );
PROVIDE( Cache_Enable_Default_ICache_Mode = 0x400006f4 );
PROVIDE( ROM_Boot_Cache_Init = 0x400006f8 );
PROVIDE( MMU_Set_Page_Mode = 0x400006fc );
PROVIDE( MMU_Get_Page_Mode = 0x40000700 );
components/esp_rom/esp32c3/include/esp32c3/rom/cache.h
+1 -1
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@@ -561,7 +561,7 @@ void Cache_Set_Default_Mode(void);
*
* @return None
*/
void Cache_Enable_Defalut_ICache_Mode(void);
void Cache_Enable_Default_ICache_Mode(void);
/**
* @brief Enable freeze for ICache.
components/esp_rom/esp32c3/ld/esp32c3.rom.ld
+1 -1
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@@ -292,7 +292,7 @@ PROVIDE( Cache_Get_Mode = 0x400004b4 );
PROVIDE( Cache_Address_Through_IBus = 0x400004b8 );
PROVIDE( Cache_Address_Through_DBus = 0x400004bc );
PROVIDE( Cache_Set_Default_Mode = 0x400004c0 );
PROVIDE( Cache_Enable_Defalut_ICache_Mode = 0x400004c4 );
PROVIDE( Cache_Enable_Default_ICache_Mode = 0x400004c4 );
PROVIDE( ROM_Boot_Cache_Init = 0x400004c8 );
PROVIDE( Cache_Invalidate_ICache_Items = 0x400004cc );
PROVIDE( Cache_Op_Addr = 0x400004d0 );
components/esp_rom/esp32s2/include/esp32s2/rom/cache.h
+1 -1
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@@ -860,7 +860,7 @@ void Cache_Set_Default_Mode(void);
*
* @return None
*/
void Cache_Enable_Defalut_DCache_Mode(void);
void Cache_Enable_Default_DCache_Mode(void);
/**
* @brief Travel tag memory to run a call back function.
components/esp_rom/esp32s2/ld/esp32s2.rom.ld
+1 -1
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@@ -29,7 +29,7 @@ PROVIDE ( Cache_Disable_ICache_PreLock = 0x4001892c );
PROVIDE ( Cache_Enable_DCache = 0x40018d58 );
PROVIDE ( Cache_Enable_DCache_Autoload = 0x40018874 );
PROVIDE ( Cache_Enable_DCache_PreLock = 0x400189f0 );
PROVIDE ( Cache_Enable_Defalut_DCache_Mode = 0x40018170 );
PROVIDE ( Cache_Enable_Default_DCache_Mode = 0x40018170 );
PROVIDE ( Cache_Enable_ICache = 0x40018cf8 );
PROVIDE ( Cache_Enable_ICache_Autoload = 0x40018744 );
PROVIDE ( Cache_Enable_ICache_PreLock = 0x400188c0 );
components/esp_rom/esp32s3/include/esp32s3/rom/cache.h
+1 -1
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@@ -990,7 +990,7 @@ void Cache_Set_Default_Mode(void);
*
* @return None
*/
void Cache_Enable_Defalut_ICache_Mode(void);
void Cache_Enable_Default_ICache_Mode(void);
/**
* @brief Occupy the cache items for DCache.
components/esp_rom/esp32s3/ld/esp32s3.rom.ld
+1 -1
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@@ -349,7 +349,7 @@ PROVIDE( Cache_Set_DCache_Mode = 0x4000162c );
PROVIDE( Cache_Address_Through_ICache = 0x40001638 );
PROVIDE( Cache_Address_Through_DCache = 0x40001644 );
PROVIDE( Cache_Set_Default_Mode = 0x40001650 );
PROVIDE( Cache_Enable_Defalut_ICache_Mode = 0x4000165c );
PROVIDE( Cache_Enable_Default_ICache_Mode = 0x4000165c );
PROVIDE( ROM_Boot_Cache_Init = 0x40001668 );
PROVIDE( Cache_Invalidate_ICache_Items = 0x40001674 );
PROVIDE( Cache_Invalidate_DCache_Items = 0x40001680 );