Merge branch 'fix/update_curr_page_state_3.1' into 'release/v3.1'

nvs_util: Set previous page state to FULL before creating new page (v3.1)

See merge request idf/esp-idf!5329

.editorconfig

@@ -0,0 +1,39 @@
+# EditorConfig helps developers define and maintain consistent
+# coding styles between different editors and IDEs
+# http://editorconfig.org
+
+root = true
+
+[*]
+indent_style = space
+indent_size = 4
+end_of_line = lf
+charset = utf-8
+trim_trailing_whitespace = true
+insert_final_newline = true
+
+[{*.md,*.rst}]
+trim_trailing_whitespace = false
+
+[{Makefile,*.mk,*.bat}]
+indent_style = tab
+indent_size = 2
+
+[*/freertos/**]
+indent_style = tab
+indent_size = 4
+
+[{*/freertos/**.S,**/FreeRTOSConfig.h}]
+indent_style = space
+indent_size = 4
+
+[*.pem]
+insert_final_newline = false
+
+[*.py]
+max_line_length = 119
+
+[{*.cmake,CMakeLists.txt}]
+indent_style = space
+indent_size = 4
+max_line_length = 120

.gitignore

@@ -18,23 +18,45 @@ GPATH
 # eclipse setting
 .settings
 
+# MacOS directory files
+.DS_Store
+
 # Example project files
 examples/**/sdkconfig
 examples/**/sdkconfig.old
 examples/**/build
 
-#Doc build artifacts
-docs/_build/
-docs/doxygen-warning-log.txt
-docs/sphinx-warning-log.txt
-docs/xml/
-docs/man/
+# Doc build artifacts
+docs/*/_build/
+docs/*/doxygen-warning-log.txt
+docs/*/sphinx-warning-log.txt
+docs/*/sphinx-warning-log-sanitized.txt
+docs/*/xml/
+docs/*/xml_in/
+docs/*/man/
+docs/doxygen_sqlite3.db
 
 # Unit test app files
 tools/unit-test-app/sdkconfig
 tools/unit-test-app/sdkconfig.old
 tools/unit-test-app/build
+tools/unit-test-app/builds
+tools/unit-test-app/output
 
 # AWS IoT Examples require device-specific certs/keys
 examples/protocols/aws_iot/*/main/certs/*.pem.*
 
+# gcov coverage reports
+*.gcda
+*.gcno
+coverage.info
+coverage_report/
+
+# Windows tools installer build
+tools/windows/tool_setup/.*
+tools/windows/tool_setup/input
+tools/windows/tool_setup/dl
+tools/windows/tool_setup/Output
+
+test_multi_heap_host
+

.gitmodules

@@ -29,3 +29,15 @@
 [submodule "components/libsodium/libsodium"]
 	path = components/libsodium/libsodium
 	url = https://github.com/jedisct1/libsodium.git
+
+[submodule "components/spiffs/spiffs"]
+	path = components/spiffs/spiffs
+	url = https://github.com/pellepl/spiffs.git
+
+[submodule "components/json/cJSON"]
+	path = components/json/cJSON
+	url = https://github.com/DaveGamble/cJSON.git
+
+[submodule "components/mbedtls/mbedtls"]
+	path = components/mbedtls/mbedtls
+	url = https://github.com/espressif/mbedtls.git

.readthedocs.yml

@@ -0,0 +1,17 @@
+# .readthedocs.yml
+# Read the Docs configuration file
+# See https://docs.readthedocs.io/en/stable/config-file/v2.html for details
+
+# Required
+version: 2
+
+# Optionally build your docs in additional formats such as PDF and ePub
+formats:
+  - htmlzip
+  - pdf
+
+# Optionally set the version of Python and requirements required to build your docs
+python:
+  version: 2.7
+  install:
+    - requirements: docs/requirements.txt

Kconfig

@@ -4,6 +4,9 @@
 #
 mainmenu "Espressif IoT Development Framework Configuration"
 
+config IDF_CMAKE
+    bool
+    option env="IDF_CMAKE"
 
 menu "SDK tool configuration"
 config TOOLPREFIX
@@ -15,37 +18,166 @@ config TOOLPREFIX
 
 config PYTHON
     string "Python 2 interpreter"
+    depends on !IDF_CMAKE
     default "python"
     help
         The executable name/path that is used to run python. On some systems Python 2.x
         may need to be invoked as python2.
-endmenu
+
+        (Note: This option is used with the GNU Make build system only, not idf.py
+        or CMake-based builds.)
+
+config MAKE_WARN_UNDEFINED_VARIABLES
+    bool "'make' warns on undefined variables"
+    default "y"
+    help
+        Adds --warn-undefined-variables to MAKEFLAGS. This causes make to
+        print a warning any time an undefined variable is referenced.
+
+        This option helps find places where a variable reference is misspelled
+        or otherwise missing, but it can be unwanted if you have Makefiles which
+        depend on undefined variables expanding to an empty string.
+
+endmenu  # SDK tool configuration
 
 source "$COMPONENT_KCONFIGS_PROJBUILD"
 
-choice OPTIMIZATION_LEVEL
-    prompt "Optimization level"
+menu "Compiler options"
+
+choice OPTIMIZATION_COMPILER
+    prompt "Optimization Level"
     default OPTIMIZATION_LEVEL_DEBUG
     help
-        This option sets optimization level.
-        
-        - for "Release" setting, -Os flag is added to CFLAGS,
-         and -DNDEBUG flag is added to CPPFLAGS.
-         
+        This option sets compiler optimization level (gcc -O argument).
+
+        - for "Release" setting, -Os flag is added to CFLAGS.
         - for "Debug" setting, -Og flag is added to CFLAGS.
-        
-        To override any of these settings, set CFLAGS and/or CPPFLAGS
-        in project makefile, before including $(IDF_PATH)/make/project.mk.
-        
+
+        "Release" with -Os produces smaller & faster compiled code but it
+        may be harder to correlated code addresses to source files when debugging.
+
+        To add custom optimization settings, set CFLAGS and/or CPPFLAGS
+        in project makefile, before including $(IDF_PATH)/make/project.mk. Note that
+        custom optimization levels may be unsupported.
+
 config OPTIMIZATION_LEVEL_DEBUG
-    bool "Debug"
+    bool "Debug (-Og)"
 config OPTIMIZATION_LEVEL_RELEASE
-    bool "Release"
+    bool "Release (-Os)"
 endchoice
 
+choice OPTIMIZATION_ASSERTION_LEVEL
+    prompt "Assertion level"
+    default OPTIMIZATION_ASSERTIONS_ENABLED
+    help
+        Assertions can be:
+
+        - Enabled. Failure will print verbose assertion details. This is the default.
+
+        - Set to "silent" to save code size (failed assertions will abort() but user
+          needs to use the aborting address to find the line number with the failed assertion.)
+
+        - Disabled entirely (not recommended for most configurations.) -DNDEBUG is added
+          to CPPFLAGS in this case.
+
+config OPTIMIZATION_ASSERTIONS_ENABLED
+    prompt "Enabled"
+    bool
+    help
+        Enable assertions. Assertion content and line number will be printed on failure.
+
+config OPTIMIZATION_ASSERTIONS_SILENT
+    prompt "Silent (saves code size)"
+    bool
+    help
+        Enable silent assertions. Failed assertions will abort(), user needs to
+        use the aborting address to find the line number with the failed assertion.
+
+config OPTIMIZATION_ASSERTIONS_DISABLED
+    prompt "Disabled (sets -DNDEBUG)"
+    bool
+    help
+        If assertions are disabled, -DNDEBUG is added to CPPFLAGS.
+
+endchoice # assertions
+
+menuconfig CXX_EXCEPTIONS
+   bool "Enable C++ exceptions"
+   default n
+   help
+       Enabling this option compiles all IDF C++ files with exception support enabled.
+
+       Disabling this option disables C++ exception support in all compiled files, and any libstdc++ code which throws
+       an exception will abort instead.
+
+       Enabling this option currently adds an additional ~500 bytes of heap overhead
+       when an exception is thrown in user code for the first time.
+
+config CXX_EXCEPTIONS_EMG_POOL_SIZE
+    int "Emergency Pool Size"
+    default 0
+    depends on CXX_EXCEPTIONS
+    help
+       Size (in bytes) of the emergency memory pool for C++ exceptions. This pool will be used to allocate
+       memory for thrown exceptions when there is not enough memory on the heap.
+
+choice STACK_CHECK_MODE
+    prompt "Stack smashing protection mode"
+    default STACK_CHECK_NONE
+    help
+        Stack smashing protection mode. Emit extra code to check for buffer overflows, such as stack
+        smashing attacks. This is done by adding a guard variable to functions with vulnerable objects.
+        The guards are initialized when a function is entered and then checked when the function exits.
+        If a guard check fails, program is halted. Protection has the following modes:
+
+        - In NORMAL mode (GCC flag: -fstack-protector) only functions that call alloca,
+          and functions with buffers larger than 8 bytes are protected.
+        
+        - STRONG mode (GCC flag: -fstack-protector-strong) is like NORMAL, but includes
+          additional functions to be protected -- those that have local array definitions,
+          or have references to local frame addresses.
+        
+        - In OVERALL mode (GCC flag: -fstack-protector-all) all functions are protected.
+
+        Modes have the following impact on code performance and coverage:
+
+        - performance: NORMAL > STRONG > OVERALL
+        
+        - coverage: NORMAL < STRONG < OVERALL
+
+
+config STACK_CHECK_NONE
+    bool "None"
+config STACK_CHECK_NORM
+    bool "Normal"
+config STACK_CHECK_STRONG
+    bool "Strong"
+config STACK_CHECK_ALL
+    bool "Overall"
+endchoice
+
+config STACK_CHECK
+    bool
+    default !STACK_CHECK_NONE
+    help
+        Stack smashing protection.
+
+config WARN_WRITE_STRINGS
+    bool "Enable -Wwrite-strings warning flag"
+    default "n"
+    help
+        Adds -Wwrite-strings flag for the C/C++ compilers.
+
+        For C, this gives string constants the type ``const char[]`` so that
+        copying the address of one into a non-const ``char *`` pointer
+        produces a warning. This warning helps to find at compile time code
+        that tries to write into a string constant.
+
+        For C++, this warns about the deprecated conversion from string
+        literals to ``char *``.
+
+endmenu # Compiler Options
+
 menu "Component config"
 source "$COMPONENT_KCONFIGS"
 endmenu
-
-
-

README.md

@@ -1,25 +1,30 @@
 # Espressif IoT Development Framework
 
-[![alt text](https://readthedocs.org/projects/docs/badge/?version=latest "Documentation Status")](http://esp-idf.readthedocs.io/en/latest/?badge=latest)
+[![alt text](https://readthedocs.org/projects/docs/badge/?version=latest "Documentation Status")](https://docs.espressif.com/projects/esp-idf/en/latest/?badge=latest)
 
 ESP-IDF is the official development framework for the [ESP32](https://espressif.com/en/products/hardware/esp32/overview) chip.
 
-# Developing With the ESP-IDF
+# Developing With ESP-IDF
 
 ## Setting Up ESP-IDF
 
 See setup guides for detailed instructions to set up the ESP-IDF:
 
-* [Windows Setup Guide](http://esp-idf.readthedocs.io/en/latest/get-started/windows-setup.html)
-* [Mac OS Setup Guide](http://esp-idf.readthedocs.io/en/latest/get-started/macos-setup.html)
-* [Linux Setup Guide](http://esp-idf.readthedocs.io/en/latest/get-started/linux-setup.html)
+* [Getting Started Guide for the stable ESP-IDF version](https://docs.espressif.com/projects/esp-idf/en/stable/get-started/)
+* [Getting Started Guide for the latest (master branch) ESP-IDF version](https://docs.espressif.com/projects/esp-idf/en/latest/get-started/)
 
 ## Finding a Project
 
-As well as the [esp-idf-template](https://github.com/espressif/esp-idf-template) project mentioned in the setup guide, ESP-IDF comes with some example projects in the [examples](examples) directory.
+As well as the [esp-idf-template](https://github.com/espressif/esp-idf-template) project mentioned in Getting Started, ESP-IDF comes with some example projects in the [examples](examples) directory.
 
 Once you've found the project you want to work with, change to its directory and you can configure and build it.
 
+To start your own project based on an example, copy the example project directory outside of the ESP-IDF directory.
+
+# Quick Reference
+
+See the Getting Started guide links above for a detailed setup guide. This is a quick reference for common commands when working with ESP-IDF projects:
+
 ## Configuring the Project
 
 `make menuconfig`
@@ -36,15 +41,17 @@ Once done configuring, press Escape multiple times to exit and say "Yes" to save
 
 ## Compiling the Project
 
-`make all`
+`make -j4 all`
 
 ... will compile app, bootloader and generate a partition table based on the config.
 
+NOTE: The `-j4` option causes `make` to run 4 parallel jobs. This is much faster than the default single job. The recommended number to pass to this option is `-j(number of CPUs + 1)`.
+
 ## Flashing the Project
 
-When `make all` finishes, it will print a command line to use esptool.py to flash the chip. However you can also do this from make by running:
+When the build finishes, it will print a command line to use esptool.py to flash the chip. However you can also do this automatically by running:
 
-`make flash`
+`make -j4 flash`
 
 This will flash the entire project (app, bootloader and partition table) to a new chip. The settings for serial port flashing can be configured with `make menuconfig`.
 
@@ -52,28 +59,28 @@ You don't need to run `make all` before running `make flash`, `make flash` will
 
 ## Viewing Serial Output
 
-The `make monitor` target uses the [idf_monitor tool](http://esp-idf.readthedocs.io/en/latest/get-started/idf-monitor.html) to display serial output from the ESP32. idf_monitor also has a range of features to decode crash output and interact with the device. [Check the documentation page for details](http://esp-idf.readthedocs.io/en/latest/get-started/idf-monitor.html).
+The `make monitor` target uses the [idf_monitor tool](https://docs.espressif.com/projects/esp-idf/en/latest/get-started/idf-monitor.html) to display serial output from the ESP32. idf_monitor also has a range of features to decode crash output and interact with the device. [Check the documentation page for details](https://docs.espressif.com/projects/esp-idf/en/latest/get-started/idf-monitor.html).
 
 Exit the monitor by typing Ctrl-].
 
-To flash and monitor output in one pass, you can run:
+To build, flash and monitor output in one pass, you can run:
 
-`make flash monitor`
+`make -j4 flash monitor`
 
-## Compiling & Flashing Just the App
+## Compiling & Flashing Only the App
 
 After the initial flash, you may just want to build and flash just your app, not the bootloader and partition table:
 
 * `make app` - build just the app.
 * `make app-flash` - flash just the app.
 
-`make app-flash` will automatically rebuild the app if it needs it.
+`make app-flash` will automatically rebuild the app if any source files have changed.
 
 (In normal development there's no downside to reflashing the bootloader and partition table each time, if they haven't changed.)
 
 ## Parallel Builds
 
-ESP-IDF supports compiling multiple files in parallel, so all of the above commands can be run as `make -jN` where `N` is the number of parallel make processes to run (generally N should be equal to or one more than the number of CPU cores in your system.)
+ESP-IDF supports compiling multiple files in parallel, so all of the above commands can be run as `make -jN` where `N` is the number of parallel make processes to run (generally N should be equal to the number of CPU cores in your system, plus one.)
 
 Multiple make functions can be combined into one. For example: to build the app & bootloader using 5 jobs in parallel, then flash everything, and then display serial output from the ESP32 run:
 
@@ -81,6 +88,7 @@ Multiple make functions can be combined into one. For example: to build the app
 make -j5 flash monitor
 ```
 
+
 ## The Partition Table
 
 Once you've compiled your project, the "build" directory will contain a binary file with a name like "my_app.bin". This is an ESP32 image binary that can be loaded by the bootloader.
@@ -96,7 +104,7 @@ The simplest way to use the partition table is to `make menuconfig` and choose o
 
 In both cases the factory app is flashed at offset 0x10000. If you `make partition_table` then it will print a summary of the partition table.
 
-For more details about partition tables and how to create custom variations, view the `docs/partition-tables.rst` file.
+For more details about partition tables and how to create custom variations, view the [`docs/en/api-guides/partition-tables.rst`](docs/en/api-guides/partition-tables.rst) file.
 
 ## Erasing Flash
 
@@ -106,11 +114,12 @@ This can be combined with other targets, ie `make erase_flash flash` will erase
 
 # Resources
 
-* Documentation for the latest version: http://esp-idf.readthedocs.io/. This documentation is built from the [docs directory](docs) of this repository.
+* Documentation for the latest version: https://docs.espressif.com/projects/esp-idf/. This documentation is built from the [docs directory](docs) of this repository.
 
-* The [esp32.com forum](http://esp32.com/) is a place to ask questions and find community resources.
+* The [esp32.com forum](https://esp32.com/) is a place to ask questions and find community resources.
 
 * [Check the Issues section on github](https://github.com/espressif/esp-idf/issues) if you find a bug or have a feature request. Please check existing Issues before opening a new one.
 
-* If you're interested in contributing to ESP-IDF, please check the [Contributions Guide](http://esp-idf.readthedocs.io/en/latest/contribute/index.html).
+* If you're interested in contributing to ESP-IDF, please check the [Contributions Guide](https://docs.espressif.com/projects/esp-idf/en/latest/contribute/index.html).
+
 

components/app_trace/CMakeLists.txt

@@ -0,0 +1,28 @@
+set(COMPONENT_SRCS "app_trace.c"
+                   "app_trace_util.c"
+                   "host_file_io.c"
+                   "gcov/gcov_rtio.c")
+set(COMPONENT_ADD_INCLUDEDIRS "include")
+
+if(CONFIG_SYSVIEW_ENABLE)
+    list(APPEND COMPONENT_ADD_INCLUDEDIRS
+        sys_view/Config
+        sys_view/SEGGER
+        sys_view/Sample/OS)
+
+    list(APPEND COMPONENT_SRCS "sys_view/SEGGER/SEGGER_SYSVIEW.c"
+                   "sys_view/Sample/Config/SEGGER_SYSVIEW_Config_FreeRTOS.c"
+                   "sys_view/Sample/OS/SEGGER_SYSVIEW_FreeRTOS.c"
+                   "sys_view/esp32/SEGGER_RTT_esp32.c")
+endif()
+
+set(COMPONENT_REQUIRES)
+set(COMPONENT_PRIV_REQUIRES xtensa-debug-module)
+
+register_component()
+
+# disable --coverage for this component, as it is used as transport
+# for gcov
+component_compile_options("-fno-profile-arcs" "-fno-test-coverage")
+
+target_link_libraries(app_trace gcov)

components/app_trace/Kconfig

@@ -0,0 +1,202 @@
+menu "Application Level Tracing"
+
+choice ESP32_APPTRACE_DESTINATION
+    prompt "Data Destination"
+    default ESP32_APPTRACE_DEST_NONE
+    help
+        Select destination for application trace: trace memory or none (to disable).
+
+config ESP32_APPTRACE_DEST_TRAX
+    bool "Trace memory"
+    select ESP32_APPTRACE_ENABLE
+config ESP32_APPTRACE_DEST_NONE
+    bool "None"
+endchoice
+
+config ESP32_APPTRACE_ENABLE
+    bool
+    depends on !ESP32_TRAX
+    select MEMMAP_TRACEMEM
+    select MEMMAP_TRACEMEM_TWOBANKS
+    default n
+    help
+        Enables/disable application tracing module.
+
+config ESP32_APPTRACE_LOCK_ENABLE
+    bool
+    default !SYSVIEW_ENABLE
+    help
+        Enables/disable application tracing module internal sync lock.
+
+config ESP32_APPTRACE_ONPANIC_HOST_FLUSH_TMO
+    int "Timeout for flushing last trace data to host on panic"
+    depends on ESP32_APPTRACE_ENABLE
+    range -1 5000
+    default -1
+    help
+        Timeout for flushing last trace data to host in case of panic. In ms.
+        Use -1 to disable timeout and wait forever.
+
+config ESP32_APPTRACE_POSTMORTEM_FLUSH_TRAX_THRESH
+    int "Threshold for flushing last trace data to host on panic"
+    depends on ESP32_APPTRACE_DEST_TRAX
+    range 0 16384
+    default 0
+    help
+        Threshold for flushing last trace data to host on panic in post-mortem mode.
+        This is minimal amount of data needed to perform flush. In bytes.
+
+config ESP32_APPTRACE_PENDING_DATA_SIZE_MAX
+    int "Size of the pending data buffer"
+    depends on ESP32_APPTRACE_DEST_TRAX
+    default 0
+    help
+        Size of the buffer for events in bytes. It is useful for buffering events from
+        the time critical code (scheduler, ISRs etc). If this parameter is 0 then
+        events will be discarded when main HW buffer is full.
+
+menu "FreeRTOS SystemView Tracing"
+    depends on ESP32_APPTRACE_ENABLE
+config SYSVIEW_ENABLE
+    bool "SystemView Tracing Enable"
+    depends on ESP32_APPTRACE_ENABLE
+    default n
+    help
+        Enables supporrt for SEGGER SystemView tracing functionality.
+
+choice SYSVIEW_TS_SOURCE
+    prompt "Timer to use as timestamp source"
+    depends on SYSVIEW_ENABLE
+    default SYSVIEW_TS_SOURCE_CCOUNT if FREERTOS_UNICORE && !PM_ENABLE
+    default SYSVIEW_TS_SOURCE_TIMER_00 if !FREERTOS_UNICORE && !PM_ENABLE
+    default SYSVIEW_TS_SOURCE_ESP_TIMER if PM_ENABLE
+    help
+        SystemView needs to use a hardware timer as the source of timestamps
+        when tracing. This option selects the timer for it.
+
+config SYSVIEW_TS_SOURCE_CCOUNT
+	bool "CPU cycle counter (CCOUNT)"
+	depends on FREERTOS_UNICORE && !PM_ENABLE
+
+config SYSVIEW_TS_SOURCE_TIMER_00
+    bool "Timer 0, Group 0"
+    depends on !PM_ENABLE
+
+config SYSVIEW_TS_SOURCE_TIMER_01
+    bool "Timer 1, Group 0"
+    depends on !PM_ENABLE
+
+config SYSVIEW_TS_SOURCE_TIMER_10
+    bool "Timer 0, Group 1"
+    depends on !PM_ENABLE
+
+config SYSVIEW_TS_SOURCE_TIMER_11
+    bool "Timer 1, Group 1"
+    depends on !PM_ENABLE
+
+config SYSVIEW_TS_SOURCE_ESP_TIMER
+	bool "esp_timer high resolution timer"
+
+endchoice
+
+config SYSVIEW_EVT_OVERFLOW_ENABLE
+    bool "Trace Buffer Overflow Event"
+    depends on SYSVIEW_ENABLE
+    default y
+    help
+        Enables "Trace Buffer Overflow" event.
+
+config SYSVIEW_EVT_ISR_ENTER_ENABLE
+    bool "ISR Enter Event"
+    depends on SYSVIEW_ENABLE
+    default y
+    help
+        Enables "ISR Enter" event.
+
+config SYSVIEW_EVT_ISR_EXIT_ENABLE
+    bool "ISR Exit Event"
+    depends on SYSVIEW_ENABLE
+    default y
+    help
+        Enables "ISR Exit" event.
+
+config SYSVIEW_EVT_ISR_TO_SCHEDULER_ENABLE
+    bool "ISR Exit to Scheduler Event"
+    depends on SYSVIEW_ENABLE
+    default y
+    help
+        Enables "ISR to Scheduler" event.
+
+config SYSVIEW_EVT_TASK_START_EXEC_ENABLE
+    bool "Task Start Execution Event"
+    depends on SYSVIEW_ENABLE
+    default y
+    help
+        Enables "Task Start Execution" event.
+
+config SYSVIEW_EVT_TASK_STOP_EXEC_ENABLE
+    bool "Task Stop Execution Event"
+    depends on SYSVIEW_ENABLE
+    default y
+    help
+        Enables "Task Stop Execution" event.
+
+config SYSVIEW_EVT_TASK_START_READY_ENABLE
+    bool "Task Start Ready State Event"
+    depends on SYSVIEW_ENABLE
+    default y
+    help
+        Enables "Task Start Ready State" event.
+
+config SYSVIEW_EVT_TASK_STOP_READY_ENABLE
+    bool "Task Stop Ready State Event"
+    depends on SYSVIEW_ENABLE
+    default y
+    help
+        Enables "Task Stop Ready State" event.
+
+config SYSVIEW_EVT_TASK_CREATE_ENABLE
+    bool "Task Create Event"
+    depends on SYSVIEW_ENABLE
+    default y
+    help
+        Enables "Task Create" event.
+
+config SYSVIEW_EVT_TASK_TERMINATE_ENABLE
+    bool "Task Terminate Event"
+    depends on SYSVIEW_ENABLE
+    default y
+    help
+        Enables "Task Terminate" event.
+
+config SYSVIEW_EVT_IDLE_ENABLE
+    bool "System Idle Event"
+    depends on SYSVIEW_ENABLE
+    default y
+    help
+        Enables "System Idle" event.
+
+config SYSVIEW_EVT_TIMER_ENTER_ENABLE
+    bool "Timer Enter Event"
+    depends on SYSVIEW_ENABLE
+    default y
+    help
+        Enables "Timer Enter" event.
+
+config SYSVIEW_EVT_TIMER_EXIT_ENABLE
+    bool "Timer Exit Event"
+    depends on SYSVIEW_ENABLE
+    default y
+    help
+        Enables "Timer Exit" event.
+
+endmenu
+
+config ESP32_GCOV_ENABLE
+    bool "GCOV to Host Enable"
+    depends on ESP32_DEBUG_STUBS_ENABLE && ESP32_APPTRACE_ENABLE && !SYSVIEW_ENABLE
+    default y
+    help
+        Enables support for GCOV data transfer to host.
+
+endmenu

components/app_trace/app_trace_util.c

@@ -0,0 +1,191 @@
+// Copyright 2017 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+#include "freertos/FreeRTOS.h"
+#include "freertos/task.h"
+#include "esp_app_trace_util.h"
+#include "esp_clk.h"
+
+///////////////////////////////////////////////////////////////////////////////
+///////////////////////////////// TIMEOUT /////////////////////////////////////
+///////////////////////////////////////////////////////////////////////////////
+
+#define ESP_APPTRACE_CPUTICKS2US(_t_, _cpu_freq_)       ((_t_)/(_cpu_freq_/1000000))
+#define ESP_APPTRACE_US2CPUTICKS(_t_, _cpu_freq_)       ((_t_)*(_cpu_freq_/1000000))
+
+esp_err_t esp_apptrace_tmo_check(esp_apptrace_tmo_t *tmo)
+{
+    int cpu_freq = esp_clk_cpu_freq();
+    if (tmo->tmo != ESP_APPTRACE_TMO_INFINITE) {
+        unsigned cur = portGET_RUN_TIME_COUNTER_VALUE();
+        if (tmo->start <= cur) {
+            tmo->elapsed = ESP_APPTRACE_CPUTICKS2US(cur - tmo->start, cpu_freq);
+        } else {
+            tmo->elapsed = ESP_APPTRACE_CPUTICKS2US(0xFFFFFFFF - tmo->start + cur, cpu_freq);
+        }
+        if (tmo->elapsed >= tmo->tmo) {
+            return ESP_ERR_TIMEOUT;
+        }
+    }
+    return ESP_OK;
+}
+
+///////////////////////////////////////////////////////////////////////////////
+///////////////////////////////// LOCK ////////////////////////////////////////
+///////////////////////////////////////////////////////////////////////////////
+
+esp_err_t esp_apptrace_lock_take(esp_apptrace_lock_t *lock, esp_apptrace_tmo_t *tmo)
+{
+    int res;
+
+    while (1) {
+        // do not overwrite lock->int_state before we actually acquired the mux
+        unsigned int_state = portENTER_CRITICAL_NESTED();
+        // FIXME: if mux is busy it is not good idea to loop during the whole tmo with disabled IRQs.
+        // So we check mux state using zero tmo, restore IRQs and let others tasks/IRQs to run on this CPU
+        // while we are doing our own tmo check.
+#ifdef CONFIG_FREERTOS_PORTMUX_DEBUG
+        bool success = vPortCPUAcquireMutexTimeout(&lock->mux, 0, __FUNCTION__, __LINE__);
+#else
+        bool success = vPortCPUAcquireMutexTimeout(&lock->mux, 0);
+#endif
+        if (success) {
+            lock->int_state = int_state;
+            return ESP_OK;
+        }
+        portEXIT_CRITICAL_NESTED(int_state);
+        // we can be preempted from this place till the next call (above) to portENTER_CRITICAL_NESTED()
+        res = esp_apptrace_tmo_check(tmo);
+        if (res != ESP_OK) {
+            break;
+        }
+    }
+    return res;
+}
+
+esp_err_t esp_apptrace_lock_give(esp_apptrace_lock_t *lock)
+{
+    // save lock's irq state value for this CPU
+    unsigned int_state = lock->int_state;
+    // after call to the following func we can not be sure that lock->int_state
+    // is not overwritten by other CPU who has acquired the mux just after we released it. See esp_apptrace_lock_take().
+#ifdef CONFIG_FREERTOS_PORTMUX_DEBUG
+    vPortCPUReleaseMutex(&lock->mux, __FUNCTION__, __LINE__);
+#else
+    vPortCPUReleaseMutex(&lock->mux);
+#endif
+    portEXIT_CRITICAL_NESTED(int_state);
+    return ESP_OK;
+}
+
+///////////////////////////////////////////////////////////////////////////////
+////////////////////////////// RING BUFFER ////////////////////////////////////
+///////////////////////////////////////////////////////////////////////////////
+
+uint8_t *esp_apptrace_rb_produce(esp_apptrace_rb_t *rb, uint32_t size)
+{
+    uint8_t *ptr = rb->data + rb->wr;
+    // check for avalable space
+    if (rb->rd <= rb->wr) {
+        // |?R......W??|
+        if (rb->wr + size >= rb->size) {
+            if (rb->rd == 0) {
+                return NULL; // cannot wrap wr
+            }
+            if (rb->wr + size == rb->size) {
+                rb->wr = 0;
+            } else {
+                // check if we can wrap wr earlier to get space for requested size
+                if (size > rb->rd - 1) {
+                    return NULL; // cannot wrap wr
+                }
+                // shrink buffer a bit, full size will be restored at rd wrapping
+                rb->cur_size = rb->wr;
+                rb->wr = 0;
+                ptr = rb->data;
+                if (rb->rd == rb->cur_size) {
+                    rb->rd = 0;
+                    if (rb->cur_size < rb->size) {
+                        rb->cur_size = rb->size;
+                    }
+                }
+                rb->wr += size;
+            }
+        } else {
+            rb->wr += size;
+        }
+    } else {
+        // |?W......R??|
+        if (size > rb->rd - rb->wr - 1) {
+            return NULL;
+        }
+        rb->wr += size;
+    }
+    return ptr;
+}
+
+uint8_t *esp_apptrace_rb_consume(esp_apptrace_rb_t *rb, uint32_t size)
+{
+    uint8_t *ptr = rb->data + rb->rd;
+    if (rb->rd <= rb->wr) {
+        // |?R......W??|
+        if (rb->rd + size > rb->wr) {
+            return NULL;
+        }
+        rb->rd += size;
+    } else {
+        // |?W......R??|
+        if (rb->rd + size > rb->cur_size) {
+            return NULL;
+        } else if (rb->rd + size == rb->cur_size) {
+            // restore full size usage
+            if (rb->cur_size < rb->size) {
+                rb->cur_size = rb->size;
+            }
+            rb->rd = 0;
+        } else {
+            rb->rd += size;
+        }
+    }
+    return ptr;
+}
+
+uint32_t esp_apptrace_rb_read_size_get(esp_apptrace_rb_t *rb)
+{
+    uint32_t size = 0;
+    if (rb->rd <= rb->wr) {
+        // |?R......W??|
+        size = rb->wr - rb->rd;
+    } else {
+        // |?W......R??|
+        size = rb->cur_size - rb->rd;
+    }
+    return size;
+}
+
+uint32_t esp_apptrace_rb_write_size_get(esp_apptrace_rb_t *rb)
+{
+    uint32_t size = 0;
+    if (rb->rd <= rb->wr) {
+        // |?R......W??|
+        size = rb->size - rb->wr;
+        if (size && rb->rd == 0) {
+            size--;
+        }
+    } else {
+        // |?W......R??|
+        size = rb->rd - rb->wr - 1;
+    }
+    return size;
+}

components/app_trace/component.mk

@@ -0,0 +1,29 @@
+#
+# Component Makefile
+#
+
+COMPONENT_SRCDIRS := .
+
+COMPONENT_ADD_INCLUDEDIRS = include
+
+COMPONENT_ADD_LDFLAGS = -lapp_trace
+
+# do not produce gcov info for this module, it is used as transport for gcov
+CFLAGS := $(subst --coverage,,$(CFLAGS))
+
+ifdef CONFIG_SYSVIEW_ENABLE
+
+COMPONENT_ADD_INCLUDEDIRS += \
+	sys_view/Config \
+	sys_view/SEGGER \
+	sys_view/Sample/OS
+
+COMPONENT_SRCDIRS += \
+	gcov \
+	sys_view/SEGGER \
+	sys_view/Sample/OS \
+	sys_view/Sample/Config \
+	sys_view/esp32
+else
+COMPONENT_SRCDIRS += gcov
+endif

components/app_trace/gcov/gcov_rtio.c

@@ -0,0 +1,178 @@
+// Copyright 2017 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+// This module implements runtime file I/O API for GCOV.
+
+#include "esp_task_wdt.h"
+#include "freertos/FreeRTOS.h"
+#include "freertos/task.h"
+#include "soc/cpu.h"
+#include "soc/timer_group_struct.h"
+#include "soc/timer_group_reg.h"
+#include "esp_app_trace.h"
+#include "esp_dbg_stubs.h"
+
+#if CONFIG_ESP32_GCOV_ENABLE
+
+#define ESP_GCOV_DOWN_BUF_SIZE  4200
+
+#define LOG_LOCAL_LEVEL CONFIG_LOG_DEFAULT_LEVEL
+#include "esp_log.h"
+const static char *TAG = "esp_gcov_rtio";
+
+static void (*s_gcov_exit)(void);
+
+/* TODO: remove code extracted from GCC when IDF toolchain will be updated */
+/*=============== GCC CODE START ====================*/
+/* Root of a program/shared-object state */
+struct gcov_root
+{
+  void *list;
+  unsigned dumped : 1;  /* counts have been dumped.  */
+  unsigned run_counted : 1;  /* run has been accounted for.  */
+  struct gcov_root *next;
+  struct gcov_root *prev;
+};
+
+/* Per-dynamic-object gcov state.  */
+extern struct gcov_root __gcov_root;
+
+static void esp_gcov_reset_status(void)
+{
+  __gcov_root.dumped = 0;
+  __gcov_root.run_counted = 0;
+}
+/*=============== GCC CODE END ====================*/
+
+static int esp_dbg_stub_gcov_dump_do(void)
+{
+    int ret = ESP_OK;
+
+    ESP_EARLY_LOGV(TAG, "Check for dump handler %p", s_gcov_exit);
+    if (s_gcov_exit) {
+        ESP_EARLY_LOGV(TAG, "Alloc apptrace down buf %d bytes", ESP_GCOV_DOWN_BUF_SIZE);
+        void *down_buf = malloc(ESP_GCOV_DOWN_BUF_SIZE);
+        if (down_buf == NULL) {
+            ESP_EARLY_LOGE(TAG, "Failed to send files transfer stop cmd (%d)!", ret);
+            return ESP_ERR_NO_MEM;
+        }
+        ESP_EARLY_LOGV(TAG, "Config apptrace down buf");
+        esp_apptrace_down_buffer_config(down_buf, ESP_GCOV_DOWN_BUF_SIZE);
+        ESP_EARLY_LOGV(TAG, "Dump data... %p", s_gcov_exit);
+        s_gcov_exit();
+        ESP_EARLY_LOGV(TAG, "Free apptrace down buf");
+        free(down_buf);
+    }
+    ESP_EARLY_LOGV(TAG, "Finish file transfer session");
+    ret = esp_apptrace_fstop(ESP_APPTRACE_DEST_TRAX);
+    if (ret != ESP_OK) {
+        ESP_EARLY_LOGE(TAG, "Failed to send files transfer stop cmd (%d)!", ret);
+    }
+    return ret;
+}
+
+/**
+ * @brief Triggers gcov info dump.
+ *        This function is to be called by OpenOCD, not by normal user code.
+ * TODO: what about interrupted flash access (when cache disabled)???
+ *
+ * @return ESP_OK on success, otherwise see esp_err_t
+ */
+static int esp_dbg_stub_gcov_entry(void)
+{
+    int ret = ESP_OK;
+
+    // disable IRQs on this CPU, other CPU is halted by OpenOCD
+    unsigned irq_state = portENTER_CRITICAL_NESTED();
+    ret = esp_dbg_stub_gcov_dump_do();
+    // reset dump status to allow incremental data accumulation
+    esp_gcov_reset_status();
+    portEXIT_CRITICAL_NESTED(irq_state);
+    return ret;
+}
+
+void esp_gcov_dump()
+{
+#if CONFIG_FREERTOS_UNICORE == 0
+    int other_core = xPortGetCoreID() ? 0 : 1;
+    esp_cpu_stall(other_core);
+#endif
+
+    while (!esp_apptrace_host_is_connected(ESP_APPTRACE_DEST_TRAX)) {
+        // to avoid complains that task watchdog got triggered for other tasks
+        TIMERG0.wdt_wprotect=TIMG_WDT_WKEY_VALUE;
+        TIMERG0.wdt_feed=1;
+        TIMERG0.wdt_wprotect=0;
+        // to avoid reboot on INT_WDT
+        TIMERG1.wdt_wprotect=TIMG_WDT_WKEY_VALUE;
+        TIMERG1.wdt_feed=1;
+        TIMERG1.wdt_wprotect=0;
+    }
+
+    esp_dbg_stub_gcov_dump_do();
+    // reset dump status to allow incremental data accumulation
+    esp_gcov_reset_status();
+#if CONFIG_FREERTOS_UNICORE == 0
+    esp_cpu_unstall(other_core);
+#endif
+}
+
+int gcov_rtio_atexit(void (*function)(void))
+{
+    ESP_EARLY_LOGV(TAG, "%s %p", __FUNCTION__, function);
+    s_gcov_exit = function;
+    esp_dbg_stub_entry_set(ESP_DBG_STUB_ENTRY_GCOV, (uint32_t)&esp_dbg_stub_gcov_entry);
+    return 0;
+}
+
+void *gcov_rtio_fopen(const char *path, const char *mode)
+{
+    ESP_EARLY_LOGV(TAG, "%s", __FUNCTION__);
+    return esp_apptrace_fopen(ESP_APPTRACE_DEST_TRAX, path, mode);
+}
+
+int gcov_rtio_fclose(void *stream)
+{
+    ESP_EARLY_LOGV(TAG, "%s", __FUNCTION__);
+    return esp_apptrace_fclose(ESP_APPTRACE_DEST_TRAX, stream);
+}
+
+size_t gcov_rtio_fread(void *ptr, size_t size, size_t nmemb, void *stream)
+{
+    ESP_EARLY_LOGV(TAG, "%s", __FUNCTION__);
+    return esp_apptrace_fread(ESP_APPTRACE_DEST_TRAX, ptr, size, nmemb, stream);
+}
+
+size_t gcov_rtio_fwrite(const void *ptr, size_t size, size_t nmemb, void *stream)
+{
+    ESP_EARLY_LOGV(TAG, "%s", __FUNCTION__);
+    return esp_apptrace_fwrite(ESP_APPTRACE_DEST_TRAX, ptr, size, nmemb, stream);
+}
+
+int gcov_rtio_fseek(void *stream, long offset, int whence)
+{
+    ESP_EARLY_LOGV(TAG, "%s", __FUNCTION__);
+    int ret = esp_apptrace_fseek(ESP_APPTRACE_DEST_TRAX, stream, offset, whence);
+    ESP_EARLY_LOGV(TAG, "%s EXIT", __FUNCTION__);
+    return ret;
+}
+
+long gcov_rtio_ftell(void *stream)
+{
+    ESP_EARLY_LOGV(TAG, "%s", __FUNCTION__);
+    long ret = esp_apptrace_ftell(ESP_APPTRACE_DEST_TRAX, stream);
+    ESP_EARLY_LOGV(TAG, "%s", __FUNCTION__);
+    return ret;
+}
+#endif

components/app_trace/host_file_io.c

@@ -0,0 +1,351 @@
+// Copyright 2017 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+// Hot It Works
+// ************
+//
+// This module implements host file I/O protocol on top of apptrace module.
+// The protocol is enough simple. It sends command with arguments to the host and receives response from it.
+// Responses contains return values of respective file I/O API. This value is returned to the caller.
+// Commands has the following format:
+//   * Header. See esp_apptrace_fcmd_hdr_t.
+//   * Operation arguments. See file operation helper structures below.
+
+#include <string.h>
+#include "esp_app_trace.h"
+
+#if CONFIG_ESP32_APPTRACE_ENABLE
+
+#define LOG_LOCAL_LEVEL CONFIG_LOG_DEFAULT_LEVEL
+#include "esp_log.h"
+const static char *TAG = "esp_host_file_io";
+
+#define ESP_APPTRACE_FILE_CMD_FOPEN     0x0
+#define ESP_APPTRACE_FILE_CMD_FCLOSE    0x1
+#define ESP_APPTRACE_FILE_CMD_FWRITE    0x2
+#define ESP_APPTRACE_FILE_CMD_FREAD     0x3
+#define ESP_APPTRACE_FILE_CMD_FSEEK     0x4
+#define ESP_APPTRACE_FILE_CMD_FTELL     0x5
+#define ESP_APPTRACE_FILE_CMD_STOP      0x6 // indicates that there is no files to transfer
+
+/** File operation header */
+typedef struct {
+    uint8_t   cmd; ///< Command ID
+} esp_apptrace_fcmd_hdr_t;
+
+/** Helper structure for fopen */
+typedef struct {
+    const char *path;
+    uint16_t path_len;
+    const char *mode;
+    uint16_t mode_len;
+} esp_apptrace_fopen_args_t;
+
+/** Helper structure for fclose */
+typedef struct {
+    void *file;
+} esp_apptrace_fclose_args_t;
+
+/** Helper structure for fwrite */
+typedef struct {
+    void *  buf;
+    size_t  size;
+    void *  file;
+} esp_apptrace_fwrite_args_t;
+
+/** Helper structure for fread */
+typedef struct {
+    size_t  size;
+    void *  file;
+} esp_apptrace_fread_args_t;
+
+/** Helper structure for fseek */
+typedef struct {
+    long    offset;
+    int     whence;
+    void *  file;
+} esp_apptrace_fseek_args_t;
+
+/** Helper structure for ftell */
+typedef struct {
+    void *file;
+} esp_apptrace_ftell_args_t;
+
+static esp_err_t esp_apptrace_file_cmd_send(esp_apptrace_dest_t dest, uint8_t cmd, void (*prep_args)(uint8_t *, void *), void *args, uint32_t args_len)
+{
+    esp_err_t ret;
+    esp_apptrace_fcmd_hdr_t *hdr;
+
+    ESP_EARLY_LOGV(TAG, "%s %d", __func__, cmd);
+    uint8_t *ptr = esp_apptrace_buffer_get(dest, sizeof(*hdr) + args_len, ESP_APPTRACE_TMO_INFINITE); //TODO: finite tmo
+    if (ptr == NULL) {
+        return ESP_ERR_NO_MEM;
+    }
+
+    hdr = (esp_apptrace_fcmd_hdr_t *)ptr;
+    hdr->cmd = cmd;
+    if (prep_args) {
+        prep_args(ptr + sizeof(hdr->cmd), args);
+    }
+
+    // now indicate that this buffer is ready to be sent off to host
+    ret = esp_apptrace_buffer_put(dest, ptr, ESP_APPTRACE_TMO_INFINITE);//TODO: finite tmo
+    if (ret != ESP_OK) {
+        ESP_EARLY_LOGE(TAG, "Failed to put apptrace buffer (%d)!", ret);
+        return ret;
+    }
+
+    ret = esp_apptrace_flush(dest, ESP_APPTRACE_TMO_INFINITE);//TODO: finite tmo
+    if (ret != ESP_OK) {
+        ESP_EARLY_LOGE(TAG, "Failed to flush apptrace buffer (%d)!", ret);
+        return ret;
+    }
+
+    return ESP_OK;
+}
+
+static esp_err_t esp_apptrace_file_rsp_recv(esp_apptrace_dest_t dest, uint8_t *buf, uint32_t buf_len)
+{
+    uint32_t tot_rd = 0;
+    while (tot_rd < buf_len) {
+        uint32_t rd_size = buf_len - tot_rd;
+        esp_err_t ret = esp_apptrace_read(dest, buf + tot_rd, &rd_size, ESP_APPTRACE_TMO_INFINITE); //TODO: finite tmo
+        if (ret != ESP_OK) {
+            ESP_EARLY_LOGE(TAG, "Failed to read (%d)!", ret);
+            return ret;
+        }
+        ESP_EARLY_LOGV(TAG, "%s read %d bytes", __FUNCTION__, rd_size);
+        tot_rd += rd_size;
+    }
+
+    return ESP_OK;
+}
+
+static void esp_apptrace_fopen_args_prepare(uint8_t *buf, void *priv)
+{
+    esp_apptrace_fopen_args_t *args = priv;
+
+    memcpy(buf, args->path, args->path_len);
+    memcpy(buf + args->path_len, args->mode, args->mode_len);
+}
+
+void *esp_apptrace_fopen(esp_apptrace_dest_t dest, const char *path, const char *mode)
+{
+    esp_apptrace_fopen_args_t cmd_args;
+
+    ESP_EARLY_LOGV(TAG, "esp_apptrace_fopen '%s' '%s'", path, mode);
+
+    cmd_args.path = path;
+    cmd_args.path_len = strlen(path) + 1;
+    cmd_args.mode = mode;
+    cmd_args.mode_len = strlen(mode) + 1;
+
+    esp_err_t ret = esp_apptrace_file_cmd_send(dest, ESP_APPTRACE_FILE_CMD_FOPEN, esp_apptrace_fopen_args_prepare,
+                        &cmd_args, cmd_args.path_len+cmd_args.mode_len);
+    if (ret != ESP_OK) {
+        ESP_EARLY_LOGE(TAG, "Failed to send file cmd (%d)!", ret);
+        return NULL;
+    }
+
+    // now read the answer
+    void *resp;
+    ret = esp_apptrace_file_rsp_recv(dest, (uint8_t *)&resp, sizeof(resp));
+    if (ret != ESP_OK) {
+        ESP_EARLY_LOGE(TAG, "Failed to read response (%d)!", ret);
+        return NULL;
+    }
+
+    return resp;
+}
+
+static void esp_apptrace_fclose_args_prepare(uint8_t *buf, void *priv)
+{
+    esp_apptrace_fclose_args_t *args = priv;
+
+    memcpy(buf, &args->file, sizeof(args->file));
+}
+
+int esp_apptrace_fclose(esp_apptrace_dest_t dest, void *stream)
+{
+    esp_apptrace_fclose_args_t cmd_args;
+
+    cmd_args.file = stream;
+    esp_err_t ret = esp_apptrace_file_cmd_send(dest, ESP_APPTRACE_FILE_CMD_FCLOSE, esp_apptrace_fclose_args_prepare,
+                        &cmd_args, sizeof(cmd_args));
+    if (ret != ESP_OK) {
+        ESP_EARLY_LOGE(TAG, "Failed to send file cmd (%d)!", ret);
+        return EOF;
+    }
+
+    // now read the answer
+    int resp;
+    ret = esp_apptrace_file_rsp_recv(dest, (uint8_t *)&resp, sizeof(resp));
+    if (ret != ESP_OK) {
+        ESP_EARLY_LOGE(TAG, "Failed to read response (%d)!", ret);
+        return EOF;
+    }
+
+    return resp;
+}
+
+static void esp_apptrace_fwrite_args_prepare(uint8_t *buf, void *priv)
+{
+    esp_apptrace_fwrite_args_t *args = priv;
+
+    memcpy(buf, &args->file, sizeof(args->file));
+    memcpy(buf + sizeof(args->file), args->buf, args->size);
+}
+
+size_t esp_apptrace_fwrite(esp_apptrace_dest_t dest, const void *ptr, size_t size, size_t nmemb, void *stream)
+{
+    esp_apptrace_fwrite_args_t cmd_args;
+
+    ESP_EARLY_LOGV(TAG, "esp_apptrace_fwrite f %p l %d", stream, size*nmemb);
+
+    cmd_args.buf = (void *)ptr;
+    cmd_args.size = size * nmemb;
+    cmd_args.file = stream;
+    esp_err_t ret = esp_apptrace_file_cmd_send(dest, ESP_APPTRACE_FILE_CMD_FWRITE, esp_apptrace_fwrite_args_prepare,
+                        &cmd_args, sizeof(cmd_args.file)+cmd_args.size);
+    if (ret != ESP_OK) {
+        ESP_EARLY_LOGE(TAG, "Failed to send file cmd (%d)!", ret);
+        return 0;
+    }
+
+    // now read the answer
+    size_t resp;
+    ret = esp_apptrace_file_rsp_recv(dest, (uint8_t *)&resp, sizeof(resp));
+    if (ret != ESP_OK) {
+        ESP_EARLY_LOGE(TAG, "Failed to read response (%d)!", ret);
+        return 0;
+    }
+
+    return resp;
+}
+
+static void esp_apptrace_fread_args_prepare(uint8_t *buf, void *priv)
+{
+    esp_apptrace_fread_args_t *args = priv;
+
+    memcpy(buf, &args->file, sizeof(args->file));
+    memcpy(buf + sizeof(args->file), &args->size, sizeof(args->size));
+}
+
+size_t esp_apptrace_fread(esp_apptrace_dest_t dest, void *ptr, size_t size, size_t nmemb, void *stream)
+{
+    esp_apptrace_fread_args_t cmd_args;
+
+    ESP_EARLY_LOGV(TAG, "esp_apptrace_fread f %p l %d", stream, size*nmemb);
+
+    cmd_args.size = size * nmemb;
+    cmd_args.file = stream;
+    esp_err_t ret = esp_apptrace_file_cmd_send(dest, ESP_APPTRACE_FILE_CMD_FREAD, esp_apptrace_fread_args_prepare,
+                        &cmd_args, sizeof(cmd_args));
+    if (ret != ESP_OK) {
+        ESP_EARLY_LOGE(TAG, "Failed to send file cmd (%d)!", ret);
+        return 0;
+    }
+
+    // now read the answer
+    size_t resp;
+    ret = esp_apptrace_file_rsp_recv(dest, (uint8_t *)&resp, sizeof(resp));
+    if (ret != ESP_OK) {
+        ESP_EARLY_LOGE(TAG, "Failed to read response (%d)!", ret);
+        return 0;
+    }
+    if (resp > 0) {
+        ret = esp_apptrace_file_rsp_recv(dest, ptr, resp);
+        if (ret != ESP_OK) {
+            ESP_EARLY_LOGE(TAG, "Failed to read file data (%d)!", ret);
+            return 0;
+        }
+    }
+    return resp;
+}
+
+static void esp_apptrace_fseek_args_prepare(uint8_t *buf, void *priv)
+{
+    esp_apptrace_fseek_args_t *args = priv;
+
+    memcpy(buf, &args->file, sizeof(args->file));
+}
+
+int esp_apptrace_fseek(esp_apptrace_dest_t dest, void *stream, long offset, int whence)
+{
+    esp_apptrace_fseek_args_t cmd_args;
+
+    ESP_EARLY_LOGV(TAG, "esp_apptrace_fseek f %p o 0x%lx w %d", stream, offset, whence);
+
+    cmd_args.file = stream;
+    cmd_args.offset = offset;
+    cmd_args.whence = whence;
+    esp_err_t ret = esp_apptrace_file_cmd_send(dest, ESP_APPTRACE_FILE_CMD_FSEEK, esp_apptrace_fseek_args_prepare,
+                        &cmd_args, sizeof(cmd_args));
+    if (ret != ESP_OK) {
+        ESP_EARLY_LOGE(TAG, "Failed to send file cmd (%d)!", ret);
+        return -1;
+    }
+
+    // now read the answer
+    int resp;
+    ret = esp_apptrace_file_rsp_recv(dest, (uint8_t *)&resp, sizeof(resp));
+    if (ret != ESP_OK) {
+        ESP_EARLY_LOGE(TAG, "Failed to read response (%d)!", ret);
+        return -1;
+    }
+
+    return resp;
+}
+
+static void esp_apptrace_ftell_args_prepare(uint8_t *buf, void *priv)
+{
+    esp_apptrace_ftell_args_t *args = priv;
+
+    memcpy(buf, &args->file, sizeof(args->file));
+}
+
+int esp_apptrace_ftell(esp_apptrace_dest_t dest, void *stream)
+{
+    esp_apptrace_ftell_args_t cmd_args;
+
+    cmd_args.file = stream;
+    esp_err_t ret = esp_apptrace_file_cmd_send(dest, ESP_APPTRACE_FILE_CMD_FTELL, esp_apptrace_ftell_args_prepare,
+                        &cmd_args, sizeof(cmd_args));
+    if (ret != ESP_OK) {
+        ESP_EARLY_LOGE(TAG, "Failed to send file cmd (%d)!", ret);
+        return -1;
+    }
+
+    // now read the answer
+    int resp;
+    ret = esp_apptrace_file_rsp_recv(dest, (uint8_t *)&resp, sizeof(resp));
+    if (ret != ESP_OK) {
+        ESP_EARLY_LOGE(TAG, "Failed to read response (%d)!", ret);
+        return -1;
+    }
+
+    return resp;
+}
+
+int esp_apptrace_fstop(esp_apptrace_dest_t dest)
+{
+    ESP_EARLY_LOGV(TAG, "%s", __func__);
+    esp_err_t ret = esp_apptrace_file_cmd_send(dest, ESP_APPTRACE_FILE_CMD_STOP, NULL, NULL, 0);
+    if (ret != ESP_OK) {
+        ESP_EARLY_LOGE(TAG, "Failed to send files transfer stop cmd (%d)!", ret);
+    }
+    return ret;
+}
+
+#endif

components/app_trace/include/esp_app_trace.h

@@ -0,0 +1,265 @@
+// Copyright 2017 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef ESP_APP_TRACE_H_
+#define ESP_APP_TRACE_H_
+
+#include <stdarg.h>
+#include "esp_err.h"
+#include "esp_app_trace_util.h" // ESP_APPTRACE_TMO_INFINITE
+
+/**
+ * Application trace data destinations bits.
+ */
+typedef enum {
+    ESP_APPTRACE_DEST_TRAX = 0x1,	///< JTAG destination
+    ESP_APPTRACE_DEST_UART0 = 0x2,	///< UART destination
+} esp_apptrace_dest_t;
+
+/**
+ * @brief  Initializes application tracing module.
+ *
+ * @note   Should be called before any esp_apptrace_xxx call.
+ *
+ * @return ESP_OK on success, otherwise see esp_err_t
+ */
+esp_err_t esp_apptrace_init();
+
+/**
+ * @brief Configures down buffer.
+ *        @note Needs to be called before initiating any data transfer using esp_apptrace_buffer_get and esp_apptrace_write.
+ *              This function does not protect internal data by lock.
+ *
+ * @param buf Address of buffer to use for down channel (host to target) data.
+ * @param size Size of the buffer.
+ */
+void esp_apptrace_down_buffer_config(uint8_t *buf, uint32_t size);
+
+/**
+ * @brief Allocates buffer for trace data.
+ *        After data in buffer are ready to be sent off esp_apptrace_buffer_put must be called to indicate it.
+ *
+ * @param dest Indicates HW interface to send data.
+ * @param size Size of data to write to trace buffer.
+ * @param tmo  Timeout for operation (in us). Use ESP_APPTRACE_TMO_INFINITE to wait indefinetly.
+ *
+ * @return non-NULL on success, otherwise NULL.
+ */
+uint8_t *esp_apptrace_buffer_get(esp_apptrace_dest_t dest, uint32_t size, uint32_t tmo);
+
+/**
+ * @brief Indicates that the data in buffer are ready to be sent off.
+ *        This function is a counterpart of and must be preceeded by esp_apptrace_buffer_get.
+ *
+ * @param dest Indicates HW interface to send data. Should be identical to the same parameter in call to esp_apptrace_buffer_get.
+ * @param ptr  Address of trace buffer to release. Should be the value returned by call to esp_apptrace_buffer_get.
+ * @param tmo  Timeout for operation (in us). Use ESP_APPTRACE_TMO_INFINITE to wait indefinetly.
+ *
+ * @return ESP_OK on success, otherwise see esp_err_t
+ */
+esp_err_t esp_apptrace_buffer_put(esp_apptrace_dest_t dest, uint8_t *ptr, uint32_t tmo);
+
+/**
+ * @brief  Writes data to trace buffer.
+ *
+ * @param dest Indicates HW interface to send data.
+ * @param data Address of data to write to trace buffer.
+ * @param size Size of data to write to trace buffer.
+ * @param tmo  Timeout for operation (in us). Use ESP_APPTRACE_TMO_INFINITE to wait indefinetly.
+ *
+ * @return ESP_OK on success, otherwise see esp_err_t
+ */
+esp_err_t esp_apptrace_write(esp_apptrace_dest_t dest, const void *data, uint32_t size, uint32_t tmo);
+
+/**
+ * @brief vprintf-like function to sent log messages to host via specified HW interface.
+ *
+ * @param dest Indicates HW interface to send data.
+ * @param tmo  Timeout for operation (in us). Use ESP_APPTRACE_TMO_INFINITE to wait indefinetly.
+ * @param fmt  Address of format string.
+ * @param ap   List of arguments.
+ *
+ * @return Number of bytes written.
+ */
+int esp_apptrace_vprintf_to(esp_apptrace_dest_t dest, uint32_t tmo, const char *fmt, va_list ap);
+
+/**
+ * @brief vprintf-like function to sent log messages to host.
+ *
+ * @param fmt  Address of format string.
+ * @param ap   List of arguments.
+ *
+ * @return Number of bytes written.
+ */
+int esp_apptrace_vprintf(const char *fmt, va_list ap);
+
+/**
+ * @brief Flushes remaining data in trace buffer to host.
+ *
+ * @param dest Indicates HW interface to flush data on.
+ * @param tmo  Timeout for operation (in us). Use ESP_APPTRACE_TMO_INFINITE to wait indefinetly.
+ *
+ * @return ESP_OK on success, otherwise see esp_err_t
+ */
+esp_err_t esp_apptrace_flush(esp_apptrace_dest_t dest, uint32_t tmo);
+
+/**
+ * @brief Flushes remaining data in trace buffer to host without locking internal data.
+ *        This is special version of esp_apptrace_flush which should be called from panic handler.
+ *
+ * @param dest   Indicates HW interface to flush data on.
+ * @param min_sz Threshold for flushing data. If current filling level is above this value, data will be flushed. TRAX destinations only.
+ * @param tmo    Timeout for operation (in us). Use ESP_APPTRACE_TMO_INFINITE to wait indefinetly.
+ *
+ * @return ESP_OK on success, otherwise see esp_err_t
+ */
+esp_err_t esp_apptrace_flush_nolock(esp_apptrace_dest_t dest, uint32_t min_sz, uint32_t tmo);
+
+/**
+ * @brief Reads host data from trace buffer.
+ *
+ * @param dest Indicates HW interface to read the data on.
+ * @param data Address of buffer to put data from trace buffer.
+ * @param size Pointer to store size of read data. Before call to this function pointed memory must hold requested size of data
+ * @param tmo  Timeout for operation (in us). Use ESP_APPTRACE_TMO_INFINITE to wait indefinetly.
+ *
+ * @return ESP_OK on success, otherwise see esp_err_t
+ */
+esp_err_t esp_apptrace_read(esp_apptrace_dest_t dest, void *data, uint32_t *size, uint32_t tmo);
+
+/**
+ * @brief Rertrieves incoming data buffer if any.
+ *        After data in buffer are processed esp_apptrace_down_buffer_put must be called to indicate it.
+ *
+ * @param dest Indicates HW interface to receive data.
+ * @param size Address to store size of available data in down buffer. Must be initializaed with requested value.
+ * @param tmo  Timeout for operation (in us). Use ESP_APPTRACE_TMO_INFINITE to wait indefinetly.
+ *
+ * @return non-NULL on success, otherwise NULL.
+ */
+uint8_t *esp_apptrace_down_buffer_get(esp_apptrace_dest_t dest, uint32_t *size, uint32_t tmo);
+
+/**
+ * @brief Indicates that the data in down buffer are processesd.
+ *        This function is a counterpart of and must be preceeded by esp_apptrace_down_buffer_get.
+ *
+ * @param dest Indicates HW interface to receive data. Should be identical to the same parameter in call to esp_apptrace_down_buffer_get.
+ * @param ptr  Address of trace buffer to release. Should be the value returned by call to esp_apptrace_down_buffer_get.
+ * @param tmo  Timeout for operation (in us). Use ESP_APPTRACE_TMO_INFINITE to wait indefinetly.
+ *
+ * @return ESP_OK on success, otherwise see esp_err_t
+ */
+esp_err_t esp_apptrace_down_buffer_put(esp_apptrace_dest_t dest, uint8_t *ptr, uint32_t tmo);
+
+/**
+ * @brief Checks whether host is connected.
+ *
+ * @param dest Indicates HW interface to use.
+ *
+ * @return true if host is connected, otherwise false
+ */
+bool esp_apptrace_host_is_connected(esp_apptrace_dest_t dest);
+
+/**
+ * @brief Opens file on host.
+ *		  This function has the same semantic as 'fopen' except for the first argument.
+ *
+ * @param dest Indicates HW interface to use.
+ * @param path Path to file.
+ * @param mode Mode string. See fopen for details.
+ *
+ * @return non zero file handle on success, otherwise 0
+ */
+void *esp_apptrace_fopen(esp_apptrace_dest_t dest, const char *path, const char *mode);
+
+/**
+ * @brief Closes file on host.
+ *		  This function has the same semantic as 'fclose' except for the first argument.
+ *
+ * @param dest   Indicates HW interface to use.
+ * @param stream File handle returned by esp_apptrace_fopen.
+ *
+ * @return Zero on success, otherwise non-zero. See fclose for details.
+ */
+int esp_apptrace_fclose(esp_apptrace_dest_t dest, void *stream);
+
+/**
+ * @brief Writes to file on host.
+ *		  This function has the same semantic as 'fwrite' except for the first argument.
+ *
+ * @param dest   Indicates HW interface to use.
+ * @param ptr 	 Address of data to write.
+ * @param size 	 Size of an item.
+ * @param nmemb  Number of items to write.
+ * @param stream File handle returned by esp_apptrace_fopen.
+ *
+ * @return Number of written items. See fwrite for details.
+ */
+size_t esp_apptrace_fwrite(esp_apptrace_dest_t dest, const void *ptr, size_t size, size_t nmemb, void *stream);
+
+/**
+ * @brief Read file on host.
+ *		  This function has the same semantic as 'fread' except for the first argument.
+ *
+ * @param dest   Indicates HW interface to use.
+ * @param ptr 	 Address to store read data.
+ * @param size 	 Size of an item.
+ * @param nmemb  Number of items to read.
+ * @param stream File handle returned by esp_apptrace_fopen.
+ *
+ * @return Number of read items. See fread for details.
+ */
+size_t esp_apptrace_fread(esp_apptrace_dest_t dest, void *ptr, size_t size, size_t nmemb, void *stream);
+
+/**
+ * @brief Set position indicator in file on host.
+ *		  This function has the same semantic as 'fseek' except for the first argument.
+ *
+ * @param dest   Indicates HW interface to use.
+ * @param stream File handle returned by esp_apptrace_fopen.
+ * @param offset Offset. See fseek for details.
+ * @param whence Position in file. See fseek for details.
+ *
+ * @return Zero on success, otherwise non-zero. See fseek for details.
+ */
+int esp_apptrace_fseek(esp_apptrace_dest_t dest, void *stream, long offset, int whence);
+
+/**
+ * @brief Get current position indicator for file on host.
+ *		  This function has the same semantic as 'ftell' except for the first argument.
+ *
+ * @param dest   Indicates HW interface to use.
+ * @param stream File handle returned by esp_apptrace_fopen.
+ *
+ * @return Current position in file. See ftell for details.
+ */
+int esp_apptrace_ftell(esp_apptrace_dest_t dest, void *stream);
+
+/**
+ * @brief Indicates to the host that all file operations are completed.
+ *		  This function should be called after all file operations are finished and 
+ *		  indicate to the host that it can perform cleanup operations (close open files etc.).
+ *
+ * @param dest   Indicates HW interface to use.
+ *
+ * @return ESP_OK on success, otherwise see esp_err_t
+ */
+int esp_apptrace_fstop(esp_apptrace_dest_t dest);
+
+/**
+ * @brief Triggers gcov info dump.
+ *		  This function waits for the host to connect to target before dumping data.
+ */
+void esp_gcov_dump(void);
+
+#endif

components/app_trace/include/esp_app_trace_util.h

@@ -0,0 +1,166 @@
+// Copyright 2017 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef ESP_APP_TRACE_UTIL_H_
+#define ESP_APP_TRACE_UTIL_H_
+
+#include "freertos/FreeRTOS.h"
+#include "esp_err.h"
+
+/** Infinite waiting timeout */
+#define ESP_APPTRACE_TMO_INFINITE               ((uint32_t)-1)
+
+/** Structure which holds data necessary for measuring time intervals. 
+ *
+ *  After initialization via esp_apptrace_tmo_init() user needs to call esp_apptrace_tmo_check()
+ *  periodically to check timeout for expiration.
+ */
+typedef struct {
+    uint32_t   start;   ///< time interval start (in CPU ticks)
+    uint32_t   tmo;     ///< timeout value (in us)
+    uint32_t   elapsed; ///< elapsed time (in us)
+} esp_apptrace_tmo_t;
+
+/**
+ * @brief Initializes timeout structure.
+ *
+ * @param tmo       Pointer to timeout structure to be initialized.
+ * @param user_tmo  Timeout value (in us). Use ESP_APPTRACE_TMO_INFINITE to wait indefinetly.
+*/
+static inline void esp_apptrace_tmo_init(esp_apptrace_tmo_t *tmo, uint32_t user_tmo)
+{
+    tmo->start = portGET_RUN_TIME_COUNTER_VALUE();
+    tmo->tmo = user_tmo;
+}
+
+/**
+ * @brief Checks timeout for expiration.
+ *
+ * @param tmo Pointer to timeout structure to be initialized.
+ *
+ * @return ESP_OK on success, otherwise \see esp_err_t
+ */
+esp_err_t esp_apptrace_tmo_check(esp_apptrace_tmo_t *tmo);
+
+static inline uint32_t esp_apptrace_tmo_remaining_us(esp_apptrace_tmo_t *tmo)
+{
+    return tmo->tmo != ESP_APPTRACE_TMO_INFINITE ? (tmo->elapsed - tmo->tmo) : ESP_APPTRACE_TMO_INFINITE;
+}
+
+/** Tracing module synchronization lock */
+typedef struct {
+    portMUX_TYPE mux;
+    unsigned int_state;
+} esp_apptrace_lock_t;
+
+/**
+ * @brief Initializes lock structure.
+ *
+ * @param lock Pointer to lock structure to be initialized.
+ */
+static inline void esp_apptrace_lock_init(esp_apptrace_lock_t *lock)
+{
+    vPortCPUInitializeMutex(&lock->mux);
+    lock->int_state = 0;
+}
+
+/**
+ * @brief Tries to acquire lock in specified time period.
+ *
+ * @param lock Pointer to lock structure.
+ * @param tmo  Pointer to timeout struct.
+ *
+ * @return ESP_OK on success, otherwise \see esp_err_t
+ */
+esp_err_t esp_apptrace_lock_take(esp_apptrace_lock_t *lock, esp_apptrace_tmo_t *tmo);
+
+/**
+ * @brief Releases lock.
+ *
+ * @param lock Pointer to lock structure.
+ *
+ * @return ESP_OK on success, otherwise \see esp_err_t
+ */
+esp_err_t esp_apptrace_lock_give(esp_apptrace_lock_t *lock);
+
+/** Ring buffer control structure.
+ *
+ * @note For purposes of application tracing module if there is no enough space for user data and write pointer can be wrapped 
+ *       current ring buffer size can be temporarily shrinked in order to provide buffer with requested size.
+ */
+typedef struct {
+    uint8_t *data;      ///< pointer to data storage
+    volatile uint32_t size;      ///< size of data storage
+    volatile uint32_t cur_size;  ///< current size of data storage
+    volatile uint32_t rd;        ///< read pointer
+    volatile uint32_t wr;        ///< write pointer
+} esp_apptrace_rb_t;
+
+/**
+ * @brief Initializes ring buffer control  structure.
+ *
+ * @param rb   Pointer to ring buffer structure to be initialized.
+ * @param data Pointer to buffer to be used as ring buffer's data storage.
+ * @param size Size of buffer to be used as ring buffer's data storage.
+ */
+static inline void esp_apptrace_rb_init(esp_apptrace_rb_t *rb, uint8_t *data, uint32_t size)
+{
+    rb->data = data;
+    rb->size = rb->cur_size = size;
+    rb->rd = 0;
+    rb->wr = 0;
+}
+
+/**
+ * @brief Allocates memory chunk in ring buffer.
+ *
+ * @param rb   Pointer to ring buffer structure.
+ * @param size Size of the memory to allocate.
+ *
+ * @return Pointer to the allocated memory or NULL in case of failure.
+ */
+uint8_t *esp_apptrace_rb_produce(esp_apptrace_rb_t *rb, uint32_t size);
+
+/**
+ * @brief Consumes memory chunk in ring buffer.
+ *
+ * @param rb   Pointer to ring buffer structure.
+ * @param size Size of the memory to consume.
+ *
+ * @return Pointer to consumed memory chunk or NULL in case of failure.
+ */
+uint8_t *esp_apptrace_rb_consume(esp_apptrace_rb_t *rb, uint32_t size);
+
+/**
+ * @brief Gets size of memory which can consumed with single call to esp_apptrace_rb_consume().
+ *
+ * @param rb Pointer to ring buffer structure.
+ *
+ * @return Size of memory which can consumed.
+ *
+ * @note Due to read pointer wrapping returned size can be less then the total size of available data.
+ */
+uint32_t esp_apptrace_rb_read_size_get(esp_apptrace_rb_t *rb);
+
+/**
+ * @brief Gets size of memory which can produced with single call to esp_apptrace_rb_produce().
+ *
+ * @param rb Pointer to ring buffer structure.
+ *
+ * @return Size of memory which can produced.
+ *
+ * @note Due to write pointer wrapping returned size can be less then the total size of available data.
+ */
+uint32_t esp_apptrace_rb_write_size_get(esp_apptrace_rb_t *rb);
+
+#endif //ESP_APP_TRACE_UTIL_H_

components/app_trace/sys_view/Config/Global.h

@@ -0,0 +1,102 @@
+/*********************************************************************
+*                SEGGER Microcontroller GmbH & Co. KG                *
+*                        The Embedded Experts                        *
+**********************************************************************
+*                                                                    *
+*       (c) 2015 - 2017  SEGGER Microcontroller GmbH & Co. KG        *
+*                                                                    *
+*       www.segger.com     Support: support@segger.com               *
+*                                                                    *
+**********************************************************************
+*                                                                    *
+*       SEGGER SystemView * Real-time application analysis           *
+*                                                                    *
+**********************************************************************
+*                                                                    *
+* All rights reserved.                                               *
+*                                                                    *
+* SEGGER strongly recommends to not make any changes                 *
+* to or modify the source code of this software in order to stay     *
+* compatible with the RTT protocol and J-Link.                       *
+*                                                                    *
+* Redistribution and use in source and binary forms, with or         *
+* without modification, are permitted provided that the following    *
+* conditions are met:                                                *
+*                                                                    *
+* o Redistributions of source code must retain the above copyright   *
+*   notice, this list of conditions and the following disclaimer.    *
+*                                                                    *
+* o Redistributions in binary form must reproduce the above          *
+*   copyright notice, this list of conditions and the following      *
+*   disclaimer in the documentation and/or other materials provided  *
+*   with the distribution.                                           *
+*                                                                    *
+* o Neither the name of SEGGER Microcontroller GmbH & Co. KG         *
+*   nor the names of its contributors may be used to endorse or      *
+*   promote products derived from this software without specific     *
+*   prior written permission.                                        *
+*                                                                    *
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND             *
+* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,        *
+* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF           *
+* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE           *
+* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR *
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR           *
+* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT  *
+* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;    *
+* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF      *
+* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT          *
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE  *
+* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH   *
+* DAMAGE.                                                            *
+*                                                                    *
+**********************************************************************
+*                                                                    *
+*       SystemView version: V2.42                                    *
+*                                                                    *
+**********************************************************************
+----------------------------------------------------------------------
+File    : Global.h
+Purpose : Global types
+          In case your application already has a Global.h, you should
+          merge the files. In order to use Segger code, the types
+          U8, U16, U32, I8, I16, I32 need to be defined in Global.h;
+          additional definitions do not hurt.
+---------------------------END-OF-HEADER------------------------------
+*/
+
+#ifndef GLOBAL_H            // Guard against multiple inclusion
+#define GLOBAL_H
+
+#define U8    unsigned char
+#define U16   unsigned short
+#define U32   unsigned long
+#define I8    signed char
+#define I16   signed short
+#define I32   signed long
+
+#ifdef _WIN32
+  //
+  // Microsoft VC6 compiler related
+  //
+  #define U64   unsigned __int64
+  #define U128  unsigned __int128
+  #define I64   __int64
+  #define I128  __int128
+  #if _MSC_VER <= 1200
+    #define U64_C(x) x##UI64
+  #else
+    #define U64_C(x) x##ULL
+  #endif
+#else 
+  //
+  // C99 compliant compiler
+  //
+  #define U64   unsigned long long
+  #define I64   signed long long
+  #define U64_C(x) x##ULL
+#endif
+
+#endif                      // Avoid multiple inclusion
+
+/*************************** End of file ****************************/

components/app_trace/sys_view/Config/SEGGER_RTT_Conf.h

@@ -0,0 +1,298 @@
+/*********************************************************************
+*                SEGGER Microcontroller GmbH & Co. KG                *
+*                        The Embedded Experts                        *
+**********************************************************************
+*                                                                    *
+*       (c) 2015 - 2017  SEGGER Microcontroller GmbH & Co. KG        *
+*                                                                    *
+*       www.segger.com     Support: support@segger.com               *
+*                                                                    *
+**********************************************************************
+*                                                                    *
+*       SEGGER SystemView * Real-time application analysis           *
+*                                                                    *
+**********************************************************************
+*                                                                    *
+* All rights reserved.                                               *
+*                                                                    *
+* SEGGER strongly recommends to not make any changes                 *
+* to or modify the source code of this software in order to stay     *
+* compatible with the RTT protocol and J-Link.                       *
+*                                                                    *
+* Redistribution and use in source and binary forms, with or         *
+* without modification, are permitted provided that the following    *
+* conditions are met:                                                *
+*                                                                    *
+* o Redistributions of source code must retain the above copyright   *
+*   notice, this list of conditions and the following disclaimer.    *
+*                                                                    *
+* o Redistributions in binary form must reproduce the above          *
+*   copyright notice, this list of conditions and the following      *
+*   disclaimer in the documentation and/or other materials provided  *
+*   with the distribution.                                           *
+*                                                                    *
+* o Neither the name of SEGGER Microcontroller GmbH & Co. KG         *
+*   nor the names of its contributors may be used to endorse or      *
+*   promote products derived from this software without specific     *
+*   prior written permission.                                        *
+*                                                                    *
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND             *
+* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,        *
+* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF           *
+* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE           *
+* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR *
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR           *
+* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT  *
+* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;    *
+* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF      *
+* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT          *
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE  *
+* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH   *
+* DAMAGE.                                                            *
+*                                                                    *
+**********************************************************************
+*                                                                    *
+*       SystemView version: V2.42                                    *
+*                                                                    *
+**********************************************************************
+---------------------------END-OF-HEADER------------------------------
+File    : SEGGER_RTT_Conf.h
+Purpose : Implementation of SEGGER real-time transfer (RTT) which
+          allows real-time communication on targets which support
+          debugger memory accesses while the CPU is running.
+Revision: $Rev: 5626 $
+
+*/
+
+#ifndef SEGGER_RTT_CONF_H
+#define SEGGER_RTT_CONF_H
+
+#ifdef __IAR_SYSTEMS_ICC__
+  #include <intrinsics.h>
+#endif
+
+/*********************************************************************
+*
+*       Defines, configurable
+*
+**********************************************************************
+*/
+
+#define SEGGER_RTT_MAX_NUM_UP_BUFFERS             (3)     // Max. number of up-buffers (T->H) available on this target    (Default: 3)
+#define SEGGER_RTT_MAX_NUM_DOWN_BUFFERS           (3)     // Max. number of down-buffers (H->T) available on this target  (Default: 3)
+
+#define BUFFER_SIZE_UP                            (1024)  // Size of the buffer for terminal output of target, up to host (Default: 1k)
+#define BUFFER_SIZE_DOWN                          (16)    // Size of the buffer for terminal input to target from host (Usually keyboard input) (Default: 16)
+
+#define SEGGER_RTT_PRINTF_BUFFER_SIZE             (64u)    // Size of buffer for RTT printf to bulk-send chars via RTT     (Default: 64)
+
+#define SEGGER_RTT_MODE_DEFAULT                   SEGGER_RTT_MODE_NO_BLOCK_SKIP // Mode for pre-initialized terminal channel (buffer 0)
+
+//
+// Target is not allowed to perform other RTT operations while string still has not been stored completely.
+// Otherwise we would probably end up with a mixed string in the buffer.
+// If using  RTT from within interrupts, multiple tasks or multi processors, define the SEGGER_RTT_LOCK() and SEGGER_RTT_UNLOCK() function here.
+//
+// SEGGER_RTT_MAX_INTERRUPT_PRIORITY can be used in the sample lock routines on Cortex-M3/4.
+// Make sure to mask all interrupts which can send RTT data, i.e. generate SystemView events, or cause task switches.
+// When high-priority interrupts must not be masked while sending RTT data, SEGGER_RTT_MAX_INTERRUPT_PRIORITY needs to be adjusted accordingly.
+// (Higher priority = lower priority number)
+// Default value for embOS: 128u
+// Default configuration in FreeRTOS: configMAX_SYSCALL_INTERRUPT_PRIORITY: ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+// In case of doubt mask all interrupts: 1 << (8 - BASEPRI_PRIO_BITS) i.e. 1 << 5 when 3 bits are implemented in NVIC
+// or define SEGGER_RTT_LOCK() to completely disable interrupts.
+//
+
+#define SEGGER_RTT_MAX_INTERRUPT_PRIORITY         (0x20)   // Interrupt priority to lock on SEGGER_RTT_LOCK on Cortex-M3/4 (Default: 0x20)
+
+/*********************************************************************
+*
+*       RTT lock configuration for SEGGER Embedded Studio,
+*       Rowley CrossStudio and GCC
+*/
+#if (defined __SES_ARM) || (defined __CROSSWORKS_ARM) || (defined __GNUC__)
+  #ifdef __ARM_ARCH_6M__
+    #define SEGGER_RTT_LOCK()   {                                                                   \
+                                    unsigned int LockState;                                         \
+                                  __asm volatile ("mrs   %0, primask  \n\t"                         \
+                                                  "mov   r1, $1     \n\t"                           \
+                                                  "msr   primask, r1  \n\t"                         \
+                                                  : "=r" (LockState)                                \
+                                                  :                                                 \
+                                                  : "r1"                                            \
+                                                  );
+
+    #define SEGGER_RTT_UNLOCK()   __asm volatile ("msr   primask, %0  \n\t"                         \
+                                                  :                                                 \
+                                                  : "r" (LockState)                                 \
+                                                  :                                                 \
+                                                  );                                                \
+                                }
+
+  #elif (defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__))
+    #ifndef   SEGGER_RTT_MAX_INTERRUPT_PRIORITY
+      #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY   (0x20)
+    #endif
+    #define SEGGER_RTT_LOCK()   {                                                                   \
+                                    unsigned int LockState;                                         \
+                                  __asm volatile ("mrs   %0, basepri  \n\t"                         \
+                                                  "mov   r1, %1       \n\t"                         \
+                                                  "msr   basepri, r1  \n\t"                         \
+                                                  : "=r" (LockState)                                \
+                                                  : "i"(SEGGER_RTT_MAX_INTERRUPT_PRIORITY)          \
+                                                  : "r1"                                            \
+                                                  );
+
+    #define SEGGER_RTT_UNLOCK()   __asm volatile ("msr   basepri, %0  \n\t"                         \
+                                                  :                                                 \
+                                                  : "r" (LockState)                                 \
+                                                  :                                                 \
+                                                  );                                                \
+                                }
+
+  #elif defined(__ARM_ARCH_7A__)
+    #define SEGGER_RTT_LOCK() {                                                \
+                                 unsigned int LockState;                       \
+                                 __asm volatile ("mrs r1, CPSR \n\t"           \
+                                                 "mov %0, r1 \n\t"             \
+                                                 "orr r1, r1, #0xC0 \n\t"      \
+                                                 "msr CPSR_c, r1 \n\t"         \
+                                                 : "=r" (LockState)            \
+                                                 :                             \
+                                                 : "r1"                        \
+                                                 );
+
+    #define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t"              \
+                                                "mrs r1, CPSR \n\t"            \
+                                                "bic r1, r1, #0xC0 \n\t"       \
+                                                "and r0, r0, #0xC0 \n\t"       \
+                                                "orr r1, r1, r0 \n\t"          \
+                                                "msr CPSR_c, r1 \n\t"          \
+                                                :                              \
+                                                : "r" (LockState)              \
+                                                : "r0", "r1"                   \
+                                                );                             \
+                            }
+#else
+    #define SEGGER_RTT_LOCK()
+    #define SEGGER_RTT_UNLOCK()
+  #endif
+#endif
+
+/*********************************************************************
+*
+*       RTT lock configuration for IAR EWARM
+*/
+#ifdef __ICCARM__
+  #if (defined (__ARM6M__) && (__CORE__ == __ARM6M__))
+    #define SEGGER_RTT_LOCK()   {                                                                   \
+                                  unsigned int LockState;                                           \
+                                  LockState = __get_PRIMASK();                                      \
+                                  __set_PRIMASK(1);
+
+    #define SEGGER_RTT_UNLOCK()   __set_PRIMASK(LockState);                                         \
+                                }
+  #elif ((defined (__ARM7EM__) && (__CORE__ == __ARM7EM__)) || (defined (__ARM7M__) && (__CORE__ == __ARM7M__)))
+    #ifndef   SEGGER_RTT_MAX_INTERRUPT_PRIORITY
+      #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY   (0x20)
+    #endif
+    #define SEGGER_RTT_LOCK()   {                                                                   \
+                                  unsigned int LockState;                                           \
+                                  LockState = __get_BASEPRI();                                      \
+                                  __set_BASEPRI(SEGGER_RTT_MAX_INTERRUPT_PRIORITY);
+
+    #define SEGGER_RTT_UNLOCK()   __set_BASEPRI(LockState);                                         \
+                                }
+  #endif
+#endif
+
+/*********************************************************************
+*
+*       RTT lock configuration for IAR RX
+*/
+#ifdef __ICCRX__
+  #define SEGGER_RTT_LOCK()   {                                                                     \
+                                unsigned long LockState;                                            \
+                                LockState = __get_interrupt_state();                                \
+                                __disable_interrupt();
+
+  #define SEGGER_RTT_UNLOCK()   __set_interrupt_state(LockState);                                   \
+                              }
+#endif
+
+/*********************************************************************
+*
+*       RTT lock configuration for KEIL ARM
+*/
+#ifdef __CC_ARM
+  #if (defined __TARGET_ARCH_6S_M)
+    #define SEGGER_RTT_LOCK()   {                                                                   \
+                                  unsigned int LockState;                                           \
+                                  register unsigned char PRIMASK __asm( "primask");                 \
+                                  LockState = PRIMASK;                                              \
+                                  PRIMASK = 1u;                                                     \
+                                  __schedule_barrier();
+
+    #define SEGGER_RTT_UNLOCK()   PRIMASK = LockState;                                              \
+                                  __schedule_barrier();                                             \
+                                }
+  #elif (defined(__TARGET_ARCH_7_M) || defined(__TARGET_ARCH_7E_M))
+    #ifndef   SEGGER_RTT_MAX_INTERRUPT_PRIORITY
+      #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY   (0x20)
+    #endif
+    #define SEGGER_RTT_LOCK()   {                                                                   \
+                                  unsigned int LockState;                                           \
+                                  register unsigned char BASEPRI __asm( "basepri");                 \
+                                  LockState = BASEPRI;                                              \
+                                  BASEPRI = SEGGER_RTT_MAX_INTERRUPT_PRIORITY;                      \
+                                  __schedule_barrier();
+
+    #define SEGGER_RTT_UNLOCK()   BASEPRI = LockState;                                              \
+                                  __schedule_barrier();                                             \
+                                }
+  #endif
+#endif
+
+/*********************************************************************
+*
+*       RTT lock configuration for TI ARM
+*/
+#ifdef __TI_ARM__
+  #if defined (__TI_ARM_V6M0__)
+    #define SEGGER_RTT_LOCK()   {                                                                   \
+                                  unsigned int LockState;                                           \
+                                  LockState = __get_PRIMASK();                                      \
+                                  __set_PRIMASK(1);
+
+    #define SEGGER_RTT_UNLOCK()   __set_PRIMASK(LockState);                                         \
+                                }
+  #elif (defined (__TI_ARM_V7M3__) || defined (__TI_ARM_V7M4__))
+    #ifndef   SEGGER_RTT_MAX_INTERRUPT_PRIORITY
+      #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY   (0x20)
+    #endif
+    #define SEGGER_RTT_LOCK()   {                                                                   \
+                                  unsigned int LockState;                                           \
+                                  LockState = OS_GetBASEPRI();                                      \
+                                  OS_SetBASEPRI(SEGGER_RTT_MAX_INTERRUPT_PRIORITY);
+
+    #define SEGGER_RTT_UNLOCK()   OS_SetBASEPRI(LockState);                                         \
+                                }
+  #endif
+#endif
+
+/*********************************************************************
+*
+*       RTT lock configuration fallback
+*/
+#ifndef   SEGGER_RTT_LOCK
+  void SEGGER_SYSVIEW_X_RTT_Lock();
+  #define SEGGER_RTT_LOCK()                SEGGER_SYSVIEW_X_RTT_Lock() // Lock RTT (nestable)   (i.e. disable interrupts)
+#endif
+
+#ifndef   SEGGER_RTT_UNLOCK
+  void SEGGER_SYSVIEW_X_RTT_Unlock();
+  #define SEGGER_RTT_UNLOCK()              SEGGER_SYSVIEW_X_RTT_Unlock() // Unlock RTT (nestable) (i.e. enable previous interrupt lock state)
+#endif
+
+#endif
+/*************************** End of file ****************************/

components/app_trace/sys_view/Config/SEGGER_SYSVIEW_Conf.h

@@ -0,0 +1,176 @@
+/*********************************************************************
+*                SEGGER Microcontroller GmbH & Co. KG                *
+*                        The Embedded Experts                        *
+**********************************************************************
+*                                                                    *
+*       (c) 2015 - 2017  SEGGER Microcontroller GmbH & Co. KG        *
+*                                                                    *
+*       www.segger.com     Support: support@segger.com               *
+*                                                                    *
+**********************************************************************
+*                                                                    *
+*       SEGGER SystemView * Real-time application analysis           *
+*                                                                    *
+**********************************************************************
+*                                                                    *
+* All rights reserved.                                               *
+*                                                                    *
+* SEGGER strongly recommends to not make any changes                 *
+* to or modify the source code of this software in order to stay     *
+* compatible with the RTT protocol and J-Link.                       *
+*                                                                    *
+* Redistribution and use in source and binary forms, with or         *
+* without modification, are permitted provided that the following    *
+* conditions are met:                                                *
+*                                                                    *
+* o Redistributions of source code must retain the above copyright   *
+*   notice, this list of conditions and the following disclaimer.    *
+*                                                                    *
+* o Redistributions in binary form must reproduce the above          *
+*   copyright notice, this list of conditions and the following      *
+*   disclaimer in the documentation and/or other materials provided  *
+*   with the distribution.                                           *
+*                                                                    *
+* o Neither the name of SEGGER Microcontroller GmbH & Co. KG         *
+*   nor the names of its contributors may be used to endorse or      *
+*   promote products derived from this software without specific     *
+*   prior written permission.                                        *
+*                                                                    *
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND             *
+* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,        *
+* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF           *
+* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE           *
+* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR *
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR           *
+* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT  *
+* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;    *
+* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF      *
+* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT          *
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE  *
+* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH   *
+* DAMAGE.                                                            *
+*                                                                    *
+**********************************************************************
+*                                                                    *
+*       SystemView version: V2.42                                    *
+*                                                                    *
+**********************************************************************
+-------------------------- END-OF-HEADER -----------------------------
+
+File    : SEGGER_SYSVIEW_Conf.h
+Purpose : SEGGER SystemView configuration.
+Revision: $Rev: 5927 $
+*/
+
+#ifndef SEGGER_SYSVIEW_CONF_H
+#define SEGGER_SYSVIEW_CONF_H
+
+/*********************************************************************
+*
+*       Defines, fixed
+*
+**********************************************************************
+*/
+//
+// Constants for known core configuration
+//
+#define SEGGER_SYSVIEW_CORE_OTHER   0
+#define SEGGER_SYSVIEW_CORE_CM0     1 // Cortex-M0/M0+/M1
+#define SEGGER_SYSVIEW_CORE_CM3     2 // Cortex-M3/M4/M7
+#define SEGGER_SYSVIEW_CORE_RX      3 // Renesas RX
+
+#if (defined __SES_ARM) || (defined __CROSSWORKS_ARM) || (defined __GNUC__)
+  #ifdef __ARM_ARCH_6M__
+    #define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_CM0
+  #elif (defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__))
+    #define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_CM3
+  #endif
+#elif defined(__ICCARM__)
+  #if (defined (__ARM6M__) && (__CORE__ == __ARM6M__))
+    #define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_CM0
+  #elif ((defined (__ARM7M__) && (__CORE__ == __ARM7M__)) || (defined (__ARM7EM__) && (__CORE__ == __ARM7EM__)))
+    #define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_CM3
+  #endif
+#elif defined(__CC_ARM)
+  #if (defined(__TARGET_ARCH_6S_M))
+    #define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_CM0
+  #elif (defined(__TARGET_ARCH_7_M) || defined(__TARGET_ARCH_7E_M))
+    #define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_CM3
+  #endif
+#elif defined(__TI_ARM__)
+  #ifdef __TI_ARM_V6M0__
+    #define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_CM0
+  #elif (defined(__TI_ARM_V7M3__) || defined(__TI_ARM_V7M4__))
+    #define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_CM3
+  #endif
+#elif defined(__ICCRX__)
+  #define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_RX
+#elif defined(__RX)
+  #define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_RX
+#endif
+
+#ifndef   SEGGER_SYSVIEW_CORE
+  #define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_OTHER
+#endif
+
+/*********************************************************************
+*
+*       Defines, configurable
+*
+**********************************************************************
+*/
+/*********************************************************************
+*
+*       SystemView buffer configuration
+*/
+#define SEGGER_SYSVIEW_RTT_BUFFER_SIZE      1024                                // Number of bytes that SystemView uses for the buffer.
+#define SEGGER_SYSVIEW_RTT_CHANNEL          1                                   // The RTT channel that SystemView will use. 0: Auto selection
+
+#define SEGGER_SYSVIEW_USE_STATIC_BUFFER    1                                   // Use a static buffer to generate events instead of a buffer on the stack
+
+#define SEGGER_SYSVIEW_POST_MORTEM_MODE     0                                   // 1: Enable post mortem analysis mode
+
+/*********************************************************************
+*
+*       SystemView timestamp configuration
+*/
+#if SEGGER_SYSVIEW_CORE == SEGGER_SYSVIEW_CORE_CM3
+  #define SEGGER_SYSVIEW_GET_TIMESTAMP()      (*(U32 *)(0xE0001004))            // Retrieve a system timestamp. Cortex-M cycle counter.
+  #define SEGGER_SYSVIEW_TIMESTAMP_BITS       32                                // Define number of valid bits low-order delivered by clock source
+#else
+  #define SEGGER_SYSVIEW_GET_TIMESTAMP()      SEGGER_SYSVIEW_X_GetTimestamp()   // Retrieve a system timestamp via user-defined function
+  #define SEGGER_SYSVIEW_TIMESTAMP_BITS       32                                // Define number of valid bits low-order delivered by SEGGER_SYSVIEW_X_GetTimestamp()
+#endif
+
+/*********************************************************************
+*
+*       SystemView Id configuration
+*/
+//TODO: optimise it
+#define SEGGER_SYSVIEW_ID_BASE         0x3F400000                               // Default value for the lowest Id reported by the application. Can be overridden by the application via SEGGER_SYSVIEW_SetRAMBase(). (i.e. 0x20000000 when all Ids are an address in this RAM)
+#define SEGGER_SYSVIEW_ID_SHIFT        0                                        // Number of bits to shift the Id to save bandwidth. (i.e. 2 when Ids are 4 byte aligned)
+
+/*********************************************************************
+*
+*       SystemView interrupt configuration
+*/
+#if SEGGER_SYSVIEW_CORE == SEGGER_SYSVIEW_CORE_CM3
+  #define SEGGER_SYSVIEW_GET_INTERRUPT_ID()   ((*(U32 *)(0xE000ED04)) & 0x1FF)  // Get the currently active interrupt Id. (i.e. read Cortex-M ICSR[8:0] = active vector)
+#elif SEGGER_SYSVIEW_CORE == SEGGER_SYSVIEW_CORE_CM0
+  #if defined(__ICCARM__)
+    #define SEGGER_SYSVIEW_GET_INTERRUPT_ID()   (__get_IPSR())                  // Workaround for IAR, which might do a byte-access to 0xE000ED04. Read IPSR instead.
+  #else
+    #define SEGGER_SYSVIEW_GET_INTERRUPT_ID()   ((*(U32 *)(0xE000ED04)) & 0x3F) // Get the currently active interrupt Id. (i.e. read Cortex-M ICSR[5:0] = active vector)
+  #endif
+#else
+  #define SEGGER_SYSVIEW_GET_INTERRUPT_ID()   SEGGER_SYSVIEW_X_GetInterruptId() // Get the currently active interrupt Id from the user-provided function.
+#endif
+
+void SEGGER_SYSVIEW_X_SysView_Lock();
+void SEGGER_SYSVIEW_X_SysView_Unlock();
+#define SEGGER_SYSVIEW_LOCK()   SEGGER_SYSVIEW_X_SysView_Lock()
+#define SEGGER_SYSVIEW_UNLOCK() SEGGER_SYSVIEW_X_SysView_Unlock()
+
+#endif  // SEGGER_SYSVIEW_CONF_H
+
+/*************************** End of file ****************************/

components/app_trace/sys_view/SEGGER/SEGGER.h

@@ -0,0 +1,155 @@
+/*********************************************************************
+*                SEGGER Microcontroller GmbH & Co. KG                *
+*                        The Embedded Experts                        *
+**********************************************************************
+*                                                                    *
+*       (c) 2015 - 2017  SEGGER Microcontroller GmbH & Co. KG        *
+*                                                                    *
+*       www.segger.com     Support: support@segger.com               *
+*                                                                    *
+**********************************************************************
+*                                                                    *
+*       SEGGER SystemView * Real-time application analysis           *
+*                                                                    *
+**********************************************************************
+*                                                                    *
+* All rights reserved.                                               *
+*                                                                    *
+* SEGGER strongly recommends to not make any changes                 *
+* to or modify the source code of this software in order to stay     *
+* compatible with the RTT protocol and J-Link.                       *
+*                                                                    *
+* Redistribution and use in source and binary forms, with or         *
+* without modification, are permitted provided that the following    *
+* conditions are met:                                                *
+*                                                                    *
+* o Redistributions of source code must retain the above copyright   *
+*   notice, this list of conditions and the following disclaimer.    *
+*                                                                    *
+* o Redistributions in binary form must reproduce the above          *
+*   copyright notice, this list of conditions and the following      *
+*   disclaimer in the documentation and/or other materials provided  *
+*   with the distribution.                                           *
+*                                                                    *
+* o Neither the name of SEGGER Microcontroller GmbH & Co. KG         *
+*   nor the names of its contributors may be used to endorse or      *
+*   promote products derived from this software without specific     *
+*   prior written permission.                                        *
+*                                                                    *
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND             *
+* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,        *
+* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF           *
+* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE           *
+* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR *
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR           *
+* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT  *
+* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;    *
+* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF      *
+* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT          *
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE  *
+* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH   *
+* DAMAGE.                                                            *
+*                                                                    *
+**********************************************************************
+*                                                                    *
+*       SystemView version: V2.42                                    *
+*                                                                    *
+**********************************************************************
+----------------------------------------------------------------------
+File    : SEGGER.h
+Purpose : Global types etc & general purpose utility functions
+---------------------------END-OF-HEADER------------------------------
+*/
+
+#ifndef SEGGER_H            // Guard against multiple inclusion
+#define SEGGER_H
+
+#include "Global.h"         // Type definitions: U8, U16, U32, I8, I16, I32
+
+#if defined(__cplusplus)
+extern "C" {     /* Make sure we have C-declarations in C++ programs */
+#endif
+
+/*********************************************************************
+*
+*       Keywords/specifiers
+*
+**********************************************************************
+*/
+
+#ifndef INLINE
+  #ifdef _WIN32
+    //
+    // Microsoft VC6 and newer.
+    // Force inlining without cost checking.
+    //
+    #define INLINE  __forceinline
+  #else
+    #if (defined(__ICCARM__) || defined(__CC_ARM) || defined(__GNUC__) || defined(__RX) || defined(__ICCRX__))
+      //
+      // Other known compilers.
+      //
+      #define INLINE  inline
+    #else
+      //
+      // Unknown compilers.
+      //
+      #define INLINE
+    #endif
+  #endif
+#endif
+
+/*********************************************************************
+*
+*       Function-like macros
+*
+**********************************************************************
+*/
+
+#define SEGGER_COUNTOF(a)          (sizeof((a))/sizeof((a)[0]))
+#define SEGGER_MIN(a,b)            (((a) < (b)) ? (a) : (b))
+#define SEGGER_MAX(a,b)            (((a) > (b)) ? (a) : (b))
+
+/*********************************************************************
+*
+*       Types
+*
+**********************************************************************
+*/
+
+typedef struct {
+  char *pBuffer;
+  int   BufferSize;
+  int   Cnt;
+} SEGGER_BUFFER_DESC;
+
+typedef struct {
+  int  CacheLineSize;                                // 0: No Cache. Most Systems such as ARM9 use a 32 bytes cache line size.
+  void (*pfDMB)       (void);                        // Optional DMB function for Data Memory Barrier to make sure all memory operations are completed.
+  void (*pfClean)     (void *p, unsigned NumBytes);  // Optional clean function for cached memory.
+  void (*pfInvalidate)(void *p, unsigned NumBytes);  // Optional invalidate function for cached memory.
+} SEGGER_CACHE_CONFIG;
+
+/*********************************************************************
+*
+*       Utility functions
+*
+**********************************************************************
+*/
+
+void SEGGER_ARM_memcpy   (void *pDest, const void *pSrc, int NumBytes);
+void SEGGER_memcpy       (void *pDest, const void *pSrc, int NumBytes);
+void SEGGER_memxor       (void *pDest, const void *pSrc, unsigned NumBytes);
+void SEGGER_StoreChar    (SEGGER_BUFFER_DESC *p, char c);
+void SEGGER_PrintUnsigned(SEGGER_BUFFER_DESC *pBufferDesc, U32 v, unsigned Base, int NumDigits);
+void SEGGER_PrintInt     (SEGGER_BUFFER_DESC *pBufferDesc, I32 v, unsigned Base, unsigned NumDigits);
+int  SEGGER_snprintf     (char *pBuffer, int BufferSize, const char *sFormat, ...);
+
+
+#if defined(__cplusplus)
+}                /* Make sure we have C-declarations in C++ programs */
+#endif
+
+#endif                      // Avoid multiple inclusion
+
+/*************************** End of file ****************************/

components/app_trace/sys_view/SEGGER/SEGGER_RTT.h

@@ -0,0 +1,251 @@
+/*********************************************************************
+*                SEGGER Microcontroller GmbH & Co. KG                *
+*                        The Embedded Experts                        *
+**********************************************************************
+*                                                                    *
+*       (c) 2015 - 2017  SEGGER Microcontroller GmbH & Co. KG        *
+*                                                                    *
+*       www.segger.com     Support: support@segger.com               *
+*                                                                    *
+**********************************************************************
+*                                                                    *
+*       SEGGER SystemView * Real-time application analysis           *
+*                                                                    *
+**********************************************************************
+*                                                                    *
+* All rights reserved.                                               *
+*                                                                    *
+* SEGGER strongly recommends to not make any changes                 *
+* to or modify the source code of this software in order to stay     *
+* compatible with the RTT protocol and J-Link.                       *
+*                                                                    *
+* Redistribution and use in source and binary forms, with or         *
+* without modification, are permitted provided that the following    *
+* conditions are met:                                                *
+*                                                                    *
+* o Redistributions of source code must retain the above copyright   *
+*   notice, this list of conditions and the following disclaimer.    *
+*                                                                    *
+* o Redistributions in binary form must reproduce the above          *
+*   copyright notice, this list of conditions and the following      *
+*   disclaimer in the documentation and/or other materials provided  *
+*   with the distribution.                                           *
+*                                                                    *
+* o Neither the name of SEGGER Microcontroller GmbH & Co. KG         *
+*   nor the names of its contributors may be used to endorse or      *
+*   promote products derived from this software without specific     *
+*   prior written permission.                                        *
+*                                                                    *
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND             *
+* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,        *
+* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF           *
+* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE           *
+* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR *
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR           *
+* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT  *
+* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;    *
+* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF      *
+* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT          *
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE  *
+* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH   *
+* DAMAGE.                                                            *
+*                                                                    *
+**********************************************************************
+*                                                                    *
+*       SystemView version: V2.42                                    *
+*                                                                    *
+**********************************************************************
+---------------------------END-OF-HEADER------------------------------
+File    : SEGGER_RTT.h
+Purpose : Implementation of SEGGER real-time transfer which allows
+          real-time communication on targets which support debugger 
+          memory accesses while the CPU is running.
+Revision: $Rev: 5626 $
+----------------------------------------------------------------------
+*/
+
+#ifndef SEGGER_RTT_H
+#define SEGGER_RTT_H
+
+#include "SEGGER_RTT_Conf.h"
+
+/*********************************************************************
+*
+*       Defines, fixed
+*
+**********************************************************************
+*/
+
+/*********************************************************************
+*
+*       Types
+*
+**********************************************************************
+*/
+
+//
+// Description for a circular buffer (also called "ring buffer")
+// which is used as up-buffer (T->H)
+//
+typedef struct {
+  const     char*    sName;         // Optional name. Standard names so far are: "Terminal", "SysView", "J-Scope_t4i4"
+            char*    pBuffer;       // Pointer to start of buffer
+            unsigned SizeOfBuffer;  // Buffer size in bytes. Note that one byte is lost, as this implementation does not fill up the buffer in order to avoid the problem of being unable to distinguish between full and empty.
+            unsigned WrOff;         // Position of next item to be written by either target.
+  volatile  unsigned RdOff;         // Position of next item to be read by host. Must be volatile since it may be modified by host.
+            unsigned Flags;         // Contains configuration flags
+} SEGGER_RTT_BUFFER_UP;
+
+//
+// Description for a circular buffer (also called "ring buffer")
+// which is used as down-buffer (H->T)
+//
+typedef struct {
+  const     char*    sName;         // Optional name. Standard names so far are: "Terminal", "SysView", "J-Scope_t4i4"
+            char*    pBuffer;       // Pointer to start of buffer
+            unsigned SizeOfBuffer;  // Buffer size in bytes. Note that one byte is lost, as this implementation does not fill up the buffer in order to avoid the problem of being unable to distinguish between full and empty.
+  volatile  unsigned WrOff;         // Position of next item to be written by host. Must be volatile since it may be modified by host.
+            unsigned RdOff;         // Position of next item to be read by target (down-buffer).
+            unsigned Flags;         // Contains configuration flags
+} SEGGER_RTT_BUFFER_DOWN;
+
+//
+// RTT control block which describes the number of buffers available
+// as well as the configuration for each buffer
+//
+//
+typedef struct {
+  char                    acID[16];                                 // Initialized to "SEGGER RTT"
+  int                     MaxNumUpBuffers;                          // Initialized to SEGGER_RTT_MAX_NUM_UP_BUFFERS (type. 2)
+  int                     MaxNumDownBuffers;                        // Initialized to SEGGER_RTT_MAX_NUM_DOWN_BUFFERS (type. 2)
+  SEGGER_RTT_BUFFER_UP    aUp[SEGGER_RTT_MAX_NUM_UP_BUFFERS];       // Up buffers, transferring information up from target via debug probe to host
+  SEGGER_RTT_BUFFER_DOWN  aDown[SEGGER_RTT_MAX_NUM_DOWN_BUFFERS];   // Down buffers, transferring information down from host via debug probe to target
+} SEGGER_RTT_CB;
+
+/*********************************************************************
+*
+*       Global data
+*
+**********************************************************************
+*/
+extern SEGGER_RTT_CB _SEGGER_RTT;
+
+/*********************************************************************
+*
+*       RTT API functions
+*
+**********************************************************************
+*/
+#ifdef __cplusplus
+  extern "C" {
+#endif
+int          SEGGER_RTT_AllocDownBuffer         (const char* sName, void* pBuffer, unsigned BufferSize, unsigned Flags);
+int          SEGGER_RTT_AllocUpBuffer           (const char* sName, void* pBuffer, unsigned BufferSize, unsigned Flags);
+int          SEGGER_RTT_ConfigUpBuffer          (unsigned BufferIndex, const char* sName, void* pBuffer, unsigned BufferSize, unsigned Flags);
+int          SEGGER_RTT_ConfigDownBuffer        (unsigned BufferIndex, const char* sName, void* pBuffer, unsigned BufferSize, unsigned Flags);
+int          SEGGER_RTT_GetKey                  (void);
+unsigned     SEGGER_RTT_HasData                 (unsigned BufferIndex);
+int          SEGGER_RTT_HasKey                  (void);
+void         SEGGER_RTT_Init                    (void);
+unsigned     SEGGER_RTT_Read                    (unsigned BufferIndex,       void* pBuffer, unsigned BufferSize);
+unsigned     SEGGER_RTT_ReadNoLock              (unsigned BufferIndex,       void* pData,   unsigned BufferSize);
+int          SEGGER_RTT_SetNameDownBuffer       (unsigned BufferIndex, const char* sName);
+int          SEGGER_RTT_SetNameUpBuffer         (unsigned BufferIndex, const char* sName);
+int          SEGGER_RTT_SetFlagsDownBuffer      (unsigned BufferIndex, unsigned Flags);
+int          SEGGER_RTT_SetFlagsUpBuffer        (unsigned BufferIndex, unsigned Flags);
+int          SEGGER_RTT_WaitKey                 (void);
+unsigned     SEGGER_RTT_Write                   (unsigned BufferIndex, const void* pBuffer, unsigned NumBytes);
+unsigned     SEGGER_RTT_WriteNoLock             (unsigned BufferIndex, const void* pBuffer, unsigned NumBytes);
+unsigned     SEGGER_RTT_WriteSkipNoLock         (unsigned BufferIndex, const void* pBuffer, unsigned NumBytes);
+unsigned     SEGGER_RTT_WriteString             (unsigned BufferIndex, const char* s);
+void         SEGGER_RTT_WriteWithOverwriteNoLock(unsigned BufferIndex, const void* pBuffer, unsigned NumBytes);
+void         SEGGER_RTT_ESP32_FlushNoLock       (unsigned long min_sz, unsigned long tmo);
+//
+// Function macro for performance optimization
+//
+// @AGv: This macro is used inside SEGGER SystemView code.
+// For ESP32 we use our own implementation of RTT, so this macro should not check SEGGER's RTT buffer state.
+#define      SEGGER_RTT_HASDATA(n)       (1)
+
+/*********************************************************************
+*
+*       RTT "Terminal" API functions
+*
+**********************************************************************
+*/
+int     SEGGER_RTT_SetTerminal        (char TerminalId);
+int     SEGGER_RTT_TerminalOut        (char TerminalId, const char* s);
+
+/*********************************************************************
+*
+*       RTT printf functions (require SEGGER_RTT_printf.c)
+*
+**********************************************************************
+*/
+int SEGGER_RTT_printf(unsigned BufferIndex, const char * sFormat, ...);
+#ifdef __cplusplus
+  }
+#endif
+
+/*********************************************************************
+*
+*       Defines
+*
+**********************************************************************
+*/
+
+//
+// Operating modes. Define behavior if buffer is full (not enough space for entire message)
+//
+#define SEGGER_RTT_MODE_NO_BLOCK_SKIP         (0U)     // Skip. Do not block, output nothing. (Default)
+#define SEGGER_RTT_MODE_NO_BLOCK_TRIM         (1U)     // Trim: Do not block, output as much as fits.
+#define SEGGER_RTT_MODE_BLOCK_IF_FIFO_FULL    (2U)     // Block: Wait until there is space in the buffer.
+#define SEGGER_RTT_MODE_MASK                  (3U)
+
+//
+// Control sequences, based on ANSI.
+// Can be used to control color, and clear the screen
+//
+#define RTT_CTRL_RESET                ""         // Reset to default colors
+#define RTT_CTRL_CLEAR                ""         // Clear screen, reposition cursor to top left
+
+#define RTT_CTRL_TEXT_BLACK           ""
+#define RTT_CTRL_TEXT_RED             ""
+#define RTT_CTRL_TEXT_GREEN           ""
+#define RTT_CTRL_TEXT_YELLOW          ""
+#define RTT_CTRL_TEXT_BLUE            ""
+#define RTT_CTRL_TEXT_MAGENTA         ""
+#define RTT_CTRL_TEXT_CYAN            ""
+#define RTT_CTRL_TEXT_WHITE           ""
+
+#define RTT_CTRL_TEXT_BRIGHT_BLACK    ""
+#define RTT_CTRL_TEXT_BRIGHT_RED      ""
+#define RTT_CTRL_TEXT_BRIGHT_GREEN    ""
+#define RTT_CTRL_TEXT_BRIGHT_YELLOW   ""
+#define RTT_CTRL_TEXT_BRIGHT_BLUE     ""
+#define RTT_CTRL_TEXT_BRIGHT_MAGENTA  ""
+#define RTT_CTRL_TEXT_BRIGHT_CYAN     ""
+#define RTT_CTRL_TEXT_BRIGHT_WHITE    ""
+
+#define RTT_CTRL_BG_BLACK             ""
+#define RTT_CTRL_BG_RED               ""
+#define RTT_CTRL_BG_GREEN             ""
+#define RTT_CTRL_BG_YELLOW            ""
+#define RTT_CTRL_BG_BLUE              ""
+#define RTT_CTRL_BG_MAGENTA           ""
+#define RTT_CTRL_BG_CYAN              ""
+#define RTT_CTRL_BG_WHITE             ""
+
+#define RTT_CTRL_BG_BRIGHT_BLACK      ""
+#define RTT_CTRL_BG_BRIGHT_RED        ""
+#define RTT_CTRL_BG_BRIGHT_GREEN      ""
+#define RTT_CTRL_BG_BRIGHT_YELLOW     ""
+#define RTT_CTRL_BG_BRIGHT_BLUE       ""
+#define RTT_CTRL_BG_BRIGHT_MAGENTA    ""
+#define RTT_CTRL_BG_BRIGHT_CYAN       ""
+#define RTT_CTRL_BG_BRIGHT_WHITE      ""
+
+
+#endif
+
+/*************************** End of file ****************************/

components/app_trace/sys_view/SEGGER/SEGGER_SYSVIEW.h

@@ -0,0 +1,334 @@
+/*********************************************************************
+*                SEGGER Microcontroller GmbH & Co. KG                *
+*                        The Embedded Experts                        *
+**********************************************************************
+*                                                                    *
+*       (c) 2015 - 2017  SEGGER Microcontroller GmbH & Co. KG        *
+*                                                                    *
+*       www.segger.com     Support: support@segger.com               *
+*                                                                    *
+**********************************************************************
+*                                                                    *
+*       SEGGER SystemView * Real-time application analysis           *
+*                                                                    *
+**********************************************************************
+*                                                                    *
+* All rights reserved.                                               *
+*                                                                    *
+* SEGGER strongly recommends to not make any changes                 *
+* to or modify the source code of this software in order to stay     *
+* compatible with the RTT protocol and J-Link.                       *
+*                                                                    *
+* Redistribution and use in source and binary forms, with or         *
+* without modification, are permitted provided that the following    *
+* conditions are met:                                                *
+*                                                                    *
+* o Redistributions of source code must retain the above copyright   *
+*   notice, this list of conditions and the following disclaimer.    *
+*                                                                    *
+* o Redistributions in binary form must reproduce the above          *
+*   copyright notice, this list of conditions and the following      *
+*   disclaimer in the documentation and/or other materials provided  *
+*   with the distribution.                                           *
+*                                                                    *
+* o Neither the name of SEGGER Microcontroller GmbH & Co. KG         *
+*   nor the names of its contributors may be used to endorse or      *
+*   promote products derived from this software without specific     *
+*   prior written permission.                                        *
+*                                                                    *
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND             *
+* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,        *
+* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF           *
+* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE           *
+* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR *
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR           *
+* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT  *
+* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;    *
+* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF      *
+* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT          *
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE  *
+* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH   *
+* DAMAGE.                                                            *
+*                                                                    *
+**********************************************************************
+*                                                                    *
+*       SystemView version: V2.42                                    *
+*                                                                    *
+**********************************************************************
+-------------------------- END-OF-HEADER -----------------------------
+File    : SEGGER_SYSVIEW.h
+Purpose : System visualization API.
+Revision: $Rev: 5626 $
+*/
+
+#ifndef SEGGER_SYSVIEW_H
+#define SEGGER_SYSVIEW_H
+
+/*********************************************************************
+*
+*       #include Section
+*
+**********************************************************************
+*/
+
+#include "SEGGER.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+/*********************************************************************
+*
+*       Defines, fixed
+*
+**********************************************************************
+*/
+
+#define SEGGER_SYSVIEW_VERSION        21000
+
+#define SEGGER_SYSVIEW_INFO_SIZE      9   // Minimum size, which has to be reserved for a packet. 1-2 byte of message type, 0-2  byte of payload length, 1-5 bytes of timestamp.
+#define SEGGER_SYSVIEW_QUANTA_U32     5   // Maximum number of bytes to encode a U32, should be reserved for each 32-bit value in a packet.
+
+#define SEGGER_SYSVIEW_LOG            (0u)
+#define SEGGER_SYSVIEW_WARNING        (1u)
+#define SEGGER_SYSVIEW_ERROR          (2u)
+#define SEGGER_SYSVIEW_FLAG_APPEND    (1u << 6)
+
+#define SEGGER_SYSVIEW_PREPARE_PACKET(p)  (p) + 4
+//
+// SystemView events. First 32 IDs from 0 .. 31 are reserved for these
+//
+#define   SYSVIEW_EVTID_NOP                0  // Dummy packet.
+#define   SYSVIEW_EVTID_OVERFLOW           1
+#define   SYSVIEW_EVTID_ISR_ENTER          2
+#define   SYSVIEW_EVTID_ISR_EXIT           3
+#define   SYSVIEW_EVTID_TASK_START_EXEC    4
+#define   SYSVIEW_EVTID_TASK_STOP_EXEC     5
+#define   SYSVIEW_EVTID_TASK_START_READY   6
+#define   SYSVIEW_EVTID_TASK_STOP_READY    7
+#define   SYSVIEW_EVTID_TASK_CREATE        8
+#define   SYSVIEW_EVTID_TASK_INFO          9
+#define   SYSVIEW_EVTID_TRACE_START       10
+#define   SYSVIEW_EVTID_TRACE_STOP        11
+#define   SYSVIEW_EVTID_SYSTIME_CYCLES    12
+#define   SYSVIEW_EVTID_SYSTIME_US        13
+#define   SYSVIEW_EVTID_SYSDESC           14
+#define   SYSVIEW_EVTID_USER_START        15
+#define   SYSVIEW_EVTID_USER_STOP         16
+#define   SYSVIEW_EVTID_IDLE              17
+#define   SYSVIEW_EVTID_ISR_TO_SCHEDULER  18
+#define   SYSVIEW_EVTID_TIMER_ENTER       19
+#define   SYSVIEW_EVTID_TIMER_EXIT        20
+#define   SYSVIEW_EVTID_STACK_INFO        21
+#define   SYSVIEW_EVTID_MODULEDESC        22
+
+#define   SYSVIEW_EVTID_INIT              24
+#define   SYSVIEW_EVTID_NAME_RESOURCE     25
+#define   SYSVIEW_EVTID_PRINT_FORMATTED   26
+#define   SYSVIEW_EVTID_NUMMODULES        27
+#define   SYSVIEW_EVTID_END_CALL          28
+#define   SYSVIEW_EVTID_TASK_TERMINATE    29
+
+#define   SYSVIEW_EVTID_EX                31
+//
+// Event masks to disable/enable events
+//
+#define   SYSVIEW_EVTMASK_NOP               (1 << SYSVIEW_EVTID_NOP)
+#define   SYSVIEW_EVTMASK_OVERFLOW          (1 << SYSVIEW_EVTID_OVERFLOW)
+#define   SYSVIEW_EVTMASK_ISR_ENTER         (1 << SYSVIEW_EVTID_ISR_ENTER)
+#define   SYSVIEW_EVTMASK_ISR_EXIT          (1 << SYSVIEW_EVTID_ISR_EXIT)
+#define   SYSVIEW_EVTMASK_TASK_START_EXEC   (1 << SYSVIEW_EVTID_TASK_START_EXEC)
+#define   SYSVIEW_EVTMASK_TASK_STOP_EXEC    (1 << SYSVIEW_EVTID_TASK_STOP_EXEC)
+#define   SYSVIEW_EVTMASK_TASK_START_READY  (1 << SYSVIEW_EVTID_TASK_START_READY)
+#define   SYSVIEW_EVTMASK_TASK_STOP_READY   (1 << SYSVIEW_EVTID_TASK_STOP_READY)
+#define   SYSVIEW_EVTMASK_TASK_CREATE       (1 << SYSVIEW_EVTID_TASK_CREATE)
+#define   SYSVIEW_EVTMASK_TASK_INFO         (1 << SYSVIEW_EVTID_TASK_INFO)
+#define   SYSVIEW_EVTMASK_TRACE_START       (1 << SYSVIEW_EVTID_TRACE_START)
+#define   SYSVIEW_EVTMASK_TRACE_STOP        (1 << SYSVIEW_EVTID_TRACE_STOP)
+#define   SYSVIEW_EVTMASK_SYSTIME_CYCLES    (1 << SYSVIEW_EVTID_SYSTIME_CYCLES)
+#define   SYSVIEW_EVTMASK_SYSTIME_US        (1 << SYSVIEW_EVTID_SYSTIME_US)
+#define   SYSVIEW_EVTMASK_SYSDESC           (1 << SYSVIEW_EVTID_SYSDESC)
+#define   SYSVIEW_EVTMASK_USER_START        (1 << SYSVIEW_EVTID_USER_START)
+#define   SYSVIEW_EVTMASK_USER_STOP         (1 << SYSVIEW_EVTID_USER_STOP)
+#define   SYSVIEW_EVTMASK_IDLE              (1 << SYSVIEW_EVTID_IDLE)
+#define   SYSVIEW_EVTMASK_ISR_TO_SCHEDULER  (1 << SYSVIEW_EVTID_ISR_TO_SCHEDULER)
+#define   SYSVIEW_EVTMASK_TIMER_ENTER       (1 << SYSVIEW_EVTID_TIMER_ENTER)
+#define   SYSVIEW_EVTMASK_TIMER_EXIT        (1 << SYSVIEW_EVTID_TIMER_EXIT)
+#define   SYSVIEW_EVTMASK_STACK_INFO        (1 << SYSVIEW_EVTID_STACK_INFO)
+#define   SYSVIEW_EVTMASK_MODULEDESC        (1 << SYSVIEW_EVTID_MODULEDESC)
+
+#define   SYSVIEW_EVTMASK_INIT              (1 << SYSVIEW_EVTID_INIT)
+#define   SYSVIEW_EVTMASK_NAME_RESOURCE     (1 << SYSVIEW_EVTID_NAME_RESOURCE)
+#define   SYSVIEW_EVTMASK_PRINT_FORMATTED   (1 << SYSVIEW_EVTID_PRINT_FORMATTED)
+#define   SYSVIEW_EVTMASK_NUMMODULES        (1 << SYSVIEW_EVTID_NUMMODULES)
+#define   SYSVIEW_EVTMASK_END_CALL          (1 << SYSVIEW_EVTID_END_CALL)
+#define   SYSVIEW_EVTMASK_TASK_TERMINATE    (1 << SYSVIEW_EVTID_TASK_TERMINATE)
+
+#define   SYSVIEW_EVTMASK_EX                (1 << SYSVIEW_EVTID_EX)
+
+#define   SYSVIEW_EVTMASK_ALL_INTERRUPTS    ( SYSVIEW_EVTMASK_ISR_ENTER           \
+                                            | SYSVIEW_EVTMASK_ISR_EXIT            \
+                                            | SYSVIEW_EVTMASK_ISR_TO_SCHEDULER)
+#define   SYSVIEW_EVTMASK_ALL_TASKS         ( SYSVIEW_EVTMASK_TASK_START_EXEC     \
+                                            | SYSVIEW_EVTMASK_TASK_STOP_EXEC      \
+                                            | SYSVIEW_EVTMASK_TASK_START_READY    \
+                                            | SYSVIEW_EVTMASK_TASK_STOP_READY     \
+                                            | SYSVIEW_EVTMASK_TASK_CREATE         \
+                                            | SYSVIEW_EVTMASK_TASK_INFO           \
+                                            | SYSVIEW_EVTMASK_STACK_INFO          \
+                                            | SYSVIEW_EVTMASK_TASK_TERMINATE)
+
+/*********************************************************************
+*
+*       Structures
+*
+**********************************************************************
+*/
+
+typedef struct {
+  U32          TaskID;
+  const char*  sName;
+  U32          Prio;
+  U32          StackBase;
+  U32          StackSize;
+} SEGGER_SYSVIEW_TASKINFO;
+
+typedef struct SEGGER_SYSVIEW_MODULE_STRUCT SEGGER_SYSVIEW_MODULE;
+
+struct SEGGER_SYSVIEW_MODULE_STRUCT {
+  const char*                   sModule;
+        U32                     NumEvents;
+        U32                     EventOffset;
+        void                    (*pfSendModuleDesc)(void);
+        SEGGER_SYSVIEW_MODULE*  pNext;
+};
+
+typedef void (SEGGER_SYSVIEW_SEND_SYS_DESC_FUNC)(void);
+
+/*********************************************************************
+*
+*       API functions
+*
+**********************************************************************
+*/
+
+typedef struct {
+  U64  (*pfGetTime)      (void);
+  void (*pfSendTaskList) (void);
+} SEGGER_SYSVIEW_OS_API;
+
+/*********************************************************************
+*
+*       Control and initialization functions
+*/
+void SEGGER_SYSVIEW_Init                          (U32 SysFreq, U32 CPUFreq, const SEGGER_SYSVIEW_OS_API *pOSAPI, SEGGER_SYSVIEW_SEND_SYS_DESC_FUNC pfSendSysDesc);
+void SEGGER_SYSVIEW_SetRAMBase                    (U32 RAMBaseAddress);
+void SEGGER_SYSVIEW_Start                         (void);
+void SEGGER_SYSVIEW_Stop                          (void);
+void SEGGER_SYSVIEW_GetSysDesc                    (void);
+void SEGGER_SYSVIEW_SendTaskList                  (void);
+void SEGGER_SYSVIEW_SendTaskInfo                  (const SEGGER_SYSVIEW_TASKINFO* pInfo);
+void SEGGER_SYSVIEW_SendSysDesc                   (const char* sSysDesc);
+
+/*********************************************************************
+*
+*       Event recording functions
+*/
+void SEGGER_SYSVIEW_RecordVoid                    (unsigned int EventId);
+void SEGGER_SYSVIEW_RecordU32                     (unsigned int EventId, U32 Para0);
+void SEGGER_SYSVIEW_RecordU32x2                   (unsigned int EventId, U32 Para0, U32 Para1);
+void SEGGER_SYSVIEW_RecordU32x3                   (unsigned int EventId, U32 Para0, U32 Para1, U32 Para2);
+void SEGGER_SYSVIEW_RecordU32x4                   (unsigned int EventId, U32 Para0, U32 Para1, U32 Para2, U32 Para3);
+void SEGGER_SYSVIEW_RecordU32x5                   (unsigned int EventId, U32 Para0, U32 Para1, U32 Para2, U32 Para3, U32 Para4);
+void SEGGER_SYSVIEW_RecordU32x6                   (unsigned int EventId, U32 Para0, U32 Para1, U32 Para2, U32 Para3, U32 Para4, U32 Para5);
+void SEGGER_SYSVIEW_RecordU32x7                   (unsigned int EventId, U32 Para0, U32 Para1, U32 Para2, U32 Para3, U32 Para4, U32 Para5, U32 Para6);
+void SEGGER_SYSVIEW_RecordU32x8                   (unsigned int EventId, U32 Para0, U32 Para1, U32 Para2, U32 Para3, U32 Para4, U32 Para5, U32 Para6, U32 Para7);
+void SEGGER_SYSVIEW_RecordU32x9                   (unsigned int EventId, U32 Para0, U32 Para1, U32 Para2, U32 Para3, U32 Para4, U32 Para5, U32 Para6, U32 Para7, U32 Para8);
+void SEGGER_SYSVIEW_RecordU32x10                  (unsigned int EventId, U32 Para0, U32 Para1, U32 Para2, U32 Para3, U32 Para4, U32 Para5, U32 Para6, U32 Para7, U32 Para8, U32 Para9);
+void SEGGER_SYSVIEW_RecordString                  (unsigned int EventId, const char* pString);
+void SEGGER_SYSVIEW_RecordSystime                 (void);
+void SEGGER_SYSVIEW_RecordEnterISR                (U32 IrqId);
+void SEGGER_SYSVIEW_RecordExitISR                 (void);
+void SEGGER_SYSVIEW_RecordExitISRToScheduler      (void);
+void SEGGER_SYSVIEW_RecordEnterTimer              (U32 TimerId);
+void SEGGER_SYSVIEW_RecordExitTimer               (void);
+void SEGGER_SYSVIEW_RecordEndCall                 (unsigned int EventID);
+void SEGGER_SYSVIEW_RecordEndCallU32              (unsigned int EventID, U32 Para0);
+
+void SEGGER_SYSVIEW_OnIdle                        (void);
+void SEGGER_SYSVIEW_OnTaskCreate                  (U32 TaskId);
+void SEGGER_SYSVIEW_OnTaskTerminate               (U32 TaskId);
+void SEGGER_SYSVIEW_OnTaskStartExec               (U32 TaskId);
+void SEGGER_SYSVIEW_OnTaskStopExec                (void);
+void SEGGER_SYSVIEW_OnTaskStartReady              (U32 TaskId);
+void SEGGER_SYSVIEW_OnTaskStopReady               (U32 TaskId, unsigned int Cause);
+void SEGGER_SYSVIEW_OnUserStart                   (unsigned int UserId);       // Start of user defined event (such as a subroutine to profile)
+void SEGGER_SYSVIEW_OnUserStop                    (unsigned int UserId);       // Start of user defined event
+
+void SEGGER_SYSVIEW_NameResource                  (U32 ResourceId, const char* sName);
+
+int  SEGGER_SYSVIEW_SendPacket                    (U8* pPacket, U8* pPayloadEnd, unsigned int EventId);
+
+/*********************************************************************
+*
+*       Event parameter encoding functions
+*/
+U8*  SEGGER_SYSVIEW_EncodeU32                     (U8* pPayload, U32 Value);
+U8*  SEGGER_SYSVIEW_EncodeData                    (U8* pPayload, const char* pSrc, unsigned int Len);
+U8*  SEGGER_SYSVIEW_EncodeString                  (U8* pPayload, const char* s, unsigned int MaxLen);
+U8*  SEGGER_SYSVIEW_EncodeId                      (U8* pPayload, U32 Id);
+U32  SEGGER_SYSVIEW_ShrinkId                      (U32 Id);
+
+
+/*********************************************************************
+*
+*       Middleware module registration
+*/
+void SEGGER_SYSVIEW_RegisterModule                (SEGGER_SYSVIEW_MODULE* pModule);
+void SEGGER_SYSVIEW_RecordModuleDescription       (const SEGGER_SYSVIEW_MODULE* pModule, const char* sDescription);
+void SEGGER_SYSVIEW_SendModule                    (U8 ModuleId);
+void SEGGER_SYSVIEW_SendModuleDescription         (void);
+void SEGGER_SYSVIEW_SendNumModules                (void);
+
+/*********************************************************************
+*
+*       printf-Style functions
+*/
+#ifndef SEGGER_SYSVIEW_EXCLUDE_PRINTF // Define in project to avoid warnings about variable parameter list
+void SEGGER_SYSVIEW_PrintfHostEx                  (const char* s, U32 Options, ...);
+void SEGGER_SYSVIEW_PrintfTargetEx                (const char* s, U32 Options, ...);
+void SEGGER_SYSVIEW_PrintfHost                    (const char* s, ...);
+void SEGGER_SYSVIEW_PrintfTarget                  (const char* s, ...);
+void SEGGER_SYSVIEW_WarnfHost                     (const char* s, ...);
+void SEGGER_SYSVIEW_WarnfTarget                   (const char* s, ...);
+void SEGGER_SYSVIEW_ErrorfHost                    (const char* s, ...);
+void SEGGER_SYSVIEW_ErrorfTarget                  (const char* s, ...);
+#endif
+
+void SEGGER_SYSVIEW_Print                         (const char* s);
+void SEGGER_SYSVIEW_Warn                          (const char* s);
+void SEGGER_SYSVIEW_Error                         (const char* s);
+
+/*********************************************************************
+*
+*       Run-time configuration functions
+*/
+void SEGGER_SYSVIEW_EnableEvents                  (U32 EnableMask);
+void SEGGER_SYSVIEW_DisableEvents                 (U32 DisableMask);
+
+/*********************************************************************
+*
+*       Application-provided functions
+*/
+void SEGGER_SYSVIEW_Conf                          (void);
+U32  SEGGER_SYSVIEW_X_GetTimestamp                (void);
+U32  SEGGER_SYSVIEW_X_GetInterruptId              (void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+
+/*************************** End of file ****************************/

components/app_trace/sys_view/SEGGER/SEGGER_SYSVIEW_ConfDefaults.h

@@ -0,0 +1,178 @@
+/*********************************************************************
+*                SEGGER Microcontroller GmbH & Co. KG                *
+*                        The Embedded Experts                        *
+**********************************************************************
+*                                                                    *
+*       (c) 2015 - 2017  SEGGER Microcontroller GmbH & Co. KG        *
+*                                                                    *
+*       www.segger.com     Support: support@segger.com               *
+*                                                                    *
+**********************************************************************
+*                                                                    *
+*       SEGGER SystemView * Real-time application analysis           *
+*                                                                    *
+**********************************************************************
+*                                                                    *
+* All rights reserved.                                               *
+*                                                                    *
+* SEGGER strongly recommends to not make any changes                 *
+* to or modify the source code of this software in order to stay     *
+* compatible with the RTT protocol and J-Link.                       *
+*                                                                    *
+* Redistribution and use in source and binary forms, with or         *
+* without modification, are permitted provided that the following    *
+* conditions are met:                                                *
+*                                                                    *
+* o Redistributions of source code must retain the above copyright   *
+*   notice, this list of conditions and the following disclaimer.    *
+*                                                                    *
+* o Redistributions in binary form must reproduce the above          *
+*   copyright notice, this list of conditions and the following      *
+*   disclaimer in the documentation and/or other materials provided  *
+*   with the distribution.                                           *
+*                                                                    *
+* o Neither the name of SEGGER Microcontroller GmbH & Co. KG         *
+*   nor the names of its contributors may be used to endorse or      *
+*   promote products derived from this software without specific     *
+*   prior written permission.                                        *
+*                                                                    *
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND             *
+* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,        *
+* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF           *
+* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE           *
+* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR *
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR           *
+* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT  *
+* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;    *
+* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF      *
+* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT          *
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE  *
+* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH   *
+* DAMAGE.                                                            *
+*                                                                    *
+**********************************************************************
+*                                                                    *
+*       SystemView version: V2.42                                    *
+*                                                                    *
+**********************************************************************
+-------------------------- END-OF-HEADER -----------------------------
+File    : SEGGER_SYSVIEW_ConfDefaults.h
+Purpose : Defines defaults for configurable defines used in
+          SEGGER SystemView.
+Revision: $Rev: 3734 $
+*/
+
+#ifndef SEGGER_SYSVIEW_CONFDEFAULTS_H
+#define SEGGER_SYSVIEW_CONFDEFAULTS_H
+
+/*********************************************************************
+*
+*       #include Section
+*
+**********************************************************************
+*/
+
+#include "SEGGER_SYSVIEW_Conf.h"
+#include "SEGGER_RTT_Conf.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*********************************************************************
+*
+*       Configuration defaults
+*
+**********************************************************************
+*/
+
+// Number of bytes that SystemView uses for a buffer.
+#ifndef   SEGGER_SYSVIEW_RTT_BUFFER_SIZE
+  #define SEGGER_SYSVIEW_RTT_BUFFER_SIZE    1024
+#endif
+
+// The RTT channel that SystemView will use.
+#ifndef   SEGGER_SYSVIEW_RTT_CHANNEL
+  #define SEGGER_SYSVIEW_RTT_CHANNEL        0
+#endif
+// Sanity check of RTT channel
+#if (SEGGER_SYSVIEW_RTT_CHANNEL == 0) && (SEGGER_RTT_MAX_NUM_UP_BUFFERS < 2)
+  #error "SEGGER_RTT_MAX_NUM_UP_BUFFERS in SEGGER_RTT_Conf.h has to be > 1!"
+#elif (SEGGER_SYSVIEW_RTT_CHANNEL >= SEGGER_RTT_MAX_NUM_UP_BUFFERS)
+  #error "SEGGER_RTT_MAX_NUM_UP_BUFFERS  in SEGGER_RTT_Conf.h has to be > SEGGER_SYSVIEW_RTT_CHANNEL!"
+#endif
+
+// Place the SystemView buffer into its own/the RTT section
+#if !(defined SEGGER_SYSVIEW_BUFFER_SECTION) && (defined SEGGER_RTT_SECTION)
+  #define SEGGER_SYSVIEW_BUFFER_SECTION            SEGGER_RTT_SECTION
+#endif
+
+// Retrieve a system timestamp.  This gets the Cortex-M cycle counter.
+#ifndef   SEGGER_SYSVIEW_GET_TIMESTAMP
+  #error "SEGGER_SYSVIEW_GET_TIMESTAMP has to be defined in SEGGER_SYSVIEW_Conf.h!"
+#endif
+
+// Define number of valid bits low-order delivered by clock source.
+#ifndef   SEGGER_SYSVIEW_TIMESTAMP_BITS
+  #define SEGGER_SYSVIEW_TIMESTAMP_BITS     32
+#endif
+
+// Lowest Id reported by the Application.
+#ifndef   SEGGER_SYSVIEW_ID_BASE 
+  #define SEGGER_SYSVIEW_ID_BASE            0
+#endif
+
+// Number of bits to shift Ids to save bandwidth
+#ifndef   SEGGER_SYSVIEW_ID_SHIFT
+  #define SEGGER_SYSVIEW_ID_SHIFT           0
+#endif
+
+#ifndef   SEGGER_SYSVIEW_GET_INTERRUPT_ID
+  #error "SEGGER_SYSVIEW_GET_INTERRUPT_ID has to be defined in SEGGER_SYSVIEW_Conf.h!"
+#endif
+
+#ifndef   SEGGER_SYSVIEW_MAX_ARGUMENTS
+  #define SEGGER_SYSVIEW_MAX_ARGUMENTS      16
+#endif
+
+#ifndef   SEGGER_SYSVIEW_MAX_STRING_LEN
+  #define SEGGER_SYSVIEW_MAX_STRING_LEN     128
+#endif
+
+// Use a static buffer instead of a buffer on the stack for packets
+#ifndef   SEGGER_SYSVIEW_USE_STATIC_BUFFER
+  #define SEGGER_SYSVIEW_USE_STATIC_BUFFER  1
+#endif
+
+// Maximum packet size used by SystemView for the static buffer
+#ifndef   SEGGER_SYSVIEW_MAX_PACKET_SIZE
+  #define SEGGER_SYSVIEW_MAX_PACKET_SIZE   SEGGER_SYSVIEW_INFO_SIZE + SEGGER_SYSVIEW_MAX_STRING_LEN + 2 * SEGGER_SYSVIEW_QUANTA_U32 + SEGGER_SYSVIEW_MAX_ARGUMENTS * SEGGER_SYSVIEW_QUANTA_U32
+#endif
+
+// Use post-mortem analysis instead of real-time analysis
+#ifndef   SEGGER_SYSVIEW_POST_MORTEM_MODE
+  #define SEGGER_SYSVIEW_POST_MORTEM_MODE   0
+#endif
+
+// Configure how frequently syncronization is sent
+#ifndef   SEGGER_SYSVIEW_SYNC_PERIOD_SHIFT
+  #define SEGGER_SYSVIEW_SYNC_PERIOD_SHIFT  8
+#endif
+
+// Lock SystemView (nestable)
+#ifndef   SEGGER_SYSVIEW_LOCK
+  #define SEGGER_SYSVIEW_LOCK()             SEGGER_RTT_LOCK()
+#endif
+
+// Unlock SystemView (nestable)
+#ifndef   SEGGER_SYSVIEW_UNLOCK
+  #define SEGGER_SYSVIEW_UNLOCK()           SEGGER_RTT_UNLOCK()
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+
+/*************************** End of file ****************************/

components/app_trace/sys_view/SEGGER/SEGGER_SYSVIEW_Int.h

@@ -0,0 +1,110 @@
+/*********************************************************************
+*                SEGGER Microcontroller GmbH & Co. KG                *
+*                        The Embedded Experts                        *
+**********************************************************************
+*                                                                    *
+*       (c) 2015 - 2017  SEGGER Microcontroller GmbH & Co. KG        *
+*                                                                    *
+*       www.segger.com     Support: support@segger.com               *
+*                                                                    *
+**********************************************************************
+*                                                                    *
+*       SEGGER SystemView * Real-time application analysis           *
+*                                                                    *
+**********************************************************************
+*                                                                    *
+* All rights reserved.                                               *
+*                                                                    *
+* SEGGER strongly recommends to not make any changes                 *
+* to or modify the source code of this software in order to stay     *
+* compatible with the RTT protocol and J-Link.                       *
+*                                                                    *
+* Redistribution and use in source and binary forms, with or         *
+* without modification, are permitted provided that the following    *
+* conditions are met:                                                *
+*                                                                    *
+* o Redistributions of source code must retain the above copyright   *
+*   notice, this list of conditions and the following disclaimer.    *
+*                                                                    *
+* o Redistributions in binary form must reproduce the above          *
+*   copyright notice, this list of conditions and the following      *
+*   disclaimer in the documentation and/or other materials provided  *
+*   with the distribution.                                           *
+*                                                                    *
+* o Neither the name of SEGGER Microcontroller GmbH & Co. KG         *
+*   nor the names of its contributors may be used to endorse or      *
+*   promote products derived from this software without specific     *
+*   prior written permission.                                        *
+*                                                                    *
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND             *
+* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,        *
+* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF           *
+* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE           *
+* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR *
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR           *
+* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT  *
+* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;    *
+* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF      *
+* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT          *
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE  *
+* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH   *
+* DAMAGE.                                                            *
+*                                                                    *
+**********************************************************************
+*                                                                    *
+*       SystemView version: V2.42                                    *
+*                                                                    *
+**********************************************************************
+-------------------------- END-OF-HEADER -----------------------------
+File    : SEGGER_SYSVIEW_Int.h
+Purpose : SEGGER SystemView internal header.
+Revision: $Rev: 5626 $
+*/
+
+#ifndef SEGGER_SYSVIEW_INT_H
+#define SEGGER_SYSVIEW_INT_H
+
+/*********************************************************************
+*
+*       #include Section
+*
+**********************************************************************
+*/
+
+#include "SEGGER_SYSVIEW.h"
+#include "SEGGER_SYSVIEW_Conf.h"
+#include "SEGGER_SYSVIEW_ConfDefaults.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+/*********************************************************************
+*
+*       Private data types
+*
+**********************************************************************
+*/
+//
+// Commands that Host can send to target
+//
+typedef enum {
+  SEGGER_SYSVIEW_COMMAND_ID_START = 1,
+  SEGGER_SYSVIEW_COMMAND_ID_STOP,
+  SEGGER_SYSVIEW_COMMAND_ID_GET_SYSTIME,
+  SEGGER_SYSVIEW_COMMAND_ID_GET_TASKLIST,
+  SEGGER_SYSVIEW_COMMAND_ID_GET_SYSDESC,
+  SEGGER_SYSVIEW_COMMAND_ID_GET_NUMMODULES,
+  SEGGER_SYSVIEW_COMMAND_ID_GET_MODULEDESC,
+  // Extended commands: Commands >= 128 have a second parameter
+  SEGGER_SYSVIEW_COMMAND_ID_GET_MODULE = 128
+} SEGGER_SYSVIEW_COMMAND_ID;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+
+/*************************** End of file ****************************/

components/app_trace/sys_view/Sample/Config/SEGGER_SYSVIEW_Config_FreeRTOS.c

@@ -0,0 +1,352 @@
+/*********************************************************************
+*                SEGGER Microcontroller GmbH & Co. KG                *
+*                        The Embedded Experts                        *
+**********************************************************************
+*                                                                    *
+*       (c) 2015 - 2017  SEGGER Microcontroller GmbH & Co. KG        *
+*                                                                    *
+*       www.segger.com     Support: support@segger.com               *
+*                                                                    *
+**********************************************************************
+*                                                                    *
+*       SEGGER SystemView * Real-time application analysis           *
+*                                                                    *
+**********************************************************************
+*                                                                    *
+* All rights reserved.                                               *
+*                                                                    *
+* SEGGER strongly recommends to not make any changes                 *
+* to or modify the source code of this software in order to stay     *
+* compatible with the RTT protocol and J-Link.                       *
+*                                                                    *
+* Redistribution and use in source and binary forms, with or         *
+* without modification, are permitted provided that the following    *
+* conditions are met:                                                *
+*                                                                    *
+* o Redistributions of source code must retain the above copyright   *
+*   notice, this list of conditions and the following disclaimer.    *
+*                                                                    *
+* o Redistributions in binary form must reproduce the above          *
+*   copyright notice, this list of conditions and the following      *
+*   disclaimer in the documentation and/or other materials provided  *
+*   with the distribution.                                           *
+*                                                                    *
+* o Neither the name of SEGGER Microcontroller GmbH & Co. KG         *
+*   nor the names of its contributors may be used to endorse or      *
+*   promote products derived from this software without specific     *
+*   prior written permission.                                        *
+*                                                                    *
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND             *
+* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,        *
+* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF           *
+* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE           *
+* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR *
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR           *
+* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT  *
+* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;    *
+* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF      *
+* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT          *
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE  *
+* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH   *
+* DAMAGE.                                                            *
+*                                                                    *
+**********************************************************************
+*                                                                    *
+*       SystemView version: V2.42                                    *
+*                                                                    *
+**********************************************************************
+-------------------------- END-OF-HEADER -----------------------------
+
+File    : SEGGER_SYSVIEW_Config_FreeRTOS.c
+Purpose : Sample setup configuration of SystemView with FreeRTOS.
+Revision: $Rev: 3734 $
+*/
+#include "freertos/FreeRTOS.h"
+#include "SEGGER_SYSVIEW.h"
+#include "rom/ets_sys.h"
+#include "esp_app_trace.h"
+#include "esp_app_trace_util.h"
+#include "esp_intr_alloc.h"
+#include "esp_clk.h"
+
+extern const SEGGER_SYSVIEW_OS_API SYSVIEW_X_OS_TraceAPI;
+
+/*********************************************************************
+*
+*       Defines, configurable
+*
+**********************************************************************
+*/
+// The application name to be displayed in SystemViewer
+#define SYSVIEW_APP_NAME        "FreeRTOS Application"
+
+// The target device name
+#define SYSVIEW_DEVICE_NAME     "ESP32"
+
+// Determine which timer to use as timestamp source
+#if CONFIG_SYSVIEW_TS_SOURCE_CCOUNT
+#define TS_USE_CCOUNT 1
+#elif CONFIG_SYSVIEW_TS_SOURCE_ESP_TIMER
+#define TS_USE_ESP_TIMER 1
+#else
+#define TS_USE_TIMERGROUP 1
+#endif
+
+#if TS_USE_TIMERGROUP
+#include "driver/timer.h"
+
+// Timer group timer divisor
+#define SYSVIEW_TIMER_DIV       2
+
+// Frequency of the timestamp.
+#define SYSVIEW_TIMESTAMP_FREQ  (esp_clk_apb_freq() / SYSVIEW_TIMER_DIV)
+
+// Timer ID and group ID
+#if defined(CONFIG_SYSVIEW_TS_SOURCE_TIMER_00) || defined(CONFIG_SYSVIEW_TS_SOURCE_TIMER_01)
+#define TS_TIMER_ID 0
+#else
+#define TS_TIMER_ID 1
+#endif // TIMER_00 || TIMER_01
+
+#if defined(CONFIG_SYSVIEW_TS_SOURCE_TIMER_00) || defined(CONFIG_SYSVIEW_TS_SOURCE_TIMER_10)
+#define TS_TIMER_GROUP 0
+#else
+#define TS_TIMER_GROUP 1
+#endif // TIMER_00 || TIMER_10
+
+#endif // TS_USE_TIMERGROUP
+
+#if TS_USE_ESP_TIMER
+// esp_timer provides 1us resolution
+#define SYSVIEW_TIMESTAMP_FREQ  (1000000)
+#endif // TS_USE_ESP_TIMER
+
+#if TS_USE_CCOUNT
+// CCOUNT is incremented at CPU frequency
+#define SYSVIEW_TIMESTAMP_FREQ  (CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ * 1000000)
+#endif // TS_USE_CCOUNT
+
+// System Frequency.
+#define SYSVIEW_CPU_FREQ        (esp_clk_cpu_freq())
+
+// The lowest RAM address used for IDs (pointers)
+#define SYSVIEW_RAM_BASE        (0x3F400000)
+
+#if CONFIG_FREERTOS_CORETIMER_0
+    #define SYSTICK_INTR_ID (ETS_INTERNAL_TIMER0_INTR_SOURCE+ETS_INTERNAL_INTR_SOURCE_OFF)
+#endif
+#if CONFIG_FREERTOS_CORETIMER_1
+    #define SYSTICK_INTR_ID (ETS_INTERNAL_TIMER1_INTR_SOURCE+ETS_INTERNAL_INTR_SOURCE_OFF)
+#endif
+
+// SystemView is single core specific: it implies that SEGGER_SYSVIEW_LOCK()
+// disables IRQs (disables rescheduling globally). So we can not use finite timeouts for locks and return error
+// in case of expiration, because error will not be handled and SEGGER's code will go further implying that
+// everything is fine, so for multi-core env we have to wait on underlying lock forever
+#define SEGGER_LOCK_WAIT_TMO  ESP_APPTRACE_TMO_INFINITE
+
+static esp_apptrace_lock_t s_sys_view_lock = {.mux = portMUX_INITIALIZER_UNLOCKED, .int_state = 0};
+
+static const char * const s_isr_names[] = {
+    [0] = "WIFI_MAC",
+    [1] = "WIFI_NMI",
+    [2] = "WIFI_BB",
+    [3] = "BT_MAC",
+    [4] = "BT_BB",
+    [5] = "BT_BB_NMI",
+    [6] = "RWBT",
+    [7] = "RWBLE",
+    [8] = "RWBT_NMI",
+    [9] = "RWBLE_NMI",
+    [10] = "SLC0",
+    [11] = "SLC1",
+    [12] = "UHCI0",
+    [13] = "UHCI1",
+    [14] = "TG0_T0_LEVEL",
+    [15] = "TG0_T1_LEVEL",
+    [16] = "TG0_WDT_LEVEL",
+    [17] = "TG0_LACT_LEVEL",
+    [18] = "TG1_T0_LEVEL",
+    [19] = "TG1_T1_LEVEL",
+    [20] = "TG1_WDT_LEVEL",
+    [21] = "TG1_LACT_LEVEL",
+    [22] = "GPIO",
+    [23] = "GPIO_NMI",
+    [24] = "FROM_CPU0",
+    [25] = "FROM_CPU1",
+    [26] = "FROM_CPU2",
+    [27] = "FROM_CPU3",
+    [28] = "SPI0",
+    [29] = "SPI1",
+    [30] = "SPI2",
+    [31] = "SPI3",
+    [32] = "I2S0",
+    [33] = "I2S1",
+    [34] = "UART0",
+    [35] = "UART1",
+    [36] = "UART2",
+    [37] = "SDIO_HOST",
+    [38] = "ETH_MAC",
+    [39] = "PWM0",
+    [40] = "PWM1",
+    [41] = "PWM2",
+    [42] = "PWM3",
+    [43] = "LEDC",
+    [44] = "EFUSE",
+    [45] = "CAN",
+    [46] = "RTC_CORE",
+    [47] = "RMT",
+    [48] = "PCNT",
+    [49] = "I2C_EXT0",
+    [50] = "I2C_EXT1",
+    [51] = "RSA",
+    [52] = "SPI1_DMA",
+    [53] = "SPI2_DMA",
+    [54] = "SPI3_DMA",
+    [55] = "WDT",
+    [56] = "TIMER1",
+    [57] = "TIMER2",
+    [58] = "TG0_T0_EDGE",
+    [59] = "TG0_T1_EDGE",
+    [60] = "TG0_WDT_EDGE",
+    [61] = "TG0_LACT_EDGE",
+    [62] = "TG1_T0_EDGE",
+    [63] = "TG1_T1_EDGE",
+    [64] = "TG1_WDT_EDGE",
+    [65] = "TG1_LACT_EDGE",
+    [66] = "MMU_IA",
+    [67] = "MPU_IA",
+    [68] = "CACHE_IA",
+};
+
+/*********************************************************************
+*
+*       _cbSendSystemDesc()
+*
+*  Function description
+*    Sends SystemView description strings.
+*/
+static void _cbSendSystemDesc(void) {
+    char irq_str[32];
+    SEGGER_SYSVIEW_SendSysDesc("N="SYSVIEW_APP_NAME",D="SYSVIEW_DEVICE_NAME",C=Xtensa,O=FreeRTOS");
+    snprintf(irq_str, sizeof(irq_str), "I#%d=SysTick", SYSTICK_INTR_ID);
+    SEGGER_SYSVIEW_SendSysDesc(irq_str);
+    size_t isr_count = sizeof(s_isr_names)/sizeof(s_isr_names[0]);
+    for (size_t i = 0; i < isr_count; ++i) {
+        snprintf(irq_str, sizeof(irq_str), "I#%d=%s", ETS_INTERNAL_INTR_SOURCE_OFF + i, s_isr_names[i]);
+        SEGGER_SYSVIEW_SendSysDesc(irq_str);
+    }
+}
+
+/*********************************************************************
+*
+*       Global functions
+*
+**********************************************************************
+*/
+static void SEGGER_SYSVIEW_TS_Init()
+{
+    /* We only need to initialize something if we use Timer Group.
+     * esp_timer and ccount can be used as is.
+     */
+#if TS_USE_TIMERGROUP
+    timer_config_t config = {
+        .alarm_en = 0,
+        .auto_reload = 0,
+        .counter_dir = TIMER_COUNT_UP,
+        .divider = SYSVIEW_TIMER_DIV,
+        .counter_en = 0
+    };
+    /* Configure timer */
+    timer_init(TS_TIMER_GROUP, TS_TIMER_ID, &config);
+    /* Load counter value */
+    timer_set_counter_value(TS_TIMER_GROUP, TS_TIMER_ID, 0x00000000ULL);
+    /* Start counting */
+    timer_start(TS_TIMER_GROUP, TS_TIMER_ID);
+#endif // TS_USE_TIMERGROUP
+}
+
+void SEGGER_SYSVIEW_Conf(void) {
+    U32 disable_evts = 0;
+
+    SEGGER_SYSVIEW_TS_Init();
+    SEGGER_SYSVIEW_Init(SYSVIEW_TIMESTAMP_FREQ, SYSVIEW_CPU_FREQ,
+                        &SYSVIEW_X_OS_TraceAPI, _cbSendSystemDesc);
+    SEGGER_SYSVIEW_SetRAMBase(SYSVIEW_RAM_BASE);
+
+#if !CONFIG_SYSVIEW_EVT_OVERFLOW_ENABLE
+    disable_evts |= SYSVIEW_EVTMASK_OVERFLOW;
+#endif
+#if !CONFIG_SYSVIEW_EVT_ISR_ENTER_ENABLE
+    disable_evts |= SYSVIEW_EVTMASK_ISR_ENTER;
+#endif
+#if !CONFIG_SYSVIEW_EVT_ISR_EXIT_ENABLE
+    disable_evts |= SYSVIEW_EVTMASK_ISR_EXIT;
+#endif
+#if !CONFIG_SYSVIEW_EVT_TASK_START_EXEC_ENABLE
+    disable_evts |= SYSVIEW_EVTMASK_TASK_START_EXEC;
+#endif
+#if !CONFIG_SYSVIEW_EVT_TASK_STOP_EXEC_ENABLE
+    disable_evts |= SYSVIEW_EVTMASK_TASK_STOP_EXEC;
+#endif
+#if !CONFIG_SYSVIEW_EVT_TASK_START_READY_ENABLE
+    disable_evts |= SYSVIEW_EVTMASK_TASK_START_READY;
+#endif
+#if !CONFIG_SYSVIEW_EVT_TASK_STOP_READY_ENABLE
+    disable_evts |= SYSVIEW_EVTMASK_TASK_STOP_READY;
+#endif
+#if !CONFIG_SYSVIEW_EVT_TASK_CREATE_ENABLE
+    disable_evts |= SYSVIEW_EVTMASK_TASK_CREATE;
+#endif
+#if !CONFIG_SYSVIEW_EVT_TASK_TERMINATE_ENABLE
+    disable_evts |= SYSVIEW_EVTMASK_TASK_TERMINATE;
+#endif
+#if !CONFIG_SYSVIEW_EVT_IDLE_ENABLE
+    disable_evts |= SYSVIEW_EVTMASK_IDLE;
+#endif
+#if !CONFIG_SYSVIEW_EVT_ISR_TO_SCHEDULER_ENABLE
+    disable_evts |= SYSVIEW_EVTMASK_ISR_TO_SCHEDULER;
+#endif
+#if !CONFIG_SYSVIEW_EVT_TIMER_ENTER_ENABLE
+    disable_evts |= SYSVIEW_EVTMASK_TIMER_ENTER;
+#endif
+#if !CONFIG_SYSVIEW_EVT_TIMER_EXIT_ENABLE
+    disable_evts |= SYSVIEW_EVTMASK_TIMER_EXIT;
+#endif
+  SEGGER_SYSVIEW_DisableEvents(disable_evts);
+}
+
+U32 SEGGER_SYSVIEW_X_GetTimestamp()
+{
+#if TS_USE_TIMERGROUP
+    uint64_t ts = 0;
+    timer_get_counter_value(TS_TIMER_GROUP, TS_TIMER_ID, &ts);
+    return (U32) ts; // return lower part of counter value
+#elif TS_USE_CCOUNT
+    return portGET_RUN_TIME_COUNTER_VALUE();
+#elif TS_USE_ESP_TIMER
+    return (U32) esp_timer_get_time(); // return lower part of counter value
+#endif
+}
+
+void SEGGER_SYSVIEW_X_RTT_Lock()
+{
+}
+
+void SEGGER_SYSVIEW_X_RTT_Unlock()
+{
+}
+
+void SEGGER_SYSVIEW_X_SysView_Lock()
+{
+    esp_apptrace_tmo_t tmo;
+    esp_apptrace_tmo_init(&tmo, SEGGER_LOCK_WAIT_TMO);
+    esp_apptrace_lock_take(&s_sys_view_lock, &tmo);
+}
+
+void SEGGER_SYSVIEW_X_SysView_Unlock()
+{
+    esp_apptrace_lock_give(&s_sys_view_lock);
+}
+
+/*************************** End of file ****************************/

components/app_trace/sys_view/Sample/OS/SEGGER_SYSVIEW_FreeRTOS.c

@@ -0,0 +1,290 @@
+/*********************************************************************
+*                SEGGER Microcontroller GmbH & Co. KG                *
+*                        The Embedded Experts                        *
+**********************************************************************
+*                                                                    *
+*       (c) 2015 - 2017  SEGGER Microcontroller GmbH & Co. KG        *
+*                                                                    *
+*       www.segger.com     Support: support@segger.com               *
+*                                                                    *
+**********************************************************************
+*                                                                    *
+*       SEGGER SystemView * Real-time application analysis           *
+*                                                                    *
+**********************************************************************
+*                                                                    *
+* All rights reserved.                                               *
+*                                                                    *
+* SEGGER strongly recommends to not make any changes                 *
+* to or modify the source code of this software in order to stay     *
+* compatible with the RTT protocol and J-Link.                       *
+*                                                                    *
+* Redistribution and use in source and binary forms, with or         *
+* without modification, are permitted provided that the following    *
+* conditions are met:                                                *
+*                                                                    *
+* o Redistributions of source code must retain the above copyright   *
+*   notice, this list of conditions and the following disclaimer.    *
+*                                                                    *
+* o Redistributions in binary form must reproduce the above          *
+*   copyright notice, this list of conditions and the following      *
+*   disclaimer in the documentation and/or other materials provided  *
+*   with the distribution.                                           *
+*                                                                    *
+* o Neither the name of SEGGER Microcontroller GmbH & Co. KG         *
+*   nor the names of its contributors may be used to endorse or      *
+*   promote products derived from this software without specific     *
+*   prior written permission.                                        *
+*                                                                    *
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND             *
+* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,        *
+* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF           *
+* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE           *
+* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR *
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR           *
+* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT  *
+* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;    *
+* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF      *
+* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT          *
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE  *
+* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH   *
+* DAMAGE.                                                            *
+*                                                                    *
+**********************************************************************
+*                                                                    *
+*       SystemView version: V2.42                                    *
+*                                                                    *
+**********************************************************************
+-------------------------- END-OF-HEADER -----------------------------
+
+File    : SEGGER_SYSVIEW_FreeRTOS.c
+Purpose : Interface between FreeRTOS and SystemView.
+Revision: $Rev: 3734 $
+*/
+#include "freertos/FreeRTOS.h"
+#include "freertos/task.h"
+#include "SEGGER_SYSVIEW.h"
+#include "SEGGER_SYSVIEW_FreeRTOS.h"
+#include "string.h" // Required for memset
+
+
+
+typedef struct SYSVIEW_FREERTOS_TASK_STATUS SYSVIEW_FREERTOS_TASK_STATUS;
+
+struct SYSVIEW_FREERTOS_TASK_STATUS {
+  U32         xHandle;
+  const char* pcTaskName;
+  unsigned    uxCurrentPriority;
+  U32         pxStack;
+  unsigned    uStackHighWaterMark;
+};
+
+static SYSVIEW_FREERTOS_TASK_STATUS _aTasks[SYSVIEW_FREERTOS_MAX_NOF_TASKS];
+
+/*********************************************************************
+*
+*       _cbSendTaskList()
+*
+*  Function description
+*    This function is part of the link between FreeRTOS and SYSVIEW.
+*    Called from SystemView when asked by the host, it uses SYSVIEW
+*    functions to send the entire task list to the host.
+*/
+static void _cbSendTaskList(void) {
+  unsigned n;
+
+  for (n = 0; n < SYSVIEW_FREERTOS_MAX_NOF_TASKS; n++) {
+    if (_aTasks[n].xHandle) {
+#if INCLUDE_uxTaskGetStackHighWaterMark // Report Task Stack High Watermark
+      _aTasks[n].uStackHighWaterMark = uxTaskGetStackHighWaterMark((TaskHandle_t)_aTasks[n].xHandle);
+#endif
+      SYSVIEW_SendTaskInfo((U32)_aTasks[n].xHandle, _aTasks[n].pcTaskName, (unsigned)_aTasks[n].uxCurrentPriority, (U32)_aTasks[n].pxStack, (unsigned)_aTasks[n].uStackHighWaterMark);
+    }
+  }
+}
+
+/*********************************************************************
+*
+*       _cbGetTime()
+*
+*  Function description
+*    This function is part of the link between FreeRTOS and SYSVIEW.
+*    Called from SystemView when asked by the host, returns the
+*    current system time in micro seconds.
+*/
+static U64 _cbGetTime(void) {
+  U64 Time;
+
+  Time = xTaskGetTickCountFromISR();
+  Time *= portTICK_PERIOD_MS;
+  Time *= 1000;
+  return Time;
+}
+
+/*********************************************************************
+*
+*       Global functions
+*
+**********************************************************************
+*/
+/*********************************************************************
+*
+*       SYSVIEW_AddTask()
+*
+*  Function description
+*    Add a task to the internal list and record its information.
+*/
+void SYSVIEW_AddTask(U32 xHandle, const char* pcTaskName, unsigned uxCurrentPriority, U32  pxStack, unsigned uStackHighWaterMark) {
+  unsigned n;
+  
+  if (memcmp(pcTaskName, "IDLE", 5) == 0) {
+    return;
+  }
+  
+  for (n = 0; n < SYSVIEW_FREERTOS_MAX_NOF_TASKS; n++) {
+    if (_aTasks[n].xHandle == 0) {
+      break;
+    }
+  }
+  if (n == SYSVIEW_FREERTOS_MAX_NOF_TASKS) {
+    SEGGER_SYSVIEW_Warn("SYSTEMVIEW: Could not record task information. Maximum number of tasks reached.");
+    return;
+  }
+
+  _aTasks[n].xHandle = xHandle;
+  _aTasks[n].pcTaskName = pcTaskName;
+  _aTasks[n].uxCurrentPriority = uxCurrentPriority;
+  _aTasks[n].pxStack = pxStack;
+  _aTasks[n].uStackHighWaterMark = uStackHighWaterMark;
+
+  SYSVIEW_SendTaskInfo(xHandle, pcTaskName,uxCurrentPriority, pxStack, uStackHighWaterMark);
+
+}
+
+/*********************************************************************
+*
+*       SYSVIEW_UpdateTask()
+*
+*  Function description
+*    Update a task in the internal list and record its information.
+*/
+void SYSVIEW_UpdateTask(U32 xHandle, const char* pcTaskName, unsigned uxCurrentPriority, U32 pxStack, unsigned uStackHighWaterMark) {
+  unsigned n;
+  
+  if (memcmp(pcTaskName, "IDLE", 5) == 0) {
+    return;
+  }
+
+  for (n = 0; n < SYSVIEW_FREERTOS_MAX_NOF_TASKS; n++) {
+    if (_aTasks[n].xHandle == xHandle) {
+      break;
+    }
+  }
+  if (n < SYSVIEW_FREERTOS_MAX_NOF_TASKS) {
+    _aTasks[n].pcTaskName = pcTaskName;
+    _aTasks[n].uxCurrentPriority = uxCurrentPriority;
+    _aTasks[n].pxStack = pxStack;
+    _aTasks[n].uStackHighWaterMark = uStackHighWaterMark;
+
+    SYSVIEW_SendTaskInfo(xHandle, pcTaskName, uxCurrentPriority, pxStack, uStackHighWaterMark);
+  } else {
+    SYSVIEW_AddTask(xHandle, pcTaskName, uxCurrentPriority, pxStack, uStackHighWaterMark);
+  }
+}
+
+/*********************************************************************
+*
+*       SYSVIEW_DeleteTask()
+*
+*  Function description
+*    Delete a task from the internal list.
+*/
+void SYSVIEW_DeleteTask(U32 xHandle) {
+  unsigned n;
+
+  for (n = 0; n < SYSVIEW_FREERTOS_MAX_NOF_TASKS; n++) {
+    if (_aTasks[n].xHandle == xHandle) {
+      break;
+    }
+  }
+  if (n == SYSVIEW_FREERTOS_MAX_NOF_TASKS) {
+    SEGGER_SYSVIEW_Warn("SYSTEMVIEW: Could not find task information. Cannot delete task.");
+    return;
+  }
+
+  _aTasks[n].xHandle = 0;
+}
+
+/*********************************************************************
+*
+*       SYSVIEW_SendTaskInfo()
+*
+*  Function description
+*    Record task information.
+*/
+void SYSVIEW_SendTaskInfo(U32 TaskID, const char* sName, unsigned Prio, U32 StackBase, unsigned StackSize) {
+  SEGGER_SYSVIEW_TASKINFO TaskInfo;
+
+  memset(&TaskInfo, 0, sizeof(TaskInfo)); // Fill all elements with 0 to allow extending the structure in future version without breaking the code
+  TaskInfo.TaskID     = TaskID;
+  TaskInfo.sName      = sName;
+  TaskInfo.Prio       = Prio;
+  TaskInfo.StackBase  = StackBase;
+  TaskInfo.StackSize  = StackSize;
+  SEGGER_SYSVIEW_SendTaskInfo(&TaskInfo);
+}
+
+/*********************************************************************
+*
+*       SYSVIEW_RecordU32x4()
+*
+*  Function description
+*    Record an event with 4 parameters
+*/
+void SYSVIEW_RecordU32x4(unsigned Id, U32 Para0, U32 Para1, U32 Para2, U32 Para3) {
+      U8  aPacket[SEGGER_SYSVIEW_INFO_SIZE + 4 * SEGGER_SYSVIEW_QUANTA_U32];
+      U8* pPayload;
+      //
+      pPayload = SEGGER_SYSVIEW_PREPARE_PACKET(aPacket);                // Prepare the packet for SystemView
+      pPayload = SEGGER_SYSVIEW_EncodeU32(pPayload, Para0);             // Add the first parameter to the packet
+      pPayload = SEGGER_SYSVIEW_EncodeU32(pPayload, Para1);             // Add the second parameter to the packet
+      pPayload = SEGGER_SYSVIEW_EncodeU32(pPayload, Para2);             // Add the third parameter to the packet
+      pPayload = SEGGER_SYSVIEW_EncodeU32(pPayload, Para3);             // Add the fourth parameter to the packet
+      //
+      SEGGER_SYSVIEW_SendPacket(&aPacket[0], pPayload, Id);             // Send the packet
+}
+
+/*********************************************************************
+*
+*       SYSVIEW_RecordU32x5()
+*
+*  Function description
+*    Record an event with 5 parameters
+*/
+void SYSVIEW_RecordU32x5(unsigned Id, U32 Para0, U32 Para1, U32 Para2, U32 Para3, U32 Para4) {
+      U8  aPacket[SEGGER_SYSVIEW_INFO_SIZE + 5 * SEGGER_SYSVIEW_QUANTA_U32];
+      U8* pPayload;
+      //
+      pPayload = SEGGER_SYSVIEW_PREPARE_PACKET(aPacket);                // Prepare the packet for SystemView
+      pPayload = SEGGER_SYSVIEW_EncodeU32(pPayload, Para0);             // Add the first parameter to the packet
+      pPayload = SEGGER_SYSVIEW_EncodeU32(pPayload, Para1);             // Add the second parameter to the packet
+      pPayload = SEGGER_SYSVIEW_EncodeU32(pPayload, Para2);             // Add the third parameter to the packet
+      pPayload = SEGGER_SYSVIEW_EncodeU32(pPayload, Para3);             // Add the fourth parameter to the packet
+      pPayload = SEGGER_SYSVIEW_EncodeU32(pPayload, Para4);             // Add the fifth parameter to the packet
+      //
+      SEGGER_SYSVIEW_SendPacket(&aPacket[0], pPayload, Id);             // Send the packet
+}
+
+/*********************************************************************
+*
+*       Public API structures
+*
+**********************************************************************
+*/
+// Callbacks provided to SYSTEMVIEW by FreeRTOS
+const SEGGER_SYSVIEW_OS_API SYSVIEW_X_OS_TraceAPI = {
+  _cbGetTime,
+  _cbSendTaskList,
+};
+
+/*************************** End of file ****************************/

components/app_trace/sys_view/Sample/OS/SEGGER_SYSVIEW_FreeRTOS.h

@@ -0,0 +1,335 @@
+/*********************************************************************
+*                SEGGER Microcontroller GmbH & Co. KG                *
+*                        The Embedded Experts                        *
+**********************************************************************
+*                                                                    *
+*       (c) 2015 - 2017  SEGGER Microcontroller GmbH & Co. KG        *
+*                                                                    *
+*       www.segger.com     Support: support@segger.com               *
+*                                                                    *
+**********************************************************************
+*                                                                    *
+*       SEGGER SystemView * Real-time application analysis           *
+*                                                                    *
+**********************************************************************
+*                                                                    *
+* All rights reserved.                                               *
+*                                                                    *
+* SEGGER strongly recommends to not make any changes                 *
+* to or modify the source code of this software in order to stay     *
+* compatible with the RTT protocol and J-Link.                       *
+*                                                                    *
+* Redistribution and use in source and binary forms, with or         *
+* without modification, are permitted provided that the following    *
+* conditions are met:                                                *
+*                                                                    *
+* o Redistributions of source code must retain the above copyright   *
+*   notice, this list of conditions and the following disclaimer.    *
+*                                                                    *
+* o Redistributions in binary form must reproduce the above          *
+*   copyright notice, this list of conditions and the following      *
+*   disclaimer in the documentation and/or other materials provided  *
+*   with the distribution.                                           *
+*                                                                    *
+* o Neither the name of SEGGER Microcontroller GmbH & Co. KG         *
+*   nor the names of its contributors may be used to endorse or      *
+*   promote products derived from this software without specific     *
+*   prior written permission.                                        *
+*                                                                    *
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND             *
+* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,        *
+* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF           *
+* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE           *
+* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR *
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR           *
+* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT  *
+* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;    *
+* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF      *
+* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT          *
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE  *
+* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH   *
+* DAMAGE.                                                            *
+*                                                                    *
+**********************************************************************
+*                                                                    *
+*       SystemView version: V2.42                                    *
+*                                                                    *
+**********************************************************************
+-------------------------- END-OF-HEADER -----------------------------
+
+File    : SEGGER_SYSVIEW_FreeRTOS.h
+Purpose : Interface between FreeRTOS and SystemView.
+Revision: $Rev: 3734 $
+
+Notes:
+  (1) Include this file at the end of FreeRTOSConfig.h
+*/
+
+#ifndef SYSVIEW_FREERTOS_H
+#define SYSVIEW_FREERTOS_H
+
+#include "SEGGER_SYSVIEW.h"
+
+/*********************************************************************
+*
+*       Defines, configurable
+*
+**********************************************************************
+*/
+#ifndef portSTACK_GROWTH
+  #define portSTACK_GROWTH              ( -1 )
+#endif
+
+#define SYSVIEW_FREERTOS_MAX_NOF_TASKS  16
+
+/*********************************************************************
+*
+*       Defines, fixed
+*
+**********************************************************************
+*/
+
+// for dual-core targets we use event ID to keep core ID bit (0 or 1)
+// use the highest - 1 bit of event ID to indicate core ID
+// the highest bit can not be used due to event ID encoding method
+// this reduces supported ID range to [0..63] (for 1 byte IDs) plus [128..16383] (for 2 bytes IDs)
+// so original continuous event IDs range is split into two sub-ranges for 1-bytes IDs and 2-bytes ones
+
+// events which use apiFastID_OFFSET will have 1 byte ID,
+// so for the sake of bandwidth economy events which are generated more frequently should use this ID offset
+// currently all used events fall into this range
+#define apiFastID_OFFSET                          (32u)
+
+#define apiID_VTASKDELETE                         (1u)
+#define apiID_VTASKDELAY                          (2u)
+#define apiID_VTASKDELAYUNTIL                     (3u)
+#define apiID_VTASKSUSPEND                        (4u)
+#define apiID_ULTASKNOTIFYTAKE                    (5u)
+#define apiID_VTASKNOTIFYGIVEFROMISR              (6u)
+#define apiID_VTASKPRIORITYINHERIT                (7u)
+#define apiID_VTASKRESUME                         (8u)
+#define apiID_VTASKSTEPTICK                       (9u)
+#define apiID_XTASKPRIORITYDISINHERIT             (10u)
+#define apiID_XTASKRESUMEFROMISR                  (11u)
+#define apiID_XTASKGENERICNOTIFY                  (12u)
+#define apiID_XTASKGENERICNOTIFYFROMISR           (13u)
+#define apiID_XTASKNOTIFYWAIT                     (14u)
+#define apiID_XQUEUEGENERICCREATE                 (15u)
+#define apiID_VQUEUEDELETE                        (16u)
+#define apiID_XQUEUEGENERICRECEIVE                (17u)
+#define apiID_XQUEUEPEEKFROMISR                   (18u)
+#define apiID_XQUEUERECEIVEFROMISR                (19u)
+#define apiID_VQUEUEADDTOREGISTRY                 (20u)
+#define apiID_XQUEUEGENERICSEND                   (21u)
+#define apiID_XQUEUEGENERICSENDFROMISR            (22u)
+#define apiID_VTASKPRIORITYSET                    (23u)
+#define apiID_UXTASKPRIORITYGETFROMISR            (24u)
+#define apiID_XTASKGETTICKCOUNTFROMISR            (25u)
+#define apiID_XEVENTGROUPCLEARBITSFROMISR         (26u)
+#define apiID_XEVENTGROUPSETBITSFROMISR           (27u)
+#define apiID_XEVENTGROUPGETBITSFROMISR           (28u)
+#define apiID_XQUEUEGIVEFROMISR                   (29u)
+#define apiID_XQUEUEISQUEUEEMPTYFROMISR           (30u)
+#define apiID_XQUEUEISQUEUEFULLFROMISR            (31u) // the maximum allowed apiID for the first ID range
+
+// events which use apiSlowID_OFFSET will have 2-bytes ID
+#define apiSlowID_OFFSET                          (127u)
+
+#define apiID_VTASKALLOCATEMPUREGIONS             (1u)
+#define apiID_UXTASKPRIORITYGET                   (2u)
+#define apiID_ETASKGETSTATE                       (3u)
+#define apiID_VTASKSTARTSCHEDULER                 (4u)
+#define apiID_VTASKENDSCHEDULER                   (5u)
+#define apiID_VTASKSUSPENDALL                     (6u)
+#define apiID_XTASKRESUMEALL                      (7u)
+#define apiID_XTASKGETTICKCOUNT                   (8u)
+#define apiID_UXTASKGETNUMBEROFTASKS              (9u)
+#define apiID_PCTASKGETTASKNAME                   (10u)
+#define apiID_UXTASKGETSTACKHIGHWATERMARK         (11u)
+#define apiID_VTASKSETAPPLICATIONTASKTAG          (12u)
+#define apiID_XTASKGETAPPLICATIONTASKTAG          (13u)
+#define apiID_VTASKSETTHREADLOCALSTORAGEPOINTER   (14u)
+#define apiID_PVTASKGETTHREADLOCALSTORAGEPOINTER  (15u)
+#define apiID_XTASKCALLAPPLICATIONTASKHOOK        (16u)
+#define apiID_XTASKGETIDLETASKHANDLE              (17u)
+#define apiID_UXTASKGETSYSTEMSTATE                (18u)
+#define apiID_VTASKLIST                           (19u)
+#define apiID_VTASKGETRUNTIMESTATS                (20u)
+#define apiID_XTASKNOTIFYSTATECLEAR               (21u)
+#define apiID_XTASKGETCURRENTTASKHANDLE           (22u)
+#define apiID_VTASKSETTIMEOUTSTATE                (23u)
+#define apiID_XTASKCHECKFORTIMEOUT                (24u)
+#define apiID_VTASKMISSEDYIELD                    (25u)
+#define apiID_XTASKGETSCHEDULERSTATE              (26u)
+#define apiID_XTASKGENERICCREATE                  (27u)
+#define apiID_UXTASKGETTASKNUMBER                 (28u)
+#define apiID_VTASKSETTASKNUMBER                  (29u)
+#define apiID_ETASKCONFIRMSLEEPMODESTATUS         (30u)
+#define apiID_XTIMERCREATE                        (31u)
+#define apiID_PVTIMERGETTIMERID                   (32u)
+#define apiID_VTIMERSETTIMERID                    (33u)
+#define apiID_XTIMERISTIMERACTIVE                 (34u)
+#define apiID_XTIMERGETTIMERDAEMONTASKHANDLE      (35u)
+#define apiID_XTIMERPENDFUNCTIONCALLFROMISR       (36u)
+#define apiID_XTIMERPENDFUNCTIONCALL              (37u)
+#define apiID_PCTIMERGETTIMERNAME                 (38u)
+#define apiID_XTIMERCREATETIMERTASK               (39u)
+#define apiID_XTIMERGENERICCOMMAND                (40u)
+#define apiID_UXQUEUEMESSAGESWAITING              (41u)
+#define apiID_UXQUEUESPACESAVAILABLE              (42u)
+#define apiID_UXQUEUEMESSAGESWAITINGFROMISR       (43u)
+#define apiID_XQUEUEALTGENERICSEND                (44u)
+#define apiID_XQUEUEALTGENERICRECEIVE             (45u)
+#define apiID_XQUEUECRSENDFROMISR                 (46u)
+#define apiID_XQUEUECRRECEIVEFROMISR              (47u)
+#define apiID_XQUEUECRSEND                        (48u)
+#define apiID_XQUEUECRRECEIVE                     (49u)
+#define apiID_XQUEUECREATEMUTEX                   (50u)
+#define apiID_XQUEUECREATECOUNTINGSEMAPHORE       (51u)
+#define apiID_XQUEUEGETMUTEXHOLDER                (52u)
+#define apiID_XQUEUETAKEMUTEXRECURSIVE            (53u)
+#define apiID_XQUEUEGIVEMUTEXRECURSIVE            (54u)
+#define apiID_VQUEUEUNREGISTERQUEUE               (55u)
+#define apiID_XQUEUECREATESET                     (56u)
+#define apiID_XQUEUEADDTOSET                      (57u)
+#define apiID_XQUEUEREMOVEFROMSET                 (58u)
+#define apiID_XQUEUESELECTFROMSET                 (59u)
+#define apiID_XQUEUESELECTFROMSETFROMISR          (60u)
+#define apiID_XQUEUEGENERICRESET                  (61u)
+#define apiID_VLISTINITIALISE                     (62u)
+#define apiID_VLISTINITIALISEITEM                 (63u)
+#define apiID_VLISTINSERT                         (64u)
+#define apiID_VLISTINSERTEND                      (65u)
+#define apiID_UXLISTREMOVE                        (66u)
+#define apiID_XEVENTGROUPCREATE                   (67u)
+#define apiID_XEVENTGROUPWAITBITS                 (68u)
+#define apiID_XEVENTGROUPCLEARBITS                (69u)
+#define apiID_XEVENTGROUPSETBITS                  (70u)
+#define apiID_XEVENTGROUPSYNC                     (71u)
+#define apiID_VEVENTGROUPDELETE                   (72u)
+#define apiID_UXEVENTGROUPGETNUMBER               (73u)
+
+#define traceTASK_NOTIFY_TAKE()                                       SEGGER_SYSVIEW_RecordU32x2(apiFastID_OFFSET + apiID_ULTASKNOTIFYTAKE, xClearCountOnExit, xTicksToWait)
+#define traceTASK_DELAY()                                             SEGGER_SYSVIEW_RecordU32(apiFastID_OFFSET + apiID_VTASKDELAY, xTicksToDelay)
+#define traceTASK_DELAY_UNTIL()                                       SEGGER_SYSVIEW_RecordVoid(apiFastID_OFFSET + apiID_VTASKDELAYUNTIL)
+#define traceTASK_DELETE( pxTCB )                                     if (pxTCB != NULL) {                                              \
+						                                                SEGGER_SYSVIEW_RecordU32(apiFastID_OFFSET + apiID_VTASKDELETE,  \
+						                                                                      SEGGER_SYSVIEW_ShrinkId((U32)pxTCB)); 	\
+					                                                    SYSVIEW_DeleteTask((U32)pxTCB);                                 \
+					                                                  }
+#define traceTASK_NOTIFY_GIVE_FROM_ISR()                              SEGGER_SYSVIEW_RecordU32x2(apiFastID_OFFSET + apiID_VTASKNOTIFYGIVEFROMISR, SEGGER_SYSVIEW_ShrinkId((U32)pxTCB), (U32)pxHigherPriorityTaskWoken)
+#define traceTASK_PRIORITY_INHERIT( pxTCB, uxPriority )               SEGGER_SYSVIEW_RecordU32(apiFastID_OFFSET + apiID_VTASKPRIORITYINHERIT, (U32)pxMutexHolder)
+#define traceTASK_RESUME( pxTCB )                                     SEGGER_SYSVIEW_RecordU32(apiFastID_OFFSET + apiID_VTASKRESUME, SEGGER_SYSVIEW_ShrinkId((U32)pxTCB))
+#define traceINCREASE_TICK_COUNT( xTicksToJump )                      SEGGER_SYSVIEW_RecordU32(apiFastID_OFFSET + apiID_VTASKSTEPTICK, xTicksToJump)
+#define traceTASK_SUSPEND( pxTCB )                                    SEGGER_SYSVIEW_RecordU32(apiFastID_OFFSET + apiID_VTASKSUSPEND, SEGGER_SYSVIEW_ShrinkId((U32)pxTCB))
+#define traceTASK_PRIORITY_DISINHERIT( pxTCB, uxBasePriority )        SEGGER_SYSVIEW_RecordU32(apiFastID_OFFSET + apiID_XTASKPRIORITYDISINHERIT, (U32)pxMutexHolder)
+#define traceTASK_RESUME_FROM_ISR( pxTCB )                            SEGGER_SYSVIEW_RecordU32(apiFastID_OFFSET + apiID_XTASKRESUMEFROMISR, SEGGER_SYSVIEW_ShrinkId((U32)pxTCB))
+#define traceTASK_NOTIFY()                                            SYSVIEW_RecordU32x4(apiFastID_OFFSET + apiID_XTASKGENERICNOTIFY, SEGGER_SYSVIEW_ShrinkId((U32)pxTCB), ulValue, eAction, (U32)pulPreviousNotificationValue)
+#define traceTASK_NOTIFY_FROM_ISR()                                   SYSVIEW_RecordU32x5(apiFastID_OFFSET + apiID_XTASKGENERICNOTIFYFROMISR, SEGGER_SYSVIEW_ShrinkId((U32)pxTCB), ulValue, eAction, (U32)pulPreviousNotificationValue, (U32)pxHigherPriorityTaskWoken)
+#define traceTASK_NOTIFY_WAIT()                                       SYSVIEW_RecordU32x4(apiFastID_OFFSET + apiID_XTASKNOTIFYWAIT, ulBitsToClearOnEntry, ulBitsToClearOnExit, (U32)pulNotificationValue, xTicksToWait)
+
+#define traceQUEUE_CREATE( pxNewQueue )                               SEGGER_SYSVIEW_RecordU32x3(apiFastID_OFFSET + apiID_XQUEUEGENERICCREATE, uxQueueLength, uxItemSize, ucQueueType)
+#define traceQUEUE_DELETE( pxQueue )                                  SEGGER_SYSVIEW_RecordU32(apiFastID_OFFSET + apiID_VQUEUEDELETE, SEGGER_SYSVIEW_ShrinkId((U32)pxQueue))
+#define traceQUEUE_PEEK( pxQueue )                                    SYSVIEW_RecordU32x4(apiFastID_OFFSET + apiID_XQUEUEGENERICRECEIVE, SEGGER_SYSVIEW_ShrinkId((U32)pxQueue), SEGGER_SYSVIEW_ShrinkId((U32)pvBuffer), xTicksToWait, xJustPeeking)
+#define traceQUEUE_PEEK_FROM_ISR( pxQueue )                           SEGGER_SYSVIEW_RecordU32x2(apiFastID_OFFSET + apiID_XQUEUEPEEKFROMISR, SEGGER_SYSVIEW_ShrinkId((U32)pxQueue), SEGGER_SYSVIEW_ShrinkId((U32)pvBuffer))
+#define traceQUEUE_PEEK_FROM_ISR_FAILED( pxQueue )                    SEGGER_SYSVIEW_RecordU32x2(apiFastID_OFFSET + apiID_XQUEUEPEEKFROMISR, SEGGER_SYSVIEW_ShrinkId((U32)pxQueue), SEGGER_SYSVIEW_ShrinkId((U32)pvBuffer))
+#define traceQUEUE_RECEIVE( pxQueue )                                 SYSVIEW_RecordU32x4(apiFastID_OFFSET + apiID_XQUEUEGENERICRECEIVE, SEGGER_SYSVIEW_ShrinkId((U32)pxQueue), SEGGER_SYSVIEW_ShrinkId((U32)pvBuffer), xTicksToWait, xJustPeeking)
+#define traceQUEUE_RECEIVE_FAILED( pxQueue )                          SYSVIEW_RecordU32x4(apiFastID_OFFSET + apiID_XQUEUEGENERICRECEIVE, SEGGER_SYSVIEW_ShrinkId((U32)pxQueue), SEGGER_SYSVIEW_ShrinkId((U32)pvBuffer), xTicksToWait, xJustPeeking)
+#define traceQUEUE_RECEIVE_FROM_ISR( pxQueue )                        SEGGER_SYSVIEW_RecordU32x3(apiFastID_OFFSET + apiID_XQUEUERECEIVEFROMISR, SEGGER_SYSVIEW_ShrinkId((U32)pxQueue), SEGGER_SYSVIEW_ShrinkId((U32)pvBuffer), (U32)pxHigherPriorityTaskWoken)
+#define traceQUEUE_RECEIVE_FROM_ISR_FAILED( pxQueue )                 SEGGER_SYSVIEW_RecordU32x3(apiFastID_OFFSET + apiID_XQUEUERECEIVEFROMISR, SEGGER_SYSVIEW_ShrinkId((U32)pxQueue), SEGGER_SYSVIEW_ShrinkId((U32)pvBuffer), (U32)pxHigherPriorityTaskWoken)
+#define traceQUEUE_REGISTRY_ADD( xQueue, pcQueueName )                SEGGER_SYSVIEW_RecordU32x2(apiFastID_OFFSET + apiID_VQUEUEADDTOREGISTRY, SEGGER_SYSVIEW_ShrinkId((U32)xQueue), (U32)pcQueueName)
+#if ( configUSE_QUEUE_SETS != 1 )
+  #define traceQUEUE_SEND( pxQueue )                                    SYSVIEW_RecordU32x4(apiFastID_OFFSET + apiID_XQUEUEGENERICSEND, SEGGER_SYSVIEW_ShrinkId((U32)pxQueue), (U32)pvItemToQueue, xTicksToWait, xCopyPosition)
+#else
+  #define traceQUEUE_SEND( pxQueue )                                    SYSVIEW_RecordU32x4(apiFastID_OFFSET + apiID_XQUEUEGENERICSEND, SEGGER_SYSVIEW_ShrinkId((U32)pxQueue), 0, 0, xCopyPosition)
+#endif
+#define traceQUEUE_SEND_FAILED( pxQueue )                             SYSVIEW_RecordU32x4(apiFastID_OFFSET + apiID_XQUEUEGENERICSEND, SEGGER_SYSVIEW_ShrinkId((U32)pxQueue), (U32)pvItemToQueue, xTicksToWait, xCopyPosition)
+#define traceQUEUE_SEND_FROM_ISR( pxQueue )                           SEGGER_SYSVIEW_RecordU32x2(apiFastID_OFFSET + apiID_XQUEUEGENERICSENDFROMISR, SEGGER_SYSVIEW_ShrinkId((U32)pxQueue), (U32)pxHigherPriorityTaskWoken)
+#define traceQUEUE_SEND_FROM_ISR_FAILED( pxQueue )                    SEGGER_SYSVIEW_RecordU32x2(apiFastID_OFFSET + apiID_XQUEUEGENERICSENDFROMISR, SEGGER_SYSVIEW_ShrinkId((U32)pxQueue), (U32)pxHigherPriorityTaskWoken)
+
+#if( portSTACK_GROWTH < 0 )
+#define traceTASK_CREATE(pxNewTCB)                  if (pxNewTCB != NULL) {                                             \
+                                                      SEGGER_SYSVIEW_OnTaskCreate((U32)pxNewTCB);                       \
+                                                      SYSVIEW_AddTask((U32)pxNewTCB,                                    \
+                                                                      &(pxNewTCB->pcTaskName[0]),                       \
+                                                                      pxNewTCB->uxPriority,                             \
+                                                                      (U32)pxNewTCB->pxStack,                           \
+                                                                      ((U32)pxNewTCB->pxTopOfStack - (U32)pxNewTCB->pxStack) \
+                                                                      );                                                \
+                                                    }
+#else
+#define traceTASK_CREATE(pxNewTCB)                  if (pxNewTCB != NULL) {                                             \
+                                                      SEGGER_SYSVIEW_OnTaskCreate((U32)pxNewTCB);                       \
+                                                      SYSVIEW_AddTask((U32)pxNewTCB,                                    \
+                                                                      &(pxNewTCB->pcTaskName[0]),                       \
+                                                                      pxNewTCB->uxPriority,                             \
+                                                                      (U32)pxNewTCB->pxStack,                           \
+                                                                      (U32)(pxNewTCB->pxStack-pxNewTCB->pxTopOfStack)   \
+                                                                      );                                                \
+                                                    }
+#endif
+#define traceTASK_PRIORITY_SET(pxTask, uxNewPriority) {                                                                 \
+                                                        SEGGER_SYSVIEW_RecordU32x2(apiFastID_OFFSET+apiID_VTASKPRIORITYSET, \
+                                                                                   SEGGER_SYSVIEW_ShrinkId((U32)pxTCB), \
+                                                                                   uxNewPriority                        \
+                                                                                  );                                    \
+                                                        SYSVIEW_UpdateTask((U32)pxTask,                                 \
+                                                                           &(pxTask->pcTaskName[0]),                    \
+                                                                           uxNewPriority,                               \
+                                                                           (U32)pxTask->pxStack,                        \
+                                                                           0                                            \
+                                                                          );                                            \
+                                                      }
+//
+// Define INCLUDE_xTaskGetIdleTaskHandle as 1 in FreeRTOSConfig.h to allow identification of Idle state.
+//
+#if ( INCLUDE_xTaskGetIdleTaskHandle == 1 )
+  #define traceTASK_SWITCHED_IN()                   if(prvGetTCBFromHandle(NULL) == xTaskGetIdleTaskHandle()) {           \
+                                                      SEGGER_SYSVIEW_OnIdle();                                          \
+                                                    } else {                                                            \
+                                                      SEGGER_SYSVIEW_OnTaskStartExec((U32)pxCurrentTCB[xPortGetCoreID()]); \
+                                                    }
+#else
+  #define traceTASK_SWITCHED_IN()                   {                                                                   \
+                                                      if (memcmp(pxCurrentTCB[xPortGetCoreID()]->pcTaskName, "IDLE", 5) != 0) { \
+                                                        SEGGER_SYSVIEW_OnTaskStartExec((U32)pxCurrentTCB[xPortGetCoreID()]);    \
+                                                      } else {                                                          \
+                                                        SEGGER_SYSVIEW_OnIdle();                                        \
+                                                      }                                                                 \
+                                                    }
+#endif
+
+#define traceMOVED_TASK_TO_READY_STATE(pxTCB)       SEGGER_SYSVIEW_OnTaskStartReady((U32)pxTCB)
+#define traceREADDED_TASK_TO_READY_STATE(pxTCB)
+
+#define traceMOVED_TASK_TO_DELAYED_LIST()           SEGGER_SYSVIEW_OnTaskStopReady((U32)pxCurrentTCB[xPortGetCoreID()],  (1u << 2))
+#define traceMOVED_TASK_TO_OVERFLOW_DELAYED_LIST()  SEGGER_SYSVIEW_OnTaskStopReady((U32)pxCurrentTCB[xPortGetCoreID()],  (1u << 2))
+#define traceMOVED_TASK_TO_SUSPENDED_LIST(pxTCB)    SEGGER_SYSVIEW_OnTaskStopReady((U32)pxTCB,         ((3u << 3) | 3))
+
+#define traceISR_EXIT_TO_SCHEDULER()                SEGGER_SYSVIEW_RecordExitISRToScheduler()
+#define traceISR_EXIT()                             SEGGER_SYSVIEW_RecordExitISR()
+#define traceISR_ENTER(_n_)                         SEGGER_SYSVIEW_RecordEnterISR(_n_)
+
+/*********************************************************************
+*
+*       API functions
+*
+**********************************************************************
+*/
+#ifdef __cplusplus
+extern "C" {
+#endif
+void SYSVIEW_AddTask      (U32 xHandle, const char* pcTaskName, unsigned uxCurrentPriority, U32  pxStack, unsigned uStackHighWaterMark);
+void SYSVIEW_UpdateTask   (U32 xHandle, const char* pcTaskName, unsigned uxCurrentPriority, U32 pxStack, unsigned uStackHighWaterMark);
+void SYSVIEW_DeleteTask   (U32 xHandle);
+void SYSVIEW_SendTaskInfo (U32 TaskID, const char* sName, unsigned Prio, U32 StackBase, unsigned StackSize);
+void SYSVIEW_RecordU32x4  (unsigned Id, U32 Para0, U32 Para1, U32 Para2, U32 Para3);
+void SYSVIEW_RecordU32x5  (unsigned Id, U32 Para0, U32 Para1, U32 Para2, U32 Para3, U32 Para4);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+
+/*************************** End of file ****************************/

components/app_trace/sys_view/esp32/SEGGER_RTT_esp32.c

@@ -0,0 +1,215 @@
+// Copyright 2017 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#include "string.h"
+#include "freertos/FreeRTOS.h"
+#include "SEGGER_RTT.h"
+#include "SEGGER_SYSVIEW.h"
+
+#include "rom/ets_sys.h"
+#include "esp_app_trace.h"
+
+#include "esp_log.h"
+const static char *TAG = "segger_rtt";
+
+#define SYSVIEW_EVENTS_BUF_SZ         255U
+
+// size of down channel data buf
+#define SYSVIEW_DOWN_BUF_SIZE   32
+#define SEGGER_HOST_WAIT_TMO    500 //us
+#define SEGGER_STOP_WAIT_TMO    1000000 //us
+
+static uint8_t s_events_buf[SYSVIEW_EVENTS_BUF_SZ];
+static uint16_t s_events_buf_filled;
+static uint8_t s_down_buf[SYSVIEW_DOWN_BUF_SIZE];
+
+/*********************************************************************
+*
+*       Public code
+*
+**********************************************************************
+*/
+
+/*********************************************************************
+*
+*       SEGGER_RTT_ESP32_FlushNoLock()
+*
+*  Function description
+*    Flushes buffered events.
+*
+*  Parameters
+*    min_sz  Threshold for flushing data. If current filling level is above this value, data will be flushed. TRAX destinations only.
+*    tmo     Timeout for operation (in us). Use ESP_APPTRACE_TMO_INFINITE to wait indefinetly.
+*
+*  Return value
+*    None.
+*/
+void SEGGER_RTT_ESP32_FlushNoLock(unsigned long min_sz, unsigned long tmo)
+{
+    esp_err_t res = esp_apptrace_write(ESP_APPTRACE_DEST_TRAX, s_events_buf, s_events_buf_filled, tmo);
+    if (res != ESP_OK) {
+      ESP_LOGE(TAG, "Failed to flush buffered events (%d)!\n", res);
+    }
+    // flush even if we failed to write buffered events, because no new events will be sent after STOP
+    res = esp_apptrace_flush_nolock(ESP_APPTRACE_DEST_TRAX, min_sz, tmo);
+    if (res != ESP_OK) {
+      ESP_LOGE(TAG, "Failed to flush apptrace data (%d)!\n", res);
+    }
+    s_events_buf_filled = 0;
+}
+
+/*********************************************************************
+*
+*       SEGGER_RTT_ReadNoLock()
+*
+*  Function description
+*    Reads characters from SEGGER real-time-terminal control block
+*    which have been previously stored by the host.
+*    Do not lock against interrupts and multiple access.
+*
+*  Parameters
+*    BufferIndex  Index of Down-buffer to be used (e.g. 0 for "Terminal").
+*    pBuffer      Pointer to buffer provided by target application, to copy characters from RTT-down-buffer to.
+*    BufferSize   Size of the target application buffer.
+*
+*  Return value
+*    Number of bytes that have been read.
+*/
+unsigned SEGGER_RTT_ReadNoLock(unsigned BufferIndex, void* pData, unsigned BufferSize) {
+  uint32_t size = BufferSize;
+  esp_err_t res = esp_apptrace_read(ESP_APPTRACE_DEST_TRAX, pData, &size, 0);
+  if (res != ESP_OK) {
+    return 0;
+  }
+  return size;
+}
+
+/*********************************************************************
+*
+*       SEGGER_RTT_WriteSkipNoLock
+*
+*  Function description
+*    Stores a specified number of characters in SEGGER RTT
+*    control block which is then read by the host.
+*    SEGGER_RTT_WriteSkipNoLock does not lock the application and
+*    skips all data, if the data does not fit into the buffer.
+*
+*  Parameters
+*    BufferIndex  Index of "Up"-buffer to be used (e.g. 0 for "Terminal").
+*    pBuffer      Pointer to character array. Does not need to point to a \0 terminated string.
+*    NumBytes     Number of bytes to be stored in the SEGGER RTT control block.
+*
+*  Return value
+*    Number of bytes which have been stored in the "Up"-buffer.
+*
+*  Notes
+*    (1) If there is not enough space in the "Up"-buffer, all data is dropped.
+*    (2) For performance reasons this function does not call Init()
+*        and may only be called after RTT has been initialized.
+*        Either by calling SEGGER_RTT_Init() or calling another RTT API function first.
+*/
+unsigned SEGGER_RTT_WriteSkipNoLock(unsigned BufferIndex, const void* pBuffer, unsigned NumBytes) {
+  uint8_t *pbuf = (uint8_t *)pBuffer;
+  uint8_t event_id = *pbuf;
+
+  if (NumBytes > SYSVIEW_EVENTS_BUF_SZ) {
+      ESP_LOGE(TAG, "Too large event %u bytes!", NumBytes);
+      return 0;
+  }
+  if (xPortGetCoreID()) { // dual core specific code
+    // use the highest - 1 bit of event ID to indicate core ID
+    // the highest bit can not be used due to event ID encoding method
+    // this reduces supported ID range to [0..63] (for 1 byte IDs) plus [128..16383] (for 2 bytes IDs)
+    if (*pbuf & 0x80) { // 2 bytes ID
+      *(pbuf + 1) |= (1 << 6);
+    } else if (NumBytes != 10 || *pbuf != 0) { // ignore sync sequence
+      *pbuf |= (1 << 6);
+    }
+  }
+  if (s_events_buf_filled + NumBytes > SYSVIEW_EVENTS_BUF_SZ) {
+    esp_err_t res = esp_apptrace_write(ESP_APPTRACE_DEST_TRAX, s_events_buf, s_events_buf_filled, SEGGER_HOST_WAIT_TMO);
+    if (res != ESP_OK) {
+      return 0; // skip current data buffer only, accumulated events are kept
+    }
+    s_events_buf_filled = 0;
+  }
+  memcpy(&s_events_buf[s_events_buf_filled], pBuffer, NumBytes);
+  s_events_buf_filled += NumBytes;
+  if (event_id == SYSVIEW_EVTID_TRACE_STOP) {
+    SEGGER_RTT_ESP32_FlushNoLock(0, SEGGER_STOP_WAIT_TMO);
+  }
+  return NumBytes;
+}
+
+/*********************************************************************
+*
+*       SEGGER_RTT_ConfigUpBuffer
+*
+*  Function description
+*    Run-time configuration of a specific up-buffer (T->H).
+*    Buffer to be configured is specified by index.
+*    This includes: Buffer address, size, name, flags, ...
+*
+*  Parameters
+*    BufferIndex  Index of the buffer to configure.
+*    sName        Pointer to a constant name string.
+*    pBuffer      Pointer to a buffer to be used.
+*    BufferSize   Size of the buffer.
+*    Flags        Operating modes. Define behavior if buffer is full (not enough space for entire message).
+*
+*  Return value
+*    >= 0 - O.K.
+*     < 0 - Error
+*
+*  Additional information
+*    Buffer 0 is configured on compile-time.
+*    May only be called once per buffer.
+*    Buffer name and flags can be reconfigured using the appropriate functions.
+*/
+int SEGGER_RTT_ConfigUpBuffer(unsigned BufferIndex, const char* sName, void* pBuffer, unsigned BufferSize, unsigned Flags) {
+  s_events_buf_filled = 0;
+  return 0;
+}
+
+/*********************************************************************
+*
+*       SEGGER_RTT_ConfigDownBuffer
+*
+*  Function description
+*    Run-time configuration of a specific down-buffer (H->T).
+*    Buffer to be configured is specified by index.
+*    This includes: Buffer address, size, name, flags, ...
+*
+*  Parameters
+*    BufferIndex  Index of the buffer to configure.
+*    sName        Pointer to a constant name string.
+*    pBuffer      Pointer to a buffer to be used.
+*    BufferSize   Size of the buffer.
+*    Flags        Operating modes. Define behavior if buffer is full (not enough space for entire message).
+*
+*  Return value
+*    >= 0  O.K.
+*     < 0  Error
+*
+*  Additional information
+*    Buffer 0 is configured on compile-time.
+*    May only be called once per buffer.
+*    Buffer name and flags can be reconfigured using the appropriate functions.
+*/
+int SEGGER_RTT_ConfigDownBuffer(unsigned BufferIndex, const char* sName, void* pBuffer, unsigned BufferSize, unsigned Flags) {
+  esp_apptrace_down_buffer_config(s_down_buf, sizeof(s_down_buf));
+  return 0;
+}
+
+/*************************** End of file ****************************/

components/app_trace/test/component.mk

@@ -0,0 +1,5 @@
+#
+#Component Makefile
+#
+
+COMPONENT_ADD_LDFLAGS = -Wl,--whole-archive -l$(COMPONENT_NAME) -Wl,--no-whole-archive

components/app_trace/test/test_trace.c

@@ -5,11 +5,13 @@
 #include <stdarg.h>
 #include "unity.h"
 #include "driver/timer.h"
+#include "soc/cpu.h"
 #include "freertos/FreeRTOS.h"
 #include "freertos/semphr.h"
 #include "freertos/task.h"
 #if CONFIG_ESP32_APPTRACE_ENABLE == 1
 #include "esp_app_trace.h"
+#include "esp_app_trace_util.h"
 
 #define ESP_APPTRACE_TEST_USE_PRINT_LOCK        0
 #define ESP_APPTRACE_TEST_PRN_WRERR_MAX         5
@@ -57,11 +59,33 @@ const static char *TAG = "esp_apptrace_test";
 #define ESP_APPTRACE_TEST_LOGV( format, ... )  ESP_APPTRACE_TEST_LOG_LEVEL(V, ESP_LOG_VERBOSE, format, ##__VA_ARGS__)
 #define ESP_APPTRACE_TEST_LOGO( format, ... )  ESP_APPTRACE_TEST_LOG_LEVEL(E, ESP_LOG_NONE, format, ##__VA_ARGS__)
 
-#define ESP_APPTRACE_TEST_WRITE(_b_, _s_)            esp_apptrace_write(ESP_APPTRACE_DEST_TRAX, _b_, _s_, ESP_APPTRACE_TMO_INFINITE)
-#define ESP_APPTRACE_TEST_WRITE_FROM_ISR(_b_, _s_)   esp_apptrace_write(ESP_APPTRACE_DEST_TRAX, _b_, _s_, 100UL)
-#define ESP_APPTRACE_TEST_WRITE_NOWAIT(_b_, _s_)     esp_apptrace_write(ESP_APPTRACE_DEST_TRAX, _b_, _s_, 0)
+static void esp_apptrace_test_timer_init(int timer_group, int timer_idx, uint32_t period)
+{
+    timer_config_t config;
+    uint64_t alarm_val = (period * (TIMER_BASE_CLK / 1000000UL)) / 2;
 
-#define ESP_APPTRACE_TEST_CPUTICKS2US(_t_)       ((_t_)/(XT_CLOCK_FREQ/1000000))
+    config.alarm_en = 1;
+    config.auto_reload = 1;
+    config.counter_dir = TIMER_COUNT_UP;
+    config.divider = 2;     //Range is 2 to 65536
+    config.intr_type = TIMER_INTR_LEVEL;
+    config.counter_en = TIMER_PAUSE;
+    /*Configure timer*/
+    timer_init(timer_group, timer_idx, &config);
+    /*Stop timer counter*/
+    timer_pause(timer_group, timer_idx);
+    /*Load counter value */
+    timer_set_counter_value(timer_group, timer_idx, 0x00000000ULL);
+    /*Set alarm value*/
+    timer_set_alarm_value(timer_group, timer_idx, alarm_val);
+    /*Enable timer interrupt*/
+    timer_enable_intr(timer_group, timer_idx);
+}
+
+#if CONFIG_SYSVIEW_ENABLE == 0
+#define ESP_APPTRACE_TEST_WRITE(_b_, _s_)            esp_apptrace_write(ESP_APPTRACE_DEST_TRAX, _b_, _s_, ESP_APPTRACE_TMO_INFINITE)
+#define ESP_APPTRACE_TEST_WRITE_FROM_ISR(_b_, _s_)   esp_apptrace_write(ESP_APPTRACE_DEST_TRAX, _b_, _s_, 0UL)
+#define ESP_APPTRACE_TEST_WRITE_NOWAIT(_b_, _s_)     esp_apptrace_write(ESP_APPTRACE_DEST_TRAX, _b_, _s_, 0)
 
 typedef struct {
     uint8_t *buf;
@@ -103,29 +127,6 @@ static SemaphoreHandle_t s_print_lock;
 
 static uint64_t esp_apptrace_test_ts_get();
 
-static void esp_apptrace_test_timer_init(int timer_group, int timer_idx, uint32_t period)
-{
-    timer_config_t config;
-    uint64_t alarm_val = (period * (TIMER_BASE_CLK / 1000000UL)) / 2;
-
-    config.alarm_en = 1;
-    config.auto_reload = 1;
-    config.counter_dir = TIMER_COUNT_UP;
-    config.divider = 1;
-    config.intr_type = TIMER_INTR_LEVEL;
-    config.counter_en = TIMER_PAUSE;
-    /*Configure timer*/
-    timer_init(timer_group, timer_idx, &config);
-    /*Stop timer counter*/
-    timer_pause(timer_group, timer_idx);
-    /*Load counter value */
-    timer_set_counter_value(timer_group, timer_idx, 0x00000000ULL);
-    /*Set alarm value*/
-    timer_set_alarm_value(timer_group, timer_idx, alarm_val);
-    /*Enable timer interrupt*/
-    timer_enable_intr(timer_group, timer_idx);
-}
-
 static void esp_apptrace_test_timer_isr(void *arg)
 {
     esp_apptrace_test_timer_arg_t *tim_arg = (esp_apptrace_test_timer_arg_t *)arg;
@@ -309,13 +310,14 @@ static void esp_apptrace_test_task(void *p)
         uint32_t *ts = (uint32_t *)(arg->data.buf + sizeof(uint32_t));
         *ts = (uint32_t)esp_apptrace_test_ts_get();
         memset(arg->data.buf + 2 * sizeof(uint32_t), arg->data.wr_cnt & arg->data.mask, arg->data.buf_sz - 2 * sizeof(uint32_t));
+        // ESP_APPTRACE_TEST_LOGD("%x:%x: Write chunk%d %d bytes, %x", xTaskGetCurrentTaskHandle(), *ts, arg->data.wr_cnt, arg->data.buf_sz, arg->data.wr_cnt & arg->data.mask);
         if (arg->nowait) {
             res = ESP_APPTRACE_TEST_WRITE_NOWAIT(arg->data.buf, arg->data.buf_sz);
         } else {
             res = ESP_APPTRACE_TEST_WRITE(arg->data.buf, arg->data.buf_sz);
         }
         if (res) {
-            if (arg->data.wr_err++ < ESP_APPTRACE_TEST_PRN_WRERR_MAX) {
+            if (1){//arg->data.wr_err++ < ESP_APPTRACE_TEST_PRN_WRERR_MAX) {
                 ESP_APPTRACE_TEST_LOGE("%x: Failed to write trace %d %x!", xTaskGetCurrentTaskHandle(), res, arg->data.wr_cnt & arg->data.mask);
                 if (arg->data.wr_err == ESP_APPTRACE_TEST_PRN_WRERR_MAX) {
                     ESP_APPTRACE_TEST_LOGE("\n");
@@ -401,7 +403,7 @@ static void esp_apptrace_test_ts_init(int timer_group, int timer_idx)
     config.alarm_en = 0;
     config.auto_reload = 0;
     config.counter_dir = TIMER_COUNT_UP;
-    config.divider = 1;
+    config.divider = 2;     //Range is 2 to 65536
     config.counter_en = 0;
     /*Configure timer*/
     timer_init(timer_group, timer_idx, &config);
@@ -418,7 +420,7 @@ static void esp_apptrace_test_ts_cleanup()
     config.alarm_en = 0;
     config.auto_reload = 0;
     config.counter_dir = TIMER_COUNT_UP;
-    config.divider = 1;
+    config.divider = 2;     //Range is 2 to 65536
     config.counter_en = 0;
     /*Configure timer*/
     timer_init(s_ts_timer_group, s_ts_timer_idx, &config);
@@ -490,8 +492,9 @@ static void esp_apptrace_test(esp_apptrace_test_cfg_t *test_cfg)
         ESP_APPTRACE_TEST_LOGI("Created task %x", thnd);
     }
     xTaskCreatePinnedToCore(esp_apptrace_dummy_task, "dummy0", 2048, &dummy_task_arg[0], dummy_task_arg[0].prio, NULL, 0);
+#if CONFIG_FREERTOS_UNICORE == 0
     xTaskCreatePinnedToCore(esp_apptrace_dummy_task, "dummy1", 2048, &dummy_task_arg[0], dummy_task_arg[0].prio, NULL, 1);
-
+#endif
     for (int i = 0; i < test_cfg->tasks_num; i++) {
         //arg1.stop = 1;
         xSemaphoreTake(test_cfg->tasks[i].done, portMAX_DELAY);
@@ -567,6 +570,7 @@ TEST_CASE("App trace test (1 crashed task)", "[trace][ignore]")
     esp_apptrace_test(&test_cfg);
 }
 
+#if CONFIG_FREERTOS_UNICORE == 0
 TEST_CASE("App trace test (2 tasks + 1 timer @ each core", "[trace][ignore]")
 {
     int ntask = 0;
@@ -628,9 +632,9 @@ TEST_CASE("App trace test (2 tasks + 1 timer @ each core", "[trace][ignore]")
     s_test_tasks[ntask].timers_num = 0;
     s_test_tasks[ntask].timers = NULL;
     ntask++;
-
     esp_apptrace_test(&test_cfg);
 }
+#endif
 
 TEST_CASE("App trace test (1 task + 1 timer @ 1 core)", "[trace][ignore]")
 {
@@ -661,6 +665,7 @@ TEST_CASE("App trace test (1 task + 1 timer @ 1 core)", "[trace][ignore]")
     esp_apptrace_test(&test_cfg);
 }
 
+#if CONFIG_FREERTOS_UNICORE == 0
 TEST_CASE("App trace test (2 tasks (nowait): 1 @ each core)", "[trace][ignore]")
 {
     esp_apptrace_test_cfg_t test_cfg = {
@@ -722,6 +727,7 @@ TEST_CASE("App trace test (2 tasks: 1 @ each core)", "[trace][ignore]")
 
     esp_apptrace_test(&test_cfg);
 }
+#endif
 
 TEST_CASE("App trace test (1 task)", "[trace][ignore]")
 {
@@ -732,7 +738,7 @@ TEST_CASE("App trace test (1 task)", "[trace][ignore]")
 
     memset(s_test_tasks, 0, sizeof(s_test_tasks));
 
-    s_test_tasks[0].core = 1;
+    s_test_tasks[0].core = 0;
     s_test_tasks[0].prio = 3;
     s_test_tasks[0].task_func = esp_apptrace_test_task;
     s_test_tasks[0].data.buf = s_bufs[0];
@@ -759,6 +765,7 @@ static int esp_logtrace_printf(const char *fmt, ...)
 
 typedef struct {
     SemaphoreHandle_t done;
+    uint32_t work_count;
 } esp_logtrace_task_t;
 
 static void esp_logtrace_task(void *p)
@@ -793,7 +800,7 @@ static void esp_logtrace_task(void *p)
     vTaskDelete(NULL);
 }
 
-TEST_CASE("Log trace test (1 task)", "[trace][ignore]")
+TEST_CASE("Log trace test (2 tasks)", "[trace][ignore]")
 {
     TaskHandle_t thnd;
 
@@ -806,7 +813,11 @@ TEST_CASE("Log trace test (1 task)", "[trace][ignore]")
 
     xTaskCreatePinnedToCore(esp_logtrace_task, "logtrace0", 2048, &arg1, 3, &thnd, 0);
     ESP_APPTRACE_TEST_LOGI("Created task %x", thnd);
+#if CONFIG_FREERTOS_UNICORE == 0
     xTaskCreatePinnedToCore(esp_logtrace_task, "logtrace1", 2048, &arg2, 3, &thnd, 1);
+#else
+    xTaskCreatePinnedToCore(esp_logtrace_task, "logtrace1", 2048, &arg2, 3, &thnd, 0);
+#endif
     ESP_APPTRACE_TEST_LOGI("Created task %x", thnd);
 
     xSemaphoreTake(arg1.done, portMAX_DELAY);
@@ -814,4 +825,234 @@ TEST_CASE("Log trace test (1 task)", "[trace][ignore]")
     xSemaphoreTake(arg2.done, portMAX_DELAY);
     vSemaphoreDelete(arg2.done);
 }
+
+#else
+
+typedef struct {
+    int group;
+    int timer;
+    int flags;
+    uint32_t id;
+} esp_sysviewtrace_timer_arg_t;
+
+typedef struct {
+    SemaphoreHandle_t done;
+    SemaphoreHandle_t *sync;
+    esp_sysviewtrace_timer_arg_t *timer;
+    uint32_t work_count;
+    uint32_t sleep_tmo;
+    uint32_t id;
+} esp_sysviewtrace_task_arg_t;
+
+static void esp_sysview_test_timer_isr(void *arg)
+{
+    esp_sysviewtrace_timer_arg_t *tim_arg = (esp_sysviewtrace_timer_arg_t *)arg;
+
+    //ESP_APPTRACE_TEST_LOGI("tim-%d: IRQ %d/%d\n", tim_arg->id, tim_arg->group, tim_arg->timer);
+
+    if (tim_arg->group == 0) {
+        if (tim_arg->timer == 0) {
+            TIMERG0.int_clr_timers.t0 = 1;
+            TIMERG0.hw_timer[0].update = 1;
+            TIMERG0.hw_timer[0].config.alarm_en = 1;
+        } else {
+            TIMERG0.int_clr_timers.t1 = 1;
+            TIMERG0.hw_timer[1].update = 1;
+            TIMERG0.hw_timer[1].config.alarm_en = 1;
+        }
+    }
+    if (tim_arg->group == 1) {
+        if (tim_arg->timer == 0) {
+            TIMERG1.int_clr_timers.t0 = 1;
+            TIMERG1.hw_timer[0].update = 1;
+            TIMERG1.hw_timer[0].config.alarm_en = 1;
+        } else {
+            TIMERG1.int_clr_timers.t1 = 1;
+            TIMERG1.hw_timer[1].update = 1;
+            TIMERG1.hw_timer[1].config.alarm_en = 1;
+        }
+    }
+}
+
+static void esp_sysviewtrace_test_task(void *p)
+{
+    esp_sysviewtrace_task_arg_t *arg = (esp_sysviewtrace_task_arg_t *) p;
+    volatile uint32_t tmp = 0;
+    timer_isr_handle_t inth;
+
+    printf("%x: run sysview task\n", (uint32_t)xTaskGetCurrentTaskHandle());
+
+    if (arg->timer) {
+        esp_err_t res = timer_isr_register(arg->timer->group, arg->timer->timer, esp_sysview_test_timer_isr, arg->timer, arg->timer->flags, &inth);
+        if (res != ESP_OK) {
+            printf("%x: failed to register timer ISR\n", (uint32_t)xTaskGetCurrentTaskHandle());
+        }
+        else {
+            res = timer_start(arg->timer->group, arg->timer->timer);
+            if (res != ESP_OK) {
+                printf("%x: failed to start timer\n", (uint32_t)xTaskGetCurrentTaskHandle());
+            }
+        }
+    }
+
+    int i = 0;
+    while (1) {
+        static uint32_t count;
+        printf("%d", arg->id);
+        if((++count % 80) == 0)
+            printf("\n");
+        if (arg->sync) {
+            xSemaphoreTake(*arg->sync, portMAX_DELAY);
+        }
+        for (uint32_t k = 0; k < arg->work_count; k++) {
+            tmp++;
+        }
+        vTaskDelay(arg->sleep_tmo/portTICK_PERIOD_MS);
+        i++;
+        if (arg->sync) {
+            xSemaphoreGive(*arg->sync);
+        }
+    }
+    ESP_APPTRACE_TEST_LOGI("%x: finished", xTaskGetCurrentTaskHandle());
+
+    xSemaphoreGive(arg->done);
+    vTaskDelay(1);
+    vTaskDelete(NULL);
+}
+
+TEST_CASE("SysView trace test 1", "[trace][ignore]")
+{
+    TaskHandle_t thnd;
+
+    esp_sysviewtrace_timer_arg_t tim_arg1 = {
+        .group = TIMER_GROUP_1,
+        .timer = TIMER_1,
+        .flags = ESP_INTR_FLAG_SHARED,
+        .id = 0,
+    };
+    esp_sysviewtrace_task_arg_t arg1 = {
+        .done = xSemaphoreCreateBinary(),
+        .sync = NULL,
+        .work_count = 10000,
+        .sleep_tmo = 1,
+        .timer = &tim_arg1,
+        .id = 0,
+    };
+    esp_sysviewtrace_timer_arg_t tim_arg2 = {
+        .group = TIMER_GROUP_1,
+        .timer = TIMER_0,
+        .flags = 0,
+        .id = 1,
+    };
+    esp_sysviewtrace_task_arg_t arg2 = {
+        .done = xSemaphoreCreateBinary(),
+        .sync = NULL,
+        .work_count = 10000,
+        .sleep_tmo = 1,
+        .timer = &tim_arg2,
+        .id = 1,
+    };
+
+    esp_apptrace_test_timer_init(TIMER_GROUP_1, TIMER_1, 500);
+    esp_apptrace_test_timer_init(TIMER_GROUP_1, TIMER_0, 100);
+
+    xTaskCreatePinnedToCore(esp_sysviewtrace_test_task, "svtrace0", 2048, &arg1, 3, &thnd, 0);
+    ESP_APPTRACE_TEST_LOGI("Created task %x", thnd);
+#if CONFIG_FREERTOS_UNICORE == 0
+    xTaskCreatePinnedToCore(esp_sysviewtrace_test_task, "svtrace1", 2048, &arg2, 5, &thnd, 1);
+#else
+    xTaskCreatePinnedToCore(esp_sysviewtrace_test_task, "svtrace1", 2048, &arg2, 5, &thnd, 0);
+#endif
+    ESP_APPTRACE_TEST_LOGI("Created task %x", thnd);
+
+    xSemaphoreTake(arg1.done, portMAX_DELAY);
+    vSemaphoreDelete(arg1.done);
+    xSemaphoreTake(arg2.done, portMAX_DELAY);
+    vSemaphoreDelete(arg2.done);
+}
+
+TEST_CASE("SysView trace test 2", "[trace][ignore]")
+{
+    TaskHandle_t thnd;
+
+    esp_sysviewtrace_timer_arg_t tim_arg1 = {
+        .group = TIMER_GROUP_1,
+        .timer = TIMER_1,
+        .flags = ESP_INTR_FLAG_SHARED,
+        .id = 0,
+    };
+    esp_sysviewtrace_task_arg_t arg1 = {
+        .done = xSemaphoreCreateBinary(),
+        .sync = NULL,
+        .work_count = 10000,
+        .sleep_tmo = 1,
+        .timer = &tim_arg1,
+        .id = 0,
+    };
+    esp_sysviewtrace_timer_arg_t tim_arg2 = {
+        .group = TIMER_GROUP_1,
+        .timer = TIMER_0,
+        .flags = 0,
+        .id = 1,
+    };
+    esp_sysviewtrace_task_arg_t arg2 = {
+        .done = xSemaphoreCreateBinary(),
+        .sync = NULL,
+        .work_count = 10000,
+        .sleep_tmo = 1,
+        .timer = &tim_arg2,
+        .id = 1,
+    };
+
+    SemaphoreHandle_t test_sync = xSemaphoreCreateBinary();
+    xSemaphoreGive(test_sync);
+    esp_sysviewtrace_task_arg_t arg3 = {
+        .done = xSemaphoreCreateBinary(),
+        .sync = &test_sync,
+        .work_count = 1000,
+        .sleep_tmo = 1,
+        .timer = NULL,
+        .id = 2,
+    };
+    esp_sysviewtrace_task_arg_t arg4 = {
+        .done = xSemaphoreCreateBinary(),
+        .sync = &test_sync,
+        .work_count = 10000,
+        .sleep_tmo = 1,
+        .timer = NULL,
+        .id = 3,
+    };
+
+    esp_apptrace_test_timer_init(TIMER_GROUP_1, TIMER_1, 500);
+    esp_apptrace_test_timer_init(TIMER_GROUP_1, TIMER_0, 100);
+
+    xTaskCreatePinnedToCore(esp_sysviewtrace_test_task, "svtrace0", 2048, &arg1, 3, &thnd, 0);
+    printf("Created task %x\n", (uint32_t)thnd);
+#if CONFIG_FREERTOS_UNICORE == 0
+    xTaskCreatePinnedToCore(esp_sysviewtrace_test_task, "svtrace1", 2048, &arg2, 4, &thnd, 1);
+#else
+    xTaskCreatePinnedToCore(esp_sysviewtrace_test_task, "svtrace1", 2048, &arg2, 4, &thnd, 0);
+#endif
+    printf("Created task %x\n", (uint32_t)thnd);
+
+    xTaskCreatePinnedToCore(esp_sysviewtrace_test_task, "svsync0", 2048, &arg3, 3, &thnd, 0);
+    printf("Created task %x\n", (uint32_t)thnd);
+#if CONFIG_FREERTOS_UNICORE == 0
+    xTaskCreatePinnedToCore(esp_sysviewtrace_test_task, "svsync1", 2048, &arg4, 5, &thnd, 1);
+#else
+    xTaskCreatePinnedToCore(esp_sysviewtrace_test_task, "svsync1", 2048, &arg4, 5, &thnd, 0);
+#endif
+    printf("Created task %x\n", (uint32_t)thnd);
+
+    xSemaphoreTake(arg1.done, portMAX_DELAY);
+    vSemaphoreDelete(arg1.done);
+    xSemaphoreTake(arg2.done, portMAX_DELAY);
+    vSemaphoreDelete(arg2.done);
+    xSemaphoreTake(arg3.done, portMAX_DELAY);
+    vSemaphoreDelete(arg3.done);
+    xSemaphoreTake(arg4.done, portMAX_DELAY);
+    vSemaphoreDelete(arg4.done);
+    vSemaphoreDelete(test_sync);
+}
+#endif
 #endif

components/app_update/CMakeLists.txt

@@ -0,0 +1,7 @@
+set(COMPONENT_SRCS "esp_ota_ops.c")
+set(COMPONENT_ADD_INCLUDEDIRS "include")
+
+set(COMPONENT_REQUIRES spi_flash)
+set(COMPONENT_PRIV_REQUIRES bootloader_support)
+
+register_component()

components/app_update/esp_ota_ops.c

@@ -28,6 +28,7 @@
 #include "esp_image_format.h"
 #include "esp_secure_boot.h"
 #include "esp_flash_encrypt.h"
+#include "esp_spi_flash.h"
 #include "sdkconfig.h"
 
 #include "esp_ota_ops.h"
@@ -144,8 +145,7 @@ esp_err_t esp_ota_write(esp_ota_handle_t handle, const void *data, size_t size)
         if (it->handle == handle) {
             // must erase the partition before writing to it
             assert(it->erased_size > 0 && "must erase the partition before writing to it");
-
-            if(it->wrote_size == 0 && size > 0 && data_bytes[0] != 0xE9) {
+            if (it->wrote_size == 0 && it->partial_bytes == 0 && size > 0 && data_bytes[0] != ESP_IMAGE_HEADER_MAGIC) {
                 ESP_LOGE(TAG, "OTA image has invalid magic byte (expected 0xE9, saw 0x%02x", data_bytes[0]);
                 return ESP_ERR_OTA_VALIDATE_FAILED;
             }
@@ -191,14 +191,13 @@ esp_err_t esp_ota_write(esp_ota_handle_t handle, const void *data, size_t size)
     }
 
     //if go to here ,means don't find the handle
-    ESP_LOGE(TAG,"not found the handle")
+    ESP_LOGE(TAG,"not found the handle");
     return ESP_ERR_INVALID_ARG;
 }
 
 esp_err_t esp_ota_end(esp_ota_handle_t handle)
 {
     ota_ops_entry_t *it;
-    size_t image_size;
     esp_err_t ret = ESP_OK;
 
     for (it = LIST_FIRST(&s_ota_ops_entries_head); it != NULL; it = LIST_NEXT(it, entries)) {
@@ -230,18 +229,16 @@ esp_err_t esp_ota_end(esp_ota_handle_t handle)
         it->partial_bytes = 0;
     }
 
-    if (esp_image_basic_verify(it->part->address, true, &image_size) != ESP_OK) {
-        ret = ESP_ERR_OTA_VALIDATE_FAILED;
-        goto cleanup;
-    }
+    esp_image_metadata_t data;
+    const esp_partition_pos_t part_pos = {
+      .offset = it->part->address,
+      .size = it->part->size,
+    };
 
-#ifdef CONFIG_SECURE_BOOT_ENABLED
-    ret = esp_secure_boot_verify_signature(it->part->address, image_size);
-    if (ret != ESP_OK) {
+    if (esp_image_load(ESP_IMAGE_VERIFY, &part_pos, &data) != ESP_OK) {
         ret = ESP_ERR_OTA_VALIDATE_FAILED;
         goto cleanup;
     }
-#endif
 
  cleanup:
     LIST_REMOVE(it, entries);
@@ -294,7 +291,7 @@ static esp_err_t esp_rewrite_ota_data(esp_partition_subtype_t subtype)
     uint16_t ota_app_count = 0;
     uint32_t i = 0;
     uint32_t seq;
-    static spi_flash_mmap_memory_t ota_data_map;
+    spi_flash_mmap_handle_t ota_data_map;
     const void *result = NULL;
 
     find_partition = esp_partition_find_first(ESP_PARTITION_TYPE_DATA, ESP_PARTITION_SUBTYPE_DATA_OTA, NULL);
@@ -365,18 +362,22 @@ static esp_err_t esp_rewrite_ota_data(esp_partition_subtype_t subtype)
 
 esp_err_t esp_ota_set_boot_partition(const esp_partition_t *partition)
 {
-    size_t image_size;
     const esp_partition_t *find_partition = NULL;
     if (partition == NULL) {
         return ESP_ERR_INVALID_ARG;
     }
 
-    if (esp_image_basic_verify(partition->address, true, &image_size) != ESP_OK) {
+    esp_image_metadata_t data;
+    const esp_partition_pos_t part_pos = {
+        .offset = partition->address,
+        .size = partition->size,
+    };
+    if (esp_image_load(ESP_IMAGE_VERIFY, &part_pos, &data) != ESP_OK) {
         return ESP_ERR_OTA_VALIDATE_FAILED;
     }
 
-#ifdef CONFIG_SECURE_BOOT_ENABLED
-    esp_err_t ret = esp_secure_boot_verify_signature(partition->address, image_size);
+#ifdef CONFIG_SECURE_SIGNED_ON_UPDATE
+    esp_err_t ret = esp_secure_boot_verify_signature(partition->address, data.image_len);
     if (ret != ESP_OK) {
         return ESP_ERR_OTA_VALIDATE_FAILED;
     }
@@ -404,11 +405,39 @@ esp_err_t esp_ota_set_boot_partition(const esp_partition_t *partition)
     }
 }
 
+static const esp_partition_t *find_default_boot_partition(void)
+{
+    // This logic matches the logic of bootloader get_selected_boot_partition() & load_boot_image().
+
+    // Default to factory if present
+    const esp_partition_t *result = esp_partition_find_first(ESP_PARTITION_TYPE_APP, ESP_PARTITION_SUBTYPE_APP_FACTORY, NULL);
+    if (result != NULL) {
+        return result;
+    }
+
+    // Try first OTA slot if no factory partition
+    for (esp_partition_subtype_t s = ESP_PARTITION_SUBTYPE_APP_OTA_MIN; s != ESP_PARTITION_SUBTYPE_APP_OTA_MAX; s++) {
+        result = esp_partition_find_first(ESP_PARTITION_TYPE_APP, s, NULL);
+        if (result != NULL) {
+            return result;
+        }
+    }
+
+    // Test app slot if present
+    result = esp_partition_find_first(ESP_PARTITION_TYPE_APP, ESP_PARTITION_SUBTYPE_APP_TEST, NULL);
+    if (result != NULL) {
+        return result;
+    }
+
+    ESP_LOGE(TAG, "invalid partition table, no app partitions");
+    return NULL;
+}
+
 const esp_partition_t *esp_ota_get_boot_partition(void)
 {
     esp_err_t ret;
     const esp_partition_t *find_partition = NULL;
-    static spi_flash_mmap_memory_t ota_data_map;
+    spi_flash_mmap_handle_t ota_data_map;
     const void *result = NULL;
     uint16_t ota_app_count = 0;
     find_partition = esp_partition_find_first(ESP_PARTITION_TYPE_DATA, ESP_PARTITION_SUBTYPE_DATA_OTA, NULL);
@@ -434,8 +463,7 @@ const esp_partition_t *esp_ota_get_boot_partition(void)
 
     if (s_ota_select[0].ota_seq == 0xFFFFFFFF && s_ota_select[1].ota_seq == 0xFFFFFFFF) {
         ESP_LOGD(TAG, "finding factory app......");
-
-        return esp_partition_find_first(ESP_PARTITION_TYPE_APP, ESP_PARTITION_SUBTYPE_APP_FACTORY, NULL);
+        return find_default_boot_partition();
     } else if (ota_select_valid(&s_ota_select[0]) && ota_select_valid(&s_ota_select[1])) {
         ESP_LOGD(TAG, "finding ota_%d app......", \
                  ESP_PARTITION_SUBTYPE_APP_OTA_MIN + ((OTA_MAX(s_ota_select[0].ota_seq, s_ota_select[1].ota_seq) - 1) % ota_app_count));
@@ -458,16 +486,25 @@ const esp_partition_t *esp_ota_get_boot_partition(void)
 
     } else {
         ESP_LOGE(TAG, "ota data invalid, no current app. Assuming factory");
-        return esp_partition_find_first(ESP_PARTITION_TYPE_APP, ESP_PARTITION_SUBTYPE_APP_FACTORY, NULL);
+        return find_default_boot_partition();
     }
 }
 
 
 const esp_partition_t* esp_ota_get_running_partition(void)
 {
+    static const esp_partition_t *curr_partition = NULL;
+
+    /*
+     * Currently running partition is unlikely to change across reset cycle,
+     * so it can be cached here, and avoid lookup on every flash write operation.
+     */
+    if (curr_partition != NULL) {
+        return curr_partition;
+    }
+
     /* Find the flash address of this exact function. By definition that is part
        of the currently running firmware. Then find the enclosing partition. */
-
     size_t phys_offs = spi_flash_cache2phys(esp_ota_get_running_partition);
 
     assert (phys_offs != SPI_FLASH_CACHE2PHYS_FAIL); /* indicates cache2phys lookup is buggy */
@@ -481,6 +518,7 @@ const esp_partition_t* esp_ota_get_running_partition(void)
         const esp_partition_t *p = esp_partition_get(it);
         if (p->address <= phys_offs && p->address + p->size > phys_offs) {
             esp_partition_iterator_release(it);
+            curr_partition = p;
             return p;
         }
         it = esp_partition_next(it);

components/app_update/include/esp_ota_ops.h

@@ -20,7 +20,6 @@
 #include <stddef.h>
 #include "esp_err.h"
 #include "esp_partition.h"
-#include "esp_spi_flash.h"
 
 #ifdef __cplusplus
 extern "C"
@@ -126,10 +125,17 @@ esp_err_t esp_ota_set_boot_partition(const esp_partition_t* partition);
  *
  * If esp_ota_set_boot_partition() has been called, the partition which was set by that function will be returned.
  *
- * If esp_ota_set_boot_partition() has not been called, the result is
- * equivalent to esp_ota_get_running_partition().
+ * If esp_ota_set_boot_partition() has not been called, the result is usually the same as esp_ota_get_running_partition().
+ * The two results are not equal if the configured boot partition does not contain a valid app (meaning that the running partition
+ * will be an app that the bootloader chose via fallback).
  *
- * @return Pointer to info for partition structure, or NULL if no partition is found or flash read operation failed. Returned pointer is valid for the lifetime of the application.
+ * If the OTA data partition is not present or not valid then the result is the first app partition found in the
+ * partition table. In priority order, this means: the factory app, the first OTA app slot, or the test app partition.
+ *
+ * Note that there is no guarantee the returned partition is a valid app. Use esp_image_load(ESP_IMAGE_VERIFY, ...) to verify if the
+ * returned partition contains a bootable image.
+ *
+ * @return Pointer to info for partition structure, or NULL if partition table is invalid or a flash read operation failed. Any returned pointer is valid for the lifetime of the application.
  */
 const esp_partition_t* esp_ota_get_boot_partition(void);
 
@@ -142,6 +148,9 @@ const esp_partition_t* esp_ota_get_boot_partition(void);
  * esp_ota_set_boot_partition(). Only the app whose code is currently
  * running will have its partition information returned.
  *
+ * The partition returned by this function may also differ from esp_ota_get_boot_partition() if the configured boot
+ * partition is somehow invalid, and the bootloader fell back to a different app partition at boot.
+ *
  * @return Pointer to info for partition structure, or NULL if no partition is found or flash read operation failed. Returned pointer is valid for the lifetime of the application.
  */
 const esp_partition_t* esp_ota_get_running_partition(void);

components/aws_iot/CMakeLists.txt

@@ -0,0 +1,26 @@
+if(CONFIG_AWS_IOT_SDK)
+    set(COMPONENT_ADD_INCLUDEDIRS "include aws-iot-device-sdk-embedded-C/include")
+    set(aws_sdk_src aws-iot-device-sdk-embedded-C/src)
+    set(COMPONENT_SRCS "${aws_sdk_src}/aws_iot_json_utils.c"
+                   "${aws_sdk_src}/aws_iot_mqtt_client.c"
+                   "${aws_sdk_src}/aws_iot_mqtt_client_common_internal.c"
+                   "${aws_sdk_src}/aws_iot_mqtt_client_connect.c"
+                   "${aws_sdk_src}/aws_iot_mqtt_client_publish.c"
+                   "${aws_sdk_src}/aws_iot_mqtt_client_subscribe.c"
+                   "${aws_sdk_src}/aws_iot_mqtt_client_unsubscribe.c"
+                   "${aws_sdk_src}/aws_iot_mqtt_client_yield.c"
+                   "${aws_sdk_src}/aws_iot_shadow.c"
+                   "${aws_sdk_src}/aws_iot_shadow_actions.c"
+                   "${aws_sdk_src}/aws_iot_shadow_json.c"
+                   "${aws_sdk_src}/aws_iot_shadow_records.c"
+                   "port/network_mbedtls_wrapper.c"
+                   "port/threads_freertos.c"
+                   "port/timer.c")
+else()
+    message(STATUS "Building empty aws_iot component due to configuration")
+endif()
+
+set(COMPONENT_REQUIRES "mbedtls")
+set(COMPONENT_PRIV_REQUIRES "jsmn")
+
+register_component()

components/aws_iot/Kconfig

@@ -30,3 +30,130 @@ config AWS_IOT_MQTT_PORT
         If you need per-device port numbers for different regions, you can
         override the default port number in your app.
 
+
+config AWS_IOT_MQTT_TX_BUF_LEN
+    int "MQTT TX Buffer Length"
+    depends on AWS_IOT_SDK
+    default 512
+    range 32 65536
+    help
+        Maximum MQTT transmit buffer size. This is the maximum MQTT
+        message length (including protocol overhead) which can be sent.
+
+        Sending longer messages will fail.
+
+config AWS_IOT_MQTT_RX_BUF_LEN
+    int "MQTT RX Buffer Length"
+    depends on AWS_IOT_SDK
+    default 512
+    range 32 65536
+    help
+        Maximum MQTT receive buffer size. This is the maximum MQTT
+        message length (including protocol overhead) which can be
+        received.
+
+        Longer messages are dropped.
+
+
+
+config AWS_IOT_MQTT_NUM_SUBSCRIBE_HANDLERS
+    int "Maximum MQTT Topic Filters"
+    depends on AWS_IOT_SDK
+    default 5
+    range 1 100
+    help
+        Maximum number of concurrent MQTT topic filters.
+
+
+config AWS_IOT_MQTT_MIN_RECONNECT_WAIT_INTERVAL
+    int "Auto reconnect initial interval (ms)"
+    depends on AWS_IOT_SDK
+    default 1000
+    range 10 3600000
+    help
+        Initial delay before making first reconnect attempt, if the AWS IoT connection fails.
+        Client will perform exponential backoff, starting from this value.
+
+config AWS_IOT_MQTT_MAX_RECONNECT_WAIT_INTERVAL
+    int "Auto reconnect maximum interval (ms)"
+    depends on AWS_IOT_SDK
+    default 128000
+    range 10 3600000
+    help
+        Maximum delay between reconnection attempts. If the exponentially increased delay
+        interval reaches this value, the client will stop automatically attempting to reconnect.
+
+menu "Thing Shadow"
+    depends on AWS_IOT_SDK
+
+config AWS_IOT_OVERRIDE_THING_SHADOW_RX_BUFFER
+    bool "Override Shadow RX buffer size"
+    depends on AWS_IOT_SDK
+    default n
+    help
+        Allows setting a different Thing Shadow RX buffer
+        size. This is the maximum size of a Thing Shadow
+        message in bytes, plus one.
+
+        If not overridden, the default value is the MQTT RX Buffer length plus one. If overriden, do not set higher than the default value.
+
+config AWS_IOT_SHADOW_MAX_SIZE_OF_RX_BUFFER
+    int "Maximum RX Buffer (bytes)"
+    depends on AWS_IOT_OVERRIDE_THING_SHADOW_RX_BUFFER
+    default 513
+    range 32 65536
+    help
+        Allows setting a different Thing Shadow RX buffer size.
+        This is the maximum size of a Thing Shadow message in bytes,
+        plus one.
+
+
+config AWS_IOT_SHADOW_MAX_SIZE_OF_UNIQUE_CLIENT_ID_BYTES
+    int "Maximum unique client ID size (bytes)"
+    depends on AWS_IOT_SDK
+    default 80
+    range 4 1000
+    help
+        Maximum size of the Unique Client Id.
+
+config AWS_IOT_SHADOW_MAX_SIMULTANEOUS_ACKS
+    int "Maximum simultaneous responses"
+    depends on AWS_IOT_SDK
+    default 10
+    range 1 100
+    help
+        At any given time we will wait for this many responses. This will correlate to the rate at which the shadow actions are requested
+
+config AWS_IOT_SHADOW_MAX_SIMULTANEOUS_THINGNAMES
+    int "Maximum simultaneous Thing Name operations"
+    depends on AWS_IOT_SDK
+    default 10
+    range 1 100
+    help
+       We could perform shadow action on any thing Name and this is maximum Thing Names we can act on at any given time
+
+config AWS_IOT_SHADOW_MAX_JSON_TOKEN_EXPECTED
+    int "Maximum expected JSON tokens"
+    depends on AWS_IOT_SDK
+    default 120
+    help
+        These are the max tokens that is expected to be in the Shadow JSON document. Includes the metadata which is published
+
+config AWS_IOT_SHADOW_MAX_SHADOW_TOPIC_LENGTH_WITHOUT_THINGNAME
+    int "Maximum topic length (not including Thing Name)"
+    depends on AWS_IOT_SDK
+    default 60
+    range 10 1000
+    help
+       All shadow actions have to be published or subscribed to a topic which is of the format $aws/things/{thingName}/shadow/update/accepted. This refers to the size of the topic without the Thing Name
+
+config AWS_IOT_SHADOW_MAX_SIZE_OF_THING_NAME
+    int "Maximum Thing Name length"
+    depends on AWS_IOT_SDK
+    default 20
+    range 4 1000
+    help
+        Maximum length of a Thing Name.
+
+endmenu  # Thing Shadow
+

components/aws_iot/include/aws_iot_config.h

@@ -37,24 +37,29 @@
 #define AWS_IOT_MY_THING_NAME          "ESP32" ///< Thing Name of the Shadow this device is associated with
 
 // MQTT PubSub
-#define AWS_IOT_MQTT_TX_BUF_LEN 512 ///< Any time a message is sent out through the MQTT layer. The message is copied into this buffer anytime a publish is done. This will also be used in the case of Thing Shadow
-#define AWS_IOT_MQTT_RX_BUF_LEN 512 ///< Any message that comes into the device should be less than this buffer size. If a received message is bigger than this buffer size the message will be dropped.
-#define AWS_IOT_MQTT_NUM_SUBSCRIBE_HANDLERS 5 ///< Maximum number of topic filters the MQTT client can handle at any given time. This should be increased appropriately when using Thing Shadow
+#define AWS_IOT_MQTT_TX_BUF_LEN CONFIG_AWS_IOT_MQTT_TX_BUF_LEN ///< Any time a message is sent out through the MQTT layer. The message is copied into this buffer anytime a publish is done. This will also be used in the case of Thing Shadow
+#define AWS_IOT_MQTT_RX_BUF_LEN CONFIG_AWS_IOT_MQTT_RX_BUF_LEN ///< Any message that comes into the device should be less than this buffer size. If a received message is bigger than this buffer size the message will be dropped.
+#define AWS_IOT_MQTT_NUM_SUBSCRIBE_HANDLERS CONFIG_AWS_IOT_MQTT_NUM_SUBSCRIBE_HANDLERS ///< Maximum number of topic filters the MQTT client can handle at any given time. This should be increased appropriately when using Thing Shadow
 
 // Thing Shadow specific configs
-#define SHADOW_MAX_SIZE_OF_RX_BUFFER (AWS_IOT_MQTT_RX_BUF_LEN + 1) ///< Maximum size of the SHADOW buffer to store the received Shadow message
+#ifdef CONFIG_AWS_IOT_OVERRIDE_THING_SHADOW_RX_BUFFER
+#define SHADOW_MAX_SIZE_OF_RX_BUFFER CONFIG_AWS_IOT_SHADOW_MAX_SIZE_OF_RX_BUFFER ///< Maximum size of the SHADOW buffer to store the received Shadow message, including NULL terminating byte
+#else
+#define SHADOW_MAX_SIZE_OF_RX_BUFFER (AWS_IOT_MQTT_RX_BUF_LEN + 1)
+#endif
+
 #define MAX_SIZE_OF_UNIQUE_CLIENT_ID_BYTES 80  ///< Maximum size of the Unique Client Id. For More info on the Client Id refer \ref response "Acknowledgments"
 #define MAX_SIZE_CLIENT_ID_WITH_SEQUENCE (MAX_SIZE_OF_UNIQUE_CLIENT_ID_BYTES + 10) ///< This is size of the extra sequence number that will be appended to the Unique client Id
 #define MAX_SIZE_CLIENT_TOKEN_CLIENT_SEQUENCE (MAX_SIZE_CLIENT_ID_WITH_SEQUENCE + 20) ///< This is size of the the total clientToken key and value pair in the JSON
-#define MAX_ACKS_TO_COMEIN_AT_ANY_GIVEN_TIME 10 ///< At Any given time we will wait for this many responses. This will correlate to the rate at which the shadow actions are requested
-#define MAX_THINGNAME_HANDLED_AT_ANY_GIVEN_TIME 10 ///< We could perform shadow action on any thing Name and this is maximum Thing Names we can act on at any given time
-#define MAX_JSON_TOKEN_EXPECTED 120 ///< These are the max tokens that is expected to be in the Shadow JSON document. Include the metadata that gets published
-#define MAX_SHADOW_TOPIC_LENGTH_WITHOUT_THINGNAME 60 ///< All shadow actions have to be published or subscribed to a topic which is of the formablogt $aws/things/{thingName}/shadow/update/accepted. This refers to the size of the topic without the Thing Name
-#define MAX_SIZE_OF_THING_NAME 20 ///< The Thing Name should not be bigger than this value. Modify this if the Thing Name needs to be bigger
+#define MAX_ACKS_TO_COMEIN_AT_ANY_GIVEN_TIME CONFIG_AWS_IOT_SHADOW_MAX_SIMULTANEOUS_ACKS ///< At Any given time we will wait for this many responses. This will correlate to the rate at which the shadow actions are requested
+#define MAX_THINGNAME_HANDLED_AT_ANY_GIVEN_TIME CONFIG_AWS_IOT_SHADOW_MAX_SIMULTANEOUS_THINGNAMES ///< We could perform shadow action on any thing Name and this is maximum Thing Names we can act on at any given time
+#define MAX_JSON_TOKEN_EXPECTED CONFIG_AWS_IOT_SHADOW_MAX_JSON_TOKEN_EXPECTED ///< These are the max tokens that is expected to be in the Shadow JSON document. Include the metadata that gets published
+#define MAX_SHADOW_TOPIC_LENGTH_WITHOUT_THINGNAME CONFIG_AWS_IOT_SHADOW_MAX_SHADOW_TOPIC_LENGTH_WITHOUT_THINGNAME ///< All shadow actions have to be published or subscribed to a topic which is of the formablogt $aws/things/{thingName}/shadow/update/accepted. This refers to the size of the topic without the Thing Name
+#define MAX_SIZE_OF_THING_NAME CONFIG_AWS_IOT_SHADOW_MAX_SIZE_OF_THING_NAME ///< The Thing Name should not be bigger than this value. Modify this if the Thing Name needs to be bigger
 #define MAX_SHADOW_TOPIC_LENGTH_BYTES (MAX_SHADOW_TOPIC_LENGTH_WITHOUT_THINGNAME + MAX_SIZE_OF_THING_NAME) ///< This size includes the length of topic with Thing Name
 
 // Auto Reconnect specific config
-#define AWS_IOT_MQTT_MIN_RECONNECT_WAIT_INTERVAL 1000 ///< Minimum time before the First reconnect attempt is made as part of the exponential back-off algorithm
-#define AWS_IOT_MQTT_MAX_RECONNECT_WAIT_INTERVAL 128000 ///< Maximum time interval after which exponential back-off will stop attempting to reconnect.
+#define AWS_IOT_MQTT_MIN_RECONNECT_WAIT_INTERVAL CONFIG_AWS_IOT_MQTT_MIN_RECONNECT_WAIT_INTERVAL ///< Minimum time before the First reconnect attempt is made as part of the exponential back-off algorithm
+#define AWS_IOT_MQTT_MAX_RECONNECT_WAIT_INTERVAL CONFIG_AWS_IOT_MQTT_MAX_RECONNECT_WAIT_INTERVAL ///< Maximum time interval after which exponential back-off will stop attempting to reconnect.
 
 #endif /* _AWS_IOT_CONFIG_H_ */

components/aws_iot/include/network_platform.h

@@ -23,7 +23,7 @@
 #endif
 
 #include "mbedtls/platform.h"
-#include "mbedtls/net.h"
+#include "mbedtls/net_sockets.h"
 #include "mbedtls/ssl.h"
 #include "mbedtls/entropy.h"
 #include "mbedtls/ctr_drbg.h"

components/aws_iot/port/network_mbedtls_wrapper.c

@@ -236,6 +236,15 @@ IoT_Error_t iot_tls_connect(Network *pNetwork, TLSConnectParams *params) {
 
     mbedtls_ssl_conf_read_timeout(&(tlsDataParams->conf), pNetwork->tlsConnectParams.timeout_ms);
 
+    /* Use the AWS IoT ALPN extension for MQTT, if port 443 is requested */
+    if (pNetwork->tlsConnectParams.DestinationPort == 443) {
+        const char *alpnProtocols[] = { "x-amzn-mqtt-ca", NULL };
+        if ((ret = mbedtls_ssl_conf_alpn_protocols(&(tlsDataParams->conf), alpnProtocols)) != 0) {
+            ESP_LOGE(TAG, "failed! mbedtls_ssl_conf_alpn_protocols returned -0x%x", -ret);
+            return SSL_CONNECTION_ERROR;
+        }
+    }
+
     if((ret = mbedtls_ssl_setup(&(tlsDataParams->ssl), &(tlsDataParams->conf))) != 0) {
         ESP_LOGE(TAG, "failed! mbedtls_ssl_setup returned -0x%x", -ret);
         return SSL_CONNECTION_ERROR;

components/bootloader/CMakeLists.txt

@@ -0,0 +1,7 @@
+# bootloader component logic is all in project_include.cmake,
+# and subproject/CMakeLists.txt.
+#
+# This file is only included so the build system finds the
+# component
+
+

components/bootloader/Kconfig.projbuild

@@ -28,15 +28,163 @@ config LOG_BOOTLOADER_LEVEL
     default 4 if LOG_BOOTLOADER_LEVEL_DEBUG
     default 5 if LOG_BOOTLOADER_LEVEL_VERBOSE
 
-endmenu
+config BOOTLOADER_SPI_WP_PIN
+    int "SPI Flash WP Pin when customising pins via efuse (read help)"
+    range 0 33
+    default 7
+    depends on FLASHMODE_QIO || FLASHMODE_QOUT
+    help
+        This value is ignored unless flash mode is set to QIO or QOUT *and* the SPI flash pins have been
+        overriden by setting the efuses SPI_PAD_CONFIG_xxx.
 
+        When this is the case, the Efuse config only defines 3 of the 4 Quad I/O data pins. The WP pin (aka ESP32
+        pin "SD_DATA_3" or SPI flash pin "IO2") is not specified in Efuse. That pin number is compiled into the bootloader
+        instead.
+
+        The default value (GPIO 7) is correct for WP pin on ESP32-D2WD integrated flash.
+
+choice BOOTLOADER_VDDSDIO_BOOST
+    bool "VDDSDIO LDO voltage"
+    default BOOTLOADER_VDDSDIO_BOOST_1_9V
+    help
+        If this option is enabled, and VDDSDIO LDO is set to 1.8V (using EFUSE
+        or MTDI bootstrapping pin), bootloader will change LDO settings to
+        output 1.9V instead. This helps prevent flash chip from browning out
+        during flash programming operations.
+
+        This option has no effect if VDDSDIO is set to 3.3V, or if the internal
+        VDDSDIO regulator is disabled via efuse.
+
+config BOOTLOADER_VDDSDIO_BOOST_1_8V
+    bool "1.8V"
+    depends on !ESPTOOLPY_FLASHFREQ_80M
+config BOOTLOADER_VDDSDIO_BOOST_1_9V
+    bool "1.9V"
+endchoice
+
+config BOOTLOADER_FACTORY_RESET
+    bool "GPIO triggers factory reset"
+    default N
+    help
+        Allows to reset the device to factory settings:
+        - clear one or more data partitions;
+        - boot from "factory" partition.
+        The factory reset will occur if there is a GPIO input pulled low while device starts up.
+        See settings below.
+
+config BOOTLOADER_NUM_PIN_FACTORY_RESET
+    int "Number of the GPIO input for factory reset"
+    depends on BOOTLOADER_FACTORY_RESET
+    range 0 39
+    default 4
+    help
+        The selected GPIO will be configured as an input with internal pull-up enabled.
+        To trigger a factory reset, this GPIO must be pulled low on reset.
+        Note that GPIO34-39 do not have an internal pullup and an external one must be provided.
+
+config BOOTLOADER_OTA_DATA_ERASE
+    bool "Clear OTA data on factory reset (select factory partition)"
+    depends on BOOTLOADER_FACTORY_RESET
+    help
+        The device will boot from "factory" partition (or OTA slot 0 if no factory partition is present) after a factory reset.
+
+config BOOTLOADER_DATA_FACTORY_RESET
+     string "Comma-separated names of partitions to clear on factory reset"
+     depends on BOOTLOADER_FACTORY_RESET
+     default "nvs"
+     help
+        Allows customers to select which data partitions will be erased while factory reset.
+        
+        Specify the names of partitions as a comma-delimited with optional spaces for readability. (Like this: "nvs, phy_init, ...")
+        Make sure that the name specified in the partition table and here are the same. 
+        Partitions of type "app" cannot be specified here.
+
+config BOOTLOADER_APP_TEST
+    bool "GPIO triggers boot from test app partition"
+    default N
+    help
+        Allows to run the test app from "TEST" partition.
+        A boot from "test" partition will occur if there is a GPIO input pulled low while device starts up.
+        See settings below.
+
+config BOOTLOADER_NUM_PIN_APP_TEST
+    int "Number of the GPIO input to boot TEST partition"
+    depends on BOOTLOADER_APP_TEST
+    range 0 39
+    default 18
+    help
+        The selected GPIO will be configured as an input with internal pull-up enabled.
+        To trigger a test app, this GPIO must be pulled low on reset.
+        After the GPIO input is deactivated and the device reboots, the old application will boot. 
+        (factory or OTA[x]).
+        Note that GPIO34-39 do not have an internal pullup and an external one must be provided.
+
+config BOOTLOADER_HOLD_TIME_GPIO
+    int "Hold time of GPIO for reset/test mode (seconds)"
+    depends on BOOTLOADER_FACTORY_RESET || BOOTLOADER_APP_TEST
+    default 5
+    help
+        The GPIO must be held low continuously for this period of time after reset 
+        before a factory reset or test partition boot (as applicable) is performed.
+
+endmenu  # Bootloader
 
 
 menu "Security features"
 
+# These three are the actual options to check in code,
+# selected by the displayed options
+config SECURE_SIGNED_ON_BOOT
+    bool
+    default y
+    depends on SECURE_BOOT_ENABLED || SECURE_SIGNED_ON_BOOT_NO_SECURE_BOOT
+
+config SECURE_SIGNED_ON_UPDATE
+    bool
+    default y
+    depends on SECURE_BOOT_ENABLED || SECURE_SIGNED_ON_UPDATE_NO_SECURE_BOOT
+
+config SECURE_SIGNED_APPS
+   bool
+   default y
+   depends on SECURE_SIGNED_ON_BOOT || SECURE_SIGNED_ON_UPDATE
+
+
+config SECURE_SIGNED_APPS_NO_SECURE_BOOT
+    bool "Require signed app images"
+    default n
+    depends on !SECURE_BOOT_ENABLED
+    help
+        Require apps to be signed to verify their integrity.
+
+        This option uses the same app signature scheme as hardware secure boot, but unlike hardware secure boot it does not prevent the bootloader from being physically updated. This means that the device can be secured against remote network access, but not physical access. Compared to using hardware Secure Boot this option is much simpler to implement.
+
+config SECURE_SIGNED_ON_BOOT_NO_SECURE_BOOT
+    bool "Bootloader verifies app signatures"
+    default n
+    depends on SECURE_SIGNED_APPS_NO_SECURE_BOOT
+    help
+        If this option is set, the bootloader will be compiled with code to verify that an app is signed before booting it.
+
+        If hardware secure boot is enabled, this option is always enabled and cannot be disabled.
+        If hardware secure boot is not enabled, this option doesn't add significant security by itself so most users will want to leave it disabled.
+
+config SECURE_SIGNED_ON_UPDATE_NO_SECURE_BOOT
+    bool "Verify app signature on update"
+    default y
+    depends on SECURE_SIGNED_APPS_NO_SECURE_BOOT
+    help
+         If this option is set, any OTA updated apps will have the signature verified before being considered valid.
+
+         When enabled, the signature is automatically checked whenever the esp_ota_ops.h APIs are used for OTA updates,
+         or esp_image_format.h APIs are used to verify apps.
+
+         If hardware secure boot is enabled, this option is always enabled and cannot be disabled.
+         If hardware secure boot is not enabled, this option still adds significant security against network-based attackers by preventing spoofing of OTA updates.
+
 config SECURE_BOOT_ENABLED
-    bool "Enable secure boot in bootloader (READ DOCS FIRST)"
-    default N
+    bool "Enable hardware secure boot in bootloader (READ DOCS FIRST)"
+    default n
     help
         Build a bootloader which enables secure boot on first boot.
 
@@ -44,7 +192,7 @@ config SECURE_BOOT_ENABLED
 
         When enabling secure boot, JTAG and ROM BASIC Interpreter are permanently disabled by default.
 
-        Refer to http://esp-idf.readthedocs.io/en/latest/security/secure-boot.html before enabling.
+        Refer to https://docs.espressif.com/projects/esp-idf/en/latest/security/secure-boot.html before enabling.
 
 choice SECURE_BOOTLOADER_MODE
     bool "Secure bootloader mode"
@@ -71,12 +219,12 @@ endchoice
 
 config SECURE_BOOT_BUILD_SIGNED_BINARIES
      bool "Sign binaries during build"
-     depends on SECURE_BOOT_ENABLED
+     depends on SECURE_SIGNED_APPS
      default y
      help
-        Once secure boot is enabled, bootloader will only boot if partition table and app image are signed.
+        Once secure boot or signed app requirement is enabled, app images are required to be signed.
 
-        If enabled, these binary files are signed as part of the build process. The file named in "Secure boot private signing key" will be used to sign the image.
+        If enabled (default), these binary files are signed as part of the build process. The file named in "Secure boot private signing key" will be used to sign the image.
 
         If disabled, unsigned app/partition data will be built. They must be signed manually using espsecure.py (for example, on a remote signing server.)
 
@@ -85,7 +233,7 @@ config SECURE_BOOT_SIGNING_KEY
      depends on SECURE_BOOT_BUILD_SIGNED_BINARIES
      default secure_boot_signing_key.pem
      help
-        Path to the key file used to sign partition tables and app images for secure boot. Once secure boot is enabled, bootloader will only boot if partition table and app image are signed.
+        Path to the key file used to sign app images.
 
         Key file is an ECDSA private key (NIST256p curve) in PEM format.
 
@@ -98,17 +246,38 @@ config SECURE_BOOT_SIGNING_KEY
 
 config SECURE_BOOT_VERIFICATION_KEY
     string "Secure boot public signature verification key"
-    depends on SECURE_BOOT_ENABLED && !SECURE_BOOT_BUILD_SIGNED_BINARIES
+    depends on SECURE_SIGNED_APPS && !SECURE_BOOT_BUILD_SIGNED_BINARIES
     default signature_verification_key.bin
     help
-       Path to a public key file used to verify signed images. This key is compiled into the bootloader,
-       and may also be used to verify signatures on OTA images after download.
+       Path to a public key file used to verify signed images. This key is compiled into the bootloader and/or app,
+       to verify app images.
 
        Key file is in raw binary format, and can be extracted from a
        PEM formatted private key using the espsecure.py
        extract_public_key command.
 
-       Refer to http://esp-idf.readthedocs.io/en/latest/security/secure-boot.html before enabling.
+       Refer to https://docs.espressif.com/projects/esp-idf/en/latest/security/secure-boot.html before enabling.
+
+choice SECURE_BOOTLOADER_KEY_ENCODING
+    bool "Hardware Key Encoding"
+    depends on SECURE_BOOTLOADER_REFLASHABLE
+    default SECURE_BOOTLOADER_NO_ENCODING
+    help
+
+    In reflashable secure bootloader mode, a hardware key is derived from the signing key (with SHA-256) and can be written to efuse
+    with espefuse.py.
+
+    Normally this is a 256-bit key, but if 3/4 Coding Scheme is used on the device then the efuse key is truncated to 192 bits.
+
+    This configuration item doesn't change any firmware code, it only changes the size of key binary which is generated at build time.
+
+config SECURE_BOOTLOADER_KEY_ENCODING_256BIT
+       bool "No encoding (256 bit key)"
+
+config SECURE_BOOTLOADER_KEY_ENCODING_192BIT
+       bool "3/4 encoding (192 bit key)"
+
+endchoice
 
 config SECURE_BOOT_INSECURE
     bool "Allow potentially insecure options"
@@ -119,7 +288,7 @@ config SECURE_BOOT_INSECURE
 
        Only enable these options if you are very sure.
 
-       Refer to http://esp-idf.readthedocs.io/en/latest/security/secure-boot.html before enabling.
+       Refer to https://docs.espressif.com/projects/esp-idf/en/latest/security/secure-boot.html before enabling.
 
 config FLASH_ENCRYPTION_ENABLED
     bool "Enable flash encryption on boot (READ DOCS FIRST)"
@@ -130,7 +299,7 @@ config FLASH_ENCRYPTION_ENABLED
        Note: After first boot, the system will be permanently encrypted. Re-flashing an encrypted
        system is complicated and not always possible.
 
-       Read http://esp-idf.readthedocs.io/en/latest/security/flash-encryption.html before enabling.
+       Read https://docs.espressif.com/projects/esp-idf/en/latest/security/flash-encryption.html before enabling.
 
 config FLASH_ENCRYPTION_INSECURE
     bool "Allow potentially insecure options"
@@ -154,12 +323,17 @@ menu "Potentially insecure options"
 
 config SECURE_BOOT_ALLOW_ROM_BASIC
        bool "Leave ROM BASIC Interpreter available on reset"
-       depends on SECURE_BOOT_INSECURE
+       depends on SECURE_BOOT_INSECURE || FLASH_ENCRYPTION_INSECURE
        default N
        help
-          If not set (default), bootloader permanently disables ROM BASIC (on UART console) as a fallback if the bootloader image becomes invalid. This happens on first boot.
+          By default, the BASIC ROM Console starts on reset if no valid bootloader is
+          read from the flash.
 
-          Only set this option in testing environments.
+          When either flash encryption or secure boot are enabled, the default is to
+          disable this BASIC fallback mode permanently via efuse.
+
+          If this option is set, this efuse is not burned and the BASIC ROM Console may
+          remain accessible.  Only set this option in testing environments.
 
 config SECURE_BOOT_ALLOW_JTAG
        bool "Allow JTAG Debugging"
@@ -172,6 +346,13 @@ config SECURE_BOOT_ALLOW_JTAG
 
           Only set this option in testing environments.
 
+config SECURE_BOOT_ALLOW_SHORT_APP_PARTITION
+       bool "Allow app partition length not 64KB aligned"
+       depends on SECURE_BOOT_INSECURE
+       help
+           If not set (default), app partition size must be a multiple of 64KB. App images are padded to 64KB length, and the bootloader checks any trailing bytes after the signature (before the next 64KB boundary) have not been written. This is because flash cache maps entire 64KB pages into the address space. This prevents an attacker from appending unverified data after the app image in the flash, causing it to be mapped into the address space.
+
+           Setting this option allows the app partition length to be unaligned, and disables padding of the app image to this length. It is generally not recommended to set this option, unless you have a legacy partitioning scheme which doesn't support 64KB aligned partition lengths.
 
 config FLASH_ENCRYPTION_UART_BOOTLOADER_ALLOW_ENCRYPT
     bool "Leave UART bootloader encryption enabled"
@@ -212,6 +393,5 @@ config SECURE_BOOT_TEST_MODE
           This option is for testing purposes only - it completely disables secure boot protection.
 
 
-endmenu  # potentially insecure
-
-endmenu
+endmenu  # Potentially Insecure
+endmenu  # Security features

components/bootloader/Makefile.projbuild

@@ -1,20 +1,19 @@
-#
-# Bootloader component
+# Bootloader component (top-level project parts)
 #
 # The bootloader is not a real component that gets linked into the project.
-# Instead it is an entire standalone project ( in src/) that gets built in 
-# the upper projects build directory. This Makefile.projbuild provides the 
-# glue to  build the bootloader project from the original project. It 
-# basically runs Make in the src/ directory but it needs to zero some variables
-# the ESP-IDF project.mk makefile exports first, to not let them interfere.
+# Instead it is an entire standalone project (in subproject/) that gets
+# built in the upper project's build directory. This Makefile.projbuild provides
+# the glue to build the bootloader project from the original project. It
+# basically runs Make in the subproject/ directory but it needs to
+# zero some variables the ESP-IDF project.mk makefile exports first, to not
+# let them interfere.
 #
-ifndef IS_BOOTLOADER_BUILD
-
 BOOTLOADER_COMPONENT_PATH := $(COMPONENT_PATH)
 BOOTLOADER_BUILD_DIR=$(abspath $(BUILD_DIR_BASE)/bootloader)
 BOOTLOADER_BIN=$(BOOTLOADER_BUILD_DIR)/bootloader.bin
 
 # signing key path is resolved relative to the project directory
+CONFIG_SECURE_BOOT_SIGNING_KEY ?=
 SECURE_BOOT_SIGNING_KEY=$(abspath $(call dequote,$(CONFIG_SECURE_BOOT_SIGNING_KEY)))
 export SECURE_BOOT_SIGNING_KEY  # used by bootloader_support component
 
@@ -22,16 +21,30 @@ export SECURE_BOOT_SIGNING_KEY  # used by bootloader_support component
 BOOTLOADER_OFFSET := 0x1000
 
 # Custom recursive make for bootloader sub-project
-BOOTLOADER_MAKE=+$(MAKE) -C $(BOOTLOADER_COMPONENT_PATH)/src \
-	V=$(V) BUILD_DIR_BASE=$(BOOTLOADER_BUILD_DIR) TEST_COMPONENTS= TESTS_ALL=
+#
+# NB: Some variables are cleared in the environment, not
+# overriden, because they need to be re-defined in the child
+# project.
+BOOTLOADER_MAKE= +\
+	PROJECT_PATH= \
+	COMPONENT_DIRS= \
+	$(MAKE) -C $(BOOTLOADER_COMPONENT_PATH)/subproject \
+	V=$(V) \
+	BUILD_DIR_BASE=$(BOOTLOADER_BUILD_DIR) \
+	TEST_COMPONENTS= \
+	TESTS_ALL= \
+	EXCLUDE_COMPONENTS=
 
-.PHONY: bootloader-clean bootloader-flash bootloader $(BOOTLOADER_BIN)
+.PHONY: bootloader-clean bootloader-flash bootloader-list-components bootloader $(BOOTLOADER_BIN)
 
 $(BOOTLOADER_BIN): $(SDKCONFIG_MAKEFILE)
 	$(BOOTLOADER_MAKE) $@
 
 clean: bootloader-clean
 
+bootloader-list-components:
+	$(BOOTLOADER_MAKE) list-components
+
 ifndef CONFIG_SECURE_BOOT_ENABLED
 # If secure boot disabled, bootloader flashing is integrated
 # with 'make flash' and no warnings are printed.
@@ -65,12 +78,18 @@ else ifdef CONFIG_SECURE_BOOTLOADER_REFLASHABLE
 # Reflashable secure bootloader
 # generates a digest binary (bootloader + digest)
 
+ifdef CONFIG_SECURE_BOOTLOADER_KEY_ENCODING_192BIT
+KEY_DIGEST_LEN=192
+else
+KEY_DIGEST_LEN=256
+endif
+
 BOOTLOADER_DIGEST_BIN := $(BOOTLOADER_BUILD_DIR)/bootloader-reflash-digest.bin
-SECURE_BOOTLOADER_KEY := $(BOOTLOADER_BUILD_DIR)/secure-bootloader-key.bin
+SECURE_BOOTLOADER_KEY := $(BOOTLOADER_BUILD_DIR)/secure-bootloader-key-$(KEY_DIGEST_LEN).bin
 
 ifdef CONFIG_SECURE_BOOT_BUILD_SIGNED_BINARIES
 $(SECURE_BOOTLOADER_KEY): $(SECURE_BOOT_SIGNING_KEY)
-	$(ESPSECUREPY) digest_private_key -k $< $@
+	$(ESPSECUREPY) digest_private_key --keylen $(KEY_DIGEST_LEN) -k $< $@
 else
 $(SECURE_BOOTLOADER_KEY):
 	@echo "No pre-generated key for a reflashable secure bootloader is available, due to signing configuration."
@@ -94,9 +113,9 @@ bootloader: $(BOOTLOADER_DIGEST_BIN)
 
 $(BOOTLOADER_DIGEST_BIN): $(BOOTLOADER_BIN) $(SECURE_BOOTLOADER_KEY)
 	@echo "DIGEST $(notdir $@)"
-	$(Q) $(ESPSECUREPY) digest_secure_bootloader -k $(SECURE_BOOTLOADER_KEY) -o $@ $<
+	$(ESPSECUREPY) digest_secure_bootloader -k $(SECURE_BOOTLOADER_KEY) -o $@ $<
 
-else
+else # CONFIG_SECURE_BOOT_ENABLED && !CONFIG_SECURE_BOOTLOADER_REFLASHABLE && !CONFIG_SECURE_BOOTLOADER_ONE_TIME_FLASH
 bootloader:
 	@echo "Invalid bootloader target: bad sdkconfig?"
 	@exit 1
@@ -107,14 +126,8 @@ ifndef CONFIG_SECURE_BOOT_ENABLED
 all_binaries: $(BOOTLOADER_BIN)
 endif
 
-bootloader-clean:
+bootloader-clean: $(SDKCONFIG_MAKEFILE)
 	$(BOOTLOADER_MAKE) app-clean
+ifdef CONFIG_SECURE_BOOTLOADER_REFLASHABLE
 	rm -f $(SECURE_BOOTLOADER_KEY) $(BOOTLOADER_DIGEST_BIN)
-
-$(BOOTLOADER_BUILD_DIR):
-	mkdir -p $@
-
-else
-CFLAGS += -D BOOTLOADER_BUILD=1 -I $(IDF_PATH)/components/esp32/include
-
 endif

components/bootloader/component.mk

@@ -0,0 +1,7 @@
+# bootloader component is special, as bootloader is also a project.
+#
+# This top-level component is only configuration files for the IDF project.
+#
+# See Makefile.projbuild for the targets which actually build the bootloader.
+COMPONENT_CONFIG_ONLY := 1
+

components/bootloader/project_include.cmake

@@ -0,0 +1,34 @@
+if(BOOTLOADER_BUILD)
+    return()  # don't keep recursing!
+endif()
+
+# Glue to build the bootloader subproject binary as an external
+# cmake project under this one
+#
+#
+set(bootloader_build_dir "${CMAKE_BINARY_DIR}/bootloader")
+set(bootloader_binary_files
+    "${bootloader_build_dir}/bootloader.elf"
+    "${bootloader_build_dir}/bootloader.bin"
+    "${bootloader_build_dir}/bootloader.map"
+    )
+
+externalproject_add(bootloader
+    # TODO: support overriding the bootloader in COMPONENT_PATHS
+    SOURCE_DIR "${CMAKE_CURRENT_LIST_DIR}/subproject"
+    BINARY_DIR "${bootloader_build_dir}"
+    CMAKE_ARGS  -DSDKCONFIG=${SDKCONFIG} -DIDF_PATH=${IDF_PATH}
+                -DEXTRA_COMPONENT_DIRS=${CMAKE_CURRENT_LIST_DIR}
+    INSTALL_COMMAND ""
+    BUILD_ALWAYS 1  # no easy way around this...
+    BUILD_BYPRODUCTS ${bootloader_binary_files}
+    )
+
+# this is a hack due to an (annoying) shortcoming in cmake, it can't
+# extend the 'clean' target to the external project
+# see thread: https://cmake.org/pipermail/cmake/2016-December/064660.html
+#
+# So for now we just have the top-level build remove the final build products...
+set_property(DIRECTORY "${CMAKE_CURRENT_SOURCE_DIR}" APPEND PROPERTY
+    ADDITIONAL_MAKE_CLEAN_FILES
+    ${bootloader_binary_files})

components/bootloader/src/main/bootloader_start.c

@@ -1,857 +0,0 @@
-// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
-#include <string.h>
-#include <stdint.h>
-#include <limits.h>
-#include <sys/param.h>
-
-#include "esp_attr.h"
-#include "esp_log.h"
-
-#include "rom/cache.h"
-#include "rom/efuse.h"
-#include "rom/ets_sys.h"
-#include "rom/spi_flash.h"
-#include "rom/crc.h"
-#include "rom/rtc.h"
-#include "rom/uart.h"
-#include "rom/gpio.h"
-#include "rom/secure_boot.h"
-
-#include "soc/soc.h"
-#include "soc/cpu.h"
-#include "soc/rtc.h"
-#include "soc/dport_reg.h"
-#include "soc/io_mux_reg.h"
-#include "soc/efuse_reg.h"
-#include "soc/rtc_cntl_reg.h"
-#include "soc/timer_group_reg.h"
-#include "soc/gpio_reg.h"
-#include "soc/gpio_sig_map.h"
-
-#include "sdkconfig.h"
-#include "esp_image_format.h"
-#include "esp_secure_boot.h"
-#include "esp_flash_encrypt.h"
-#include "esp_flash_partitions.h"
-#include "bootloader_flash.h"
-#include "bootloader_random.h"
-#include "bootloader_config.h"
-
-#include "flash_qio_mode.h"
-
-extern int _bss_start;
-extern int _bss_end;
-
-static const char* TAG = "boot";
-/*
-We arrive here after the bootloader finished loading the program from flash. The hardware is mostly uninitialized,
-flash cache is down and the app CPU is in reset. We do have a stack, so we can do the initialization in C.
-*/
-
-
-void bootloader_main();
-static void unpack_load_app(const esp_partition_pos_t *app_node);
-void print_flash_info(const esp_image_header_t* pfhdr);
-static void set_cache_and_start_app(uint32_t drom_addr,
-    uint32_t drom_load_addr,
-    uint32_t drom_size,
-    uint32_t irom_addr,
-    uint32_t irom_load_addr,
-    uint32_t irom_size,
-    uint32_t entry_addr);
-static void update_flash_config(const esp_image_header_t* pfhdr);
-static void clock_configure(void);
-static void uart_console_configure(void);
-static void wdt_reset_check(void);
-
-void IRAM_ATTR call_start_cpu0()
-{
-    cpu_configure_region_protection();
-
-    //Clear bss
-    memset(&_bss_start, 0, (&_bss_end - &_bss_start) * sizeof(_bss_start));
-
-    /* completely reset MMU for both CPUs
-       (in case serial bootloader was running) */
-    Cache_Read_Disable(0);
-    Cache_Read_Disable(1);
-    Cache_Flush(0);
-    Cache_Flush(1);
-    mmu_init(0);
-    DPORT_REG_SET_BIT(DPORT_APP_CACHE_CTRL1_REG, DPORT_APP_CACHE_MMU_IA_CLR);
-    mmu_init(1);
-    DPORT_REG_CLR_BIT(DPORT_APP_CACHE_CTRL1_REG, DPORT_APP_CACHE_MMU_IA_CLR);
-    /* (above steps probably unnecessary for most serial bootloader
-       usage, all that's absolutely needed is that we unmask DROM0
-       cache on the following two lines - normal ROM boot exits with
-       DROM0 cache unmasked, but serial bootloader exits with it
-       masked. However can't hurt to be thorough and reset
-       everything.)
-
-       The lines which manipulate DPORT_APP_CACHE_MMU_IA_CLR bit are
-       necessary to work around a hardware bug.
-    */
-    DPORT_REG_CLR_BIT(DPORT_PRO_CACHE_CTRL1_REG, DPORT_PRO_CACHE_MASK_DROM0);
-    DPORT_REG_CLR_BIT(DPORT_APP_CACHE_CTRL1_REG, DPORT_APP_CACHE_MASK_DROM0);
-
-    bootloader_main();
-}
-
-
-/** @brief Load partition table
- *
- *  Parse partition table, get useful data such as location of
- *  OTA data partition, factory app partition, and test app partition.
- *
- *  @param         bs     bootloader state structure used to save read data
- *  @return        return true if the partition table was succesfully loaded and MD5 checksum is valid.
- */
-bool load_partition_table(bootloader_state_t* bs)
-{
-    const esp_partition_info_t *partitions;
-    const int ESP_PARTITION_TABLE_DATA_LEN = 0xC00; /* length of actual data (signature is appended to this) */
-    char *partition_usage;
-    esp_err_t err;
-    int num_partitions;
-
-#ifdef CONFIG_SECURE_BOOT_ENABLED
-    if(esp_secure_boot_enabled()) {
-        ESP_LOGI(TAG, "Verifying partition table signature...");
-        err = esp_secure_boot_verify_signature(ESP_PARTITION_TABLE_ADDR, ESP_PARTITION_TABLE_DATA_LEN);
-        if (err != ESP_OK) {
-            ESP_LOGE(TAG, "Failed to verify partition table signature.");
-            return false;
-        }
-        ESP_LOGD(TAG, "Partition table signature verified");
-    }
-#endif
-
-    partitions = bootloader_mmap(ESP_PARTITION_TABLE_ADDR, ESP_PARTITION_TABLE_DATA_LEN);
-    if (!partitions) {
-            ESP_LOGE(TAG, "bootloader_mmap(0x%x, 0x%x) failed", ESP_PARTITION_TABLE_ADDR, ESP_PARTITION_TABLE_DATA_LEN);
-            return false;
-    }
-    ESP_LOGD(TAG, "mapped partition table 0x%x at 0x%x", ESP_PARTITION_TABLE_ADDR, (intptr_t)partitions);
-
-    err = esp_partition_table_basic_verify(partitions, true, &num_partitions);
-    if (err != ESP_OK) {
-        ESP_LOGE(TAG, "Failed to verify partition table");
-        return false;
-    }
-
-    ESP_LOGI(TAG, "Partition Table:");
-    ESP_LOGI(TAG, "## Label            Usage          Type ST Offset   Length");
-
-    for(int i = 0; i < num_partitions; i++) {
-        const esp_partition_info_t *partition = &partitions[i];
-        ESP_LOGD(TAG, "load partition table entry 0x%x", (intptr_t)partition);
-        ESP_LOGD(TAG, "type=%x subtype=%x", partition->type, partition->subtype);
-        partition_usage = "unknown";
-
-        /* valid partition table */
-        switch(partition->type) {
-        case PART_TYPE_APP: /* app partition */
-            switch(partition->subtype) {
-            case PART_SUBTYPE_FACTORY: /* factory binary */
-                bs->factory = partition->pos;
-                partition_usage = "factory app";
-                break;
-            case PART_SUBTYPE_TEST: /* test binary */
-                bs->test = partition->pos;
-                partition_usage = "test app";
-                break;
-            default:
-                /* OTA binary */
-                if ((partition->subtype & ~PART_SUBTYPE_OTA_MASK) == PART_SUBTYPE_OTA_FLAG) {
-                    bs->ota[partition->subtype & PART_SUBTYPE_OTA_MASK] = partition->pos;
-                    ++bs->app_count;
-                    partition_usage = "OTA app";
-                }
-                else {
-                    partition_usage = "Unknown app";
-                }
-                break;
-            }
-            break; /* PART_TYPE_APP */
-        case PART_TYPE_DATA: /* data partition */
-            switch(partition->subtype) {
-            case PART_SUBTYPE_DATA_OTA: /* ota data */
-                bs->ota_info = partition->pos;
-                partition_usage = "OTA data";
-                break;
-            case PART_SUBTYPE_DATA_RF:
-                partition_usage = "RF data";
-                break;
-            case PART_SUBTYPE_DATA_WIFI:
-                partition_usage = "WiFi data";
-                break;
-            default:
-                partition_usage = "Unknown data";
-                break;
-            }
-            break; /* PARTITION_USAGE_DATA */
-        default: /* other partition type */
-            break;
-        }
-
-        /* print partition type info */
-        ESP_LOGI(TAG, "%2d %-16s %-16s %02x %02x %08x %08x", i, partition->label, partition_usage,
-                 partition->type, partition->subtype,
-                 partition->pos.offset, partition->pos.size);
-    }
-
-    bootloader_munmap(partitions);
-
-    ESP_LOGI(TAG,"End of partition table");
-    return true;
-}
-
-static uint32_t ota_select_crc(const esp_ota_select_entry_t *s)
-{
-  return crc32_le(UINT32_MAX, (uint8_t*)&s->ota_seq, 4);
-}
-
-static bool ota_select_valid(const esp_ota_select_entry_t *s)
-{
-  return s->ota_seq != UINT32_MAX && s->crc == ota_select_crc(s);
-}
-
-/**
- *  @function :     bootloader_main
- *  @description:   entry function of 2nd bootloader
- *
- *  @inputs:        void
- */
-
-void bootloader_main()
-{
-    clock_configure();
-    uart_console_configure();
-    wdt_reset_check();
-    ESP_LOGI(TAG, "ESP-IDF %s 2nd stage bootloader", IDF_VER);
-#if defined(CONFIG_SECURE_BOOT_ENABLED) || defined(CONFIG_FLASH_ENCRYPTION_ENABLED)
-    esp_err_t err;
-#endif
-    esp_image_header_t fhdr;
-    bootloader_state_t bs;
-    esp_rom_spiflash_result_t spiRet1,spiRet2;
-    esp_ota_select_entry_t sa,sb;
-    const esp_ota_select_entry_t *ota_select_map;
-
-    memset(&bs, 0, sizeof(bs));
-
-    ESP_LOGI(TAG, "compile time " __TIME__ );
-    ets_set_appcpu_boot_addr(0); 
-
-    /* disable watch dog here */
-    REG_CLR_BIT( RTC_CNTL_WDTCONFIG0_REG, RTC_CNTL_WDT_FLASHBOOT_MOD_EN );
-    REG_CLR_BIT( TIMG_WDTCONFIG0_REG(0), TIMG_WDT_FLASHBOOT_MOD_EN );
-
-#ifndef CONFIG_SPI_FLASH_ROM_DRIVER_PATCH
-    const uint32_t spiconfig = ets_efuse_get_spiconfig();
-    if(spiconfig != EFUSE_SPICONFIG_SPI_DEFAULTS && spiconfig != EFUSE_SPICONFIG_HSPI_DEFAULTS) {
-        ESP_LOGE(TAG, "SPI flash pins are overridden. \"Enable SPI flash ROM driver patched functions\" must be enabled in menuconfig");
-        return;
-    }
-#endif
-
-    esp_rom_spiflash_unlock();
-
-    ESP_LOGI(TAG, "Enabling RNG early entropy source...");
-    bootloader_random_enable();
-
-#if CONFIG_FLASHMODE_QIO || CONFIG_FLASHMODE_QOUT
-    bootloader_enable_qio_mode();
-#endif
-
-    if(esp_image_load_header(0x1000, true, &fhdr) != ESP_OK) {
-        ESP_LOGE(TAG, "failed to load bootloader header!");
-        return;
-    }
-
-    print_flash_info(&fhdr);
-
-    update_flash_config(&fhdr);
-
-    if (!load_partition_table(&bs)) {
-        ESP_LOGE(TAG, "load partition table error!");
-        return;
-    }
-
-    esp_partition_pos_t load_part_pos;
-
-    if (bs.ota_info.offset != 0) {              // check if partition table has OTA info partition
-        //ESP_LOGE("OTA info sector handling is not implemented");
-        if (bs.ota_info.size < 2 * SPI_SEC_SIZE) {
-            ESP_LOGE(TAG, "ERROR: ota_info partition size %d is too small (minimum %d bytes)", bs.ota_info.size, sizeof(esp_ota_select_entry_t));
-            return;
-        }
-        ota_select_map = bootloader_mmap(bs.ota_info.offset, bs.ota_info.size);
-        if (!ota_select_map) {
-            ESP_LOGE(TAG, "bootloader_mmap(0x%x, 0x%x) failed", bs.ota_info.offset, bs.ota_info.size);
-            return;
-        }
-        memcpy(&sa, ota_select_map, sizeof(esp_ota_select_entry_t));
-        memcpy(&sb, (uint8_t *)ota_select_map + SPI_SEC_SIZE, sizeof(esp_ota_select_entry_t));
-        bootloader_munmap(ota_select_map);
-        ESP_LOGD(TAG, "OTA sequence values A 0x%08x B 0x%08x", sa.ota_seq, sb.ota_seq);
-        if(sa.ota_seq == 0xFFFFFFFF && sb.ota_seq == 0xFFFFFFFF) {
-            ESP_LOGD(TAG, "OTA sequence numbers both empty (all-0xFF");
-            // init status flash
-            if (bs.factory.offset != 0) {        // if have factory bin,boot factory bin
-                ESP_LOGD(TAG, "Defaulting to factory image");
-                load_part_pos = bs.factory;
-            } else {
-                ESP_LOGD(TAG, "No factory image, defaulting to OTA 0");
-                load_part_pos = bs.ota[0];
-                sa.ota_seq = 0x01;
-                sa.crc = ota_select_crc(&sa);
-                sb.ota_seq = 0x00;
-                sb.crc = ota_select_crc(&sb);
-
-                Cache_Read_Disable(0);
-                spiRet1 = esp_rom_spiflash_erase_sector(bs.ota_info.offset/0x1000);
-                spiRet2 = esp_rom_spiflash_erase_sector(bs.ota_info.offset/0x1000+1);
-                if (spiRet1 != ESP_ROM_SPIFLASH_RESULT_OK || spiRet2 != ESP_ROM_SPIFLASH_RESULT_OK ) {
-                    ESP_LOGE(TAG, SPI_ERROR_LOG);
-                    return;
-                }
-                spiRet1 = esp_rom_spiflash_write(bs.ota_info.offset,(uint32_t *)&sa,sizeof(esp_ota_select_entry_t));
-                spiRet2 = esp_rom_spiflash_write(bs.ota_info.offset + 0x1000,(uint32_t *)&sb,sizeof(esp_ota_select_entry_t));
-                if (spiRet1 != ESP_ROM_SPIFLASH_RESULT_OK || spiRet2 != ESP_ROM_SPIFLASH_RESULT_OK ) {
-                    ESP_LOGE(TAG, SPI_ERROR_LOG);
-                    return;
-                }
-                Cache_Read_Enable(0);
-            }
-            //TODO:write data in ota info
-        } else  {
-            if(ota_select_valid(&sa) && ota_select_valid(&sb)) {
-                ESP_LOGD(TAG, "Both OTA sequence valid, using OTA slot %d", MAX(sa.ota_seq, sb.ota_seq)-1);
-                load_part_pos = bs.ota[(MAX(sa.ota_seq, sb.ota_seq) - 1)%bs.app_count];
-            } else if(ota_select_valid(&sa)) {
-                ESP_LOGD(TAG, "Only OTA sequence A is valid, using OTA slot %d", sa.ota_seq - 1);
-                load_part_pos = bs.ota[(sa.ota_seq - 1) % bs.app_count];
-            } else if(ota_select_valid(&sb)) {
-                ESP_LOGD(TAG, "Only OTA sequence B is valid, using OTA slot %d", sa.ota_seq - 1);
-                load_part_pos = bs.ota[(sb.ota_seq - 1) % bs.app_count];
-            } else if (bs.factory.offset != 0) {
-                ESP_LOGE(TAG, "ota data partition invalid, falling back to factory");
-                load_part_pos = bs.factory;
-            } else {
-                ESP_LOGE(TAG, "ota data partition invalid and no factory, can't boot");
-                return;
-            }
-        }
-    } else if (bs.factory.offset != 0) {        // otherwise, look for factory app partition
-        load_part_pos = bs.factory;
-    } else if (bs.test.offset != 0) {           // otherwise, look for test app parition
-        load_part_pos = bs.test;
-    } else {                                    // nothing to load, bail out
-        ESP_LOGE(TAG, "nothing to load");
-        return;
-    }
-
-#ifdef CONFIG_SECURE_BOOT_ENABLED
-    /* Generate secure digest from this bootloader to protect future
-       modifications */
-    ESP_LOGI(TAG, "Checking secure boot...");
-    err = esp_secure_boot_permanently_enable();
-    if (err != ESP_OK) {
-        ESP_LOGE(TAG, "Bootloader digest generation failed (%d). SECURE BOOT IS NOT ENABLED.", err);
-        /* Allow booting to continue, as the failure is probably
-           due to user-configured EFUSEs for testing...
-        */
-    }
-#endif
-
-#ifdef CONFIG_FLASH_ENCRYPTION_ENABLED
-    /* encrypt flash */
-    ESP_LOGI(TAG, "Checking flash encryption...");
-    bool flash_encryption_enabled = esp_flash_encryption_enabled();
-    err = esp_flash_encrypt_check_and_update();
-    if (err != ESP_OK) {
-      ESP_LOGE(TAG, "Flash encryption check failed (%d).", err);
-      return;
-    }
-
-    if (!flash_encryption_enabled && esp_flash_encryption_enabled()) {
-      /* Flash encryption was just enabled for the first time,
-         so issue a system reset to ensure flash encryption
-         cache resets properly */
-      ESP_LOGI(TAG, "Resetting with flash encryption enabled...");
-      REG_WRITE(RTC_CNTL_OPTIONS0_REG, RTC_CNTL_SW_SYS_RST);
-      return;
-    }
-#endif
-
-    ESP_LOGI(TAG, "Disabling RNG early entropy source...");
-    bootloader_random_disable();
-
-    // copy loaded segments to RAM, set up caches for mapped segments, and start application
-    ESP_LOGI(TAG, "Loading app partition at offset %08x", load_part_pos);
-    unpack_load_app(&load_part_pos);
-}
-
-static void unpack_load_app(const esp_partition_pos_t* partition)
-{
-    esp_err_t err;
-    esp_image_header_t image_header;
-    uint32_t image_length;
-
-    /* TODO: verify the app image as part of OTA boot decision, so can have fallbacks */
-    err = esp_image_basic_verify(partition->offset, true, &image_length);
-    if (err != ESP_OK) {
-        ESP_LOGE(TAG, "Failed to verify app image @ 0x%x (%d)", partition->offset, err);
-        return;
-    }
-
-#ifdef CONFIG_SECURE_BOOT_ENABLED
-    if (esp_secure_boot_enabled()) {
-        ESP_LOGI(TAG, "Verifying app signature @ 0x%x (length 0x%x)", partition->offset, image_length);
-        err = esp_secure_boot_verify_signature(partition->offset, image_length);
-        if (err != ESP_OK) {
-            ESP_LOGE(TAG, "App image @ 0x%x failed signature verification (%d)", partition->offset, err);
-            return;
-        }
-        ESP_LOGD(TAG, "App signature is valid");
-    }
-#endif
-
-    if (esp_image_load_header(partition->offset, true, &image_header) != ESP_OK) {
-        ESP_LOGE(TAG, "Failed to load app image header @ 0x%x", partition->offset);
-        return;
-    }
-
-    uint32_t drom_addr = 0;
-    uint32_t drom_load_addr = 0;
-    uint32_t drom_size = 0;
-    uint32_t irom_addr = 0;
-    uint32_t irom_load_addr = 0;
-    uint32_t irom_size = 0;
-
-    /* Reload the RTC memory segments whenever a non-deepsleep reset
-       is occurring */
-    bool load_rtc_memory = rtc_get_reset_reason(0) != DEEPSLEEP_RESET;
-
-    ESP_LOGD(TAG, "bin_header: %u %u %u %u %08x", image_header.magic,
-             image_header.segment_count,
-             image_header.spi_mode,
-             image_header.spi_size,
-             (unsigned)image_header.entry_addr);
-
-    /* Important: From here on this function cannot access any global data (bss/data segments),
-       as loading the app image may overwrite these.
-    */
-    for (int segment = 0; segment < image_header.segment_count; segment++) {
-        esp_image_segment_header_t segment_header;
-        uint32_t data_offs;
-        if(esp_image_load_segment_header(segment, partition->offset,
-                                         &image_header, true,
-                                         &segment_header, &data_offs) != ESP_OK) {
-            ESP_LOGE(TAG, "failed to load segment header #%d", segment);
-            return;
-        }
-
-        const uint32_t address = segment_header.load_addr;
-        bool load = true;
-        bool map = false;
-        if (address == 0x00000000) {        // padding, ignore block
-            load = false;
-        }
-        if (address == 0x00000004) {
-            load = false;                   // md5 checksum block
-            // TODO: actually check md5
-        }
-
-        if (address >= SOC_DROM_LOW && address < SOC_DROM_HIGH) {
-            ESP_LOGD(TAG, "found drom segment, map from %08x to %08x", data_offs,
-                      segment_header.load_addr);
-            drom_addr = data_offs;
-            drom_load_addr = segment_header.load_addr;
-            drom_size = segment_header.data_len + sizeof(segment_header);
-            load = false;
-            map = true;
-        }
-
-        if (address >= SOC_IROM_LOW && address < SOC_IROM_HIGH) {
-            ESP_LOGD(TAG, "found irom segment, map from %08x to %08x", data_offs,
-                      segment_header.load_addr);
-            irom_addr = data_offs;
-            irom_load_addr = segment_header.load_addr;
-            irom_size = segment_header.data_len + sizeof(segment_header);
-            load = false;
-            map = true;
-        }
-
-        if (!load_rtc_memory && address >= SOC_RTC_IRAM_LOW && address < SOC_RTC_IRAM_HIGH) {
-            ESP_LOGD(TAG, "Skipping RTC code segment at %08x\n", data_offs);
-            load = false;
-        }
-
-        if (!load_rtc_memory && address >= SOC_RTC_DATA_LOW && address < SOC_RTC_DATA_HIGH) {
-            ESP_LOGD(TAG, "Skipping RTC data segment at %08x\n", data_offs);
-            load = false;
-        }
-
-        ESP_LOGI(TAG, "segment %d: paddr=0x%08x vaddr=0x%08x size=0x%05x (%6d) %s", segment, data_offs - sizeof(esp_image_segment_header_t),
-                 segment_header.load_addr, segment_header.data_len, segment_header.data_len, (load)?"load":(map)?"map":"");
-
-        if (load) {
-            intptr_t sp, start_addr, end_addr;
-            ESP_LOGV(TAG, "bootloader_mmap data_offs=%08x data_len=%08x", data_offs, segment_header.data_len);
-
-            start_addr = segment_header.load_addr;
-            end_addr = start_addr + segment_header.data_len;
-
-            /* Before loading segment, check it doesn't clobber
-               bootloader RAM... */
-
-            if (end_addr < 0x40000000) {
-                sp = (intptr_t)get_sp();
-                if (end_addr > sp) {
-                    ESP_LOGE(TAG, "Segment %d end address %08x overlaps bootloader stack %08x - can't load",
-                         segment, end_addr, sp);
-                    return;
-                }
-                if (end_addr > sp - 256) {
-                    /* We don't know for sure this is the stack high water mark, so warn if
-                       it seems like we may overflow.
-                    */
-                    ESP_LOGW(TAG, "Segment %d end address %08x close to stack pointer %08x",
-                             segment, end_addr, sp);
-                }
-            }
-
-            const void *data = bootloader_mmap(data_offs, segment_header.data_len);
-            if(!data) {
-                ESP_LOGE(TAG, "bootloader_mmap(0x%xc, 0x%x) failed",
-                         data_offs, segment_header.data_len);
-                return;
-            }
-            memcpy((void *)segment_header.load_addr, data, segment_header.data_len);
-            bootloader_munmap(data);
-        }
-    }
-
-    set_cache_and_start_app(drom_addr,
-        drom_load_addr,
-        drom_size,
-        irom_addr,
-        irom_load_addr,
-        irom_size,
-        image_header.entry_addr);
-}
-
-static void set_cache_and_start_app(
-    uint32_t drom_addr,
-    uint32_t drom_load_addr,
-    uint32_t drom_size,
-    uint32_t irom_addr,
-    uint32_t irom_load_addr,
-    uint32_t irom_size,
-    uint32_t entry_addr)
-{
-    ESP_LOGD(TAG, "configure drom and irom and start");
-    Cache_Read_Disable( 0 );
-    Cache_Flush( 0 );
-    uint32_t drom_page_count = (drom_size + 64*1024 - 1) / (64*1024); // round up to 64k
-    ESP_LOGV(TAG, "d mmu set paddr=%08x vaddr=%08x size=%d n=%d", drom_addr & 0xffff0000, drom_load_addr & 0xffff0000, drom_size, drom_page_count );
-    int rc = cache_flash_mmu_set( 0, 0, drom_load_addr & 0xffff0000, drom_addr & 0xffff0000, 64, drom_page_count );
-    ESP_LOGV(TAG, "rc=%d", rc );
-    rc = cache_flash_mmu_set( 1, 0, drom_load_addr & 0xffff0000, drom_addr & 0xffff0000, 64, drom_page_count );
-    ESP_LOGV(TAG, "rc=%d", rc );
-    uint32_t irom_page_count = (irom_size + 64*1024 - 1) / (64*1024); // round up to 64k
-    ESP_LOGV(TAG, "i mmu set paddr=%08x vaddr=%08x size=%d n=%d", irom_addr & 0xffff0000, irom_load_addr & 0xffff0000, irom_size, irom_page_count );
-    rc = cache_flash_mmu_set( 0, 0, irom_load_addr & 0xffff0000, irom_addr & 0xffff0000, 64, irom_page_count );
-    ESP_LOGV(TAG, "rc=%d", rc );
-    rc = cache_flash_mmu_set( 1, 0, irom_load_addr & 0xffff0000, irom_addr & 0xffff0000, 64, irom_page_count );
-    ESP_LOGV(TAG, "rc=%d", rc );
-    DPORT_REG_CLR_BIT( DPORT_PRO_CACHE_CTRL1_REG, (DPORT_PRO_CACHE_MASK_IRAM0) | (DPORT_PRO_CACHE_MASK_IRAM1 & 0) | (DPORT_PRO_CACHE_MASK_IROM0 & 0) | DPORT_PRO_CACHE_MASK_DROM0 | DPORT_PRO_CACHE_MASK_DRAM1 );
-    DPORT_REG_CLR_BIT( DPORT_APP_CACHE_CTRL1_REG, (DPORT_APP_CACHE_MASK_IRAM0) | (DPORT_APP_CACHE_MASK_IRAM1 & 0) | (DPORT_APP_CACHE_MASK_IROM0 & 0) | DPORT_APP_CACHE_MASK_DROM0 | DPORT_APP_CACHE_MASK_DRAM1 );
-    Cache_Read_Enable( 0 );
-
-    // Application will need to do Cache_Flush(1) and Cache_Read_Enable(1)
-
-    ESP_LOGD(TAG, "start: 0x%08x", entry_addr);
-    typedef void (*entry_t)(void);
-    entry_t entry = ((entry_t) entry_addr);
-
-    // TODO: we have used quite a bit of stack at this point.
-    // use "movsp" instruction to reset stack back to where ROM stack starts.
-    (*entry)();
-}
-
-static void update_flash_config(const esp_image_header_t* pfhdr)
-{
-    uint32_t size;
-    switch(pfhdr->spi_size) {
-        case ESP_IMAGE_FLASH_SIZE_1MB:
-            size = 1;
-            break;
-        case ESP_IMAGE_FLASH_SIZE_2MB:
-            size = 2;
-            break;
-        case ESP_IMAGE_FLASH_SIZE_4MB:
-            size = 4;
-            break;
-        case ESP_IMAGE_FLASH_SIZE_8MB:
-            size = 8;
-            break;
-        case ESP_IMAGE_FLASH_SIZE_16MB:
-            size = 16;
-            break;
-        default:
-            size = 2;
-    }
-    Cache_Read_Disable( 0 );
-    // Set flash chip size
-    esp_rom_spiflash_config_param(g_rom_flashchip.device_id, size * 0x100000, 0x10000, 0x1000, 0x100, 0xffff);
-    // TODO: set mode
-    // TODO: set frequency
-    Cache_Flush(0);
-    Cache_Read_Enable( 0 );
-}
-
-void print_flash_info(const esp_image_header_t* phdr)
-{
-#if (BOOT_LOG_LEVEL >= BOOT_LOG_LEVEL_NOTICE)
-
-    ESP_LOGD(TAG, "magic %02x", phdr->magic );
-    ESP_LOGD(TAG, "segments %02x", phdr->segment_count );
-    ESP_LOGD(TAG, "spi_mode %02x", phdr->spi_mode );
-    ESP_LOGD(TAG, "spi_speed %02x", phdr->spi_speed );
-    ESP_LOGD(TAG, "spi_size %02x", phdr->spi_size );
-
-    const char* str;
-    switch ( phdr->spi_speed ) {
-    case ESP_IMAGE_SPI_SPEED_40M:
-        str = "40MHz";
-        break;
-    case ESP_IMAGE_SPI_SPEED_26M:
-        str = "26.7MHz";
-        break;
-    case ESP_IMAGE_SPI_SPEED_20M:
-        str = "20MHz";
-        break;
-    case ESP_IMAGE_SPI_SPEED_80M:
-        str = "80MHz";
-        break;
-    default:
-        str = "20MHz";
-        break;
-    }
-    ESP_LOGI(TAG, "SPI Speed      : %s", str );
-
-    /* SPI mode could have been set to QIO during boot already,
-       so test the SPI registers not the flash header */
-    uint32_t spi_ctrl = REG_READ(SPI_CTRL_REG(0));
-    if (spi_ctrl & SPI_FREAD_QIO) {
-        str = "QIO";
-    } else if (spi_ctrl & SPI_FREAD_QUAD) {
-        str = "QOUT";
-    } else if (spi_ctrl & SPI_FREAD_DIO) {
-        str = "DIO";
-    } else if (spi_ctrl & SPI_FREAD_DUAL) {
-        str = "DOUT";
-    } else if (spi_ctrl & SPI_FASTRD_MODE) {
-        str = "FAST READ";
-    } else {
-        str = "SLOW READ";
-    }
-    ESP_LOGI(TAG, "SPI Mode       : %s", str );
-
-    switch ( phdr->spi_size ) {
-    case ESP_IMAGE_FLASH_SIZE_1MB:
-        str = "1MB";
-        break;
-    case ESP_IMAGE_FLASH_SIZE_2MB:
-        str = "2MB";
-        break;
-    case ESP_IMAGE_FLASH_SIZE_4MB:
-        str = "4MB";
-        break;
-    case ESP_IMAGE_FLASH_SIZE_8MB:
-        str = "8MB";
-        break;
-    case ESP_IMAGE_FLASH_SIZE_16MB:
-        str = "16MB";
-        break;
-    default:
-        str = "2MB";
-        break;
-    }
-    ESP_LOGI(TAG, "SPI Flash Size : %s", str );
-#endif
-}
-
-
-static void clock_configure(void)
-{
-    /* Set CPU to 80MHz. Keep other clocks unmodified. */
-    rtc_cpu_freq_t cpu_freq = RTC_CPU_FREQ_80M;
-
-    /* On ESP32 rev 0, switching to 80MHz if clock was previously set to
-     * 240 MHz may cause the chip to lock up (see section 3.5 of the errata
-     * document). For rev. 0, switch to 240 instead if it was chosen in
-     * menuconfig.
-     */
-    uint32_t chip_ver_reg = REG_READ(EFUSE_BLK0_RDATA3_REG);
-    if ((chip_ver_reg & EFUSE_RD_CHIP_VER_REV1_M) == 0 &&
-            CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ == 240) {
-        cpu_freq = RTC_CPU_FREQ_240M;
-    }
-
-    uart_tx_wait_idle(0);
-    rtc_clk_config_t clk_cfg = RTC_CLK_CONFIG_DEFAULT();
-    clk_cfg.xtal_freq = CONFIG_ESP32_XTAL_FREQ;
-    clk_cfg.cpu_freq = cpu_freq;
-    clk_cfg.slow_freq = rtc_clk_slow_freq_get();
-    clk_cfg.fast_freq = rtc_clk_fast_freq_get();
-    rtc_clk_init(clk_cfg);
-    /* As a slight optimization, if 32k XTAL was enabled in sdkconfig, we enable
-     * it here. Usually it needs some time to start up, so we amortize at least
-     * part of the start up time by enabling 32k XTAL early.
-     * App startup code will wait until the oscillator has started up.
-     */
-#ifdef CONFIG_ESP32_RTC_CLOCK_SOURCE_EXTERNAL_CRYSTAL
-    if (!rtc_clk_32k_enabled()) {
-        rtc_clk_32k_bootstrap();
-    }
-#endif
-}
-
-static void uart_console_configure(void)
-{
-#if CONFIG_CONSOLE_UART_NONE
-    ets_install_putc1(NULL);
-    ets_install_putc2(NULL);
-#else // CONFIG_CONSOLE_UART_NONE
-    const int uart_num = CONFIG_CONSOLE_UART_NUM;
-
-    uartAttach();
-    ets_install_uart_printf();
-
-    // ROM bootloader may have put a lot of text into UART0 FIFO.
-    // Wait for it to be printed.
-    uart_tx_wait_idle(0);
-
-#if CONFIG_CONSOLE_UART_CUSTOM
-    // Some constants to make the following code less upper-case
-    const int uart_tx_gpio = CONFIG_CONSOLE_UART_TX_GPIO;
-    const int uart_rx_gpio = CONFIG_CONSOLE_UART_RX_GPIO;
-    // Switch to the new UART (this just changes UART number used for
-    // ets_printf in ROM code).
-    uart_tx_switch(uart_num);
-    // If console is attached to UART1 or if non-default pins are used,
-    // need to reconfigure pins using GPIO matrix
-    if (uart_num != 0 || uart_tx_gpio != 1 || uart_rx_gpio != 3) {
-        // Change pin mode for GPIO1/3 from UART to GPIO
-        PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0RXD_U, FUNC_U0RXD_GPIO3);
-        PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0TXD_U, FUNC_U0TXD_GPIO1);
-        // Route GPIO signals to/from pins
-        // (arrays should be optimized away by the compiler)
-        const uint32_t tx_idx_list[3] = { U0TXD_OUT_IDX, U1TXD_OUT_IDX, U2TXD_OUT_IDX };
-        const uint32_t rx_idx_list[3] = { U0RXD_IN_IDX, U1RXD_IN_IDX, U2RXD_IN_IDX };
-        const uint32_t tx_idx = tx_idx_list[uart_num];
-        const uint32_t rx_idx = rx_idx_list[uart_num];
-        gpio_matrix_out(uart_tx_gpio, tx_idx, 0, 0);
-        gpio_matrix_in(uart_rx_gpio, rx_idx, 0);
-    }
-#endif // CONFIG_CONSOLE_UART_CUSTOM
-
-    // Set configured UART console baud rate
-    const int uart_baud = CONFIG_CONSOLE_UART_BAUDRATE;
-    uart_div_modify(uart_num, (rtc_clk_apb_freq_get() << 4) / uart_baud);
-
-#endif // CONFIG_CONSOLE_UART_NONE
-}
-
-static void wdt_reset_cpu0_info_enable(void)
-{
-    //We do not reset core1 info here because it didn't work before cpu1 was up. So we put it into call_start_cpu1.
-    DPORT_REG_SET_BIT(DPORT_PRO_CPU_RECORD_CTRL_REG, DPORT_PRO_CPU_PDEBUG_ENABLE | DPORT_PRO_CPU_RECORD_ENABLE);
-    DPORT_REG_CLR_BIT(DPORT_PRO_CPU_RECORD_CTRL_REG, DPORT_PRO_CPU_RECORD_ENABLE);
-}
-
-static void wdt_reset_info_dump(int cpu)
-{
-    uint32_t inst = 0, pid = 0, stat = 0, data = 0, pc = 0,
-             lsstat = 0, lsaddr = 0, lsdata = 0, dstat = 0;
-    char *cpu_name = cpu ? "APP" : "PRO";
-
-    if (cpu == 0) {
-        stat    = DPORT_REG_READ(DPORT_PRO_CPU_RECORD_STATUS_REG);
-        pid     = DPORT_REG_READ(DPORT_PRO_CPU_RECORD_PID_REG);
-        inst    = DPORT_REG_READ(DPORT_PRO_CPU_RECORD_PDEBUGINST_REG);
-        dstat   = DPORT_REG_READ(DPORT_PRO_CPU_RECORD_PDEBUGSTATUS_REG);
-        data    = DPORT_REG_READ(DPORT_PRO_CPU_RECORD_PDEBUGDATA_REG);
-        pc      = DPORT_REG_READ(DPORT_PRO_CPU_RECORD_PDEBUGPC_REG);
-        lsstat  = DPORT_REG_READ(DPORT_PRO_CPU_RECORD_PDEBUGLS0STAT_REG);
-        lsaddr  = DPORT_REG_READ(DPORT_PRO_CPU_RECORD_PDEBUGLS0ADDR_REG);
-        lsdata  = DPORT_REG_READ(DPORT_PRO_CPU_RECORD_PDEBUGLS0DATA_REG);
-
-    } else {
-        stat    = DPORT_REG_READ(DPORT_APP_CPU_RECORD_STATUS_REG);
-        pid     = DPORT_REG_READ(DPORT_APP_CPU_RECORD_PID_REG);
-        inst    = DPORT_REG_READ(DPORT_APP_CPU_RECORD_PDEBUGINST_REG);
-        dstat   = DPORT_REG_READ(DPORT_APP_CPU_RECORD_PDEBUGSTATUS_REG);
-        data    = DPORT_REG_READ(DPORT_APP_CPU_RECORD_PDEBUGDATA_REG);
-        pc      = DPORT_REG_READ(DPORT_APP_CPU_RECORD_PDEBUGPC_REG);
-        lsstat  = DPORT_REG_READ(DPORT_APP_CPU_RECORD_PDEBUGLS0STAT_REG);
-        lsaddr  = DPORT_REG_READ(DPORT_APP_CPU_RECORD_PDEBUGLS0ADDR_REG);
-        lsdata  = DPORT_REG_READ(DPORT_APP_CPU_RECORD_PDEBUGLS0DATA_REG);
-    }
-    if (DPORT_RECORD_PDEBUGINST_SZ(inst) == 0 &&
-        DPORT_RECORD_PDEBUGSTATUS_BBCAUSE(dstat) == DPORT_RECORD_PDEBUGSTATUS_BBCAUSE_WAITI) {
-        ESP_LOGW(TAG, "WDT reset info: %s CPU PC=0x%x (waiti mode)", cpu_name, pc);
-    } else {
-        ESP_LOGW(TAG, "WDT reset info: %s CPU PC=0x%x", cpu_name, pc);
-    }
-    ESP_LOGD(TAG, "WDT reset info: %s CPU STATUS        0x%08x", cpu_name, stat);
-    ESP_LOGD(TAG, "WDT reset info: %s CPU PID           0x%08x", cpu_name, pid);
-    ESP_LOGD(TAG, "WDT reset info: %s CPU PDEBUGINST    0x%08x", cpu_name, inst);
-    ESP_LOGD(TAG, "WDT reset info: %s CPU PDEBUGSTATUS  0x%08x", cpu_name, dstat);
-    ESP_LOGD(TAG, "WDT reset info: %s CPU PDEBUGDATA    0x%08x", cpu_name, data);
-    ESP_LOGD(TAG, "WDT reset info: %s CPU PDEBUGPC      0x%08x", cpu_name, pc);
-    ESP_LOGD(TAG, "WDT reset info: %s CPU PDEBUGLS0STAT 0x%08x", cpu_name, lsstat);
-    ESP_LOGD(TAG, "WDT reset info: %s CPU PDEBUGLS0ADDR 0x%08x", cpu_name, lsaddr);
-    ESP_LOGD(TAG, "WDT reset info: %s CPU PDEBUGLS0DATA 0x%08x", cpu_name, lsdata);
-}
-
-static void wdt_reset_check(void)
-{
-    int wdt_rst = 0;
-    RESET_REASON rst_reas[2];
-
-    rst_reas[0] = rtc_get_reset_reason(0);
-    rst_reas[1] = rtc_get_reset_reason(1);
-    if (rst_reas[0] == RTCWDT_SYS_RESET || rst_reas[0] == TG0WDT_SYS_RESET || rst_reas[0] == TG1WDT_SYS_RESET ||
-        rst_reas[0] == TGWDT_CPU_RESET  || rst_reas[0] == RTCWDT_CPU_RESET) {
-        ESP_LOGW(TAG, "PRO CPU has been reset by WDT.");
-        wdt_rst = 1;
-    }
-    if (rst_reas[1] == RTCWDT_SYS_RESET || rst_reas[1] == TG0WDT_SYS_RESET || rst_reas[1] == TG1WDT_SYS_RESET ||
-        rst_reas[1] == TGWDT_CPU_RESET  || rst_reas[1] == RTCWDT_CPU_RESET) {
-        ESP_LOGW(TAG, "APP CPU has been reset by WDT.");
-        wdt_rst = 1;
-    }
-    if (wdt_rst) {
-        // if reset by WDT dump info from trace port
-        wdt_reset_info_dump(0);
-        wdt_reset_info_dump(1);
-    }
-    wdt_reset_cpu0_info_enable();
-}

components/bootloader/src/main/esp32.bootloader.ld

@@ -1,148 +0,0 @@
-/*
-Linker file used to link the bootloader.
-
-*WARNING* For now this linker dumps everything into IRAM/DRAM. ToDo: move
-some/most stuff to DROM/IROM.
-
-*/
-
-
-/* THESE ARE THE VIRTUAL RUNTIME ADDRESSES  */
-/* The load addresses are defined later using the AT statements. */
-MEMORY
-{
-  /* All these values assume the flash cache is on, and have the blocks this uses subtracted from the length
-  of the various regions. The 'data access port' dram/drom regions map to the same iram/irom regions but
-  are connected to the data port of the CPU and eg allow bytewise access. */
-  dport0_seg (RW) :                 	org = 0x3FF00000, len = 0x10		/* IO */
-  iram_seg (RWX) :                 	org = 0x40080000, len = 0x400		/* 1k of IRAM used by bootloader functions which need to flush/enable APP CPU cache */ 
-  iram_pool_1_seg (RWX) :           org = 0x40078000, len = 0x8000    /* IRAM POOL1, used for APP CPU cache. We can abuse it in bootloader because APP CPU is still held in reset, until we enable APP CPU cache */
-  dram_seg (RW) :                  	org = 0x3FFF0000, len = 0x10000		/* 64k at the end of DRAM, after ROM bootloader stack */
-}
-
-/*  Default entry point:  */
-ENTRY(call_start_cpu0);
-
-
-SECTIONS
-{
-  .iram1.text :
-  {
-    _init_start = ABSOLUTE(.);
-    *(.UserEnter.literal);
-    *(.UserEnter.text);
-    . = ALIGN (16);
-    *(.entry.text)
-    *(.init.literal)
-    *(.init)
-    _init_end = ABSOLUTE(.);
-
-	  /* Code marked as runnning out of IRAM */
-	  _iram_text_start = ABSOLUTE(.);
-    *(.iram1 .iram1.*)
-	  _iram_text_end = ABSOLUTE(.);
-  } > iram_seg
-
-
-  /* Shared RAM */
-  .dram0.bss (NOLOAD) :
-  {
-    . = ALIGN (8);
-    _bss_start = ABSOLUTE(.);
-    *(.dynsbss)
-    *(.sbss)
-    *(.sbss.*)
-    *(.gnu.linkonce.sb.*)
-    *(.scommon)
-    *(.sbss2)
-    *(.sbss2.*)
-    *(.gnu.linkonce.sb2.*)
-    *(.dynbss)
-    KEEP(*(.bss))
-    *(.bss.*)
-    *(.gnu.linkonce.b.*)
-    *(COMMON)
-    . = ALIGN (8);
-    _bss_end = ABSOLUTE(.);
-  } >dram_seg
-
-
-  .dram0.data :
-  {
-    _data_start = ABSOLUTE(.);
-    KEEP(*(.data))
-    KEEP(*(.data.*))
-    KEEP(*(.gnu.linkonce.d.*))
-    KEEP(*(.data1))
-    KEEP(*(.sdata))
-    KEEP(*(.sdata.*))
-    KEEP(*(.gnu.linkonce.s.*))
-    KEEP(*(.sdata2))
-    KEEP(*(.sdata2.*))
-    KEEP(*(.gnu.linkonce.s2.*))
-    KEEP(*(.jcr))
-    _data_end = ABSOLUTE(.);
-  } >dram_seg
-
-
-
-
-  .dram0.rodata :
-  {
-    _rodata_start = ABSOLUTE(.);
-    *(.rodata)
-    *(.rodata.*)
-	*(.irom1.text) /* catch stray ICACHE_RODATA_ATTR */
-    *(.gnu.linkonce.r.*)
-    *(.rodata1)
-    __XT_EXCEPTION_TABLE_ = ABSOLUTE(.);
-    *(.xt_except_table)
-    *(.gcc_except_table)
-    *(.gnu.linkonce.e.*)
-    *(.gnu.version_r)
-    *(.eh_frame)
-    . = (. + 3) & ~ 3;
-    /*  C++ constructor and destructor tables, properly ordered:  */
-    __init_array_start = ABSOLUTE(.);
-    KEEP (*crtbegin.o(.ctors))
-    KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
-    KEEP (*(SORT(.ctors.*)))
-    KEEP (*(.ctors))
-    __init_array_end = ABSOLUTE(.);
-    KEEP (*crtbegin.o(.dtors))
-    KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
-    KEEP (*(SORT(.dtors.*)))
-    KEEP (*(.dtors))
-    /*  C++ exception handlers table:  */
-    __XT_EXCEPTION_DESCS_ = ABSOLUTE(.);
-    *(.xt_except_desc)
-    *(.gnu.linkonce.h.*)
-    __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
-    *(.xt_except_desc_end)
-    *(.dynamic)
-    *(.gnu.version_d)
-    _rodata_end = ABSOLUTE(.);
-	/* Literals are also RO data. */
-    _lit4_start = ABSOLUTE(.);
-    *(*.lit4)
-    *(.lit4.*)
-    *(.gnu.linkonce.lit4.*)
-    _lit4_end = ABSOLUTE(.);
-    . = ALIGN(4);
-    _heap_start = ABSOLUTE(.);
-  } >dram_seg
-
-  .iram_pool_1.text :
-  {
-    _stext = .;
-    _text_start = ABSOLUTE(.);
-    *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
-	*(.irom0.text) /* catch stray ICACHE_RODATA_ATTR */
-    *(.fini.literal)
-    *(.fini)
-    *(.gnu.version)
-    _text_end = ABSOLUTE(.);
-    _etext = .;
-  } >iram_pool_1_seg
-
-}

components/bootloader/subproject/CMakeLists.txt

@@ -0,0 +1,28 @@
+cmake_minimum_required(VERSION 3.5)
+
+if(NOT SDKCONFIG)
+    message(FATAL_ERROR "Bootloader subproject expects the SDKCONFIG variable to be passed "
+        "in by the parent build process.")
+endif()
+
+if(NOT IDF_PATH)
+    message(FATAL_ERROR "Bootloader subproject expects the IDF_PATH variable to be passed "
+        "in by the parent build process.")
+endif()
+
+set(COMPONENTS bootloader esptool_py esp32 partition_table soc bootloader_support log spi_flash micro-ecc soc main)
+set(BOOTLOADER_BUILD 1)
+add_definitions(-DBOOTLOADER_BUILD=1)
+
+set(COMPONENT_REQUIRES_COMMON log esp32 soc)
+
+include("${IDF_PATH}/tools/cmake/project.cmake")
+project(bootloader)
+
+target_linker_script(bootloader.elf
+    "main/esp32.bootloader.ld"
+    "main/esp32.bootloader.rom.ld")
+# Imported from esp32 component
+target_linker_script(bootloader.elf ${ESP32_BOOTLOADER_LINKER_SCRIPTS})
+
+target_link_libraries(bootloader.elf gcc)

components/bootloader/subproject/Makefile

@@ -2,12 +2,20 @@
 # This is a project Makefile. It is assumed the directory this Makefile resides in is a
 # project subdirectory.
 #
+ifeq ("$(MAKELEVEL)","0")
+$(error Bootloader makefile expects to be run as part of 'make bootloader' from a top-level project.)
+endif
 
 PROJECT_NAME := bootloader
 
+COMPONENTS := esptool_py bootloader_support log spi_flash micro-ecc soc main
+
+# Clear C and CXX from top level project
+CFLAGS =
+CXXFLAGS =
+
 #We cannot include the esp32 component directly but we need its includes.
-#This is fixed by adding CFLAGS from Makefile.projbuild
-COMPONENTS := esptool_py bootloader bootloader_support log spi_flash micro-ecc soc
+CFLAGS += -I $(IDF_PATH)/components/esp32/include
 
 # The bootloader pseudo-component is also included in this build, for its Kconfig.projbuild to be included.
 #
@@ -15,6 +23,9 @@ COMPONENTS := esptool_py bootloader bootloader_support log spi_flash micro-ecc s
 IS_BOOTLOADER_BUILD := 1
 export IS_BOOTLOADER_BUILD
 
+# BOOTLOADER_BUILD macro is the same, for source file changes
+CFLAGS += -D BOOTLOADER_BUILD=1
+
 # include the top-level "project" include directory, for sdkconfig.h
 CFLAGS += -I$(BUILD_DIR_BASE)/../include
 

components/bootloader/subproject/main/CMakeLists.txt

@@ -0,0 +1,4 @@
+set(COMPONENT_SRCS "bootloader_start.c")
+set(COMPONENT_ADD_INCLUDEDIRS "")
+set(COMPONENT_REQUIRES "bootloader bootloader_support")
+register_component()

components/bootloader/subproject/main/bootloader_start.c

@@ -0,0 +1,113 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#include <string.h>
+#include <stdint.h>
+#include <stdbool.h>
+
+#include "esp_log.h"
+#include "rom/gpio.h"
+#include "rom/spi_flash.h"
+#include "bootloader_config.h"
+#include "bootloader_init.h"
+#include "bootloader_utility.h"
+#include "bootloader_common.h"
+#include "sdkconfig.h"
+#include "esp_image_format.h"
+
+static const char* TAG = "boot";
+
+static int select_partition_number (bootloader_state_t *bs);
+static int selected_boot_partition(const bootloader_state_t *bs);
+/*
+ * We arrive here after the ROM bootloader finished loading this second stage bootloader from flash.
+ * The hardware is mostly uninitialized, flash cache is down and the app CPU is in reset.
+ * We do have a stack, so we can do the initialization in C.
+ */
+void call_start_cpu0()
+{
+    // 1. Hardware initialization
+    if (bootloader_init() != ESP_OK) {
+        return;
+    }
+
+    // 2. Select the number of boot partition
+    bootloader_state_t bs = { 0 };
+    int boot_index = select_partition_number(&bs);
+    if (boot_index == INVALID_INDEX) {
+        return;
+    }
+
+    // 3. Load the app image for booting
+    bootloader_utility_load_boot_image(&bs, boot_index);
+}
+
+// Select the number of boot partition
+static int select_partition_number (bootloader_state_t *bs)
+{
+    // 1. Load partition table
+    if (!bootloader_utility_load_partition_table(bs)) {
+        ESP_LOGE(TAG, "load partition table error!");
+        return INVALID_INDEX;
+    }
+
+    // 2. Select the number of boot partition
+    return selected_boot_partition(bs);
+}
+
+/*
+ * Selects a boot partition.
+ * The conditions for switching to another firmware are checked.
+ */
+static int selected_boot_partition(const bootloader_state_t *bs)
+{
+    int boot_index = bootloader_utility_get_selected_boot_partition(bs);
+    if (boot_index == INVALID_INDEX) {
+        return boot_index; // Unrecoverable failure (not due to corrupt ota data or bad partition contents)
+    } else {
+        // Factory firmware.
+#ifdef CONFIG_BOOTLOADER_FACTORY_RESET
+        if (bootloader_common_check_long_hold_gpio(CONFIG_BOOTLOADER_NUM_PIN_FACTORY_RESET, CONFIG_BOOTLOADER_HOLD_TIME_GPIO) == 1) {
+            ESP_LOGI(TAG, "Detect a condition of the factory reset");
+            bool ota_data_erase = false;
+#ifdef CONFIG_BOOTLOADER_OTA_DATA_ERASE
+            ota_data_erase = true;
+#endif
+            const char *list_erase = CONFIG_BOOTLOADER_DATA_FACTORY_RESET;
+            ESP_LOGI(TAG, "Data partitions to erase: %s", list_erase);
+            if (bootloader_common_erase_part_type_data(list_erase, ota_data_erase) == false) {
+                ESP_LOGE(TAG, "Not all partitions were erased");
+            }
+            return bootloader_utility_get_selected_boot_partition(bs);
+        }
+#endif
+       // TEST firmware.
+#ifdef CONFIG_BOOTLOADER_APP_TEST
+        if (bootloader_common_check_long_hold_gpio(CONFIG_BOOTLOADER_NUM_PIN_APP_TEST, CONFIG_BOOTLOADER_HOLD_TIME_GPIO) == 1) {
+            ESP_LOGI(TAG, "Detect a boot condition of the test firmware");
+            if (bs->test.offset != 0) {
+                boot_index = TEST_APP_INDEX;
+                return boot_index;
+            } else {
+                ESP_LOGE(TAG, "Test firmware is not found in partition table");
+                return INVALID_INDEX;
+            }
+        }
+#endif
+        // Customer implementation.
+        // if (gpio_pin_1 == true && ...){
+        //     boot_index = required_boot_partition;
+        // } ...
+    }
+    return boot_index;
+}

components/bootloader/subproject/main/component.mk

@@ -8,6 +8,7 @@
 LINKER_SCRIPTS := \
 	esp32.bootloader.ld \
 	$(IDF_PATH)/components/esp32/ld/esp32.rom.ld \
+	$(IDF_PATH)/components/esp32/ld/esp32.rom.spiram_incompatible_fns.ld \
 	$(IDF_PATH)/components/esp32/ld/esp32.peripherals.ld \
 	esp32.bootloader.rom.ld
 
@@ -15,6 +16,6 @@ ifndef CONFIG_SPI_FLASH_ROM_DRIVER_PATCH
 LINKER_SCRIPTS += $(IDF_PATH)/components/esp32/ld/esp32.rom.spiflash.ld
 endif
 
-COMPONENT_ADD_LDFLAGS := -L $(COMPONENT_PATH) -lmain $(addprefix -T ,$(LINKER_SCRIPTS))
+COMPONENT_ADD_LDFLAGS += -L $(COMPONENT_PATH) $(addprefix -T ,$(LINKER_SCRIPTS))
 
 COMPONENT_ADD_LINKER_DEPS := $(LINKER_SCRIPTS)

components/bootloader/subproject/main/esp32.bootloader.ld

@@ -0,0 +1,163 @@
+/*
+Linker file used to link the bootloader.
+*/
+
+
+/* Simplified memory map for the bootloader
+
+   The main purpose is to make sure the bootloader can load into main memory
+   without overwriting itself.
+*/
+
+MEMORY
+{
+  /* I/O */
+  dport0_seg (RW) :                 	org = 0x3FF00000, len = 0x10
+  /* IRAM POOL1, used for APP CPU cache. Bootloader runs from here during the final stage of loading the app because APP CPU is still held in reset, the main app enables APP CPU cache */
+  iram_loader_seg (RWX) :           org = 0x40078000, len = 0x8000  /* 32KB, APP CPU cache */
+  iram_seg (RWX) :                  org = 0x40080000, len = 0x10000 /* 64KB, IRAM */
+  /* 64k at the end of DRAM, after ROM bootloader stack */
+  dram_seg (RW) :                  	org = 0x3FFF0000, len = 0x10000
+}
+
+/*  Default entry point:  */
+ENTRY(call_start_cpu0);
+
+
+SECTIONS
+{
+
+  .iram_loader.text :
+  {
+    . = ALIGN (16);
+    _loader_text_start = ABSOLUTE(.);
+    *(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
+     *(.iram1 .iram1.*) /* catch stray IRAM_ATTR */
+    *liblog.a:(.literal .text .literal.* .text.*)
+    *libgcc.a:(.literal .text .literal.* .text.*)
+    *libbootloader_support.a:bootloader_common.o(.literal .text .literal.* .text.*)
+    *libbootloader_support.a:bootloader_flash.*(.literal .text .literal.* .text.*)
+    *libbootloader_support.a:bootloader_random.*(.literal .text .literal.* .text.*)
+    *libbootloader_support.a:bootloader_utility.*(.literal .text .literal.* .text.*)
+    *libbootloader_support.a:bootloader_sha.*(.literal .text .literal.* .text.*)
+    *libbootloader_support.a:efuse.*(.literal .text .literal.* .text.*)
+    *libbootloader_support.a:esp_image_format.*(.literal .text .literal.* .text.*)
+    *libbootloader_support.a:flash_encrypt.*(.literal .text .literal.* .text.*)
+    *libbootloader_support.a:flash_partitions.*(.literal .text .literal.* .text.*)
+    *libbootloader_support.a:secure_boot.*(.literal .text .literal.* .text.*)
+    *libbootloader_support.a:secure_boot_signatures.*(.literal .text .literal.* .text.*)
+    *libmicro-ecc.a:*.*(.literal .text .literal.* .text.*)
+    *libspi_flash.a:*.*(.literal .text .literal.* .text.*)
+    *libsoc.a:rtc_wdt.*(.literal .text .literal.* .text.*)
+    *(.fini.literal)
+    *(.fini)
+    *(.gnu.version)
+    _loader_text_end = ABSOLUTE(.);
+  } > iram_loader_seg
+
+  .iram.text :
+  {
+    . = ALIGN (16);
+    *(.entry.text)
+    *(.init.literal)
+    *(.init)
+  } > iram_seg
+
+
+  /* Shared RAM */
+  .dram0.bss (NOLOAD) :
+  {
+    . = ALIGN (8);
+    _bss_start = ABSOLUTE(.);
+    *(.dynsbss)
+    *(.sbss)
+    *(.sbss.*)
+    *(.gnu.linkonce.sb.*)
+    *(.scommon)
+    *(.sbss2)
+    *(.sbss2.*)
+    *(.gnu.linkonce.sb2.*)
+    *(.dynbss)
+    *(.bss)
+    *(.bss.*)
+    *(.gnu.linkonce.b.*)
+    *(COMMON)
+    . = ALIGN (8);
+    _bss_end = ABSOLUTE(.);
+  } >dram_seg
+
+  .dram0.data :
+  {
+    _data_start = ABSOLUTE(.);
+    *(.data)
+    *(.data.*)
+    *(.gnu.linkonce.d.*)
+    *(.data1)
+    *(.sdata)
+    *(.sdata.*)
+    *(.gnu.linkonce.s.*)
+    *(.sdata2)
+    *(.sdata2.*)
+    *(.gnu.linkonce.s2.*)
+    *(.jcr)
+    _data_end = ABSOLUTE(.);
+  } >dram_seg
+
+  .dram0.rodata :
+  {
+    _rodata_start = ABSOLUTE(.);
+    *(.rodata)
+    *(.rodata.*)
+    *(.gnu.linkonce.r.*)
+    *(.rodata1)
+    __XT_EXCEPTION_TABLE_ = ABSOLUTE(.);
+    *(.xt_except_table)
+    *(.gcc_except_table)
+    *(.gnu.linkonce.e.*)
+    *(.gnu.version_r)
+    *(.eh_frame)
+    . = (. + 3) & ~ 3;
+    /*  C++ constructor and destructor tables, properly ordered:  */
+    __init_array_start = ABSOLUTE(.);
+    KEEP (*crtbegin.*(.ctors))
+    KEEP (*(EXCLUDE_FILE (*crtend.*) .ctors))
+    KEEP (*(SORT(.ctors.*)))
+    KEEP (*(.ctors))
+    __init_array_end = ABSOLUTE(.);
+    KEEP (*crtbegin.*(.dtors))
+    KEEP (*(EXCLUDE_FILE (*crtend.*) .dtors))
+    KEEP (*(SORT(.dtors.*)))
+    KEEP (*(.dtors))
+    /*  C++ exception handlers table:  */
+    __XT_EXCEPTION_DESCS_ = ABSOLUTE(.);
+    *(.xt_except_desc)
+    *(.gnu.linkonce.h.*)
+    __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
+    *(.xt_except_desc_end)
+    *(.dynamic)
+    *(.gnu.version_d)
+    _rodata_end = ABSOLUTE(.);
+	/* Literals are also RO data. */
+    _lit4_start = ABSOLUTE(.);
+    *(*.lit4)
+    *(.lit4.*)
+    *(.gnu.linkonce.lit4.*)
+    _lit4_end = ABSOLUTE(.);
+    . = ALIGN(4);
+    _heap_start = ABSOLUTE(.);
+  } >dram_seg
+
+  .iram.text :
+  {
+    _stext = .;
+    _text_start = ABSOLUTE(.);
+    *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
+    *(.iram .iram.*) /* catch stray IRAM_ATTR */
+    *(.fini.literal)
+    *(.fini)
+    *(.gnu.version)
+    _text_end = ABSOLUTE(.);
+    _etext = .;
+  } > iram_seg
+
+}

components/bootloader/subproject/main/esp32.bootloader.rom.ld

@@ -1 +1,4 @@
 PROVIDE ( ets_update_cpu_frequency = 0x40008550 ); /* Updates g_ticks_per_us on the current CPU only; not on the other core */
+PROVIDE ( MD5Final = 0x4005db1c );
+PROVIDE ( MD5Init = 0x4005da7c );
+PROVIDE ( MD5Update = 0x4005da9c );

components/bootloader_support/CMakeLists.txt

@@ -0,0 +1,27 @@
+set(COMPONENT_SRCS "src/bootloader_clock.c"
+                   "src/bootloader_common.c"
+                   "src/bootloader_flash.c"
+                   "src/bootloader_random.c"
+                   "src/bootloader_sha.c"
+                   "src/bootloader_utility.c"
+                   "src/efuse.c"
+                   "src/esp_image_format.c"
+                   "src/flash_encrypt.c"
+                   "src/flash_partitions.c"
+                   "src/flash_qio_mode.c"
+                   "src/secure_boot.c"
+                   "src/secure_boot_signatures.c")
+
+if(${BOOTLOADER_BUILD})
+    set(COMPONENT_ADD_INCLUDEDIRS "include include_priv")
+    set(COMPONENT_REQUIRES)
+    set(COMPONENT_PRIV_REQUIRES spi_flash micro-ecc)
+    list(APPEND COMPONENT_SRCS "src/bootloader_init.c")
+else()
+    set(COMPONENT_ADD_INCLUDEDIRS "include")
+    set(COMPONENT_PRIV_INCLUDEDIRS "include_priv")
+    set(COMPONENT_REQUIRES)
+    set(COMPONENT_PRIV_REQUIRES spi_flash mbedtls micro-ecc)
+endif()
+
+register_component()

components/bootloader_support/component.mk

@@ -9,10 +9,14 @@ endif
 
 COMPONENT_SRCDIRS := src
 
+ifndef IS_BOOTLOADER_BUILD
+COMPONENT_OBJEXCLUDE := src/bootloader_init.o
+endif
+
 #
 # Secure boot signing key support
 #
-ifdef CONFIG_SECURE_BOOT_ENABLED
+ifdef CONFIG_SECURE_SIGNED_APPS
 
 # this path is created relative to the component build directory
 SECURE_BOOT_VERIFICATION_KEY := $(abspath signature_verification_key.bin)

components/bootloader_support/include/bootloader_clock.h

@@ -0,0 +1,21 @@
+// Copyright 2017 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+/** @brief Configure clocks for early boot
+ *
+ * Called by bootloader, or by the app if the bootloader version is old (pre v2.1).
+ */
+void bootloader_clock_configure(void);

components/bootloader_support/include/bootloader_common.h

@@ -0,0 +1,70 @@
+// Copyright 2018 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+#include "esp_flash_data_types.h"
+
+/// Type of hold a GPIO in low state
+typedef enum {
+    GPIO_LONG_HOLD  = 1,    /*!< The long hold GPIO */
+    GPIO_SHORT_HOLD = -1,   /*!< The short hold GPIO */
+    GPIO_NOT_HOLD   = 0     /*!< If the GPIO input is not low */
+} esp_comm_gpio_hold_t;
+
+/**
+ * @brief Calculate crc for the OTA data partition.
+ *
+ * @param[in] ota_data The OTA data partition.
+ * @return    Returns crc value.
+ */
+uint32_t bootloader_common_ota_select_crc(const esp_ota_select_entry_t *s);
+
+/**
+ * @brief Verifies the validity of the OTA data partition
+ *
+ * @param[in] ota_data The OTA data partition.
+ * @return    Returns true on valid, false otherwise.
+ */
+bool bootloader_common_ota_select_valid(const esp_ota_select_entry_t *s);
+
+/**
+ * @brief Check if the GPIO input is a long hold or a short hold.
+ *
+ * Number of the GPIO input will be configured as an input with internal pull-up enabled.
+ * If the GPIO input is held low continuously for delay_sec period then it is a long hold.
+ * If the GPIO input is held low for less period then it is a short hold.
+ *
+ * @param[in] num_pin Number of the GPIO input.
+ * @param[in] delay_sec Input must be driven low for at least this long, continuously.
+ * @return esp_comm_gpio_hold_t Defines type of hold a GPIO in low state.
+ */
+esp_comm_gpio_hold_t bootloader_common_check_long_hold_gpio(uint32_t num_pin, uint32_t delay_sec);
+
+/**
+ * @brief Erase the partition data that is specified in the transferred list.
+ *
+ * @param[in] list_erase String containing a list of cleared partitions. Like this "nvs, phy". The string must be null-terminal.
+ * @param[in] ota_data_erase If true then the OTA data partition will be cleared (if there is it in partition table).
+ * @return    Returns true on success, false otherwise.
+ */
+bool bootloader_common_erase_part_type_data(const char *list_erase, bool ota_data_erase);
+
+/**
+ * @brief Determines if the list contains the label
+ *
+ * @param[in] list  A string of names delimited by commas or spaces. Like this "nvs, phy, data". The string must be null-terminated.
+ * @param[in] label The substring that will be searched in the list.
+ * @return    Returns true if the list contains the label, false otherwise.
+ */
+bool bootloader_common_label_search(const char *list, char *label);

components/bootloader_support/include/bootloader_util.h

@@ -0,0 +1,34 @@
+// Copyright 2018 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include <stddef.h>
+
+/**
+ * @brief Check if half-open intervals overlap
+ *
+ * @param start1  interval 1 start
+ * @param end1    interval 1 end
+ * @param start2  interval 2 start
+ * @param end2    interval 2 end
+ * @return true iff [start1; end1) overlaps [start2; end2)
+ */
+static inline bool bootloader_util_regions_overlap(
+        const intptr_t start1, const intptr_t end1,
+        const intptr_t start2, const intptr_t end2)
+{
+    return (end1 > start2 && end2 > start1) ||
+           !(end1 <= start2 || end2 <= start1);
+}

components/bootloader_support/include/esp_efuse.h

@@ -15,6 +15,7 @@
 #define _ESP_EFUSE_H
 
 #include "soc/efuse_reg.h"
+#include "esp_err.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -48,6 +49,48 @@ void esp_efuse_burn_new_values(void);
  */
 void esp_efuse_reset(void);
 
+/* @brief Disable BASIC ROM Console via efuse
+ *
+ * By default, if booting from flash fails the ESP32 will boot a
+ * BASIC console in ROM.
+ *
+ * Call this function (from bootloader or app) to permanently
+ * disable the console on this chip.
+ */
+void esp_efuse_disable_basic_rom_console(void);
+
+/* @brief Encode one or more sets of 6 byte sequences into
+ * 8 bytes suitable for 3/4 Coding Scheme.
+ *
+ * This function is only useful if the CODING_SCHEME efuse
+ * is set to value 1 for 3/4 Coding Scheme.
+ *
+ * @param[in] in_bytes Pointer to a sequence of bytes to encode for 3/4 Coding Scheme. Must have length in_bytes_len. After being written to hardware, these bytes will read back as little-endian words.
+ * @param[out] out_words Pointer to array of words suitable for writing to efuse write registers. Array must contain 2 words (8 bytes) for every 6 bytes in in_bytes_len. Can be a pointer to efuse write registers.
+ * @param in_bytes_len. Length of array pointed to by in_bytes, in bytes. Must be a multiple of 6.
+ *
+ * @return ESP_ERR_INVALID_ARG if either pointer is null or in_bytes_len is not a multiple of 6. ESP_OK otherwise.
+ */
+esp_err_t esp_efuse_apply_34_encoding(const uint8_t *in_bytes, uint32_t *out_words, size_t in_bytes_len);
+
+/* @brief Write random data to efuse key block write registers
+ *
+ * @note Caller is responsible for ensuring efuse
+ * block is empty and not write protected, before calling.
+ *
+ * @note Behaviour depends on coding scheme: a 256-bit key is
+ * generated and written for Coding Scheme "None", a 192-bit key
+ * is generated, extended to 256-bits by the Coding Scheme,
+ * and then writtten for 3/4 Coding Scheme.
+ *
+ * @note This function does not burn the new values, caller should
+ * call esp_efuse_burn_new_values() when ready to do this.
+ *
+ * @param blk_wdata0_reg Address of the first data write register
+ * in the block
+ */
+void esp_efuse_write_random_key(uint32_t blk_wdata0_reg);
+
 #ifdef __cplusplus
 }
 #endif

components/bootloader_support/include/esp_flash_encrypt.h

@@ -17,7 +17,9 @@
 #include <stdbool.h>
 #include "esp_attr.h"
 #include "esp_err.h"
+#ifndef BOOTLOADER_BUILD
 #include "esp_spi_flash.h"
+#endif
 #include "soc/efuse_reg.h"
 
 /**

components/bootloader_support/include/esp_flash_partitions.h

@@ -17,16 +17,17 @@
 #include "esp_err.h"
 #include "esp_flash_data_types.h"
 #include <stdbool.h>
+#include "sdkconfig.h"
 
 /* Pre-partition table fixed flash offsets */
 #define ESP_BOOTLOADER_DIGEST_OFFSET 0x0
 #define ESP_BOOTLOADER_OFFSET 0x1000 /* Offset of bootloader image. Has matching value in bootloader KConfig.projbuild file. */
-#define ESP_PARTITION_TABLE_OFFSET 0x8000 /* Offset of partition table. Has matching value in partition_table Kconfig.projbuild file. */
+#define ESP_PARTITION_TABLE_OFFSET CONFIG_PARTITION_TABLE_OFFSET /* Offset of partition table. Backwards-compatible name.*/
 
 #define ESP_PARTITION_TABLE_MAX_LEN 0xC00 /* Maximum length of partition table data */
 #define ESP_PARTITION_TABLE_MAX_ENTRIES (ESP_PARTITION_TABLE_MAX_LEN / sizeof(esp_partition_info_t)) /* Maximum length of partition table data, including terminating entry */
 
-/* @brief Verify the partition table (does not include verifying secure boot cryptographic signature)
+/* @brief Verify the partition table
  *
  * @param partition_table Pointer to at least ESP_PARTITION_TABLE_MAX_ENTRIES of potential partition table data. (ESP_PARTITION_TABLE_MAX_LEN bytes.)
  * @param log_errors Log errors if the partition table is invalid.
@@ -34,6 +35,13 @@
  *
  * @return ESP_OK on success, ESP_ERR_INVALID_STATE if partition table is not valid.
  */
-esp_err_t esp_partition_table_basic_verify(const esp_partition_info_t *partition_table, bool log_errors, int *num_partitions);
+esp_err_t esp_partition_table_verify(const esp_partition_info_t *partition_table, bool log_errors, int *num_partitions);
+
+
+/* This function is included for compatibility with the ESP-IDF v3.x API */
+inline static __attribute__((deprecated)) esp_err_t esp_partition_table_basic_verify(const esp_partition_info_t *partition_table, bool log_errors, int *num_partitions)
+{
+    return esp_partition_table_verify(partition_table, log_errors, num_partitions);
+}
 
 #endif

components/bootloader_support/include/esp_image_format.h

@@ -11,11 +11,11 @@
 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 // See the License for the specific language governing permissions and
 // limitations under the License.
-#ifndef __ESP32_IMAGE_FORMAT_H
-#define __ESP32_IMAGE_FORMAT_H
+#pragma once
 
 #include <stdbool.h>
 #include <esp_err.h>
+#include "esp_flash_partitions.h"
 
 #define ESP_ERR_IMAGE_BASE       0x2000
 #define ESP_ERR_IMAGE_FLASH_FAIL (ESP_ERR_IMAGE_BASE + 1)
@@ -59,13 +59,29 @@ typedef enum {
 typedef struct {
     uint8_t magic;
     uint8_t segment_count;
-    uint8_t spi_mode;      /* flash read mode (esp_image_spi_mode_t as uint8_t) */
-    uint8_t spi_speed: 4;  /* flash frequency (esp_image_spi_freq_t as uint8_t) */
-    uint8_t spi_size: 4;   /* flash chip size (esp_image_flash_size_t as uint8_t) */
+    /* flash read mode (esp_image_spi_mode_t as uint8_t) */
+    uint8_t spi_mode;
+    /* flash frequency (esp_image_spi_freq_t as uint8_t) */
+    uint8_t spi_speed: 4;
+    /* flash chip size (esp_image_flash_size_t as uint8_t) */
+    uint8_t spi_size: 4;
     uint32_t entry_addr;
-    uint8_t encrypt_flag;    /* encrypt flag */
-    uint8_t extra_header[15]; /* ESP32 additional header, unused by second bootloader */
-}  esp_image_header_t;
+    /* WP pin when SPI pins set via efuse (read by ROM bootloader, the IDF bootloader uses software to configure the WP
+     * pin and sets this field to 0xEE=disabled) */
+    uint8_t wp_pin;
+    /* Drive settings for the SPI flash pins (read by ROM bootloader) */
+    uint8_t spi_pin_drv[3];
+    /* Reserved bytes in ESP32 additional header space, currently unused */
+    uint8_t reserved[11];
+    /* If 1, a SHA256 digest "simple hash" (of the entire image) is appended after the checksum. Included in image length. This digest
+     * is separate to secure boot and only used for detecting corruption. For secure boot signed images, the signature
+     * is appended after this (and the simple hash is included in the signed data). */
+    uint8_t hash_appended;
+} __attribute__((packed))  esp_image_header_t;
+
+_Static_assert(sizeof(esp_image_header_t) == 24, "binary image header should be 24 bytes");
+
+#define ESP_IMAGE_HASH_LEN 32 /* Length of the appended SHA-256 digest */
 
 /* Header of binary image segment */
 typedef struct {
@@ -73,62 +89,69 @@ typedef struct {
     uint32_t data_len;
 } esp_image_segment_header_t;
 
+#define ESP_IMAGE_MAX_SEGMENTS 16
+
+/* Structure to hold on-flash image metadata */
+typedef struct {
+  uint32_t start_addr;   /* Start address of image */
+  esp_image_header_t image; /* Header for entire image */
+  esp_image_segment_header_t segments[ESP_IMAGE_MAX_SEGMENTS]; /* Per-segment header data */
+  uint32_t segment_data[ESP_IMAGE_MAX_SEGMENTS]; /* Data offsets for each segment */
+  uint32_t image_len; /* Length of image on flash, in bytes */
+} esp_image_metadata_t;
+
+/* Mode selection for esp_image_load() */
+typedef enum {
+    ESP_IMAGE_VERIFY,        /* Verify image contents, load metadata. Print errorsors. */
+    ESP_IMAGE_VERIFY_SILENT, /* Verify image contents, load metadata. Don't print errors. */
+#ifdef BOOTLOADER_BUILD
+    ESP_IMAGE_LOAD,          /* Verify image contents, load to memory. Print errors. */
+#endif
+} esp_image_load_mode_t;
 
 /**
- * @brief Read an ESP image header from flash.
+ * @brief Verify and (optionally, in bootloader mode) load an app image.
  *
  * If encryption is enabled, data will be transparently decrypted.
  *
- * @param src_addr Address in flash to load image header. Must be 4 byte aligned.
- * @param log_errors Log error output if image header appears invalid.
- * @param[out] image_header Pointer to an esp_image_header_t struture to be filled with data. If the function fails, contents are undefined.
- *
- * @return ESP_OK if image header was loaded, ESP_ERR_IMAGE_FLASH_FAIL
- * if a SPI flash error occurs, ESP_ERR_IMAGE_INVALID if the image header
- * appears invalid.
- */
-esp_err_t esp_image_load_header(uint32_t src_addr, bool log_errors, esp_image_header_t *image_header);
-
-/**
- * @brief Read the segment header and data offset of a segment in the image.
- *
- * If encryption is enabled, data will be transparently decrypted.
- *
- * @param index Index of the segment to load information for.
- * @param src_addr Base address in flash of the image.
- * @param[in] image_header Pointer to the flash image header, already loaded by @ref esp_image_load_header().
- * @param log_errors Log errors reading the segment header.
- * @param[out] segment_header Pointer to a segment header structure to be filled with data. If the function fails, contents are undefined.
- * @param[out] segment_data_offset Pointer to the data offset of the segment.
- *
- * @return ESP_OK if segment_header & segment_data_offset were loaded successfully, ESP_ERR_IMAGE_FLASH_FAIL if a SPI flash error occurs, ESP_ERR_IMAGE_INVALID if the image header appears invalid, ESP_ERR_INVALID_ARG if the index is invalid.
- */
-esp_err_t esp_image_load_segment_header(uint8_t index, uint32_t src_addr, const esp_image_header_t *image_header, bool log_errors, esp_image_segment_header_t *segment_header, uint32_t *segment_data_offset);
-
-
-/**
- * @brief Non-cryptographically validate app image integrity. On success, length of image is provided to caller.
- *
- * If the image has a secure boot signature appended, the signature is not checked and this length is not included in the
- * output value.
+ * @param mode Mode of operation (verify, silent verify, or load).
+ * @param part Partition to load the app from.
+ * @param[inout] data Pointer to the image metadata structure which is be filled in by this function. 'start_addr' member should be set (to the start address of the image.) Other fields will all be initialised by this function.
  *
  * Image validation checks:
- * - Magic byte
- * - No single segment longer than 16MB
- * - Total image no longer than 16MB
- * - 8 bit image checksum is valid
- *
- * If flash encryption is enabled, the image will be tranpsarently decrypted.
- *
- * @param src_addr Offset of the start of the image in flash. Must be 4 byte aligned.
- * @param allow_decrypt If true and flash encryption is enabled, the image will be transparently decrypted.
- * @param log_errors Log errors verifying the image.
- * @param[out] length Length of the image, set to a value if the image is valid. Can be null.
- *
- * @return ESP_OK if image is valid, ESP_FAIL or ESP_ERR_IMAGE_INVALID on errors.
+ * - Magic byte.
+ * - Partition smaller than 16MB.
+ * - All segments & image fit in partition.
+ * - 8 bit image checksum is valid.
+ * - SHA-256 of image is valid (if image has this appended).
+ * - (Signature) if signature verification is enabled.
  *
+ * @return
+ * - ESP_OK if verify or load was successful
+ * - ESP_ERR_IMAGE_FLASH_FAIL if a SPI flash error occurs
+ * - ESP_ERR_IMAGE_INVALID if the image appears invalid.
+ * - ESP_ERR_INVALID_ARG if the partition or data pointers are invalid.
  */
-esp_err_t esp_image_basic_verify(uint32_t src_addr, bool log_errors, uint32_t *length);
+esp_err_t esp_image_load(esp_image_load_mode_t mode, const esp_partition_pos_t *part, esp_image_metadata_t *data);
+
+/**
+ * @brief Verify the bootloader image.
+ *
+ * @param[out] If result is ESP_OK and this pointer is non-NULL, it
+ * will be set to the length of the bootloader image.
+ *
+ * @return As per esp_image_load_metadata().
+ */
+esp_err_t esp_image_verify_bootloader(uint32_t *length);
+
+/**
+ * @brief Verify the bootloader image.
+ *
+ * @param[out] Metadata for the image. Only valid if result is ESP_OK.
+ *
+ * @return As per esp_image_load_metadata().
+ */
+esp_err_t esp_image_verify_bootloader_data(esp_image_metadata_t *data);
 
 
 typedef struct {
@@ -139,5 +162,3 @@ typedef struct {
     uint32_t irom_load_addr;
     uint32_t irom_size;
 } esp_image_flash_mapping_t;
-
-#endif

components/bootloader_support/include/esp_secure_boot.h

@@ -11,13 +11,24 @@
 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 // See the License for the specific language governing permissions and
 // limitations under the License.
-#ifndef __ESP32_SECUREBOOT_H
-#define __ESP32_SECUREBOOT_H
+#pragma once
 
 #include <stdbool.h>
 #include <esp_err.h>
 #include "soc/efuse_reg.h"
 
+#include "sdkconfig.h"
+
+#ifdef CONFIG_SECURE_BOOT_ENABLED
+#if !defined(CONFIG_SECURE_SIGNED_ON_BOOT) || !defined(CONFIG_SECURE_SIGNED_ON_UPDATE) || !defined(CONFIG_SECURE_SIGNED_APPS)
+#error "internal sdkconfig error, secure boot should always enable all signature options"
+#endif
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 /* Support functions for secure boot features.
 
    Can be compiled as part of app or bootloader code.
@@ -74,12 +85,22 @@ esp_err_t esp_secure_boot_permanently_enable(void);
  */
 esp_err_t esp_secure_boot_verify_signature(uint32_t src_addr, uint32_t length);
 
+/** @brief Verify the secure boot signature block (deterministic ECDSA w/ SHA256) based on the SHA256 hash of some data.
+ *
+ * Similar to esp_secure_boot_verify_signature(), but can be used when the digest is precalculated.
+ * @param sig_block Pointer to signature block data
+ * @param image_digest Pointer to 32 byte buffer holding SHA-256 hash.
+ *
+ */
+
 /** @brief Secure boot verification block, on-flash data format. */
 typedef struct {
     uint32_t version;
     uint8_t signature[64];
 } esp_secure_boot_sig_block_t;
 
+esp_err_t esp_secure_boot_verify_signature_block(const esp_secure_boot_sig_block_t *sig_block, const uint8_t *image_digest);
+
 #define FLASH_OFFS_SECURE_BOOT_IV_DIGEST 0
 
 /** @brief Secure boot IV+digest header */
@@ -88,4 +109,7 @@ typedef struct {
     uint8_t digest[64];
 } esp_secure_boot_iv_digest_t;
 
+
+#ifdef __cplusplus
+}
 #endif

components/bootloader_support/include_priv/bootloader_config.h

@@ -28,17 +28,25 @@ extern "C"
 
 #define SPI_ERROR_LOG "spi flash error"
 
+#define MAX_OTA_SLOTS 16
+
 typedef struct {
     esp_partition_pos_t ota_info;
     esp_partition_pos_t factory;
     esp_partition_pos_t test;
-    esp_partition_pos_t ota[16];
+    esp_partition_pos_t ota[MAX_OTA_SLOTS];
     uint32_t app_count;
     uint32_t selected_subtype;
 } bootloader_state_t;
 
 bool flash_encrypt(bootloader_state_t *bs);
 
+/* Indices used by index_to_partition are the OTA index
+   number, or these special constants */
+#define FACTORY_INDEX (-1)
+#define TEST_APP_INDEX (-2)
+#define INVALID_INDEX (-99)
+
 #ifdef __cplusplus
 }
 #endif

components/bootloader_support/include_priv/bootloader_flash.h

@@ -21,6 +21,7 @@
 #include "esp_spi_flash.h"
 
 #define FLASH_SECTOR_SIZE 0x1000
+#define FLASH_BLOCK_SIZE 0x10000
 
 /* Provide a Flash API for bootloader_support code,
    that can be used from bootloader or app code.
@@ -100,4 +101,31 @@ esp_err_t bootloader_flash_write(size_t dest_addr, void *src, size_t size, bool
  */
 esp_err_t bootloader_flash_erase_sector(size_t sector);
 
+/**
+ * @brief  Erase the Flash range.
+ *
+ * @param  start_addr start address of flash offset
+ * @param  size       sector aligned size to be erased
+ *
+ * @return esp_err_t
+ */
+esp_err_t bootloader_flash_erase_range(uint32_t start_addr, uint32_t size);
+
+/* Cache MMU block size */
+#define MMU_BLOCK_SIZE    0x00010000
+
+/* Cache MMU address mask (MMU tables ignore bits which are zero) */
+#define MMU_FLASH_MASK    (~(MMU_BLOCK_SIZE - 1))
+
+/**
+ * @brief Calculate the number of cache pages to map
+ * @param size  size of data to map
+ * @param vaddr  virtual address where data will be mapped
+ * @return number of cache MMU pages required to do the mapping
+ */
+static inline uint32_t bootloader_cache_pages_to_map(uint32_t size, uint32_t vaddr)
+{
+    return (size + (vaddr - (vaddr & MMU_FLASH_MASK)) + MMU_BLOCK_SIZE - 1) / MMU_BLOCK_SIZE;
+}
+
 #endif

components/bootloader_support/include_priv/bootloader_init.h

@@ -0,0 +1,28 @@
+// Copyright 2018 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+
+#include "esp_err.h"
+
+/* @brief Prepares hardware for work.
+ *
+ * Setting up:
+ * - Disable Cache access for both CPUs;
+ * - Initialise cache mmu;
+ * - Setting up pins and mode for SD, SPI, UART, Clocking.
+
+ *  @return ESP_OK   - If the setting is successful.
+ *          ESP_FAIL - If the setting is not successful.
+ */
+esp_err_t bootloader_init();

components/bootloader_support/include_priv/bootloader_sha.h

@@ -0,0 +1,32 @@
+// Copyright 2017 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+
+/* Provide a SHA256 API for bootloader_support code,
+   that can be used from bootloader or app code.
+
+   This header is available to source code in the bootloader & bootloader_support components only.
+   Use mbedTLS APIs or include hwcrypto/sha.h to calculate SHA256 in IDF apps.
+*/
+
+#include <stdint.h>
+#include <stdlib.h>
+
+typedef void *bootloader_sha256_handle_t;
+
+bootloader_sha256_handle_t bootloader_sha256_start();
+
+void bootloader_sha256_data(bootloader_sha256_handle_t handle, const void *data, size_t data_len);
+
+void bootloader_sha256_finish(bootloader_sha256_handle_t handle, uint8_t *digest);

components/bootloader_support/include_priv/bootloader_utility.h

@@ -0,0 +1,54 @@
+// Copyright 2018 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+
+#include "esp_image_format.h"
+
+/**
+ * @brief Load partition table.
+ *
+ * Parse partition table, get useful data such as location of
+ * OTA data partition, factory app partition, and test app partition.
+ *
+ * @param[out] bs Bootloader state structure used to save read data.
+ * @return        Return true if the partition table was succesfully loaded and MD5 checksum is valid.
+ */
+bool bootloader_utility_load_partition_table(bootloader_state_t* bs);
+
+/**
+ * @brief Return the index of the selected boot partition.
+ *
+ * This is the preferred boot partition, as determined by the partition table &
+ * any OTA sequence number found in OTA data.
+ * This partition will only be booted if it contains a valid app image, otherwise load_boot_image() will search
+ * for a valid partition using this selection as the starting point.
+ *
+ * @param[in] bs Bootloader state structure.
+ * @return       Returns the index on success, INVALID_INDEX otherwise.
+ */
+int bootloader_utility_get_selected_boot_partition(const bootloader_state_t *bs);
+
+/**
+ * @brief Load the selected partition and start application.
+ *
+ * Start from partition 'start_index', if not bootable then work backwards to FACTORY_INDEX
+ * (ie try any OTA slots in descending order and then the factory partition).
+ * If still nothing, start from 'start_index + 1' and work up to highest numbered OTA partition.
+ * If still nothing, try TEST_APP_INDEX.
+ * Everything this function calls must be located in the iram_loader_seg segment.
+ *
+ * @param[in] bs Bootloader state structure.
+ * @param[in] start_index The index from which the search for images begins.
+ */
+__attribute__((noreturn)) void bootloader_utility_load_boot_image(const bootloader_state_t *bs, int start_index);

components/bootloader_support/include_priv/flash_qio_mode.h

@@ -24,6 +24,14 @@ extern "C" {
  */
 void bootloader_enable_qio_mode(void);
 
+/**
+ * @brief Read flash ID by sending 0x9F command
+ * @return flash raw ID
+ *     mfg_id = (ID >> 16) & 0xFF;
+       flash_id = ID & 0xffff;
+ */
+uint32_t bootloader_read_flash_id();
+
 #ifdef __cplusplus
 }
 #endif

components/bootloader_support/src/bootloader_clock.c

@@ -0,0 +1,61 @@
+// Copyright 2017 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#include "rom/uart.h"
+#include "rom/rtc.h"
+#include "soc/soc.h"
+#include "soc/rtc.h"
+#include "soc/dport_reg.h"
+#include "soc/efuse_reg.h"
+#include "soc/rtc_cntl_reg.h"
+
+void bootloader_clock_configure()
+{
+    // ROM bootloader may have put a lot of text into UART0 FIFO.
+    // Wait for it to be printed.
+    // This is not needed on power on reset, when ROM bootloader is running at
+    // 40 MHz. But in case of TG WDT reset, CPU may still be running at >80 MHZ,
+    // and will be done with the bootloader much earlier than UART FIFO is empty.
+    uart_tx_wait_idle(0);
+
+    /* Set CPU to 80MHz. Keep other clocks unmodified. */
+    rtc_cpu_freq_t cpu_freq = RTC_CPU_FREQ_80M;
+
+    /* On ESP32 rev 0, switching to 80/160 MHz if clock was previously set to
+     * 240 MHz may cause the chip to lock up (see section 3.5 of the errata
+     * document). For rev. 0, switch to 240 instead if it has been enabled
+     * previously.
+     */
+    uint32_t chip_ver_reg = REG_READ(EFUSE_BLK0_RDATA3_REG);
+    if ((chip_ver_reg & EFUSE_RD_CHIP_VER_REV1_M) == 0 &&
+            DPORT_REG_GET_FIELD(DPORT_CPU_PER_CONF_REG, DPORT_CPUPERIOD_SEL) == DPORT_CPUPERIOD_SEL_240) {
+        cpu_freq = RTC_CPU_FREQ_240M;
+    }
+
+    rtc_clk_config_t clk_cfg = RTC_CLK_CONFIG_DEFAULT();
+    clk_cfg.xtal_freq = CONFIG_ESP32_XTAL_FREQ;
+    clk_cfg.cpu_freq = cpu_freq;
+    clk_cfg.slow_freq = rtc_clk_slow_freq_get();
+    clk_cfg.fast_freq = rtc_clk_fast_freq_get();
+    rtc_clk_init(clk_cfg);
+    /* As a slight optimization, if 32k XTAL was enabled in sdkconfig, we enable
+     * it here. Usually it needs some time to start up, so we amortize at least
+     * part of the start up time by enabling 32k XTAL early.
+     * App startup code will wait until the oscillator has started up.
+     */
+#ifdef CONFIG_ESP32_RTC_CLOCK_SOURCE_EXTERNAL_CRYSTAL
+    if (!rtc_clk_32k_enabled()) {
+        rtc_clk_32k_bootstrap(CONFIG_ESP32_RTC_XTAL_BOOTSTRAP_CYCLES);
+    }
+#endif
+}

components/bootloader_support/src/bootloader_common.c

@@ -0,0 +1,147 @@
+// Copyright 2018 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#include <stdbool.h>
+#include <assert.h>
+#include "string.h"
+#include "sdkconfig.h"
+#include "esp_err.h"
+#include "esp_log.h"
+#include "rom/spi_flash.h"
+#include "rom/crc.h"
+#include "rom/ets_sys.h"
+#include "rom/gpio.h"
+#include "esp_flash_data_types.h"
+#include "esp_secure_boot.h"
+#include "esp_flash_partitions.h"
+#include "bootloader_flash.h"
+#include "bootloader_common.h"
+#include "soc/gpio_periph.h"
+
+static const char* TAG = "boot_comm";
+
+uint32_t bootloader_common_ota_select_crc(const esp_ota_select_entry_t *s)
+{
+    return crc32_le(UINT32_MAX, (uint8_t*)&s->ota_seq, 4);
+}
+
+bool bootloader_common_ota_select_valid(const esp_ota_select_entry_t *s)
+{
+    return s->ota_seq != UINT32_MAX && s->crc == bootloader_common_ota_select_crc(s);
+}
+
+esp_comm_gpio_hold_t bootloader_common_check_long_hold_gpio(uint32_t num_pin, uint32_t delay_sec)
+{
+    gpio_pad_select_gpio(num_pin);
+    if (GPIO_PIN_MUX_REG[num_pin]) {
+        PIN_INPUT_ENABLE(GPIO_PIN_MUX_REG[num_pin]);
+    }
+    gpio_pad_pullup(num_pin);
+    uint32_t tm_start = esp_log_early_timestamp();
+    if (GPIO_INPUT_GET(num_pin) == 1) {
+        return GPIO_NOT_HOLD;
+    }
+    do {
+        if (GPIO_INPUT_GET(num_pin) != 0) {
+            return GPIO_SHORT_HOLD;
+        }
+    } while (delay_sec > ((esp_log_early_timestamp() - tm_start) / 1000L));
+    return GPIO_LONG_HOLD;
+}
+
+// Search for a label in the list. list = "nvs1, nvs2, otadata, nvs"; label = "nvs".
+bool bootloader_common_label_search(const char *list, char *label)
+{
+    if (list == NULL || label == NULL) {
+        return false;
+    }
+    const char *sub_list_start_like_label = strstr(list, label);
+    while (sub_list_start_like_label != NULL) {
+
+        // ["," or " "] + label + ["," or " " or "\0"]
+        // first character before the label found there must be a delimiter ["," or " "].
+        int idx_first = sub_list_start_like_label - list;
+        if (idx_first == 0 || (idx_first != 0 && (list[idx_first - 1] == ',' || list[idx_first - 1] == ' '))) {
+            // next character after the label found there must be a delimiter ["," or " " or "\0"].
+            int len_label = strlen(label);
+            if (sub_list_start_like_label[len_label] == 0   ||
+                sub_list_start_like_label[len_label] == ',' ||
+                sub_list_start_like_label[len_label] == ' ') {
+                return true;
+            }
+        }
+
+        // [start_delim] + label + [end_delim] was not found.
+        // Position is moving to next delimiter if it is not the end of list.
+        int pos_delim = strcspn(sub_list_start_like_label, ", ");
+        if (pos_delim == strlen(sub_list_start_like_label)) {
+            break;
+        }
+        sub_list_start_like_label = strstr(&sub_list_start_like_label[pos_delim], label);
+    }
+    return false;
+}
+
+bool bootloader_common_erase_part_type_data(const char *list_erase, bool ota_data_erase)
+{
+    const esp_partition_info_t *partitions;
+    const char *marker;
+    esp_err_t err;
+    int num_partitions;
+    bool ret = true;
+
+    partitions = bootloader_mmap(ESP_PARTITION_TABLE_OFFSET, ESP_PARTITION_TABLE_MAX_LEN);
+    if (!partitions) {
+        ESP_LOGE(TAG, "bootloader_mmap(0x%x, 0x%x) failed", ESP_PARTITION_TABLE_OFFSET, ESP_PARTITION_TABLE_MAX_LEN);
+        return false;
+    }
+    ESP_LOGD(TAG, "mapped partition table 0x%x at 0x%x", ESP_PARTITION_TABLE_OFFSET, (intptr_t)partitions);
+
+    err = esp_partition_table_verify(partitions, true, &num_partitions);
+    if (err != ESP_OK) {
+        ESP_LOGE(TAG, "Failed to verify partition table");
+        ret = false;
+    } else {
+        ESP_LOGI(TAG, "## Label            Usage Offset   Length   Cleaned");
+        for (int i = 0; i < num_partitions; i++) {
+            const esp_partition_info_t *partition = &partitions[i];
+            char label[sizeof(partition->label) + 1] = {0};
+            if (partition->type == PART_TYPE_DATA) {
+                bool fl_ota_data_erase = false;
+                if (ota_data_erase == true && partition->subtype == PART_SUBTYPE_DATA_OTA) {
+                    fl_ota_data_erase = true;
+                }
+                // partition->label is not null-terminated string.
+                strncpy(label, (char *)&partition->label, sizeof(partition->label));
+                if (fl_ota_data_erase == true || (bootloader_common_label_search(list_erase, label) == true)) {
+                    err = bootloader_flash_erase_range(partition->pos.offset, partition->pos.size);
+                    if (err != ESP_OK) {
+                        ret = false;
+                        marker = "err";
+                    } else {
+                        marker = "yes";
+                    }
+                } else {
+                    marker = "no";
+                }
+
+                ESP_LOGI(TAG, "%2d %-16s data  %08x %08x [%s]", i, partition->label,
+                         partition->pos.offset, partition->pos.size, marker);
+            }
+        }
+    }
+
+    bootloader_munmap(partitions);
+
+    return ret;
+}

components/bootloader_support/src/bootloader_flash.c

@@ -23,7 +23,7 @@
  */
 static const char *TAG = "bootloader_mmap";
 
-static spi_flash_mmap_memory_t map;
+static spi_flash_mmap_handle_t map;
 
 const void *bootloader_mmap(uint32_t src_addr, uint32_t size)
 {
@@ -32,11 +32,14 @@ const void *bootloader_mmap(uint32_t src_addr, uint32_t size)
         return NULL; /* existing mapping in use... */
     }
     const void *result = NULL;
-    esp_err_t err = spi_flash_mmap(src_addr, size, SPI_FLASH_MMAP_DATA, &result, &map);
+    uint32_t src_page = src_addr & ~(SPI_FLASH_MMU_PAGE_SIZE-1);
+    size += (src_addr - src_page);
+    esp_err_t err = spi_flash_mmap(src_page, size, SPI_FLASH_MMAP_DATA, &result, &map);
     if (err != ESP_OK) {
-        result = NULL;
+        ESP_LOGE(TAG, "spi_flash_mmap failed: 0x%x", err);
+        return NULL;
     }
-    return result;
+    return (void *)((intptr_t)result + (src_addr - src_page));
 }
 
 void bootloader_munmap(const void *mapping)
@@ -70,6 +73,11 @@ esp_err_t bootloader_flash_erase_sector(size_t sector)
     return spi_flash_erase_sector(sector);
 }
 
+esp_err_t bootloader_flash_erase_range(uint32_t start_addr, uint32_t size)
+{
+    return spi_flash_erase_range(start_addr, size);
+}
+
 #else
 /* Bootloader version, uses ROM functions only */
 #include <soc/dport_reg.h>
@@ -83,11 +91,10 @@ static const char *TAG = "bootloader_flash";
 */
 #define MMU_BLOCK0_VADDR  0x3f400000
 #define MMU_BLOCK50_VADDR 0x3f720000
-#define MMU_FLASH_MASK    0xffff0000
-#define MMU_BLOCK_SIZE    0x00010000
 
 static bool mapped;
 
+// Current bootloader mapping (ab)used for bootloader_read()
 static uint32_t current_read_mapping = UINT32_MAX;
 
 const void *bootloader_mmap(uint32_t src_addr, uint32_t size)
@@ -103,10 +110,11 @@ const void *bootloader_mmap(uint32_t src_addr, uint32_t size)
     }
 
     uint32_t src_addr_aligned = src_addr & MMU_FLASH_MASK;
-    uint32_t count = (size + (src_addr - src_addr_aligned) + 0xffff) / MMU_BLOCK_SIZE;
+    uint32_t count = bootloader_cache_pages_to_map(size, src_addr);
     Cache_Read_Disable(0);
     Cache_Flush(0);
-    ESP_LOGD(TAG, "mmu set paddr=%08x count=%d", src_addr_aligned, count );
+    ESP_LOGD(TAG, "mmu set paddr=%08x count=%d size=%x src_addr=%x src_addr_aligned=%x",
+            src_addr & MMU_FLASH_MASK, count, size, src_addr, src_addr_aligned );
     int e = cache_flash_mmu_set(0, 0, MMU_BLOCK0_VADDR, src_addr_aligned, 64, count);
     if (e != 0) {
         ESP_LOGE(TAG, "cache_flash_mmu_set failed: %d\n", e);
@@ -243,4 +251,28 @@ esp_err_t bootloader_flash_erase_sector(size_t sector)
     return spi_to_esp_err(esp_rom_spiflash_erase_sector(sector));
 }
 
+esp_err_t bootloader_flash_erase_range(uint32_t start_addr, uint32_t size)
+{
+    if (start_addr % FLASH_SECTOR_SIZE != 0) {
+        return ESP_ERR_INVALID_ARG;
+    }
+    if (size % FLASH_SECTOR_SIZE != 0) {
+        return ESP_ERR_INVALID_SIZE;
+    }
+    size_t start = start_addr / FLASH_SECTOR_SIZE;
+    size_t end = start + size / FLASH_SECTOR_SIZE;
+    const size_t sectors_per_block = FLASH_BLOCK_SIZE / FLASH_SECTOR_SIZE;
+
+    esp_rom_spiflash_result_t rc = ESP_ROM_SPIFLASH_RESULT_OK;
+    for (size_t sector = start; sector != end && rc == ESP_ROM_SPIFLASH_RESULT_OK; ) {
+        if (sector % sectors_per_block == 0 && end - sector >= sectors_per_block) {
+            rc = esp_rom_spiflash_erase_block(sector / sectors_per_block);
+            sector += sectors_per_block;
+        } else {
+            rc = esp_rom_spiflash_erase_sector(sector);
+            ++sector;
+        }
+    }
+    return spi_to_esp_err(rc);
+}
 #endif

components/bootloader_support/src/bootloader_init.c

@@ -0,0 +1,533 @@
+// Copyright 2018 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#include <string.h>
+#include <stdint.h>
+#include <limits.h>
+#include <sys/param.h>
+
+#include "esp_attr.h"
+#include "esp_log.h"
+
+#include "rom/cache.h"
+#include "rom/efuse.h"
+#include "rom/ets_sys.h"
+#include "rom/spi_flash.h"
+#include "rom/crc.h"
+#include "rom/rtc.h"
+#include "rom/uart.h"
+#include "rom/gpio.h"
+#include "rom/secure_boot.h"
+
+#include "soc/soc.h"
+#include "soc/cpu.h"
+#include "soc/rtc.h"
+#include "soc/dport_reg.h"
+#include "soc/efuse_reg.h"
+#include "soc/rtc_cntl_reg.h"
+#include "soc/timer_group_reg.h"
+#include "soc/gpio_periph.h"
+
+#include "sdkconfig.h"
+#include "esp_image_format.h"
+#include "esp_secure_boot.h"
+#include "esp_flash_encrypt.h"
+#include "esp_flash_partitions.h"
+#include "bootloader_flash.h"
+#include "bootloader_random.h"
+#include "bootloader_config.h"
+#include "bootloader_clock.h"
+
+#include "flash_qio_mode.h"
+
+extern int _bss_start;
+extern int _bss_end;
+extern int _data_start;
+extern int _data_end;
+
+static const char* TAG = "boot";
+
+static esp_err_t bootloader_main();
+static void print_flash_info(const esp_image_header_t* pfhdr);
+static void update_flash_config(const esp_image_header_t* pfhdr);
+static void vddsdio_configure();
+static void flash_gpio_configure(const esp_image_header_t* pfhdr);
+static void uart_console_configure(void);
+static void wdt_reset_check(void);
+
+
+esp_err_t bootloader_init()
+{
+    cpu_configure_region_protection();
+    cpu_init_memctl();
+
+    /* Sanity check that static RAM is after the stack */
+#ifndef NDEBUG
+    {
+        int *sp = get_sp();
+        assert(&_bss_start <= &_bss_end);
+        assert(&_data_start <= &_data_end);
+        assert(sp < &_bss_start);
+        assert(sp < &_data_start);
+    }
+#endif
+
+    //Clear bss
+    memset(&_bss_start, 0, (&_bss_end - &_bss_start) * sizeof(_bss_start));
+
+    /* completely reset MMU for both CPUs
+       (in case serial bootloader was running) */
+    Cache_Read_Disable(0);
+    Cache_Read_Disable(1);
+    Cache_Flush(0);
+    Cache_Flush(1);
+    mmu_init(0);
+    DPORT_REG_SET_BIT(DPORT_APP_CACHE_CTRL1_REG, DPORT_APP_CACHE_MMU_IA_CLR);
+    mmu_init(1);
+    DPORT_REG_CLR_BIT(DPORT_APP_CACHE_CTRL1_REG, DPORT_APP_CACHE_MMU_IA_CLR);
+    /* (above steps probably unnecessary for most serial bootloader
+       usage, all that's absolutely needed is that we unmask DROM0
+       cache on the following two lines - normal ROM boot exits with
+       DROM0 cache unmasked, but serial bootloader exits with it
+       masked. However can't hurt to be thorough and reset
+       everything.)
+
+       The lines which manipulate DPORT_APP_CACHE_MMU_IA_CLR bit are
+       necessary to work around a hardware bug.
+    */
+    DPORT_REG_CLR_BIT(DPORT_PRO_CACHE_CTRL1_REG, DPORT_PRO_CACHE_MASK_DROM0);
+    DPORT_REG_CLR_BIT(DPORT_APP_CACHE_CTRL1_REG, DPORT_APP_CACHE_MASK_DROM0);
+
+    if(bootloader_main() != ESP_OK){
+        return ESP_FAIL;
+    }
+    return ESP_OK;
+}
+
+static esp_err_t bootloader_main()
+{
+    vddsdio_configure();
+    /* Read and keep flash ID, for further use. */
+    g_rom_flashchip.device_id = bootloader_read_flash_id();
+    esp_image_header_t fhdr;
+    if (bootloader_flash_read(ESP_BOOTLOADER_OFFSET, &fhdr, sizeof(esp_image_header_t), true) != ESP_OK) {
+        ESP_LOGE(TAG, "failed to load bootloader header!");
+        return ESP_FAIL;
+    }
+    flash_gpio_configure(&fhdr);
+#if (CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ == 240)
+    //Check if ESP32 is rated for a CPU frequency of 160MHz only
+    if (REG_GET_BIT(EFUSE_BLK0_RDATA3_REG, EFUSE_RD_CHIP_CPU_FREQ_RATED) &&
+        REG_GET_BIT(EFUSE_BLK0_RDATA3_REG, EFUSE_RD_CHIP_CPU_FREQ_LOW)) {
+        ESP_LOGE(TAG, "Chip CPU frequency rated for 160MHz. Modify CPU frequency in menuconfig");
+        return ESP_FAIL;
+    }
+#endif
+    bootloader_clock_configure();
+    uart_console_configure();
+    wdt_reset_check();
+    ESP_LOGI(TAG, "ESP-IDF %s 2nd stage bootloader", IDF_VER);
+
+    ESP_LOGI(TAG, "compile time " __TIME__ );
+    ets_set_appcpu_boot_addr(0);
+
+    /* disable watch dog here */
+    REG_CLR_BIT( RTC_CNTL_WDTCONFIG0_REG, RTC_CNTL_WDT_FLASHBOOT_MOD_EN );
+    REG_CLR_BIT( TIMG_WDTCONFIG0_REG(0), TIMG_WDT_FLASHBOOT_MOD_EN );
+
+#ifndef CONFIG_SPI_FLASH_ROM_DRIVER_PATCH
+    const uint32_t spiconfig = ets_efuse_get_spiconfig();
+    if(spiconfig != EFUSE_SPICONFIG_SPI_DEFAULTS && spiconfig != EFUSE_SPICONFIG_HSPI_DEFAULTS) {
+        ESP_LOGE(TAG, "SPI flash pins are overridden. \"Enable SPI flash ROM driver patched functions\" must be enabled in menuconfig");
+        return ESP_FAIL;
+    }
+#endif
+
+    esp_rom_spiflash_unlock();
+
+    ESP_LOGI(TAG, "Enabling RNG early entropy source...");
+    bootloader_random_enable();
+
+#if CONFIG_FLASHMODE_QIO || CONFIG_FLASHMODE_QOUT
+    bootloader_enable_qio_mode();
+#endif
+
+    print_flash_info(&fhdr);
+
+    update_flash_config(&fhdr);
+    return ESP_OK;
+}
+
+static void update_flash_config(const esp_image_header_t* pfhdr)
+{
+    uint32_t size;
+    switch(pfhdr->spi_size) {
+        case ESP_IMAGE_FLASH_SIZE_1MB:
+            size = 1;
+            break;
+        case ESP_IMAGE_FLASH_SIZE_2MB:
+            size = 2;
+            break;
+        case ESP_IMAGE_FLASH_SIZE_4MB:
+            size = 4;
+            break;
+        case ESP_IMAGE_FLASH_SIZE_8MB:
+            size = 8;
+            break;
+        case ESP_IMAGE_FLASH_SIZE_16MB:
+            size = 16;
+            break;
+        default:
+            size = 2;
+    }
+    Cache_Read_Disable( 0 );
+    // Set flash chip size
+    esp_rom_spiflash_config_param(g_rom_flashchip.device_id, size * 0x100000, 0x10000, 0x1000, 0x100, 0xffff);
+    // TODO: set mode
+    // TODO: set frequency
+    Cache_Flush(0);
+    Cache_Read_Enable( 0 );
+}
+
+static void print_flash_info(const esp_image_header_t* phdr)
+{
+#if (BOOT_LOG_LEVEL >= BOOT_LOG_LEVEL_NOTICE)
+
+    ESP_LOGD(TAG, "magic %02x", phdr->magic );
+    ESP_LOGD(TAG, "segments %02x", phdr->segment_count );
+    ESP_LOGD(TAG, "spi_mode %02x", phdr->spi_mode );
+    ESP_LOGD(TAG, "spi_speed %02x", phdr->spi_speed );
+    ESP_LOGD(TAG, "spi_size %02x", phdr->spi_size );
+
+    const char* str;
+    switch ( phdr->spi_speed ) {
+    case ESP_IMAGE_SPI_SPEED_40M:
+        str = "40MHz";
+        break;
+    case ESP_IMAGE_SPI_SPEED_26M:
+        str = "26.7MHz";
+        break;
+    case ESP_IMAGE_SPI_SPEED_20M:
+        str = "20MHz";
+        break;
+    case ESP_IMAGE_SPI_SPEED_80M:
+        str = "80MHz";
+        break;
+    default:
+        str = "20MHz";
+        break;
+    }
+    ESP_LOGI(TAG, "SPI Speed      : %s", str );
+
+    /* SPI mode could have been set to QIO during boot already,
+       so test the SPI registers not the flash header */
+    uint32_t spi_ctrl = REG_READ(SPI_CTRL_REG(0));
+    if (spi_ctrl & SPI_FREAD_QIO) {
+        str = "QIO";
+    } else if (spi_ctrl & SPI_FREAD_QUAD) {
+        str = "QOUT";
+    } else if (spi_ctrl & SPI_FREAD_DIO) {
+        str = "DIO";
+    } else if (spi_ctrl & SPI_FREAD_DUAL) {
+        str = "DOUT";
+    } else if (spi_ctrl & SPI_FASTRD_MODE) {
+        str = "FAST READ";
+    } else {
+        str = "SLOW READ";
+    }
+    ESP_LOGI(TAG, "SPI Mode       : %s", str );
+
+    switch ( phdr->spi_size ) {
+    case ESP_IMAGE_FLASH_SIZE_1MB:
+        str = "1MB";
+        break;
+    case ESP_IMAGE_FLASH_SIZE_2MB:
+        str = "2MB";
+        break;
+    case ESP_IMAGE_FLASH_SIZE_4MB:
+        str = "4MB";
+        break;
+    case ESP_IMAGE_FLASH_SIZE_8MB:
+        str = "8MB";
+        break;
+    case ESP_IMAGE_FLASH_SIZE_16MB:
+        str = "16MB";
+        break;
+    default:
+        str = "2MB";
+        break;
+    }
+    ESP_LOGI(TAG, "SPI Flash Size : %s", str );
+#endif
+}
+
+static void vddsdio_configure()
+{
+#if CONFIG_BOOTLOADER_VDDSDIO_BOOST_1_9V
+    rtc_vddsdio_config_t cfg = rtc_vddsdio_get_config();
+    if (cfg.enable == 1 && cfg.tieh == RTC_VDDSDIO_TIEH_1_8V) {    // VDDSDIO regulator is enabled @ 1.8V
+        cfg.drefh = 3;
+        cfg.drefm = 3;
+        cfg.drefl = 3;
+        cfg.force = 1;
+        rtc_vddsdio_set_config(cfg);
+        ets_delay_us(10); // wait for regulator to become stable
+    }
+#endif // CONFIG_BOOTLOADER_VDDSDIO_BOOST
+}
+
+#define FLASH_CLK_IO      6
+#define FLASH_CS_IO       11
+#define FLASH_SPIQ_IO     7
+#define FLASH_SPID_IO     8
+#define FLASH_SPIWP_IO    10
+#define FLASH_SPIHD_IO    9
+#define FLASH_IO_MATRIX_DUMMY_40M   1
+#define FLASH_IO_MATRIX_DUMMY_80M   2
+#define FLASH_IO_DRIVE_GD_WITH_1V8PSRAM    3
+
+/*
+ * Bootloader reads SPI configuration from bin header, so that
+ * the burning configuration can be different with compiling configuration.
+ */
+static void IRAM_ATTR flash_gpio_configure(const esp_image_header_t* pfhdr)
+{
+    int spi_cache_dummy = 0;
+    int drv = 2;
+    switch (pfhdr->spi_mode) {
+        case ESP_IMAGE_SPI_MODE_QIO:
+            spi_cache_dummy = SPI0_R_QIO_DUMMY_CYCLELEN;
+            break;
+        case ESP_IMAGE_SPI_MODE_DIO:
+            spi_cache_dummy = SPI0_R_DIO_DUMMY_CYCLELEN;
+            SET_PERI_REG_BITS(SPI_USER1_REG(0), SPI_USR_ADDR_BITLEN_V, SPI0_R_DIO_ADDR_BITSLEN, SPI_USR_ADDR_BITLEN_S);
+            break;
+        case ESP_IMAGE_SPI_MODE_QOUT:
+        case ESP_IMAGE_SPI_MODE_DOUT:
+        default:
+            spi_cache_dummy = SPI0_R_FAST_DUMMY_CYCLELEN;
+            break;
+    }
+
+    /* dummy_len_plus values defined in ROM for SPI flash configuration */
+    extern uint8_t g_rom_spiflash_dummy_len_plus[];
+    switch (pfhdr->spi_speed) {
+        case ESP_IMAGE_SPI_SPEED_80M:
+            g_rom_spiflash_dummy_len_plus[0] = FLASH_IO_MATRIX_DUMMY_80M;
+            g_rom_spiflash_dummy_len_plus[1] = FLASH_IO_MATRIX_DUMMY_80M;
+            SET_PERI_REG_BITS(SPI_USER1_REG(0), SPI_USR_DUMMY_CYCLELEN_V, spi_cache_dummy + FLASH_IO_MATRIX_DUMMY_80M,
+                    SPI_USR_DUMMY_CYCLELEN_S);  //DUMMY
+            drv = 3;
+            break;
+        case ESP_IMAGE_SPI_SPEED_40M:
+            g_rom_spiflash_dummy_len_plus[0] = FLASH_IO_MATRIX_DUMMY_40M;
+            g_rom_spiflash_dummy_len_plus[1] = FLASH_IO_MATRIX_DUMMY_40M;
+            SET_PERI_REG_BITS(SPI_USER1_REG(0), SPI_USR_DUMMY_CYCLELEN_V, spi_cache_dummy + FLASH_IO_MATRIX_DUMMY_40M,
+                    SPI_USR_DUMMY_CYCLELEN_S);  //DUMMY
+            break;
+        default:
+            break;
+    }
+
+    uint32_t chip_ver = REG_GET_FIELD(EFUSE_BLK0_RDATA3_REG, EFUSE_RD_CHIP_VER_PKG);
+    uint32_t pkg_ver = chip_ver & 0x7;
+
+    if (pkg_ver == EFUSE_RD_CHIP_VER_PKG_ESP32D2WDQ5) {
+        // For ESP32D2WD the SPI pins are already configured
+        // flash clock signal should come from IO MUX.
+        PIN_FUNC_SELECT(PERIPHS_IO_MUX_SD_CLK_U, FUNC_SD_CLK_SPICLK);
+        SET_PERI_REG_BITS(PERIPHS_IO_MUX_SD_CLK_U, FUN_DRV, drv, FUN_DRV_S);
+    } else if (pkg_ver == EFUSE_RD_CHIP_VER_PKG_ESP32PICOD2) {
+        // For ESP32PICOD2 the SPI pins are already configured
+        // flash clock signal should come from IO MUX.
+        PIN_FUNC_SELECT(PERIPHS_IO_MUX_SD_CLK_U, FUNC_SD_CLK_SPICLK);
+        SET_PERI_REG_BITS(PERIPHS_IO_MUX_SD_CLK_U, FUN_DRV, drv, FUN_DRV_S);
+    } else if (pkg_ver == EFUSE_RD_CHIP_VER_PKG_ESP32PICOD4) {
+        // For ESP32PICOD4 the SPI pins are already configured
+        // flash clock signal should come from IO MUX.
+        PIN_FUNC_SELECT(PERIPHS_IO_MUX_SD_CLK_U, FUNC_SD_CLK_SPICLK);
+        SET_PERI_REG_BITS(PERIPHS_IO_MUX_SD_CLK_U, FUN_DRV, drv, FUN_DRV_S);
+    } else {
+        const uint32_t spiconfig = ets_efuse_get_spiconfig();
+        if (spiconfig == EFUSE_SPICONFIG_SPI_DEFAULTS) {
+            gpio_matrix_out(FLASH_CS_IO, SPICS0_OUT_IDX, 0, 0);
+            gpio_matrix_out(FLASH_SPIQ_IO, SPIQ_OUT_IDX, 0, 0);
+            gpio_matrix_in(FLASH_SPIQ_IO, SPIQ_IN_IDX, 0);
+            gpio_matrix_out(FLASH_SPID_IO, SPID_OUT_IDX, 0, 0);
+            gpio_matrix_in(FLASH_SPID_IO, SPID_IN_IDX, 0);
+            gpio_matrix_out(FLASH_SPIWP_IO, SPIWP_OUT_IDX, 0, 0);
+            gpio_matrix_in(FLASH_SPIWP_IO, SPIWP_IN_IDX, 0);
+            gpio_matrix_out(FLASH_SPIHD_IO, SPIHD_OUT_IDX, 0, 0);
+            gpio_matrix_in(FLASH_SPIHD_IO, SPIHD_IN_IDX, 0);
+            //select pin function gpio
+            PIN_FUNC_SELECT(PERIPHS_IO_MUX_SD_DATA0_U, PIN_FUNC_GPIO);
+            PIN_FUNC_SELECT(PERIPHS_IO_MUX_SD_DATA1_U, PIN_FUNC_GPIO);
+            PIN_FUNC_SELECT(PERIPHS_IO_MUX_SD_DATA2_U, PIN_FUNC_GPIO);
+            PIN_FUNC_SELECT(PERIPHS_IO_MUX_SD_DATA3_U, PIN_FUNC_GPIO);
+            PIN_FUNC_SELECT(PERIPHS_IO_MUX_SD_CMD_U, PIN_FUNC_GPIO);
+            // flash clock signal should come from IO MUX.
+            // set drive ability for clock
+            PIN_FUNC_SELECT(PERIPHS_IO_MUX_SD_CLK_U, FUNC_SD_CLK_SPICLK);
+            SET_PERI_REG_BITS(PERIPHS_IO_MUX_SD_CLK_U, FUN_DRV, drv, FUN_DRV_S);
+
+            #if CONFIG_SPIRAM_TYPE_ESPPSRAM32
+            uint32_t flash_id = g_rom_flashchip.device_id;
+            if (flash_id == FLASH_ID_GD25LQ32C) {
+                // Set drive ability for 1.8v flash in 80Mhz.
+                SET_PERI_REG_BITS(PERIPHS_IO_MUX_SD_DATA0_U, FUN_DRV, 3, FUN_DRV_S);
+                SET_PERI_REG_BITS(PERIPHS_IO_MUX_SD_DATA1_U, FUN_DRV, 3, FUN_DRV_S);
+                SET_PERI_REG_BITS(PERIPHS_IO_MUX_SD_DATA2_U, FUN_DRV, 3, FUN_DRV_S);
+                SET_PERI_REG_BITS(PERIPHS_IO_MUX_SD_DATA3_U, FUN_DRV, 3, FUN_DRV_S);
+                SET_PERI_REG_BITS(PERIPHS_IO_MUX_SD_CMD_U, FUN_DRV, 3, FUN_DRV_S);
+                SET_PERI_REG_BITS(PERIPHS_IO_MUX_SD_CLK_U, FUN_DRV, 3, FUN_DRV_S);
+            }
+            #endif
+        }
+    }
+}
+
+static void uart_console_configure(void)
+{
+#if CONFIG_CONSOLE_UART_NONE
+    ets_install_putc1(NULL);
+    ets_install_putc2(NULL);
+#else // CONFIG_CONSOLE_UART_NONE
+    const int uart_num = CONFIG_CONSOLE_UART_NUM;
+
+    uartAttach();
+    ets_install_uart_printf();
+
+    // Wait for UART FIFO to be empty.
+    uart_tx_wait_idle(0);
+
+#if CONFIG_CONSOLE_UART_CUSTOM
+    // Some constants to make the following code less upper-case
+    const int uart_tx_gpio = CONFIG_CONSOLE_UART_TX_GPIO;
+    const int uart_rx_gpio = CONFIG_CONSOLE_UART_RX_GPIO;
+    // Switch to the new UART (this just changes UART number used for
+    // ets_printf in ROM code).
+    uart_tx_switch(uart_num);
+    // If console is attached to UART1 or if non-default pins are used,
+    // need to reconfigure pins using GPIO matrix
+    if (uart_num != 0 || uart_tx_gpio != 1 || uart_rx_gpio != 3) {
+        // Change pin mode for GPIO1/3 from UART to GPIO
+        PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0RXD_U, FUNC_U0RXD_GPIO3);
+        PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0TXD_U, FUNC_U0TXD_GPIO1);
+        // Route GPIO signals to/from pins
+        // (arrays should be optimized away by the compiler)
+        const uint32_t tx_idx_list[3] = { U0TXD_OUT_IDX, U1TXD_OUT_IDX, U2TXD_OUT_IDX };
+        const uint32_t rx_idx_list[3] = { U0RXD_IN_IDX, U1RXD_IN_IDX, U2RXD_IN_IDX };
+        const uint32_t uart_reset[3] = { DPORT_UART_RST, DPORT_UART1_RST, DPORT_UART2_RST };
+        const uint32_t tx_idx = tx_idx_list[uart_num];
+        const uint32_t rx_idx = rx_idx_list[uart_num];
+
+        PIN_INPUT_ENABLE(GPIO_PIN_MUX_REG[uart_rx_gpio]);
+        gpio_pad_pullup(uart_rx_gpio);
+
+        gpio_matrix_out(uart_tx_gpio, tx_idx, 0, 0);
+        gpio_matrix_in(uart_rx_gpio, rx_idx, 0);
+
+        DPORT_SET_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, uart_reset[uart_num]);
+        DPORT_CLEAR_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, uart_reset[uart_num]);
+    }
+#endif // CONFIG_CONSOLE_UART_CUSTOM
+
+    // Set configured UART console baud rate
+    const int uart_baud = CONFIG_CONSOLE_UART_BAUDRATE;
+    uart_div_modify(uart_num, (rtc_clk_apb_freq_get() << 4) / uart_baud);
+
+#endif // CONFIG_CONSOLE_UART_NONE
+}
+
+static void wdt_reset_cpu0_info_enable(void)
+{
+    //We do not reset core1 info here because it didn't work before cpu1 was up. So we put it into call_start_cpu1.
+    DPORT_REG_SET_BIT(DPORT_PRO_CPU_RECORD_CTRL_REG, DPORT_PRO_CPU_PDEBUG_ENABLE | DPORT_PRO_CPU_RECORD_ENABLE);
+    DPORT_REG_CLR_BIT(DPORT_PRO_CPU_RECORD_CTRL_REG, DPORT_PRO_CPU_RECORD_ENABLE);
+}
+
+static void wdt_reset_info_dump(int cpu)
+{
+    uint32_t inst = 0, pid = 0, stat = 0, data = 0, pc = 0,
+             lsstat = 0, lsaddr = 0, lsdata = 0, dstat = 0;
+    const char *cpu_name = cpu ? "APP" : "PRO";
+
+    if (cpu == 0) {
+        stat    = DPORT_REG_READ(DPORT_PRO_CPU_RECORD_STATUS_REG);
+        pid     = DPORT_REG_READ(DPORT_PRO_CPU_RECORD_PID_REG);
+        inst    = DPORT_REG_READ(DPORT_PRO_CPU_RECORD_PDEBUGINST_REG);
+        dstat   = DPORT_REG_READ(DPORT_PRO_CPU_RECORD_PDEBUGSTATUS_REG);
+        data    = DPORT_REG_READ(DPORT_PRO_CPU_RECORD_PDEBUGDATA_REG);
+        pc      = DPORT_REG_READ(DPORT_PRO_CPU_RECORD_PDEBUGPC_REG);
+        lsstat  = DPORT_REG_READ(DPORT_PRO_CPU_RECORD_PDEBUGLS0STAT_REG);
+        lsaddr  = DPORT_REG_READ(DPORT_PRO_CPU_RECORD_PDEBUGLS0ADDR_REG);
+        lsdata  = DPORT_REG_READ(DPORT_PRO_CPU_RECORD_PDEBUGLS0DATA_REG);
+
+    } else {
+        stat    = DPORT_REG_READ(DPORT_APP_CPU_RECORD_STATUS_REG);
+        pid     = DPORT_REG_READ(DPORT_APP_CPU_RECORD_PID_REG);
+        inst    = DPORT_REG_READ(DPORT_APP_CPU_RECORD_PDEBUGINST_REG);
+        dstat   = DPORT_REG_READ(DPORT_APP_CPU_RECORD_PDEBUGSTATUS_REG);
+        data    = DPORT_REG_READ(DPORT_APP_CPU_RECORD_PDEBUGDATA_REG);
+        pc      = DPORT_REG_READ(DPORT_APP_CPU_RECORD_PDEBUGPC_REG);
+        lsstat  = DPORT_REG_READ(DPORT_APP_CPU_RECORD_PDEBUGLS0STAT_REG);
+        lsaddr  = DPORT_REG_READ(DPORT_APP_CPU_RECORD_PDEBUGLS0ADDR_REG);
+        lsdata  = DPORT_REG_READ(DPORT_APP_CPU_RECORD_PDEBUGLS0DATA_REG);
+    }
+    if (DPORT_RECORD_PDEBUGINST_SZ(inst) == 0 &&
+        DPORT_RECORD_PDEBUGSTATUS_BBCAUSE(dstat) == DPORT_RECORD_PDEBUGSTATUS_BBCAUSE_WAITI) {
+        ESP_LOGW(TAG, "WDT reset info: %s CPU PC=0x%x (waiti mode)", cpu_name, pc);
+    } else {
+        ESP_LOGW(TAG, "WDT reset info: %s CPU PC=0x%x", cpu_name, pc);
+    }
+    ESP_LOGD(TAG, "WDT reset info: %s CPU STATUS        0x%08x", cpu_name, stat);
+    ESP_LOGD(TAG, "WDT reset info: %s CPU PID           0x%08x", cpu_name, pid);
+    ESP_LOGD(TAG, "WDT reset info: %s CPU PDEBUGINST    0x%08x", cpu_name, inst);
+    ESP_LOGD(TAG, "WDT reset info: %s CPU PDEBUGSTATUS  0x%08x", cpu_name, dstat);
+    ESP_LOGD(TAG, "WDT reset info: %s CPU PDEBUGDATA    0x%08x", cpu_name, data);
+    ESP_LOGD(TAG, "WDT reset info: %s CPU PDEBUGPC      0x%08x", cpu_name, pc);
+    ESP_LOGD(TAG, "WDT reset info: %s CPU PDEBUGLS0STAT 0x%08x", cpu_name, lsstat);
+    ESP_LOGD(TAG, "WDT reset info: %s CPU PDEBUGLS0ADDR 0x%08x", cpu_name, lsaddr);
+    ESP_LOGD(TAG, "WDT reset info: %s CPU PDEBUGLS0DATA 0x%08x", cpu_name, lsdata);
+}
+
+static void wdt_reset_check(void)
+{
+    int wdt_rst = 0;
+    RESET_REASON rst_reas[2];
+
+    rst_reas[0] = rtc_get_reset_reason(0);
+    rst_reas[1] = rtc_get_reset_reason(1);
+    if (rst_reas[0] == RTCWDT_SYS_RESET || rst_reas[0] == TG0WDT_SYS_RESET || rst_reas[0] == TG1WDT_SYS_RESET ||
+        rst_reas[0] == TGWDT_CPU_RESET  || rst_reas[0] == RTCWDT_CPU_RESET) {
+        ESP_LOGW(TAG, "PRO CPU has been reset by WDT.");
+        wdt_rst = 1;
+    }
+    if (rst_reas[1] == RTCWDT_SYS_RESET || rst_reas[1] == TG0WDT_SYS_RESET || rst_reas[1] == TG1WDT_SYS_RESET ||
+        rst_reas[1] == TGWDT_CPU_RESET  || rst_reas[1] == RTCWDT_CPU_RESET) {
+        ESP_LOGW(TAG, "APP CPU has been reset by WDT.");
+        wdt_rst = 1;
+    }
+    if (wdt_rst) {
+        // if reset by WDT dump info from trace port
+        wdt_reset_info_dump(0);
+        wdt_reset_info_dump(1);
+    }
+    wdt_reset_cpu0_info_enable();
+}
+
+void __assert_func(const char *file, int line, const char *func, const char *expr)
+{
+    ESP_LOGE(TAG, "Assert failed in %s, %s:%d (%s)", func, file, line, expr);
+    while(1) {}
+}

components/bootloader_support/src/bootloader_random.c

@@ -25,8 +25,6 @@
 #include "esp_system.h"
 #endif
 
-const char *TAG = "boot_rng";
-
 void bootloader_fill_random(void *buffer, size_t length)
 {
     uint8_t *buffer_bytes = (uint8_t *)buffer;

components/bootloader_support/src/bootloader_sha.c

@@ -0,0 +1,171 @@
+// Copyright 2017 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#include "bootloader_sha.h"
+#include <stdbool.h>
+#include <string.h>
+#include <assert.h>
+#include <sys/param.h>
+
+#ifndef BOOTLOADER_BUILD
+// App version is a wrapper around mbedTLS SHA API
+#include <mbedtls/sha256.h>
+
+bootloader_sha256_handle_t bootloader_sha256_start()
+{
+    mbedtls_sha256_context *ctx = (mbedtls_sha256_context *)malloc(sizeof(mbedtls_sha256_context));
+    if (!ctx) {
+        return NULL;
+    }
+    mbedtls_sha256_init(ctx);
+    int ret = mbedtls_sha256_starts_ret(ctx, false);
+    if (ret != 0) {
+        return NULL;
+    }
+    return ctx;
+}
+
+void bootloader_sha256_data(bootloader_sha256_handle_t handle, const void *data, size_t data_len)
+{
+    assert(handle != NULL);
+    mbedtls_sha256_context *ctx = (mbedtls_sha256_context *)handle;
+    int ret = mbedtls_sha256_update_ret(ctx, data, data_len);
+    assert(ret == 0);
+}
+
+void bootloader_sha256_finish(bootloader_sha256_handle_t handle, uint8_t *digest)
+{
+    assert(handle != NULL);
+    mbedtls_sha256_context *ctx = (mbedtls_sha256_context *)handle;
+    if (digest != NULL) {
+        int ret = mbedtls_sha256_finish_ret(ctx, digest);
+        assert(ret == 0);
+    }
+    mbedtls_sha256_free(ctx);
+    free(handle);
+}
+
+#else // Bootloader version
+
+#include "rom/sha.h"
+#include "soc/dport_reg.h"
+#include "soc/hwcrypto_reg.h"
+
+#include "rom/ets_sys.h" // TO REMOVE
+
+static uint32_t words_hashed;
+
+// Words per SHA256 block
+static const size_t BLOCK_WORDS = (64/sizeof(uint32_t));
+// Words in final SHA256 digest
+static const size_t DIGEST_WORDS = (32/sizeof(uint32_t));
+
+bootloader_sha256_handle_t bootloader_sha256_start()
+{
+    // Enable SHA hardware
+    ets_sha_enable();
+    words_hashed = 0;
+    return (bootloader_sha256_handle_t)&words_hashed; // Meaningless non-NULL value
+}
+
+void bootloader_sha256_data(bootloader_sha256_handle_t handle, const void *data, size_t data_len)
+{
+    assert(handle != NULL);
+    assert(data_len % 4 == 0);
+
+    const uint32_t *w = (const uint32_t *)data;
+    size_t word_len = data_len / 4;
+    uint32_t *sha_text_reg = (uint32_t *)(SHA_TEXT_BASE);
+
+    //ets_printf("word_len %d so far %d\n", word_len, words_hashed);
+    while (word_len > 0) {
+        size_t block_count = words_hashed % BLOCK_WORDS;
+        size_t copy_words = (BLOCK_WORDS - block_count);
+
+        copy_words = MIN(word_len, copy_words);
+
+        // Wait for SHA engine idle
+        while(REG_READ(SHA_256_BUSY_REG) != 0) { }
+
+        // Copy to memory block
+        //ets_printf("block_count %d copy_words %d\n", block_count, copy_words);
+        for (int i = 0; i < copy_words; i++) {
+            sha_text_reg[block_count + i] = __builtin_bswap32(w[i]);
+        }
+        asm volatile ("memw");
+
+        // Update counters
+        words_hashed += copy_words;
+        block_count += copy_words;
+        word_len -= copy_words;
+        w += copy_words;
+
+        // If we loaded a full block, run the SHA engine
+        if (block_count == BLOCK_WORDS) {
+            //ets_printf("running engine @ count %d\n", words_hashed);
+            if (words_hashed == BLOCK_WORDS) {
+                REG_WRITE(SHA_256_START_REG, 1);
+            } else {
+                REG_WRITE(SHA_256_CONTINUE_REG, 1);
+            }
+            block_count = 0;
+        }
+    }
+}
+
+void bootloader_sha256_finish(bootloader_sha256_handle_t handle, uint8_t *digest)
+{
+    assert(handle != NULL);
+
+    if (digest == NULL) {
+        return; // We'd free resources here, but there are none to free
+    }
+
+    uint32_t data_words = words_hashed;
+
+    // Pad to a 55 byte long block loaded in the engine
+    // (leaving 1 byte 0x80 plus variable padding plus 8 bytes of length,
+    // to fill a 64 byte block.)
+    int block_bytes = (words_hashed % BLOCK_WORDS) * 4;
+    int pad_bytes = 55 - block_bytes;
+    if (pad_bytes < 0) {
+        pad_bytes += 64;
+    }
+    static const uint8_t padding[64] = { 0x80, 0, };
+
+    pad_bytes += 5; // 1 byte for 0x80 plus first 4 bytes of the 64-bit length
+    assert(pad_bytes % 4 == 0); // should be, as (block_bytes % 4 == 0)
+
+    bootloader_sha256_data(handle, padding, pad_bytes);
+
+    assert(words_hashed % BLOCK_WORDS == 60/4); // 32-bits left in block
+
+    // Calculate 32-bit length for final 32 bits of data
+    uint32_t bit_count = __builtin_bswap32( data_words * 32 );
+    bootloader_sha256_data(handle, &bit_count, sizeof(bit_count));
+
+    assert(words_hashed % BLOCK_WORDS == 0);
+
+    while(REG_READ(SHA_256_BUSY_REG) == 1) { }
+    REG_WRITE(SHA_256_LOAD_REG, 1);
+    while(REG_READ(SHA_256_BUSY_REG) == 1) { }
+
+    uint32_t *digest_words = (uint32_t *)digest;
+    uint32_t *sha_text_reg = (uint32_t *)(SHA_TEXT_BASE);
+    for (int i = 0; i < DIGEST_WORDS; i++) {
+        digest_words[i] = __builtin_bswap32(sha_text_reg[i]);
+    }
+    asm volatile ("memw");
+}
+
+#endif

components/bootloader_support/src/bootloader_utility.c

@@ -0,0 +1,482 @@
+// Copyright 2018 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#include <string.h>
+#include <stdint.h>
+#include <limits.h>
+#include <sys/param.h>
+
+#include "esp_attr.h"
+#include "esp_log.h"
+
+#include "rom/cache.h"
+#include "rom/efuse.h"
+#include "rom/ets_sys.h"
+#include "rom/spi_flash.h"
+#include "rom/crc.h"
+#include "rom/rtc.h"
+#include "rom/uart.h"
+#include "rom/gpio.h"
+#include "rom/secure_boot.h"
+
+#include "soc/soc.h"
+#include "soc/cpu.h"
+#include "soc/rtc.h"
+#include "soc/dport_reg.h"
+#include "soc/io_mux_reg.h"
+#include "soc/efuse_reg.h"
+#include "soc/rtc_cntl_reg.h"
+#include "soc/timer_group_reg.h"
+#include "soc/gpio_reg.h"
+#include "soc/gpio_sig_map.h"
+
+#include "sdkconfig.h"
+#include "esp_image_format.h"
+#include "esp_secure_boot.h"
+#include "esp_flash_encrypt.h"
+#include "esp_flash_partitions.h"
+#include "bootloader_flash.h"
+#include "bootloader_random.h"
+#include "bootloader_config.h"
+#include "bootloader_common.h"
+
+static const char* TAG = "boot";
+
+/* Reduce literal size for some generic string literals */
+#define MAP_ERR_MSG "Image contains multiple %s segments. Only the last one will be mapped."
+
+static void load_image(const esp_image_metadata_t* image_data);
+static void unpack_load_app(const esp_image_metadata_t *data);
+static void set_cache_and_start_app(uint32_t drom_addr,
+    uint32_t drom_load_addr,
+    uint32_t drom_size,
+    uint32_t irom_addr,
+    uint32_t irom_load_addr,
+    uint32_t irom_size,
+    uint32_t entry_addr);
+
+bool bootloader_utility_load_partition_table(bootloader_state_t* bs)
+{
+    const esp_partition_info_t *partitions;
+    const char *partition_usage;
+    esp_err_t err;
+    int num_partitions;
+
+    partitions = bootloader_mmap(ESP_PARTITION_TABLE_OFFSET, ESP_PARTITION_TABLE_MAX_LEN);
+    if (!partitions) {
+        ESP_LOGE(TAG, "bootloader_mmap(0x%x, 0x%x) failed", ESP_PARTITION_TABLE_OFFSET, ESP_PARTITION_TABLE_MAX_LEN);
+        return false;
+    }
+    ESP_LOGD(TAG, "mapped partition table 0x%x at 0x%x", ESP_PARTITION_TABLE_OFFSET, (intptr_t)partitions);
+
+    err = esp_partition_table_verify(partitions, true, &num_partitions);
+    if (err != ESP_OK) {
+        ESP_LOGE(TAG, "Failed to verify partition table");
+        return false;
+    }
+
+    ESP_LOGI(TAG, "Partition Table:");
+    ESP_LOGI(TAG, "## Label            Usage          Type ST Offset   Length");
+
+    for(int i = 0; i < num_partitions; i++) {
+        const esp_partition_info_t *partition = &partitions[i];
+        ESP_LOGD(TAG, "load partition table entry 0x%x", (intptr_t)partition);
+        ESP_LOGD(TAG, "type=%x subtype=%x", partition->type, partition->subtype);
+        partition_usage = "unknown";
+
+        /* valid partition table */
+        switch(partition->type) {
+        case PART_TYPE_APP: /* app partition */
+            switch(partition->subtype) {
+            case PART_SUBTYPE_FACTORY: /* factory binary */
+                bs->factory = partition->pos;
+                partition_usage = "factory app";
+                break;
+            case PART_SUBTYPE_TEST: /* test binary */
+                bs->test = partition->pos;
+                partition_usage = "test app";
+                break;
+            default:
+                /* OTA binary */
+                if ((partition->subtype & ~PART_SUBTYPE_OTA_MASK) == PART_SUBTYPE_OTA_FLAG) {
+                    bs->ota[partition->subtype & PART_SUBTYPE_OTA_MASK] = partition->pos;
+                    ++bs->app_count;
+                    partition_usage = "OTA app";
+                }
+                else {
+                    partition_usage = "Unknown app";
+                }
+                break;
+            }
+            break; /* PART_TYPE_APP */
+        case PART_TYPE_DATA: /* data partition */
+            switch(partition->subtype) {
+            case PART_SUBTYPE_DATA_OTA: /* ota data */
+                bs->ota_info = partition->pos;
+                partition_usage = "OTA data";
+                break;
+            case PART_SUBTYPE_DATA_RF:
+                partition_usage = "RF data";
+                break;
+            case PART_SUBTYPE_DATA_WIFI:
+                partition_usage = "WiFi data";
+                break;
+            case PART_SUBTYPE_DATA_NVS_KEYS:
+                partition_usage = "NVS keys";
+                break;
+            default:
+                partition_usage = "Unknown data";
+                break;
+            }
+            break; /* PARTITION_USAGE_DATA */
+        default: /* other partition type */
+            break;
+        }
+
+        /* print partition type info */
+        ESP_LOGI(TAG, "%2d %-16s %-16s %02x %02x %08x %08x", i, partition->label, partition_usage,
+                 partition->type, partition->subtype,
+                 partition->pos.offset, partition->pos.size);
+    }
+
+    bootloader_munmap(partitions);
+
+    ESP_LOGI(TAG,"End of partition table");
+    return true;
+}
+
+/* Given a partition index, return the partition position data from the bootloader_state_t structure */
+static esp_partition_pos_t index_to_partition(const bootloader_state_t *bs, int index)
+{
+    if (index == FACTORY_INDEX) {
+        return bs->factory;
+    }
+
+    if (index == TEST_APP_INDEX) {
+        return bs->test;
+    }
+
+    if (index >= 0 && index < MAX_OTA_SLOTS && index < bs->app_count) {
+        return bs->ota[index];
+    }
+
+    esp_partition_pos_t invalid = { 0 };
+    return invalid;
+}
+
+static void log_invalid_app_partition(int index)
+{
+    const char *not_bootable = " is not bootable"; /* save a few string literal bytes */
+    switch(index) {
+    case FACTORY_INDEX:
+        ESP_LOGE(TAG, "Factory app partition%s", not_bootable);
+        break;
+    case TEST_APP_INDEX:
+        ESP_LOGE(TAG, "Factory test app partition%s", not_bootable);
+        break;
+    default:
+        ESP_LOGE(TAG, "OTA app partition slot %d%s", index, not_bootable);
+        break;
+    }
+}
+
+int bootloader_utility_get_selected_boot_partition(const bootloader_state_t *bs)
+{
+    esp_ota_select_entry_t sa,sb;
+    const esp_ota_select_entry_t *ota_select_map;
+
+    if (bs->ota_info.offset != 0) {
+        // partition table has OTA data partition
+        if (bs->ota_info.size < 2 * SPI_SEC_SIZE) {
+            ESP_LOGE(TAG, "ota_info partition size %d is too small (minimum %d bytes)", bs->ota_info.size, sizeof(esp_ota_select_entry_t));
+            return INVALID_INDEX; // can't proceed
+        }
+
+        ESP_LOGD(TAG, "OTA data offset 0x%x", bs->ota_info.offset);
+        ota_select_map = bootloader_mmap(bs->ota_info.offset, bs->ota_info.size);
+        if (!ota_select_map) {
+            ESP_LOGE(TAG, "bootloader_mmap(0x%x, 0x%x) failed", bs->ota_info.offset, bs->ota_info.size);
+            return INVALID_INDEX; // can't proceed
+        }
+        memcpy(&sa, ota_select_map, sizeof(esp_ota_select_entry_t));
+        memcpy(&sb, (uint8_t *)ota_select_map + SPI_SEC_SIZE, sizeof(esp_ota_select_entry_t));
+        bootloader_munmap(ota_select_map);
+
+        ESP_LOGD(TAG, "OTA sequence values A 0x%08x B 0x%08x", sa.ota_seq, sb.ota_seq);
+        if ((sa.ota_seq == UINT32_MAX && sb.ota_seq == UINT32_MAX) || (bs->app_count == 0)) {
+            ESP_LOGD(TAG, "OTA sequence numbers both empty (all-0xFF) or partition table does not have bootable ota_apps (app_count=%d)", bs->app_count);
+            if (bs->factory.offset != 0) {
+                ESP_LOGI(TAG, "Defaulting to factory image");
+                return FACTORY_INDEX;
+            } else {
+                ESP_LOGI(TAG, "No factory image, trying OTA 0");
+                return 0;
+            }
+        } else  {
+            bool ota_valid = false;
+            const char *ota_msg;
+            int ota_seq; // Raw OTA sequence number. May be more than # of OTA slots
+            if(bootloader_common_ota_select_valid(&sa) && bootloader_common_ota_select_valid(&sb)) {
+                ota_valid = true;
+                ota_msg = "Both OTA values";
+                ota_seq = MAX(sa.ota_seq, sb.ota_seq) - 1;
+            } else if(bootloader_common_ota_select_valid(&sa)) {
+                ota_valid = true;
+                ota_msg = "Only OTA sequence A is";
+                ota_seq = sa.ota_seq - 1;
+            } else if(bootloader_common_ota_select_valid(&sb)) {
+                ota_valid = true;
+                ota_msg = "Only OTA sequence B is";
+                ota_seq = sb.ota_seq - 1;
+            }
+
+            if (ota_valid) {
+                int ota_slot = ota_seq % bs->app_count; // Actual OTA partition selection
+                ESP_LOGD(TAG, "%s valid. Mapping seq %d -> OTA slot %d", ota_msg, ota_seq, ota_slot);
+                return ota_slot;
+            } else if (bs->factory.offset != 0) {
+                ESP_LOGE(TAG, "ota data partition invalid, falling back to factory");
+                return FACTORY_INDEX;
+            } else {
+                ESP_LOGE(TAG, "ota data partition invalid and no factory, will try all partitions");
+                return FACTORY_INDEX;
+            }
+        }
+    }
+
+    // otherwise, start from factory app partition and let the search logic
+    // proceed from there
+    return FACTORY_INDEX;
+}
+
+/* Return true if a partition has a valid app image that was successfully loaded */
+static bool try_load_partition(const esp_partition_pos_t *partition, esp_image_metadata_t *data)
+{
+    if (partition->size == 0) {
+        ESP_LOGD(TAG, "Can't boot from zero-length partition");
+        return false;
+    }
+#ifdef BOOTLOADER_BUILD
+    if (esp_image_load(ESP_IMAGE_LOAD, partition, data) == ESP_OK) {
+        ESP_LOGI(TAG, "Loaded app from partition at offset 0x%x",
+                 partition->offset);
+        return true;
+    }
+#endif
+
+    return false;
+}
+
+#define TRY_LOG_FORMAT "Trying partition index %d offs 0x%x size 0x%x"
+
+void bootloader_utility_load_boot_image(const bootloader_state_t *bs, int start_index)
+{
+    int index = start_index;
+    esp_partition_pos_t part;
+    esp_image_metadata_t image_data;
+
+    if(start_index == TEST_APP_INDEX) {
+        if (try_load_partition(&bs->test, &image_data)) {
+            load_image(&image_data);
+        } else {
+            ESP_LOGE(TAG, "No bootable test partition in the partition table");
+            return;
+        }
+    }
+
+    /* work backwards from start_index, down to the factory app */
+    for(index = start_index; index >= FACTORY_INDEX; index--) {
+        part = index_to_partition(bs, index);
+        if (part.size == 0) {
+            continue;
+        }
+        ESP_LOGD(TAG, TRY_LOG_FORMAT, index, part.offset, part.size);
+        if (try_load_partition(&part, &image_data)) {
+            load_image(&image_data);
+        }
+        log_invalid_app_partition(index);
+    }
+
+    /* failing that work forwards from start_index, try valid OTA slots */
+    for(index = start_index + 1; index < bs->app_count; index++) {
+        part = index_to_partition(bs, index);
+        if (part.size == 0) {
+            continue;
+        }
+        ESP_LOGD(TAG, TRY_LOG_FORMAT, index, part.offset, part.size);
+        if (try_load_partition(&part, &image_data)) {
+            load_image(&image_data);
+        }
+        log_invalid_app_partition(index);
+    }
+
+    if (try_load_partition(&bs->test, &image_data)) {
+        ESP_LOGW(TAG, "Falling back to test app as only bootable partition");
+        load_image(&image_data);
+    }
+
+    ESP_LOGE(TAG, "No bootable app partitions in the partition table");
+    bzero(&image_data, sizeof(esp_image_metadata_t));
+}
+
+// Copy loaded segments to RAM, set up caches for mapped segments, and start application.
+static void load_image(const esp_image_metadata_t* image_data)
+{
+#if defined(CONFIG_SECURE_BOOT_ENABLED) || defined(CONFIG_FLASH_ENCRYPTION_ENABLED)
+    esp_err_t err;
+#endif
+#ifdef CONFIG_SECURE_BOOT_ENABLED
+    /* Generate secure digest from this bootloader to protect future
+       modifications */
+    ESP_LOGI(TAG, "Checking secure boot...");
+    err = esp_secure_boot_permanently_enable();
+    if (err != ESP_OK) {
+        ESP_LOGE(TAG, "Bootloader digest generation failed (%d). SECURE BOOT IS NOT ENABLED.", err);
+        /* Allow booting to continue, as the failure is probably
+           due to user-configured EFUSEs for testing...
+        */
+    }
+#endif
+
+#ifdef CONFIG_FLASH_ENCRYPTION_ENABLED
+    /* encrypt flash */
+    ESP_LOGI(TAG, "Checking flash encryption...");
+    bool flash_encryption_enabled = esp_flash_encryption_enabled();
+    err = esp_flash_encrypt_check_and_update();
+    if (err != ESP_OK) {
+        ESP_LOGE(TAG, "Flash encryption check failed (%d).", err);
+        return;
+    }
+
+    if (!flash_encryption_enabled && esp_flash_encryption_enabled()) {
+        /* Flash encryption was just enabled for the first time,
+           so issue a system reset to ensure flash encryption
+           cache resets properly */
+        ESP_LOGI(TAG, "Resetting with flash encryption enabled...");
+        REG_WRITE(RTC_CNTL_OPTIONS0_REG, RTC_CNTL_SW_SYS_RST);
+        return;
+    }
+#endif
+
+    ESP_LOGI(TAG, "Disabling RNG early entropy source...");
+    bootloader_random_disable();
+
+    // copy loaded segments to RAM, set up caches for mapped segments, and start application
+    unpack_load_app(image_data);
+}
+
+static void unpack_load_app(const esp_image_metadata_t* data)
+{
+    uint32_t drom_addr = 0;
+    uint32_t drom_load_addr = 0;
+    uint32_t drom_size = 0;
+    uint32_t irom_addr = 0;
+    uint32_t irom_load_addr = 0;
+    uint32_t irom_size = 0;
+
+    // Find DROM & IROM addresses, to configure cache mappings
+    for (int i = 0; i < data->image.segment_count; i++) {
+        const esp_image_segment_header_t *header = &data->segments[i];
+        if (header->load_addr >= SOC_DROM_LOW && header->load_addr < SOC_DROM_HIGH) {
+            if (drom_addr != 0) {
+                ESP_LOGE(TAG, MAP_ERR_MSG, "DROM");
+            } else {
+                ESP_LOGD(TAG, "Mapping segment %d as %s", i, "DROM");
+            }
+            drom_addr = data->segment_data[i];
+            drom_load_addr = header->load_addr;
+            drom_size = header->data_len;
+        }
+        if (header->load_addr >= SOC_IROM_LOW && header->load_addr < SOC_IROM_HIGH) {
+            if (irom_addr != 0) {
+                ESP_LOGE(TAG, MAP_ERR_MSG, "IROM");
+            } else {
+                ESP_LOGD(TAG, "Mapping segment %d as %s", i, "IROM");
+            }
+            irom_addr = data->segment_data[i];
+            irom_load_addr = header->load_addr;
+            irom_size = header->data_len;
+        }
+    }
+
+    ESP_LOGD(TAG, "calling set_cache_and_start_app");
+    set_cache_and_start_app(drom_addr,
+        drom_load_addr,
+        drom_size,
+        irom_addr,
+        irom_load_addr,
+        irom_size,
+        data->image.entry_addr);
+}
+
+static void set_cache_and_start_app(
+    uint32_t drom_addr,
+    uint32_t drom_load_addr,
+    uint32_t drom_size,
+    uint32_t irom_addr,
+    uint32_t irom_load_addr,
+    uint32_t irom_size,
+    uint32_t entry_addr)
+{
+    int rc;
+    ESP_LOGD(TAG, "configure drom and irom and start");
+    Cache_Read_Disable( 0 );
+    Cache_Flush( 0 );
+
+    /* Clear the MMU entries that are already set up,
+       so the new app only has the mappings it creates.
+    */
+    for (int i = 0; i < DPORT_FLASH_MMU_TABLE_SIZE; i++) {
+        DPORT_PRO_FLASH_MMU_TABLE[i] = DPORT_FLASH_MMU_TABLE_INVALID_VAL;
+    }
+
+    uint32_t drom_load_addr_aligned = drom_load_addr & MMU_FLASH_MASK;
+    uint32_t drom_page_count = bootloader_cache_pages_to_map(drom_size, drom_load_addr);
+    ESP_LOGV(TAG, "d mmu set paddr=%08x vaddr=%08x size=%d n=%d",
+            drom_addr & MMU_FLASH_MASK, drom_load_addr_aligned, drom_size, drom_page_count);
+    rc = cache_flash_mmu_set(0, 0, drom_load_addr_aligned, drom_addr & MMU_FLASH_MASK, 64, drom_page_count);
+    ESP_LOGV(TAG, "rc=%d", rc);
+    rc = cache_flash_mmu_set(1, 0, drom_load_addr_aligned, drom_addr & MMU_FLASH_MASK, 64, drom_page_count);
+    ESP_LOGV(TAG, "rc=%d", rc);
+
+    uint32_t irom_load_addr_aligned = irom_load_addr & MMU_FLASH_MASK;
+    uint32_t irom_page_count = bootloader_cache_pages_to_map(irom_size, irom_load_addr);
+    ESP_LOGV(TAG, "i mmu set paddr=%08x vaddr=%08x size=%d n=%d",
+            irom_addr & MMU_FLASH_MASK, irom_load_addr_aligned, irom_size, irom_page_count);
+    rc = cache_flash_mmu_set(0, 0, irom_load_addr_aligned, irom_addr & MMU_FLASH_MASK, 64, irom_page_count);
+    ESP_LOGV(TAG, "rc=%d", rc);
+    rc = cache_flash_mmu_set(1, 0, irom_load_addr_aligned, irom_addr & MMU_FLASH_MASK, 64, irom_page_count);
+    ESP_LOGV(TAG, "rc=%d", rc);
+
+    DPORT_REG_CLR_BIT( DPORT_PRO_CACHE_CTRL1_REG,
+            (DPORT_PRO_CACHE_MASK_IRAM0) | (DPORT_PRO_CACHE_MASK_IRAM1 & 0) |
+            (DPORT_PRO_CACHE_MASK_IROM0 & 0) | DPORT_PRO_CACHE_MASK_DROM0 |
+            DPORT_PRO_CACHE_MASK_DRAM1 );
+
+    DPORT_REG_CLR_BIT( DPORT_APP_CACHE_CTRL1_REG,
+            (DPORT_APP_CACHE_MASK_IRAM0) | (DPORT_APP_CACHE_MASK_IRAM1 & 0) |
+            (DPORT_APP_CACHE_MASK_IROM0 & 0) | DPORT_APP_CACHE_MASK_DROM0 |
+            DPORT_APP_CACHE_MASK_DRAM1 );
+
+    Cache_Read_Enable( 0 );
+
+    // Application will need to do Cache_Flush(1) and Cache_Read_Enable(1)
+
+    ESP_LOGD(TAG, "start: 0x%08x", entry_addr);
+    typedef void (*entry_t)(void) __attribute__((noreturn));
+    entry_t entry = ((entry_t) entry_addr);
+
+    // TODO: we have used quite a bit of stack at this point.
+    // use "movsp" instruction to reset stack back to where ROM stack starts.
+    (*entry)();
+}

components/bootloader_support/src/efuse.c

@@ -12,6 +12,9 @@
 // See the License for the specific language governing permissions and
 // limitations under the License.
 #include "esp_efuse.h"
+#include "esp_log.h"
+#include <string.h>
+#include "bootloader_random.h"
 
 #define EFUSE_CONF_WRITE 0x5A5A /* efuse_pgm_op_ena, force no rd/wr disable */
 #define EFUSE_CONF_READ 0x5AA5 /* efuse_read_op_ena, release force */
@@ -19,6 +22,8 @@
 #define EFUSE_CMD_PGM 0x02
 #define EFUSE_CMD_READ 0x01
 
+static const char *TAG = "efuse";
+
 void esp_efuse_burn_new_values(void)
 {
     REG_WRITE(EFUSE_CONF_REG, EFUSE_CONF_WRITE);
@@ -45,3 +50,65 @@ void esp_efuse_reset(void)
       }
     }
 }
+
+void esp_efuse_disable_basic_rom_console(void)
+{
+    if ((REG_READ(EFUSE_BLK0_RDATA6_REG) & EFUSE_RD_CONSOLE_DEBUG_DISABLE) == 0) {
+        ESP_EARLY_LOGI(TAG, "Disable BASIC ROM Console fallback via efuse...");
+        esp_efuse_reset();
+        REG_WRITE(EFUSE_BLK0_WDATA6_REG, EFUSE_RD_CONSOLE_DEBUG_DISABLE);
+        esp_efuse_burn_new_values();
+    }
+}
+
+esp_err_t esp_efuse_apply_34_encoding(const uint8_t *in_bytes, uint32_t *out_words, size_t in_bytes_len)
+{
+    if (in_bytes == NULL || out_words == NULL || in_bytes_len % 6 != 0) {
+        return ESP_ERR_INVALID_ARG;
+    }
+
+    while (in_bytes_len > 0) {
+        uint8_t out[8];
+        uint8_t xor = 0;
+        uint8_t mul = 0;
+        for (int i = 0; i < 6; i++) {
+            xor ^= in_bytes[i];
+            mul += (i + 1) * __builtin_popcount(in_bytes[i]);
+        }
+
+        memcpy(out, in_bytes, 6); // Data bytes
+        out[6] = xor;
+        out[7] = mul;
+
+        memcpy(out_words, out, 8);
+
+        in_bytes_len -= 6;
+        in_bytes += 6;
+        out_words += 2;
+    }
+
+    return ESP_OK;
+}
+
+void esp_efuse_write_random_key(uint32_t blk_wdata0_reg)
+{
+    uint32_t buf[8];
+    uint8_t raw[24];
+    uint32_t coding_scheme = REG_READ(EFUSE_BLK0_RDATA6_REG) & EFUSE_CODING_SCHEME_M;
+
+    if (coding_scheme == EFUSE_CODING_SCHEME_VAL_NONE) {
+        bootloader_fill_random(buf, sizeof(buf));
+    } else { // 3/4 Coding Scheme
+        bootloader_fill_random(raw, sizeof(raw));
+        esp_err_t r = esp_efuse_apply_34_encoding(raw, buf, sizeof(raw));
+        assert(r == ESP_OK);
+    }
+
+    ESP_LOGV(TAG, "Writing random values to address 0x%08x", blk_wdata0_reg);
+    for (int i = 0; i < 8; i++) {
+        ESP_LOGV(TAG, "EFUSE_BLKx_WDATA%d_REG = 0x%08x", i, buf[i]);
+        REG_WRITE(blk_wdata0_reg + 4*i, buf[i]);
+    }
+    bzero(buf, sizeof(buf));
+    bzero(raw, sizeof(raw));
+}

components/bootloader_support/src/esp_image_format.c

@@ -12,178 +12,615 @@
 // See the License for the specific language governing permissions and
 // limitations under the License.
 #include <string.h>
+#include <sys/param.h>
 
+#include <rom/rtc.h>
+#include <soc/cpu.h>
 #include <esp_image_format.h>
+#include <esp_secure_boot.h>
 #include <esp_log.h>
+#include <esp_spi_flash.h>
 #include <bootloader_flash.h>
+#include <bootloader_random.h>
+#include <bootloader_sha.h>
+#include "bootloader_util.h"
+
+/* Checking signatures as part of verifying images is necessary:
+   - Always if secure boot is enabled
+   - Differently in bootloader and/or app, depending on kconfig
+*/
+#ifdef BOOTLOADER_BUILD
+#ifdef CONFIG_SECURE_SIGNED_ON_BOOT
+#define SECURE_BOOT_CHECK_SIGNATURE
+#endif
+#else /* !BOOTLOADER_BUILD */
+#ifdef CONFIG_SECURE_SIGNED_ON_UPDATE
+#define SECURE_BOOT_CHECK_SIGNATURE
+#endif
+#endif
 
 static const char *TAG = "esp_image";
 
+#define HASH_LEN ESP_IMAGE_HASH_LEN
+
 #define SIXTEEN_MB 0x1000000
 #define ESP_ROM_CHECKSUM_INITIAL 0xEF
 
-esp_err_t esp_image_load_header(uint32_t src_addr, bool log_errors, esp_image_header_t *image_header)
-{
-    esp_err_t err;
-    ESP_LOGD(TAG, "reading image header @ 0x%x", src_addr);
-
-    err = bootloader_flash_read(src_addr, image_header, sizeof(esp_image_header_t), true);
-
-    if (err == ESP_OK) {
-        if (image_header->magic != ESP_IMAGE_HEADER_MAGIC) {
-            if (log_errors) {
-                ESP_LOGE(TAG, "image at 0x%x has invalid magic byte", src_addr);
-            }
-            err = ESP_ERR_IMAGE_INVALID;
-        }
-        if (log_errors) {
-            if (image_header->spi_mode > ESP_IMAGE_SPI_MODE_SLOW_READ) {
-                ESP_LOGW(TAG, "image at 0x%x has invalid SPI mode %d", src_addr, image_header->spi_mode);
-            }
-            if (image_header->spi_speed > ESP_IMAGE_SPI_SPEED_80M) {
-                ESP_LOGW(TAG, "image at 0x%x has invalid SPI speed %d", src_addr, image_header->spi_speed);
-            }
-            if (image_header->spi_size > ESP_IMAGE_FLASH_SIZE_MAX) {
-                ESP_LOGW(TAG, "image at 0x%x has invalid SPI size %d", src_addr, image_header->spi_size);
-            }
-        }
-    }
-
-    if (err != ESP_OK) {
-        bzero(image_header, sizeof(esp_image_header_t));
-    }
-    return err;
-}
-
-esp_err_t esp_image_load_segment_header(uint8_t index, uint32_t src_addr, const esp_image_header_t *image_header, bool log_errors, esp_image_segment_header_t *segment_header, uint32_t *segment_data_offset)
+/* Headroom to ensure between stack SP (at time of checking) and data loaded from flash */
+#define STACK_LOAD_HEADROOM 32768
+
+/* Mmap source address mask */
+#define MMAP_ALIGNED_MASK 0x0000FFFF
+
+#ifdef BOOTLOADER_BUILD
+/* 64 bits of random data to obfuscate loaded RAM with, until verification is complete
+   (Means loaded code isn't executable until after the secure boot check.)
+*/
+static uint32_t ram_obfs_value[2];
+
+/* Range of IRAM used by the loader, defined in ld script */
+extern int _loader_text_start;
+extern int _loader_text_end;
+#endif
+
+/* Return true if load_addr is an address the bootloader should load into */
+static bool should_load(uint32_t load_addr);
+/* Return true if load_addr is an address the bootloader should map via flash cache */
+static bool should_map(uint32_t load_addr);
+
+/* Load or verify a segment */
+static esp_err_t process_segment(int index, uint32_t flash_addr, esp_image_segment_header_t *header, bool silent, bool do_load, bootloader_sha256_handle_t sha_handle, uint32_t *checksum);
+
+/* split segment and verify if data_len is too long */
+static esp_err_t process_segment_data(intptr_t load_addr, uint32_t data_addr, uint32_t data_len, bool do_load, bootloader_sha256_handle_t sha_handle, uint32_t *checksum);
+
+/* Verify the main image header */
+static esp_err_t verify_image_header(uint32_t src_addr, const esp_image_header_t *image, bool silent);
+
+/* Verify a segment header */
+static esp_err_t verify_segment_header(int index, const esp_image_segment_header_t *segment, uint32_t segment_data_offs, bool silent);
+
+/* Log-and-fail macro for use in esp_image_load */
+#define FAIL_LOAD(...) do {                         \
+        if (!silent) {                              \
+            ESP_LOGE(TAG, __VA_ARGS__);             \
+        }                                           \
+        goto err;                                   \
+    }                                               \
+    while(0)
+
+static esp_err_t verify_checksum(bootloader_sha256_handle_t sha_handle, uint32_t checksum_word, esp_image_metadata_t *data);
+
+static esp_err_t __attribute__((unused)) verify_secure_boot_signature(bootloader_sha256_handle_t sha_handle, esp_image_metadata_t *data);
+static esp_err_t __attribute__((unused)) verify_simple_hash(bootloader_sha256_handle_t sha_handle, esp_image_metadata_t *data);
+
+esp_err_t esp_image_load(esp_image_load_mode_t mode, const esp_partition_pos_t *part, esp_image_metadata_t *data)
 {
+#ifdef BOOTLOADER_BUILD
+    bool do_load = (mode == ESP_IMAGE_LOAD);
+#else
+    bool do_load = false; // Can't load the image in app mode
+#endif
+    bool silent = (mode == ESP_IMAGE_VERIFY_SILENT);
     esp_err_t err = ESP_OK;
-    uint32_t next_addr = src_addr + sizeof(esp_image_header_t);
+    // checksum the image a word at a time. This shaves 30-40ms per MB of image size
+    uint32_t checksum_word = ESP_ROM_CHECKSUM_INITIAL;
+    bootloader_sha256_handle_t sha_handle = NULL;
 
-    if(index >= image_header->segment_count) {
-        if (log_errors) {
-            ESP_LOGE(TAG, "index %d higher than segment count %d", index, image_header->segment_count);
-        }
+    if (data == NULL || part == NULL) {
         return ESP_ERR_INVALID_ARG;
     }
 
-    for(int i = 0; i <= index && err == ESP_OK; i++) {
+    if (part->size > SIXTEEN_MB) {
+        err = ESP_ERR_INVALID_ARG;
+        FAIL_LOAD("partition size 0x%x invalid, larger than 16MB", part->size);
+    }
+
+    bzero(data, sizeof(esp_image_metadata_t));
+    data->start_addr = part->offset;
+
+    ESP_LOGD(TAG, "reading image header @ 0x%x", data->start_addr);
+    err = bootloader_flash_read(data->start_addr, &data->image, sizeof(esp_image_header_t), true);
+    if (err != ESP_OK) {
+        goto err;
+    }
+
+    // Calculate SHA-256 of image if secure boot is on, or if image has a hash appended
+#ifdef SECURE_BOOT_CHECK_SIGNATURE
+    if (1) {
+#else
+    if (data->image.hash_appended) {
+#endif
+        sha_handle = bootloader_sha256_start();
+        if (sha_handle == NULL) {
+            return ESP_ERR_NO_MEM;
+        }
+        bootloader_sha256_data(sha_handle, &data->image, sizeof(esp_image_header_t));
+    }
+
+    ESP_LOGD(TAG, "image header: 0x%02x 0x%02x 0x%02x 0x%02x %08x",
+             data->image.magic,
+             data->image.segment_count,
+             data->image.spi_mode,
+             data->image.spi_size,
+             data->image.entry_addr);
+
+    err = verify_image_header(data->start_addr, &data->image, silent);
+    if (err != ESP_OK) {
+goto err;
+    }
+
+    if (data->image.segment_count > ESP_IMAGE_MAX_SEGMENTS) {
+        FAIL_LOAD("image at 0x%x segment count %d exceeds max %d",
+                  data->start_addr, data->image.segment_count, ESP_IMAGE_MAX_SEGMENTS);
+    }
+
+    uint32_t next_addr = data->start_addr + sizeof(esp_image_header_t);
+    for(int i = 0; i < data->image.segment_count; i++) {
+        esp_image_segment_header_t *header = &data->segments[i];
         ESP_LOGV(TAG, "loading segment header %d at offset 0x%x", i, next_addr);
-        err = bootloader_flash_read(next_addr, segment_header, sizeof(esp_image_segment_header_t), true);
-        if (err == ESP_OK) {
-            if ((segment_header->data_len & 3) != 0
-                || segment_header->data_len >= SIXTEEN_MB) {
-                if (log_errors) {
-                    ESP_LOGE(TAG, "invalid segment length 0x%x", segment_header->data_len);
-                }
-                err = ESP_ERR_IMAGE_INVALID;
-            }
-            next_addr += sizeof(esp_image_segment_header_t);
-            ESP_LOGV(TAG, "segment data length 0x%x data starts 0x%x", segment_header->data_len, next_addr);
-            *segment_data_offset = next_addr;
-            next_addr += segment_header->data_len;
+        err = process_segment(i, next_addr, header, silent, do_load, sha_handle, &checksum_word);
+        if (err != ESP_OK) {
+            goto err;
+        }
+        next_addr += sizeof(esp_image_segment_header_t);
+        data->segment_data[i] = next_addr;
+        next_addr += header->data_len;
+    }
+
+    // Segments all loaded, verify length
+    uint32_t end_addr = next_addr;
+    if (end_addr < data->start_addr) {
+        FAIL_LOAD("image offset has wrapped");
+    }
+
+    data->image_len = end_addr - data->start_addr;
+    ESP_LOGV(TAG, "image start 0x%08x end of last section 0x%08x", data->start_addr, end_addr);
+    if (!esp_cpu_in_ocd_debug_mode()) {
+        err = verify_checksum(sha_handle, checksum_word, data);
+        if (err != ESP_OK) {
+            goto err;
         }
     }
-
-    if (err != ESP_OK) {
-        *segment_data_offset = 0;
-        bzero(segment_header, sizeof(esp_image_segment_header_t));
+    if (data->image_len > part->size) {
+        FAIL_LOAD("Image length %d doesn't fit in partition length %d", data->image_len, part->size);
     }
 
+    bool is_bootloader = (data->start_addr == ESP_BOOTLOADER_OFFSET);
+    /* For secure boot, we don't verify signature on bootloaders.
+
+       For non-secure boot, we don't verify any SHA-256 hash appended to the bootloader because esptool.py may have
+       rewritten the header - rely on esptool.py having verified the bootloader at flashing time, instead.
+    */
+    if (!is_bootloader) {
+#ifdef SECURE_BOOT_CHECK_SIGNATURE
+        // secure boot images have a signature appended
+        err = verify_secure_boot_signature(sha_handle, data);
+#else
+        // No secure boot, but SHA-256 can be appended for basic corruption detection
+        if (sha_handle != NULL && !esp_cpu_in_ocd_debug_mode()) {
+            err = verify_simple_hash(sha_handle, data);
+        }
+#endif // SECURE_BOOT_CHECK_SIGNATURE
+    } else { // is_bootloader
+        // bootloader may still have a sha256 digest handle open
+        if (sha_handle != NULL) {
+            bootloader_sha256_finish(sha_handle, NULL);
+        }
+    }
+    sha_handle = NULL;
+    if (err != ESP_OK) {
+        goto err;
+    }
+
+#ifdef BOOTLOADER_BUILD
+    if (do_load) { // Need to deobfuscate RAM
+        for (int i = 0; i < data->image.segment_count; i++) {
+            uint32_t load_addr = data->segments[i].load_addr;
+            if (should_load(load_addr)) {
+                uint32_t *loaded = (uint32_t *)load_addr;
+                for (int j = 0; j < data->segments[i].data_len/sizeof(uint32_t); j++) {
+                    loaded[j] ^= (j & 1) ? ram_obfs_value[0] : ram_obfs_value[1];
+                }
+            }
+        }
+    }
+#endif
+
+    // Success!
+    return ESP_OK;
+
+ err:
+    if (err == ESP_OK) {
+      err = ESP_ERR_IMAGE_INVALID;
+    }
+    if (sha_handle != NULL) {
+        // Need to finish the hash process to free the handle
+        bootloader_sha256_finish(sha_handle, NULL);
+    }
+    // Prevent invalid/incomplete data leaking out
+    bzero(data, sizeof(esp_image_metadata_t));
     return err;
 }
 
-esp_err_t esp_image_basic_verify(uint32_t src_addr, bool log_errors, uint32_t *p_length)
+static esp_err_t verify_image_header(uint32_t src_addr, const esp_image_header_t *image, bool silent)
+{
+    esp_err_t err = ESP_OK;
+
+    if (image->magic != ESP_IMAGE_HEADER_MAGIC) {
+        if (!silent) {
+            ESP_LOGE(TAG, "image at 0x%x has invalid magic byte", src_addr);
+        }
+        err = ESP_ERR_IMAGE_INVALID;
+    }
+    if (!silent) {
+        if (image->spi_mode > ESP_IMAGE_SPI_MODE_SLOW_READ) {
+            ESP_LOGW(TAG, "image at 0x%x has invalid SPI mode %d", src_addr, image->spi_mode);
+        }
+        if (image->spi_speed > ESP_IMAGE_SPI_SPEED_80M) {
+            ESP_LOGW(TAG, "image at 0x%x has invalid SPI speed %d", src_addr, image->spi_speed);
+        }
+        if (image->spi_size > ESP_IMAGE_FLASH_SIZE_MAX) {
+            ESP_LOGW(TAG, "image at 0x%x has invalid SPI size %d", src_addr, image->spi_size);
+        }
+    }
+    return err;
+}
+
+static esp_err_t process_segment(int index, uint32_t flash_addr, esp_image_segment_header_t *header, bool silent, bool do_load, bootloader_sha256_handle_t sha_handle, uint32_t *checksum)
 {
     esp_err_t err;
-    uint8_t buf[128];
-    uint8_t checksum = ESP_ROM_CHECKSUM_INITIAL;
-    esp_image_header_t image_header;
-    esp_image_segment_header_t segment_header = { 0 };
-    uint32_t segment_data_offs = 0;
-    uint32_t end_addr;
-    uint32_t length;
 
-    if (p_length != NULL) {
-        *p_length = 0;
+    /* read segment header */
+    err = bootloader_flash_read(flash_addr, header, sizeof(esp_image_segment_header_t), true);
+    if (err != ESP_OK) {
+        ESP_LOGE(TAG, "bootloader_flash_read failed at 0x%08x", flash_addr);
+        return err;
+    }
+    if (sha_handle != NULL) {
+        bootloader_sha256_data(sha_handle, header, sizeof(esp_image_segment_header_t));
     }
 
-    err = esp_image_load_header(src_addr, log_errors, &image_header);
+    intptr_t load_addr = header->load_addr;
+    uint32_t data_len = header->data_len;
+    uint32_t data_addr = flash_addr + sizeof(esp_image_segment_header_t);
+
+    ESP_LOGV(TAG, "segment data length 0x%x data starts 0x%x", data_len, data_addr);
+
+    err = verify_segment_header(index, header, data_addr, silent);
     if (err != ESP_OK) {
         return err;
     }
 
-    ESP_LOGD(TAG, "reading %d image segments", image_header.segment_count);
+    if (data_len % 4 != 0) {
+        FAIL_LOAD("unaligned segment length 0x%x", data_len);
+    }
 
-    /* Checksum each segment's data */
-    for (int i = 0; i < image_header.segment_count; i++) {
-        err = esp_image_load_segment_header(i, src_addr, &image_header, log_errors,
-                                      &segment_header, &segment_data_offs);
+    bool is_mapping = should_map(load_addr);
+    do_load = do_load && should_load(load_addr);
+
+    if (!silent) {
+        ESP_LOGI(TAG, "segment %d: paddr=0x%08x vaddr=0x%08x size=0x%05x (%6d) %s",
+                 index, data_addr, load_addr,
+                 data_len, data_len,
+                 (do_load)?"load":(is_mapping)?"map":"");
+    }
+
+
+#ifdef BOOTLOADER_BUILD
+    /* Before loading segment, check it doesn't clobber bootloader RAM. */
+    if (do_load) {
+        const intptr_t load_end = load_addr + data_len;
+        if (load_end <= (intptr_t) SOC_DIRAM_DRAM_HIGH) {
+            /* Writing to DRAM */
+            intptr_t sp = (intptr_t)get_sp();
+            if (load_end > sp - STACK_LOAD_HEADROOM) {
+                /* Bootloader .data/.rodata/.bss is above the stack, so this
+                 * also checks that we aren't overwriting these segments.
+                 *
+                 * TODO: This assumes specific arrangement of sections we have
+                 * in the ESP32. Rewrite this in a generic way to support other
+                 * layouts.
+                 */
+                ESP_LOGE(TAG, "Segment %d end address 0x%08x too high (bootloader stack 0x%08x limit 0x%08x)",
+                         index, load_end, sp, sp - STACK_LOAD_HEADROOM);
+                return ESP_ERR_IMAGE_INVALID;
+            }
+        } else {
+            /* Writing to IRAM */
+            const intptr_t loader_iram_start = (intptr_t) &_loader_text_start;
+            const intptr_t loader_iram_end = (intptr_t) &_loader_text_end;
+
+            if (bootloader_util_regions_overlap(loader_iram_start, loader_iram_end,
+                    load_addr, load_end)) {
+                ESP_LOGE(TAG, "Segment %d (0x%08x-0x%08x) overlaps bootloader IRAM (0x%08x-0x%08x)",
+                         index, load_addr, load_end, loader_iram_start, loader_iram_end);
+                return ESP_ERR_IMAGE_INVALID;
+            }
+        }
+    }
+#endif // BOOTLOADER_BUILD
+
+#ifndef BOOTLOADER_BUILD
+    uint32_t free_page_count = spi_flash_mmap_get_free_pages(SPI_FLASH_MMAP_DATA);
+    ESP_LOGD(TAG, "free data page_count 0x%08x",free_page_count);
+    uint32_t offset_page = 0;
+    while (data_len >= free_page_count * SPI_FLASH_MMU_PAGE_SIZE) {
+        offset_page = ((data_addr & MMAP_ALIGNED_MASK) != 0)?1:0;
+        err = process_segment_data(load_addr, data_addr, (free_page_count - offset_page) * SPI_FLASH_MMU_PAGE_SIZE, do_load, sha_handle, checksum);
         if (err != ESP_OK) {
             return err;
         }
-
-        uint32_t load_addr = segment_header.load_addr;
-        bool map_segment = (load_addr >= SOC_DROM_LOW && load_addr < SOC_DROM_HIGH)
-            || (load_addr >= SOC_IROM_LOW && load_addr < SOC_IROM_HIGH);
-
-
-        /* Check that flash cache mapped segment aligns correctly from flash it's mapped address,
-           relative to the 64KB page mapping size.
-        */
-        ESP_LOGV(TAG, "segment %d map_segment %d segment_data_offs 0x%x load_addr 0x%x",
-                 i, map_segment, segment_data_offs, load_addr);
-        if (map_segment && ((segment_data_offs % SPI_FLASH_MMU_PAGE_SIZE) != (load_addr % SPI_FLASH_MMU_PAGE_SIZE))) {
-            ESP_LOGE(TAG, "Segment %d has load address 0x%08x, conflict with segment data at 0x%08x",
-                     i, load_addr, segment_data_offs);
-        }
-
-        for (int i = 0; i < segment_header.data_len; i += sizeof(buf)) {
-            err = bootloader_flash_read(segment_data_offs + i, buf, sizeof(buf), true);
-            if (err != ESP_OK) {
-                return err;
-            }
-            for (int j = 0; j < sizeof(buf) && i + j < segment_header.data_len; j++) {
-                checksum ^= buf[j];
-            }
-        }
+        data_addr += (free_page_count - offset_page) * SPI_FLASH_MMU_PAGE_SIZE;
+        data_len -= (free_page_count - offset_page) * SPI_FLASH_MMU_PAGE_SIZE;
     }
-
-    /* End of image, verify checksum */
-    end_addr = segment_data_offs + segment_header.data_len;
-
-    if (end_addr < src_addr) {
-        if (log_errors) {
-            ESP_LOGE(TAG, "image offset has wrapped");
-        }
-        return ESP_ERR_IMAGE_INVALID;
-    }
-
-    length = end_addr - src_addr;
-    if (length >= SIXTEEN_MB) {
-        if (log_errors) {
-            ESP_LOGE(TAG, "invalid total length 0x%x", length);
-        }
-        return ESP_ERR_IMAGE_INVALID;
-    }
-
-    /* image padded to next full 16 byte block, with checksum byte at very end */
-    ESP_LOGV(TAG, "unpadded image length 0x%x", length);
-    length += 16; /* always pad by at least 1 byte */
-    length = length - (length % 16);
-    ESP_LOGV(TAG, "padded image length 0x%x", length);
-    ESP_LOGD(TAG, "reading checksum block at 0x%x", src_addr + length - 16);
-    bootloader_flash_read(src_addr + length - 16, buf, 16, true);
-    if (checksum != buf[15]) {
-        if (log_errors) {
-            ESP_LOGE(TAG, "checksum failed. Calculated 0x%x read 0x%x",
-                     checksum, buf[15]);
-        }
-        return ESP_ERR_IMAGE_INVALID;
-    }
-
-    if (p_length != NULL) {
-        *p_length = length;
+#endif
+    err = process_segment_data(load_addr, data_addr, data_len, do_load, sha_handle, checksum);
+    if (err != ESP_OK) {
+        return err;
     }
     return ESP_OK;
+
+err:
+    if (err == ESP_OK) {
+        err = ESP_ERR_IMAGE_INVALID;
+    }
+
+    return err;
+}
+
+static esp_err_t process_segment_data(intptr_t load_addr, uint32_t data_addr, uint32_t data_len, bool do_load, bootloader_sha256_handle_t sha_handle, uint32_t *checksum)
+{
+    const uint32_t *data = (const uint32_t *)bootloader_mmap(data_addr, data_len);
+    if(!data) {
+        ESP_LOGE(TAG, "bootloader_mmap(0x%x, 0x%x) failed",
+                 data_addr, data_len);
+        return ESP_FAIL;
+    }
+
+#ifdef BOOTLOADER_BUILD
+    // Set up the obfuscation value to use for loading
+    while (ram_obfs_value[0] == 0 || ram_obfs_value[1] == 0) {
+        bootloader_fill_random(ram_obfs_value, sizeof(ram_obfs_value));
+    }
+    uint32_t *dest = (uint32_t *)load_addr;
+#endif
+
+    const uint32_t *src = data;
+
+    for (int i = 0; i < data_len; i += 4) {
+        int w_i = i/4; // Word index
+        uint32_t w = src[w_i];
+        *checksum ^= w;
+#ifdef BOOTLOADER_BUILD
+        if (do_load) {
+            dest[w_i] = w ^ ((w_i & 1) ? ram_obfs_value[0] : ram_obfs_value[1]);
+        }
+#endif
+        // SHA_CHUNK determined experimentally as the optimum size
+        // to call bootloader_sha256_data() with. This is a bit
+        // counter-intuitive, but it's ~3ms better than using the
+        // SHA256 block size.
+        const size_t SHA_CHUNK = 1024;
+        if (sha_handle != NULL && i % SHA_CHUNK == 0) {
+            bootloader_sha256_data(sha_handle, &src[w_i],
+                                   MIN(SHA_CHUNK, data_len - i));
+        }
+    }
+
+    bootloader_munmap(data);
+
+    return ESP_OK;
+}
+
+static esp_err_t verify_segment_header(int index, const esp_image_segment_header_t *segment, uint32_t segment_data_offs, bool silent)
+{
+    if ((segment->data_len & 3) != 0
+        || segment->data_len >= SIXTEEN_MB) {
+        if (!silent) {
+            ESP_LOGE(TAG, "invalid segment length 0x%x", segment->data_len);
+        }
+        return ESP_ERR_IMAGE_INVALID;
+    }
+
+    uint32_t load_addr = segment->load_addr;
+    bool map_segment = should_map(load_addr);
+
+    /* Check that flash cache mapped segment aligns correctly from flash to its mapped address,
+       relative to the 64KB page mapping size.
+    */
+    ESP_LOGV(TAG, "segment %d map_segment %d segment_data_offs 0x%x load_addr 0x%x",
+             index, map_segment, segment_data_offs, load_addr);
+    if (map_segment
+        && ((segment_data_offs % SPI_FLASH_MMU_PAGE_SIZE) != (load_addr % SPI_FLASH_MMU_PAGE_SIZE))) {
+        if (!silent) {
+            ESP_LOGE(TAG, "Segment %d load address 0x%08x, doesn't match data 0x%08x",
+                     index, load_addr, segment_data_offs);
+        }
+        return ESP_ERR_IMAGE_INVALID;
+    }
+
+    return ESP_OK;
+}
+
+static bool should_map(uint32_t load_addr)
+{
+    return (load_addr >= SOC_IROM_LOW && load_addr < SOC_IROM_HIGH)
+        || (load_addr >= SOC_DROM_LOW && load_addr < SOC_DROM_HIGH);
+}
+
+static bool should_load(uint32_t load_addr)
+{
+    /* Reload the RTC memory segments whenever a non-deepsleep reset
+       is occurring */
+    bool load_rtc_memory = rtc_get_reset_reason(0) != DEEPSLEEP_RESET;
+
+    if (should_map(load_addr)) {
+        return false;
+    }
+
+    if (load_addr < 0x10000000) {
+        // Reserved for non-loaded addresses.
+        // Current reserved values are
+        // 0x0 (padding block)
+        // 0x4 (unused, but reserved for an MD5 block)
+        return false;
+    }
+
+    if (!load_rtc_memory) {
+        if (load_addr >= SOC_RTC_IRAM_LOW && load_addr < SOC_RTC_IRAM_HIGH) {
+            ESP_LOGD(TAG, "Skipping RTC code segment at 0x%08x\n", load_addr);
+            return false;
+        }
+        if (load_addr >= SOC_RTC_DATA_LOW && load_addr < SOC_RTC_DATA_HIGH) {
+            ESP_LOGD(TAG, "Skipping RTC data segment at 0x%08x\n", load_addr);
+            return false;
+        }
+    }
+
+    return true;
+}
+
+esp_err_t esp_image_verify_bootloader(uint32_t *length)
+{
+    esp_image_metadata_t data;
+    esp_err_t err = esp_image_verify_bootloader_data(&data);
+    if (length != NULL) {
+        *length = (err == ESP_OK) ? data.image_len : 0;
+    }
+    return err;
+}
+
+esp_err_t esp_image_verify_bootloader_data(esp_image_metadata_t *data)
+{
+    if (data == NULL) {
+        return ESP_ERR_INVALID_ARG;
+    }
+    const esp_partition_pos_t bootloader_part = {
+        .offset = ESP_BOOTLOADER_OFFSET,
+        .size = ESP_PARTITION_TABLE_OFFSET - ESP_BOOTLOADER_OFFSET,
+    };
+    return esp_image_load(ESP_IMAGE_VERIFY,
+                          &bootloader_part,
+                          data);
+}
+
+
+static esp_err_t verify_checksum(bootloader_sha256_handle_t sha_handle, uint32_t checksum_word, esp_image_metadata_t *data)
+{
+    uint32_t unpadded_length = data->image_len;
+    uint32_t length = unpadded_length + 1; // Add a byte for the checksum
+    length = (length + 15) & ~15; // Pad to next full 16 byte block
+
+    // Verify checksum
+    uint8_t buf[16];
+    esp_err_t err = bootloader_flash_read(data->start_addr + unpadded_length, buf, length - unpadded_length, true);
+    uint8_t calc = buf[length - unpadded_length - 1];
+    uint8_t checksum = (checksum_word >> 24)
+        ^ (checksum_word >> 16)
+        ^ (checksum_word >> 8)
+        ^ (checksum_word >> 0);
+    if (err != ESP_OK || checksum != calc) {
+        ESP_LOGE(TAG, "Checksum failed. Calculated 0x%x read 0x%x", checksum, calc);
+        return ESP_ERR_IMAGE_INVALID;
+    }
+    if (sha_handle != NULL) {
+        bootloader_sha256_data(sha_handle, buf, length - unpadded_length);
+    }
+
+    if (data->image.hash_appended) {
+        // Account for the hash in the total image length
+        length += HASH_LEN;
+    }
+    data->image_len = length;
+
+    return ESP_OK;
+}
+
+static void debug_log_hash(const uint8_t *image_hash, const char *caption);
+
+static esp_err_t verify_secure_boot_signature(bootloader_sha256_handle_t sha_handle, esp_image_metadata_t *data)
+{
+    uint8_t image_hash[HASH_LEN] = { 0 };
+
+    ESP_LOGI(TAG, "Verifying image signature...");
+
+    // For secure boot, we calculate the signature hash over the whole file, which includes any "simple" hash
+    // appended to the image for corruption detection
+    if (data->image.hash_appended) {
+        const void *simple_hash = bootloader_mmap(data->start_addr + data->image_len - HASH_LEN, HASH_LEN);
+        bootloader_sha256_data(sha_handle, simple_hash, HASH_LEN);
+        bootloader_munmap(simple_hash);
+    }
+
+    bootloader_sha256_finish(sha_handle, image_hash);
+
+    // Log the hash for debugging
+    debug_log_hash(image_hash, "Calculated secure boot hash");
+
+    // Use hash to verify signature block
+    const esp_secure_boot_sig_block_t *sig_block = bootloader_mmap(data->start_addr + data->image_len, sizeof(esp_secure_boot_sig_block_t));
+    esp_err_t err = esp_secure_boot_verify_signature_block(sig_block, image_hash);
+    bootloader_munmap(sig_block);
+    if (err != ESP_OK) {
+        ESP_LOGE(TAG, "Secure boot signature verification failed");
+
+        // Go back and check if the simple hash matches or not (we're off the fast path so we can re-hash the whole image now)
+        ESP_LOGI(TAG, "Calculating simple hash to check for corruption...");
+        const void *whole_image = bootloader_mmap(data->start_addr, data->image_len - HASH_LEN);
+        if (whole_image != NULL) {
+            sha_handle = bootloader_sha256_start();
+            bootloader_sha256_data(sha_handle, whole_image, data->image_len - HASH_LEN);
+            bootloader_munmap(whole_image);
+            if (verify_simple_hash(sha_handle, data) != ESP_OK) {
+                ESP_LOGW(TAG, "image corrupted on flash");
+            } else {
+                ESP_LOGW(TAG, "image valid, signature bad");
+            }
+        }
+        return ESP_ERR_IMAGE_INVALID;
+    }
+
+    return ESP_OK;
+}
+
+static esp_err_t verify_simple_hash(bootloader_sha256_handle_t sha_handle, esp_image_metadata_t *data)
+{
+    uint8_t image_hash[HASH_LEN] = { 0 };
+    bootloader_sha256_finish(sha_handle, image_hash);
+
+    // Log the hash for debugging
+    debug_log_hash(image_hash, "Calculated hash");
+
+    // Simple hash for verification only
+    const void *hash = bootloader_mmap(data->start_addr + data->image_len - HASH_LEN, HASH_LEN);
+    if (memcmp(hash, image_hash, HASH_LEN) != 0) {
+        ESP_LOGE(TAG, "Image hash failed - image is corrupt");
+        debug_log_hash(hash, "Expected hash");
+        bootloader_munmap(hash);
+        return ESP_ERR_IMAGE_INVALID;
+    }
+
+    bootloader_munmap(hash);
+    return ESP_OK;
+}
+
+// Log a hash as a hex string
+static void debug_log_hash(const uint8_t *image_hash, const char *label)
+{
+#if BOOT_LOG_LEVEL >= LOG_LEVEL_DEBUG
+        char hash_print[sizeof(image_hash)*2 + 1];
+        hash_print[sizeof(image_hash)*2] = 0;
+        for (int i = 0; i < sizeof(image_hash); i++) {
+            for (int shift = 0; shift < 2; shift++) {
+                uint8_t nibble = (image_hash[i] >> (shift ? 0 : 4)) & 0x0F;
+                if (nibble < 10) {
+                    hash_print[i*2+shift] = '0' + nibble;
+                } else {
+                    hash_print[i*2+shift] = 'a' + nibble - 10;
+                }
+            }
+        }
+        ESP_LOGD(TAG, "%s: %s", label, hash_print);
+#endif
 }

components/bootloader_support/src/flash_encrypt.c

@@ -15,7 +15,6 @@
 #include <strings.h>
 
 #include "bootloader_flash.h"
-#include "bootloader_random.h"
 #include "esp_image_format.h"
 #include "esp_flash_encrypt.h"
 #include "esp_flash_partitions.h"
@@ -62,6 +61,12 @@ esp_err_t esp_flash_encrypt_check_and_update(void)
 
 static esp_err_t initialise_flash_encryption(void)
 {
+    uint32_t coding_scheme = REG_GET_FIELD(EFUSE_BLK0_RDATA6_REG, EFUSE_CODING_SCHEME);
+    if (coding_scheme != EFUSE_CODING_SCHEME_VAL_NONE && coding_scheme != EFUSE_CODING_SCHEME_VAL_34) {
+        ESP_LOGE(TAG, "Unknown/unsupported CODING_SCHEME value 0x%x", coding_scheme);
+        return ESP_ERR_NOT_SUPPORTED;
+    }
+
     /* Before first flash encryption pass, need to initialise key & crypto config */
 
     /* Generate key */
@@ -79,13 +84,7 @@ static esp_err_t initialise_flash_encryption(void)
         && REG_READ(EFUSE_BLK1_RDATA6_REG) == 0
         && REG_READ(EFUSE_BLK1_RDATA7_REG) == 0) {
         ESP_LOGI(TAG, "Generating new flash encryption key...");
-        uint32_t buf[8];
-        bootloader_fill_random(buf, sizeof(buf));
-        for (int i = 0; i < 8; i++) {
-            ESP_LOGV(TAG, "EFUSE_BLK1_WDATA%d_REG = 0x%08x", i, buf[i]);
-            REG_WRITE(EFUSE_BLK1_WDATA0_REG + 4*i, buf[i]);
-        }
-        bzero(buf, sizeof(buf));
+        esp_efuse_write_random_key(EFUSE_BLK1_WDATA0_REG);
         esp_efuse_burn_new_values();
 
         ESP_LOGI(TAG, "Read & write protecting new key...");
@@ -139,6 +138,12 @@ static esp_err_t initialise_flash_encryption(void)
 #else
     ESP_LOGW(TAG, "Not disabling JTAG - SECURITY COMPROMISED");
 #endif
+#ifndef CONFIG_SECURE_BOOT_ALLOW_ROM_BASIC
+    ESP_LOGI(TAG, "Disable ROM BASIC interpreter fallback...");
+    new_wdata6 |= EFUSE_RD_CONSOLE_DEBUG_DISABLE;
+#else
+    ESP_LOGW(TAG, "Not disabling ROM BASIC fallback - SECURITY COMPROMISED");
+#endif
 
     if (new_wdata6 != 0) {
         REG_WRITE(EFUSE_BLK0_WDATA6_REG, new_wdata6);
@@ -157,7 +162,7 @@ static esp_err_t encrypt_flash_contents(uint32_t flash_crypt_cnt, bool flash_cry
 
     /* If the last flash_crypt_cnt bit is burned or write-disabled, the
        device can't re-encrypt itself. */
-    if (flash_crypt_wr_dis || flash_crypt_cnt == 0xFF) {
+    if (flash_crypt_wr_dis) {
         ESP_LOGE(TAG, "Cannot re-encrypt data (FLASH_CRYPT_CNT 0x%02x write disabled %d", flash_crypt_cnt, flash_crypt_wr_dis);
         return ESP_FAIL;
     }
@@ -194,8 +199,8 @@ static esp_err_t encrypt_flash_contents(uint32_t flash_crypt_cnt, bool flash_cry
     ESP_LOGD(TAG, "All flash regions checked for encryption pass");
 
     /* Set least significant 0-bit in flash_crypt_cnt */
-    int ffs_inv = __builtin_ffs((~flash_crypt_cnt) & 0xFF);
-    /* ffs_inv shouldn't be zero, as zero implies flash_crypt_cnt == 0xFF */
+    int ffs_inv = __builtin_ffs((~flash_crypt_cnt) & EFUSE_RD_FLASH_CRYPT_CNT);
+    /* ffs_inv shouldn't be zero, as zero implies flash_crypt_cnt == EFUSE_RD_FLASH_CRYPT_CNT (0x7F) */
     uint32_t new_flash_crypt_cnt = flash_crypt_cnt + (1 << (ffs_inv - 1));
     ESP_LOGD(TAG, "FLASH_CRYPT_CNT 0x%x -> 0x%x", flash_crypt_cnt, new_flash_crypt_cnt);
     REG_SET_FIELD(EFUSE_BLK0_WDATA0_REG, EFUSE_FLASH_CRYPT_CNT, new_flash_crypt_cnt);
@@ -210,8 +215,8 @@ static esp_err_t encrypt_bootloader()
 {
     esp_err_t err;
     uint32_t image_length;
-    /* Check for plaintext bootloader */
-    if (esp_image_basic_verify(ESP_BOOTLOADER_OFFSET, false, &image_length) == ESP_OK) {
+    /* Check for plaintext bootloader (verification will fail if it's already encrypted) */
+    if (esp_image_verify_bootloader(&image_length) == ESP_OK) {
         ESP_LOGD(TAG, "bootloader is plaintext. Encrypting...");
         err = esp_flash_encrypt_region(ESP_BOOTLOADER_OFFSET, image_length);
         if (err != ESP_OK) {
@@ -248,7 +253,7 @@ static esp_err_t encrypt_and_load_partition_table(esp_partition_info_t *partitio
         ESP_LOGE(TAG, "Failed to read partition table data");
         return err;
     }
-    if (esp_partition_table_basic_verify(partition_table, false, num_partitions) == ESP_OK) {
+    if (esp_partition_table_verify(partition_table, false, num_partitions) == ESP_OK) {
         ESP_LOGD(TAG, "partition table is plaintext. Encrypting...");
         esp_err_t err = esp_flash_encrypt_region(ESP_PARTITION_TABLE_OFFSET,
                                                  FLASH_SECTOR_SIZE);
@@ -270,22 +275,17 @@ static esp_err_t encrypt_and_load_partition_table(esp_partition_info_t *partitio
 static esp_err_t encrypt_partition(int index, const esp_partition_info_t *partition)
 {
     esp_err_t err;
-    uint32_t image_len = partition->pos.size;
     bool should_encrypt = (partition->flags & PART_FLAG_ENCRYPTED);
 
     if (partition->type == PART_TYPE_APP) {
-        /* check if the partition holds an unencrypted app */
-        if (esp_image_basic_verify(partition->pos.offset, false, &image_len) == ESP_OK) {
-            if(image_len > partition->pos.size) {
-                ESP_LOGE(TAG, "partition entry %d has image longer than partition (%d vs %d)", index, image_len, partition->pos.size);
-                should_encrypt = false;
-            } else {
-                should_encrypt = true;
-            }
-        } else {
-            should_encrypt = false;
-        }
-    } else if (partition->type == PART_TYPE_DATA && partition->subtype == PART_SUBTYPE_DATA_OTA) {
+      /* check if the partition holds a valid unencrypted app */
+      esp_image_metadata_t data_ignored;
+      err = esp_image_load(ESP_IMAGE_VERIFY,
+                           &partition->pos,
+                           &data_ignored);
+      should_encrypt = (err == ESP_OK);
+    } else if ((partition->type == PART_TYPE_DATA && partition->subtype == PART_SUBTYPE_DATA_OTA)
+                || (partition->type == PART_TYPE_DATA && partition->subtype == PART_SUBTYPE_DATA_NVS_KEYS)) {
         /* check if we have ota data partition and the partition should be encrypted unconditionally */
         should_encrypt = true;
     }

components/bootloader_support/src/flash_partitions.c

@@ -11,50 +11,76 @@
 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 // See the License for the specific language governing permissions and
 // limitations under the License.
+#include <string.h>
 #include "esp_flash_partitions.h"
 #include "esp_log.h"
 #include "rom/spi_flash.h"
+#include "rom/md5_hash.h"
+#include "esp_flash_data_types.h"
 
 static const char *TAG = "flash_parts";
 
-esp_err_t esp_partition_table_basic_verify(const esp_partition_info_t *partition_table, bool log_errors, int *num_partitions)
+esp_err_t esp_partition_table_verify(const esp_partition_info_t *partition_table, bool log_errors, int *num_partitions)
 {
-  int num_parts;
-  uint32_t chip_size = g_rom_flashchip.chip_size;
-  *num_partitions = 0;
+    int md5_found = 0;
+    int num_parts;
+    uint32_t chip_size = g_rom_flashchip.chip_size;
+    *num_partitions = 0;
 
-  for(num_parts = 0; num_parts < ESP_PARTITION_TABLE_MAX_ENTRIES; num_parts++) {
-    const esp_partition_info_t *part = &partition_table[num_parts];
+    for (num_parts = 0; num_parts < ESP_PARTITION_TABLE_MAX_ENTRIES; num_parts++) {
+        const esp_partition_info_t *part = &partition_table[num_parts];
 
-    if (part->magic == 0xFFFF
-        && part->type == PART_TYPE_END
-        && part->subtype == PART_SUBTYPE_END) {
-      /* TODO: check md5 */
-      ESP_LOGD(TAG, "partition table verified, %d entries", num_parts);
-      *num_partitions = num_parts;
-      return ESP_OK;
-    }
+        if (part->magic == ESP_PARTITION_MAGIC) {
+            const esp_partition_pos_t *pos = &part->pos;
+            if (pos->offset > chip_size || pos->offset + pos->size > chip_size) {
+                if (log_errors) {
+                    ESP_LOGE(TAG, "partition %d invalid - offset 0x%x size 0x%x exceeds flash chip size 0x%x",
+                             num_parts, pos->offset, pos->size, chip_size);
+                }
+                return ESP_ERR_INVALID_SIZE;
+            }
+        } else if (part->magic == ESP_PARTITION_MAGIC_MD5) {
+            if (md5_found) {
+                if (log_errors) {
+                    ESP_LOGE(TAG, "Only one MD5 checksum is allowed");
+                }
+                return ESP_ERR_INVALID_STATE;
+            }
 
-    if (part->magic != ESP_PARTITION_MAGIC) {
-        if (log_errors) {
-            ESP_LOGE(TAG, "partition %d invalid magic number 0x%x", num_parts, part->magic);
+            struct MD5Context context;
+            unsigned char digest[16];
+            MD5Init(&context);
+            MD5Update(&context, (unsigned char *) partition_table, num_parts * sizeof(esp_partition_info_t));
+            MD5Final(digest, &context);
+
+            unsigned char *md5sum = ((unsigned char *) part) + 16; // skip the 2B magic number and the 14B fillup bytes
+
+            if (memcmp(md5sum, digest, sizeof(digest)) != 0) {
+                if (log_errors) {
+                    ESP_LOGE(TAG, "Incorrect MD5 checksum");
+                }
+                return ESP_ERR_INVALID_STATE;
+            }
+            //MD5 checksum matches and we continue with the next interation in
+            //order to detect the end of the partition table
+            md5_found = 1;
+        } else if (part->magic == 0xFFFF
+                   && part->type == PART_TYPE_END
+                   && part->subtype == PART_SUBTYPE_END) {
+            ESP_LOGD(TAG, "partition table verified, %d entries", num_parts);
+            *num_partitions = num_parts - md5_found; //do not count the partition where the MD5 checksum is held
+            return ESP_OK;
+        } else {
+            if (log_errors) {
+                ESP_LOGE(TAG, "partition %d invalid magic number 0x%x", num_parts, part->magic);
+            }
+            return ESP_ERR_INVALID_STATE;
         }
-        return ESP_ERR_INVALID_STATE;
     }
 
-    const esp_partition_pos_t *pos = &part->pos;
-    if (pos->offset > chip_size || pos->offset + pos->size > chip_size) {
-        if (log_errors) {
-            ESP_LOGE(TAG, "partition %d invalid - offset 0x%x size 0x%x exceeds flash chip size 0x%x",
-                     num_parts, pos->offset, pos->size, chip_size);
-        }
-        return ESP_ERR_INVALID_SIZE;
+    if (log_errors) {
+        ESP_LOGE(TAG, "partition table has no terminating entry, not valid");
     }
-  }
-
-  if (log_errors) {
-      ESP_LOGE(TAG, "partition table has no terminating entry, not valid");
-  }
-  return ESP_ERR_INVALID_STATE;
+    return ESP_ERR_INVALID_STATE;
 }
 

components/bootloader_support/src/flash_qio_mode.c

@@ -15,6 +15,7 @@
 #include <stdint.h>
 #include "flash_qio_mode.h"
 #include "esp_log.h"
+#include "esp_err.h"
 #include "rom/spi_flash.h"
 #include "rom/efuse.h"
 #include "soc/spi_struct.h"
@@ -34,9 +35,7 @@
 #define CMD_WRDI       0x04
 #define CMD_RDSR       0x05
 #define CMD_RDSR2      0x35 /* Not all SPI flash uses this command */
-
-
-#define ESP32_D2WD_WP_GPIO 7 /* ESP32-D2WD has this GPIO wired to WP pin of flash */
+#define CMD_OTPEN      0x3A /* Enable OTP mode, not all SPI flash uses this command */
 
 static const char *TAG = "qio_mode";
 
@@ -67,6 +66,17 @@ static void write_status_8b_wrsr2(unsigned new_status);
 /* Write 16 bit status using WRSR */
 static void write_status_16b_wrsr(unsigned new_status);
 
+/* Read 8 bit status of XM25QU64A  */
+static unsigned read_status_8b_xmc25qu64a();
+/* Write 8 bit status of XM25QU64A */
+static void write_status_8b_xmc25qu64a(unsigned new_status);
+
+#define ESP32_D2WD_WP_GPIO 7 /* ESP32-D2WD has this GPIO wired to WP pin of flash */
+
+#ifndef CONFIG_BOOTLOADER_SPI_WP_PIN // Set in menuconfig if SPI flasher config is set to a quad mode
+#define CONFIG_BOOTLOADER_SPI_WP_PIN ESP32_D2WD_WP_GPIO
+#endif
+
 /* Array of known flash chips and data to enable Quad I/O mode
 
    Manufacturer & flash ID can be tested by running "esptool.py
@@ -80,10 +90,12 @@ static void write_status_16b_wrsr(unsigned new_status);
    Searching of this table stops when the first match is found.
  */
 const static qio_info_t chip_data[] = {
-/*   Manufacturer,   mfg_id, flash_id, id mask, Read Status,                Write Status,          QIE Bit */
-    { "MXIC",        0xC2,   0x2000, 0xFF00,    read_status_8b_rdsr,        write_status_8b_wrsr,  6 },
-    { "ISSI",        0x9D,   0x4000, 0xCF00,    read_status_8b_rdsr,        write_status_8b_wrsr,  6 }, /* IDs 0x40xx, 0x70xx */
-    { "WinBond",     0xEF,   0x4000, 0xFF00,    read_status_16b_rdsr_rdsr2, write_status_16b_wrsr, 9 },
+/*   Manufacturer,   mfg_id, flash_id, id mask, Read Status,                Write Status,               QIE Bit */
+    { "MXIC",        0xC2,   0x2000, 0xFF00,    read_status_8b_rdsr,        write_status_8b_wrsr,       6 },
+    { "ISSI",        0x9D,   0x4000, 0xCF00,    read_status_8b_rdsr,        write_status_8b_wrsr,       6 }, /* IDs 0x40xx, 0x70xx */
+    { "WinBond",     0xEF,   0x4000, 0xFF00,    read_status_16b_rdsr_rdsr2, write_status_16b_wrsr,      9 },
+    { "GD",          0xC8,   0x6000, 0xFF00,    read_status_16b_rdsr_rdsr2, write_status_16b_wrsr,      9 },
+    { "XM25QU64A",   0x20,   0x3817, 0xFFFF,    read_status_8b_xmc25qu64a,  write_status_8b_xmc25qu64a, 6 },
 
     /* Final entry is default entry, if no other IDs have matched.
 
@@ -91,12 +103,12 @@ const static qio_info_t chip_data[] = {
        GigaDevice (mfg ID 0xC8, flash IDs including 4016),
        FM25Q32 (QOUT mode only, mfg ID 0xA1, flash IDs including 4016)
     */
-    { NULL,          0xFF,    0xFFFF, 0xFFFF,   read_status_8b_rdsr2,       write_status_8b_wrsr2, 1 },
+    { NULL,          0xFF,    0xFFFF, 0xFFFF,   read_status_8b_rdsr2,       write_status_8b_wrsr2,      1 },
 };
 
 #define NUM_CHIPS (sizeof(chip_data) / sizeof(qio_info_t))
 
-static void enable_qio_mode(read_status_fn_t read_status_fn,
+static esp_err_t enable_qio_mode(read_status_fn_t read_status_fn,
                             write_status_fn_t write_status_fn,
                             uint8_t status_qio_bit);
 
@@ -109,6 +121,12 @@ static uint32_t execute_flash_command(uint8_t command, uint32_t mosi_data, uint8
 
 /* dummy_len_plus values defined in ROM for SPI flash configuration */
 extern uint8_t g_rom_spiflash_dummy_len_plus[];
+uint32_t bootloader_read_flash_id()
+{
+    uint32_t id = execute_flash_command(CMD_RDID, 0, 0, 24);
+    id = ((id & 0xff) << 16) | ((id >> 16) & 0xff) | (id & 0xff00);
+    return id;
+}
 
 void bootloader_enable_qio_mode(void)
 {
@@ -120,19 +138,11 @@ void bootloader_enable_qio_mode(void)
     ESP_LOGD(TAG, "Probing for QIO mode enable...");
     esp_rom_spiflash_wait_idle(&g_rom_flashchip);
 
-    /* Set up some of the SPIFLASH user/ctrl variables which don't change
-       while we're probing using execute_flash_command() */
-    SPIFLASH.ctrl.val = 0;
-    SPIFLASH.user.usr_dummy = 0;
-    SPIFLASH.user.usr_addr = 0;
-    SPIFLASH.user.usr_command = 1;
-    SPIFLASH.user2.usr_command_bitlen = 7;
-
-    raw_flash_id = execute_flash_command(CMD_RDID, 0, 0, 24);
+    raw_flash_id = g_rom_flashchip.device_id;
     ESP_LOGD(TAG, "Raw SPI flash chip id 0x%x", raw_flash_id);
 
-    mfg_id = raw_flash_id & 0xFF;
-    flash_id = (raw_flash_id >> 16) | (raw_flash_id & 0xFF00);
+    mfg_id = (raw_flash_id >> 16) & 0xFF;
+    flash_id = raw_flash_id & 0xFFFF;
     ESP_LOGD(TAG, "Manufacturer ID 0x%02x chip ID 0x%04x", mfg_id, flash_id);
 
     for (i = 0; i < NUM_CHIPS-1; i++) {
@@ -152,7 +162,7 @@ void bootloader_enable_qio_mode(void)
                     chip_data[i].status_qio_bit);
 }
 
-static void enable_qio_mode(read_status_fn_t read_status_fn,
+static esp_err_t enable_qio_mode(read_status_fn_t read_status_fn,
                             write_status_fn_t write_status_fn,
                             uint8_t status_qio_bit)
 {
@@ -160,15 +170,18 @@ static void enable_qio_mode(read_status_fn_t read_status_fn,
     const uint32_t spiconfig = ets_efuse_get_spiconfig();
 
     if (spiconfig != EFUSE_SPICONFIG_SPI_DEFAULTS && spiconfig != EFUSE_SPICONFIG_HSPI_DEFAULTS) {
-        // spiconfig specifies a custom efuse pin configuration. This config defines all pins -except- WP.
+        // spiconfig specifies a custom efuse pin configuration. This config defines all pins -except- WP,
+        // which is compiled into the bootloader instead.
         //
-        // For now, in this situation we only support Quad I/O mode for ESP32-D2WD where WP pin is known.
-        uint32_t chip_ver = REG_GET_FIELD(EFUSE_BLK0_RDATA3_REG, EFUSE_RD_CHIP_VER_RESERVE);
-        uint32_t pkg_ver = chip_ver & 0x7;
-        const uint32_t PKG_VER_ESP32_D2WD = 2; // TODO: use chip detection API once available
-        if (pkg_ver != PKG_VER_ESP32_D2WD) {
-            ESP_LOGE(TAG, "Quad I/O is only supported for standard pin numbers or ESP32-D2WD. Falling back to Dual I/O.");
-            return;
+        // Most commonly an overriden pin mapping means ESP32-D2WD or ESP32-PICOD4.
+        //Warn if chip is ESP32-D2WD/ESP32-PICOD4 but someone has changed the WP pin
+        //assignment from that chip's WP pin.
+        uint32_t pkg_ver = REG_GET_FIELD(EFUSE_BLK0_RDATA3_REG, EFUSE_RD_CHIP_VER_PKG);
+        if (CONFIG_BOOTLOADER_SPI_WP_PIN != ESP32_D2WD_WP_GPIO  &&
+            (pkg_ver == EFUSE_RD_CHIP_VER_PKG_ESP32D2WDQ5 ||
+             pkg_ver == EFUSE_RD_CHIP_VER_PKG_ESP32PICOD2 ||
+             pkg_ver == EFUSE_RD_CHIP_VER_PKG_ESP32PICOD4)) {
+            ESP_LOGW(TAG, "Chip is ESP32-D2WD/ESP32-PICOD4 but flash WP pin is different value to internal flash");
         }
     }
 
@@ -187,7 +200,7 @@ static void enable_qio_mode(read_status_fn_t read_status_fn,
         ESP_LOGD(TAG, "Updated flash chip status 0x%x", status);
         if ((status & (1<<status_qio_bit)) == 0) {
             ESP_LOGE(TAG, "Failed to set QIE bit, not enabling QIO mode");
-            return;
+            return ESP_FAIL;
         }
 
     } else {
@@ -205,7 +218,9 @@ static void enable_qio_mode(read_status_fn_t read_status_fn,
 
     esp_rom_spiflash_config_readmode(mode);
 
-    esp_rom_spiflash_select_qio_pins(ESP32_D2WD_WP_GPIO, spiconfig);
+    esp_rom_spiflash_select_qio_pins(CONFIG_BOOTLOADER_SPI_WP_PIN, spiconfig);
+
+    return ESP_OK;
 }
 
 static unsigned read_status_8b_rdsr()
@@ -238,8 +253,33 @@ static void write_status_16b_wrsr(unsigned new_status)
     execute_flash_command(CMD_WRSR, new_status, 16, 0);
 }
 
+static unsigned read_status_8b_xmc25qu64a()
+{
+    execute_flash_command(CMD_OTPEN, 0, 0, 0);  /* Enter OTP mode */
+    esp_rom_spiflash_wait_idle(&g_rom_flashchip);
+    uint32_t read_status = execute_flash_command(CMD_RDSR, 0, 0, 8);
+    execute_flash_command(CMD_WRDI, 0, 0, 0);   /* Exit OTP mode */
+    return read_status;
+}
+
+static void write_status_8b_xmc25qu64a(unsigned new_status)
+{
+    execute_flash_command(CMD_OTPEN, 0, 0, 0);  /* Enter OTP mode */
+    esp_rom_spiflash_wait_idle(&g_rom_flashchip);
+    execute_flash_command(CMD_WRSR, new_status, 8, 0);
+    esp_rom_spiflash_wait_idle(&g_rom_flashchip);
+    execute_flash_command(CMD_WRDI, 0, 0, 0);   /* Exit OTP mode */
+}
+
 static uint32_t execute_flash_command(uint8_t command, uint32_t mosi_data, uint8_t mosi_len, uint8_t miso_len)
 {
+    uint32_t old_ctrl_reg = SPIFLASH.ctrl.val;
+    SPIFLASH.ctrl.val = SPI_WP_REG_M; // keep WP high while idle, otherwise leave DIO mode
+    SPIFLASH.user.usr_dummy = 0;
+    SPIFLASH.user.usr_addr = 0;
+    SPIFLASH.user.usr_command = 1;
+    SPIFLASH.user2.usr_command_bitlen = 7;
+
     SPIFLASH.user2.usr_command_value = command;
     SPIFLASH.user.usr_miso = miso_len > 0;
     SPIFLASH.miso_dlen.usr_miso_dbitlen = miso_len ? (miso_len - 1) : 0;
@@ -262,5 +302,6 @@ static uint32_t execute_flash_command(uint8_t command, uint32_t mosi_data, uint8
     while(SPIFLASH.cmd.usr != 0)
     { }
 
+    SPIFLASH.ctrl.val = old_ctrl_reg;
     return SPIFLASH.data_buf[0];
 }

components/bootloader_support/src/secure_boot.c

@@ -50,7 +50,7 @@ static bool secure_boot_generate(uint32_t image_len){
     const uint32_t *image;
 
     /* hardware secure boot engine only takes full blocks, so round up the
-       image length. The additional data should all be 0xFF.
+       image length. The additional data should all be 0xFF (or the appended SHA, if it falls in the same block).
     */
     if (image_len % sizeof(digest.iv) != 0) {
         image_len = (image_len / sizeof(digest.iv) + 1) * sizeof(digest.iv);
@@ -67,7 +67,7 @@ static bool secure_boot_generate(uint32_t image_len){
     }
 
     /* generate digest from image contents */
-    image = bootloader_mmap(0x1000, image_len);
+    image = bootloader_mmap(ESP_BOOTLOADER_OFFSET, image_len);
     if (!image) {
         ESP_LOGE(TAG, "bootloader_mmap(0x1000, 0x%x) failed", image_len);
         return false;
@@ -104,14 +104,21 @@ static inline void burn_efuses()
 
 esp_err_t esp_secure_boot_permanently_enable(void) {
     esp_err_t err;
-    uint32_t image_len = 0;
     if (esp_secure_boot_enabled())
     {
         ESP_LOGI(TAG, "bootloader secure boot is already enabled, continuing..");
         return ESP_OK;
     }
 
-    err = esp_image_basic_verify(0x1000, true, &image_len);
+    uint32_t coding_scheme = REG_GET_FIELD(EFUSE_BLK0_RDATA6_REG, EFUSE_CODING_SCHEME);
+    if (coding_scheme != EFUSE_CODING_SCHEME_VAL_NONE && coding_scheme != EFUSE_CODING_SCHEME_VAL_34) {
+        ESP_LOGE(TAG, "Unknown/unsupported CODING_SCHEME value 0x%x", coding_scheme);
+        return ESP_ERR_NOT_SUPPORTED;
+    }
+
+    /* Verify the bootloader */
+    esp_image_metadata_t bootloader_data = { 0 };
+    err = esp_image_verify_bootloader_data(&bootloader_data);
     if (err != ESP_OK) {
         ESP_LOGE(TAG, "bootloader image appears invalid! error %d", err);
         return err;
@@ -131,13 +138,7 @@ esp_err_t esp_secure_boot_permanently_enable(void) {
         && REG_READ(EFUSE_BLK2_RDATA6_REG) == 0
         && REG_READ(EFUSE_BLK2_RDATA7_REG) == 0) {
         ESP_LOGI(TAG, "Generating new secure boot key...");
-        uint32_t buf[8];
-        bootloader_fill_random(buf, sizeof(buf));
-        for (int i = 0; i < 8; i++) {
-            ESP_LOGV(TAG, "EFUSE_BLK2_WDATA%d_REG = 0x%08x", i, buf[i]);
-            REG_WRITE(EFUSE_BLK2_WDATA0_REG + 4*i, buf[i]);
-        }
-        bzero(buf, sizeof(buf));
+        esp_efuse_write_random_key(EFUSE_BLK2_WDATA0_REG);
         burn_efuses();
         ESP_LOGI(TAG, "Read & write protecting new key...");
         REG_WRITE(EFUSE_BLK0_WDATA0_REG, EFUSE_WR_DIS_BLK2 | EFUSE_RD_DIS_BLK2);
@@ -150,6 +151,11 @@ esp_err_t esp_secure_boot_permanently_enable(void) {
     }
 
     ESP_LOGI(TAG, "Generating secure boot digest...");
+    uint32_t image_len = bootloader_data.image_len;
+    if(bootloader_data.image.hash_appended) {
+        /* Secure boot digest doesn't cover the hash */
+        image_len -= ESP_IMAGE_HASH_LEN;
+    }
     if (false == secure_boot_generate(image_len)){
         ESP_LOGE(TAG, "secure boot generation failed");
         return ESP_FAIL;

components/bootloader_support/src/secure_boot_signatures.c

@@ -14,6 +14,7 @@
 #include "sdkconfig.h"
 
 #include "bootloader_flash.h"
+#include "bootloader_sha.h"
 #include "esp_log.h"
 #include "esp_image_format.h"
 #include "esp_secure_boot.h"
@@ -34,20 +35,13 @@ extern const uint8_t signature_verification_key_end[] asm("_binary_signature_ver
 
 #define SIGNATURE_VERIFICATION_KEYLEN 64
 
+#define DIGEST_LEN 32
+
 esp_err_t esp_secure_boot_verify_signature(uint32_t src_addr, uint32_t length)
 {
-#ifdef BOOTLOADER_BUILD
-    SHA_CTX sha;
-#endif
-    uint8_t digest[32];
-    ptrdiff_t keylen;
+    uint8_t digest[DIGEST_LEN];
     const uint8_t *data;
     const esp_secure_boot_sig_block_t *sigblock;
-    bool is_valid;
-#ifdef BOOTLOADER_BUILD
-    const uint8_t *digest_data;
-    uint32_t digest_len;
-#endif
 
     ESP_LOGD(TAG, "verifying signature src_addr 0x%x length 0x%x", src_addr, length);
 
@@ -57,46 +51,46 @@ esp_err_t esp_secure_boot_verify_signature(uint32_t src_addr, uint32_t length)
         return ESP_FAIL;
     }
 
-    sigblock = (const esp_secure_boot_sig_block_t *)(data + length);
-
-    if (sigblock->version != 0) {
-        ESP_LOGE(TAG, "src 0x%x has invalid signature version field 0x%08x", src_addr, sigblock->version);
-        goto unmap_and_fail;
-    }
-
+    // Calculate digest of main image
 #ifdef BOOTLOADER_BUILD
-    /* Use ROM SHA functions directly */
-    ets_sha_enable();
-    ets_sha_init(&sha);
-    digest_len = length * 8;
-    digest_data = data;
-    while (digest_len > 0) {
-        uint32_t chunk_len = (digest_len > 64) ? 64 : digest_len;
-        ets_sha_update(&sha, SHA2_256, digest_data, chunk_len);
-        digest_len -= chunk_len;
-        digest_data += chunk_len / 8;
-    }
-    ets_sha_finish(&sha, SHA2_256, digest);
-    ets_sha_disable();
+    bootloader_sha256_handle_t handle = bootloader_sha256_start();
+    bootloader_sha256_data(handle, data, length);
+    bootloader_sha256_finish(handle, digest);
 #else
     /* Use thread-safe esp-idf SHA function */
     esp_sha(SHA2_256, data, length, digest);
 #endif
 
+    // Map the signature block and verify the signature
+    sigblock = (const esp_secure_boot_sig_block_t *)(data + length);
+    esp_err_t err = esp_secure_boot_verify_signature_block(sigblock, digest);
+    bootloader_munmap(data);
+    return err;
+}
+
+esp_err_t esp_secure_boot_verify_signature_block(const esp_secure_boot_sig_block_t *sig_block, const uint8_t *image_digest)
+{
+    ptrdiff_t keylen;
+    bool is_valid;
+
     keylen = signature_verification_key_end - signature_verification_key_start;
     if(keylen != SIGNATURE_VERIFICATION_KEYLEN) {
         ESP_LOGE(TAG, "Embedded public verification key has wrong length %d", keylen);
-        goto unmap_and_fail;
+        return ESP_FAIL;
     }
 
+    if (sig_block->version != 0) {
+        ESP_LOGE(TAG, "image has invalid signature version field 0x%08x", sig_block->version);
+        return ESP_FAIL;
+    }
+
+    ESP_LOGD(TAG, "Verifying secure boot signature");
+
     is_valid = uECC_verify(signature_verification_key_start,
-                           digest, sizeof(digest), sigblock->signature,
-                           uECC_secp256r1());
-
-    bootloader_munmap(data);
+                                image_digest,
+                                DIGEST_LEN,
+                                sig_block->signature,
+                                uECC_secp256r1());
+    ESP_LOGD(TAG, "Verification result %d", is_valid);
     return is_valid ? ESP_OK : ESP_ERR_IMAGE_INVALID;
-
- unmap_and_fail:
-    bootloader_munmap(data);
-    return ESP_FAIL;
 }

components/bootloader_support/test/test_efuse_coding_scheme.c

@@ -0,0 +1,94 @@
+#include <stdint.h>
+#include <strings.h>
+#include "esp_efuse.h"
+#include "unity.h"
+
+typedef struct {
+    uint8_t unencoded[24];
+    uint32_t encoded[8];
+} coding_scheme_test_t;
+
+/* Randomly generated byte strings, encoded and written to ESP32
+   using espefuse algorithm, then verified to have no encoding errors
+   and correct readback.
+*/
+static const coding_scheme_test_t coding_scheme_data[] = {
+    {
+        .unencoded = { 0x96, 0xa9, 0xab, 0xb2, 0xda, 0xdd, 0x21, 0xd2, 0x35, 0x22, 0xd3, 0x30, 0x3b, 0xf8, 0xcb, 0x77, 0x8d, 0x8d, 0xf4, 0x96, 0x25, 0xc4, 0xb9, 0x94 },
+        .encoded = { 0xb2aba996, 0x6821ddda, 0x2235d221, 0x430730d3, 0x77cbf83b, 0x627f8d8d, 0xc42596f4, 0x4dae94b9 },
+    },
+    {
+        .unencoded = { 0x0e, 0x6b, 0x1a, 0x1d, 0xa5, 0x9f, 0x24, 0xcf, 0x91, 0x5b, 0xe7, 0xe1, 0x7c, 0x0a, 0x6e, 0xdc, 0x5e, 0x8e, 0xb1, 0xec, 0xd1, 0xf3, 0x75, 0x48 },
+        .encoded = { 0x1d1a6b0e, 0x5e589fa5, 0x5b91cf24, 0x6127e1e7, 0xdc6e0a7c, 0x5d148e5e, 0xf3d1ecb1, 0x57424875 },
+    },
+    {
+        .unencoded = { 0x0a, 0x79, 0x5a, 0x1c, 0xb1, 0x45, 0x71, 0x2c, 0xb3, 0xda, 0x9e, 0xdc, 0x76, 0x27, 0xf5, 0xca, 0xe7, 0x00, 0x39, 0x95, 0x6c, 0x53, 0xc2, 0x07 },
+        .encoded = { 0x1c5a790a, 0x4ac145b1, 0xdab32c71, 0x6476dc9e, 0xcaf52776, 0x4d8900e7, 0x536c9539, 0x495607c2 },
+    },
+    {
+        .unencoded = { 0x76, 0x46, 0x88, 0x2d, 0x4c, 0xe1, 0x50, 0x5d, 0xd6, 0x7c, 0x41, 0x15, 0xc6, 0x1f, 0xd4, 0x60, 0x10, 0x15, 0x2a, 0x72, 0x2d, 0x89, 0x93, 0x13 },
+        .encoded = { 0x2d884676, 0x4838e14c, 0x7cd65d50, 0x4bf31541, 0x60d41fc6, 0x39681510, 0x892d722a, 0x497c1393 },
+    },
+    {
+        .unencoded = { 0x32, 0xbc, 0x40, 0x92, 0x13, 0x37, 0x1a, 0xae, 0xb6, 0x00, 0xed, 0x30, 0xb8, 0x82, 0xee, 0xfc, 0xcf, 0x6d, 0x7f, 0xc5, 0xfa, 0x0e, 0xdd, 0x84 },
+        .encoded = { 0x9240bc32, 0x49783713, 0x00b6ae1a, 0x46df30ed, 0xfcee82b8, 0x6e8a6dcf, 0x0efac57f, 0x571784dd },
+    },
+    {
+        .unencoded = { 0x29, 0xb3, 0x04, 0x95, 0xf2, 0x3c, 0x81, 0xe6, 0x5a, 0xf3, 0x42, 0x82, 0xd1, 0x79, 0xe2, 0x12, 0xbe, 0xc3, 0xd4, 0x10, 0x63, 0x66, 0x9f, 0xe3 },
+        .encoded = { 0x9504b329, 0x51c53cf2, 0xf35ae681, 0x460e8242, 0x12e279d1, 0x5825c3be, 0x666310d4, 0x5ebde39f },
+    },
+    {
+        .unencoded = { 0xda, 0xda, 0x71, 0x4a, 0x62, 0x33, 0xdd, 0x31, 0x87, 0xf3, 0x70, 0x12, 0x33, 0x3b, 0x3b, 0xe9, 0xed, 0xc4, 0x6e, 0x6a, 0xc7, 0xd5, 0x85, 0xfc },
+        .encoded = { 0x4a71dada, 0x4e6a3362, 0xf38731dd, 0x4bfa1270, 0xe93b3b33, 0x61f3c4ed, 0xd5c76a6e, 0x636ffc85 },
+    },
+    {
+        .unencoded = { 0x45, 0x64, 0x51, 0x34, 0x1c, 0x82, 0x81, 0x77, 0xf8, 0x89, 0xb1, 0x15, 0x82, 0x94, 0xdd, 0x64, 0xa2, 0x46, 0x0e, 0xfb, 0x1a, 0x70, 0x4b, 0x9f },
+        .encoded = { 0x34516445, 0x39da821c, 0x89f87781, 0x4f2315b1, 0x64dd9482, 0x474b46a2, 0x701afb0e, 0x5e4b9f4b },
+    },
+    {
+        .unencoded = { 0x89, 0x87, 0x15, 0xb6, 0x66, 0x34, 0x49, 0x18, 0x8b, 0x7b, 0xb2, 0xf6, 0x96, 0x1e, 0x2e, 0xf1, 0x03, 0x9d, 0x4e, 0x16, 0x32, 0xd6, 0x23, 0x22 },
+        .encoded = { 0xb6158789, 0x4eff3466, 0x7b8b1849, 0x63e5f6b2, 0xf12e1e96, 0x54c99d03, 0xd632164e, 0x42bd2223 },
+    },
+    {
+        .unencoded = { 0xa7, 0xa0, 0xb5, 0x21, 0xd2, 0xa3, 0x9f, 0x65, 0xa9, 0xeb, 0x72, 0xa2, 0x2e, 0xa6, 0xfb, 0x9c, 0x48, 0x7e, 0x68, 0x08, 0x7a, 0xb1, 0x4f, 0xbc },
+        .encoded = { 0x21b5a0a7, 0x4ce2a3d2, 0xeba9659f, 0x5868a272, 0x9cfba62e, 0x5fd97e48, 0xb17a0868, 0x5b58bc4f },
+    },
+    {
+        .unencoded = { 0xf7, 0x05, 0xe3, 0x6c, 0xb1, 0x55, 0xcb, 0x2f, 0x8d, 0x3e, 0x0b, 0x2e, 0x3e, 0xb7, 0x02, 0xf5, 0x91, 0xb1, 0xfe, 0x8b, 0x58, 0x50, 0xb2, 0x40 },
+        .encoded = { 0x6ce305f7, 0x569955b1, 0x3e8d2fcb, 0x56722e0b, 0xf502b73e, 0x535eb191, 0x50588bfe, 0x3a8f40b2 },
+    },
+    {
+        .unencoded = { 0x0f, 0x93, 0xb0, 0xd5, 0x60, 0xba, 0x40, 0x2a, 0x62, 0xa6, 0x92, 0x82, 0xb8, 0x91, 0x2c, 0xd7, 0x23, 0xdc, 0x6f, 0x7f, 0x2f, 0xbe, 0x41, 0xf5 },
+        .encoded = { 0xd5b0930f, 0x5123ba60, 0xa6622a40, 0x3bbe8292, 0xd72c91b8, 0x582ddc23, 0xbe2f7f6f, 0x6935f541 },
+    },
+    {
+        .unencoded = { 0x7f, 0x0c, 0x99, 0xde, 0xff, 0x2e, 0xd2, 0x1c, 0x48, 0x98, 0x70, 0x85, 0x15, 0x01, 0x2a, 0xfb, 0xcd, 0xf2, 0xa0, 0xf9, 0x0e, 0xbc, 0x9f, 0x0c },
+        .encoded = { 0xde990c7f, 0x6fe52eff, 0x98481cd2, 0x3deb8570, 0xfb2a0115, 0x61faf2cd, 0xbc0ef9a0, 0x55780c9f },
+    },
+    {
+        .unencoded = { 0x9a, 0x10, 0x92, 0x03, 0x81, 0xfe, 0x41, 0x57, 0x77, 0x02, 0xcb, 0x20, 0x67, 0xa4, 0x97, 0xf3, 0xf8, 0xc7, 0x0d, 0x65, 0xcd, 0xfc, 0x15, 0xef },
+        .encoded = { 0x0392109a, 0x4b64fe81, 0x02775741, 0x418820cb, 0xf397a467, 0x6998c7f8, 0xfccd650d, 0x6ba3ef15 },
+    },
+};
+
+TEST_CASE("Test 3/4 Coding Scheme Algorithm", "[bootloader_support]")
+{
+    const int num_tests = sizeof(coding_scheme_data)/sizeof(coding_scheme_test_t);
+    for (int i = 0; i < num_tests; i++) {
+        uint32_t result[8];
+        const coding_scheme_test_t *t = &coding_scheme_data[i];
+
+        printf("Test case %d...\n", i);
+        esp_err_t r = esp_efuse_apply_34_encoding(t->unencoded, result, sizeof(t->unencoded));
+        TEST_ASSERT_EQUAL_HEX(ESP_OK, r);
+        TEST_ASSERT_EQUAL_HEX32_ARRAY(t->encoded, result, 8);
+
+        // Do the same, 6 bytes at a time
+        for (int offs = 0; offs < sizeof(t->unencoded); offs += 6) {
+            bzero(result, sizeof(result));
+            r = esp_efuse_apply_34_encoding(t->unencoded + offs, result, 6);
+            TEST_ASSERT_EQUAL_HEX(ESP_OK, r);
+            TEST_ASSERT_EQUAL_HEX32_ARRAY(t->encoded + (offs / 6 * 2), result, 2);
+        }
+    }
+}

components/bootloader_support/test/test_verify_image.c

@@ -1,9 +1,10 @@
 /*
- * Tests for bootloader_support esp_image_basic_verify()
+ * Tests for bootloader_support esp_load(ESP_IMAGE_VERIFY, ...)
  */
 
 #include <esp_types.h>
 #include <stdio.h>
+#include "string.h"
 #include "rom/ets_sys.h"
 
 #include "freertos/FreeRTOS.h"
@@ -12,26 +13,103 @@
 #include "freertos/queue.h"
 #include "freertos/xtensa_api.h"
 #include "unity.h"
-
+#include "bootloader_common.h"
+#include "bootloader_util.h"
 #include "esp_partition.h"
 #include "esp_ota_ops.h"
 #include "esp_image_format.h"
 
 TEST_CASE("Verify bootloader image in flash", "[bootloader_support]")
 {
-    uint32_t image_len = 0;
-    TEST_ASSERT_EQUAL_HEX(ESP_OK, esp_image_basic_verify(0x1000, true, &image_len));
-    TEST_ASSERT_NOT_EQUAL(0, image_len);
+    const esp_partition_pos_t fake_bootloader_partition = {
+        .offset = ESP_BOOTLOADER_OFFSET,
+        .size = ESP_PARTITION_TABLE_OFFSET - ESP_BOOTLOADER_OFFSET,
+    };
+    esp_image_metadata_t data = { 0 };
+    TEST_ASSERT_EQUAL_HEX(ESP_OK, esp_image_load(ESP_IMAGE_VERIFY, &fake_bootloader_partition, &data));
+    TEST_ASSERT_NOT_EQUAL(0, data.image_len);
+
+    uint32_t bootloader_length = 0;
+    TEST_ASSERT_EQUAL_HEX(ESP_OK, esp_image_verify_bootloader(&bootloader_length));
+    TEST_ASSERT_EQUAL(data.image_len, bootloader_length);
 }
 
 TEST_CASE("Verify unit test app image", "[bootloader_support]")
 {
-    uint32_t image_len = 0;
+    esp_image_metadata_t data = { 0 };
     const esp_partition_t *running = esp_ota_get_running_partition();
     TEST_ASSERT_NOT_EQUAL(NULL, running);
+    const esp_partition_pos_t running_pos  = {
+        .offset = running->address,
+        .size = running->size,
+    };
 
-    TEST_ASSERT_EQUAL_HEX(ESP_OK, esp_image_basic_verify(running->address, true, &image_len));
-    TEST_ASSERT_NOT_EQUAL(0, image_len);
-    TEST_ASSERT_TRUE(image_len <= running->size);
+    TEST_ASSERT_EQUAL_HEX(ESP_OK, esp_image_load(ESP_IMAGE_VERIFY, &running_pos, &data));
+    TEST_ASSERT_NOT_EQUAL(0, data.image_len);
+    TEST_ASSERT_TRUE(data.image_len <= running->size);
 }
 
+void check_label_search (int num_test, const char *list, const char *t_label, bool result)
+{
+    // gen_esp32part.py trims up to 16 characters
+    // and the string may not have a null terminal symbol.
+    // below is cutting as it does the generator.
+    char label[16 + 1] = {0};
+    strncpy(label, t_label, sizeof(label) - 1);
+
+    bool ret = bootloader_common_label_search(list, label);
+    if (ret != result) {
+        printf("%d) %s  |  %s \n", num_test, list, label);
+    }
+    TEST_ASSERT_MESSAGE(ret == result, "Test failed");
+}
+
+TEST_CASE("Test label_search", "[bootloader_support]")
+{
+    TEST_ASSERT_FALSE(bootloader_common_label_search(NULL, NULL));
+    TEST_ASSERT_FALSE(bootloader_common_label_search("nvs", NULL));
+
+    check_label_search(1,   "nvs",                   "nvs",      true);
+    check_label_search(2,   "nvs, ",                 "nvs",      true);
+    check_label_search(3,   "nvs1",                  "nvs",      false);
+    check_label_search(3,   "nvs1, ",                "nvs",      false);
+    check_label_search(4,   "nvs1nvs1, phy",         "nvs1",     false);
+    check_label_search(5,   "nvs1, nvs1, phy",       "nvs1",     true);
+    check_label_search(6,   "nvs12, nvs12, phy",     "nvs1",     false);
+    check_label_search(7,   "nvs12, nvs1, phy",      "nvs1",     true);
+    check_label_search(8,   "nvs12, nvs3, phy, nvs1","nvs1",     true);
+    check_label_search(9,   "nvs1nvs1, phy, nvs",    "nvs",      true);
+    check_label_search(10,  "nvs1nvs1, phy, nvs1",   "nvs",      false);
+    check_label_search(11,  "nvs1,  nvs, phy, nvs1", "nvs",      true);
+    check_label_search(12,  "nvs1, nvs2,  phy,  nvs","nvs",      true);
+    check_label_search(13,  "ota_data, backup_nvs",  "nvs",      false);
+    check_label_search(14,  "nvs1, nvs2, ota, nvs",  "vs1",      false);
+
+    check_label_search(20,  "12345678901234, phy, nvs1",    "12345678901234",       true);
+    check_label_search(21,  "123456789012345, phy, nvs1",   "123456789012345",      true);
+    check_label_search(22,  "1234567890123456, phy, nvs1",  "1234567890123456",     true);
+    check_label_search(23,  "12345678901234567, phy, nvs1", "12345678901234567",    false);
+    check_label_search(24,  "1234567890123456, phy, nvs1",  "12345678901234567",    true);
+    check_label_search(25,  "phy, 1234567890123456, nvs1",  "12345678901234567",    true);
+
+}
+
+
+TEST_CASE("Test regions_overlap", "[bootloader_support]")
+{
+    TEST_ASSERT( bootloader_util_regions_overlap(1, 2, 1, 2) );
+
+    TEST_ASSERT( bootloader_util_regions_overlap(1, 2, 0, 2) );
+    TEST_ASSERT( bootloader_util_regions_overlap(1, 2, 1, 3) );
+    TEST_ASSERT( bootloader_util_regions_overlap(1, 2, 0, 3) );
+
+    TEST_ASSERT( bootloader_util_regions_overlap(0, 2, 1, 2) );
+    TEST_ASSERT( bootloader_util_regions_overlap(1, 3, 1, 2) );
+    TEST_ASSERT( bootloader_util_regions_overlap(0, 3, 1, 2) );
+
+    TEST_ASSERT( !bootloader_util_regions_overlap(2, 3, 1, 2) );
+    TEST_ASSERT( !bootloader_util_regions_overlap(1, 2, 2, 3) );
+
+    TEST_ASSERT( !bootloader_util_regions_overlap(3, 4, 1, 2) );
+    TEST_ASSERT( !bootloader_util_regions_overlap(1, 2, 3, 4) );
+}

components/bt/CMakeLists.txt

@@ -0,0 +1,294 @@
+if(CONFIG_BT_ENABLED)
+
+    set(COMPONENT_SRCS "bt.c")
+    set(COMPONENT_ADD_INCLUDEDIRS include)
+
+    if(CONFIG_BLUEDROID_ENABLED)
+
+        list(APPEND COMPONENT_PRIV_INCLUDEDIRS
+            bluedroid/bta/include
+            bluedroid/bta/ar/include
+            bluedroid/bta/av/include
+            bluedroid/bta/dm/include
+            bluedroid/bta/gatt/include
+            bluedroid/bta/hf_client/include
+            bluedroid/bta/hh/include
+            bluedroid/bta/jv/include
+            bluedroid/bta/sdp/include
+            bluedroid/bta/sys/include
+            bluedroid/device/include
+            bluedroid/hci/include
+            bluedroid/osi/include
+            bluedroid/external/sbc/decoder/include
+            bluedroid/external/sbc/encoder/include
+            bluedroid/btc/profile/esp/blufi/include
+            bluedroid/btc/profile/esp/include
+            bluedroid/btc/profile/std/a2dp/include
+            bluedroid/btc/profile/std/include
+            bluedroid/btc/include
+            bluedroid/stack/btm/include
+            bluedroid/stack/gap/include
+            bluedroid/stack/gatt/include
+            bluedroid/stack/l2cap/include
+            bluedroid/stack/sdp/include
+            bluedroid/stack/smp/include
+            bluedroid/stack/avct/include
+            bluedroid/stack/avrc/include
+            bluedroid/stack/avdt/include
+            bluedroid/stack/a2dp/include
+            bluedroid/stack/rfcomm/include
+            bluedroid/stack/include
+            bluedroid/common/include)
+
+        list(APPEND COMPONENT_ADD_INCLUDEDIRS bluedroid/api/include/api)
+
+        list(APPEND COMPONENT_SRCS "bluedroid/api/esp_a2dp_api.c"
+                   "bluedroid/api/esp_avrc_api.c"
+                   "bluedroid/api/esp_blufi_api.c"
+                   "bluedroid/api/esp_bt_device.c"
+                   "bluedroid/api/esp_bt_main.c"
+                   "bluedroid/api/esp_gap_ble_api.c"
+                   "bluedroid/api/esp_gap_bt_api.c"
+                   "bluedroid/api/esp_gatt_common_api.c"
+                   "bluedroid/api/esp_gattc_api.c"
+                   "bluedroid/api/esp_gatts_api.c"
+                   "bluedroid/api/esp_hf_client_api.c"
+                   "bluedroid/api/esp_spp_api.c"
+                   "bluedroid/bta/ar/bta_ar.c"
+                   "bluedroid/bta/av/bta_av_aact.c"
+                   "bluedroid/bta/av/bta_av_act.c"
+                   "bluedroid/bta/av/bta_av_api.c"
+                   "bluedroid/bta/av/bta_av_cfg.c"
+                   "bluedroid/bta/av/bta_av_ci.c"
+                   "bluedroid/bta/av/bta_av_main.c"
+                   "bluedroid/bta/av/bta_av_sbc.c"
+                   "bluedroid/bta/av/bta_av_ssm.c"
+                   "bluedroid/bta/dm/bta_dm_act.c"
+                   "bluedroid/bta/dm/bta_dm_api.c"
+                   "bluedroid/bta/dm/bta_dm_cfg.c"
+                   "bluedroid/bta/dm/bta_dm_ci.c"
+                   "bluedroid/bta/dm/bta_dm_co.c"
+                   "bluedroid/bta/dm/bta_dm_main.c"
+                   "bluedroid/bta/dm/bta_dm_pm.c"
+                   "bluedroid/bta/dm/bta_dm_sco.c"
+                   "bluedroid/bta/gatt/bta_gatt_common.c"
+                   "bluedroid/bta/gatt/bta_gattc_act.c"
+                   "bluedroid/bta/gatt/bta_gattc_api.c"
+                   "bluedroid/bta/gatt/bta_gattc_cache.c"
+                   "bluedroid/bta/gatt/bta_gattc_ci.c"
+                   "bluedroid/bta/gatt/bta_gattc_co.c"
+                   "bluedroid/bta/gatt/bta_gattc_main.c"
+                   "bluedroid/bta/gatt/bta_gattc_utils.c"
+                   "bluedroid/bta/gatt/bta_gatts_act.c"
+                   "bluedroid/bta/gatt/bta_gatts_api.c"
+                   "bluedroid/bta/gatt/bta_gatts_co.c"
+                   "bluedroid/bta/gatt/bta_gatts_main.c"
+                   "bluedroid/bta/gatt/bta_gatts_utils.c"
+                   "bluedroid/bta/hh/bta_hh_act.c"
+                   "bluedroid/bta/hh/bta_hh_api.c"
+                   "bluedroid/bta/hh/bta_hh_cfg.c"
+                   "bluedroid/bta/hh/bta_hh_le.c"
+                   "bluedroid/bta/hh/bta_hh_main.c"
+                   "bluedroid/bta/hh/bta_hh_utils.c"
+                   "bluedroid/bta/jv/bta_jv_act.c"
+                   "bluedroid/bta/jv/bta_jv_api.c"
+                   "bluedroid/bta/jv/bta_jv_cfg.c"
+                   "bluedroid/bta/jv/bta_jv_main.c"
+                   "bluedroid/bta/hf_client/bta_hf_client_act.c"
+                   "bluedroid/bta/hf_client/bta_hf_client_api.c"
+                   "bluedroid/bta/hf_client/bta_hf_client_at.c"
+                   "bluedroid/bta/hf_client/bta_hf_client_cmd.c"
+                   "bluedroid/bta/hf_client/bta_hf_client_main.c"
+                   "bluedroid/bta/hf_client/bta_hf_client_rfc.c"
+                   "bluedroid/bta/hf_client/bta_hf_client_sco.c"
+                   "bluedroid/bta/hf_client/bta_hf_client_sdp.c"
+                   "bluedroid/bta/sdp/bta_sdp.c"
+                   "bluedroid/bta/sdp/bta_sdp_act.c"
+                   "bluedroid/bta/sdp/bta_sdp_api.c"
+                   "bluedroid/bta/sdp/bta_sdp_cfg.c"
+                   "bluedroid/bta/sys/bta_sys_conn.c"
+                   "bluedroid/bta/sys/bta_sys_main.c"
+                   "bluedroid/bta/sys/utl.c"
+                   "bluedroid/btc/core/btc_alarm.c"
+                   "bluedroid/btc/core/btc_ble_storage.c"
+                   "bluedroid/btc/core/btc_config.c"
+                   "bluedroid/btc/core/btc_dev.c"
+                   "bluedroid/btc/core/btc_dm.c"
+                   "bluedroid/btc/core/btc_main.c"
+                   "bluedroid/btc/core/btc_manage.c"
+                   "bluedroid/btc/core/btc_profile_queue.c"
+                   "bluedroid/btc/core/btc_sec.c"
+                   "bluedroid/btc/core/btc_sm.c"
+                   "bluedroid/btc/core/btc_storage.c"
+                   "bluedroid/btc/core/btc_task.c"
+                   "bluedroid/btc/core/btc_util.c"
+                   "bluedroid/btc/profile/esp/blufi/blufi_prf.c"
+                   "bluedroid/btc/profile/esp/blufi/blufi_protocol.c"
+                   "bluedroid/btc/profile/std/a2dp/bta_av_co.c"
+                   "bluedroid/btc/profile/std/a2dp/btc_a2dp.c"
+                   "bluedroid/btc/profile/std/a2dp/btc_a2dp_control.c"
+                   "bluedroid/btc/profile/std/a2dp/btc_a2dp_sink.c"
+                   "bluedroid/btc/profile/std/a2dp/btc_a2dp_source.c"
+                   "bluedroid/btc/profile/std/a2dp/btc_av.c"
+                   "bluedroid/btc/profile/std/avrc/btc_avrc.c"
+                   "bluedroid/btc/profile/std/hf_client/btc_hf_client.c"
+                   "bluedroid/btc/profile/std/hf_client/bta_hf_client_co.c"
+                   "bluedroid/btc/profile/std/gap/btc_gap_ble.c"
+                   "bluedroid/btc/profile/std/gap/btc_gap_bt.c"
+                   "bluedroid/btc/profile/std/gatt/btc_gatt_common.c"
+                   "bluedroid/btc/profile/std/gatt/btc_gatt_util.c"
+                   "bluedroid/btc/profile/std/gatt/btc_gattc.c"
+                   "bluedroid/btc/profile/std/gatt/btc_gatts.c"
+                   "bluedroid/btc/profile/std/spp/btc_spp.c"
+                   "bluedroid/device/bdaddr.c"
+                   "bluedroid/device/controller.c"
+                   "bluedroid/device/interop.c"
+                   "bluedroid/external/sbc/decoder/srce/alloc.c"
+                   "bluedroid/external/sbc/decoder/srce/bitalloc-sbc.c"
+                   "bluedroid/external/sbc/decoder/srce/bitalloc.c"
+                   "bluedroid/external/sbc/decoder/srce/bitstream-decode.c"
+                   "bluedroid/external/sbc/decoder/srce/decoder-oina.c"
+                   "bluedroid/external/sbc/decoder/srce/decoder-private.c"
+                   "bluedroid/external/sbc/decoder/srce/decoder-sbc.c"
+                   "bluedroid/external/sbc/decoder/srce/dequant.c"
+                   "bluedroid/external/sbc/decoder/srce/framing-sbc.c"
+                   "bluedroid/external/sbc/decoder/srce/framing.c"
+                   "bluedroid/external/sbc/decoder/srce/oi_codec_version.c"
+                   "bluedroid/external/sbc/decoder/srce/synthesis-8-generated.c"
+                   "bluedroid/external/sbc/decoder/srce/synthesis-dct8.c"
+                   "bluedroid/external/sbc/decoder/srce/synthesis-sbc.c"
+                   "bluedroid/external/sbc/encoder/srce/sbc_analysis.c"
+                   "bluedroid/external/sbc/encoder/srce/sbc_dct.c"
+                   "bluedroid/external/sbc/encoder/srce/sbc_dct_coeffs.c"
+                   "bluedroid/external/sbc/encoder/srce/sbc_enc_bit_alloc_mono.c"
+                   "bluedroid/external/sbc/encoder/srce/sbc_enc_bit_alloc_ste.c"
+                   "bluedroid/external/sbc/encoder/srce/sbc_enc_coeffs.c"
+                   "bluedroid/external/sbc/encoder/srce/sbc_encoder.c"
+                   "bluedroid/external/sbc/encoder/srce/sbc_packing.c"
+                   "bluedroid/hci/buffer_allocator.c"
+                   "bluedroid/hci/hci_audio.c"
+                   "bluedroid/hci/hci_hal_h4.c"
+                   "bluedroid/hci/hci_layer.c"
+                   "bluedroid/hci/hci_packet_factory.c"
+                   "bluedroid/hci/hci_packet_parser.c"
+                   "bluedroid/hci/packet_fragmenter.c"
+                   "bluedroid/main/bte_init.c"
+                   "bluedroid/main/bte_main.c"
+                   "bluedroid/osi/alarm.c"
+                   "bluedroid/osi/allocator.c"
+                   "bluedroid/osi/buffer.c"
+                   "bluedroid/osi/config.c"
+                   "bluedroid/osi/fixed_queue.c"
+                   "bluedroid/osi/future.c"
+                   "bluedroid/osi/hash_functions.c"
+                   "bluedroid/osi/hash_map.c"
+                   "bluedroid/osi/list.c"
+                   "bluedroid/osi/mutex.c"
+                   "bluedroid/osi/osi.c"
+                   "bluedroid/osi/semaphore.c"
+                   "bluedroid/stack/a2dp/a2d_api.c"
+                   "bluedroid/stack/a2dp/a2d_sbc.c"
+                   "bluedroid/stack/avct/avct_api.c"
+                   "bluedroid/stack/avct/avct_ccb.c"
+                   "bluedroid/stack/avct/avct_l2c.c"
+                   "bluedroid/stack/avct/avct_lcb.c"
+                   "bluedroid/stack/avct/avct_lcb_act.c"
+                   "bluedroid/stack/avdt/avdt_ad.c"
+                   "bluedroid/stack/avdt/avdt_api.c"
+                   "bluedroid/stack/avdt/avdt_ccb.c"
+                   "bluedroid/stack/avdt/avdt_ccb_act.c"
+                   "bluedroid/stack/avdt/avdt_l2c.c"
+                   "bluedroid/stack/avdt/avdt_msg.c"
+                   "bluedroid/stack/avdt/avdt_scb.c"
+                   "bluedroid/stack/avdt/avdt_scb_act.c"
+                   "bluedroid/stack/avrc/avrc_api.c"
+                   "bluedroid/stack/avrc/avrc_bld_ct.c"
+                   "bluedroid/stack/avrc/avrc_bld_tg.c"
+                   "bluedroid/stack/avrc/avrc_opt.c"
+                   "bluedroid/stack/avrc/avrc_pars_ct.c"
+                   "bluedroid/stack/avrc/avrc_pars_tg.c"
+                   "bluedroid/stack/avrc/avrc_sdp.c"
+                   "bluedroid/stack/avrc/avrc_utils.c"
+                   "bluedroid/stack/btm/btm_acl.c"
+                   "bluedroid/stack/btm/btm_ble.c"
+                   "bluedroid/stack/btm/btm_ble_addr.c"
+                   "bluedroid/stack/btm/btm_ble_adv_filter.c"
+                   "bluedroid/stack/btm/btm_ble_batchscan.c"
+                   "bluedroid/stack/btm/btm_ble_bgconn.c"
+                   "bluedroid/stack/btm/btm_ble_cont_energy.c"
+                   "bluedroid/stack/btm/btm_ble_gap.c"
+                   "bluedroid/stack/btm/btm_ble_multi_adv.c"
+                   "bluedroid/stack/btm/btm_ble_privacy.c"
+                   "bluedroid/stack/btm/btm_dev.c"
+                   "bluedroid/stack/btm/btm_devctl.c"
+                   "bluedroid/stack/btm/btm_inq.c"
+                   "bluedroid/stack/btm/btm_main.c"
+                   "bluedroid/stack/btm/btm_pm.c"
+                   "bluedroid/stack/btm/btm_sco.c"
+                   "bluedroid/stack/btm/btm_sec.c"
+                   "bluedroid/stack/btu/btu_hcif.c"
+                   "bluedroid/stack/btu/btu_init.c"
+                   "bluedroid/stack/btu/btu_task.c"
+                   "bluedroid/stack/gap/gap_api.c"
+                   "bluedroid/stack/gap/gap_ble.c"
+                   "bluedroid/stack/gap/gap_conn.c"
+                   "bluedroid/stack/gap/gap_utils.c"
+                   "bluedroid/stack/gatt/att_protocol.c"
+                   "bluedroid/stack/gatt/gatt_api.c"
+                   "bluedroid/stack/gatt/gatt_attr.c"
+                   "bluedroid/stack/gatt/gatt_auth.c"
+                   "bluedroid/stack/gatt/gatt_cl.c"
+                   "bluedroid/stack/gatt/gatt_db.c"
+                   "bluedroid/stack/gatt/gatt_main.c"
+                   "bluedroid/stack/gatt/gatt_sr.c"
+                   "bluedroid/stack/gatt/gatt_utils.c"
+                   "bluedroid/stack/hcic/hciblecmds.c"
+                   "bluedroid/stack/hcic/hcicmds.c"
+                   "bluedroid/stack/l2cap/l2c_api.c"
+                   "bluedroid/stack/l2cap/l2c_ble.c"
+                   "bluedroid/stack/l2cap/l2c_csm.c"
+                   "bluedroid/stack/l2cap/l2c_fcr.c"
+                   "bluedroid/stack/l2cap/l2c_link.c"
+                   "bluedroid/stack/l2cap/l2c_main.c"
+                   "bluedroid/stack/l2cap/l2c_ucd.c"
+                   "bluedroid/stack/l2cap/l2c_utils.c"
+                   "bluedroid/stack/l2cap/l2cap_client.c"
+                   "bluedroid/stack/rfcomm/port_api.c"
+                   "bluedroid/stack/rfcomm/port_rfc.c"
+                   "bluedroid/stack/rfcomm/port_utils.c"
+                   "bluedroid/stack/rfcomm/rfc_l2cap_if.c"
+                   "bluedroid/stack/rfcomm/rfc_mx_fsm.c"
+                   "bluedroid/stack/rfcomm/rfc_port_fsm.c"
+                   "bluedroid/stack/rfcomm/rfc_port_if.c"
+                   "bluedroid/stack/rfcomm/rfc_ts_frames.c"
+                   "bluedroid/stack/rfcomm/rfc_utils.c"
+                   "bluedroid/stack/sdp/sdp_api.c"
+                   "bluedroid/stack/sdp/sdp_db.c"
+                   "bluedroid/stack/sdp/sdp_discovery.c"
+                   "bluedroid/stack/sdp/sdp_main.c"
+                   "bluedroid/stack/sdp/sdp_server.c"
+                   "bluedroid/stack/sdp/sdp_utils.c"
+                   "bluedroid/stack/smp/aes.c"
+                   "bluedroid/stack/smp/p_256_curvepara.c"
+                   "bluedroid/stack/smp/p_256_ecc_pp.c"
+                   "bluedroid/stack/smp/p_256_multprecision.c"
+                   "bluedroid/stack/smp/smp_act.c"
+                   "bluedroid/stack/smp/smp_api.c"
+                   "bluedroid/stack/smp/smp_br_main.c"
+                   "bluedroid/stack/smp/smp_cmac.c"
+                   "bluedroid/stack/smp/smp_keys.c"
+                   "bluedroid/stack/smp/smp_l2c.c"
+                   "bluedroid/stack/smp/smp_main.c"
+                   "bluedroid/stack/smp/smp_utils.c")
+    endif()
+endif()
+
+# requirements can't depend on config
+set(COMPONENT_PRIV_REQUIRES nvs_flash)
+
+register_component()
+
+if(CONFIG_BT_ENABLED)
+    target_link_libraries(bt "-L${CMAKE_CURRENT_LIST_DIR}/lib")
+    target_link_libraries(bt btdm_app)
+endif()

components/bt/bluedroid/api/esp_a2dp_api.c

@@ -12,30 +12,17 @@
 // See the License for the specific language governing permissions and
 // limitations under the License.
 
-#include "bt_target.h"
+#include "common/bt_target.h"
 #include <string.h>
 #include "esp_err.h"
 #include "esp_a2dp_api.h"
 #include "esp_bt_main.h"
-#include "btc_manage.h"
+#include "btc/btc_manage.h"
 #include "btc_av.h"
 
 #if BTC_AV_INCLUDED
 
-esp_err_t esp_a2d_register_callback(esp_a2d_cb_t callback)
-{
-    if (esp_bluedroid_get_status() != ESP_BLUEDROID_STATUS_ENABLED) {
-        return ESP_ERR_INVALID_STATE;
-    }
-        
-    if (callback == NULL) {
-        return ESP_FAIL;
-    }
-
-    btc_profile_cb_set(BTC_PID_A2DP, callback);
-    return ESP_OK;
-}
-
+#if BTC_AV_SINK_INCLUDED
 esp_err_t esp_a2d_sink_init(void)
 {
     if (esp_bluedroid_get_status() != ESP_BLUEDROID_STATUS_ENABLED) {
@@ -43,7 +30,7 @@ esp_err_t esp_a2d_sink_init(void)
     }
 
     btc_msg_t msg;
-    
+
     msg.sig = BTC_SIG_API_CALL;
     msg.pid = BTC_PID_A2DP;
     msg.act = BTC_AV_SINK_API_INIT_EVT;
@@ -58,9 +45,9 @@ esp_err_t esp_a2d_sink_deinit(void)
     if (esp_bluedroid_get_status() != ESP_BLUEDROID_STATUS_ENABLED) {
         return ESP_ERR_INVALID_STATE;
     }
-    
+
     btc_msg_t msg;
-    
+
     msg.sig = BTC_SIG_API_CALL;
     msg.pid = BTC_PID_A2DP;
     msg.act = BTC_AV_SINK_API_DEINIT_EVT;
@@ -70,7 +57,7 @@ esp_err_t esp_a2d_sink_deinit(void)
     return (stat == BT_STATUS_SUCCESS) ? ESP_OK : ESP_FAIL;
 }
 
-esp_err_t esp_a2d_register_data_callback(esp_a2d_data_cb_t callback)
+esp_err_t esp_a2d_sink_register_data_callback(esp_a2d_sink_data_cb_t callback)
 {
     if (esp_bluedroid_get_status() != ESP_BLUEDROID_STATUS_ENABLED) {
         return ESP_ERR_INVALID_STATE;
@@ -82,11 +69,11 @@ esp_err_t esp_a2d_register_data_callback(esp_a2d_data_cb_t callback)
     msg.act = BTC_AV_SINK_API_REG_DATA_CB_EVT;
 
     btc_av_args_t arg;
-    memset(&arg, 0, sizeof(btc_av_args_t));    
+    memset(&arg, 0, sizeof(btc_av_args_t));
     arg.data_cb = callback;
-    
+
     /* Switch to BTC context */
-    bt_status_t stat = btc_transfer_context(&msg, &arg, sizeof(btc_msg_t), NULL);
+    bt_status_t stat = btc_transfer_context(&msg, &arg, sizeof(btc_av_args_t), NULL);
     return (stat == BT_STATUS_SUCCESS) ? ESP_OK : ESP_FAIL;
 }
 
@@ -95,17 +82,17 @@ esp_err_t esp_a2d_sink_connect(esp_bd_addr_t remote_bda)
     if (esp_bluedroid_get_status() != ESP_BLUEDROID_STATUS_ENABLED) {
         return ESP_ERR_INVALID_STATE;
     }
-    
+
     bt_status_t stat;
     btc_av_args_t arg;
     btc_msg_t msg;
-    
+
     msg.sig = BTC_SIG_API_CALL;
     msg.pid = BTC_PID_A2DP;
     msg.act = BTC_AV_SINK_API_CONNECT_EVT;
 
     memset(&arg, 0, sizeof(btc_av_args_t));
-    
+
     /* Switch to BTC context */
     memcpy(&(arg.connect), remote_bda, sizeof(bt_bdaddr_t));
     stat = btc_transfer_context(&msg, &arg, sizeof(btc_av_args_t), NULL);
@@ -117,10 +104,10 @@ esp_err_t esp_a2d_sink_disconnect(esp_bd_addr_t remote_bda)
     if (esp_bluedroid_get_status() != ESP_BLUEDROID_STATUS_ENABLED) {
         return ESP_ERR_INVALID_STATE;
     }
-        
+
     bt_status_t stat;
     btc_msg_t msg;
-    
+
     msg.sig = BTC_SIG_API_CALL;
     msg.pid = BTC_PID_A2DP;
     msg.act = BTC_AV_SINK_API_DISCONNECT_EVT;
@@ -130,4 +117,139 @@ esp_err_t esp_a2d_sink_disconnect(esp_bd_addr_t remote_bda)
     return (stat == BT_STATUS_SUCCESS) ? ESP_OK : ESP_FAIL;
 }
 
+#endif /* BTC_AV_SINK_INCLUDED */
+
+esp_err_t esp_a2d_register_callback(esp_a2d_cb_t callback)
+{
+    if (esp_bluedroid_get_status() != ESP_BLUEDROID_STATUS_ENABLED) {
+        return ESP_ERR_INVALID_STATE;
+    }
+
+    if (callback == NULL) {
+        return ESP_FAIL;
+    }
+
+    btc_profile_cb_set(BTC_PID_A2DP, callback);
+    return ESP_OK;
+}
+
+esp_err_t esp_a2d_media_ctrl(esp_a2d_media_ctrl_t ctrl)
+{
+    if (esp_bluedroid_get_status() != ESP_BLUEDROID_STATUS_ENABLED) {
+        return ESP_ERR_INVALID_STATE;
+    }
+
+    bt_status_t stat;
+    btc_av_args_t arg;
+    btc_msg_t msg;
+
+    msg.sig = BTC_SIG_API_CALL;
+    msg.pid = BTC_PID_A2DP;
+    msg.act = BTC_AV_API_MEDIA_CTRL_EVT;
+
+    memset(&arg, 0, sizeof(btc_av_args_t));
+
+    /* Switch to BTC context */
+    arg.ctrl = ctrl;
+    stat = btc_transfer_context(&msg, &arg, sizeof(btc_av_args_t), NULL);
+    return (stat == BT_STATUS_SUCCESS) ? ESP_OK : ESP_FAIL;
+}
+
+#if BTC_AV_SRC_INCLUDED
+esp_err_t esp_a2d_source_init(void)
+{
+    if (esp_bluedroid_get_status() != ESP_BLUEDROID_STATUS_ENABLED) {
+        return ESP_ERR_INVALID_STATE;
+    }
+
+    btc_msg_t msg;
+
+    msg.sig = BTC_SIG_API_CALL;
+    msg.pid = BTC_PID_A2DP;
+    msg.act = BTC_AV_SRC_API_INIT_EVT;
+
+    /* Switch to BTC context */
+    bt_status_t stat = btc_transfer_context(&msg, NULL, 0, NULL);
+    return (stat == BT_STATUS_SUCCESS) ? ESP_OK : ESP_FAIL;
+}
+
+esp_err_t esp_a2d_source_deinit(void)
+{
+    if (esp_bluedroid_get_status() != ESP_BLUEDROID_STATUS_ENABLED) {
+        return ESP_ERR_INVALID_STATE;
+    }
+
+    btc_msg_t msg;
+
+    msg.sig = BTC_SIG_API_CALL;
+    msg.pid = BTC_PID_A2DP;
+    msg.act = BTC_AV_SRC_API_DEINIT_EVT;
+
+    /* Switch to BTC context */
+    bt_status_t stat = btc_transfer_context(&msg, NULL, 0, NULL);
+    return (stat == BT_STATUS_SUCCESS) ? ESP_OK : ESP_FAIL;
+}
+
+esp_err_t esp_a2d_source_connect(esp_bd_addr_t remote_bda)
+{
+    if (esp_bluedroid_get_status() != ESP_BLUEDROID_STATUS_ENABLED) {
+        return ESP_ERR_INVALID_STATE;
+    }
+
+    bt_status_t stat;
+    btc_av_args_t arg;
+    btc_msg_t msg;
+
+    msg.sig = BTC_SIG_API_CALL;
+    msg.pid = BTC_PID_A2DP;
+    msg.act = BTC_AV_SRC_API_CONNECT_EVT;
+
+    memset(&arg, 0, sizeof(btc_av_args_t));
+
+    /* Switch to BTC context */
+    memcpy(&(arg.src_connect), remote_bda, sizeof(bt_bdaddr_t));
+    stat = btc_transfer_context(&msg, &arg, sizeof(btc_av_args_t), NULL);
+    return (stat == BT_STATUS_SUCCESS) ? ESP_OK : ESP_FAIL;
+}
+
+esp_err_t esp_a2d_source_disconnect(esp_bd_addr_t remote_bda)
+{
+    if (esp_bluedroid_get_status() != ESP_BLUEDROID_STATUS_ENABLED) {
+        return ESP_ERR_INVALID_STATE;
+    }
+
+    bt_status_t stat;
+    btc_msg_t msg;
+
+    msg.sig = BTC_SIG_API_CALL;
+    msg.pid = BTC_PID_A2DP;
+    msg.act = BTC_AV_SRC_API_DISCONNECT_EVT;
+
+    /* Switch to BTC context */
+    stat = btc_transfer_context(&msg, NULL, 0, NULL);
+    return (stat == BT_STATUS_SUCCESS) ? ESP_OK : ESP_FAIL;
+}
+
+esp_err_t esp_a2d_source_register_data_callback(esp_a2d_source_data_cb_t callback)
+{
+    if (esp_bluedroid_get_status() != ESP_BLUEDROID_STATUS_ENABLED) {
+        return ESP_ERR_INVALID_STATE;
+    }
+
+    btc_msg_t msg;
+    msg.sig = BTC_SIG_API_CALL;
+    msg.pid = BTC_PID_A2DP;
+    msg.act = BTC_AV_SRC_API_REG_DATA_CB_EVT;
+
+    btc_av_args_t arg;
+    memset(&arg, 0, sizeof(btc_av_args_t));
+    arg.src_data_cb = callback;
+
+    /* Switch to BTC context */
+    bt_status_t stat = btc_transfer_context(&msg, &arg, sizeof(btc_av_args_t), NULL);
+    return (stat == BT_STATUS_SUCCESS) ? ESP_OK : ESP_FAIL;
+}
+
+#endif /* BTC_AV_SRC_INCLUDED */
+
 #endif /* #if BTC_AV_INCLUDED */

components/bt/bluedroid/api/esp_avrc_api.c

@@ -12,12 +12,12 @@
 // See the License for the specific language governing permissions and
 // limitations under the License.
 
-#include "bt_target.h"
+#include "common/bt_target.h"
 #include <string.h>
 #include "esp_err.h"
 #include "esp_avrc_api.h"
 #include "esp_bt_main.h"
-#include "btc_manage.h"
+#include "btc/btc_manage.h"
 #include "btc_avrc.h"
 
 #if BTC_AV_INCLUDED
@@ -27,7 +27,7 @@ esp_err_t esp_avrc_ct_register_callback(esp_avrc_ct_cb_t callback)
     if (esp_bluedroid_get_status() != ESP_BLUEDROID_STATUS_ENABLED) {
         return ESP_ERR_INVALID_STATE;
     }
-        
+
     if (callback == NULL) {
         return ESP_FAIL;
     }
@@ -43,7 +43,7 @@ esp_err_t esp_avrc_ct_init(void)
     }
 
     btc_msg_t msg;
-    
+
     msg.sig = BTC_SIG_API_CALL;
     msg.pid = BTC_PID_AVRC;
     msg.act = BTC_AVRC_CTRL_API_INIT_EVT;
@@ -60,7 +60,7 @@ esp_err_t esp_avrc_ct_deinit(void)
     }
 
     btc_msg_t msg;
-    
+
     msg.sig = BTC_SIG_API_CALL;
     msg.pid = BTC_PID_AVRC;
     msg.act = BTC_AVRC_CTRL_API_DEINIT_EVT;
@@ -70,12 +70,97 @@ esp_err_t esp_avrc_ct_deinit(void)
     return (stat == BT_STATUS_SUCCESS) ? ESP_OK : ESP_FAIL;
 }
 
+esp_err_t esp_avrc_ct_send_set_player_value_cmd(uint8_t tl, uint8_t attr_id, uint8_t value_id)
+{
+    if (esp_bluedroid_get_status() != ESP_BLUEDROID_STATUS_ENABLED) {
+        return ESP_ERR_INVALID_STATE;
+    }
+
+    if (tl >= 16 || attr_id > ESP_AVRC_PS_MAX_ATTR - 1) {
+        return ESP_FAIL;
+    }
+
+    btc_msg_t msg;
+    msg.sig = BTC_SIG_API_CALL;
+    msg.pid = BTC_PID_AVRC;
+    msg.act = BTC_AVRC_CTRL_API_SET_PLAYER_SETTING_EVT;
+
+    btc_avrc_args_t arg;
+    memset(&arg, 0, sizeof(btc_avrc_args_t));
+
+    arg.ps_cmd.tl = tl;
+    arg.ps_cmd.attr_id = attr_id;
+    arg.ps_cmd.value_id = value_id;
+
+    /* Switch to BTC context */
+    bt_status_t stat = btc_transfer_context(&msg, &arg, sizeof(btc_avrc_args_t), NULL);
+    return (stat == BT_STATUS_SUCCESS) ? ESP_OK : ESP_FAIL;
+}
+
+
+esp_err_t esp_avrc_ct_send_register_notification_cmd(uint8_t tl, uint8_t event_id, uint32_t event_parameter)
+{
+    if (esp_bluedroid_get_status() != ESP_BLUEDROID_STATUS_ENABLED) {
+        return ESP_ERR_INVALID_STATE;
+    }
+
+    if (tl >= 16 || event_id > ESP_AVRC_RN_MAX_EVT - 1) {
+        return ESP_FAIL;
+    }
+
+    btc_msg_t msg;
+    msg.sig = BTC_SIG_API_CALL;
+    msg.pid = BTC_PID_AVRC;
+    msg.act = BTC_AVRC_NOTIFY_API_SND_REG_NOTIFY_EVT;
+
+    btc_avrc_args_t arg;
+    memset(&arg, 0, sizeof(btc_avrc_args_t));
+
+    arg.rn_cmd.tl = tl;
+    arg.rn_cmd.event_id = event_id;
+    arg.rn_cmd.event_parameter = event_parameter;
+
+    /* Switch to BTC context */
+    bt_status_t stat = btc_transfer_context(&msg, &arg, sizeof(btc_avrc_args_t), NULL);
+    return (stat == BT_STATUS_SUCCESS) ? ESP_OK : ESP_FAIL;
+}
+
+esp_err_t esp_avrc_ct_send_metadata_cmd(uint8_t tl, uint8_t attr_mask)
+{
+    if (esp_bluedroid_get_status() != ESP_BLUEDROID_STATUS_ENABLED) {
+        return ESP_ERR_INVALID_STATE;
+    }
+
+    if (tl >= 16) {
+        return ESP_FAIL;
+    }
+
+    btc_msg_t msg;
+    msg.sig = BTC_SIG_API_CALL;
+    msg.pid = BTC_PID_AVRC;
+    msg.act = BTC_AVRC_STATUS_API_SND_META_EVT;
+
+    btc_avrc_args_t arg;
+    memset(&arg, 0, sizeof(btc_avrc_args_t));
+
+    arg.md_cmd.tl = tl;
+    arg.md_cmd.attr_mask = attr_mask;
+
+    /* Switch to BTC context */
+    bt_status_t stat = btc_transfer_context(&msg, &arg, sizeof(btc_avrc_args_t), NULL);
+    return (stat == BT_STATUS_SUCCESS) ? ESP_OK : ESP_FAIL;
+}
+
 esp_err_t esp_avrc_ct_send_passthrough_cmd(uint8_t tl, uint8_t key_code, uint8_t key_state)
 {
     if (esp_bluedroid_get_status() != ESP_BLUEDROID_STATUS_ENABLED) {
         return ESP_ERR_INVALID_STATE;
     }
 
+    if (tl >= 16 || key_state > ESP_AVRC_PT_CMD_STATE_RELEASED) {
+        return ESP_FAIL;
+    }
+
     btc_msg_t msg;
     msg.sig = BTC_SIG_API_CALL;
     msg.pid = BTC_PID_AVRC;
@@ -87,7 +172,7 @@ esp_err_t esp_avrc_ct_send_passthrough_cmd(uint8_t tl, uint8_t key_code, uint8_t
     arg.pt_cmd.tl = tl;
     arg.pt_cmd.key_code = key_code;
     arg.pt_cmd.key_state = key_state;
-    
+
     /* Switch to BTC context */
     bt_status_t stat = btc_transfer_context(&msg, &arg, sizeof(btc_avrc_args_t), NULL);
     return (stat == BT_STATUS_SUCCESS) ? ESP_OK : ESP_FAIL;

components/bt/bluedroid/api/esp_blufi_api.c

@@ -16,12 +16,13 @@
 #include "esp_blufi_api.h"
 #include "esp_bt_defs.h"
 #include "esp_bt_main.h"
-#include "btc_task.h"
+#include "btc/btc_task.h"
 #include "btc_blufi_prf.h"
-#include "btc_manage.h"
-#include "btc_main.h"
-#include "future.h"
+#include "btc/btc_manage.h"
+#include "btc/btc_main.h"
+#include "osi/future.h"
 #include "btc_gatts.h"
+#include "btc_gatt_util.h"
 
 esp_err_t esp_blufi_register_callbacks(esp_blufi_callbacks_t *callbacks)
 {
@@ -57,6 +58,23 @@ esp_err_t esp_blufi_send_wifi_conn_report(wifi_mode_t opmode, esp_blufi_sta_conn
     return (btc_transfer_context(&msg, &arg, sizeof(btc_blufi_args_t), btc_blufi_call_deep_copy) == BT_STATUS_SUCCESS ? ESP_OK : ESP_FAIL);
 }
 
+esp_err_t esp_blufi_send_wifi_list(uint16_t apCount, esp_blufi_ap_record_t *list)
+{
+    btc_msg_t msg;
+    btc_blufi_args_t arg;
+
+    if (esp_bluedroid_get_status() != ESP_BLUEDROID_STATUS_ENABLED) {
+        return ESP_ERR_INVALID_STATE;
+    }
+
+    msg.sig = BTC_SIG_API_CALL;
+    msg.pid = BTC_PID_BLUFI;
+    msg.act = BTC_BLUFI_ACT_SEND_WIFI_LIST;
+    arg.wifi_list.apCount = apCount;
+    arg.wifi_list.list = list;
+
+    return (btc_transfer_context(&msg, &arg, sizeof(btc_blufi_args_t), btc_blufi_call_deep_copy) == BT_STATUS_SUCCESS ? ESP_OK : ESP_FAIL);
+}
 
 esp_err_t esp_blufi_profile_init(void)
 {
@@ -103,7 +121,44 @@ esp_err_t esp_blufi_close(esp_gatt_if_t gatts_if, uint16_t conn_id)
     msg.sig = BTC_SIG_API_CALL;
     msg.pid = BTC_PID_GATTS;
     msg.act = BTC_GATTS_ACT_CLOSE;
-    arg.close.conn_id = conn_id;
+    arg.close.conn_id = BTC_GATT_CREATE_CONN_ID(gatts_if, conn_id);
     return (btc_transfer_context(&msg, &arg, sizeof(btc_ble_gatts_args_t), NULL)
             == BT_STATUS_SUCCESS ? ESP_OK : ESP_FAIL);
 }
+
+esp_err_t esp_blufi_send_error_info(esp_blufi_error_state_t state)
+{
+    btc_msg_t msg;
+    btc_blufi_args_t arg;
+
+    if (esp_bluedroid_get_status() != ESP_BLUEDROID_STATUS_ENABLED) {
+        return ESP_ERR_INVALID_STATE;
+    }
+
+    msg.sig = BTC_SIG_API_CALL;
+    msg.pid = BTC_PID_BLUFI;
+    msg.act = BTC_BLUFI_ACT_SEND_ERR_INFO;
+    arg.blufi_err_infor.state = state;
+
+    return (btc_transfer_context(&msg, &arg, sizeof(btc_blufi_args_t), NULL) == BT_STATUS_SUCCESS ? ESP_OK : ESP_FAIL);
+}
+
+esp_err_t esp_blufi_send_custom_data(uint8_t *data, uint32_t data_len)
+{
+    btc_msg_t msg;
+    btc_blufi_args_t arg;
+    if(data == NULL || data_len == 0) {
+        return ESP_ERR_INVALID_ARG;
+    }
+    if (esp_bluedroid_get_status() != ESP_BLUEDROID_STATUS_ENABLED) {
+        return ESP_ERR_INVALID_STATE;
+    }
+
+    msg.sig = BTC_SIG_API_CALL;
+    msg.pid = BTC_PID_BLUFI;
+    msg.act = BTC_BLUFI_ACT_SEND_CUSTOM_DATA;
+    arg.custom_data.data = data;
+    arg.custom_data.data_len = data_len;
+
+    return (btc_transfer_context(&msg, &arg, sizeof(btc_blufi_args_t), btc_blufi_call_deep_copy) == BT_STATUS_SUCCESS ? ESP_OK : ESP_FAIL);
+}

components/bt/bluedroid/api/esp_bt_device.c

@@ -16,9 +16,9 @@
 #include <string.h>
 #include "esp_bt_device.h"
 #include "esp_bt_main.h"
-#include "controller.h"
-#include "btc_task.h"
-#include "btc_dev.h"
+#include "device/controller.h"
+#include "btc/btc_task.h"
+#include "btc/btc_dev.h"
 
 const uint8_t *esp_bt_dev_get_address(void)
 {
@@ -36,7 +36,9 @@ esp_err_t esp_bt_dev_set_device_name(const char *name)
     if (esp_bluedroid_get_status() != ESP_BLUEDROID_STATUS_ENABLED) {
         return ESP_ERR_INVALID_STATE;
     }
-    
+    if (!name){
+        return ESP_ERR_INVALID_ARG;
+    }
     if (strlen(name) > ESP_DEV_DEVICE_NAME_MAX) {
         return ESP_ERR_INVALID_ARG;
     }

components/bt/bluedroid/api/esp_bt_main.c

@@ -14,10 +14,11 @@
 
 
 #include "esp_bt_main.h"
-#include "btc_task.h"
-#include "btc_main.h"
-#include "bt.h"
-#include "future.h"
+#include "btc/btc_task.h"
+#include "btc/btc_main.h"
+#include "esp_bt.h"
+#include "osi/future.h"
+#include "osi/allocator.h"
 
 static bool bd_already_enable = false;
 static bool bd_already_init = false;

components/bt/bluedroid/api/esp_gap_ble_api.c

@@ -16,17 +16,17 @@
 #include "esp_bt_device.h"
 #include "esp_bt_main.h"
 #include "esp_gap_ble_api.h"
-#include "bta_api.h"
-#include "bt_trace.h"
-#include "btc_manage.h"
+#include "bta/bta_api.h"
+#include "common/bt_trace.h"
+#include "btc/btc_manage.h"
 #include "btc_gap_ble.h"
+#include "btc/btc_ble_storage.h"
 
 
 esp_err_t esp_ble_gap_register_callback(esp_gap_ble_cb_t callback)
 {
-    if (esp_bluedroid_get_status() == ESP_BLUEDROID_STATUS_UNINITIALIZED) {
-        return ESP_ERR_INVALID_STATE;
-    }
+    ESP_BLUEDROID_STATUS_CHECK(ESP_BLUEDROID_STATUS_ENABLED);
+
     return (btc_profile_cb_set(BTC_PID_GAP_BLE, callback) == 0 ? ESP_OK : ESP_FAIL);
 }
 
@@ -35,11 +35,9 @@ esp_err_t esp_ble_gap_config_adv_data(esp_ble_adv_data_t *adv_data)
 {
     btc_msg_t msg;
     btc_ble_gap_args_t arg;
-    
-    if (esp_bluedroid_get_status() != ESP_BLUEDROID_STATUS_ENABLED) {
-        return ESP_ERR_INVALID_STATE;
-    }
-    
+
+    ESP_BLUEDROID_STATUS_CHECK(ESP_BLUEDROID_STATUS_ENABLED);
+
     if (adv_data == NULL) {
         return ESP_ERR_INVALID_ARG;
     }
@@ -62,11 +60,9 @@ esp_err_t esp_ble_gap_set_scan_params(esp_ble_scan_params_t *scan_params)
 {
     btc_msg_t msg;
     btc_ble_gap_args_t arg;
-    
-    if (esp_bluedroid_get_status() != ESP_BLUEDROID_STATUS_ENABLED) {
-        return ESP_ERR_INVALID_STATE;
-    }
-    
+
+    ESP_BLUEDROID_STATUS_CHECK(ESP_BLUEDROID_STATUS_ENABLED);
+
     if (scan_params == NULL) {
         return ESP_ERR_INVALID_ARG;
     }
@@ -84,9 +80,7 @@ esp_err_t esp_ble_gap_start_scanning(uint32_t duration)
     btc_msg_t msg;
     btc_ble_gap_args_t arg;
 
-    if (esp_bluedroid_get_status() != ESP_BLUEDROID_STATUS_ENABLED) {
-        return ESP_ERR_INVALID_STATE;
-    }
+    ESP_BLUEDROID_STATUS_CHECK(ESP_BLUEDROID_STATUS_ENABLED);
 
     msg.sig = BTC_SIG_API_CALL;
     msg.pid = BTC_PID_GAP_BLE;
@@ -101,10 +95,8 @@ esp_err_t esp_ble_gap_stop_scanning(void)
 {
     btc_msg_t msg;
 
-    if (esp_bluedroid_get_status() != ESP_BLUEDROID_STATUS_ENABLED) {
-        return ESP_ERR_INVALID_STATE;
-    }
-    
+    ESP_BLUEDROID_STATUS_CHECK(ESP_BLUEDROID_STATUS_ENABLED);
+
     msg.sig = BTC_SIG_API_CALL;
     msg.pid = BTC_PID_GAP_BLE;
     msg.act = BTC_GAP_BLE_ACT_STOP_SCAN;
@@ -116,10 +108,8 @@ esp_err_t esp_ble_gap_start_advertising(esp_ble_adv_params_t *adv_params)
     btc_msg_t msg;
     btc_ble_gap_args_t arg;
 
-    if (esp_bluedroid_get_status() != ESP_BLUEDROID_STATUS_ENABLED) {       
-        return ESP_ERR_INVALID_STATE;
-    }
-    
+    ESP_BLUEDROID_STATUS_CHECK(ESP_BLUEDROID_STATUS_ENABLED);
+
     msg.sig = BTC_SIG_API_CALL;
     msg.pid = BTC_PID_GAP_BLE;
     msg.act = BTC_GAP_BLE_ACT_START_ADV;
@@ -132,10 +122,8 @@ esp_err_t esp_ble_gap_stop_advertising(void)
 {
     btc_msg_t msg;
 
-    if (esp_bluedroid_get_status() != ESP_BLUEDROID_STATUS_ENABLED) {
-        return ESP_ERR_INVALID_STATE;
-    }
-    
+    ESP_BLUEDROID_STATUS_CHECK(ESP_BLUEDROID_STATUS_ENABLED);
+
     msg.sig = BTC_SIG_API_CALL;
     msg.pid = BTC_PID_GAP_BLE;
     msg.act = BTC_GAP_BLE_ACT_STOP_ADV;
@@ -149,10 +137,8 @@ esp_err_t esp_ble_gap_update_conn_params(esp_ble_conn_update_params_t *params)
     btc_msg_t msg;
     btc_ble_gap_args_t arg;
 
-    if (esp_bluedroid_get_status() != ESP_BLUEDROID_STATUS_ENABLED) {
-        return ESP_ERR_INVALID_STATE;
-    }
-    
+    ESP_BLUEDROID_STATUS_CHECK(ESP_BLUEDROID_STATUS_ENABLED);
+
     msg.sig = BTC_SIG_API_CALL;
     msg.pid = BTC_PID_GAP_BLE;
     msg.act = BTC_GAP_BLE_ACT_UPDATE_CONN_PARAM;
@@ -166,10 +152,8 @@ esp_err_t esp_ble_gap_set_pkt_data_len(esp_bd_addr_t remote_device, uint16_t tx_
     btc_msg_t msg;
     btc_ble_gap_args_t arg;
 
-    if (esp_bluedroid_get_status() != ESP_BLUEDROID_STATUS_ENABLED) {    
-        return ESP_ERR_INVALID_STATE;
-    }
-    
+    ESP_BLUEDROID_STATUS_CHECK(ESP_BLUEDROID_STATUS_ENABLED);
+
     msg.sig = BTC_SIG_API_CALL;
     msg.pid = BTC_PID_GAP_BLE;
     msg.act = BTC_GAP_BLE_ACT_SET_PKT_DATA_LEN;
@@ -185,10 +169,8 @@ esp_err_t esp_ble_gap_set_rand_addr(esp_bd_addr_t rand_addr)
     btc_msg_t msg;
     btc_ble_gap_args_t arg;
 
-    if (esp_bluedroid_get_status() != ESP_BLUEDROID_STATUS_ENABLED) {
-        return ESP_ERR_INVALID_STATE;
-    }
-    
+    ESP_BLUEDROID_STATUS_CHECK(ESP_BLUEDROID_STATUS_ENABLED);
+
     msg.sig = BTC_SIG_API_CALL;
     msg.pid = BTC_PID_GAP_BLE;
     msg.act = BTC_GAP_BLE_ACT_SET_RAND_ADDRESS;
@@ -203,10 +185,8 @@ esp_err_t esp_ble_gap_config_local_privacy (bool privacy_enable)
     btc_msg_t msg;
     btc_ble_gap_args_t arg;
 
-    if (esp_bluedroid_get_status() != ESP_BLUEDROID_STATUS_ENABLED) {
-        return ESP_ERR_INVALID_STATE;
-    }
-    
+    ESP_BLUEDROID_STATUS_CHECK(ESP_BLUEDROID_STATUS_ENABLED);
+
     msg.sig = BTC_SIG_API_CALL;
     msg.pid = BTC_PID_GAP_BLE;
     msg.act = BTC_GAP_BLE_ACT_CONFIG_LOCAL_PRIVACY;
@@ -215,11 +195,171 @@ esp_err_t esp_ble_gap_config_local_privacy (bool privacy_enable)
     return (btc_transfer_context(&msg, &arg, sizeof(btc_ble_gap_args_t), NULL) == BT_STATUS_SUCCESS ? ESP_OK : ESP_FAIL);
 }
 
+esp_err_t esp_ble_gap_config_local_icon (uint16_t icon)
+{
+    esp_err_t ret;
+    btc_msg_t msg;
+    btc_ble_gap_args_t arg;
+
+    ESP_BLUEDROID_STATUS_CHECK(ESP_BLUEDROID_STATUS_ENABLED);
+
+    switch (icon) {
+    case ESP_BLE_APPEARANCE_GENERIC_PHONE:
+    case ESP_BLE_APPEARANCE_GENERIC_COMPUTER:
+    case ESP_BLE_APPEARANCE_GENERIC_REMOTE:
+    case ESP_BLE_APPEARANCE_GENERIC_THERMOMETER:
+    case ESP_BLE_APPEARANCE_THERMOMETER_EAR:
+    case ESP_BLE_APPEARANCE_GENERIC_HEART_RATE:
+    case ESP_BLE_APPEARANCE_HEART_RATE_BELT:
+    case ESP_BLE_APPEARANCE_GENERIC_BLOOD_PRESSURE:
+    case ESP_BLE_APPEARANCE_BLOOD_PRESSURE_ARM:
+    case ESP_BLE_APPEARANCE_BLOOD_PRESSURE_WRIST:
+    case ESP_BLE_APPEARANCE_GENERIC_PULSE_OXIMETER:
+    case ESP_BLE_APPEARANCE_PULSE_OXIMETER_FINGERTIP:
+    case ESP_BLE_APPEARANCE_PULSE_OXIMETER_WRIST:
+    case ESP_BLE_APPEARANCE_GENERIC_GLUCOSE:
+    case ESP_BLE_APPEARANCE_GENERIC_WEIGHT:
+    case ESP_BLE_APPEARANCE_GENERIC_WALKING:
+    case ESP_BLE_APPEARANCE_WALKING_IN_SHOE:
+    case ESP_BLE_APPEARANCE_WALKING_ON_SHOE:
+    case ESP_BLE_APPEARANCE_WALKING_ON_HIP:
+    case ESP_BLE_APPEARANCE_GENERIC_WATCH:
+    case ESP_BLE_APPEARANCE_SPORTS_WATCH:
+    case ESP_BLE_APPEARANCE_GENERIC_EYEGLASSES:
+    case ESP_BLE_APPEARANCE_GENERIC_DISPLAY:
+    case ESP_BLE_APPEARANCE_GENERIC_MEDIA_PLAYER:
+    case ESP_BLE_APPEARANCE_GENERIC_BARCODE_SCANNER:
+    case ESP_BLE_APPEARANCE_HID_BARCODE_SCANNER:
+    case ESP_BLE_APPEARANCE_GENERIC_HID:
+    case ESP_BLE_APPEARANCE_HID_KEYBOARD:
+    case ESP_BLE_APPEARANCE_HID_MOUSE:
+    case ESP_BLE_APPEARANCE_HID_JOYSTICK:
+    case ESP_BLE_APPEARANCE_HID_GAMEPAD:
+    case ESP_BLE_APPEARANCE_HID_DIGITIZER_TABLET:
+    case ESP_BLE_APPEARANCE_HID_CARD_READER:
+    case ESP_BLE_APPEARANCE_HID_DIGITAL_PEN:
+    case ESP_BLE_APPEARANCE_UNKNOWN:
+    case ESP_BLE_APPEARANCE_GENERIC_CLOCK:
+    case ESP_BLE_APPEARANCE_GENERIC_TAG:
+    case ESP_BLE_APPEARANCE_GENERIC_KEYRING:
+    case ESP_BLE_APPEARANCE_GENERIC_CYCLING:
+    case ESP_BLE_APPEARANCE_CYCLING_COMPUTER:
+    case ESP_BLE_APPEARANCE_CYCLING_SPEED:
+    case ESP_BLE_APPEARANCE_CYCLING_CADENCE:
+    case ESP_BLE_APPEARANCE_CYCLING_POWER:
+    case ESP_BLE_APPEARANCE_CYCLING_SPEED_CADENCE:
+    case ESP_BLE_APPEARANCE_GENERIC_PERSONAL_MOBILITY_DEVICE:
+    case ESP_BLE_APPEARANCE_POWERED_WHEELCHAIR:
+    case ESP_BLE_APPEARANCE_MOBILITY_SCOOTER:
+    case ESP_BLE_APPEARANCE_GENERIC_CONTINUOUS_GLUCOSE_MONITOR:
+    case ESP_BLE_APPEARANCE_GENERIC_INSULIN_PUMP:
+    case ESP_BLE_APPEARANCE_INSULIN_PUMP_DURABLE_PUMP:
+    case ESP_BLE_APPEARANCE_INSULIN_PUMP_PATCH_PUMP:
+    case ESP_BLE_APPEARANCE_INSULIN_PEN:
+    case ESP_BLE_APPEARANCE_GENERIC_MEDICATION_DELIVERY:
+    case ESP_BLE_APPEARANCE_GENERIC_OUTDOOR_SPORTS:
+    case ESP_BLE_APPEARANCE_OUTDOOR_SPORTS_LOCATION:
+    case ESP_BLE_APPEARANCE_OUTDOOR_SPORTS_LOCATION_AND_NAV:
+    case ESP_BLE_APPEARANCE_OUTDOOR_SPORTS_LOCATION_POD:
+    case ESP_BLE_APPEARANCE_OUTDOOR_SPORTS_LOCATION_POD_AND_NAV:
+        msg.sig = BTC_SIG_API_CALL;
+        msg.pid = BTC_PID_GAP_BLE;
+        msg.act = BTC_GAP_BLE_ACT_CONFIG_LOCAL_ICON;
+        arg.cfg_local_icon.icon = icon;
+        ret = (btc_transfer_context(&msg, &arg, sizeof(btc_ble_gap_args_t), NULL) == BT_STATUS_SUCCESS ? ESP_OK : ESP_FAIL);
+        break;
+    default:
+        ret = ESP_ERR_INVALID_ARG;
+        break;
+    }
+    return ret;
+}
+
+esp_err_t esp_ble_gap_update_whitelist(bool add_remove, esp_bd_addr_t remote_bda)
+{
+    btc_msg_t msg;
+    btc_ble_gap_args_t arg;
+
+    if (esp_bluedroid_get_status() != ESP_BLUEDROID_STATUS_ENABLED) {
+        return ESP_ERR_INVALID_STATE;
+    }
+    if (!remote_bda){
+        return ESP_ERR_INVALID_SIZE;
+    }
+    msg.sig = BTC_SIG_API_CALL;
+    msg.pid = BTC_PID_GAP_BLE;
+    msg.act = BTC_GAP_BLE_ACT_UPDATE_WHITE_LIST;
+    arg.update_white_list.add_remove = add_remove;
+    memcpy(arg.update_white_list.remote_bda, remote_bda, sizeof(esp_bd_addr_t));
+
+    return (btc_transfer_context(&msg, &arg, sizeof(btc_ble_gap_args_t), NULL)
+                == BT_STATUS_SUCCESS ? ESP_OK : ESP_FAIL);
+}
+
+esp_err_t esp_ble_gap_get_whitelist_size(uint16_t *length)
+{
+    if (length == NULL) {
+        return ESP_FAIL;
+    }
+    btc_get_whitelist_size(length);
+
+    return ESP_OK;
+}
+
+esp_err_t esp_ble_gap_set_prefer_conn_params(esp_bd_addr_t bd_addr,
+                                                                 uint16_t min_conn_int, uint16_t max_conn_int,
+                                                                 uint16_t slave_latency, uint16_t supervision_tout)
+{
+    btc_msg_t msg;
+    btc_ble_gap_args_t arg;
+
+    if (esp_bluedroid_get_status() != ESP_BLUEDROID_STATUS_ENABLED) {
+        return ESP_ERR_INVALID_STATE;
+    }
+
+    if (ESP_BLE_IS_VALID_PARAM(min_conn_int, ESP_BLE_CONN_INT_MIN, ESP_BLE_CONN_INT_MAX) &&
+        ESP_BLE_IS_VALID_PARAM(max_conn_int, ESP_BLE_CONN_INT_MIN, ESP_BLE_CONN_INT_MAX) &&
+        ESP_BLE_IS_VALID_PARAM(supervision_tout, ESP_BLE_CONN_SUP_TOUT_MIN, ESP_BLE_CONN_SUP_TOUT_MAX) &&
+        (slave_latency <= ESP_BLE_CONN_LATENCY_MAX || slave_latency == ESP_BLE_CONN_PARAM_UNDEF) &&
+        ((supervision_tout * 10) >= ((1 + slave_latency) * ((max_conn_int * 5) >> 1))) && min_conn_int <= max_conn_int) {
+
+        msg.sig = BTC_SIG_API_CALL;
+        msg.pid = BTC_PID_GAP_BLE;
+        msg.act = BTC_GAP_BLE_ACT_SET_CONN_PARAMS;
+        arg.set_conn_params.min_conn_int = min_conn_int;
+        arg.set_conn_params.max_conn_int = max_conn_int;
+        arg.set_conn_params.slave_latency = slave_latency;
+        arg.set_conn_params.supervision_tout = supervision_tout;
+        memcpy(arg.set_conn_params.bd_addr, bd_addr, sizeof(esp_bd_addr_t));
+
+        return (btc_transfer_context(&msg, &arg, sizeof(btc_ble_gap_args_t), NULL)
+                    == BT_STATUS_SUCCESS ? ESP_OK : ESP_FAIL);
+    } else {
+        LOG_ERROR("%s,invalid connection params:min_int = %d, max_int = %d, latency = %d, timeout = %d",\
+                            __func__, min_conn_int, max_conn_int, slave_latency, supervision_tout);
+        return ESP_FAIL;
+    }
+}
+
 esp_err_t esp_ble_gap_set_device_name(const char *name)
 {
+    ESP_BLUEDROID_STATUS_CHECK(ESP_BLUEDROID_STATUS_ENABLED);
+
     return esp_bt_dev_set_device_name(name);
 }
 
+esp_err_t esp_ble_gap_get_local_used_addr(esp_bd_addr_t local_used_addr, uint8_t * addr_type)
+{
+    if(esp_bluedroid_get_status() != (ESP_BLUEDROID_STATUS_ENABLED)) {
+        LOG_ERROR("%s, bluedroid status error", __func__);
+        return ESP_FAIL;
+    }
+    if(!BTM_BleGetCurrentAddress(local_used_addr, addr_type)) {
+        return ESP_FAIL;
+    }
+    return ESP_OK;
+}
+
 uint8_t *esp_ble_resolve_adv_data( uint8_t *adv_data, uint8_t type, uint8_t *length)
 {
     if (((type < ESP_BLE_AD_TYPE_FLAG) || (type > ESP_BLE_AD_TYPE_128SERVICE_DATA)) &&
@@ -241,9 +381,7 @@ esp_err_t esp_ble_gap_config_adv_data_raw(uint8_t *raw_data, uint32_t raw_data_l
     btc_msg_t msg;
     btc_ble_gap_args_t arg;
 
-    if (esp_bluedroid_get_status() != ESP_BLUEDROID_STATUS_ENABLED) {
-        return ESP_ERR_INVALID_STATE;
-    }
+    ESP_BLUEDROID_STATUS_CHECK(ESP_BLUEDROID_STATUS_ENABLED);
 
     if (raw_data == NULL
             || (raw_data_len <= 0 || raw_data_len > ESP_BLE_ADV_DATA_LEN_MAX)) {
@@ -260,7 +398,7 @@ esp_err_t esp_ble_gap_config_adv_data_raw(uint8_t *raw_data, uint32_t raw_data_l
 
 }
 
-esp_err_t esp_ble_gap_config_scan_rsp_data_raw(uint8_t *raw_data, uint32_t raw_data_len)
+esp_err_t esp_ble_gap_read_rssi(esp_bd_addr_t remote_addr)
 {
     btc_msg_t msg;
     btc_ble_gap_args_t arg;
@@ -269,6 +407,21 @@ esp_err_t esp_ble_gap_config_scan_rsp_data_raw(uint8_t *raw_data, uint32_t raw_d
         return ESP_ERR_INVALID_STATE;
     }
 
+    msg.sig = BTC_SIG_API_CALL;
+    msg.pid = BTC_PID_GAP_BLE;
+    msg.act = BTC_GAP_BLE_ACT_READ_RSSI;
+    memcpy(arg.read_rssi.remote_addr, remote_addr, sizeof(esp_bd_addr_t));
+
+    return (btc_transfer_context(&msg, &arg, sizeof(btc_ble_gap_args_t), NULL) == BT_STATUS_SUCCESS ? ESP_OK : ESP_FAIL);
+}
+
+esp_err_t esp_ble_gap_config_scan_rsp_data_raw(uint8_t *raw_data, uint32_t raw_data_len)
+{
+    btc_msg_t msg;
+    btc_ble_gap_args_t arg;
+
+    ESP_BLUEDROID_STATUS_CHECK(ESP_BLUEDROID_STATUS_ENABLED);
+
     if (raw_data == NULL
             || (raw_data_len <= 0 || raw_data_len > ESP_BLE_SCAN_RSP_DATA_LEN_MAX)) {
         return ESP_ERR_INVALID_ARG;
@@ -284,13 +437,32 @@ esp_err_t esp_ble_gap_config_scan_rsp_data_raw(uint8_t *raw_data, uint32_t raw_d
 
 }
 
-
+#if (SMP_INCLUDED == TRUE)
 esp_err_t esp_ble_gap_set_security_param(esp_ble_sm_param_t param_type,
         void *value, uint8_t len)
 {
+    if(param_type >= ESP_BLE_SM_MAX_PARAM) {
+        return ESP_ERR_INVALID_ARG;
+    }
+    if((param_type != ESP_BLE_SM_CLEAR_STATIC_PASSKEY) && ( value == NULL || len < sizeof(uint8_t) || len > sizeof(uint32_t))) {
+        return ESP_ERR_INVALID_ARG;
+    }
+    if((param_type == ESP_BLE_SM_SET_STATIC_PASSKEY)) {
+        uint32_t passkey = 0;
+        for(uint8_t i = 0; i < len; i++)
+        {
+            passkey += (((uint8_t *)value)[i]<<(8*i));
+        }
+        if(passkey > 999999) {
+            return ESP_ERR_INVALID_ARG;
+        }
+    }
+
     btc_msg_t msg;
     btc_ble_gap_args_t arg;
 
+    ESP_BLUEDROID_STATUS_CHECK(ESP_BLUEDROID_STATUS_ENABLED);
+
     msg.sig = BTC_SIG_API_CALL;
     msg.pid = BTC_PID_GAP_BLE;
     msg.act = BTC_GAP_BLE_SET_SECURITY_PARAM_EVT;
@@ -307,6 +479,8 @@ esp_err_t esp_ble_set_encryption(esp_bd_addr_t bd_addr, esp_ble_sec_act_t sec_ac
     btc_msg_t msg;
     btc_ble_gap_args_t arg;
 
+    ESP_BLUEDROID_STATUS_CHECK(ESP_BLUEDROID_STATUS_ENABLED);
+
     msg.sig = BTC_SIG_API_CALL;
     msg.pid = BTC_PID_GAP_BLE;
     msg.act = BTC_GAP_BLE_SET_ENCRYPTION_EVT;
@@ -321,6 +495,9 @@ esp_err_t esp_ble_gap_security_rsp(esp_bd_addr_t bd_addr, bool accept)
 {
     btc_msg_t msg;
     btc_ble_gap_args_t arg;
+
+    ESP_BLUEDROID_STATUS_CHECK(ESP_BLUEDROID_STATUS_ENABLED);
+
     msg.sig = BTC_SIG_API_CALL;
     msg.pid = BTC_PID_GAP_BLE;
     msg.act = BTC_GAP_BLE_SECURITY_RSP_EVT;
@@ -337,6 +514,8 @@ esp_err_t esp_ble_passkey_reply(esp_bd_addr_t bd_addr, bool accept, uint32_t pas
     btc_msg_t msg;
     btc_ble_gap_args_t arg;
 
+    ESP_BLUEDROID_STATUS_CHECK(ESP_BLUEDROID_STATUS_ENABLED);
+
     msg.sig = BTC_SIG_API_CALL;
     msg.pid = BTC_PID_GAP_BLE;
     msg.act = BTC_GAP_BLE_PASSKEY_REPLY_EVT;
@@ -353,6 +532,8 @@ esp_err_t esp_ble_confirm_reply(esp_bd_addr_t bd_addr, bool accept)
     btc_msg_t msg;
     btc_ble_gap_args_t arg;
 
+    ESP_BLUEDROID_STATUS_CHECK(ESP_BLUEDROID_STATUS_ENABLED);
+
     msg.sig = BTC_SIG_API_CALL;
     msg.pid = BTC_PID_GAP_BLE;
     msg.act = BTC_GAP_BLE_CONFIRM_REPLY_EVT;
@@ -363,14 +544,56 @@ esp_err_t esp_ble_confirm_reply(esp_bd_addr_t bd_addr, bool accept)
             == BT_STATUS_SUCCESS ? ESP_OK : ESP_FAIL);
 }
 
+esp_err_t esp_ble_remove_bond_device(esp_bd_addr_t bd_addr)
+{
+    btc_msg_t msg;
+    btc_ble_gap_args_t arg;
+    msg.sig = BTC_SIG_API_CALL;
+    msg.pid = BTC_PID_GAP_BLE;
+    msg.act = BTC_GAP_BLE_REMOVE_BOND_DEV_EVT;
+    memcpy(arg.remove_bond_device.bd_addr, bd_addr, ESP_BD_ADDR_LEN);
+
+    return (btc_transfer_context(&msg, &arg, sizeof(btc_ble_gap_args_t), NULL)
+            == BT_STATUS_SUCCESS ? ESP_OK : ESP_FAIL);
+}
+
+int esp_ble_get_bond_device_num(void)
+{
+    if (esp_bluedroid_get_status() != ESP_BLUEDROID_STATUS_ENABLED) {
+        return ESP_FAIL;
+    }
+
+    return btc_storage_get_num_ble_bond_devices();
+}
+
+esp_err_t esp_ble_get_bond_device_list(int *dev_num, esp_ble_bond_dev_t *dev_list)
+{
+    int ret;
+    int dev_num_total;
+
+    if (dev_num == NULL || dev_list == NULL) {
+        return ESP_ERR_INVALID_ARG;
+    }
+
+    ESP_BLUEDROID_STATUS_CHECK(ESP_BLUEDROID_STATUS_ENABLED);
+
+    dev_num_total = btc_storage_get_num_ble_bond_devices();
+    if (*dev_num > dev_num_total) {
+        *dev_num = dev_num_total;
+    }
+
+    ret = btc_storage_get_bonded_ble_devices_list(dev_list, *dev_num);
+
+    return (ret == BT_STATUS_SUCCESS ? ESP_OK : ESP_FAIL);
+}
+#endif /* #if (SMP_INCLUDED == TRUE) */
+
 esp_err_t esp_ble_gap_disconnect(esp_bd_addr_t remote_device)
 {
     btc_msg_t msg;
     btc_ble_gap_args_t arg;
 
-    if (esp_bluedroid_get_status() != ESP_BLUEDROID_STATUS_ENABLED) {
-        return ESP_ERR_INVALID_STATE;
-    }
+    ESP_BLUEDROID_STATUS_CHECK(ESP_BLUEDROID_STATUS_ENABLED);
 
     msg.sig = BTC_SIG_API_CALL;
     msg.pid = BTC_PID_GAP_BLE;

components/bt/bluedroid/api/esp_gap_bt_api.c

@@ -12,15 +12,30 @@
 // See the License for the specific language governing permissions and
 // limitations under the License.
 
-#include "bt_target.h"
+#include "common/bt_target.h"
 #include <string.h>
 #include "esp_bt_main.h"
 #include "esp_gap_bt_api.h"
-#include "bt_trace.h"
-#include "btc_manage.h"
+#include "common/bt_trace.h"
+#include "btc/btc_manage.h"
 #include "btc_gap_bt.h"
+#include "btc/btc_storage.h"
 
-#if BTC_GAP_BT_INCLUDED
+#if (BTC_GAP_BT_INCLUDED == TRUE)
+
+esp_err_t esp_bt_gap_register_callback(esp_bt_gap_cb_t callback)
+{
+    if (esp_bluedroid_get_status() != ESP_BLUEDROID_STATUS_ENABLED) {
+        return ESP_ERR_INVALID_STATE;
+    }
+
+    if (callback == NULL) {
+        return ESP_FAIL;
+    }
+
+    btc_profile_cb_set(BTC_PID_GAP_BT, callback);
+    return ESP_OK;
+}
 
 esp_err_t esp_bt_gap_set_scan_mode(esp_bt_scan_mode_t mode)
 {
@@ -30,7 +45,7 @@ esp_err_t esp_bt_gap_set_scan_mode(esp_bt_scan_mode_t mode)
     if (esp_bluedroid_get_status() != ESP_BLUEDROID_STATUS_ENABLED) {
         return ESP_ERR_INVALID_STATE;
     }
-    
+
     msg.sig = BTC_SIG_API_CALL;
     msg.pid = BTC_PID_GAP_BT;
     msg.act = BTC_GAP_BT_ACT_SET_SCAN_MODE;
@@ -39,4 +54,236 @@ esp_err_t esp_bt_gap_set_scan_mode(esp_bt_scan_mode_t mode)
     return (btc_transfer_context(&msg, &arg, sizeof(btc_gap_bt_args_t), NULL) == BT_STATUS_SUCCESS ? ESP_OK : ESP_FAIL);
 }
 
-#endif /* #if BTC_GAP_BT_INCLUDED */
+esp_err_t esp_bt_gap_start_discovery(esp_bt_inq_mode_t mode, uint8_t inq_len, uint8_t num_rsps)
+{
+    btc_msg_t msg;
+    btc_gap_bt_args_t arg;
+
+    if (esp_bluedroid_get_status() != ESP_BLUEDROID_STATUS_ENABLED) {
+        return ESP_ERR_INVALID_STATE;
+    }
+
+    if (mode != ESP_BT_INQ_MODE_GENERAL_INQUIRY &&
+            mode != ESP_BT_INQ_MODE_LIMITED_INQUIRY) {
+        return ESP_ERR_INVALID_ARG;
+    }
+
+    if (inq_len < ESP_BT_GAP_MIN_INQ_LEN ||
+            inq_len > ESP_BT_GAP_MAX_INQ_LEN) {
+        return ESP_ERR_INVALID_ARG;
+    }
+
+    msg.sig = BTC_SIG_API_CALL;
+    msg.pid = BTC_PID_GAP_BT;
+    msg.act = BTC_GAP_BT_ACT_START_DISCOVERY;
+
+    arg.start_disc.mode = mode;
+    arg.start_disc.inq_len = inq_len;
+    arg.start_disc.num_rsps = num_rsps;
+
+    return (btc_transfer_context(&msg, &arg, sizeof(btc_gap_bt_args_t), NULL) == BT_STATUS_SUCCESS ? ESP_OK : ESP_FAIL);
+}
+
+esp_err_t esp_bt_gap_cancel_discovery(void)
+{
+    btc_msg_t msg;
+
+    if (esp_bluedroid_get_status() != ESP_BLUEDROID_STATUS_ENABLED) {
+        return ESP_ERR_INVALID_STATE;
+    }
+
+    msg.sig = BTC_SIG_API_CALL;
+    msg.pid = BTC_PID_GAP_BT;
+    msg.act = BTC_GAP_BT_ACT_CANCEL_DISCOVERY;
+
+    return (btc_transfer_context(&msg, NULL, 0, NULL) == BT_STATUS_SUCCESS ? ESP_OK : ESP_FAIL);
+}
+
+esp_err_t esp_bt_gap_get_remote_services(esp_bd_addr_t remote_bda)
+{
+    btc_msg_t msg;
+    btc_gap_bt_args_t arg;
+
+    if (esp_bluedroid_get_status() != ESP_BLUEDROID_STATUS_ENABLED) {
+        return ESP_ERR_INVALID_STATE;
+    }
+
+    msg.sig = BTC_SIG_API_CALL;
+    msg.pid = BTC_PID_GAP_BT;
+    msg.act = BTC_GAP_BT_ACT_GET_REMOTE_SERVICES;
+
+    memcpy(&arg.bda, remote_bda, sizeof(bt_bdaddr_t));
+    return (btc_transfer_context(&msg, &arg, sizeof(btc_gap_bt_args_t), NULL) == BT_STATUS_SUCCESS ? ESP_OK : ESP_FAIL);
+}
+
+esp_err_t esp_bt_gap_get_remote_service_record(esp_bd_addr_t remote_bda, esp_bt_uuid_t *uuid)
+{
+    btc_msg_t msg;
+    btc_gap_bt_args_t arg;
+
+    if (esp_bluedroid_get_status() != ESP_BLUEDROID_STATUS_ENABLED) {
+        return ESP_ERR_INVALID_STATE;
+    }
+
+    msg.sig = BTC_SIG_API_CALL;
+    msg.pid = BTC_PID_GAP_BT;
+    msg.act = BTC_GAP_BT_ACT_GET_REMOTE_SERVICE_RECORD;
+
+    memcpy(&arg.get_rmt_srv_rcd.bda, remote_bda, sizeof(bt_bdaddr_t));
+    memcpy(&arg.get_rmt_srv_rcd.uuid, uuid, sizeof(esp_bt_uuid_t));
+    return (btc_transfer_context(&msg, &arg, sizeof(btc_gap_bt_args_t), NULL) == BT_STATUS_SUCCESS ? ESP_OK : ESP_FAIL);
+}
+
+uint8_t *esp_bt_gap_resolve_eir_data(uint8_t *eir, esp_bt_eir_type_t type, uint8_t *length)
+{
+    if (!eir) {
+        return NULL;
+    }
+
+    return BTM_CheckEirData(eir, type, length);
+}
+
+esp_err_t esp_bt_gap_set_cod(esp_bt_cod_t cod, esp_bt_cod_mode_t mode)
+{
+    btc_msg_t msg;
+    btc_gap_bt_args_t arg;
+
+    if (esp_bluedroid_get_status() != ESP_BLUEDROID_STATUS_ENABLED) {
+        return ESP_ERR_INVALID_STATE;
+    }
+
+    switch (mode) {
+    case ESP_BT_SET_COD_MAJOR_MINOR:
+    case ESP_BT_SET_COD_SERVICE_CLASS:
+    case ESP_BT_CLR_COD_SERVICE_CLASS:
+    case ESP_BT_SET_COD_ALL:
+    case ESP_BT_INIT_COD:
+        break;
+    default:
+        return ESP_ERR_INVALID_ARG;
+        break;
+    }
+
+    msg.sig = BTC_SIG_API_CALL;
+    msg.pid = BTC_PID_GAP_BT;
+    msg.act = BTC_GAP_BT_ACT_SET_COD;
+
+    arg.set_cod.mode = mode;
+    memcpy(&arg.set_cod.cod, &cod, sizeof(esp_bt_cod_t));
+    return (btc_transfer_context(&msg, &arg, sizeof(btc_gap_bt_args_t), NULL) == BT_STATUS_SUCCESS ? ESP_OK : ESP_FAIL);
+}
+
+
+esp_err_t esp_bt_gap_get_cod(esp_bt_cod_t *cod)
+{
+    return btc_gap_bt_get_cod(cod);
+}
+
+
+esp_err_t esp_bt_gap_read_rssi_delta(esp_bd_addr_t remote_addr)
+{
+    btc_msg_t msg;
+    btc_gap_bt_args_t arg;
+    msg.sig = BTC_SIG_API_CALL;
+    msg.pid = BTC_PID_GAP_BT;
+    msg.act = BTC_GAP_BT_ACT_READ_RSSI_DELTA;
+    memcpy(arg.read_rssi_delta.bda.address, remote_addr, sizeof(esp_bd_addr_t));
+
+    return (btc_transfer_context(&msg, &arg, sizeof(btc_gap_bt_args_t), NULL) == BT_STATUS_SUCCESS ? ESP_OK : ESP_FAIL);
+}
+
+esp_err_t esp_bt_gap_remove_bond_device(esp_bd_addr_t bd_addr)
+{
+    btc_msg_t msg;
+    btc_gap_bt_args_t arg;
+
+    if (esp_bluedroid_get_status() != ESP_BLUEDROID_STATUS_ENABLED) {
+        return ESP_ERR_INVALID_STATE;
+    }
+
+    msg.sig = BTC_SIG_API_CALL;
+    msg.pid = BTC_PID_GAP_BT;
+    msg.act = BTC_GAP_BT_ACT_REMOVE_BOND_DEVICE;
+
+    memcpy(arg.rm_bond_device.bda.address, bd_addr, sizeof(esp_bd_addr_t));
+    return (btc_transfer_context(&msg, &arg, sizeof(btc_gap_bt_args_t), NULL) == BT_STATUS_SUCCESS ? ESP_OK : ESP_FAIL);
+}
+
+int esp_bt_gap_get_bond_device_num(void)
+{
+    if (esp_bluedroid_get_status() != ESP_BLUEDROID_STATUS_ENABLED) {
+        return ESP_FAIL;
+    }
+    return btc_storage_get_num_bt_bond_devices();
+}
+
+esp_err_t esp_bt_gap_get_bond_device_list(int *dev_num, esp_bd_addr_t *dev_list)
+{
+    int ret;
+    int dev_num_total;
+
+    if (dev_num == NULL || dev_list == NULL) {
+        return ESP_ERR_INVALID_ARG;
+    }
+
+    if (esp_bluedroid_get_status() != ESP_BLUEDROID_STATUS_ENABLED) {
+        return ESP_ERR_INVALID_STATE;
+    }
+
+    dev_num_total = btc_storage_get_num_bt_bond_devices();
+    if (*dev_num > dev_num_total) {
+        *dev_num = dev_num_total;
+    }
+
+    ret = btc_storage_get_bonded_bt_devices_list((bt_bdaddr_t *)dev_list, *dev_num);
+
+    return (ret == BT_STATUS_SUCCESS ? ESP_OK : ESP_FAIL);
+}
+
+esp_err_t esp_bt_gap_set_pin(esp_bt_pin_type_t pin_type, uint8_t pin_code_len, esp_bt_pin_code_t pin_code)
+{
+    btc_msg_t msg;
+    btc_gap_bt_args_t arg;
+
+    if (esp_bluedroid_get_status() != ESP_BLUEDROID_STATUS_ENABLED) {
+        return ESP_ERR_INVALID_STATE;
+    }
+
+    msg.sig = BTC_SIG_API_CALL;
+    msg.pid = BTC_PID_GAP_BT;
+    msg.act = BTC_GAP_BT_ACT_SET_PIN_TYPE;
+    arg.set_pin_type.pin_type = pin_type;
+    if (pin_type == ESP_BT_PIN_TYPE_FIXED){
+        arg.set_pin_type.pin_code_len = pin_code_len;
+        memcpy(arg.set_pin_type.pin_code, pin_code, pin_code_len);
+    } else {
+        arg.set_pin_type.pin_code_len = 0;
+        memset(arg.set_pin_type.pin_code, 0, ESP_BT_PIN_CODE_LEN);
+    }
+
+    return (btc_transfer_context(&msg, &arg, sizeof(btc_gap_bt_args_t), NULL)
+            == BT_STATUS_SUCCESS ? ESP_OK : ESP_FAIL);
+}
+
+esp_err_t esp_bt_gap_pin_reply(esp_bd_addr_t bd_addr, bool accept, uint8_t pin_code_len, esp_bt_pin_code_t pin_code)
+{
+    btc_msg_t msg;
+    btc_gap_bt_args_t arg;
+
+    if (esp_bluedroid_get_status() != ESP_BLUEDROID_STATUS_ENABLED) {
+        return ESP_ERR_INVALID_STATE;
+    }
+
+    msg.sig = BTC_SIG_API_CALL;
+    msg.pid = BTC_PID_GAP_BT;
+    msg.act = BTC_GAP_BT_ACT_PIN_REPLY;
+    arg.pin_reply.accept = accept;
+    arg.pin_reply.pin_code_len = pin_code_len;
+    memcpy(arg.pin_reply.bda.address, bd_addr, sizeof(esp_bd_addr_t));
+    memcpy(arg.pin_reply.pin_code, pin_code, pin_code_len);
+
+    return (btc_transfer_context(&msg, &arg, sizeof(btc_gap_bt_args_t), NULL)
+            == BT_STATUS_SUCCESS ? ESP_OK : ESP_FAIL);
+}
+
+#endif /* #if BTC_GAP_BT_INCLUDED == TRUE */

components/bt/bluedroid/api/esp_gatt_common_api.c

@@ -0,0 +1,49 @@
+// Copyright 2015-2017 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#include <string.h>
+#include "esp_gatt_common_api.h"
+#include "esp_bt_main.h"
+#include "esp_gatt_defs.h"
+#include "btc_gatt_common.h"
+
+/**
+ * @brief           This function is called to set local MTU,
+ *                  the function is called before BLE connection.
+ *
+ * @param[in]       mtu: the size of MTU.
+ *
+ * @return
+ *                  - ESP_OK: success
+ *                  - other: failed
+ *
+ */
+esp_err_t esp_ble_gatt_set_local_mtu (uint16_t mtu)
+{
+    btc_msg_t msg;
+    btc_ble_gatt_com_args_t arg;
+
+    ESP_BLUEDROID_STATUS_CHECK(ESP_BLUEDROID_STATUS_ENABLED);
+
+    if ((mtu < ESP_GATT_DEF_BLE_MTU_SIZE) || (mtu > ESP_GATT_MAX_MTU_SIZE)) {
+        return ESP_ERR_INVALID_SIZE;
+    }
+
+    msg.sig = BTC_SIG_API_CALL;
+    msg.pid = BTC_PID_GATT_COMMON;
+    msg.act = BTC_GATT_ACT_SET_LOCAL_MTU;
+    arg.set_mtu.mtu = mtu;
+
+    return (btc_transfer_context(&msg, &arg, sizeof(btc_ble_gatt_com_args_t), NULL) == BT_STATUS_SUCCESS ? ESP_OK : ESP_FAIL);
+}

components/bt/bluedroid/api/esp_gattc_api.c

@@ -16,17 +16,18 @@
 
 #include "esp_gattc_api.h"
 #include "esp_bt_main.h"
-#include "btc_manage.h"
+#include "btc/btc_manage.h"
 #include "btc_gattc.h"
 #include "btc_gatt_util.h"
+#include "stack/l2cdefs.h"
+#include "stack/l2c_api.h"
+
 
 #if (GATTC_INCLUDED == TRUE)
 esp_err_t esp_ble_gattc_register_callback(esp_gattc_cb_t callback)
 {
-    if (esp_bluedroid_get_status() == ESP_BLUEDROID_STATUS_UNINITIALIZED) {
-        return ESP_ERR_INVALID_STATE;
-    }
-    
+    ESP_BLUEDROID_STATUS_CHECK(ESP_BLUEDROID_STATUS_ENABLED);
+
     if (callback == NULL) {
         return ESP_FAIL;
     }
@@ -40,10 +41,8 @@ esp_err_t esp_ble_gattc_app_register(uint16_t app_id)
     btc_msg_t msg;
     btc_ble_gattc_args_t arg;
 
-    if (esp_bluedroid_get_status() != ESP_BLUEDROID_STATUS_ENABLED) {
-        return ESP_ERR_INVALID_STATE;
-    }
-    
+    ESP_BLUEDROID_STATUS_CHECK(ESP_BLUEDROID_STATUS_ENABLED);
+
     if (app_id > ESP_APP_ID_MAX) {
         return ESP_ERR_INVALID_ARG;
     }
@@ -61,10 +60,8 @@ esp_err_t esp_ble_gattc_app_unregister(esp_gatt_if_t gattc_if)
     btc_msg_t msg;
     btc_ble_gattc_args_t arg;
 
-    if (esp_bluedroid_get_status() != ESP_BLUEDROID_STATUS_ENABLED) {
-        return ESP_ERR_INVALID_STATE;
-    }
-    
+    ESP_BLUEDROID_STATUS_CHECK(ESP_BLUEDROID_STATUS_ENABLED);
+
     msg.sig = BTC_SIG_API_CALL;
     msg.pid = BTC_PID_GATTC;
     msg.act = BTC_GATTC_ACT_APP_UNREGISTER;
@@ -73,20 +70,19 @@ esp_err_t esp_ble_gattc_app_unregister(esp_gatt_if_t gattc_if)
     return (btc_transfer_context(&msg, &arg, sizeof(btc_ble_gattc_args_t), NULL) == BT_STATUS_SUCCESS ? ESP_OK : ESP_FAIL);
 }
 
-esp_err_t esp_ble_gattc_open(esp_gatt_if_t gattc_if, esp_bd_addr_t remote_bda, bool is_direct)
+esp_err_t esp_ble_gattc_open(esp_gatt_if_t gattc_if, esp_bd_addr_t remote_bda, esp_ble_addr_type_t remote_addr_type, bool is_direct)
 {
     btc_msg_t msg;
     btc_ble_gattc_args_t arg;
 
-    if (esp_bluedroid_get_status() != ESP_BLUEDROID_STATUS_ENABLED) {
-        return ESP_ERR_INVALID_STATE;
-    }
-    
+    ESP_BLUEDROID_STATUS_CHECK(ESP_BLUEDROID_STATUS_ENABLED);
+
     msg.sig = BTC_SIG_API_CALL;
     msg.pid = BTC_PID_GATTC;
     msg.act = BTC_GATTC_ACT_OPEN;
     arg.open.gattc_if = gattc_if;
     memcpy(arg.open.remote_bda, remote_bda, ESP_BD_ADDR_LEN);
+    arg.open.remote_addr_type = remote_addr_type;
     arg.open.is_direct = is_direct;
 
     return (btc_transfer_context(&msg, &arg, sizeof(btc_ble_gattc_args_t), NULL) == BT_STATUS_SUCCESS ? ESP_OK : ESP_FAIL);
@@ -97,10 +93,8 @@ esp_err_t esp_ble_gattc_close (esp_gatt_if_t gattc_if, uint16_t conn_id)
     btc_msg_t msg;
     btc_ble_gattc_args_t arg;
 
-    if (esp_bluedroid_get_status() != ESP_BLUEDROID_STATUS_ENABLED) {
-        return ESP_ERR_INVALID_STATE;
-    }
-    
+    ESP_BLUEDROID_STATUS_CHECK(ESP_BLUEDROID_STATUS_ENABLED);
+
     msg.sig = BTC_SIG_API_CALL;
     msg.pid = BTC_PID_GATTC;
     msg.act = BTC_GATTC_ACT_CLOSE;
@@ -109,24 +103,17 @@ esp_err_t esp_ble_gattc_close (esp_gatt_if_t gattc_if, uint16_t conn_id)
     return (btc_transfer_context(&msg, &arg, sizeof(btc_ble_gattc_args_t), NULL) == BT_STATUS_SUCCESS ? ESP_OK : ESP_FAIL);
 }
 
-esp_err_t esp_ble_gattc_config_mtu (esp_gatt_if_t gattc_if, uint16_t conn_id, uint16_t mtu)
+esp_err_t esp_ble_gattc_send_mtu_req (esp_gatt_if_t gattc_if, uint16_t conn_id)
 {
     btc_msg_t msg;
     btc_ble_gattc_args_t arg;
 
-    if (esp_bluedroid_get_status() != ESP_BLUEDROID_STATUS_ENABLED) {
-        return ESP_ERR_INVALID_STATE;
-    }
-    
-    if ((mtu < ESP_GATT_DEF_BLE_MTU_SIZE) || (mtu > ESP_GATT_MAX_MTU_SIZE)) {
-        return ESP_GATT_ILLEGAL_PARAMETER;
-    }
+    ESP_BLUEDROID_STATUS_CHECK(ESP_BLUEDROID_STATUS_ENABLED);
 
     msg.sig = BTC_SIG_API_CALL;
     msg.pid = BTC_PID_GATTC;
     msg.act = BTC_GATTC_ACT_CFG_MTU;
     arg.cfg_mtu.conn_id = BTC_GATT_CREATE_CONN_ID(gattc_if, conn_id);
-    arg.cfg_mtu.mtu = mtu;
 
     return (btc_transfer_context(&msg, &arg, sizeof(btc_ble_gattc_args_t), NULL) == BT_STATUS_SUCCESS ? ESP_OK : ESP_FAIL);
 }
@@ -136,10 +123,8 @@ esp_err_t esp_ble_gattc_search_service(esp_gatt_if_t gattc_if, uint16_t conn_id,
     btc_msg_t msg;
     btc_ble_gattc_args_t arg;
 
-    if (esp_bluedroid_get_status() != ESP_BLUEDROID_STATUS_ENABLED) {
-        return ESP_ERR_INVALID_STATE;
-    }
-    
+    ESP_BLUEDROID_STATUS_CHECK(ESP_BLUEDROID_STATUS_ENABLED);
+
     msg.sig = BTC_SIG_API_CALL;
     msg.pid = BTC_PID_GATTC;
     msg.act = BTC_GATTC_ACT_SEARCH_SERVICE;
@@ -155,167 +140,293 @@ esp_err_t esp_ble_gattc_search_service(esp_gatt_if_t gattc_if, uint16_t conn_id,
     return (btc_transfer_context(&msg, &arg, sizeof(btc_ble_gattc_args_t), NULL) == BT_STATUS_SUCCESS ? ESP_OK : ESP_FAIL);
 }
 
-esp_err_t esp_ble_gattc_get_characteristic(esp_gatt_if_t gattc_if,
-                                            uint16_t conn_id,
-                                            esp_gatt_srvc_id_t *srvc_id,
-                                            esp_gatt_id_t *start_char_id)
+esp_gatt_status_t esp_ble_gattc_get_service(esp_gatt_if_t gattc_if, uint16_t conn_id, esp_bt_uuid_t *svc_uuid,
+                                            esp_gattc_service_elem_t *result, uint16_t *count, uint16_t offset)
 {
-    btc_msg_t msg;
-    btc_ble_gattc_args_t arg;
+    ESP_BLUEDROID_STATUS_CHECK(ESP_BLUEDROID_STATUS_ENABLED);
 
-    if (esp_bluedroid_get_status() != ESP_BLUEDROID_STATUS_ENABLED) {
-        return ESP_ERR_INVALID_STATE;
-    }
-    
-    msg.sig = BTC_SIG_API_CALL;
-    msg.pid = BTC_PID_GATTC;
-    if (start_char_id) {
-        arg.get_next_char.conn_id = BTC_GATT_CREATE_CONN_ID(gattc_if, conn_id);
-        memcpy(&arg.get_next_char.service_id, srvc_id, sizeof(esp_gatt_srvc_id_t));
-        memcpy(&arg.get_next_char.char_id, start_char_id, sizeof(esp_gatt_id_t));
-        msg.act = BTC_GATTC_ACT_GET_NEXT_CHAR;
-    } else {
-        arg.get_first_char.conn_id = BTC_GATT_CREATE_CONN_ID(gattc_if, conn_id);
-        memcpy(&arg.get_first_char.service_id, srvc_id, sizeof(esp_gatt_srvc_id_t));
-        msg.act = BTC_GATTC_ACT_GET_FIRST_CHAR;
+    if (result == NULL || count == NULL || *count == 0) {
+        return ESP_GATT_INVALID_PDU;
     }
 
-    return (btc_transfer_context(&msg, &arg, sizeof(btc_ble_gattc_args_t), NULL) == BT_STATUS_SUCCESS ? ESP_OK : ESP_FAIL);
+    uint16_t conn_hdl = BTC_GATT_CREATE_CONN_ID(gattc_if, conn_id);
+    return btc_ble_gattc_get_service(conn_hdl, svc_uuid, result, count, offset);
 }
 
-esp_err_t esp_ble_gattc_get_descriptor(esp_gatt_if_t gattc_if,
-                                       uint16_t conn_id,
-                                       esp_gatt_srvc_id_t *srvc_id,
-                                       esp_gatt_id_t *char_id,
-                                       esp_gatt_id_t *start_descr_id)
+
+esp_gatt_status_t esp_ble_gattc_get_all_char(esp_gatt_if_t gattc_if,
+                                             uint16_t conn_id,
+                                             uint16_t start_handle,
+                                             uint16_t end_handle,
+                                             esp_gattc_char_elem_t *result,
+                                             uint16_t *count, uint16_t offset)
 {
-    btc_msg_t msg;
-    btc_ble_gattc_args_t arg;
+    ESP_BLUEDROID_STATUS_CHECK(ESP_BLUEDROID_STATUS_ENABLED);
 
-    if (esp_bluedroid_get_status() != ESP_BLUEDROID_STATUS_ENABLED) {
-        return ESP_ERR_INVALID_STATE;
-    }
-    
-    msg.sig = BTC_SIG_API_CALL;
-    msg.pid = BTC_PID_GATTC;
-
-    if (start_descr_id) {
-        arg.get_next_descr.conn_id = BTC_GATT_CREATE_CONN_ID(gattc_if, conn_id);
-        memcpy(&arg.get_next_descr.service_id, srvc_id, sizeof(esp_gatt_srvc_id_t));
-        memcpy(&arg.get_next_descr.char_id, char_id, sizeof(esp_gatt_id_t));
-        memcpy(&arg.get_next_descr.descr_id, start_descr_id, sizeof(esp_gatt_id_t));
-        msg.act = BTC_GATTC_ACT_GET_NEXT_DESCR;
-    } else {
-        arg.get_first_descr.conn_id = BTC_GATT_CREATE_CONN_ID(gattc_if, conn_id);
-        memcpy(&arg.get_first_descr.service_id, srvc_id, sizeof(esp_gatt_srvc_id_t));
-        memcpy(&arg.get_first_descr.char_id, char_id, sizeof(esp_gatt_id_t));
-        msg.act = BTC_GATTC_ACT_GET_FIRST_DESCR;
+    if ((start_handle == 0) && (end_handle == 0)) {
+        *count = 0;
+        return ESP_GATT_INVALID_HANDLE;
     }
 
-    return (btc_transfer_context(&msg, &arg, sizeof(btc_ble_gattc_args_t), NULL) == BT_STATUS_SUCCESS ? ESP_OK : ESP_FAIL);
+    if (result == NULL || count == NULL || *count == 0) {
+        return ESP_GATT_INVALID_PDU;
+    }
+
+    uint16_t conn_hdl = BTC_GATT_CREATE_CONN_ID(gattc_if, conn_id);
+    return btc_ble_gattc_get_all_char(conn_hdl, start_handle, end_handle, result, count, offset);
 }
 
-esp_err_t esp_ble_gattc_get_included_service(esp_gatt_if_t gattc_if, 
-                                            uint16_t conn_id,
-                                            esp_gatt_srvc_id_t *srvc_id,
-                                            esp_gatt_srvc_id_t *start_incl_srvc_id)
+esp_gatt_status_t esp_ble_gattc_get_all_descr(esp_gatt_if_t gattc_if,
+                                              uint16_t conn_id,
+                                              uint16_t char_handle,                                            
+                                              esp_gattc_descr_elem_t *result,
+                                              uint16_t *count, uint16_t offset)
 {
-    btc_msg_t msg;
-    btc_ble_gattc_args_t arg;
+    ESP_BLUEDROID_STATUS_CHECK(ESP_BLUEDROID_STATUS_ENABLED);
 
-    if (esp_bluedroid_get_status() != ESP_BLUEDROID_STATUS_ENABLED) {
-        return ESP_ERR_INVALID_STATE;
+    if (char_handle == 0) {
+        return ESP_GATT_INVALID_HANDLE;
+    }
+
+    if (result == NULL || count == NULL || *count == 0) {
+        return ESP_GATT_INVALID_PDU;
+    }
+
+    uint16_t conn_hdl = BTC_GATT_CREATE_CONN_ID(gattc_if, conn_id);
+    return btc_ble_gattc_get_all_descr(conn_hdl, char_handle, result, count, offset);
+}
+
+esp_gatt_status_t esp_ble_gattc_get_char_by_uuid(esp_gatt_if_t gattc_if, 
+                                                 uint16_t conn_id,
+                                                 uint16_t start_handle,
+                                                 uint16_t end_handle,
+                                                 esp_bt_uuid_t char_uuid,
+                                                 esp_gattc_char_elem_t *result,
+                                                 uint16_t *count)
+{
+    ESP_BLUEDROID_STATUS_CHECK(ESP_BLUEDROID_STATUS_ENABLED);
+
+    if (start_handle == 0 && end_handle == 0) {
+        *count = 0;
+        return ESP_GATT_INVALID_HANDLE;
+    }
+
+    if (result == NULL || count == NULL || *count == 0) {
+        return ESP_GATT_INVALID_PDU;
+    }
+
+    uint16_t conn_hdl = BTC_GATT_CREATE_CONN_ID(gattc_if,conn_id);
+    return btc_ble_gattc_get_char_by_uuid(conn_hdl, start_handle, end_handle, char_uuid, result, count);
+}
+
+
+esp_gatt_status_t esp_ble_gattc_get_descr_by_uuid(esp_gatt_if_t gattc_if,
+                                                  uint16_t conn_id,
+                                                  uint16_t start_handle,
+                                                  uint16_t end_handle,
+                                                  esp_bt_uuid_t char_uuid,
+                                                  esp_bt_uuid_t descr_uuid,
+                                                  esp_gattc_descr_elem_t *result,
+                                                  uint16_t *count)
+{
+    ESP_BLUEDROID_STATUS_CHECK(ESP_BLUEDROID_STATUS_ENABLED);
+
+    if (result == NULL || count == NULL || *count == 0) {
+        return ESP_GATT_INVALID_PDU;
+    }
+
+    uint16_t conn_hdl = BTC_GATT_CREATE_CONN_ID(gattc_if, conn_id);
+    return btc_ble_gattc_get_descr_by_uuid(conn_hdl, start_handle, end_handle, char_uuid, descr_uuid, result, count);
+}
+
+esp_gatt_status_t esp_ble_gattc_get_descr_by_char_handle(esp_gatt_if_t gattc_if,
+                                                         uint16_t conn_id,
+                                                         uint16_t char_handle,
+                                                         esp_bt_uuid_t descr_uuid,
+                                                         esp_gattc_descr_elem_t *result,
+                                                         uint16_t *count)
+{
+    ESP_BLUEDROID_STATUS_CHECK(ESP_BLUEDROID_STATUS_ENABLED);
+
+    if (char_handle == 0) {
+        *count = 0;
+        return ESP_GATT_INVALID_HANDLE;
     }
     
-    msg.sig = BTC_SIG_API_CALL;
-    msg.pid = BTC_PID_GATTC;
-
-    if (start_incl_srvc_id) {
-        arg.get_next_incl_srvc.conn_id = BTC_GATT_CREATE_CONN_ID(gattc_if, conn_id);
-        memcpy(&arg.get_next_incl_srvc.service_id, srvc_id, sizeof(esp_gatt_srvc_id_t));
-        memcpy(&arg.get_next_incl_srvc.start_service_id, start_incl_srvc_id, sizeof(esp_gatt_srvc_id_t));
-        msg.act = BTC_GATTC_ACT_GET_NEXT_INCL_SERVICE;
-    } else {
-        arg.get_first_incl_srvc.conn_id = BTC_GATT_CREATE_CONN_ID(gattc_if, conn_id);
-        memcpy(&arg.get_first_incl_srvc.service_id, srvc_id, sizeof(esp_gatt_srvc_id_t));
-        msg.act = BTC_GATTC_ACT_GET_FIRST_INCL_SERVICE;
+    if (result == NULL || count == NULL || *count == 0) {
+        return ESP_GATT_INVALID_PDU;
     }
 
-    return (btc_transfer_context(&msg, &arg, sizeof(btc_ble_gattc_args_t), NULL) == BT_STATUS_SUCCESS ? ESP_OK : ESP_FAIL);
+    uint16_t conn_hdl = BTC_GATT_CREATE_CONN_ID(gattc_if, conn_id);
+    return btc_ble_gattc_get_descr_by_char_handle(conn_hdl, char_handle, descr_uuid, result, count);
 }
 
+esp_gatt_status_t esp_ble_gattc_get_include_service(esp_gatt_if_t gattc_if,
+                                                    uint16_t conn_id,
+                                                    uint16_t start_handle,
+                                                    uint16_t end_handle,
+                                                    esp_bt_uuid_t *incl_uuid,
+                                                    esp_gattc_incl_svc_elem_t *result,
+                                                    uint16_t *count)
+{
+    ESP_BLUEDROID_STATUS_CHECK(ESP_BLUEDROID_STATUS_ENABLED);
+
+    if (start_handle == 0 && end_handle == 0) {
+        *count = 0;
+        return ESP_GATT_INVALID_HANDLE;
+    }
+
+    if (result == NULL || count == NULL || *count == 0) {
+        return ESP_GATT_INVALID_PDU;
+    }
+
+    uint16_t conn_hdl = BTC_GATT_CREATE_CONN_ID(gattc_if, conn_id);
+    return btc_ble_gattc_get_include_service(conn_hdl, start_handle, end_handle, incl_uuid, result, count);
+}
+
+esp_gatt_status_t esp_ble_gattc_get_attr_count(esp_gatt_if_t gattc_if,
+                                               uint16_t conn_id,
+                                               esp_gatt_db_attr_type_t type,
+                                               uint16_t start_handle,
+                                               uint16_t end_handle,
+                                               uint16_t char_handle,
+                                               uint16_t *count)
+{
+    ESP_BLUEDROID_STATUS_CHECK(ESP_BLUEDROID_STATUS_ENABLED);
+
+    if ((start_handle == 0 && end_handle == 0) && (type != ESP_GATT_DB_DESCRIPTOR)) {
+        *count = 0;
+        return ESP_GATT_INVALID_HANDLE;
+    }
+
+    if (count == NULL) {
+        return ESP_GATT_INVALID_PDU;
+    }
+
+    uint16_t conn_hdl = BTC_GATT_CREATE_CONN_ID(gattc_if, conn_id);
+    return btc_ble_gattc_get_attr_count(conn_hdl, type, start_handle, end_handle, char_handle, count);
+}
+
+esp_gatt_status_t esp_ble_gattc_get_db(esp_gatt_if_t gattc_if, uint16_t conn_id, uint16_t start_handle, uint16_t end_handle,
+                                       esp_gattc_db_elem_t *db, uint16_t *count)
+{
+    ESP_BLUEDROID_STATUS_CHECK(ESP_BLUEDROID_STATUS_ENABLED);
+
+    if (start_handle == 0 && end_handle == 0) {
+        *count = 0;
+        return ESP_GATT_INVALID_HANDLE;
+    }
+
+    if (db == NULL || count == NULL || *count == 0) {
+        return ESP_GATT_INVALID_PDU;
+    }
+
+    uint16_t conn_hdl = BTC_GATT_CREATE_CONN_ID(gattc_if, conn_id);
+    return btc_ble_gattc_get_db(conn_hdl, start_handle, end_handle, db, count);
+}
+
+
 esp_err_t esp_ble_gattc_read_char (esp_gatt_if_t gattc_if, 
-                                uint16_t conn_id,
-                                esp_gatt_srvc_id_t *srvc_id,
-                                esp_gatt_id_t *char_id,
-                                esp_gatt_auth_req_t auth_req)
+                                   uint16_t conn_id, uint16_t handle,
+                                   esp_gatt_auth_req_t auth_req)
 {
     btc_msg_t msg;
     btc_ble_gattc_args_t arg;
 
-    if (esp_bluedroid_get_status() != ESP_BLUEDROID_STATUS_ENABLED) {
-        return ESP_ERR_INVALID_STATE;
+    ESP_BLUEDROID_STATUS_CHECK(ESP_BLUEDROID_STATUS_ENABLED);
+
+    if (L2CA_CheckIsCongest(L2CAP_ATT_CID, conn_id)) {
+        LOG_DEBUG("%s, the l2cap chanel is congest.", __func__);
+        return ESP_FAIL;
     }
-    
+
     msg.sig = BTC_SIG_API_CALL;
     msg.pid = BTC_PID_GATTC;
     msg.act = BTC_GATTC_ACT_READ_CHAR;
     arg.read_char.conn_id = BTC_GATT_CREATE_CONN_ID(gattc_if, conn_id);
-    memcpy(&arg.read_char.service_id, srvc_id, sizeof(esp_gatt_srvc_id_t));
-    memcpy(&arg.read_char.char_id, char_id, sizeof(esp_gatt_id_t));
+    arg.read_char.handle = handle;
     arg.read_char.auth_req = auth_req;
 
     return (btc_transfer_context(&msg, &arg, sizeof(btc_ble_gattc_args_t), NULL) == BT_STATUS_SUCCESS ? ESP_OK : ESP_FAIL);
 }
 
-esp_err_t esp_ble_gattc_read_char_descr (esp_gatt_if_t gattc_if,
-                                        uint16_t conn_id,
-                                        esp_gatt_srvc_id_t *srvc_id,
-                                        esp_gatt_id_t  *char_id,
-                                        esp_gatt_id_t  *descr_id,
-                                        esp_gatt_auth_req_t auth_req)
+esp_err_t esp_ble_gattc_read_multiple(esp_gatt_if_t gattc_if,
+                                      uint16_t conn_id, esp_gattc_multi_t *read_multi,
+                                      esp_gatt_auth_req_t auth_req)
 {
     btc_msg_t msg;
     btc_ble_gattc_args_t arg;
 
-    if (esp_bluedroid_get_status() != ESP_BLUEDROID_STATUS_ENABLED) {
-        return ESP_ERR_INVALID_STATE;
+    ESP_BLUEDROID_STATUS_CHECK(ESP_BLUEDROID_STATUS_ENABLED);
+
+    if (L2CA_CheckIsCongest(L2CAP_ATT_CID, conn_id)) {
+        LOG_DEBUG("%s, the l2cap chanel is congest.", __func__);
+        return ESP_FAIL;
     }
-    
+
+    msg.sig = BTC_SIG_API_CALL;
+    msg.pid = BTC_PID_GATTC;
+    msg.act = BTC_GATTC_ACT_READ_MULTIPLE_CHAR;
+    arg.read_multiple.conn_id = BTC_GATT_CREATE_CONN_ID(gattc_if, conn_id);
+    arg.read_multiple.num_attr = read_multi->num_attr;
+    arg.read_multiple.auth_req = auth_req;
+
+    if (read_multi->num_attr > 0) {
+        memcpy(arg.read_multiple.handles, read_multi->handles, sizeof(uint16_t)*read_multi->num_attr);
+    } else {
+        LOG_ERROR("%s(), the num_attr should not be 0.", __func__);
+        return ESP_FAIL;
+    }
+    return (btc_transfer_context(&msg, &arg, sizeof(btc_ble_gattc_args_t), NULL) == BT_STATUS_SUCCESS ? ESP_OK : ESP_FAIL);
+}
+
+
+esp_err_t esp_ble_gattc_read_char_descr (esp_gatt_if_t gattc_if,
+                                         uint16_t conn_id, uint16_t handle,
+                                         esp_gatt_auth_req_t auth_req)
+{
+    btc_msg_t msg;
+    btc_ble_gattc_args_t arg;
+
+    ESP_BLUEDROID_STATUS_CHECK(ESP_BLUEDROID_STATUS_ENABLED);
+
+    if (L2CA_CheckIsCongest(L2CAP_ATT_CID, conn_id)) {
+        LOG_DEBUG("%s, the l2cap chanel is congest.", __func__);
+        return ESP_FAIL;
+    }
+
     msg.sig = BTC_SIG_API_CALL;
     msg.pid = BTC_PID_GATTC;
     msg.act = BTC_GATTC_ACT_READ_CHAR_DESCR;
     arg.read_descr.conn_id = BTC_GATT_CREATE_CONN_ID(gattc_if, conn_id);
-    memcpy(&arg.read_descr.service_id, srvc_id, sizeof(esp_gatt_srvc_id_t));
-    memcpy(&arg.read_descr.char_id, char_id, sizeof(esp_gatt_id_t));
-    memcpy(&arg.read_descr.descr_id, descr_id, sizeof(esp_gatt_id_t));
+    arg.read_descr.handle = handle;
     arg.read_descr.auth_req = auth_req;
 
     return (btc_transfer_context(&msg, &arg, sizeof(btc_ble_gattc_args_t), NULL) == BT_STATUS_SUCCESS ? ESP_OK : ESP_FAIL);
 }
 
-esp_err_t esp_ble_gattc_write_char( esp_gatt_if_t gattc_if,
-                                    uint16_t conn_id,
-                                    esp_gatt_srvc_id_t *srvc_id,
-                                    esp_gatt_id_t *char_id,
-                                    uint16_t value_len,
-                                    uint8_t *value,
-                                    esp_gatt_write_type_t write_type,
-                                    esp_gatt_auth_req_t auth_req)
+esp_err_t esp_ble_gattc_write_char(esp_gatt_if_t gattc_if,
+                                   uint16_t conn_id, uint16_t handle,
+                                   uint16_t value_len,
+                                   uint8_t *value,
+                                   esp_gatt_write_type_t write_type,
+                                   esp_gatt_auth_req_t auth_req)
 {
     btc_msg_t msg;
     btc_ble_gattc_args_t arg;
 
-    if (esp_bluedroid_get_status() != ESP_BLUEDROID_STATUS_ENABLED) {
-        return ESP_ERR_INVALID_STATE;
+    ESP_BLUEDROID_STATUS_CHECK(ESP_BLUEDROID_STATUS_ENABLED);
+
+    if (L2CA_CheckIsCongest(L2CAP_ATT_CID, conn_id)) {
+        LOG_DEBUG("%s, the l2cap chanel is congest.", __func__);
+        return ESP_FAIL;
     }
-    
+
     msg.sig = BTC_SIG_API_CALL;
     msg.pid = BTC_PID_GATTC;
     msg.act = BTC_GATTC_ACT_WRITE_CHAR;
     arg.write_char.conn_id = BTC_GATT_CREATE_CONN_ID(gattc_if, conn_id);
-    memcpy(&arg.write_char.service_id, srvc_id, sizeof(esp_gatt_srvc_id_t));
-    memcpy(&arg.write_char.char_id, char_id, sizeof(esp_gatt_id_t));
+    arg.write_char.handle = handle;
     arg.write_char.value_len = value_len > ESP_GATT_MAX_ATTR_LEN ? ESP_GATT_MAX_ATTR_LEN : value_len;
     arg.write_char.value = value;
     arg.write_char.write_type = write_type;
@@ -325,29 +436,27 @@ esp_err_t esp_ble_gattc_write_char( esp_gatt_if_t gattc_if,
 }
 
 esp_err_t esp_ble_gattc_write_char_descr (esp_gatt_if_t gattc_if,
-                                         uint16_t conn_id,
-                                         esp_gatt_srvc_id_t *srvc_id,
-                                         esp_gatt_id_t *char_id,
-                                         esp_gatt_id_t *descr_id,
-                                         uint16_t value_len,
-                                         uint8_t *value,
-                                         esp_gatt_write_type_t write_type,
-                                         esp_gatt_auth_req_t auth_req)
+                                          uint16_t conn_id, uint16_t handle,
+                                          uint16_t value_len,
+                                          uint8_t *value,
+                                          esp_gatt_write_type_t write_type,
+                                          esp_gatt_auth_req_t auth_req)
 {
     btc_msg_t msg;
     btc_ble_gattc_args_t arg;
 
-    if (esp_bluedroid_get_status() != ESP_BLUEDROID_STATUS_ENABLED) {
-        return ESP_ERR_INVALID_STATE;
+    ESP_BLUEDROID_STATUS_CHECK(ESP_BLUEDROID_STATUS_ENABLED);
+
+    if (L2CA_CheckIsCongest(L2CAP_ATT_CID, conn_id)) {
+        LOG_DEBUG("%s, the l2cap chanel is congest.", __func__);
+        return ESP_FAIL;
     }
 
     msg.sig = BTC_SIG_API_CALL;
     msg.pid = BTC_PID_GATTC;
     msg.act = BTC_GATTC_ACT_WRITE_CHAR_DESCR;
     arg.write_descr.conn_id = BTC_GATT_CREATE_CONN_ID(gattc_if, conn_id);
-    memcpy(&arg.write_descr.service_id, srvc_id, sizeof(esp_gatt_srvc_id_t));
-    memcpy(&arg.write_descr.char_id, char_id, sizeof(esp_gatt_id_t));
-    memcpy(&arg.write_descr.descr_id, descr_id, sizeof(esp_gatt_id_t));
+    arg.write_descr.handle = handle;
     arg.write_descr.value_len = value_len > ESP_GATT_MAX_ATTR_LEN ? ESP_GATT_MAX_ATTR_LEN : value_len;
     arg.write_descr.value = value;
     arg.write_descr.write_type = write_type;
@@ -357,9 +466,7 @@ esp_err_t esp_ble_gattc_write_char_descr (esp_gatt_if_t gattc_if,
 }
 
 esp_err_t esp_ble_gattc_prepare_write(esp_gatt_if_t gattc_if, 
-                                      uint16_t conn_id,
-                                      esp_gatt_srvc_id_t *srvc_id,
-                                      esp_gatt_id_t *char_id,
+                                      uint16_t conn_id, uint16_t handle,
                                       uint16_t offset,
                                       uint16_t value_len,
                                       uint8_t *value,
@@ -368,16 +475,18 @@ esp_err_t esp_ble_gattc_prepare_write(esp_gatt_if_t gattc_if,
     btc_msg_t msg;
     btc_ble_gattc_args_t arg;
 
-    if (esp_bluedroid_get_status() != ESP_BLUEDROID_STATUS_ENABLED) {
-        return ESP_ERR_INVALID_STATE;
+    ESP_BLUEDROID_STATUS_CHECK(ESP_BLUEDROID_STATUS_ENABLED);
+
+    if (L2CA_CheckIsCongest(L2CAP_ATT_CID, conn_id)) {
+        LOG_DEBUG("%s, the l2cap chanel is congest.", __func__);
+        return ESP_FAIL;
     }
 
     msg.sig = BTC_SIG_API_CALL;
     msg.pid = BTC_PID_GATTC;
     msg.act = BTC_GATTC_ACT_PREPARE_WRITE;
     arg.prep_write.conn_id = BTC_GATT_CREATE_CONN_ID(gattc_if, conn_id);
-    memcpy(&arg.prep_write.service_id, srvc_id, sizeof(esp_gatt_srvc_id_t));
-    memcpy(&arg.prep_write.char_id, char_id, sizeof(esp_gatt_id_t));
+    arg.prep_write.handle = handle;
     arg.prep_write.offset = offset;
     arg.prep_write.value_len = value_len > ESP_GATT_MAX_ATTR_LEN ? ESP_GATT_MAX_ATTR_LEN : value_len; // length check ?
     arg.prep_write.value = value;
@@ -387,10 +496,7 @@ esp_err_t esp_ble_gattc_prepare_write(esp_gatt_if_t gattc_if,
 }
 
 esp_err_t esp_ble_gattc_prepare_write_char_descr(esp_gatt_if_t gattc_if,
-                                                 uint16_t conn_id,
-                                                 esp_gatt_srvc_id_t *srvc_id,
-                                                 esp_gatt_id_t *char_id,
-                                                 esp_gatt_id_t *descr_id,
+                                                 uint16_t conn_id, uint16_t handle,
                                                  uint16_t offset,
                                                  uint16_t value_len,
                                                  uint8_t *value,
@@ -399,17 +505,18 @@ esp_err_t esp_ble_gattc_prepare_write_char_descr(esp_gatt_if_t gattc_if,
     btc_msg_t msg;
     btc_ble_gattc_args_t arg;
 
-    if (esp_bluedroid_get_status() != ESP_BLUEDROID_STATUS_ENABLED) {
-        return ESP_ERR_INVALID_STATE;
+    ESP_BLUEDROID_STATUS_CHECK(ESP_BLUEDROID_STATUS_ENABLED);
+
+    if (L2CA_CheckIsCongest(L2CAP_ATT_CID, conn_id)) {
+        LOG_DEBUG("%s, the l2cap chanel is congest.", __func__);
+        return ESP_FAIL;
     }
 
     msg.sig = BTC_SIG_API_CALL;
     msg.pid = BTC_PID_GATTC;
     msg.act = BTC_GATTC_ACT_PREPARE_WRITE_CHAR_DESCR;
     arg.prep_write_descr.conn_id = BTC_GATT_CREATE_CONN_ID(gattc_if, conn_id);
-    memcpy(&arg.prep_write_descr.service_id, srvc_id, sizeof(esp_gatt_srvc_id_t));
-    memcpy(&arg.prep_write_descr.char_id, char_id, sizeof(esp_gatt_id_t));
-    memcpy(&arg.prep_write_descr.descr_id, descr_id, sizeof(esp_gatt_id_t));
+    arg.prep_write_descr.handle = handle;
     arg.prep_write_descr.offset = offset;
     arg.prep_write_descr.value_len = value_len > ESP_GATT_MAX_ATTR_LEN ? ESP_GATT_MAX_ATTR_LEN : value_len; // length check ?
     arg.prep_write_descr.value = value;
@@ -423,10 +530,8 @@ esp_err_t esp_ble_gattc_execute_write (esp_gatt_if_t gattc_if, uint16_t conn_id,
     btc_msg_t msg;
     btc_ble_gattc_args_t arg;
 
-    if (esp_bluedroid_get_status() != ESP_BLUEDROID_STATUS_ENABLED) {
-        return ESP_ERR_INVALID_STATE;
-    }
-    
+    ESP_BLUEDROID_STATUS_CHECK(ESP_BLUEDROID_STATUS_ENABLED);
+
     msg.sig = BTC_SIG_API_CALL;
     msg.pid = BTC_PID_GATTC;
     msg.act = BTC_GATTC_ACT_EXECUTE_WRITE;
@@ -436,49 +541,38 @@ esp_err_t esp_ble_gattc_execute_write (esp_gatt_if_t gattc_if, uint16_t conn_id,
     return (btc_transfer_context(&msg, &arg, sizeof(btc_ble_gattc_args_t), NULL) == BT_STATUS_SUCCESS ? ESP_OK : ESP_FAIL);
 }
 
-esp_gatt_status_t esp_ble_gattc_register_for_notify (esp_gatt_if_t gattc_if,
-        esp_bd_addr_t server_bda,
-        esp_gatt_srvc_id_t *srvc_id,
-        esp_gatt_id_t *char_id)
+esp_err_t esp_ble_gattc_register_for_notify (esp_gatt_if_t gattc_if,
+                                             esp_bd_addr_t server_bda, uint16_t handle)
 {
     btc_msg_t msg;
     btc_ble_gattc_args_t arg;
 
-    if (esp_bluedroid_get_status() != ESP_BLUEDROID_STATUS_ENABLED) {
-        return ESP_ERR_INVALID_STATE;
-    }
-    
+    ESP_BLUEDROID_STATUS_CHECK(ESP_BLUEDROID_STATUS_ENABLED);
+
     msg.sig = BTC_SIG_API_CALL;
     msg.pid = BTC_PID_GATTC;
     msg.act = BTC_GATTC_ACT_REG_FOR_NOTIFY;
     arg.reg_for_notify.gattc_if = gattc_if;
     memcpy(arg.reg_for_notify.remote_bda, server_bda, sizeof(esp_bd_addr_t));
-    memcpy(&arg.reg_for_notify.service_id, srvc_id, sizeof(esp_gatt_srvc_id_t));
-    memcpy(&arg.reg_for_notify.char_id, char_id, sizeof(esp_gatt_id_t));
+    arg.reg_for_notify.handle = handle;
 
     return (btc_transfer_context(&msg, &arg, sizeof(btc_ble_gattc_args_t), NULL) == BT_STATUS_SUCCESS ? ESP_OK : ESP_FAIL);
 }
 
-esp_gatt_status_t esp_ble_gattc_unregister_for_notify (esp_gatt_if_t gattc_if,
-        esp_bd_addr_t server_bda,
-        esp_gatt_srvc_id_t *srvc_id,
-        esp_gatt_id_t *char_id)
+esp_err_t esp_ble_gattc_unregister_for_notify (esp_gatt_if_t gattc_if,
+                                               esp_bd_addr_t server_bda, uint16_t handle)
 {
     btc_msg_t msg;
     btc_ble_gattc_args_t arg;
 
-    if (esp_bluedroid_get_status() != ESP_BLUEDROID_STATUS_ENABLED) {
-        return ESP_ERR_INVALID_STATE;
-    }
-    
+    ESP_BLUEDROID_STATUS_CHECK(ESP_BLUEDROID_STATUS_ENABLED);
+
     msg.sig = BTC_SIG_API_CALL;
     msg.pid = BTC_PID_GATTC;
     msg.act = BTC_GATTC_ACT_UNREG_FOR_NOTIFY;
     arg.unreg_for_notify.gattc_if = gattc_if;
+    arg.unreg_for_notify.handle = handle;
     memcpy(arg.unreg_for_notify.remote_bda, server_bda, sizeof(esp_bd_addr_t));
-    memcpy(&arg.unreg_for_notify.service_id, srvc_id, sizeof(esp_gatt_srvc_id_t));
-    memcpy(&arg.unreg_for_notify.char_id, char_id, sizeof(esp_gatt_id_t));
-
     return (btc_transfer_context(&msg, &arg, sizeof(btc_ble_gattc_args_t), NULL) == BT_STATUS_SUCCESS ? ESP_OK : ESP_FAIL);
 }
 
@@ -487,9 +581,7 @@ esp_err_t esp_ble_gattc_cache_refresh(esp_bd_addr_t remote_bda)
     btc_msg_t msg;
     btc_ble_gattc_args_t arg;
 
-    if (esp_bluedroid_get_status() != ESP_BLUEDROID_STATUS_ENABLED) {
-        return ESP_ERR_INVALID_STATE;
-    }
+    ESP_BLUEDROID_STATUS_CHECK(ESP_BLUEDROID_STATUS_ENABLED);
 
     msg.sig = BTC_SIG_API_CALL;
     msg.pid = BTC_PID_GATTC;
@@ -499,5 +591,37 @@ esp_err_t esp_ble_gattc_cache_refresh(esp_bd_addr_t remote_bda)
     return (btc_transfer_context(&msg, &arg, sizeof(btc_ble_gattc_args_t), NULL) == BT_STATUS_SUCCESS ? ESP_OK : ESP_FAIL);
 }
 
+esp_err_t esp_ble_gattc_cache_assoc(esp_gatt_if_t gattc_if, esp_bd_addr_t src_addr, esp_bd_addr_t assoc_addr, bool is_assoc)
+{
+    btc_msg_t msg;
+    btc_ble_gattc_args_t arg;
+
+    ESP_BLUEDROID_STATUS_CHECK(ESP_BLUEDROID_STATUS_ENABLED);
+
+    msg.sig = BTC_SIG_API_CALL;
+    msg.pid = BTC_PID_GATTC;
+    msg.act = BTC_GATTC_ACT_CACHE_ASSOC;
+    arg.cache_assoc.is_assoc = is_assoc;
+    arg.cache_assoc.gattc_if = gattc_if;
+    memcpy(arg.cache_assoc.src_addr, src_addr, sizeof(esp_bd_addr_t));
+    memcpy(arg.cache_assoc.assoc_addr, assoc_addr, sizeof(esp_bd_addr_t));
+
+    return (btc_transfer_context(&msg, &arg, sizeof(btc_ble_gattc_args_t), NULL) == BT_STATUS_SUCCESS ? ESP_OK : ESP_FAIL);
+}
+
+esp_err_t esp_ble_gattc_cache_get_addr_list(esp_gatt_if_t gattc_if)
+{
+    btc_msg_t msg;
+    btc_ble_gattc_args_t arg;
+
+    ESP_BLUEDROID_STATUS_CHECK(ESP_BLUEDROID_STATUS_ENABLED);
+
+    msg.sig = BTC_SIG_API_CALL;
+    msg.pid = BTC_PID_GATTC;
+    msg.act = BTC_GATTC_ATC_CACHE_GET_ADDR_LIST;
+    arg.get_addr_list.gattc_if = gattc_if;
+    return (btc_transfer_context(&msg, &arg, sizeof(btc_ble_gattc_args_t), NULL) == BT_STATUS_SUCCESS ? ESP_OK : ESP_FAIL);
+}
+
 #endif  ///GATTC_INCLUDED == TRUE