feedc0de/wolfssl
1
0
Fork 0
forked from wolfSSL/wolfssl
Code Pull Requests Activity

Merge pull request #1604 from TimParrish/addAMDFunk

Browse Source 
Update cpuid.c to optimize intelasm for performance on AMD processors
This commit is contained in:
toddouska
2018-06-12 16:19:33 -07:00
committed by GitHub
parent af7b676405 9448b96afd
commit e60262cbf1
4 changed files with 38 additions and 8 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
ChangeLog.md
View File

@ -1,3 +1,7 @@
# wolfSSL Release x.x.x
* Added AES performance enhancements on AMD processors with build option `./configure --enable-intelasm`
# wolfSSL Release 3.15.0 (06/05/2018)
Release 3.15.0 of wolfSSL embedded TLS has bug fixes and new features including:

7
README.md
View File

@ -65,6 +65,9 @@ wolfSSL_CTX_set_verify(ctx, SSL_VERIFY_NONE, 0);
before calling wolfSSL_new(); Though it's not recommended.
```
# wolfSSL Release x.x.x
* Added AES performance enhancements on AMD processors using Intel ASM instructions
## Note 3
```
@ -75,6 +78,10 @@ hash function. Instead the name WC_SHA, WC_SHA256, WC_SHA384 and WC_SHA512
should be used for the enum name.
```
# wolfSSL Release x.x.x
* Added AES performance enhancements on AMD processors with build option `./configure --enable-intelasm`
# wolfSSL Release 3.15.0 (06/05/2018)
Release 3.15.0 of wolfSSL embedded TLS has bug fixes and new features including:

20
wolfcrypt/src/asm.c
View File

@ -81,17 +81,27 @@ static word32 cpuid_check = 0 ;
static word32 cpuid_flags = 0 ;
static word32 cpuid_flag(word32 leaf, word32 sub, word32 num, word32 bit) {
int got_intel_cpu=0;
int got_intel_cpu = 0;
int got_amd_cpu = 0;
unsigned int reg[5];
reg[4] = '\0' ;
cpuid(reg, 0, 0);
if(memcmp((char *)&(reg[EBX]), "Genu", 4) == 0 &&
memcmp((char *)&(reg[EDX]), "ineI", 4) == 0 &&
memcmp((char *)&(reg[ECX]), "ntel", 4) == 0) {
/* check for intel cpu */
if( memcmp((char *)&(reg[EBX]), "Genu", 4) == 0 &&
memcmp((char *)&(reg[EDX]), "ineI", 4) == 0 &&
memcmp((char *)&(reg[ECX]), "ntel", 4) == 0) {
got_intel_cpu = 1;
}
if (got_intel_cpu) {
/* check for AMD cpu */
if( memcmp((char *)&(reg[EBX]), "Auth", 4) == 0 &&
memcmp((char *)&(reg[EDX]), "enti", 4) == 0 &&
memcmp((char *)&(reg[ECX]), "cAMD", 4) == 0) {
got_amd_cpu = 1;
}
if (got_intel_cpu || got_amd_cpu) {
cpuid(reg, leaf, sub);
return((reg[num]>>bit)&0x1) ;
}

15
wolfcrypt/src/cpuid.c
View File

@ -60,16 +60,26 @@
static word32 cpuid_flag(word32 leaf, word32 sub, word32 num, word32 bit)
{
int got_intel_cpu = 0;
int got_amd_cpu = 0;
unsigned int reg[5];
reg[4] = '\0';
cpuid(reg, 0, 0);
/* check for Intel cpu */
if (XMEMCMP((char *)&(reg[EBX]), "Genu", 4) == 0 &&
XMEMCMP((char *)&(reg[EDX]), "ineI", 4) == 0 &&
XMEMCMP((char *)&(reg[ECX]), "ntel", 4) == 0) {
got_intel_cpu = 1;
}
if (got_intel_cpu) {
/* check for AMD cpu */
if (XMEMCMP((char *)&(reg[EBX]), "Auth", 4) == 0 &&
XMEMCMP((char *)&(reg[EDX]), "enti", 4) == 0 &&
XMEMCMP((char *)&(reg[ECX]), "cAMD", 4) == 0) {
got_amd_cpu = 1;
}
if (got_intel_cpu || got_amd_cpu) {
cpuid(reg, leaf, sub);
return ((reg[num] >> bit) & 0x1);
}
@ -98,4 +108,3 @@
return cpuid_flags;
}
#endif