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Merge pull request #1809 from cconlon/stm32rngfix
enable RNG clock when WOLFSSL_STM32F427_RNG is defined
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@@ -1620,6 +1620,9 @@ int wc_GenerateSeed(OS_Seed* os, byte* output, word32 sz)
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int i;
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(void)os;
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/* enable RNG peripheral clock */
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RCC->AHB2ENR |= RCC_AHB2ENR_RNGEN;
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/* enable RNG interrupt, set IE bit in RNG->CR register */
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RNG->CR |= RNG_CR_IE;
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