forked from espressif/esp-idf
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fc58a6c116 |
@@ -1,4 +1,4 @@
|
||||
[codespell]
|
||||
skip = build,*.yuv,components/fatfs/src/*,alice.txt,*.rgb,components/wpa_supplicant/*,components/esp_wifi/*,*.pem,components/newlib/COPYING.*
|
||||
skip = build,*.yuv,components/fatfs/src/*,alice.txt,*.rgb,components/wpa_supplicant/*,components/esp_wifi/*,*.pem,components/newlib/COPYING.*,docs/sphinx-known-warnings.txt
|
||||
ignore-words-list = ser,dout,rsource,fram,inout,shs,ans,aci,unstall,unstalling,hart,wheight,wel,ot,fane,assertIn,registr,oen,parms
|
||||
write-changes = true
|
||||
|
||||
2
.github/workflows/release_zips.yml
vendored
2
.github/workflows/release_zips.yml
vendored
@@ -8,7 +8,7 @@ on:
|
||||
jobs:
|
||||
release_zips:
|
||||
name: Create release zip file
|
||||
runs-on: ubuntu-24.04
|
||||
runs-on: ubuntu-20.04
|
||||
steps:
|
||||
- name: Create a recursive clone source zip
|
||||
uses: espressif/release-zips-action@v1
|
||||
|
||||
1
.gitignore
vendored
1
.gitignore
vendored
@@ -37,6 +37,7 @@ components/**/build/
|
||||
components/**/build_*_*/
|
||||
components/**/sdkconfig
|
||||
components/**/sdkconfig.old
|
||||
components/**/test_apps/wifi_nvs_config/nvs_data_suffix.csv
|
||||
|
||||
# Example project files
|
||||
examples/**/build/
|
||||
|
||||
@@ -2,5 +2,253 @@
|
||||
#
|
||||
# https://docs.gitlab.com/ee/user/project/code_owners.html#the-syntax-of-code-owners-files
|
||||
#
|
||||
# If more than one rule matches a given file, the latest rule is used.
|
||||
# The file should be generally kept sorted, except when it is necessary
|
||||
# to use a different order due to the fact above. In that case, use
|
||||
# '# sort-order-reset' comment line to reset the sort order.
|
||||
#
|
||||
# Recipes for a few common cases:
|
||||
#
|
||||
# 1. Specific directory with all its contents:
|
||||
#
|
||||
# /components/app_trace/
|
||||
#
|
||||
# Note the trailing slash!
|
||||
#
|
||||
# 2. File with certain extension in any subdirectory of a certain directory:
|
||||
#
|
||||
# /examples/**/*.py
|
||||
#
|
||||
# This includes an *.py files in /examples/ directory as well.
|
||||
#
|
||||
# 3. Contents of a directory with a certain name, anywhere in the tree:
|
||||
#
|
||||
# test_*_host/
|
||||
#
|
||||
# Will match everything under components/efuse/test_efuse_host/,
|
||||
# components/heap/test_multi_heap_host/, components/lwip/test_afl_host/, etc.
|
||||
#
|
||||
# 4. Same as above, except limited to a specific place in the tree:
|
||||
#
|
||||
# /components/esp32*/
|
||||
#
|
||||
# Matches everything under /components/esp32, /components/esp32s2, etc.
|
||||
# Doesn't match /tools/some-test/components/esp32s5.
|
||||
#
|
||||
# 5. Specific file:
|
||||
#
|
||||
# /tools/tools.json
|
||||
#
|
||||
# 6. File with a certain name anywhere in the tree
|
||||
#
|
||||
# .gitignore
|
||||
#
|
||||
|
||||
* @esp-idf-codeowners/all-maintainers
|
||||
* @esp-idf-codeowners/other
|
||||
|
||||
/.* @esp-idf-codeowners/tools
|
||||
/.codespellrc @esp-idf-codeowners/ci
|
||||
/.github/workflows/ @esp-idf-codeowners/ci
|
||||
/.gitlab-ci.yml @esp-idf-codeowners/ci
|
||||
/.gitlab/ci/ @esp-idf-codeowners/ci
|
||||
/.pre-commit-config.yaml @esp-idf-codeowners/ci
|
||||
/.readthedocs.yml @esp-idf-codeowners/docs
|
||||
/.vale.ini @esp-idf-codeowners/docs
|
||||
/CMakeLists.txt @esp-idf-codeowners/build-config
|
||||
/COMPATIBILITY*.md @esp-idf-codeowners/peripherals
|
||||
/CONTRIBUTING.md @esp-idf-codeowners/docs
|
||||
/Kconfig @esp-idf-codeowners/build-config
|
||||
/README*.md @esp-idf-codeowners/docs
|
||||
/ROADMAP*.md @esp-idf-codeowners/docs
|
||||
/SUPPORT_POLICY*.md @esp-idf-codeowners/docs
|
||||
/add_path.sh @esp-idf-codeowners/tools
|
||||
/conftest.py @esp-idf-codeowners/ci
|
||||
/export.* @esp-idf-codeowners/tools
|
||||
/install.* @esp-idf-codeowners/tools
|
||||
/pytest.ini @esp-idf-codeowners/ci
|
||||
/ruff.toml @esp-idf-codeowners/tools
|
||||
/sdkconfig.rename @esp-idf-codeowners/build-config
|
||||
/sonar-project.properties @esp-idf-codeowners/ci
|
||||
|
||||
# sort-order-reset
|
||||
|
||||
/components/app_trace/ @esp-idf-codeowners/debugging
|
||||
/components/app_update/ @esp-idf-codeowners/system @esp-idf-codeowners/app-utilities
|
||||
/components/bootloader*/ @esp-idf-codeowners/system @esp-idf-codeowners/security
|
||||
/components/bootloader_support/bootloader_flash/ @esp-idf-codeowners/peripherals
|
||||
/components/bt/ @esp-idf-codeowners/bluetooth
|
||||
/components/cmock/ @esp-idf-codeowners/system
|
||||
/components/console/ @esp-idf-codeowners/system @esp-idf-codeowners/app-utilities/console
|
||||
/components/cxx/ @esp-idf-codeowners/system
|
||||
/components/driver/ @esp-idf-codeowners/peripherals
|
||||
/components/efuse/ @esp-idf-codeowners/system
|
||||
/components/esp_adc/ @esp-idf-codeowners/peripherals
|
||||
/components/esp_app_format/ @esp-idf-codeowners/system @esp-idf-codeowners/app-utilities
|
||||
/components/esp_bootloader_format/ @esp-idf-codeowners/system @esp-idf-codeowners/app-utilities
|
||||
/components/esp_coex/ @esp-idf-codeowners/wifi @esp-idf-codeowners/bluetooth @esp-idf-codeowners/ieee802154
|
||||
/components/esp_common/ @esp-idf-codeowners/system
|
||||
/components/esp_driver_*/ @esp-idf-codeowners/peripherals
|
||||
/components/esp_driver_sdmmc/ @esp-idf-codeowners/peripherals @esp-idf-codeowners/storage
|
||||
/components/esp_eth/ @esp-idf-codeowners/network
|
||||
/components/esp_event/ @esp-idf-codeowners/system
|
||||
/components/esp_gdbstub/ @esp-idf-codeowners/debugging
|
||||
/components/esp_hid/ @esp-idf-codeowners/bluetooth
|
||||
/components/esp_http_client/ @esp-idf-codeowners/app-utilities
|
||||
/components/esp_http_server/ @esp-idf-codeowners/app-utilities
|
||||
/components/esp_https_ota/ @esp-idf-codeowners/app-utilities
|
||||
/components/esp_https_server/ @esp-idf-codeowners/app-utilities
|
||||
/components/esp_hw_support/ @esp-idf-codeowners/system @esp-idf-codeowners/peripherals
|
||||
/components/esp_hw_support/lowpower/ @esp-idf-codeowners/power-management
|
||||
/components/esp_lcd/ @esp-idf-codeowners/peripherals
|
||||
/components/esp_local_ctrl/ @esp-idf-codeowners/app-utilities
|
||||
/components/esp_mm/ @esp-idf-codeowners/peripherals
|
||||
/components/esp_netif/ @esp-idf-codeowners/network
|
||||
/components/esp_netif_stack/ @esp-idf-codeowners/network
|
||||
/components/esp_partition/ @esp-idf-codeowners/storage
|
||||
/components/esp_phy/ @esp-idf-codeowners/bluetooth @esp-idf-codeowners/wifi @esp-idf-codeowners/ieee802154
|
||||
/components/esp_pm/ @esp-idf-codeowners/power-management @esp-idf-codeowners/bluetooth @esp-idf-codeowners/wifi @esp-idf-codeowners/system
|
||||
/components/esp_psram/ @esp-idf-codeowners/peripherals
|
||||
/components/esp_psram/system_layer/ @esp-idf-codeowners/peripherals @esp-idf-codeowners/system
|
||||
/components/esp_ringbuf/ @esp-idf-codeowners/system
|
||||
/components/esp_rom/ @esp-idf-codeowners/system @esp-idf-codeowners/bluetooth @esp-idf-codeowners/wifi
|
||||
/components/esp_security/ @esp-idf-codeowners/security
|
||||
/components/esp_system/ @esp-idf-codeowners/system
|
||||
/components/esp_tee/ @esp-idf-codeowners/security
|
||||
/components/esp_timer/ @esp-idf-codeowners/system
|
||||
/components/esp-tls/ @esp-idf-codeowners/app-utilities
|
||||
/components/esp_vfs_*/ @esp-idf-codeowners/storage
|
||||
/components/esp_vfs_console/ @esp-idf-codeowners/storage @esp-idf-codeowners/system
|
||||
/components/esp_wifi/ @esp-idf-codeowners/wifi
|
||||
/components/espcoredump/ @esp-idf-codeowners/debugging
|
||||
/components/esptool_py/ @esp-idf-codeowners/tools
|
||||
/components/fatfs/ @esp-idf-codeowners/storage
|
||||
/components/freertos/ @esp-idf-codeowners/system
|
||||
/components/hal/ @esp-idf-codeowners/peripherals
|
||||
/components/hal/test_apps/crypto/ @esp-idf-codeowners/peripherals @esp-idf-codeowners/security
|
||||
/components/heap/ @esp-idf-codeowners/system
|
||||
/components/http_parser/ @esp-idf-codeowners/app-utilities
|
||||
/components/idf_test/ @esp-idf-codeowners/peripherals @esp-idf-codeowners/system
|
||||
/components/ieee802154/ @esp-idf-codeowners/ieee802154
|
||||
/components/json/ @esp-idf-codeowners/app-utilities
|
||||
/components/linux/ @esp-idf-codeowners/system
|
||||
/components/log/ @esp-idf-codeowners/system
|
||||
/components/lwip/ @esp-idf-codeowners/lwip
|
||||
/components/mbedtls/ @esp-idf-codeowners/app-utilities/mbedtls @esp-idf-codeowners/security
|
||||
/components/mqtt/ @esp-idf-codeowners/network
|
||||
/components/newlib/ @esp-idf-codeowners/system @esp-idf-codeowners/toolchain
|
||||
/components/nvs_flash/ @esp-idf-codeowners/storage
|
||||
/components/nvs_sec_provider/ @esp-idf-codeowners/storage @esp-idf-codeowners/security
|
||||
/components/openthread/ @esp-idf-codeowners/ieee802154
|
||||
/components/partition_table/ @esp-idf-codeowners/system
|
||||
/components/perfmon/ @esp-idf-codeowners/debugging
|
||||
/components/protobuf-c/ @esp-idf-codeowners/app-utilities
|
||||
/components/protocomm/ @esp-idf-codeowners/app-utilities/provisioning
|
||||
/components/pthread/ @esp-idf-codeowners/system
|
||||
/components/riscv/ @esp-idf-codeowners/system
|
||||
/components/rt/ @esp-idf-codeowners/system
|
||||
/components/sdmmc/ @esp-idf-codeowners/storage
|
||||
/components/soc/ @esp-idf-codeowners/peripherals @esp-idf-codeowners/system
|
||||
/components/spi_flash/ @esp-idf-codeowners/peripherals
|
||||
/components/spiffs/ @esp-idf-codeowners/storage
|
||||
/components/tcp_transport/ @esp-idf-codeowners/network
|
||||
/components/touch_element/ @esp-idf-codeowners/peripherals
|
||||
/components/ulp/ @esp-idf-codeowners/system
|
||||
/components/unity/ @esp-idf-codeowners/peripherals @esp-idf-codeowners/system
|
||||
/components/usb/ @esp-idf-codeowners/peripherals/usb
|
||||
/components/vfs/ @esp-idf-codeowners/storage
|
||||
/components/wear_levelling/ @esp-idf-codeowners/storage
|
||||
/components/wifi_provisioning/ @esp-idf-codeowners/app-utilities/provisioning
|
||||
/components/wpa_supplicant/ @esp-idf-codeowners/wifi @esp-idf-codeowners/app-utilities/mbedtls
|
||||
/components/xtensa/ @esp-idf-codeowners/system
|
||||
|
||||
/docs/ @esp-idf-codeowners/docs
|
||||
/docs/docs_not_updated/ @esp-idf-codeowners/all-maintainers
|
||||
/docs/**/api-guides/tools/ @esp-idf-codeowners/tools
|
||||
/docs/en/api-guides/core_dump.rst @esp-idf-codeowners/debugging
|
||||
/docs/**/api-guides/wifi* @esp-idf-codeowners/wifi
|
||||
/docs/**/api-guides/esp-wifi-mesh.rst @esp-idf-codeowners/wifi
|
||||
/docs/en/api-guides/jtag-debugging/ @esp-idf-codeowners/debugging
|
||||
/docs/**/api-reference/bluetooth/ @esp-idf-codeowners/bluetooth
|
||||
/docs/**/api-reference/network/ @esp-idf-codeowners/network @esp-idf-codeowners/wifi
|
||||
/docs/**/api-reference/peripherals/ @esp-idf-codeowners/peripherals
|
||||
/docs/**/api-reference/peripherals/usb* @esp-idf-codeowners/peripherals @esp-idf-codeowners/peripherals/usb
|
||||
/docs/**/api-reference/peripherals/usb*/ @esp-idf-codeowners/peripherals @esp-idf-codeowners/peripherals/usb
|
||||
/docs/**/api-reference/protocols/ @esp-idf-codeowners/network @esp-idf-codeowners/app-utilities
|
||||
/docs/**/api-reference/provisioning/ @esp-idf-codeowners/app-utilities/provisioning
|
||||
/docs/**/api-reference/storage/ @esp-idf-codeowners/storage
|
||||
/docs/**/api-reference/system/ @esp-idf-codeowners/system
|
||||
/docs/**/security/ @esp-idf-codeowners/security
|
||||
/docs/**/migration-guides/ @esp-idf-codeowners/docs @esp-idf-codeowners/all-maintainers
|
||||
/docs/**/contribute/install-pre-commit-hook.rst @esp-idf-codeowners/ci @esp-idf-codeowners/tools
|
||||
|
||||
/examples/README.md @esp-idf-codeowners/docs @esp-idf-codeowners/ci
|
||||
/examples/**/*.py @esp-idf-codeowners/ci @esp-idf-codeowners/tools
|
||||
/examples/bluetooth/ @esp-idf-codeowners/bluetooth
|
||||
/examples/build_system/ @esp-idf-codeowners/build-config
|
||||
/examples/common_components/ @esp-idf-codeowners/system @esp-idf-codeowners/wifi @esp-idf-codeowners/lwip @esp-idf-codeowners/network
|
||||
/examples/custom_bootloader/ @esp-idf-codeowners/system
|
||||
/examples/cxx/ @esp-idf-codeowners/system
|
||||
/examples/ethernet/ @esp-idf-codeowners/network
|
||||
/examples/get-started/ @esp-idf-codeowners/system
|
||||
/examples/ieee802154/ @esp-idf-codeowners/ieee802154
|
||||
/examples/lowpower/ @esp-idf-codeowners/power-management @esp-idf-codeowners/system
|
||||
/examples/mesh/ @esp-idf-codeowners/wifi
|
||||
/examples/network/ @esp-idf-codeowners/network @esp-idf-codeowners/wifi
|
||||
/examples/openthread/ @esp-idf-codeowners/ieee802154
|
||||
/examples/peripherals/ @esp-idf-codeowners/peripherals
|
||||
/examples/peripherals/usb/ @esp-idf-codeowners/peripherals @esp-idf-codeowners/peripherals/usb
|
||||
/examples/phy/ @esp-idf-codeowners/bluetooth @esp-idf-codeowners/wifi @esp-idf-codeowners/ieee802154
|
||||
/examples/protocols/ @esp-idf-codeowners/network @esp-idf-codeowners/app-utilities
|
||||
/examples/provisioning/ @esp-idf-codeowners/app-utilities/provisioning
|
||||
/examples/security/ @esp-idf-codeowners/security
|
||||
/examples/storage/ @esp-idf-codeowners/storage
|
||||
/examples/system/ @esp-idf-codeowners/system
|
||||
/examples/system/ota/ @esp-idf-codeowners/app-utilities
|
||||
/examples/wifi/ @esp-idf-codeowners/wifi
|
||||
/examples/zigbee/ @esp-idf-codeowners/ieee802154
|
||||
|
||||
/tools/ @esp-idf-codeowners/tools
|
||||
/tools/ble/ @esp-idf-codeowners/app-utilities
|
||||
/tools/bt/ @esp-idf-codeowners/bluetooth
|
||||
/tools/catch/ @esp-idf-codeowners/ci
|
||||
/tools/ci/ @esp-idf-codeowners/ci
|
||||
/tools/cmake/ @esp-idf-codeowners/build-config
|
||||
/tools/cmake/toolchain-*.cmake @esp-idf-codeowners/toolchain
|
||||
/tools/esp_app_trace/ @esp-idf-codeowners/debugging
|
||||
/tools/esp_prov/ @esp-idf-codeowners/app-utilities
|
||||
/tools/gdb_panic_server.py @esp-idf-codeowners/debugging
|
||||
/tools/kconfig*/ @esp-idf-codeowners/build-config
|
||||
/tools/ldgen/ @esp-idf-codeowners/build-config
|
||||
/tools/mass_mfg/ @esp-idf-codeowners/app-utilities
|
||||
/tools/mocks/ @esp-idf-codeowners/system
|
||||
|
||||
/tools/test_apps/ @esp-idf-codeowners/ci
|
||||
/tools/test_apps/README.md @esp-idf-codeowners/docs @esp-idf-codeowners/ci
|
||||
|
||||
## Note: owners here should be the same as the owners for the same example subdir, above
|
||||
/tools/test_apps/build_system/ @esp-idf-codeowners/build-config
|
||||
/tools/test_apps/configs/ @esp-idf-codeowners/system
|
||||
/tools/test_apps/linux_compatible/ @esp-idf-codeowners/system
|
||||
/tools/test_apps/peripherals/ @esp-idf-codeowners/peripherals
|
||||
/tools/test_apps/phy/ @esp-idf-codeowners/bluetooth @esp-idf-codeowners/wifi @esp-idf-codeowners/ieee802154
|
||||
/tools/test_apps/protocols/ @esp-idf-codeowners/network @esp-idf-codeowners/app-utilities
|
||||
/tools/test_apps/security/ @esp-idf-codeowners/security
|
||||
/tools/test_apps/storage/ @esp-idf-codeowners/storage
|
||||
/tools/test_apps/system/ @esp-idf-codeowners/system
|
||||
|
||||
/tools/test_apps/**/*.py @esp-idf-codeowners/ci @esp-idf-codeowners/tools
|
||||
|
||||
/tools/test_build_system/ @esp-idf-codeowners/tools @esp-idf-codeowners/build-config
|
||||
|
||||
/tools/tools.json @esp-idf-codeowners/tools @esp-idf-codeowners/toolchain @esp-idf-codeowners/debugging
|
||||
|
||||
/tools/unit-test-app/ @esp-idf-codeowners/system @esp-idf-codeowners/tools
|
||||
|
||||
# sort-order-reset
|
||||
|
||||
/components/**/test_apps/**/*.py @esp-idf-codeowners/ci @esp-idf-codeowners/tools
|
||||
|
||||
# ignore lists
|
||||
/tools/ci/check_copyright_config.yaml @esp-idf-codeowners/all-maintainers
|
||||
/tools/ci/check_copyright_ignore.txt @esp-idf-codeowners/all-maintainers
|
||||
/tools/ci/mypy_ignore_list.txt @esp-idf-codeowners/tools
|
||||
|
||||
@@ -231,12 +231,17 @@ pytest_build_system_macos:
|
||||
- .after_script:build:macos:upload-failed-job-logs:ccache-show-stats
|
||||
- .rules:build:macos
|
||||
tags:
|
||||
- macos_shell
|
||||
- macos
|
||||
parallel: 3
|
||||
variables:
|
||||
PYENV_VERSION: "3.9"
|
||||
# CCACHE_DIR: "/cache/idf_ccache". On macOS, you cannot write to this folder due to insufficient permissions.
|
||||
CCACHE_DIR: "" # ccache will use "$HOME/Library/Caches/ccache".
|
||||
CCACHE_MAXSIZE: "5G" # To preserve the limited Macbook storage. CCACHE automatically prunes old caches to fit the set limit.
|
||||
# Workaround for a bug in Parallels executor where CI_PROJECT_DIR is not an absolute path,
|
||||
# but a relative path to the build directory (builds/espressif/esp-idf instead of ~/builds/espressif/esp-idf.
|
||||
# GitLab sets the project dir to this template `<builds_dir>/<namespace>/<project_name>`
|
||||
IDF_PATH: "/Users/espressif/builds/espressif/esp-idf"
|
||||
|
||||
build_docker:
|
||||
extends:
|
||||
|
||||
@@ -40,7 +40,7 @@ variables:
|
||||
GIT_FETCH_EXTRA_FLAGS: "--no-recurse-submodules --prune --prune-tags"
|
||||
# we're using .cache folder for caches
|
||||
GIT_CLEAN_FLAGS: -ffdx -e .cache/
|
||||
LATEST_GIT_TAG: v5.5.1
|
||||
LATEST_GIT_TAG: v6.0-dev
|
||||
|
||||
SUBMODULE_FETCH_TOOL: "tools/ci/ci_fetch_submodule.py"
|
||||
# by default we will fetch all submodules
|
||||
@@ -55,9 +55,9 @@ variables:
|
||||
CHECKOUT_REF_SCRIPT: "$CI_PROJECT_DIR/tools/ci/checkout_project_ref.py"
|
||||
|
||||
# Docker images
|
||||
ESP_ENV_IMAGE: "${CI_DOCKER_REGISTRY}/esp-env-v5.5:3"
|
||||
ESP_IDF_DOC_ENV_IMAGE: "${CI_DOCKER_REGISTRY}/esp-idf-doc-env-v5.5:3-1"
|
||||
TARGET_TEST_ENV_IMAGE: "${CI_DOCKER_REGISTRY}/target-test-env-v5.5:2"
|
||||
ESP_ENV_IMAGE: "${CI_DOCKER_REGISTRY}/esp-env-v6.0:1"
|
||||
ESP_IDF_DOC_ENV_IMAGE: "${CI_DOCKER_REGISTRY}/esp-idf-doc-env-v6.0:1-1"
|
||||
TARGET_TEST_ENV_IMAGE: "${CI_DOCKER_REGISTRY}/target-test-env-v6.0:1"
|
||||
SONARQUBE_SCANNER_IMAGE: "${CI_DOCKER_REGISTRY}/sonarqube-scanner:5"
|
||||
PRE_COMMIT_IMAGE: "${CI_DOCKER_REGISTRY}/esp-idf-pre-commit:1"
|
||||
|
||||
@@ -70,7 +70,7 @@ variables:
|
||||
CI_PYTHON_CONSTRAINT_BRANCH: ""
|
||||
|
||||
# Update the filename for a specific ESP-IDF release. It is used only with CI_PYTHON_CONSTRAINT_BRANCH.
|
||||
CI_PYTHON_CONSTRAINT_FILE: "espidf.constraints.v5.5.txt"
|
||||
CI_PYTHON_CONSTRAINT_FILE: "espidf.constraints.v6.0.txt"
|
||||
|
||||
# Set this variable to repository name of a Python tool you wish to install and test in the context of ESP-IDF CI.
|
||||
# Keep the variable empty when not used.
|
||||
@@ -140,6 +140,13 @@ variables:
|
||||
if [[ -n "$IDF_DONT_USE_MIRRORS" ]]; then
|
||||
export IDF_MIRROR_PREFIX_MAP=
|
||||
fi
|
||||
# Optimize pip install
|
||||
if echo "${CI_RUNNER_TAGS}" | grep "shiny"; then
|
||||
export PIP_INDEX_URL="${PIP_INDEX_URL_SHINY}"
|
||||
fi
|
||||
if [[ "$(uname -m)" == "x86_64" ]] || [[ "$(uname -m)" == "aarch64" ]]; then
|
||||
export IDF_PIP_WHEELS_URL=""
|
||||
fi
|
||||
|
||||
if [[ "${CI_JOB_STAGE}" != "target_test" ]]; then
|
||||
section_start "running_install_sh" "Running install.sh"
|
||||
@@ -236,8 +243,6 @@ variables:
|
||||
# Ensure pyenv and PYENV_VERSION installed
|
||||
- eval "$(pyenv init -)"
|
||||
- *common-before_scripts
|
||||
# On macOS, these tools need to be installed
|
||||
- export IDF_TOOLS_PATH="${HOME}/.espressif_runner_${CI_RUNNER_ID}_${CI_CONCURRENT_ID}"
|
||||
# remove idf-env.json, since it may contains enabled "features"
|
||||
- rm -f $IDF_TOOLS_PATH/idf-env.json
|
||||
# This adds tools (compilers) and the version-specific Python environment to PATH
|
||||
|
||||
@@ -16,6 +16,7 @@ bypass_check_test_targets:
|
||||
- esp32h21
|
||||
- esp32h4
|
||||
- esp32c5
|
||||
- esp32c61
|
||||
|
||||
#
|
||||
# These lines would
|
||||
|
||||
@@ -91,4 +91,4 @@
|
||||
specific_rules:
|
||||
- if-schedule-test-build-system-windows
|
||||
patterns:
|
||||
- build_system
|
||||
- build_system_win
|
||||
|
||||
@@ -3,7 +3,6 @@
|
||||
image: $ESP_ENV_IMAGE
|
||||
tags: [ deploy ]
|
||||
|
||||
# Check this before push_to_github
|
||||
check_submodule_sync:
|
||||
extends:
|
||||
- .deploy_job_template
|
||||
@@ -19,7 +18,6 @@ check_submodule_sync:
|
||||
dependencies: []
|
||||
script:
|
||||
- git submodule deinit --force .
|
||||
- rm -rf .git/modules # remove all the cached metadata
|
||||
# setting the default remote URL to the public one, to resolve relative location URLs
|
||||
- git config remote.origin.url ${PUBLIC_IDF_URL}
|
||||
# check if all submodules are correctly synced to public repository
|
||||
@@ -32,8 +30,9 @@ push_to_github:
|
||||
extends:
|
||||
- .deploy_job_template
|
||||
- .before_script:minimal
|
||||
- .rules:push_to_github
|
||||
- .rules:protected:deploy
|
||||
needs:
|
||||
# submodule must be synced before pushing to github
|
||||
- check_submodule_sync
|
||||
tags: [ brew, github_sync ]
|
||||
variables:
|
||||
@@ -46,12 +45,16 @@ push_to_github:
|
||||
- git remote remove github &>/dev/null || true
|
||||
- git remote add github git@github.com:espressif/esp-idf.git
|
||||
- tools/ci/push_to_github.sh
|
||||
environment:
|
||||
name: push_to_github_production
|
||||
deployment_tier: production
|
||||
url: "https://github.com/espressif/esp-idf"
|
||||
|
||||
deploy_update_SHA_in_esp-dockerfiles:
|
||||
extends:
|
||||
- .deploy_job_template
|
||||
- .before_script:minimal
|
||||
- .rules:protected-no_label-always
|
||||
- .rules:protected:deploy
|
||||
dependencies: []
|
||||
variables:
|
||||
GIT_DEPTH: 2
|
||||
@@ -60,3 +63,6 @@ deploy_update_SHA_in_esp-dockerfiles:
|
||||
- 'curl --header "PRIVATE-TOKEN: ${ESPCI_SCRIPTS_TOKEN}" -o create_MR_in_esp_dockerfile.sh $GITLAB_HTTP_SERVER/api/v4/projects/1260/repository/files/create_MR_in_esp_dockerfile%2Fcreate_MR_in_esp_dockerfile.sh/raw\?ref\=master'
|
||||
- chmod +x create_MR_in_esp_dockerfile.sh
|
||||
- ./create_MR_in_esp_dockerfile.sh
|
||||
environment:
|
||||
name: eploy_update_SHA_in_esp-dockerfiles_production
|
||||
deployment_tier: production
|
||||
|
||||
@@ -4,10 +4,10 @@
|
||||
- "**/*.rst"
|
||||
- "CONTRIBUTING.rst"
|
||||
- "**/soc_caps.h"
|
||||
- "**/Kconfig*"
|
||||
|
||||
.patterns-docs-partial: &patterns-docs-partial
|
||||
- "components/**/*.h"
|
||||
- "components/**/Kconfig*"
|
||||
- "components/**/CMakeList.txt"
|
||||
- "components/**/sdkconfig*"
|
||||
- "tools/tools.json"
|
||||
@@ -19,12 +19,9 @@
|
||||
.patterns-docs-preview: &patterns-docs-preview
|
||||
- "docs/**/*"
|
||||
|
||||
.if-protected: &if-protected
|
||||
.if-protected-check: &if-protected-check
|
||||
if: '($CI_COMMIT_REF_NAME == "master" || $CI_COMMIT_BRANCH =~ /^release\/v/ || $CI_COMMIT_TAG =~ /^v\d+\.\d+(\.\d+)?($|-)/)'
|
||||
|
||||
.if-protected-no_label: &if-protected-no_label
|
||||
if: '($CI_COMMIT_REF_NAME == "master" || $CI_COMMIT_BRANCH =~ /^release\/v/ || $CI_COMMIT_TAG =~ /^v\d+\.\d+(\.\d+)?($|-)/) && $BOT_TRIGGER_WITH_LABEL == null'
|
||||
|
||||
.if-qa-test-tag: &if-qa-test-tag
|
||||
if: '$CI_COMMIT_TAG =~ /^qa-test/'
|
||||
|
||||
@@ -41,7 +38,7 @@
|
||||
rules:
|
||||
- <<: *if-qa-test-tag
|
||||
when: never
|
||||
- <<: *if-protected
|
||||
- <<: *if-protected-check
|
||||
- <<: *if-label-build_docs
|
||||
- <<: *if-label-docs_full
|
||||
- <<: *if-dev-push
|
||||
@@ -64,7 +61,7 @@ check_readme_links:
|
||||
tags: ["build", "amd64", "internet"]
|
||||
allow_failure: true
|
||||
rules:
|
||||
- <<: *if-protected
|
||||
- <<: *if-protected-check
|
||||
- <<: *if-dev-push
|
||||
changes: *patterns-example-readme
|
||||
script:
|
||||
@@ -96,7 +93,7 @@ check_docs_lang_sync:
|
||||
parallel:
|
||||
matrix:
|
||||
- DOCLANG: ["en", "zh_CN"]
|
||||
DOCTGT: ["esp32", "esp32s2", "esp32s3", "esp32c3", "esp32c2", "esp32c6", "esp32c61", "esp32c5","esp32h2", "esp32h21", "esp32p4"]
|
||||
DOCTGT: ["esp32", "esp32s2", "esp32s3", "esp32c3", "esp32c2", "esp32c6", "esp32c61", "esp32c5", "esp32h2", "esp32h4", "esp32h21", "esp32p4"]
|
||||
|
||||
check_docs_gh_links:
|
||||
image: $ESP_IDF_DOC_ENV_IMAGE
|
||||
@@ -182,14 +179,17 @@ deploy_docs_preview:
|
||||
DOCS_DEPLOY_SERVER_USER: "$DOCS_SERVER_USER"
|
||||
DOCS_DEPLOY_PATH: "$DOCS_PATH"
|
||||
DOCS_DEPLOY_URL_BASE: "https://$DOCS_PREVIEW_SERVER_URL/docs/esp-idf"
|
||||
environment:
|
||||
name: deploy_docs_preview
|
||||
deployment_tier: staging
|
||||
url: "https://$DOCS_PREVIEW_SERVER_URL/docs/esp-idf"
|
||||
|
||||
# stage: post_deploy
|
||||
deploy_docs_production:
|
||||
# The DOCS_PROD_* variables used by this job are "Protected" so these branches must all be marked "Protected" in Gitlab settings
|
||||
extends:
|
||||
- .deploy_docs_template
|
||||
rules:
|
||||
- <<: *if-protected-no_label
|
||||
- .rules:protected:deploy
|
||||
stage: post_deploy
|
||||
dependencies: # set dependencies to null to avoid missing artifacts issue
|
||||
needs: # ensure runs after push_to_github succeeded
|
||||
@@ -204,12 +204,15 @@ deploy_docs_production:
|
||||
DOCS_DEPLOY_PATH: "$DOCS_PROD_PATH"
|
||||
DOCS_DEPLOY_URL_BASE: "https://docs.espressif.com/projects/esp-idf"
|
||||
DEPLOY_STABLE: 1
|
||||
environment:
|
||||
name: deploy_docs_production
|
||||
deployment_tier: production
|
||||
url: "https://docs.espressif.com/projects/esp-idf"
|
||||
|
||||
check_doc_links:
|
||||
extends:
|
||||
- .build_docs_template
|
||||
rules:
|
||||
- <<: *if-protected-no_label
|
||||
- .rules:protected:deploy
|
||||
stage: post_deploy
|
||||
needs:
|
||||
- job: deploy_docs_production
|
||||
|
||||
@@ -349,7 +349,7 @@ test_pytest_macos:
|
||||
- .host_test_template
|
||||
- .before_script:build:macos
|
||||
tags:
|
||||
- macos_shell
|
||||
- macos
|
||||
artifacts:
|
||||
paths:
|
||||
- XUNIT_RESULT.xml
|
||||
@@ -360,18 +360,22 @@ test_pytest_macos:
|
||||
variables:
|
||||
PYENV_VERSION: "3.9"
|
||||
PYTEST_IGNORE_COLLECT_IMPORT_ERROR: "1"
|
||||
# Workaround for a bug in Parallels executor where CI_PROJECT_DIR is not an absolute path,
|
||||
# but a relative path to the build directory (builds/espressif/esp-idf instead of ~/builds/espressif/esp-idf.
|
||||
# GitLab sets the project dir to this template `<builds_dir>/<namespace>/<project_name>`
|
||||
IDF_PATH: "/Users/espressif/builds/espressif/esp-idf"
|
||||
script:
|
||||
- run_cmd python tools/ci/ci_build_apps.py components examples tools/test_apps -v
|
||||
--target linux
|
||||
--pytest-apps
|
||||
-m \"host_test and macos_shell\"
|
||||
-m \"host_test and macos\"
|
||||
--collect-app-info "list_job_${CI_JOB_NAME_SLUG}.txt"
|
||||
--modified-components ${MR_MODIFIED_COMPONENTS}
|
||||
--modified-files ${MR_MODIFIED_FILES}
|
||||
- python tools/ci/get_known_failure_cases_file.py
|
||||
- run_cmd pytest
|
||||
--target linux
|
||||
-m \"host_test and macos_shell\"
|
||||
-m \"host_test and macos\"
|
||||
--junitxml=XUNIT_RESULT.xml
|
||||
--ignore-result-files ${KNOWN_FAILURE_CASES_FILE_NAME}
|
||||
--app-info-filepattern \"list_job_*.txt\"
|
||||
|
||||
@@ -1,11 +1,15 @@
|
||||
generate_failed_jobs_report:
|
||||
.post_deploy_template:
|
||||
stage: post_deploy
|
||||
tags: [build, shiny]
|
||||
image: $ESP_ENV_IMAGE
|
||||
|
||||
generate_failed_jobs_report:
|
||||
extends:
|
||||
- .post_deploy_template
|
||||
tags: [build, shiny]
|
||||
when: always
|
||||
dependencies: [] # Do not download artifacts from the previous stages
|
||||
artifacts:
|
||||
expire_in: 1 week
|
||||
expire_in: 2 week
|
||||
when: always
|
||||
paths:
|
||||
- job_report.html
|
||||
@@ -13,12 +17,16 @@ generate_failed_jobs_report:
|
||||
- python tools/ci/dynamic_pipelines/scripts/generate_report.py --report-type job
|
||||
|
||||
sync_support_status:
|
||||
stage: post_deploy
|
||||
extends:
|
||||
- .rules:sync_support_status
|
||||
- .post_deploy_template
|
||||
- .rules:master:push
|
||||
tags: [ brew, github_sync ]
|
||||
needs:
|
||||
- push_to_github
|
||||
image: $ESP_ENV_IMAGE
|
||||
tags: [ brew, github_sync ]
|
||||
cache: []
|
||||
before_script: []
|
||||
script:
|
||||
- curl --fail --request POST --form token="$IDF_STATUS_TRIG_TOKEN" --form ref="$IDF_STATUS_BRANCH" --form "variables[UPLOAD_TO_S3]=true" "$IDF_STATUS_TRIG_URL"
|
||||
environment:
|
||||
name: sync_support_status_production
|
||||
deployment_tier: production
|
||||
|
||||
@@ -10,7 +10,7 @@ check_version:
|
||||
# esp_idf_version.h in a branch before tagging the next version.
|
||||
extends:
|
||||
- .pre_check_template
|
||||
- .rules:protected
|
||||
- .rules:protected:check
|
||||
tags: [ brew, github_sync ]
|
||||
variables:
|
||||
# need a full clone to get the latest tag
|
||||
|
||||
@@ -56,6 +56,9 @@
|
||||
- "tools/ci/ci_build_apps.py"
|
||||
- "tools/test_build_system/**/*"
|
||||
|
||||
.patterns-build_system_win: &patterns-build_system_win
|
||||
- "tools/test_build_system/**/*"
|
||||
|
||||
.patterns-build_macos: &patterns-build_macos
|
||||
- "tools/ci/test_configure_ci_environment.sh"
|
||||
|
||||
@@ -167,22 +170,19 @@
|
||||
##############
|
||||
# if anchors #
|
||||
##############
|
||||
.if-ref-master: &if-ref-master
|
||||
if: '$CI_COMMIT_REF_NAME == "master"'
|
||||
.if-master-push: &if-master-push
|
||||
if: '$CI_COMMIT_REF_NAME == "master" && $CI_PIPELINE_SOURCE == "push"'
|
||||
|
||||
.if-ref-master-no_label: &if-ref-master-no_label
|
||||
if: '$CI_COMMIT_REF_NAME == "master" && $BOT_TRIGGER_WITH_LABEL == null'
|
||||
|
||||
.if-tag-release: &if-tag-release
|
||||
.if-release-tag: &if-release-tag
|
||||
if: '$CI_COMMIT_TAG =~ /^v\d+\.\d+(\.\d+)?($|-)/'
|
||||
|
||||
.if-protected: &if-protected
|
||||
.if-protected-check: &if-protected-check
|
||||
if: '($CI_COMMIT_REF_NAME == "master" || $CI_COMMIT_BRANCH =~ /^release\/v/ || $CI_COMMIT_TAG =~ /^v\d+\.\d+(\.\d+)?($|-)/) || $CI_COMMIT_TAG =~ /^qa-test/'
|
||||
|
||||
.if-protected-no_label: &if-protected-no_label
|
||||
if: '($CI_COMMIT_REF_NAME == "master" || $CI_COMMIT_BRANCH =~ /^release\/v/ || $CI_COMMIT_TAG =~ /^v\d+\.\d+(\.\d+)?($|-)/) && $BOT_TRIGGER_WITH_LABEL == null'
|
||||
.if-protected-deploy: &if-protected-deploy
|
||||
if: '($CI_COMMIT_REF_NAME == "master" || $CI_COMMIT_BRANCH =~ /^release\/v/ || $CI_COMMIT_TAG =~ /^v\d+\.\d+(\.\d+)?($|-)/) && ($CI_PIPELINE_SOURCE == "push" || $CI_PIPELINE_SOURCE == "api")'
|
||||
|
||||
.if-protected-ref-push: &if-protected-ref-push
|
||||
.if-protected-branch-push: &if-protected-branch-push
|
||||
# rules:changes always evaluates to true for new branch pipelines or when there is no Git push event
|
||||
if: '($CI_COMMIT_REF_NAME == "master" || $CI_COMMIT_BRANCH =~ /^release\/v/) && $CI_PIPELINE_SOURCE == "push"'
|
||||
|
||||
@@ -192,9 +192,6 @@
|
||||
.if-dev-push: &if-dev-push
|
||||
if: '$CI_COMMIT_REF_NAME != "master" && $CI_COMMIT_BRANCH !~ /^release\/v/ && $CI_COMMIT_TAG !~ /^v\d+\.\d+(\.\d+)?($|-)/ && $CI_COMMIT_TAG !~ /^qa-test/ && ($CI_PIPELINE_SOURCE == "push" || $CI_PIPELINE_SOURCE == "merge_request_event")'
|
||||
|
||||
.if-schedule: &if-schedule
|
||||
if: '$CI_PIPELINE_SOURCE == "schedule"'
|
||||
|
||||
.if-schedule-nightly: &if-schedule-nightly
|
||||
if: '$CI_PIPELINE_SOURCE == "schedule" && $INCLUDE_NIGHTLY_RUN == "1"'
|
||||
|
||||
@@ -214,51 +211,41 @@
|
||||
# Rules #
|
||||
#########
|
||||
### Branches ###
|
||||
.rules:protected:
|
||||
.rules:protected:check:
|
||||
rules:
|
||||
- <<: *if-protected
|
||||
- <<: *if-protected-check
|
||||
|
||||
.rules:push_to_github:
|
||||
.rules:protected:deploy:
|
||||
rules:
|
||||
- <<: *if-qa-test-tag
|
||||
when: never
|
||||
- <<: *if-protected-no_label
|
||||
- <<: *if-protected-deploy
|
||||
|
||||
# Not uploading on release branches
|
||||
.rules:sync_support_status:
|
||||
.rules:master:push:
|
||||
rules:
|
||||
- <<: *if-ref-master-no_label
|
||||
|
||||
.rules:protected-no_label-always:
|
||||
rules:
|
||||
- <<: *if-qa-test-tag
|
||||
when: never
|
||||
- <<: *if-protected-no_label
|
||||
when: always
|
||||
- <<: *if-master-push
|
||||
|
||||
.rules:tag:release:
|
||||
rules:
|
||||
- <<: *if-tag-release
|
||||
- <<: *if-release-tag
|
||||
|
||||
.rules:dev-push:
|
||||
rules:
|
||||
- <<: *if-dev-push
|
||||
|
||||
# Do not upload caches on dev branches by default
|
||||
.rules:upload-python-cache:
|
||||
rules:
|
||||
- <<: *if-tag-release
|
||||
- <<: *if-release-tag
|
||||
- <<: *if-schedule-nightly
|
||||
- <<: *if-protected-ref-push
|
||||
- <<: *if-protected-branch-push
|
||||
changes: *patterns-python-cache
|
||||
- <<: *if-label-upload_cache
|
||||
when: manual
|
||||
|
||||
.rules:upload-submodule-cache:
|
||||
rules:
|
||||
# Needn't upload submodule cache in schedule pipeline
|
||||
- <<: *if-tag-release
|
||||
- <<: *if-protected-ref-push
|
||||
- <<: *if-release-tag
|
||||
- <<: *if-protected-branch-push
|
||||
changes: *patterns-submodule
|
||||
- <<: *if-label-upload_cache
|
||||
when: manual
|
||||
@@ -266,11 +253,10 @@
|
||||
### Patterns ###
|
||||
.rules:patterns:clang_tidy:
|
||||
rules:
|
||||
- <<: *if-protected
|
||||
- <<: *if-protected-check
|
||||
- <<: *if-dev-push
|
||||
changes: *patterns-c-files
|
||||
|
||||
|
||||
#.rules:patterns:static-code-analysis-preview:
|
||||
# rules:
|
||||
# - <<: *if-dev-push
|
||||
@@ -282,7 +268,7 @@
|
||||
|
||||
.rules:patterns:idf-pytest-plugin:
|
||||
rules:
|
||||
- <<: *if-protected
|
||||
- <<: *if-protected-check
|
||||
- <<: *if-dev-push
|
||||
changes: *patterns-idf-pytest-plugin
|
||||
|
||||
@@ -326,7 +312,7 @@
|
||||
rules:
|
||||
- <<: *if-revert-branch
|
||||
when: never
|
||||
- <<: *if-protected
|
||||
- <<: *if-protected-check
|
||||
- <<: *if-label-build
|
||||
- <<: *if-dev-push
|
||||
changes: *patterns-build_components
|
||||
@@ -339,7 +325,7 @@
|
||||
rules:
|
||||
- <<: *if-revert-branch
|
||||
when: never
|
||||
- <<: *if-protected
|
||||
- <<: *if-protected-check
|
||||
- <<: *if-label-build
|
||||
- <<: *if-dev-push
|
||||
changes: *patterns-build_check
|
||||
@@ -354,7 +340,7 @@
|
||||
rules:
|
||||
- <<: *if-revert-branch
|
||||
when: never
|
||||
- <<: *if-protected
|
||||
- <<: *if-protected-check
|
||||
- <<: *if-label-build
|
||||
- <<: *if-label-docker
|
||||
- <<: *if-dev-push
|
||||
@@ -370,7 +356,7 @@
|
||||
rules:
|
||||
- <<: *if-revert-branch
|
||||
when: never
|
||||
- <<: *if-protected
|
||||
- <<: *if-protected-check
|
||||
- <<: *if-label-build
|
||||
- <<: *if-label-macos
|
||||
- <<: *if-label-macos_test
|
||||
@@ -385,7 +371,7 @@
|
||||
rules:
|
||||
- <<: *if-revert-branch
|
||||
when: never
|
||||
- <<: *if-protected
|
||||
- <<: *if-protected-check
|
||||
- <<: *if-label-build
|
||||
- <<: *if-dev-push
|
||||
changes: *patterns-build_components
|
||||
@@ -409,13 +395,13 @@
|
||||
- <<: *if-schedule-test-build-system-windows
|
||||
- <<: *if-label-windows
|
||||
- <<: *if-dev-push
|
||||
changes: *patterns-build_system
|
||||
changes: *patterns-build_system_win
|
||||
|
||||
.rules:test:host_test:
|
||||
rules:
|
||||
- <<: *if-revert-branch
|
||||
when: never
|
||||
- <<: *if-protected
|
||||
- <<: *if-protected-check
|
||||
- <<: *if-label-build-only
|
||||
when: never
|
||||
- <<: *if-label-host_test
|
||||
@@ -426,7 +412,7 @@
|
||||
rules:
|
||||
- <<: *if-revert-branch
|
||||
when: never
|
||||
- <<: *if-protected
|
||||
- <<: *if-protected-check
|
||||
- <<: *if-label-build-only
|
||||
when: never
|
||||
- <<: *if-label-submodule
|
||||
|
||||
@@ -85,7 +85,7 @@ clang_tidy_check:
|
||||
#code_quality_report:
|
||||
# extends:
|
||||
# - .sonar_scan_template
|
||||
# - .rules:protected
|
||||
# - .rules:protected:check
|
||||
# allow_failure: true # it's using exit code to indicate the code analysis result,
|
||||
# # we don't want to block ci when critical issues founded
|
||||
# script:
|
||||
|
||||
@@ -23,6 +23,7 @@ test_cli_installer_win:
|
||||
extends:
|
||||
- .host_test_win_template
|
||||
- .rules:labels:windows_pytest_build_system
|
||||
allow_failure: true
|
||||
artifacts:
|
||||
when: on_failure
|
||||
paths:
|
||||
@@ -32,7 +33,6 @@ test_cli_installer_win:
|
||||
variables:
|
||||
IDF_PATH: "$CI_PROJECT_DIR"
|
||||
timeout: 3h
|
||||
allow_failure: true
|
||||
script:
|
||||
# Tools must be downloaded for testing
|
||||
# cmake@version that is supported
|
||||
|
||||
@@ -70,7 +70,6 @@ repos:
|
||||
rev: v2.3.0
|
||||
hooks:
|
||||
- id: codespell
|
||||
exclude: ^docs/sphinx-known-warnings\.txt$
|
||||
- repo: local
|
||||
hooks:
|
||||
- id: check-executables
|
||||
@@ -213,7 +212,7 @@ repos:
|
||||
- id: check-copyright
|
||||
args: ['--ignore', 'tools/ci/check_copyright_ignore.txt', '--config', 'tools/ci/check_copyright_config.yaml']
|
||||
- repo: https://github.com/espressif/conventional-precommit-linter
|
||||
rev: v1.7.0
|
||||
rev: v1.10.0
|
||||
hooks:
|
||||
- id: conventional-precommit-linter
|
||||
stages: [commit-msg]
|
||||
|
||||
@@ -8,9 +8,9 @@ This document describes the compatibility between ESP-IDF releases and Espressif
|
||||
|
||||
NOTE: This document on release branches may be out-of-date. Check the [Compatibility file on master](https://github.com/espressif/esp-idf/blob/master/COMPATIBILITY.md) for the most accurate information.
|
||||
|
||||
See [Compatibility Advisory for Chip Revision Numbering Scheme](https://www.espressif.com.cn/sites/default/files/advisory_downloads/AR2022-005%20Compatibility%20Advisory%20for%20Chip%20Revision%20Numbering%20%20Scheme.pdf) on the versioning of Espressif SoC revisions.
|
||||
See [Compatibility Advisory for Chip Revision Numbering Scheme](https://www.espressif.com/sites/default/files/advisory_downloads/AR2022-005%20Compatibility%20Advisory%20for%20Chip%20Revision%20Numbering%20%20Scheme.pdf) on the versioning of Espressif SoC revisions.
|
||||
|
||||
You can run `esptool chip_id` to detect the series and revision of an SoC. See [SoC Errata](https://www.espressif.com.cn/en/support/documents/technical-documents?keys=errata) for more on how to distinguish between chip revisions, and the improvements provided by chip revisions. And run `idf.py --version` to know the version of current ESP-IDF.
|
||||
You can run `esptool chip_id` to detect the series and revision of an SoC. See [SoC Errata](https://www.espressif.com/en/support/documents/technical-documents?keys=errata) for more on how to distinguish between chip revisions, and the improvements provided by chip revisions. And run `idf.py --version` to know the version of current ESP-IDF.
|
||||
|
||||
## ESP-IDF Support for Different Chip Revisions
|
||||
|
||||
|
||||
12
Kconfig
12
Kconfig
@@ -118,8 +118,6 @@ mainmenu "Espressif IoT Development Framework Configuration"
|
||||
default "y" if IDF_TARGET="esp32c5"
|
||||
select FREERTOS_UNICORE
|
||||
select IDF_TARGET_ARCH_RISCV
|
||||
# TODO: [ESPTOOL-1044] remove when stub supported
|
||||
select IDF_ENV_BRINGUP
|
||||
|
||||
config IDF_TARGET_ESP32P4
|
||||
bool
|
||||
@@ -143,13 +141,11 @@ mainmenu "Espressif IoT Development Framework Configuration"
|
||||
default "y" if IDF_TARGET="esp32h21"
|
||||
select FREERTOS_UNICORE
|
||||
select IDF_TARGET_ARCH_RISCV
|
||||
select IDF_ENV_FPGA
|
||||
select IDF_ENV_BRINGUP
|
||||
|
||||
config IDF_TARGET_ESP32H4
|
||||
bool
|
||||
default "y" if IDF_TARGET="esp32h4"
|
||||
select FREERTOS_UNICORE # TODO: [ESP32H4] IDF-12319, need remove
|
||||
select IDF_TARGET_ARCH_RISCV
|
||||
select IDF_ENV_FPGA
|
||||
select IDF_ENV_BRINGUP
|
||||
@@ -650,7 +646,7 @@ mainmenu "Espressif IoT Development Framework Configuration"
|
||||
|
||||
choice COMPILER_ORPHAN_SECTIONS
|
||||
prompt "Orphan sections handling"
|
||||
default COMPILER_ORPHAN_SECTIONS_WARNING
|
||||
default COMPILER_ORPHAN_SECTIONS_ERROR
|
||||
depends on !IDF_TARGET_LINUX
|
||||
help
|
||||
If the linker finds orphan sections, it attempts to place orphan sections after sections of the same
|
||||
@@ -658,6 +654,11 @@ mainmenu "Espressif IoT Development Framework Configuration"
|
||||
That means that orphan sections could placed between sections defined in IDF linker scripts.
|
||||
This could lead to corruption of the binary image. Configure the linker action here.
|
||||
|
||||
config COMPILER_ORPHAN_SECTIONS_ERROR
|
||||
bool "Fail if orphan sections found"
|
||||
help
|
||||
Fails the link step with an error if orphan sections are detected.
|
||||
|
||||
config COMPILER_ORPHAN_SECTIONS_WARNING
|
||||
bool "Place with warning"
|
||||
help
|
||||
@@ -707,3 +708,4 @@ mainmenu "Espressif IoT Development Framework Configuration"
|
||||
- CONFIG_ESP_WIFI_ENABLE_ROAMING_APP
|
||||
- CONFIG_USB_HOST_EXT_PORT_RESET_ATTEMPTS
|
||||
- CONFIG_LIBC_PICOLIBC
|
||||
- CONFIG_GDMA_ENABLE_WEIGHTED_ARBITRATION
|
||||
|
||||
24
README.md
24
README.md
@@ -15,18 +15,18 @@ ESP-IDF is the development framework for Espressif SoCs supported on Windows, Li
|
||||
|
||||
The following table shows ESP-IDF support of Espressif SoCs where ![alt text][preview] and ![alt text][supported] denote preview status and support, respectively. The preview support is usually limited in time and intended for beta versions of chips. Please use an ESP-IDF release where the desired SoC is already supported.
|
||||
|
||||
|Chip | v5.1 | v5.2 | v5.3 | v5.4 | v5.5 | |
|
||||
|:----------- |:--------------------: | :--------------------: | :--------------------: | :--------------------: | :--------------------: |:------------------------------------------------------------------- |
|
||||
|ESP32 | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | |
|
||||
|ESP32-S2 |![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | |
|
||||
|ESP32-C3 | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | |
|
||||
|ESP32-S3 | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] |[Announcement](https://www.espressif.com/en/news/ESP32_S3) |
|
||||
|ESP32-C2 | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] |[Announcement](https://www.espressif.com/en/news/ESP32-C2) |
|
||||
|ESP32-C6 | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] |[Announcement](https://www.espressif.com/en/news/ESP32_C6) |
|
||||
|ESP32-H2 |![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] |[Announcement](https://www.espressif.com/en/news/ESP32_H2) |
|
||||
|ESP32-P4 | | | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] |[Announcement](https://www.espressif.com/en/news/ESP32-P4) |
|
||||
|ESP32-C5 | | | | |![alt text][supported] |since v5.5.1, [Announcement](https://www.espressif.com/en/news/ESP32-C5) |
|
||||
|ESP32-C61 | | | | |![alt text][supported] |since v5.5.1, [Announcement](https://www.espressif.com/en/products/socs/esp32-c61) |
|
||||
|Chip | v5.0 | v5.1 | v5.2 | v5.3 | v5.4 | |
|
||||
|:----------- | :---------------------:| :--------------------: | :--------------------: | :--------------------: | :--------------------: |:------------------------------------------------------------------- |
|
||||
|ESP32 | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | |
|
||||
|ESP32-S2 | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | |
|
||||
|ESP32-C3 | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | |
|
||||
|ESP32-S3 | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] |[Announcement](https://www.espressif.com/en/news/ESP32_S3) |
|
||||
|ESP32-C2 | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] |[Announcement](https://www.espressif.com/en/news/ESP32-C2) |
|
||||
|ESP32-C6 | | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] |[Announcement](https://www.espressif.com/en/news/ESP32_C6) |
|
||||
|ESP32-H2 | | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] |[Announcement](https://www.espressif.com/en/news/ESP32_H2) |
|
||||
|ESP32-P4 | | | | ![alt text][supported] | ![alt text][supported] |[Announcement](https://www.espressif.com/en/news/ESP32-P4) |
|
||||
|ESP32-C5 | | | | | ![alt text][preview] |[Announcement](https://www.espressif.com/en/news/ESP32-C5) |
|
||||
|ESP32-C61 | | | | | ![alt text][preview] |[Announcement](https://www.espressif.com/en/products/socs/esp32-c61) |
|
||||
|
||||
[supported]: https://img.shields.io/badge/-supported-green "supported"
|
||||
[preview]: https://img.shields.io/badge/-preview-orange "preview"
|
||||
|
||||
25
README_CN.md
25
README_CN.md
@@ -15,19 +15,18 @@ ESP-IDF 是乐鑫官方推出的物联网开发框架,支持 Windows、Linux
|
||||
|
||||
下表总结了乐鑫芯片在 ESP-IDF 各版本中的支持状态,其中 ![alt text][supported] 代表已支持,![alt text][preview] 代表目前处于预览支持状态。预览支持状态通常有时间限制,而且仅适用于测试版芯片。请确保使用与芯片相匹配的 ESP-IDF 版本。
|
||||
|
||||
芯片 | v5.1 | v5.2 | v5.3 | v5.4 | v5.5 | |
|
||||
|:----------- | :--------------------: | :--------------------: | :--------------------: | :--------------------: | :--------------------: |:------------------------------------------------------------------------ |
|
||||
|ESP32 |![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] |![alt text][supported] | |
|
||||
|ESP32-S2 |![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | |
|
||||
|ESP32-C3 |![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | |
|
||||
|ESP32-S3 |![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] |![alt text][supported] | [芯片发布公告](https://www.espressif.com/zh-hans/news/ESP32_S3) |
|
||||
|ESP32-C2 |![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] |![alt text][supported] | [芯片发布公告](https://www.espressif.com/zh-hans/news/ESP32-C2) |
|
||||
|ESP32-C6 |![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] |![alt text][supported] | [芯片发布公告](https://www.espressif.com/zh-hans/news/ESP32_C6) |
|
||||
|ESP32-H2 |![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] |![alt text][supported] | [芯片发布公告](https://www.espressif.com/zh-hans/news/ESP32_H2) |
|
||||
|ESP32-P4 | | | ![alt text][supported] | ![alt text][supported] |![alt text][supported] | [芯片发布公告](https://www.espressif.com/zh-hans/news/ESP32-P4) |
|
||||
|ESP32-C5 | | | | |![alt text][supported] | 自 v5.5.1 开始,[芯片发布公告](https://www.espressif.com/zh-hans/news/ESP32-C5) |
|
||||
|ESP32-C61 | | | | |![alt text][supported] | 自 v5.5.1 开始,[芯片发布公告](https://www.espressif.com/zh-hans/products/socs/esp32-c61) |
|
||||
|
||||
|芯片 | v5.0 | v5.1 | v5.2 | v5.3 | v5.4 | |
|
||||
|:----------- | :---------------------:| :--------------------: | :--------------------: | :--------------------: | :--------------------: | :------------------------------------------------------------------------ |
|
||||
|ESP32 | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | |
|
||||
|ESP32-S2 | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | |
|
||||
|ESP32-C3 | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | |
|
||||
|ESP32-S3 | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | [芯片发布公告](https://www.espressif.com/zh-hans/news/ESP32_S3) |
|
||||
|ESP32-C2 | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | [芯片发布公告](https://www.espressif.com/zh-hans/news/ESP32-C2) |
|
||||
|ESP32-C6 | | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | [芯片发布公告](https://www.espressif.com/zh-hans/news/ESP32_C6) |
|
||||
|ESP32-H2 | | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | [芯片发布公告](https://www.espressif.com/zh-hans/news/ESP32_H2) |
|
||||
|ESP32-P4 | | | | ![alt text][supported] | ![alt text][supported] | [芯片发布公告](https://www.espressif.com/zh-hans/news/ESP32-P4) |
|
||||
|ESP32-C5 | | | | | ![alt text][preview] | [芯片发布公告](https://www.espressif.com/zh-hans/news/ESP32-C5) |
|
||||
|ESP32-C61 | | | | | ![alt text][preview] | [芯片发布公告](https://www.espressif.com/zh-hans/products/socs/esp32-c61) |
|
||||
|
||||
[supported]: https://img.shields.io/badge/-%E6%94%AF%E6%8C%81-green "supported"
|
||||
[preview]: https://img.shields.io/badge/-%E9%A2%84%E8%A7%88-orange "preview"
|
||||
|
||||
@@ -3,7 +3,7 @@
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-1-Clause
|
||||
*
|
||||
* SPDX-FileContributor: 2017-2025 Espressif Systems (Shanghai) CO LTD
|
||||
* SPDX-FileContributor: 2017-2024 Espressif Systems (Shanghai) CO LTD
|
||||
*/
|
||||
/*********************************************************************
|
||||
* SEGGER Microcontroller GmbH *
|
||||
@@ -65,7 +65,6 @@ Revision: $Rev: 7745 $
|
||||
#include "esp_app_trace.h"
|
||||
#include "esp_app_trace_util.h"
|
||||
#include "esp_intr_alloc.h"
|
||||
#include "esp_clk_tree.h"
|
||||
#include "esp_cpu.h"
|
||||
#include "soc/soc.h"
|
||||
#include "soc/interrupts.h"
|
||||
@@ -85,7 +84,11 @@ extern const SEGGER_SYSVIEW_OS_API SYSVIEW_X_OS_TraceAPI;
|
||||
// The target device name
|
||||
#define SYSVIEW_DEVICE_NAME CONFIG_IDF_TARGET
|
||||
// The target core name
|
||||
#define SYSVIEW_CORE_NAME "core0" // In dual core, this will be renamed by OpenOCD as core1
|
||||
#if CONFIG_IDF_TARGET_ARCH_XTENSA
|
||||
#define SYSVIEW_CORE_NAME "xtensa"
|
||||
#elif CONFIG_IDF_TARGET_ARCH_RISCV
|
||||
#define SYSVIEW_CORE_NAME "riscv"
|
||||
#endif
|
||||
|
||||
// Determine which timer to use as timestamp source
|
||||
#if CONFIG_APPTRACE_SV_TS_SOURCE_CCOUNT
|
||||
@@ -102,6 +105,9 @@ extern const SEGGER_SYSVIEW_OS_API SYSVIEW_X_OS_TraceAPI;
|
||||
// Timer group timer divisor
|
||||
#define SYSVIEW_TIMER_DIV 2
|
||||
|
||||
// Frequency of the timestamp, using APB as GPTimer source clock
|
||||
#define SYSVIEW_TIMESTAMP_FREQ (esp_clk_apb_freq() / SYSVIEW_TIMER_DIV)
|
||||
|
||||
// GPTimer handle
|
||||
gptimer_handle_t s_sv_gptimer;
|
||||
|
||||
@@ -171,38 +177,30 @@ static void _cbSendSystemDesc(void) {
|
||||
*
|
||||
**********************************************************************
|
||||
*/
|
||||
static int SEGGER_SYSVIEW_TS_Init(void)
|
||||
static void SEGGER_SYSVIEW_TS_Init(void)
|
||||
{
|
||||
/* We only need to initialize something if we use Timer Group.
|
||||
* esp_timer and ccount can be used as is.
|
||||
*/
|
||||
#if TS_USE_TIMERGROUP
|
||||
// get clock source frequency
|
||||
uint32_t counter_src_hz = 0;
|
||||
ESP_ERROR_CHECK(esp_clk_tree_src_get_freq_hz(
|
||||
(soc_module_clk_t)GPTIMER_CLK_SRC_DEFAULT,
|
||||
ESP_CLK_TREE_SRC_FREQ_PRECISION_CACHED, &counter_src_hz));
|
||||
gptimer_config_t config = {
|
||||
.clk_src = GPTIMER_CLK_SRC_DEFAULT,
|
||||
.direction = GPTIMER_COUNT_UP,
|
||||
.resolution_hz = counter_src_hz / SYSVIEW_TIMER_DIV,
|
||||
.resolution_hz = SYSVIEW_TIMESTAMP_FREQ,
|
||||
};
|
||||
// pick any free GPTimer instance
|
||||
ESP_ERROR_CHECK(gptimer_new_timer(&config, &s_sv_gptimer));
|
||||
/* Start counting */
|
||||
gptimer_enable(s_sv_gptimer);
|
||||
gptimer_start(s_sv_gptimer);
|
||||
return config.resolution_hz;
|
||||
#else
|
||||
return SYSVIEW_TIMESTAMP_FREQ;
|
||||
#endif // TS_USE_TIMERGROUP
|
||||
}
|
||||
|
||||
void SEGGER_SYSVIEW_Conf(void) {
|
||||
U32 disable_evts = 0;
|
||||
|
||||
int timestamp_freq = SEGGER_SYSVIEW_TS_Init();
|
||||
SEGGER_SYSVIEW_Init(timestamp_freq, SYSVIEW_CPU_FREQ,
|
||||
SEGGER_SYSVIEW_TS_Init();
|
||||
SEGGER_SYSVIEW_Init(SYSVIEW_TIMESTAMP_FREQ, SYSVIEW_CPU_FREQ,
|
||||
&SYSVIEW_X_OS_TraceAPI, _cbSendSystemDesc);
|
||||
SEGGER_SYSVIEW_SetRAMBase(SYSVIEW_RAM_BASE);
|
||||
|
||||
|
||||
@@ -33,7 +33,7 @@
|
||||
#include "esp_flash.h"
|
||||
#include "esp_flash_internal.h"
|
||||
|
||||
#define SUB_TYPE_ID(i) (i & 0x0F)
|
||||
#define OTA_SLOT(i) (i & 0x0F)
|
||||
#define ALIGN_UP(num, align) (((num) + ((align) - 1)) & ~((align) - 1))
|
||||
|
||||
/* Partial_data is word aligned so no reallocation is necessary for encrypted flash write */
|
||||
@@ -539,6 +539,69 @@ static esp_err_t rewrite_ota_seq(esp_ota_select_entry_t *two_otadata, uint32_t s
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Calculate the next OTA sequence number that will boot the given OTA slot.
|
||||
*
|
||||
* Based on the ESP-IDF OTA boot scheme, the system selects the OTA slot to boot by:
|
||||
* boot_slot = (seq - 1) % ota_app_count
|
||||
*
|
||||
* This function determines the required seq value that would cause the given ota_slot_idx
|
||||
* to be selected on next boot.
|
||||
*
|
||||
* @param current_seq Current active OTA sequence number
|
||||
* @param ota_slot_idx Target OTA slot index (0-based)
|
||||
* @param ota_app_count Total number of OTA slots
|
||||
*
|
||||
* @return New sequence number that will result in booting ota_slot_idx
|
||||
*/
|
||||
static uint32_t compute_ota_seq_for_target_slot(uint32_t current_seq, uint32_t ota_slot_idx, uint8_t ota_app_count)
|
||||
{
|
||||
if (ota_app_count == 0) {
|
||||
return 0;
|
||||
}
|
||||
/* ESP-IDF stores OTA boot information in the OTA data partition, which consists of two sectors.
|
||||
* Each sector holds an esp_ota_select_entry_t structure: otadata[0] and otadata[1].
|
||||
* These structures record the OTA sequence number (ota_seq) used to determine the current boot partition.
|
||||
*
|
||||
* Boot selection logic:
|
||||
* - If both otadata[0].ota_seq and otadata[1].ota_seq are 0xFFFFFFFF (invalid), it is the initial state:
|
||||
* → Boot the factory app, if it exists.
|
||||
* → Otherwise, fall back to booting ota[0].
|
||||
*
|
||||
* - If both otadata entries have valid sequence numbers and CRCs:
|
||||
* → Choose the higher sequence number (max_seq).
|
||||
* → Determine the OTA partition for boot (or running partition) using:
|
||||
* running_ota_slot = (max_seq - 1) % ota_app_count
|
||||
* where ota_app_count is the total number of OTA app partitions.
|
||||
*
|
||||
* Example:
|
||||
* otadata[0].ota_seq = 4
|
||||
* otadata[1].ota_seq = 5
|
||||
* ota_app_count = 8 (available OTA slots: ota_0 to ota_7)
|
||||
* → max_seq = 5
|
||||
* → running slot = (5 - 1) % 8 = 4
|
||||
* → So ota_4 is currently running
|
||||
*
|
||||
* If you want to switch to boot a different OTA slot (e.g., ota_7):
|
||||
* → You need to compute a new sequence number such that:
|
||||
* (new_seq - 1) % ota_app_count == 7
|
||||
* while ensuring new_seq > current_seq.
|
||||
*
|
||||
* General formula:
|
||||
* x = current OTA slot ID
|
||||
* ota_slot_idx = desired OTA slot ID
|
||||
* seq = current ota_seq
|
||||
*
|
||||
* To find the next ota_seq that will boot ota_y, use:
|
||||
* new_seq = ((ota_slot_idx + 1) % ota_app_count) + ota_app_count * i;
|
||||
* // where i is the smallest non-negative integer such that new_seq > seq
|
||||
*/
|
||||
uint32_t i = 0;
|
||||
uint32_t base = (ota_slot_idx + 1) % ota_app_count;
|
||||
while (current_seq > (base + i * ota_app_count)) { i++; };
|
||||
return base + i * ota_app_count;
|
||||
}
|
||||
|
||||
uint8_t esp_ota_get_app_partition_count(void)
|
||||
{
|
||||
uint16_t ota_app_count = 0;
|
||||
@@ -549,6 +612,30 @@ uint8_t esp_ota_get_app_partition_count(void)
|
||||
return ota_app_count;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Update the OTA data partition to set the given OTA app subtype as the next boot target.
|
||||
*
|
||||
* ESP-IDF uses the OTA data partition to track which OTA app should boot.
|
||||
* This partition contains two entries (otadata[0] and otadata[1]), each storing an esp_ota_select_entry_t struct,
|
||||
* which includes the OTA sequence number (ota_seq).
|
||||
*
|
||||
* On boot, the chip determines the current running OTA slot using:
|
||||
* current_slot = (max(ota_seq) - 1) % ota_app_count
|
||||
*
|
||||
* This function updates the OTA data to switch the next boot to the partition with the given subtype.
|
||||
*
|
||||
* Behavior:
|
||||
* - If the currently selected OTA slot already matches the requested subtype,
|
||||
* only the state field is updated (e.g., to mark the app as newly downloaded).
|
||||
* - Otherwise, it calculates the next valid ota_seq that will cause the bootloader to select
|
||||
* the requested OTA slot on reboot, and writes it to the inactive OTA data sector.
|
||||
*
|
||||
* @param subtype The OTA partition subtype (e.g., ESP_PARTITION_SUBTYPE_APP_OTA_0, ..._OTA_1, ...)
|
||||
* @return
|
||||
* - ESP_OK if update was successful
|
||||
* - ESP_ERR_NOT_FOUND if OTA data partition not found
|
||||
* - ESP_ERR_INVALID_ARG if subtype is out of range
|
||||
*/
|
||||
static esp_err_t esp_rewrite_ota_data(esp_partition_subtype_t subtype)
|
||||
{
|
||||
esp_ota_select_entry_t otadata[2];
|
||||
@@ -558,42 +645,31 @@ static esp_err_t esp_rewrite_ota_data(esp_partition_subtype_t subtype)
|
||||
}
|
||||
|
||||
uint8_t ota_app_count = esp_ota_get_app_partition_count();
|
||||
if (SUB_TYPE_ID(subtype) >= ota_app_count) {
|
||||
if (OTA_SLOT(subtype) >= ota_app_count) {
|
||||
return ESP_ERR_INVALID_ARG;
|
||||
}
|
||||
|
||||
//esp32_idf use two sector for store information about which partition is running
|
||||
//it defined the two sector as ota data partition,two structure esp_ota_select_entry_t is saved in the two sector
|
||||
//named data in first sector as otadata[0], second sector data as otadata[1]
|
||||
//e.g.
|
||||
//if otadata[0].ota_seq == otadata[1].ota_seq == 0xFFFFFFFF,means ota info partition is in init status
|
||||
//so it will boot factory application(if there is),if there's no factory application,it will boot ota[0] application
|
||||
//if otadata[0].ota_seq != 0 and otadata[1].ota_seq != 0,it will choose a max seq ,and get value of max_seq%max_ota_app_number
|
||||
//and boot a subtype (mask 0x0F) value is (max_seq - 1)%max_ota_app_number,so if want switch to run ota[x],can use next formulas.
|
||||
//for example, if otadata[0].ota_seq = 4, otadata[1].ota_seq = 5, and there are 8 ota application,
|
||||
//current running is (5-1)%8 = 4,running ota[4],so if we want to switch to run ota[7],
|
||||
//we should add otadata[0].ota_seq (is 4) to 4 ,(8-1)%8=7,then it will boot ota[7]
|
||||
//if A=(B - C)%D
|
||||
//then B=(A + C)%D + D*n ,n= (0,1,2...)
|
||||
//so current ota app sub type id is x , dest bin subtype is y,total ota app count is n
|
||||
//seq will add (x + n*1 + 1 - seq)%n
|
||||
|
||||
int active_otadata = bootloader_common_get_active_otadata(otadata);
|
||||
int next_otadata;
|
||||
uint32_t new_seq;
|
||||
if (active_otadata != -1) {
|
||||
uint32_t seq = otadata[active_otadata].ota_seq;
|
||||
uint32_t i = 0;
|
||||
while (seq > (SUB_TYPE_ID(subtype) + 1) % ota_app_count + i * ota_app_count) {
|
||||
i++;
|
||||
uint32_t ota_slot = (otadata[active_otadata].ota_seq - 1) % ota_app_count;
|
||||
if (ota_slot == OTA_SLOT(subtype)) {
|
||||
// ota_data is already valid and points to the correct OTA slot.
|
||||
// So after reboot the requested partition will be selected for boot.
|
||||
// Only update the ota_state of the requested partition.
|
||||
next_otadata = active_otadata;
|
||||
new_seq = otadata[active_otadata].ota_seq;
|
||||
} else {
|
||||
next_otadata = (~active_otadata) & 1; // if 0 -> will be next 1. and if 1 -> will be next 0.
|
||||
new_seq = compute_ota_seq_for_target_slot(otadata[active_otadata].ota_seq, OTA_SLOT(subtype), ota_app_count);
|
||||
}
|
||||
int next_otadata = (~active_otadata)&1; // if 0 -> will be next 1. and if 1 -> will be next 0.
|
||||
otadata[next_otadata].ota_state = set_new_state_otadata();
|
||||
return rewrite_ota_seq(otadata, (SUB_TYPE_ID(subtype) + 1) % ota_app_count + i * ota_app_count, next_otadata, otadata_partition);
|
||||
} else {
|
||||
/* Both OTA slots are invalid, probably because unformatted... */
|
||||
int next_otadata = 0;
|
||||
otadata[next_otadata].ota_state = set_new_state_otadata();
|
||||
return rewrite_ota_seq(otadata, SUB_TYPE_ID(subtype) + 1, next_otadata, otadata_partition);
|
||||
next_otadata = 0;
|
||||
new_seq = OTA_SLOT(subtype) + 1;
|
||||
}
|
||||
otadata[next_otadata].ota_state = set_new_state_otadata();
|
||||
return rewrite_ota_seq(otadata, new_seq, next_otadata, otadata_partition);
|
||||
}
|
||||
|
||||
esp_err_t esp_ota_set_boot_partition(const esp_partition_t *partition)
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD
|
||||
* SPDX-FileCopyrightText: 2021-2025 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
@@ -17,6 +17,7 @@
|
||||
|
||||
static const char *TAG = "ota_test";
|
||||
|
||||
|
||||
/* @brief Checks and prepares the partition so that the factory app is launched after that.
|
||||
*/
|
||||
static void start_test(void)
|
||||
@@ -617,3 +618,51 @@ static void test_rollback3_1(void)
|
||||
}
|
||||
|
||||
TEST_CASE_MULTIPLE_STAGES("Test rollback. Updated partition invalidated after esp_ota_begin", "[app_update][timeout=90][reset=DEEPSLEEP_RESET, DEEPSLEEP_RESET, DEEPSLEEP_RESET, SW_CPU_RESET]", start_test, test_rollback3, test_rollback3, test_rollback3, test_rollback3_1);
|
||||
|
||||
static void test_rollback4(void)
|
||||
{
|
||||
uint8_t boot_count = get_boot_count_from_nvs();
|
||||
boot_count++;
|
||||
set_boot_count_in_nvs(boot_count);
|
||||
ESP_LOGI(TAG, "boot count %d", boot_count);
|
||||
const esp_partition_t *cur_app = get_running_firmware();
|
||||
switch (boot_count) {
|
||||
case 2:
|
||||
ESP_LOGI(TAG, "Factory");
|
||||
TEST_ASSERT_EQUAL(ESP_PARTITION_SUBTYPE_APP_FACTORY, cur_app->subtype);
|
||||
app_update();
|
||||
reboot_as_deep_sleep();
|
||||
break;
|
||||
case 3:
|
||||
ESP_LOGI(TAG, "OTA0");
|
||||
TEST_ASSERT_EQUAL(ESP_PARTITION_SUBTYPE_APP_OTA_0, cur_app->subtype);
|
||||
TEST_ESP_OK(esp_ota_mark_app_valid_cancel_rollback());
|
||||
app_update();
|
||||
|
||||
// Do not reboot and call app_update again.
|
||||
// This will not change the running partition since we haven't rebooted.
|
||||
// The esp_rewrite_otadata() will update the otadata for the non-running partition only.
|
||||
app_update();
|
||||
#ifdef CONFIG_BOOTLOADER_APP_ROLLBACK_ENABLE
|
||||
// The last call to esp_rewrite_otadata should have updated the otadata for the non-running partition only.
|
||||
// Therefore, calling esp_ota_get_state_partition on the running partition should succeed and not return ESP_ERR_NOT_FOUND
|
||||
const esp_partition_t* running_partition;
|
||||
running_partition = esp_ota_get_running_partition();
|
||||
esp_ota_img_states_t ota_state;
|
||||
TEST_ESP_OK(esp_ota_get_state_partition(running_partition, &ota_state));
|
||||
#endif
|
||||
reboot_as_deep_sleep();
|
||||
break;
|
||||
case 4:
|
||||
ESP_LOGI(TAG, "OTA1");
|
||||
TEST_ASSERT_EQUAL(ESP_PARTITION_SUBTYPE_APP_OTA_1, cur_app->subtype);
|
||||
TEST_ESP_OK(esp_ota_mark_app_valid_cancel_rollback());
|
||||
break;
|
||||
default:
|
||||
erase_ota_data();
|
||||
TEST_FAIL_MESSAGE("Unexpected stage");
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
TEST_CASE_MULTIPLE_STAGES("Test esp_rewrite_otadata. Updated sequence number for non-running partition always", "[app_update][timeout=90][reset=DEEPSLEEP_RESET, DEEPSLEEP_RESET, DEEPSLEEP_RESET, SW_CPU_RESET]", start_test, test_rollback4, test_rollback4, test_rollback4);
|
||||
|
||||
@@ -20,7 +20,7 @@ TEST_SUBMENU_PATTERN_PYTEST = re.compile(rb'\s+\((\d+)\)\s+"([^"]+)"\r?\n')
|
||||
)
|
||||
@idf_parametrize('target', ['supported_targets'], indirect=['target'])
|
||||
def test_app_update(dut: Dut) -> None:
|
||||
dut.run_all_single_board_cases(timeout=90)
|
||||
dut.run_all_single_board_cases(timeout=180)
|
||||
|
||||
|
||||
@pytest.mark.generic
|
||||
@@ -33,7 +33,7 @@ def test_app_update(dut: Dut) -> None:
|
||||
)
|
||||
@idf_parametrize('target', ['supported_targets'], indirect=['target'])
|
||||
def test_app_update_xip_psram(dut: Dut) -> None:
|
||||
dut.run_all_single_board_cases(timeout=90)
|
||||
dut.run_all_single_board_cases(timeout=180)
|
||||
|
||||
|
||||
@pytest.mark.generic
|
||||
@@ -46,7 +46,7 @@ def test_app_update_xip_psram(dut: Dut) -> None:
|
||||
)
|
||||
@idf_parametrize('target', ['supported_targets'], indirect=['target'])
|
||||
def test_app_update_xip_psram_rom_impl(dut: Dut) -> None:
|
||||
dut.run_all_single_board_cases(timeout=90)
|
||||
dut.run_all_single_board_cases(timeout=180)
|
||||
|
||||
|
||||
@pytest.mark.generic
|
||||
@@ -59,7 +59,7 @@ def test_app_update_xip_psram_rom_impl(dut: Dut) -> None:
|
||||
)
|
||||
@idf_parametrize('target', ['esp32', 'esp32c3', 'esp32s3', 'esp32p4'], indirect=['target'])
|
||||
def test_app_update_with_rollback(dut: Dut) -> None:
|
||||
dut.run_all_single_board_cases(timeout=90)
|
||||
dut.run_all_single_board_cases(timeout=180)
|
||||
|
||||
|
||||
@pytest.mark.recovery_bootloader
|
||||
|
||||
@@ -553,13 +553,12 @@ menu "Security features"
|
||||
depends on SECURE_SIGNED_APPS_ECDSA_V2_SCHEME
|
||||
default SECURE_BOOT_ECDSA_KEY_LEN_256_BITS
|
||||
help
|
||||
Select the ECDSA key size. Three key sizes are supported depending upon on the target:
|
||||
Select the ECDSA key size. Two key sizes are supported
|
||||
|
||||
- 192 bit key using NISTP192 curve
|
||||
- 256 bit key using NISTP256 curve (Recommended)
|
||||
- 384 bit key using NISTP384 curve (Recommended)
|
||||
|
||||
The advantage of using 384 and 256 bit keys is the extra randomness which makes it difficult to be
|
||||
The advantage of using 256 bit key is the extra randomness which makes it difficult to be
|
||||
bruteforced compared to 192 bit key.
|
||||
At present, both key sizes are practically implausible to bruteforce.
|
||||
|
||||
@@ -571,10 +570,6 @@ menu "Security features"
|
||||
bool "Using ECC curve NISTP256 (Recommended)"
|
||||
depends on SECURE_SIGNED_APPS_ECDSA_V2_SCHEME
|
||||
|
||||
config SECURE_BOOT_ECDSA_KEY_LEN_384_BITS
|
||||
bool "Using ECC curve NISTP384 (Recommended)"
|
||||
depends on SECURE_SIGNED_APPS_ECDSA_V2_SCHEME && SOC_ECDSA_SUPPORT_CURVE_P384
|
||||
|
||||
endchoice
|
||||
|
||||
config SECURE_SIGNED_ON_BOOT_NO_SECURE_BOOT
|
||||
@@ -1167,7 +1162,7 @@ menu "Security features"
|
||||
It is also possible to enable secure download mode at runtime by calling
|
||||
esp_efuse_enable_rom_secure_download_mode()
|
||||
|
||||
Note: Secure Download mode is not available for ESP32.
|
||||
Note: Secure Download mode is not available for ESP32 (includes revisions till ECO3).
|
||||
|
||||
config SECURE_INSECURE_ALLOW_DL_MODE
|
||||
bool "UART ROM download mode (Enabled (not recommended))"
|
||||
|
||||
@@ -70,8 +70,6 @@ if(CONFIG_SECURE_SIGNED_APPS)
|
||||
set(scheme "ecdsa192")
|
||||
elseif(CONFIG_SECURE_BOOT_ECDSA_KEY_LEN_256_BITS)
|
||||
set(scheme "ecdsa256")
|
||||
elseif(CONFIG_SECURE_BOOT_ECDSA_KEY_LEN_384_BITS)
|
||||
set(scheme "ecdsa384")
|
||||
endif()
|
||||
fail_at_build_time(gen_secure_boot_signing_key
|
||||
"Secure Boot Signing Key ${CONFIG_SECURE_BOOT_SIGNING_KEY} does not exist. Generate using:"
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
|
||||
* SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
@@ -18,6 +18,7 @@
|
||||
#include "hal/cache_hal.h"
|
||||
#include "hal/cache_ll.h"
|
||||
#include "hal/mspi_ll.h"
|
||||
#include "hal/clk_tree_ll.h"
|
||||
#include "soc/pcr_reg.h"
|
||||
|
||||
static const char *TAG = "boot.esp32h21";
|
||||
@@ -80,7 +81,9 @@ void IRAM_ATTR bootloader_configure_spi_pins(int drv)
|
||||
|
||||
static void IRAM_ATTR bootloader_flash_clock_init(void)
|
||||
{
|
||||
// At this moment, BBPLL should be enabled, safe to switch MSPI clock source to PLL_F64M (default clock src) to raise speed
|
||||
// To raise the MSPI clock to 64MHz, needs to enable the 64MHz clock source, which is XTAL_X2_CLK
|
||||
// (FPGA image fixed MSPI0/1 clock to 64MHz)
|
||||
clk_ll_xtal_x2_enable();
|
||||
_mspi_timing_ll_set_flash_clk_src(0, FLASH_CLK_SRC_PLL_F64M);
|
||||
}
|
||||
|
||||
|
||||
@@ -17,6 +17,7 @@
|
||||
#if !CONFIG_IDF_TARGET_LINUX
|
||||
#include "rom/secure_boot.h"
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SECURE_BOOT_V1_ENABLED
|
||||
#if !defined(CONFIG_SECURE_SIGNED_ON_BOOT) || !defined(CONFIG_SECURE_SIGNED_ON_UPDATE) || !defined(CONFIG_SECURE_SIGNED_APPS)
|
||||
#error "internal sdkconfig error, secure boot should always enable all signature options"
|
||||
@@ -32,20 +33,12 @@ extern "C" {
|
||||
Can be compiled as part of app or bootloader code.
|
||||
*/
|
||||
|
||||
#if CONFIG_SECURE_BOOT_ECDSA_KEY_LEN_384_BITS
|
||||
#define ESP_SECURE_BOOT_DIGEST_LEN 48
|
||||
#else /* !CONFIG_SECURE_BOOT_ECDSA_KEY_LEN_384_BITS */
|
||||
#define ESP_SECURE_BOOT_DIGEST_LEN 32
|
||||
#endif /* CONFIG_SECURE_BOOT_ECDSA_KEY_LEN_384_BITS */
|
||||
|
||||
/* SHA-256 length of the public key digest */
|
||||
#define ESP_SECURE_BOOT_KEY_DIGEST_SHA_256_LEN 32
|
||||
|
||||
/* Length of the public key digest that is stored in efuses */
|
||||
#if CONFIG_IDF_TARGET_ESP32C2
|
||||
#define ESP_SECURE_BOOT_KEY_DIGEST_LEN ESP_SECURE_BOOT_KEY_DIGEST_SHA_256_LEN / 2
|
||||
#define ESP_SECURE_BOOT_KEY_DIGEST_LEN 16
|
||||
#else
|
||||
#define ESP_SECURE_BOOT_KEY_DIGEST_LEN ESP_SECURE_BOOT_KEY_DIGEST_SHA_256_LEN
|
||||
#define ESP_SECURE_BOOT_KEY_DIGEST_LEN 32
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_EFUSE_VIRTUAL_KEEP_IN_FLASH
|
||||
@@ -200,8 +193,7 @@ esp_err_t esp_secure_boot_v2_permanently_enable(const esp_image_metadata_t *imag
|
||||
/** @brief Verify the secure boot signature appended to some binary data in flash.
|
||||
*
|
||||
* For ECDSA Scheme (Secure Boot V1) - deterministic ECDSA w/ SHA256 image
|
||||
* For RSA Scheme (Secure Boot V2) - RSA-PSS Verification of the SHA-256 image digest
|
||||
* For ECDSA Scheme (Secure Boot V2) - ECDSA Verification of the SHA-256 / SHA-384 (in case of ECDSA-P384 secure boot key) image digest
|
||||
* For RSA Scheme (Secure Boot V2) - RSA-PSS Verification of the SHA-256 image
|
||||
*
|
||||
* Public key is compiled into the calling program in the ECDSA Scheme.
|
||||
* See the apt docs/security/secure-boot-v1.rst or docs/security/secure-boot-v2.rst for details.
|
||||
@@ -244,13 +236,13 @@ esp_err_t esp_secure_boot_verify_ecdsa_signature_block(const esp_secure_boot_sig
|
||||
|
||||
/** @brief Verify the secure boot signature block for Secure Boot V2.
|
||||
*
|
||||
* Performs RSA-PSS or ECDSA verification of the SHA-256 / SHA-384 image based on the public key
|
||||
* Performs RSA-PSS or ECDSA verification of the SHA-256 image based on the public key
|
||||
* in the signature block, compared against the public key digest stored in efuse.
|
||||
*
|
||||
* Similar to esp_secure_boot_verify_signature(), but can be used when the digest is precalculated.
|
||||
* @param[in] sig_block Pointer to signature block data
|
||||
* @param[in] image_digest Pointer to 32/48 byte buffer holding SHA-256/SHA-384 hash.
|
||||
* @param[out] verified_digest Pointer to 32/48 byte buffer that will receive verified digest if verification completes. (Used during bootloader implementation only, result is invalid otherwise.)
|
||||
* @param[in] image_digest Pointer to 32 byte buffer holding SHA-256 hash.
|
||||
* @param[out] verified_digest Pointer to 32 byte buffer that will receive verified digest if verification completes. (Used during bootloader implementation only, result is invalid otherwise.)
|
||||
*
|
||||
*/
|
||||
esp_err_t esp_secure_boot_verify_sbv2_signature_block(const ets_secure_boot_signature_t *sig_block, const uint8_t *image_digest, uint8_t *verified_digest);
|
||||
@@ -263,7 +255,7 @@ esp_err_t esp_secure_boot_verify_sbv2_signature_block(const ets_secure_boot_sign
|
||||
* Each image can have one or more signature blocks (up to SECURE_BOOT_NUM_BLOCKS). Each signature block includes a public key.
|
||||
*/
|
||||
typedef struct {
|
||||
uint8_t key_digests[SOC_EFUSE_SECURE_BOOT_KEY_DIGESTS][ESP_SECURE_BOOT_KEY_DIGEST_SHA_256_LEN]; /* SHA of the public key components in the signature block */
|
||||
uint8_t key_digests[SOC_EFUSE_SECURE_BOOT_KEY_DIGESTS][ESP_SECURE_BOOT_DIGEST_LEN]; /* SHA of the public key components in the signature block */
|
||||
unsigned num_digests; /* Number of valid digests, starting at index 0 */
|
||||
} esp_image_sig_public_key_digests_t;
|
||||
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2017-2025 Espressif Systems (Shanghai) CO LTD
|
||||
* SPDX-FileCopyrightText: 2017-2024 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
@@ -12,18 +12,15 @@
|
||||
Use mbedTLS APIs or include esp32/sha.h to calculate SHA256 in IDF apps.
|
||||
*/
|
||||
|
||||
#include <stdbool.h>
|
||||
#include <stdint.h>
|
||||
#include <stdlib.h>
|
||||
#include "esp_err.h"
|
||||
#include "soc/soc_caps.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
typedef void *bootloader_sha256_handle_t;
|
||||
typedef bootloader_sha256_handle_t bootloader_sha_handle_t;
|
||||
|
||||
bootloader_sha256_handle_t bootloader_sha256_start(void);
|
||||
|
||||
@@ -31,14 +28,6 @@ void bootloader_sha256_data(bootloader_sha256_handle_t handle, const void *data,
|
||||
|
||||
void bootloader_sha256_finish(bootloader_sha256_handle_t handle, uint8_t *digest);
|
||||
|
||||
#if SOC_SHA_SUPPORT_SHA512
|
||||
bootloader_sha_handle_t bootloader_sha512_start(bool is384);
|
||||
|
||||
void bootloader_sha512_data(bootloader_sha_handle_t handle, const void *data, size_t data_len);
|
||||
|
||||
void bootloader_sha512_finish(bootloader_sha_handle_t handle, uint8_t *digest);
|
||||
#endif /* SOC_SHA_SUPPORT_SHA512 */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2018-2025 Espressif Systems (Shanghai) CO LTD
|
||||
* SPDX-FileCopyrightText: 2018-2024 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
@@ -138,20 +138,6 @@ void bootloader_debug_buffer(const void *buffer, size_t length, const char *labe
|
||||
*/
|
||||
esp_err_t bootloader_sha256_flash_contents(uint32_t flash_offset, uint32_t len, uint8_t *digest);
|
||||
|
||||
/** @brief Generates the digest of the data between offset & offset+length.
|
||||
*
|
||||
* This function should be used when the size of the data is larger than 3.2MB.
|
||||
* The MMU capacity is 3.2MB (50 pages - 64KB each). This function generates the SHA-384
|
||||
* of the data in chunks of 3.2MB, considering the MMU capacity.
|
||||
*
|
||||
* @param[in] flash_offset Offset of the data in flash.
|
||||
* @param[in] len Length of data in bytes.
|
||||
* @param[out] digest Pointer to buffer where the digest is written, if ESP_OK is returned.
|
||||
*
|
||||
* @return ESP_OK if secure boot digest is generated successfully.
|
||||
*/
|
||||
esp_err_t bootloader_sha384_flash_contents(uint32_t flash_offset, uint32_t len, uint8_t *digest);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
@@ -18,7 +18,7 @@
|
||||
#include "soc/pmu_reg.h"
|
||||
#endif
|
||||
|
||||
#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32C5
|
||||
#if CONFIG_IDF_TARGET_ESP32
|
||||
#include "hal/clk_tree_ll.h"
|
||||
#endif
|
||||
#include "esp_rom_sys.h"
|
||||
|
||||
@@ -9,7 +9,8 @@
|
||||
#include "hal/adc_ll.h"
|
||||
#include "hal/adc_types.h"
|
||||
#include "esp_private/regi2c_ctrl.h"
|
||||
#include "soc/lpperi_reg.h"
|
||||
|
||||
#define I2C_SAR_ADC_INIT_CODE_VAL 2150
|
||||
|
||||
void bootloader_random_enable(void)
|
||||
{
|
||||
@@ -30,8 +31,8 @@ void bootloader_random_enable(void)
|
||||
ANALOG_CLOCK_ENABLE();
|
||||
|
||||
adc_ll_regi2c_init();
|
||||
adc_ll_set_calibration_param(ADC_UNIT_1, 0x866);
|
||||
adc_ll_set_calibration_param(ADC_UNIT_2, 0x866);
|
||||
adc_ll_set_calibration_param(ADC_UNIT_1, I2C_SAR_ADC_INIT_CODE_VAL);
|
||||
adc_ll_set_calibration_param(ADC_UNIT_2, I2C_SAR_ADC_INIT_CODE_VAL);
|
||||
|
||||
adc_digi_pattern_config_t pattern_config = {};
|
||||
pattern_config.unit = ADC_UNIT_1;
|
||||
@@ -49,9 +50,6 @@ void bootloader_random_enable(void)
|
||||
adc_ll_digi_set_trigger_interval(200);
|
||||
adc_ll_digi_trigger_enable();
|
||||
|
||||
SET_PERI_REG_MASK(LPPERI_RNG_CFG_REG, LPPERI_RNG_SAMPLE_ENABLE);
|
||||
REG_SET_FIELD(LPPERI_RNG_CFG_REG, LPPERI_RTC_TIMER_EN, 0x3);
|
||||
SET_PERI_REG_MASK(LPPERI_RNG_CFG_REG, LPPERI_RNG_TIMER_EN);
|
||||
}
|
||||
|
||||
void bootloader_random_disable(void)
|
||||
|
||||
@@ -10,6 +10,8 @@
|
||||
#include "hal/adc_types.h"
|
||||
#include "esp_private/regi2c_ctrl.h"
|
||||
|
||||
#define I2C_SAR_ADC_INIT_CODE_VAL 2150
|
||||
|
||||
void bootloader_random_enable(void)
|
||||
{
|
||||
adc_ll_reset_register();
|
||||
@@ -29,8 +31,8 @@ void bootloader_random_enable(void)
|
||||
ANALOG_CLOCK_ENABLE();
|
||||
|
||||
adc_ll_regi2c_init();
|
||||
adc_ll_set_calibration_param(ADC_UNIT_1, 0x866);
|
||||
adc_ll_set_calibration_param(ADC_UNIT_2, 0x866);
|
||||
adc_ll_set_calibration_param(ADC_UNIT_1, I2C_SAR_ADC_INIT_CODE_VAL);
|
||||
adc_ll_set_calibration_param(ADC_UNIT_2, I2C_SAR_ADC_INIT_CODE_VAL);
|
||||
|
||||
adc_digi_pattern_config_t pattern_config = {};
|
||||
pattern_config.unit = ADC_UNIT_2;
|
||||
|
||||
@@ -10,6 +10,8 @@
|
||||
#include "hal/adc_types.h"
|
||||
#include "esp_private/regi2c_ctrl.h"
|
||||
|
||||
#define I2C_SAR_ADC_INIT_CODE_VAL 2150
|
||||
|
||||
void bootloader_random_enable(void)
|
||||
{
|
||||
adc_ll_reset_register();
|
||||
@@ -29,8 +31,8 @@ void bootloader_random_enable(void)
|
||||
ANALOG_CLOCK_ENABLE();
|
||||
|
||||
adc_ll_regi2c_init();
|
||||
adc_ll_set_calibration_param(ADC_UNIT_1, 0x866);
|
||||
adc_ll_set_calibration_param(ADC_UNIT_2, 0x866);
|
||||
adc_ll_set_calibration_param(ADC_UNIT_1, I2C_SAR_ADC_INIT_CODE_VAL);
|
||||
adc_ll_set_calibration_param(ADC_UNIT_2, I2C_SAR_ADC_INIT_CODE_VAL);
|
||||
|
||||
adc_digi_pattern_config_t pattern_config = {};
|
||||
pattern_config.unit = ADC_UNIT_1;
|
||||
|
||||
@@ -10,6 +10,8 @@
|
||||
#include "hal/adc_types.h"
|
||||
#include "esp_private/regi2c_ctrl.h"
|
||||
|
||||
#define I2C_SAR_ADC_INIT_CODE_VAL 2150
|
||||
|
||||
void bootloader_random_enable(void)
|
||||
{
|
||||
adc_ll_reset_register();
|
||||
@@ -29,8 +31,8 @@ void bootloader_random_enable(void)
|
||||
ANALOG_CLOCK_ENABLE();
|
||||
|
||||
adc_ll_regi2c_init();
|
||||
adc_ll_set_calibration_param(ADC_UNIT_1, 0x866);
|
||||
adc_ll_set_calibration_param(ADC_UNIT_2, 0x866);
|
||||
adc_ll_set_calibration_param(ADC_UNIT_1, I2C_SAR_ADC_INIT_CODE_VAL);
|
||||
adc_ll_set_calibration_param(ADC_UNIT_2, I2C_SAR_ADC_INIT_CODE_VAL);
|
||||
|
||||
adc_digi_pattern_config_t pattern_config = {};
|
||||
pattern_config.atten = ADC_ATTEN_DB_2_5;
|
||||
|
||||
@@ -1,108 +1,72 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
#include "sdkconfig.h"
|
||||
#include "bootloader_random.h"
|
||||
#include "soc/soc.h"
|
||||
#include "soc/adc_reg.h"
|
||||
#include "soc/pmu_reg.h"
|
||||
#include "soc/regi2c_saradc.h"
|
||||
#include "soc/hp_sys_clkrst_reg.h"
|
||||
#include "soc/lp_adc_reg.h"
|
||||
#include "esp_private/regi2c_ctrl.h"
|
||||
#include "esp_rom_regi2c.h"
|
||||
#include "hal/regi2c_ctrl_ll.h"
|
||||
#include "hal/adc_ll.h"
|
||||
#include "hal/adc_types.h"
|
||||
|
||||
// TODO IDF-6497: once ADC API is supported, use the API instead of defining functions and constants here
|
||||
#include "esp_private/periph_ctrl.h"
|
||||
#include "esp_private/adc_share_hw_ctrl.h"
|
||||
|
||||
#define I2C_SAR_ADC_INIT_CODE_VAL 2166
|
||||
|
||||
typedef struct {
|
||||
int atten;
|
||||
int channel;
|
||||
} pattern_item;
|
||||
|
||||
typedef struct {
|
||||
pattern_item item[4];
|
||||
} pattern_table;
|
||||
|
||||
static void adc1_fix_initcode_set(uint32_t initcode_value)
|
||||
{
|
||||
uint32_t msb = initcode_value >> 8;
|
||||
uint32_t lsb = initcode_value & 0xff;
|
||||
REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SAR1_INITIAL_CODE_HIGH_ADDR, msb);
|
||||
REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SAR1_INITIAL_CODE_LOW_ADDR, lsb);
|
||||
}
|
||||
|
||||
//total 4 tables
|
||||
static void hpadc_sar1_pattern_table_cfg(unsigned int table_idx, pattern_table table)
|
||||
{
|
||||
uint32_t wdata = 0;
|
||||
wdata = (table.item[0].channel << 20 | table.item[0].atten << 18 |
|
||||
table.item[1].channel << 14|table.item[1].atten << 12 |
|
||||
table.item[2].channel << 8 |table.item[2].atten << 6 |
|
||||
table.item[3].channel << 2 |table.item[3].atten);
|
||||
WRITE_PERI_REG(ADC_SAR1_PATT_TAB1_REG + table_idx * 4, wdata);
|
||||
}
|
||||
|
||||
void bootloader_random_enable(void)
|
||||
{
|
||||
pattern_table sar1_table[4] = {};
|
||||
uint32_t pattern_len = 0;
|
||||
_adc_ll_reset_register();
|
||||
_adc_ll_enable_bus_clock(true);
|
||||
|
||||
SET_PERI_REG_MASK(HP_SYS_CLKRST_SOC_CLK_CTRL2_REG, HP_SYS_CLKRST_REG_ADC_APB_CLK_EN);
|
||||
SET_PERI_REG_MASK(HP_SYS_CLKRST_PERI_CLK_CTRL23_REG, HP_SYS_CLKRST_REG_ADC_CLK_EN);
|
||||
adc_ll_digi_clk_sel(ADC_DIGI_CLK_SRC_XTAL);
|
||||
adc_ll_digi_controller_clk_div(0, 0, 0);
|
||||
|
||||
SET_PERI_REG_MASK(RTCADC_MEAS1_MUX_REG, RTCADC_SAR1_DIG_FORCE);
|
||||
SET_PERI_REG_MASK(PMU_RF_PWC_REG,PMU_XPD_PERIF_I2C);
|
||||
|
||||
uint32_t sar1_clk_div_num = GET_PERI_REG_BITS2((HP_SYS_CLKRST_PERI_CLK_CTRL24_REG),
|
||||
(HP_SYS_CLKRST_REG_ADC_SAR1_CLK_DIV_NUM_M),
|
||||
(HP_SYS_CLKRST_REG_ADC_SAR1_CLK_DIV_NUM_S));
|
||||
|
||||
SET_PERI_REG_MASK(ADC_CTRL_REG_REG, ADC_START_FORCE); //start force 1
|
||||
// some ADC sensor registers are in power group PERIF_I2C and need to be enabled via PMU
|
||||
#ifndef BOOTLOADER_BUILD
|
||||
regi2c_saradc_enable();
|
||||
#else
|
||||
regi2c_ctrl_ll_i2c_sar_periph_enable();
|
||||
#endif
|
||||
|
||||
// enable analog i2c master clock for RNG runtime
|
||||
ANALOG_CLOCK_ENABLE();
|
||||
|
||||
adc1_fix_initcode_set(I2C_SAR_ADC_INIT_CODE_VAL);
|
||||
adc_ll_regi2c_init();
|
||||
adc_ll_set_calibration_param(ADC_UNIT_1, I2C_SAR_ADC_INIT_CODE_VAL);
|
||||
|
||||
// cfg pattern table
|
||||
sar1_table[0].item[0].channel = 10; //rand() % 6;
|
||||
sar1_table[0].item[0].atten = 3;
|
||||
sar1_table[0].item[1].channel = 10;
|
||||
sar1_table[0].item[1].atten = 3;
|
||||
sar1_table[0].item[2].channel = 10;
|
||||
sar1_table[0].item[2].atten = 3;
|
||||
sar1_table[0].item[3].channel = 10;
|
||||
sar1_table[0].item[3].atten = 3;
|
||||
adc_digi_pattern_config_t pattern_config = {};
|
||||
pattern_config.unit = ADC_UNIT_1;
|
||||
pattern_config.atten = ADC_ATTEN_DB_12;
|
||||
pattern_config.channel = ADC_CHANNEL_10;
|
||||
adc_ll_digi_set_pattern_table(ADC_UNIT_1, 0, pattern_config);
|
||||
adc_ll_digi_set_pattern_table(ADC_UNIT_1, 1, pattern_config);
|
||||
adc_ll_digi_set_pattern_table(ADC_UNIT_1, 2, pattern_config);
|
||||
adc_ll_digi_set_pattern_table(ADC_UNIT_1, 3, pattern_config);
|
||||
adc_ll_digi_set_pattern_table_len(ADC_UNIT_1, 1);
|
||||
|
||||
hpadc_sar1_pattern_table_cfg(0, sar1_table[0]);
|
||||
SET_PERI_REG_BITS(ADC_CTRL_REG_REG, ADC_SAR1_PATT_LEN, pattern_len, ADC_SAR1_PATT_LEN_S);
|
||||
adc_ll_set_controller(ADC_UNIT_1, ADC_LL_CTRL_DIG);
|
||||
adc_ll_digi_set_power_manage(ADC_UNIT_1, ADC_LL_POWER_SW_ON);
|
||||
|
||||
SET_PERI_REG_BITS(ADC_CTRL_REG_REG, ADC_XPD_SAR1_FORCE, 3, ADC_XPD_SAR1_FORCE_S);
|
||||
SET_PERI_REG_BITS(ADC_CTRL_REG_REG, ADC_XPD_SAR2_FORCE, 3, ADC_XPD_SAR2_FORCE_S);
|
||||
|
||||
REGI2C_WRITE_MASK(I2C_SAR_ADC, I2C_SAR_ADC_ENT_VDD_GRP1, 1);
|
||||
REGI2C_WRITE_MASK(I2C_SAR_ADC, I2C_SAR_ADC_DTEST_VDD_GRP1, 0);
|
||||
|
||||
CLEAR_PERI_REG_MASK(ADC_CTRL_REG_REG, ADC_START_FORCE);
|
||||
SET_PERI_REG_MASK(ADC_CTRL2_REG, ADC_TIMER_EN);
|
||||
SET_PERI_REG_BITS(ADC_CTRL2_REG, ADC_TIMER_TARGET, sar1_clk_div_num * 25, ADC_TIMER_TARGET_S);
|
||||
|
||||
while (GET_PERI_REG_MASK(ADC_INT_RAW_REG, ADC_SAR1_DONE_INT_RAW) == 0) { }
|
||||
|
||||
SET_PERI_REG_MASK(ADC_INT_CLR_REG, ADC_APB_SARADC1_DONE_INT_CLR);
|
||||
adc_ll_digi_set_clk_div(15);
|
||||
adc_ll_digi_set_trigger_interval(100);
|
||||
adc_ll_digi_trigger_enable();
|
||||
}
|
||||
|
||||
void bootloader_random_disable(void)
|
||||
{
|
||||
adc_ll_digi_trigger_disable();
|
||||
adc_ll_digi_reset_pattern_table();
|
||||
adc_ll_set_calibration_param(ADC_UNIT_1, 0x0);
|
||||
adc_ll_set_calibration_param(ADC_UNIT_2, 0x0);
|
||||
adc_ll_regi2c_adc_deinit();
|
||||
|
||||
#ifndef BOOTLOADER_BUILD
|
||||
regi2c_saradc_disable();
|
||||
#endif
|
||||
|
||||
// disable analog i2c master clock
|
||||
ANALOG_CLOCK_DISABLE();
|
||||
|
||||
REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SAR1_INITIAL_CODE_LOW_ADDR, 0);
|
||||
REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SAR1_INITIAL_CODE_HIGH_ADDR, 0);
|
||||
|
||||
REGI2C_WRITE_MASK(I2C_SAR_ADC, I2C_SAR_ADC_ENT_VDD_GRP1, 0);
|
||||
REGI2C_WRITE_MASK(I2C_SAR_ADC, I2C_SAR_ADC_DTEST_VDD_GRP1, 0);
|
||||
adc_ll_digi_controller_clk_div(4, 0, 0);
|
||||
adc_ll_digi_clk_sel(ADC_DIGI_CLK_SRC_XTAL);
|
||||
}
|
||||
|
||||
@@ -29,6 +29,15 @@ bootloader_sha256_handle_t bootloader_sha256_start()
|
||||
void bootloader_sha256_data(bootloader_sha256_handle_t handle, const void *data, size_t data_len)
|
||||
{
|
||||
assert(handle != NULL);
|
||||
|
||||
#if !SOC_SECURE_BOOT_V2_ECC
|
||||
/* For secure boot, the key field consists of 1 byte of curve identifier and 64 bytes of ECDSA public key.
|
||||
* While verifying the signature block, we need to calculate the SHA of this key field which is of 65 bytes.
|
||||
* ets_sha_update handles it cleanly so we can safely remove the check:
|
||||
*/
|
||||
assert(data_len % 4 == 0);
|
||||
#endif /* SOC_SECURE_BOOT_V2_ECC */
|
||||
|
||||
ets_sha_update(&ctx, data, data_len, false);
|
||||
}
|
||||
|
||||
@@ -42,33 +51,6 @@ void bootloader_sha256_finish(bootloader_sha256_handle_t handle, uint8_t *digest
|
||||
}
|
||||
ets_sha_finish(&ctx, digest);
|
||||
}
|
||||
|
||||
#if SOC_SHA_SUPPORT_SHA512
|
||||
bootloader_sha_handle_t bootloader_sha512_start(bool is384)
|
||||
{
|
||||
// Enable SHA hardware
|
||||
ets_sha_enable();
|
||||
ets_sha_init(&ctx, is384 ? SHA2_384 : SHA2_512);
|
||||
return &ctx; // Meaningless non-NULL value
|
||||
}
|
||||
|
||||
void bootloader_sha512_data(bootloader_sha_handle_t handle, const void *data, size_t data_len)
|
||||
{
|
||||
assert(handle != NULL);
|
||||
ets_sha_update(&ctx, data, data_len, false);
|
||||
}
|
||||
|
||||
void bootloader_sha512_finish(bootloader_sha_handle_t handle, uint8_t *digest)
|
||||
{
|
||||
assert(handle != NULL);
|
||||
|
||||
if (digest == NULL) {
|
||||
bzero(&ctx, sizeof(ctx));
|
||||
return;
|
||||
}
|
||||
ets_sha_finish(&ctx, digest);
|
||||
}
|
||||
#endif /* SOC_SHA_SUPPORT_SHA512 */
|
||||
#else /* !CONFIG_IDF_TARGET_ESP32 */
|
||||
|
||||
#include "soc/dport_reg.h"
|
||||
@@ -180,7 +162,6 @@ void bootloader_sha256_finish(bootloader_sha256_handle_t handle, uint8_t *digest
|
||||
|
||||
#include "bootloader_flash_priv.h"
|
||||
#include <mbedtls/sha256.h>
|
||||
#include <mbedtls/sha512.h>
|
||||
|
||||
bootloader_sha256_handle_t bootloader_sha256_start(void)
|
||||
{
|
||||
@@ -218,43 +199,4 @@ void bootloader_sha256_finish(bootloader_sha256_handle_t handle, uint8_t *digest
|
||||
free(handle);
|
||||
handle = NULL;
|
||||
}
|
||||
|
||||
#if SOC_SHA_SUPPORT_SHA512
|
||||
bootloader_sha_handle_t bootloader_sha512_start(bool is384)
|
||||
{
|
||||
mbedtls_sha512_context *ctx = (mbedtls_sha512_context *)malloc(sizeof(mbedtls_sha512_context));
|
||||
if (!ctx) {
|
||||
return NULL;
|
||||
}
|
||||
mbedtls_sha512_init(ctx);
|
||||
int ret = mbedtls_sha512_starts(ctx, is384);
|
||||
if (ret != 0) {
|
||||
return NULL;
|
||||
}
|
||||
return ctx;
|
||||
}
|
||||
|
||||
void bootloader_sha512_data(bootloader_sha_handle_t handle, const void *data, size_t data_len)
|
||||
{
|
||||
assert(handle != NULL);
|
||||
mbedtls_sha512_context *ctx = (mbedtls_sha512_context *)handle;
|
||||
int ret = mbedtls_sha512_update(ctx, data, data_len);
|
||||
assert(ret == 0);
|
||||
(void)ret;
|
||||
}
|
||||
|
||||
void bootloader_sha512_finish(bootloader_sha_handle_t handle, uint8_t *digest)
|
||||
{
|
||||
assert(handle != NULL);
|
||||
mbedtls_sha512_context *ctx = (mbedtls_sha512_context *)handle;
|
||||
if (digest != NULL) {
|
||||
int ret = mbedtls_sha512_finish(ctx, digest);
|
||||
assert(ret == 0);
|
||||
(void)ret;
|
||||
}
|
||||
mbedtls_sha512_free(ctx);
|
||||
free(handle);
|
||||
handle = NULL;
|
||||
}
|
||||
#endif /* SOC_SHA_SUPPORT_SHA512 */
|
||||
#endif /* !(NON_OS_BUILD || CONFIG_APP_BUILD_TYPE_RAM) */
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2018-2025 Espressif Systems (Shanghai) CO LTD
|
||||
* SPDX-FileCopyrightText: 2018-2024 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
@@ -30,7 +30,6 @@
|
||||
#include "hal/cache_types.h"
|
||||
#include "hal/cache_ll.h"
|
||||
#include "hal/cache_hal.h"
|
||||
#include "hal/sha_types.h"
|
||||
|
||||
#include "esp_cpu.h"
|
||||
#include "esp_image_format.h"
|
||||
@@ -718,7 +717,25 @@ static void load_image(const esp_image_metadata_t *image_data)
|
||||
*/
|
||||
ESP_LOGI(TAG, "Checking flash encryption...");
|
||||
bool flash_encryption_enabled = esp_flash_encrypt_state();
|
||||
if (!flash_encryption_enabled) {
|
||||
if (flash_encryption_enabled) {
|
||||
#if BOOTLOADER_BUILD
|
||||
/* Ensure security eFuses are burnt */
|
||||
esp_efuse_batch_write_begin();
|
||||
esp_err_t err = esp_flash_encryption_enable_secure_features();
|
||||
if (err != ESP_OK) {
|
||||
ESP_LOGE(TAG, "Error setting security eFuses (err=0x%x).", err);
|
||||
esp_efuse_batch_write_cancel();
|
||||
return;
|
||||
}
|
||||
|
||||
err = esp_efuse_batch_write_commit();
|
||||
if (err != ESP_OK) {
|
||||
ESP_LOGE(TAG, "Error programming security eFuses (err=0x%x).", err);
|
||||
return;
|
||||
}
|
||||
ESP_LOGI(TAG, "Security eFuses are burnt");
|
||||
#endif // BOOTLOADER_BUILD
|
||||
} else {
|
||||
#ifdef CONFIG_SECURE_FLASH_REQUIRE_ALREADY_ENABLED
|
||||
ESP_LOGE(TAG, "flash encryption is not enabled, and SECURE_FLASH_REQUIRE_ALREADY_ENABLED is set, refusing to boot.");
|
||||
return;
|
||||
@@ -1214,29 +1231,18 @@ void bootloader_debug_buffer(const void *buffer, size_t length, const char *labe
|
||||
#endif
|
||||
}
|
||||
|
||||
static esp_err_t bootloader_sha_flash_contents(esp_sha_type type, uint32_t flash_offset, uint32_t len, uint8_t *digest)
|
||||
esp_err_t bootloader_sha256_flash_contents(uint32_t flash_offset, uint32_t len, uint8_t *digest)
|
||||
{
|
||||
|
||||
if (digest == NULL) {
|
||||
return ESP_ERR_INVALID_ARG;
|
||||
}
|
||||
|
||||
/* Handling firmware images larger than MMU capacity */
|
||||
uint32_t mmu_free_pages_count = bootloader_mmap_get_free_pages();
|
||||
bootloader_sha_handle_t sha_handle = NULL;
|
||||
|
||||
if (type == SHA2_256) {
|
||||
sha_handle = bootloader_sha256_start();
|
||||
} else
|
||||
// Using SOC_ECDSA_SUPPORT_CURVE_P384 here so that there is no flash size impact in the case of existing targets like ESP32.
|
||||
#if SOC_SHA_SUPPORT_SHA384 && SOC_ECDSA_SUPPORT_CURVE_P384
|
||||
if (type == SHA2_384) {
|
||||
sha_handle = bootloader_sha512_start(true);
|
||||
} else
|
||||
#endif /* SOC_SHA_SUPPORT_SHA384 && SOC_ECDSA_SUPPORT_CURVE_P384 */
|
||||
{
|
||||
return ESP_ERR_INVALID_ARG;
|
||||
}
|
||||
bootloader_sha256_handle_t sha_handle = NULL;
|
||||
|
||||
sha_handle = bootloader_sha256_start();
|
||||
if (sha_handle == NULL) {
|
||||
return ESP_ERR_NO_MEM;
|
||||
}
|
||||
@@ -1246,14 +1252,7 @@ static esp_err_t bootloader_sha_flash_contents(esp_sha_type type, uint32_t flash
|
||||
uint32_t max_pages = (mmu_free_pages_count > mmu_page_offset) ? (mmu_free_pages_count - mmu_page_offset) : 0;
|
||||
if (max_pages == 0) {
|
||||
ESP_LOGE(TAG, "No free MMU pages are available");
|
||||
if (type == SHA2_256) {
|
||||
bootloader_sha256_finish(sha_handle, NULL);
|
||||
}
|
||||
#if SOC_SHA_SUPPORT_SHA384 && SOC_ECDSA_SUPPORT_CURVE_P384
|
||||
else if (type == SHA2_384) {
|
||||
bootloader_sha512_finish(sha_handle, NULL);
|
||||
}
|
||||
#endif /* SOC_SHA_SUPPORT_SHA384 && SOC_ECDSA_SUPPORT_CURVE_P384 */
|
||||
bootloader_sha256_finish(sha_handle, NULL);
|
||||
return ESP_ERR_NO_MEM;
|
||||
}
|
||||
uint32_t max_image_len;
|
||||
@@ -1264,51 +1263,15 @@ static esp_err_t bootloader_sha_flash_contents(esp_sha_type type, uint32_t flash
|
||||
|
||||
const void * image = bootloader_mmap(flash_offset, partial_image_len);
|
||||
if (image == NULL) {
|
||||
if (type == SHA2_256) {
|
||||
bootloader_sha256_finish(sha_handle, NULL);
|
||||
}
|
||||
#if SOC_SHA_SUPPORT_SHA384 && SOC_ECDSA_SUPPORT_CURVE_P384
|
||||
else if (type == SHA2_384) {
|
||||
bootloader_sha512_finish(sha_handle, NULL);
|
||||
}
|
||||
#endif /* SOC_SHA_SUPPORT_SHA384 && SOC_ECDSA_SUPPORT_CURVE_P384 */
|
||||
bootloader_sha256_finish(sha_handle, NULL);
|
||||
return ESP_FAIL;
|
||||
}
|
||||
|
||||
if (type == SHA2_256) {
|
||||
bootloader_sha256_data(sha_handle, image, partial_image_len);
|
||||
}
|
||||
#if SOC_SHA_SUPPORT_SHA384 && SOC_ECDSA_SUPPORT_CURVE_P384
|
||||
else if (type == SHA2_384) {
|
||||
bootloader_sha512_data(sha_handle, image, partial_image_len);
|
||||
}
|
||||
#endif /* SOC_SHA_SUPPORT_SHA384 && SOC_ECDSA_SUPPORT_CURVE_P384 */
|
||||
|
||||
bootloader_sha256_data(sha_handle, image, partial_image_len);
|
||||
bootloader_munmap(image);
|
||||
|
||||
flash_offset += partial_image_len;
|
||||
len -= partial_image_len;
|
||||
}
|
||||
|
||||
if (type == SHA2_256) {
|
||||
bootloader_sha256_finish(sha_handle, digest);
|
||||
}
|
||||
#if SOC_SHA_SUPPORT_SHA384 && SOC_ECDSA_SUPPORT_CURVE_P384
|
||||
else if (type == SHA2_384) {
|
||||
bootloader_sha512_finish(sha_handle, digest);
|
||||
}
|
||||
#endif /* SOC_SHA_SUPPORT_SHA384 && SOC_ECDSA_SUPPORT_CURVE_P384 */
|
||||
bootloader_sha256_finish(sha_handle, digest);
|
||||
return ESP_OK;
|
||||
}
|
||||
|
||||
esp_err_t bootloader_sha256_flash_contents(uint32_t flash_offset, uint32_t len, uint8_t *digest)
|
||||
{
|
||||
return bootloader_sha_flash_contents(SHA2_256, flash_offset, len, digest);
|
||||
}
|
||||
|
||||
#if SOC_SHA_SUPPORT_SHA384 && SOC_ECDSA_SUPPORT_CURVE_P384
|
||||
esp_err_t bootloader_sha384_flash_contents(uint32_t flash_offset, uint32_t len, uint8_t *digest)
|
||||
{
|
||||
return bootloader_sha_flash_contents(SHA2_384, flash_offset, len, digest);
|
||||
}
|
||||
#endif /* SOC_SHA_SUPPORT_SHA384 && SOC_ECDSA_SUPPORT_CURVE_P384 */
|
||||
|
||||
@@ -167,7 +167,7 @@ esp_err_t bootloader_init(void)
|
||||
|
||||
#if XCHAL_ERRATUM_572
|
||||
uint32_t memctl = XCHAL_CACHE_MEMCTL_DEFAULT;
|
||||
WSR(MEMCTL, memctl);
|
||||
WSR(XT_REG_MEMCTL, memctl);
|
||||
#endif // XCHAL_ERRATUM_572
|
||||
|
||||
// In RAM_APP, memory will be initialized in `call_start_cpu0`
|
||||
|
||||
@@ -86,7 +86,6 @@ static void bootloader_super_wdt_auto_feed(void)
|
||||
static inline void bootloader_hardware_init(void)
|
||||
{
|
||||
_regi2c_ctrl_ll_master_enable_clock(true); // keep ana i2c mst clock always enabled in bootloader
|
||||
regi2c_ctrl_ll_master_force_enable_clock(true); // TODO: IDF-8667 Remove this?
|
||||
regi2c_ctrl_ll_master_configure_clock();
|
||||
}
|
||||
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
|
||||
* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
@@ -71,9 +71,12 @@ esp_err_t esp_flash_encryption_enable_secure_features(void)
|
||||
|
||||
esp_err_t esp_flash_encryption_enable_key_mgr(void)
|
||||
{
|
||||
_key_mgr_ll_enable_bus_clock(true);
|
||||
_key_mgr_ll_enable_peripheral_clock(true);
|
||||
_key_mgr_ll_reset_register();
|
||||
// Enable and reset key manager
|
||||
// To suppress build errors about spinlock's __DECLARE_RCC_ATOMIC_ENV
|
||||
int __DECLARE_RCC_ATOMIC_ENV __attribute__ ((unused));
|
||||
key_mgr_ll_enable_bus_clock(true);
|
||||
key_mgr_ll_enable_peripheral_clock(true);
|
||||
key_mgr_ll_reset_register();
|
||||
|
||||
while (key_mgr_ll_get_state() != ESP_KEY_MGR_STATE_IDLE) {
|
||||
};
|
||||
|
||||
@@ -49,12 +49,6 @@ esp_err_t esp_secure_boot_enable_secure_features(void)
|
||||
esp_efuse_write_field_bit(ESP_EFUSE_SECURE_BOOT_AGGRESSIVE_REVOKE);
|
||||
#endif
|
||||
|
||||
#if CONFIG_SECURE_BOOT_ECDSA_KEY_LEN_384_BITS
|
||||
esp_efuse_write_field_bit(ESP_EFUSE_SECURE_BOOT_SHA384_EN);
|
||||
#endif
|
||||
|
||||
esp_efuse_write_field_bit(ESP_EFUSE_WR_DIS_SECURE_BOOT_SHA384_EN);
|
||||
|
||||
esp_efuse_write_field_bit(ESP_EFUSE_SECURE_BOOT_EN);
|
||||
|
||||
#ifndef CONFIG_SECURE_BOOT_V2_ALLOW_EFUSE_RD_DIS
|
||||
|
||||
@@ -87,7 +87,6 @@ static void bootloader_super_wdt_auto_feed(void)
|
||||
static inline void bootloader_hardware_init(void)
|
||||
{
|
||||
_regi2c_ctrl_ll_master_enable_clock(true); // keep ana i2c mst clock always enabled in bootloader
|
||||
regi2c_ctrl_ll_master_force_enable_clock(true); // TODO: IDF-9274 Remove this?
|
||||
regi2c_ctrl_ll_master_configure_clock();
|
||||
}
|
||||
|
||||
|
||||
@@ -89,8 +89,7 @@ static inline void bootloader_hardware_init(void)
|
||||
CLEAR_PERI_REG_MASK(PMU_RF_PWC_REG, PMU_XPD_RFPLL);
|
||||
SET_PERI_REG_MASK(PMU_RF_PWC_REG, PMU_XPD_FORCE_RFPLL);
|
||||
|
||||
//TODO: [ESP32H21] IDF-11550, regi2c atomic clock
|
||||
regi2c_ctrl_ll_master_enable_clock(true); // keep ana i2c mst clock always enabled in bootloader
|
||||
_regi2c_ctrl_ll_master_enable_clock(true); // keep ana i2c mst clock always enabled in bootloader
|
||||
regi2c_ctrl_ll_master_configure_clock();
|
||||
}
|
||||
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
|
||||
* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
@@ -53,9 +53,12 @@ esp_err_t esp_flash_encryption_enable_secure_features(void)
|
||||
|
||||
esp_err_t esp_flash_encryption_enable_key_mgr(void)
|
||||
{
|
||||
_key_mgr_ll_enable_bus_clock(true);
|
||||
_key_mgr_ll_enable_peripheral_clock(true);
|
||||
_key_mgr_ll_reset_register();
|
||||
// Enable and reset key manager
|
||||
// To suppress build errors about spinlock's __DECLARE_RCC_ATOMIC_ENV
|
||||
int __DECLARE_RCC_ATOMIC_ENV __attribute__ ((unused));
|
||||
key_mgr_ll_enable_bus_clock(true);
|
||||
key_mgr_ll_enable_peripheral_clock(true);
|
||||
key_mgr_ll_reset_register();
|
||||
|
||||
while (key_mgr_ll_get_state() != ESP_KEY_MGR_STATE_IDLE) {
|
||||
};
|
||||
|
||||
@@ -144,7 +144,7 @@ esp_err_t bootloader_init(void)
|
||||
|
||||
#if XCHAL_ERRATUM_572
|
||||
uint32_t memctl = XCHAL_CACHE_MEMCTL_DEFAULT;
|
||||
WSR(MEMCTL, memctl);
|
||||
WSR(XT_REG_MEMCTL, memctl);
|
||||
#endif // XCHAL_ERRATUM_572
|
||||
|
||||
bootloader_ana_reset_config();
|
||||
|
||||
@@ -105,6 +105,7 @@ static esp_err_t verify_segment_header(int index, const esp_image_segment_header
|
||||
static esp_err_t process_image_header(esp_image_metadata_t *data, uint32_t part_offset, bootloader_sha256_handle_t *sha_handle, bool do_verify, bool silent);
|
||||
static esp_err_t process_appended_hash_and_sig(esp_image_metadata_t *data, uint32_t part_offset, uint32_t part_len, bool do_verify, bool silent);
|
||||
static esp_err_t process_checksum(bootloader_sha256_handle_t sha_handle, uint32_t checksum_word, esp_image_metadata_t *data, bool silent, bool skip_check_checksum);
|
||||
|
||||
static esp_err_t __attribute__((unused)) verify_secure_boot_signature(bootloader_sha256_handle_t sha_handle, esp_image_metadata_t *data, uint8_t *image_digest, uint8_t *verified_digest);
|
||||
static esp_err_t __attribute__((unused)) verify_simple_hash(bootloader_sha256_handle_t sha_handle, esp_image_metadata_t *data);
|
||||
|
||||
@@ -159,8 +160,8 @@ static esp_err_t image_load(esp_image_load_mode_t mode, const esp_partition_pos_
|
||||
bool verify_sha;
|
||||
#if (SECURE_BOOT_CHECK_SIGNATURE == 1)
|
||||
/* used for anti-FI checks */
|
||||
uint8_t image_digest[ESP_SECURE_BOOT_DIGEST_LEN] = { [ 0 ... ESP_SECURE_BOOT_DIGEST_LEN - 1 ] = 0xEE };
|
||||
uint8_t verified_digest[ESP_SECURE_BOOT_DIGEST_LEN] = { [ 0 ... ESP_SECURE_BOOT_DIGEST_LEN - 1 ] = 0x01 };
|
||||
uint8_t image_digest[HASH_LEN] = { [ 0 ... 31] = 0xEE };
|
||||
uint8_t verified_digest[HASH_LEN] = { [ 0 ... 31 ] = 0x01 };
|
||||
#endif
|
||||
|
||||
if (data == NULL || part == NULL) {
|
||||
@@ -236,7 +237,7 @@ static esp_err_t image_load(esp_image_load_mode_t mode, const esp_partition_pos_
|
||||
"only verify signature in bootloader" into the macro so it's tested multiple times.
|
||||
*/
|
||||
#if CONFIG_SECURE_BOOT_V2_ENABLED
|
||||
ESP_FAULT_ASSERT(!esp_secure_boot_enabled() || memcmp(image_digest, verified_digest, ESP_SECURE_BOOT_DIGEST_LEN) == 0);
|
||||
ESP_FAULT_ASSERT(!esp_secure_boot_enabled() || memcmp(image_digest, verified_digest, HASH_LEN) == 0);
|
||||
#else // Secure Boot V1 on ESP32, only verify signatures for apps not bootloaders
|
||||
ESP_FAULT_ASSERT(is_bootloader(data->start_addr) || memcmp(image_digest, verified_digest, HASH_LEN) == 0);
|
||||
#endif
|
||||
@@ -1022,14 +1023,43 @@ err:
|
||||
return err;
|
||||
}
|
||||
|
||||
#if (SECURE_BOOT_CHECK_SIGNATURE == 1)
|
||||
static esp_err_t verify_signature_and_adjust_image_len(esp_image_metadata_t *data, uint32_t end, uint8_t *image_digest, uint8_t *verified_digest)
|
||||
static esp_err_t verify_secure_boot_signature(bootloader_sha256_handle_t sha_handle, esp_image_metadata_t *data, uint8_t *image_digest, uint8_t *verified_digest)
|
||||
{
|
||||
#if (SECURE_BOOT_CHECK_SIGNATURE == 1)
|
||||
uint32_t end = data->start_addr + data->image_len;
|
||||
|
||||
ESP_LOGI(TAG, "Verifying image signature...");
|
||||
|
||||
// For secure boot, we calculate the signature hash over the whole file, which includes any "simple" hash
|
||||
// appended to the image for corruption detection
|
||||
if (data->image.hash_appended) {
|
||||
const void *simple_hash = bootloader_mmap(end - HASH_LEN, HASH_LEN);
|
||||
bootloader_sha256_data(sha_handle, simple_hash, HASH_LEN);
|
||||
bootloader_munmap(simple_hash);
|
||||
}
|
||||
|
||||
#if CONFIG_SECURE_SIGNED_APPS_RSA_SCHEME || CONFIG_SECURE_SIGNED_APPS_ECDSA_V2_SCHEME
|
||||
// End of the image needs to be padded all the way to a 4KB boundary, after the simple hash
|
||||
// (for apps they are usually already padded due to --secure-pad-v2, only a problem if this option was not used.)
|
||||
uint32_t padded_end = ALIGN_UP(end, FLASH_SECTOR_SIZE);
|
||||
if (padded_end > end) {
|
||||
const void *padding = bootloader_mmap(end, padded_end - end);
|
||||
bootloader_sha256_data(sha_handle, padding, padded_end - end);
|
||||
bootloader_munmap(padding);
|
||||
end = padded_end;
|
||||
}
|
||||
#endif // CONFIG_SECURE_SIGNED_APPS_RSA_SCHEME || CONFIG_SECURE_SIGNED_APPS_ECDSA_V2_SCHEME
|
||||
|
||||
bootloader_sha256_finish(sha_handle, image_digest);
|
||||
|
||||
// Log the hash for debugging
|
||||
bootloader_debug_buffer(image_digest, HASH_LEN, "Calculated secure boot hash");
|
||||
|
||||
// Use hash to verify signature block
|
||||
esp_err_t err = ESP_ERR_IMAGE_INVALID;
|
||||
#if CONFIG_SECURE_BOOT || CONFIG_SECURE_SIGNED_APPS_NO_SECURE_BOOT
|
||||
const void *sig_block;
|
||||
ESP_FAULT_ASSERT(memcmp(image_digest, verified_digest, ESP_SECURE_BOOT_DIGEST_LEN) != 0); /* sanity check that these values start differently */
|
||||
ESP_FAULT_ASSERT(memcmp(image_digest, verified_digest, HASH_LEN) != 0); /* sanity check that these values start differently */
|
||||
#if defined(CONFIG_SECURE_SIGNED_APPS_ECDSA_SCHEME)
|
||||
sig_block = bootloader_mmap(data->start_addr + data->image_len, sizeof(esp_secure_boot_sig_block_t));
|
||||
err = esp_secure_boot_verify_ecdsa_signature_block(sig_block, image_digest, verified_digest);
|
||||
@@ -1046,7 +1076,7 @@ static esp_err_t verify_signature_and_adjust_image_len(esp_image_metadata_t *dat
|
||||
ESP_LOGI(TAG, "Calculating simple hash to check for corruption...");
|
||||
const void *whole_image = bootloader_mmap(data->start_addr, data->image_len - HASH_LEN);
|
||||
if (whole_image != NULL) {
|
||||
bootloader_sha256_handle_t sha_handle = bootloader_sha256_start();
|
||||
sha_handle = bootloader_sha256_start();
|
||||
bootloader_sha256_data(sha_handle, whole_image, data->image_len - HASH_LEN);
|
||||
bootloader_munmap(whole_image);
|
||||
if (verify_simple_hash(sha_handle, data) != ESP_OK) {
|
||||
@@ -1067,64 +1097,6 @@ static esp_err_t verify_signature_and_adjust_image_len(esp_image_metadata_t *dat
|
||||
}
|
||||
#endif
|
||||
|
||||
return ESP_OK;
|
||||
}
|
||||
#endif /* SECURE_BOOT_CHECK_SIGNATURE */
|
||||
|
||||
static esp_err_t verify_secure_boot_signature(bootloader_sha256_handle_t sha_handle, esp_image_metadata_t *data, uint8_t *image_digest, uint8_t *verified_digest)
|
||||
{
|
||||
#if (SECURE_BOOT_CHECK_SIGNATURE == 1)
|
||||
uint32_t end = data->start_addr + data->image_len;
|
||||
|
||||
ESP_LOGI(TAG, "Verifying image signature...");
|
||||
|
||||
#if CONFIG_SECURE_BOOT_ECDSA_KEY_LEN_384_BITS
|
||||
(void) sha_handle;
|
||||
/* Re-calculating image digest using SHA384 */
|
||||
const void *image_data = bootloader_mmap(data->start_addr, data->image_len - HASH_LEN);
|
||||
bootloader_sha_handle_t sha384_handle = bootloader_sha512_start(true);
|
||||
bootloader_sha512_data(sha384_handle, image_data, data->image_len - HASH_LEN);
|
||||
bootloader_munmap(image_data);
|
||||
#endif
|
||||
|
||||
// For secure boot, we calculate the signature hash over the whole file, which includes any "simple" hash
|
||||
// appended to the image for corruption detection
|
||||
if (data->image.hash_appended) {
|
||||
const void *simple_hash = bootloader_mmap(end - HASH_LEN, HASH_LEN);
|
||||
#if CONFIG_SECURE_BOOT_ECDSA_KEY_LEN_384_BITS
|
||||
bootloader_sha512_data(sha384_handle, simple_hash, HASH_LEN);
|
||||
#else
|
||||
bootloader_sha256_data(sha_handle, simple_hash, HASH_LEN);
|
||||
#endif
|
||||
bootloader_munmap(simple_hash);
|
||||
}
|
||||
|
||||
#if CONFIG_SECURE_SIGNED_APPS_RSA_SCHEME || CONFIG_SECURE_SIGNED_APPS_ECDSA_V2_SCHEME
|
||||
// End of the image needs to be padded all the way to a 4KB boundary, after the simple hash
|
||||
// (for apps they are usually already padded due to --secure-pad-v2, only a problem if this option was not used.)
|
||||
uint32_t padded_end = ALIGN_UP(end, FLASH_SECTOR_SIZE);
|
||||
if (padded_end > end) {
|
||||
const void *padding = bootloader_mmap(end, padded_end - end);
|
||||
#if CONFIG_SECURE_BOOT_ECDSA_KEY_LEN_384_BITS
|
||||
bootloader_sha512_data(sha384_handle, padding, padded_end - end);
|
||||
#else
|
||||
bootloader_sha256_data(sha_handle, padding, padded_end - end);
|
||||
#endif
|
||||
bootloader_munmap(padding);
|
||||
end = padded_end;
|
||||
}
|
||||
#endif // CONFIG_SECURE_SIGNED_APPS_RSA_SCHEME || CONFIG_SECURE_SIGNED_APPS_ECDSA_V2_SCHEME
|
||||
|
||||
#if CONFIG_SECURE_BOOT_ECDSA_KEY_LEN_384_BITS
|
||||
bootloader_sha512_finish(sha384_handle, image_digest);
|
||||
#else
|
||||
bootloader_sha256_finish(sha_handle, image_digest);
|
||||
#endif
|
||||
|
||||
// Log the hash for debugging
|
||||
bootloader_debug_buffer(image_digest, ESP_SECURE_BOOT_DIGEST_LEN, "Calculated secure boot hash");
|
||||
|
||||
return verify_signature_and_adjust_image_len(data, end, image_digest, verified_digest);
|
||||
#endif // SECURE_BOOT_CHECK_SIGNATURE
|
||||
return ESP_OK;
|
||||
}
|
||||
|
||||
@@ -427,19 +427,7 @@ bool esp_secure_boot_cfg_verify_release_mode(void)
|
||||
#endif
|
||||
}
|
||||
}
|
||||
|
||||
#if SOC_ECDSA_SUPPORT_CURVE_P384
|
||||
/* When using Secure Boot with SHA-384, the efuse bit representing Secure Boot with SHA-384 would already be programmed.
|
||||
* But in the case of the existing Secure Boot V2 schemes using SHA-256, the efuse bit representing
|
||||
* Secure Boot with SHA-384 needs to be write-protected, so that an attacker cannot perform a denial-of-service
|
||||
* attack by changing the existing secure boot mode using SHA-256 to SHA-384.
|
||||
*/
|
||||
secure = esp_efuse_read_field_bit(ESP_EFUSE_WR_DIS_SECURE_BOOT_SHA384_EN);
|
||||
result &= secure;
|
||||
if (!secure) {
|
||||
ESP_LOGW(TAG, "Not write-protected secure boot using SHA-384 mode (set WR_DIS_SECURE_BOOT_SHA384_EN->1)");
|
||||
}
|
||||
#endif
|
||||
|
||||
secure = (num_keys != 0);
|
||||
result &= secure;
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
|
||||
* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
@@ -69,21 +69,16 @@ static esp_err_t validate_signature_block(const ets_secure_boot_sig_block_t *blo
|
||||
*/
|
||||
static esp_err_t s_calculate_image_public_key_digests(uint32_t flash_offset, uint32_t flash_size, esp_image_sig_public_key_digests_t *public_key_digests)
|
||||
{
|
||||
esp_err_t ret = ESP_FAIL;
|
||||
esp_err_t ret;
|
||||
uint8_t image_digest[ESP_SECURE_BOOT_DIGEST_LEN] = {0};
|
||||
uint8_t __attribute__((aligned(4))) key_digest[ESP_SECURE_BOOT_KEY_DIGEST_SHA_256_LEN] = {0};
|
||||
uint8_t __attribute__((aligned(4))) key_digest[ESP_SECURE_BOOT_DIGEST_LEN] = {0};
|
||||
size_t sig_block_addr = flash_offset + ALIGN_UP(flash_size, FLASH_SECTOR_SIZE);
|
||||
|
||||
ESP_LOGD(TAG, "calculating public key digests for sig blocks of image offset 0x%" PRIx32 " (sig block offset 0x%x)", flash_offset, sig_block_addr);
|
||||
|
||||
bzero(public_key_digests, sizeof(esp_image_sig_public_key_digests_t));
|
||||
|
||||
#if CONFIG_SECURE_BOOT_ECDSA_KEY_LEN_384_BITS
|
||||
ret = bootloader_sha384_flash_contents(flash_offset, sig_block_addr - flash_offset, image_digest);
|
||||
#else
|
||||
ret = bootloader_sha256_flash_contents(flash_offset, sig_block_addr - flash_offset, image_digest);
|
||||
#endif
|
||||
|
||||
if (ret != ESP_OK) {
|
||||
ESP_LOGE(TAG, "error generating image digest, %d", ret);
|
||||
return ret;
|
||||
@@ -134,7 +129,7 @@ static esp_err_t s_calculate_image_public_key_digests(uint32_t flash_offset, uin
|
||||
}
|
||||
ESP_LOGD(TAG, "Signature block (%d) is verified", i);
|
||||
/* Copy the key digest to the buffer provided by the caller */
|
||||
memcpy((void *)public_key_digests->key_digests[i], key_digest, ESP_SECURE_BOOT_KEY_DIGEST_SHA_256_LEN);
|
||||
memcpy((void *)public_key_digests->key_digests[i], key_digest, ESP_SECURE_BOOT_DIGEST_LEN);
|
||||
public_key_digests->num_digests++;
|
||||
}
|
||||
|
||||
@@ -322,7 +317,7 @@ static esp_err_t check_and_generate_secure_boot_keys(const esp_image_metadata_t
|
||||
}
|
||||
|
||||
for (unsigned j = 0; j < tee_key_digests.num_digests; j++) {
|
||||
if (!memcmp(boot_key_digests.key_digests[i], tee_key_digests.key_digests[j], ESP_SECURE_BOOT_KEY_DIGEST_LEN)) {
|
||||
if (!memcmp(boot_key_digests.key_digests[i], tee_key_digests.key_digests[j], ESP_SECURE_BOOT_DIGEST_LEN)) {
|
||||
ESP_LOGI(TAG, "TEE key(%d) matches with bootloader key(%d).", j, i);
|
||||
tee_match = true;
|
||||
}
|
||||
|
||||
@@ -73,7 +73,7 @@ static esp_err_t calculate_image_public_key_digests(bool verify_image_digest, bo
|
||||
}
|
||||
|
||||
uint8_t image_digest[ESP_SECURE_BOOT_DIGEST_LEN] = {0};
|
||||
uint8_t __attribute__((aligned(4))) key_digest[ESP_SECURE_BOOT_KEY_DIGEST_SHA_256_LEN] = {0};
|
||||
uint8_t __attribute__((aligned(4))) key_digest[ESP_SECURE_BOOT_DIGEST_LEN] = {0};
|
||||
size_t sig_block_addr = img_metadata.start_addr + ALIGN_UP(img_metadata.image_len, FLASH_SECTOR_SIZE);
|
||||
|
||||
ESP_LOGD(TAG, "calculating public key digests for sig blocks of image offset 0x%"PRIu32" (sig block offset 0x%u)", img_metadata.start_addr, sig_block_addr);
|
||||
@@ -81,11 +81,7 @@ static esp_err_t calculate_image_public_key_digests(bool verify_image_digest, bo
|
||||
bzero(public_key_digests, sizeof(esp_image_sig_public_key_digests_t));
|
||||
|
||||
if (verify_image_digest) {
|
||||
#if CONFIG_SECURE_BOOT_ECDSA_KEY_LEN_384_BITS
|
||||
ret = bootloader_sha384_flash_contents(img_metadata.start_addr, sig_block_addr - img_metadata.start_addr, image_digest);
|
||||
#else
|
||||
ret = bootloader_sha256_flash_contents(img_metadata.start_addr, sig_block_addr - img_metadata.start_addr, image_digest);
|
||||
#endif
|
||||
if (ret != ESP_OK) {
|
||||
ESP_LOGE(TAG, "error generating image digest, %d", ret);
|
||||
return ret;
|
||||
@@ -122,7 +118,7 @@ static esp_err_t calculate_image_public_key_digests(bool verify_image_digest, bo
|
||||
ESP_LOGD(TAG, "Signature block (%d) is verified", i);
|
||||
}
|
||||
/* Copy the key digest to the buffer provided by the caller */
|
||||
memcpy((void *)public_key_digests->key_digests[public_key_digests->num_digests], key_digest, ESP_SECURE_BOOT_KEY_DIGEST_SHA_256_LEN);
|
||||
memcpy((void *)public_key_digests->key_digests[public_key_digests->num_digests], key_digest, ESP_SECURE_BOOT_DIGEST_LEN);
|
||||
}
|
||||
public_key_digests->num_digests++;
|
||||
}
|
||||
@@ -188,19 +184,14 @@ static esp_err_t get_secure_boot_key_digests(esp_image_sig_public_key_digests_t
|
||||
|
||||
esp_err_t esp_secure_boot_verify_signature(uint32_t src_addr, uint32_t length)
|
||||
{
|
||||
esp_err_t err = ESP_FAIL;
|
||||
uint8_t digest[ESP_SECURE_BOOT_DIGEST_LEN] = {0};
|
||||
uint8_t digest[ESP_SECURE_BOOT_KEY_DIGEST_LEN] = {0};
|
||||
uint8_t verified_digest[ESP_SECURE_BOOT_KEY_DIGEST_LEN] = {0};
|
||||
|
||||
/* Rounding off length to the upper 4k boundary */
|
||||
uint32_t padded_length = ALIGN_UP(length, FLASH_SECTOR_SIZE);
|
||||
ESP_LOGD(TAG, "verifying signature src_addr 0x%"PRIx32" length 0x%"PRIx32, src_addr, length);
|
||||
|
||||
#if CONFIG_SECURE_BOOT_ECDSA_KEY_LEN_384_BITS
|
||||
err = bootloader_sha384_flash_contents(src_addr, padded_length, digest);
|
||||
#else
|
||||
err = bootloader_sha256_flash_contents(src_addr, padded_length, digest);
|
||||
#endif
|
||||
|
||||
esp_err_t err = bootloader_sha256_flash_contents(src_addr, padded_length, digest);
|
||||
if (err != ESP_OK) {
|
||||
ESP_LOGE(TAG, "Digest calculation failed 0x%"PRIx32", 0x%"PRIx32, src_addr, padded_length);
|
||||
return err;
|
||||
@@ -212,7 +203,7 @@ esp_err_t esp_secure_boot_verify_signature(uint32_t src_addr, uint32_t length)
|
||||
return ESP_FAIL;
|
||||
}
|
||||
|
||||
err = esp_secure_boot_verify_sbv2_signature_block(sig_block, digest, NULL);
|
||||
err = esp_secure_boot_verify_sbv2_signature_block(sig_block, digest, verified_digest);
|
||||
if (err != ESP_OK) {
|
||||
ESP_LOGE(TAG, "Secure Boot V2 verification failed.");
|
||||
}
|
||||
@@ -227,11 +218,9 @@ esp_err_t esp_secure_boot_verify_sbv2_signature_block(const ets_secure_boot_sign
|
||||
{
|
||||
bool any_trusted_key = false;
|
||||
|
||||
if (verified_digest != NULL) {
|
||||
/* Note: in IDF verification we don't add any fault injection resistance, as we don't expect this to be called
|
||||
during boot-time verification. */
|
||||
memset(verified_digest, 0, ESP_SECURE_BOOT_DIGEST_LEN);
|
||||
}
|
||||
/* Note: in IDF verification we don't add any fault injection resistance, as we don't expect this to be called
|
||||
during boot-time verification. */
|
||||
memset(verified_digest, 0, ESP_SECURE_BOOT_KEY_DIGEST_LEN);
|
||||
|
||||
esp_image_sig_public_key_digests_t trusted = {0};
|
||||
|
||||
@@ -248,7 +237,7 @@ esp_err_t esp_secure_boot_verify_sbv2_signature_block(const ets_secure_boot_sign
|
||||
#endif
|
||||
|
||||
for (unsigned app_blk_idx = 0; app_blk_idx < secure_boot_num_blocks; app_blk_idx++) {
|
||||
uint8_t app_blk_digest[ESP_SECURE_BOOT_KEY_DIGEST_SHA_256_LEN] = { 0 };
|
||||
uint8_t app_blk_digest[ESP_SECURE_BOOT_DIGEST_LEN] = { 0 };
|
||||
const ets_secure_boot_sig_block_t *app_blk = &sig_block->block[app_blk_idx];
|
||||
const ets_secure_boot_sig_block_t *trusted_block = NULL;
|
||||
|
||||
|
||||
@@ -26,7 +26,6 @@ static const char* TAG = "secure_boot_v2";
|
||||
|
||||
esp_err_t esp_secure_boot_verify_signature(uint32_t src_addr, uint32_t length)
|
||||
{
|
||||
esp_err_t err = ESP_FAIL;
|
||||
uint8_t digest[ESP_SECURE_BOOT_DIGEST_LEN] = {0};
|
||||
uint8_t verified_digest[ESP_SECURE_BOOT_DIGEST_LEN] = { 0 }; /* Note: this function doesn't do any anti-FI checks on this buffer */
|
||||
|
||||
@@ -35,12 +34,7 @@ esp_err_t esp_secure_boot_verify_signature(uint32_t src_addr, uint32_t length)
|
||||
ESP_LOGD(TAG, "verifying signature src_addr 0x%" PRIx32 " length 0x%" PRIx32, src_addr, length);
|
||||
|
||||
/* Calculate digest of main image */
|
||||
#if CONFIG_SECURE_BOOT_ECDSA_KEY_LEN_384_BITS
|
||||
err = bootloader_sha384_flash_contents(src_addr, padded_length, digest);
|
||||
#else
|
||||
err = bootloader_sha256_flash_contents(src_addr, padded_length, digest);
|
||||
#endif
|
||||
|
||||
esp_err_t err = bootloader_sha256_flash_contents(src_addr, padded_length, digest);
|
||||
if (err != ESP_OK) {
|
||||
ESP_LOGE(TAG, "Digest calculation failed 0x%" PRIx32 ", 0x%" PRIx32, src_addr, padded_length);
|
||||
return err;
|
||||
|
||||
@@ -29,7 +29,6 @@ set(common_include_dirs
|
||||
|
||||
set(ble_mesh_include_dirs
|
||||
"esp_ble_mesh/common/include"
|
||||
"esp_ble_mesh/common/tinycrypt/include"
|
||||
"esp_ble_mesh/core"
|
||||
"esp_ble_mesh/core/include"
|
||||
"esp_ble_mesh/core/storage"
|
||||
@@ -42,6 +41,10 @@ set(ble_mesh_include_dirs
|
||||
"esp_ble_mesh/api"
|
||||
)
|
||||
|
||||
set(ble_mesh_tinycrypt_dirs
|
||||
"esp_ble_mesh/common/tinycrypt/include"
|
||||
)
|
||||
|
||||
set(ble_mesh_v11_include_dirs
|
||||
"esp_ble_mesh/lib/include"
|
||||
"esp_ble_mesh/v1.1/api/core/include"
|
||||
@@ -134,7 +137,6 @@ if(CONFIG_BT_ENABLED)
|
||||
"common/osi/semaphore.c"
|
||||
"porting/mem/bt_osi_mem.c"
|
||||
"common/ble_log/ble_log_spi_out.c"
|
||||
"common/ble_log/ble_log_uhci_out.c"
|
||||
)
|
||||
|
||||
# Host Bluedroid
|
||||
@@ -156,6 +158,9 @@ if(CONFIG_BT_ENABLED)
|
||||
host/bluedroid/bta/sys/include
|
||||
host/bluedroid/device/include
|
||||
host/bluedroid/hci/include
|
||||
host/bluedroid/external/sbc/decoder/include
|
||||
host/bluedroid/external/sbc/encoder/include
|
||||
host/bluedroid/external/sbc/plc/include
|
||||
host/bluedroid/btc/profile/esp/include
|
||||
host/bluedroid/btc/profile/std/a2dp/include
|
||||
host/bluedroid/btc/profile/std/include
|
||||
@@ -313,6 +318,29 @@ if(CONFIG_BT_ENABLED)
|
||||
"host/bluedroid/device/bdaddr.c"
|
||||
"host/bluedroid/device/controller.c"
|
||||
"host/bluedroid/device/interop.c"
|
||||
"host/bluedroid/external/sbc/decoder/srce/alloc.c"
|
||||
"host/bluedroid/external/sbc/decoder/srce/bitalloc-sbc.c"
|
||||
"host/bluedroid/external/sbc/decoder/srce/bitalloc.c"
|
||||
"host/bluedroid/external/sbc/decoder/srce/bitstream-decode.c"
|
||||
"host/bluedroid/external/sbc/decoder/srce/decoder-oina.c"
|
||||
"host/bluedroid/external/sbc/decoder/srce/decoder-private.c"
|
||||
"host/bluedroid/external/sbc/decoder/srce/decoder-sbc.c"
|
||||
"host/bluedroid/external/sbc/decoder/srce/dequant.c"
|
||||
"host/bluedroid/external/sbc/decoder/srce/framing-sbc.c"
|
||||
"host/bluedroid/external/sbc/decoder/srce/framing.c"
|
||||
"host/bluedroid/external/sbc/decoder/srce/oi_codec_version.c"
|
||||
"host/bluedroid/external/sbc/decoder/srce/synthesis-8-generated.c"
|
||||
"host/bluedroid/external/sbc/decoder/srce/synthesis-dct8.c"
|
||||
"host/bluedroid/external/sbc/decoder/srce/synthesis-sbc.c"
|
||||
"host/bluedroid/external/sbc/encoder/srce/sbc_analysis.c"
|
||||
"host/bluedroid/external/sbc/encoder/srce/sbc_dct.c"
|
||||
"host/bluedroid/external/sbc/encoder/srce/sbc_dct_coeffs.c"
|
||||
"host/bluedroid/external/sbc/encoder/srce/sbc_enc_bit_alloc_mono.c"
|
||||
"host/bluedroid/external/sbc/encoder/srce/sbc_enc_bit_alloc_ste.c"
|
||||
"host/bluedroid/external/sbc/encoder/srce/sbc_enc_coeffs.c"
|
||||
"host/bluedroid/external/sbc/encoder/srce/sbc_encoder.c"
|
||||
"host/bluedroid/external/sbc/encoder/srce/sbc_packing.c"
|
||||
"host/bluedroid/external/sbc/plc/sbc_plc.c"
|
||||
"host/bluedroid/hci/hci_audio.c"
|
||||
"host/bluedroid/hci/hci_hal_h4.c"
|
||||
"host/bluedroid/hci/hci_layer.c"
|
||||
@@ -449,38 +477,6 @@ if(CONFIG_BT_ENABLED)
|
||||
"host/bluedroid/api/esp_ble_cte_api.c")
|
||||
endif()
|
||||
|
||||
if((CONFIG_BT_A2DP_ENABLE AND NOT CONFIG_BT_A2DP_USE_EXTERNAL_CODEC) OR
|
||||
(CONFIG_BT_HFP_ENABLE AND CONFIG_BT_HFP_AUDIO_DATA_PATH_HCI AND NOT CONFIG_BT_HFP_USE_EXTERNAL_CODEC))
|
||||
list(APPEND priv_include_dirs
|
||||
host/bluedroid/external/sbc/decoder/include
|
||||
host/bluedroid/external/sbc/encoder/include
|
||||
host/bluedroid/external/sbc/plc/include)
|
||||
|
||||
list(APPEND srcs "host/bluedroid/external/sbc/decoder/srce/alloc.c"
|
||||
"host/bluedroid/external/sbc/decoder/srce/bitalloc-sbc.c"
|
||||
"host/bluedroid/external/sbc/decoder/srce/bitalloc.c"
|
||||
"host/bluedroid/external/sbc/decoder/srce/bitstream-decode.c"
|
||||
"host/bluedroid/external/sbc/decoder/srce/decoder-oina.c"
|
||||
"host/bluedroid/external/sbc/decoder/srce/decoder-private.c"
|
||||
"host/bluedroid/external/sbc/decoder/srce/decoder-sbc.c"
|
||||
"host/bluedroid/external/sbc/decoder/srce/dequant.c"
|
||||
"host/bluedroid/external/sbc/decoder/srce/framing-sbc.c"
|
||||
"host/bluedroid/external/sbc/decoder/srce/framing.c"
|
||||
"host/bluedroid/external/sbc/decoder/srce/oi_codec_version.c"
|
||||
"host/bluedroid/external/sbc/decoder/srce/synthesis-8-generated.c"
|
||||
"host/bluedroid/external/sbc/decoder/srce/synthesis-dct8.c"
|
||||
"host/bluedroid/external/sbc/decoder/srce/synthesis-sbc.c"
|
||||
"host/bluedroid/external/sbc/encoder/srce/sbc_analysis.c"
|
||||
"host/bluedroid/external/sbc/encoder/srce/sbc_dct.c"
|
||||
"host/bluedroid/external/sbc/encoder/srce/sbc_dct_coeffs.c"
|
||||
"host/bluedroid/external/sbc/encoder/srce/sbc_enc_bit_alloc_mono.c"
|
||||
"host/bluedroid/external/sbc/encoder/srce/sbc_enc_bit_alloc_ste.c"
|
||||
"host/bluedroid/external/sbc/encoder/srce/sbc_enc_coeffs.c"
|
||||
"host/bluedroid/external/sbc/encoder/srce/sbc_encoder.c"
|
||||
"host/bluedroid/external/sbc/encoder/srce/sbc_packing.c"
|
||||
"host/bluedroid/external/sbc/plc/sbc_plc.c")
|
||||
endif()
|
||||
|
||||
endif()
|
||||
|
||||
if(CONFIG_BLE_MESH)
|
||||
@@ -507,21 +503,6 @@ if(CONFIG_BT_ENABLED)
|
||||
"esp_ble_mesh/btc/btc_ble_mesh_prov.c"
|
||||
"esp_ble_mesh/btc/btc_ble_mesh_sensor_model.c"
|
||||
"esp_ble_mesh/btc/btc_ble_mesh_time_scene_model.c"
|
||||
"esp_ble_mesh/common/tinycrypt/src/aes_decrypt.c"
|
||||
"esp_ble_mesh/common/tinycrypt/src/aes_encrypt.c"
|
||||
"esp_ble_mesh/common/tinycrypt/src/cbc_mode.c"
|
||||
"esp_ble_mesh/common/tinycrypt/src/ccm_mode.c"
|
||||
"esp_ble_mesh/common/tinycrypt/src/cmac_mode.c"
|
||||
"esp_ble_mesh/common/tinycrypt/src/ctr_mode.c"
|
||||
"esp_ble_mesh/common/tinycrypt/src/ctr_prng.c"
|
||||
"esp_ble_mesh/common/tinycrypt/src/ecc_dh.c"
|
||||
"esp_ble_mesh/common/tinycrypt/src/ecc_dsa.c"
|
||||
"esp_ble_mesh/common/tinycrypt/src/ecc_platform_specific.c"
|
||||
"esp_ble_mesh/common/tinycrypt/src/ecc.c"
|
||||
"esp_ble_mesh/common/tinycrypt/src/hmac_prng.c"
|
||||
"esp_ble_mesh/common/tinycrypt/src/hmac.c"
|
||||
"esp_ble_mesh/common/tinycrypt/src/sha256.c"
|
||||
"esp_ble_mesh/common/tinycrypt/src/utils.c"
|
||||
"esp_ble_mesh/common/atomic.c"
|
||||
"esp_ble_mesh/common/buf.c"
|
||||
"esp_ble_mesh/common/common.c"
|
||||
@@ -572,6 +553,26 @@ if(CONFIG_BT_ENABLED)
|
||||
"esp_ble_mesh/models/server/state_binding.c"
|
||||
"esp_ble_mesh/models/server/state_transition.c"
|
||||
"esp_ble_mesh/models/server/time_scene_server.c")
|
||||
|
||||
if(NOT CONFIG_BLE_MESH_USE_UNIFIED_CRYPTO)
|
||||
list(APPEND include_dirs ${ble_mesh_tinycrypt_dirs})
|
||||
list(APPEND srcs
|
||||
"esp_ble_mesh/common/tinycrypt/src/aes_decrypt.c"
|
||||
"esp_ble_mesh/common/tinycrypt/src/aes_encrypt.c"
|
||||
"esp_ble_mesh/common/tinycrypt/src/cbc_mode.c"
|
||||
"esp_ble_mesh/common/tinycrypt/src/ccm_mode.c"
|
||||
"esp_ble_mesh/common/tinycrypt/src/cmac_mode.c"
|
||||
"esp_ble_mesh/common/tinycrypt/src/ctr_mode.c"
|
||||
"esp_ble_mesh/common/tinycrypt/src/ctr_prng.c"
|
||||
"esp_ble_mesh/common/tinycrypt/src/ecc_dh.c"
|
||||
"esp_ble_mesh/common/tinycrypt/src/ecc_dsa.c"
|
||||
"esp_ble_mesh/common/tinycrypt/src/ecc_platform_specific.c"
|
||||
"esp_ble_mesh/common/tinycrypt/src/ecc.c"
|
||||
"esp_ble_mesh/common/tinycrypt/src/hmac_prng.c"
|
||||
"esp_ble_mesh/common/tinycrypt/src/hmac.c"
|
||||
"esp_ble_mesh/common/tinycrypt/src/sha256.c"
|
||||
"esp_ble_mesh/common/tinycrypt/src/utils.c")
|
||||
endif()
|
||||
if(CONFIG_BLE_MESH_V11_SUPPORT)
|
||||
list(APPEND include_dirs ${ble_mesh_v11_include_dirs})
|
||||
|
||||
@@ -945,11 +946,6 @@ if(CONFIG_BT_ENABLED)
|
||||
if(CONFIG_BT_LE_CONTROLLER_LOG_WRAP_PANIC_HANDLER_ENABLE)
|
||||
target_link_libraries(${COMPONENT_LIB} INTERFACE "-Wl,--wrap=esp_panic_handler")
|
||||
endif()
|
||||
if(CONFIG_BT_BLE_LOG_UHCI_OUT_ENABLED)
|
||||
target_link_libraries(${COMPONENT_LIB} INTERFACE "-Wl,--wrap=uart_tx_chars")
|
||||
target_link_libraries(${COMPONENT_LIB} INTERFACE "-Wl,--wrap=uart_write_bytes")
|
||||
target_link_libraries(${COMPONENT_LIB} INTERFACE "-Wl,--wrap=uart_write_bytes_with_break")
|
||||
endif()
|
||||
if(CONFIG_IDF_TARGET_ESP32C6)
|
||||
add_prebuilt_library(libble_app
|
||||
"${CMAKE_CURRENT_LIST_DIR}/controller/lib_esp32c6/esp32c6-bt-lib/esp32c6/libble_app.a"
|
||||
|
||||
@@ -27,21 +27,6 @@ config BT_BLE_LOG_SPI_OUT_HCI_ENABLED
|
||||
help
|
||||
Enable logging of HCI packets to the SPI bus when BLE SPI log output is enabled.
|
||||
|
||||
config BT_BLE_LOG_SPI_OUT_HCI_BUF_SIZE
|
||||
int "SPI transaction buffer size for HCI logs"
|
||||
depends on BT_BLE_LOG_SPI_OUT_HCI_ENABLED
|
||||
default 1024
|
||||
help
|
||||
SPI transaction buffer size for HCI logs.
|
||||
There will be 2 SPI DMA buffers with the same size.
|
||||
|
||||
config BT_BLE_LOG_SPI_OUT_HCI_TASK_CNT
|
||||
int "HCI task count"
|
||||
depends on BT_BLE_LOG_SPI_OUT_HCI_ENABLED
|
||||
default 1
|
||||
help
|
||||
HCI task count
|
||||
|
||||
config BT_BLE_LOG_SPI_OUT_HOST_ENABLED
|
||||
bool "Enable Host log output to SPI"
|
||||
depends on BT_BLE_LOG_SPI_OUT_ENABLED
|
||||
@@ -50,21 +35,6 @@ config BT_BLE_LOG_SPI_OUT_HOST_ENABLED
|
||||
This configuration applies to the logs of both Bluedroid Host and NimBLE Host.
|
||||
When BLE SPI log output is enabled, this option allows host logs to be transmitted via SPI.
|
||||
|
||||
config BT_BLE_LOG_SPI_OUT_HOST_BUF_SIZE
|
||||
int "SPI transaction buffer size for host logs"
|
||||
depends on BT_BLE_LOG_SPI_OUT_HOST_ENABLED
|
||||
default 1024
|
||||
help
|
||||
SPI transaction buffer size for host logs.
|
||||
There will be 2 SPI DMA buffers with the same size.
|
||||
|
||||
config BT_BLE_LOG_SPI_OUT_HOST_TASK_CNT
|
||||
int "Host task count"
|
||||
depends on BT_BLE_LOG_SPI_OUT_HOST_ENABLED
|
||||
default 2
|
||||
help
|
||||
Host task count.
|
||||
|
||||
config BT_BLE_LOG_SPI_OUT_LL_ENABLED
|
||||
bool "Enable Controller log output to SPI"
|
||||
depends on BT_BLE_LOG_SPI_OUT_ENABLED
|
||||
@@ -132,6 +102,13 @@ config BT_BLE_LOG_SPI_OUT_SYNC_IO_NUM
|
||||
help
|
||||
GPIO number of SYNC IO
|
||||
|
||||
config BT_BLE_LOG_SPI_OUT_TS_SYNC_SLEEP_SUPPORT
|
||||
bool "Enable ble log & logic analyzer log time sync sleep support"
|
||||
depends on BT_BLE_LOG_SPI_OUT_LL_ENABLED
|
||||
default n
|
||||
help
|
||||
Enable ble log & logic analyzer log time sync sleep support
|
||||
|
||||
config BT_BLE_LOG_SPI_OUT_FLUSH_TIMER_ENABLED
|
||||
bool "Enable periodic buffer flush out"
|
||||
depends on BT_BLE_LOG_SPI_OUT_ENABLED
|
||||
@@ -161,93 +138,3 @@ config BT_BLE_LOG_SPI_OUT_LE_AUDIO_BUF_SIZE
|
||||
help
|
||||
SPI transaction buffer size for LE Audio logs.
|
||||
There will be 2 SPI DMA buffers with the same size.
|
||||
|
||||
config BT_BLE_LOG_SPI_OUT_LE_AUDIO_TASK_CNT
|
||||
int "LE audio task count"
|
||||
depends on BT_BLE_LOG_SPI_OUT_LE_AUDIO_ENABLED
|
||||
default 1
|
||||
help
|
||||
LE audio task count
|
||||
|
||||
config BT_BLE_LOG_SPI_OUT_MESH_ENABLED
|
||||
bool "Enable BLE mesh log output to SPI"
|
||||
depends on BT_BLE_LOG_SPI_OUT_ENABLED
|
||||
default n
|
||||
help
|
||||
Enable BLE mesh log output to SPI
|
||||
|
||||
config BT_BLE_LOG_SPI_OUT_MESH_BUF_SIZE
|
||||
int "SPI transaction buffer size for BLE mesh logs"
|
||||
depends on BT_BLE_LOG_SPI_OUT_MESH_ENABLED
|
||||
default 1024
|
||||
help
|
||||
SPI transaction buffer size for BLE mesh logs.
|
||||
There will be 2 SPI DMA buffers with the same size.
|
||||
|
||||
config BT_BLE_LOG_SPI_OUT_MESH_TASK_CNT
|
||||
int "Mesh task count"
|
||||
depends on BT_BLE_LOG_SPI_OUT_MESH_ENABLED
|
||||
default 3
|
||||
help
|
||||
Mesh task count
|
||||
|
||||
config BT_BLE_LOG_UHCI_OUT_ENABLED
|
||||
bool "Output ble logs via UHCI (UART DMA) driver (Experimental)"
|
||||
default n
|
||||
help
|
||||
Output ble logs via UHCI (UART DMA) driver
|
||||
On enable, BT_BLE_LOG_UHCI_OUT_UART_PORT would be reinited with
|
||||
BT_BLE_LOG_UHCI_OUT_UART_BAUD_RATE as new baud rate and
|
||||
BT_BLE_LOG_UHCI_OUT_UART_IO_NUM_TX as new UART Tx IO
|
||||
|
||||
config BT_BLE_LOG_UHCI_OUT_UART_PORT
|
||||
int "UART port connected to UHCI controller"
|
||||
depends on BT_BLE_LOG_UHCI_OUT_ENABLED
|
||||
default 0
|
||||
help
|
||||
UART port connected to UHCI controller
|
||||
If UART port 0 is selected, UART VFS Driver, UART ROM Driver
|
||||
and UART Driver output would be redirected to BLE Log UHCI Out
|
||||
to solve UART Tx FIFO multi-task access issue
|
||||
|
||||
config BT_BLE_LOG_UHCI_OUT_LL_TASK_BUF_SIZE
|
||||
int "UHCI transaction buffer size for lower layer task logs"
|
||||
depends on BT_BLE_LOG_UHCI_OUT_ENABLED
|
||||
default 1024
|
||||
help
|
||||
UHCI transaction buffer size for lower layer task logs
|
||||
|
||||
config BT_BLE_LOG_UHCI_OUT_LL_ISR_BUF_SIZE
|
||||
int "UHCI transaction buffer size for lower layer ISR logs"
|
||||
depends on BT_BLE_LOG_UHCI_OUT_ENABLED
|
||||
default 1024
|
||||
help
|
||||
UHCI transaction buffer size for lower layer ISR logs
|
||||
|
||||
config BT_BLE_LOG_UHCI_OUT_LL_HCI_BUF_SIZE
|
||||
int "UHCI transaction buffer size for lower layer HCI logs"
|
||||
depends on BT_BLE_LOG_UHCI_OUT_ENABLED
|
||||
default 1024
|
||||
help
|
||||
UHCI transaction buffer size for lower layer HCI logs
|
||||
|
||||
config BT_BLE_LOG_UHCI_OUT_UART_NEED_INIT
|
||||
bool "Enable to init UART port"
|
||||
depends on BT_BLE_LOG_UHCI_OUT_ENABLED
|
||||
default y
|
||||
help
|
||||
Enable to init UART port
|
||||
|
||||
config BT_BLE_LOG_UHCI_OUT_UART_BAUD_RATE
|
||||
int "Baud rate for BT_BLE_LOG_UHCI_OUT_UART_PORT"
|
||||
depends on BT_BLE_LOG_UHCI_OUT_UART_NEED_INIT
|
||||
default 3000000
|
||||
help
|
||||
Baud rate for BT_BLE_LOG_UHCI_OUT_UART_PORT
|
||||
|
||||
config BT_BLE_LOG_UHCI_OUT_UART_IO_NUM_TX
|
||||
int "IO number for UART TX port"
|
||||
depends on BT_BLE_LOG_UHCI_OUT_UART_NEED_INIT
|
||||
default 0
|
||||
help
|
||||
IO number for UART TX port
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -1,780 +0,0 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
#include "ble_log/ble_log_uhci_out.h"
|
||||
|
||||
|
||||
#if CONFIG_BT_BLE_LOG_UHCI_OUT_ENABLED
|
||||
|
||||
// Private includes
|
||||
#include "esp_bt.h"
|
||||
|
||||
// sdkconfig defines
|
||||
#define UHCI_OUT_LL_TASK_BUF_SIZE CONFIG_BT_BLE_LOG_UHCI_OUT_LL_TASK_BUF_SIZE
|
||||
#define UHCI_OUT_LL_ISR_BUF_SIZE CONFIG_BT_BLE_LOG_UHCI_OUT_LL_ISR_BUF_SIZE
|
||||
#define UHCI_OUT_LL_HCI_BUF_SIZE CONFIG_BT_BLE_LOG_UHCI_OUT_LL_HCI_BUF_SIZE
|
||||
#define UHCI_OUT_UART_PORT CONFIG_BT_BLE_LOG_UHCI_OUT_UART_PORT
|
||||
#define UHCI_OUT_UART_NEED_INIT CONFIG_BT_BLE_LOG_UHCI_OUT_UART_NEED_INIT
|
||||
|
||||
#if UHCI_OUT_UART_NEED_INIT
|
||||
#define UHCI_OUT_UART_BAUD_RATE CONFIG_BT_BLE_LOG_UHCI_OUT_UART_BAUD_RATE
|
||||
#define UHCI_OUT_UART_IO_NUM_TX CONFIG_BT_BLE_LOG_UHCI_OUT_UART_IO_NUM_TX
|
||||
#endif // UHCI_OUT_UART_NEED_INIT
|
||||
|
||||
// Private defines
|
||||
#define UHCI_OUT_MAX_TRANSFER_SIZE (10240)
|
||||
#define UHCI_OUT_MALLOC(size) heap_caps_malloc(size, MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT)
|
||||
#define UHCI_OUT_FLUSH_TIMEOUT_MS (100)
|
||||
#define UHCI_OUT_FLUSH_TIMEOUT_US (UHCI_OUT_FLUSH_TIMEOUT_MS * 1000)
|
||||
#define UHCI_OUT_USER_BUF_SIZE (512)
|
||||
#define UHCI_OUT_UART_PORT0 (0)
|
||||
#define UHCI_OUT_UART_PORT1 (1)
|
||||
#define UHCI_OUT_UART_DRIVER_RX_BUF_SIZE (32)
|
||||
|
||||
// Queue size defines
|
||||
#define UHCI_OUT_PING_PONG_BUF_CNT (2)
|
||||
#define UHCI_OUT_USER_QUEUE_SIZE (UHCI_OUT_PING_PONG_BUF_CNT)
|
||||
#define UHCI_OUT_LL_QUEUE_SIZE (3 * UHCI_OUT_PING_PONG_BUF_CNT)
|
||||
#define UHCI_OUT_QUEUE_SIZE (UHCI_OUT_USER_QUEUE_SIZE + UHCI_OUT_LL_QUEUE_SIZE)
|
||||
|
||||
// Private typedefs
|
||||
typedef struct {
|
||||
// This flag is for multithreading, must be a word, do not modify
|
||||
volatile uint32_t flag;
|
||||
uint16_t buf_size;
|
||||
uint16_t length;
|
||||
uint8_t buffer[0];
|
||||
} uhci_out_trans_cb_t;
|
||||
|
||||
typedef struct {
|
||||
uhci_out_trans_cb_t *trans_cb[2];
|
||||
uint8_t trans_cb_idx;
|
||||
uint8_t type;
|
||||
uint16_t lost_frame_cnt;
|
||||
uint32_t lost_bytes_cnt;
|
||||
uint32_t frame_sn;
|
||||
} uhci_out_log_cb_t;
|
||||
|
||||
typedef struct {
|
||||
uint16_t length;
|
||||
uint8_t source;
|
||||
uint8_t type;
|
||||
uint16_t frame_sn;
|
||||
} __attribute__((packed)) frame_head_t;
|
||||
|
||||
typedef struct {
|
||||
uint8_t type;
|
||||
uint16_t lost_frame_cnt;
|
||||
uint32_t lost_bytes_cnt;
|
||||
} __attribute__((packed)) loss_payload_t;
|
||||
|
||||
// Private enums
|
||||
enum {
|
||||
TRANS_CB_FLAG_AVAILABLE = 0,
|
||||
TRANS_CB_FLAG_NEED_QUEUE,
|
||||
TRANS_CB_FLAG_IN_QUEUE,
|
||||
};
|
||||
|
||||
enum {
|
||||
LOG_CB_TYPE_USER = 0,
|
||||
LOG_CB_TYPE_LL,
|
||||
};
|
||||
|
||||
enum {
|
||||
LOG_CB_LL_SUBTYPE_TASK = 0,
|
||||
LOG_CB_LL_SUBTYPE_ISR,
|
||||
LOG_CB_LL_SUBTYPE_HCI
|
||||
};
|
||||
|
||||
enum {
|
||||
LL_LOG_FLAG_CONTINUE = 0,
|
||||
LL_LOG_FLAG_END,
|
||||
LL_LOG_FLAG_TASK,
|
||||
LL_LOG_FLAG_ISR,
|
||||
LL_LOG_FLAG_HCI,
|
||||
LL_LOG_FLAG_RAW,
|
||||
LL_LOG_FLAG_SYNC
|
||||
};
|
||||
|
||||
enum {
|
||||
LL_EV_FLAG_ISR_APPEND = 0,
|
||||
LL_EV_FLAG_FLUSH_LOG,
|
||||
};
|
||||
|
||||
// Private variables
|
||||
static bool uhci_out_inited = false;
|
||||
static uhci_controller_handle_t uhci_handle = NULL;
|
||||
|
||||
static bool user_log_inited = false;
|
||||
static SemaphoreHandle_t user_log_mutex = NULL;
|
||||
static uhci_out_log_cb_t *user_log_cb = NULL;
|
||||
static uint32_t user_last_write_ts = 0;
|
||||
|
||||
static bool ll_log_inited = false;
|
||||
static uhci_out_log_cb_t *ll_task_log_cb = NULL;
|
||||
static uhci_out_log_cb_t *ll_isr_log_cb = NULL;
|
||||
static uhci_out_log_cb_t *ll_hci_log_cb = NULL;
|
||||
static uint32_t ll_ev_flags = 0;
|
||||
static uint32_t ll_last_write_ts = 0;
|
||||
|
||||
static esp_timer_handle_t flush_timer = NULL;
|
||||
|
||||
// Private function declarations
|
||||
extern void esp_panic_handler_feed_wdts(void);
|
||||
|
||||
static int uhci_out_init_trans(uhci_out_trans_cb_t **trans_cb, uint16_t buf_size);
|
||||
static void uhci_out_deinit_trans(uhci_out_trans_cb_t **trans_cb);
|
||||
static bool uhci_out_tx_done_cb(uhci_controller_handle_t uhci_ctrl,
|
||||
const uhci_tx_done_event_data_t *edata, void *user_ctx);
|
||||
static inline void uhci_out_append_trans(uhci_out_trans_cb_t *trans_cb);
|
||||
|
||||
static int uhci_out_log_cb_init(uhci_out_log_cb_t **log_cb, uint16_t buf_size, uint8_t type, uint8_t idx);
|
||||
static void uhci_out_log_cb_deinit(uhci_out_log_cb_t **log_cb);
|
||||
static inline bool uhci_out_log_cb_check_trans(uhci_out_log_cb_t *log_cb, uint16_t len, bool *need_append);
|
||||
static inline void uhci_out_log_cb_append_trans(uhci_out_log_cb_t *log_cb);
|
||||
static inline void uhci_out_log_cb_flush_trans(uhci_out_log_cb_t *log_cb);
|
||||
static bool uhci_out_log_cb_write(uhci_out_log_cb_t *log_cb, const uint8_t *addr, uint16_t len,
|
||||
const uint8_t *addr_append, uint16_t len_append, uint8_t source);
|
||||
static void uhci_out_log_cb_write_loss(uhci_out_log_cb_t *log_cb);
|
||||
static void uhci_out_log_cb_dump(uhci_out_log_cb_t *log_cb);
|
||||
|
||||
static void esp_timer_cb_log_flush(void);
|
||||
static void uhci_out_user_write_str(const uint8_t *src, uint16_t len);
|
||||
|
||||
#if UHCI_OUT_UART_PORT == UHCI_OUT_UART_PORT0
|
||||
static void uhci_out_user_write_char(char c);
|
||||
#endif // UHCI_OUT_UART_PORT == UHCI_OUT_UART_PORT0
|
||||
|
||||
static int uhci_out_user_log_init(void);
|
||||
static void uhci_out_user_log_deinit(void);
|
||||
|
||||
static int uhci_out_ll_log_init(void);
|
||||
static void uhci_out_ll_log_deinit(void);
|
||||
static void uhci_out_ll_log_flush(void);
|
||||
|
||||
#if defined(CONFIG_IDF_TARGET_ESP32H2) || defined(CONFIG_IDF_TARGET_ESP32C6) || defined(CONFIG_IDF_TARGET_ESP32C5) ||\
|
||||
defined(CONFIG_IDF_TARGET_ESP32C61) || defined(CONFIG_IDF_TARGET_ESP32H21)
|
||||
extern void r_ble_log_simple_put_ev(void);
|
||||
#define UHCI_OUT_LL_PUT_EV r_ble_log_simple_put_ev()
|
||||
#elif defined(CONFIG_IDF_TARGET_ESP32C2)
|
||||
extern void ble_log_simple_put_ev(void);
|
||||
#define UHCI_OUT_LL_PUT_EV ble_log_simple_put_ev()
|
||||
#else
|
||||
#define UHCI_OUT_LL_PUT_EV
|
||||
#endif
|
||||
|
||||
// Private macros
|
||||
#define UHCI_OUT_FRAME_HEAD_LEN (sizeof(frame_head_t))
|
||||
#define UHCI_OUT_FRAME_TAIL_LEN (sizeof(uint32_t))
|
||||
#define UHCI_OUT_FRAME_OVERHEAD (UHCI_OUT_FRAME_HEAD_LEN + UHCI_OUT_FRAME_TAIL_LEN)
|
||||
#define UHCI_OUT_GET_FRAME_SN(VAR) __atomic_fetch_add(VAR, 1, __ATOMIC_RELAXED)
|
||||
|
||||
// Private functions
|
||||
static int uhci_out_init_trans(uhci_out_trans_cb_t **trans_cb, uint16_t buf_size)
|
||||
{
|
||||
// Memory allocations
|
||||
size_t cb_size = sizeof(uhci_out_trans_cb_t) + buf_size;
|
||||
*trans_cb = (uhci_out_trans_cb_t *)UHCI_OUT_MALLOC(cb_size);
|
||||
if (!(*trans_cb)) {
|
||||
return -1;
|
||||
}
|
||||
memset(*trans_cb, 0, sizeof(uhci_out_trans_cb_t));
|
||||
|
||||
// Initialization
|
||||
(*trans_cb)->buf_size = buf_size;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void uhci_out_deinit_trans(uhci_out_trans_cb_t **trans_cb)
|
||||
{
|
||||
if (!(*trans_cb)) {
|
||||
return;
|
||||
}
|
||||
|
||||
free(*trans_cb);
|
||||
*trans_cb = NULL;
|
||||
return;
|
||||
}
|
||||
|
||||
IRAM_ATTR static bool uhci_out_tx_done_cb(uhci_controller_handle_t uhci_ctrl,
|
||||
const uhci_tx_done_event_data_t *edata, void *user_ctx)
|
||||
{
|
||||
uhci_out_trans_cb_t *trans_cb = (uhci_out_trans_cb_t *)((uint8_t *)edata->buffer - sizeof(uhci_out_trans_cb_t));
|
||||
trans_cb->length = 0;
|
||||
trans_cb->flag = TRANS_CB_FLAG_AVAILABLE;
|
||||
return true;
|
||||
}
|
||||
|
||||
IRAM_ATTR static inline void uhci_out_append_trans(uhci_out_trans_cb_t *trans_cb)
|
||||
{
|
||||
if ((trans_cb->flag != TRANS_CB_FLAG_NEED_QUEUE) || !trans_cb->length) {
|
||||
return;
|
||||
}
|
||||
|
||||
// Note: If task yield after transmission but before flag set
|
||||
// flag might be reset in tx done ISR before flag set, leading to buffer access failure
|
||||
trans_cb->flag = TRANS_CB_FLAG_IN_QUEUE;
|
||||
if (uhci_transmit(uhci_handle, trans_cb->buffer, trans_cb->length) != ESP_OK) {
|
||||
goto recycle;
|
||||
}
|
||||
return;
|
||||
|
||||
recycle:
|
||||
trans_cb->length = 0;
|
||||
trans_cb->flag = TRANS_CB_FLAG_AVAILABLE;
|
||||
return;
|
||||
}
|
||||
|
||||
static int uhci_out_log_cb_init(uhci_out_log_cb_t **log_cb, uint16_t buf_size, uint8_t type, uint8_t idx)
|
||||
{
|
||||
// Initialize log control block
|
||||
*log_cb = (uhci_out_log_cb_t *)UHCI_OUT_MALLOC(sizeof(uhci_out_log_cb_t));
|
||||
if (!(*log_cb)) {
|
||||
return -1;
|
||||
}
|
||||
memset(*log_cb, 0, sizeof(uhci_out_log_cb_t));
|
||||
|
||||
// Initialize transactions
|
||||
int ret = 0;
|
||||
for (uint8_t i = 0; i < 2; i++) {
|
||||
ret |= uhci_out_init_trans(&((*log_cb)->trans_cb[i]), buf_size);
|
||||
}
|
||||
if (ret != 0) {
|
||||
uhci_out_log_cb_deinit(log_cb);
|
||||
return -1;
|
||||
}
|
||||
|
||||
(*log_cb)->type = (type << 4) | (idx);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void uhci_out_log_cb_deinit(uhci_out_log_cb_t **log_cb)
|
||||
{
|
||||
if (!(*log_cb)) {
|
||||
return;
|
||||
}
|
||||
|
||||
for (uint8_t i = 0; i < 2; i++) {
|
||||
if ((*log_cb)->trans_cb[i]) {
|
||||
uhci_out_deinit_trans(&((*log_cb)->trans_cb[i]));
|
||||
}
|
||||
}
|
||||
free(*log_cb);
|
||||
*log_cb = NULL;
|
||||
return;
|
||||
}
|
||||
|
||||
IRAM_ATTR static inline bool uhci_out_log_cb_check_trans(uhci_out_log_cb_t *log_cb, uint16_t len, bool *need_append)
|
||||
{
|
||||
uhci_out_trans_cb_t *trans_cb;
|
||||
*need_append = false;
|
||||
for (uint8_t i = 0; i < 2; i++) {
|
||||
trans_cb = log_cb->trans_cb[log_cb->trans_cb_idx];
|
||||
if (len > trans_cb->buf_size) {
|
||||
goto failed;
|
||||
}
|
||||
if (trans_cb->flag == TRANS_CB_FLAG_AVAILABLE) {
|
||||
if ((trans_cb->buf_size - trans_cb->length) >= len) {
|
||||
return true;
|
||||
} else {
|
||||
trans_cb->flag = TRANS_CB_FLAG_NEED_QUEUE;
|
||||
*need_append = true;
|
||||
}
|
||||
}
|
||||
log_cb->trans_cb_idx = !(log_cb->trans_cb_idx);
|
||||
}
|
||||
failed:
|
||||
log_cb->lost_bytes_cnt += len;
|
||||
log_cb->lost_frame_cnt++;
|
||||
return false;
|
||||
}
|
||||
|
||||
// CRITICAL: Shall not be called from ISR!
|
||||
IRAM_ATTR static inline void uhci_out_log_cb_append_trans(uhci_out_log_cb_t *log_cb)
|
||||
{
|
||||
uhci_out_trans_cb_t *trans_cb;
|
||||
uint8_t idx = !log_cb->trans_cb_idx;
|
||||
for (uint8_t i = 0; i < 2; i++) {
|
||||
trans_cb = log_cb->trans_cb[idx];
|
||||
if (trans_cb->flag == TRANS_CB_FLAG_NEED_QUEUE) {
|
||||
uhci_out_append_trans(trans_cb);
|
||||
}
|
||||
idx = !idx;
|
||||
}
|
||||
}
|
||||
|
||||
IRAM_ATTR static inline void uhci_out_log_cb_flush_trans(uhci_out_log_cb_t *log_cb)
|
||||
{
|
||||
uhci_out_trans_cb_t *trans_cb;
|
||||
for (uint8_t i = 0; i < 2; i++) {
|
||||
trans_cb = log_cb->trans_cb[i];
|
||||
if (trans_cb->length && (trans_cb->flag == TRANS_CB_FLAG_AVAILABLE)) {
|
||||
trans_cb->flag = TRANS_CB_FLAG_NEED_QUEUE;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
// Return value: Need append
|
||||
IRAM_ATTR static bool uhci_out_log_cb_write(uhci_out_log_cb_t *log_cb, const uint8_t *addr, uint16_t len,
|
||||
const uint8_t *addr_append, uint16_t len_append, uint8_t source)
|
||||
{
|
||||
uhci_out_trans_cb_t *trans_cb = log_cb->trans_cb[log_cb->trans_cb_idx];
|
||||
|
||||
uint8_t *buf = trans_cb->buffer + trans_cb->length;
|
||||
uint16_t total_length = len + len_append;
|
||||
frame_head_t head = {
|
||||
.length = total_length,
|
||||
.source = source,
|
||||
.type = log_cb->type,
|
||||
.frame_sn = UHCI_OUT_GET_FRAME_SN(&(log_cb->frame_sn)) & 0xFFFF,
|
||||
};
|
||||
|
||||
memcpy(buf, (const uint8_t *)&head, UHCI_OUT_FRAME_HEAD_LEN);
|
||||
memcpy(buf + UHCI_OUT_FRAME_HEAD_LEN, addr, len);
|
||||
if (len_append && addr_append) {
|
||||
memcpy(buf + UHCI_OUT_FRAME_HEAD_LEN + len, addr_append, len_append);
|
||||
}
|
||||
|
||||
uint32_t checksum = 0;
|
||||
for (int i = 0; i < UHCI_OUT_FRAME_HEAD_LEN + total_length; i++) {
|
||||
checksum += buf[i];
|
||||
}
|
||||
memcpy(buf + UHCI_OUT_FRAME_HEAD_LEN + total_length, &checksum, UHCI_OUT_FRAME_TAIL_LEN);
|
||||
|
||||
trans_cb->length += total_length + UHCI_OUT_FRAME_OVERHEAD;
|
||||
if ((trans_cb->buf_size - trans_cb->length) <= UHCI_OUT_FRAME_OVERHEAD) {
|
||||
trans_cb->flag = TRANS_CB_FLAG_NEED_QUEUE;
|
||||
return true;
|
||||
}
|
||||
return false;
|
||||
}
|
||||
|
||||
IRAM_ATTR static void uhci_out_log_cb_write_loss(uhci_out_log_cb_t *log_cb)
|
||||
{
|
||||
if (!log_cb->lost_bytes_cnt || !log_cb->lost_frame_cnt) {
|
||||
return;
|
||||
}
|
||||
bool need_append;
|
||||
uint16_t frame_len = sizeof(loss_payload_t) + UHCI_OUT_FRAME_OVERHEAD;
|
||||
if (uhci_out_log_cb_check_trans(log_cb, frame_len, &need_append)) {
|
||||
loss_payload_t payload = {
|
||||
.type = log_cb->type,
|
||||
.lost_frame_cnt = log_cb->lost_frame_cnt,
|
||||
.lost_bytes_cnt = log_cb->lost_bytes_cnt,
|
||||
};
|
||||
uhci_out_log_cb_write(log_cb, (const uint8_t *)&payload, sizeof(loss_payload_t),
|
||||
NULL, 0, BLE_LOG_UHCI_OUT_SOURCE_LOSS);
|
||||
|
||||
log_cb->lost_frame_cnt = 0;
|
||||
log_cb->lost_bytes_cnt = 0;
|
||||
}
|
||||
}
|
||||
|
||||
static void uhci_out_log_cb_dump(uhci_out_log_cb_t *log_cb)
|
||||
{
|
||||
uhci_out_trans_cb_t *trans_cb;
|
||||
uint8_t *buf;
|
||||
for (uint8_t i = 0; i < 2; i++) {
|
||||
// Dump the last transaction before dumping the current transaction
|
||||
log_cb->trans_cb_idx = !(log_cb->trans_cb_idx);
|
||||
trans_cb = log_cb->trans_cb[log_cb->trans_cb_idx];
|
||||
buf = (uint8_t *)trans_cb->buffer;
|
||||
for (uint16_t j = 0; j < trans_cb->buf_size; j++) {
|
||||
esp_rom_printf("%02x ", buf[j]);
|
||||
|
||||
// Feed watchdogs periodically to avoid wdts timeout
|
||||
if ((j % 100) == 0) {
|
||||
esp_panic_handler_feed_wdts();
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static void esp_timer_cb_log_flush(void)
|
||||
{
|
||||
uint32_t os_ts = pdTICKS_TO_MS(xTaskGetTickCount());
|
||||
|
||||
if ((os_ts - user_last_write_ts) > UHCI_OUT_FLUSH_TIMEOUT_MS) {
|
||||
xSemaphoreTake(user_log_mutex, portMAX_DELAY);
|
||||
uhci_out_log_cb_flush_trans(user_log_cb);
|
||||
uhci_out_log_cb_append_trans(user_log_cb);
|
||||
xSemaphoreGive(user_log_mutex);
|
||||
}
|
||||
|
||||
if ((esp_bt_controller_get_status() >= ESP_BT_CONTROLLER_STATUS_INITED) &&
|
||||
((os_ts - ll_last_write_ts) > UHCI_OUT_FLUSH_TIMEOUT_MS)) {
|
||||
ll_ev_flags |= BIT(LL_EV_FLAG_FLUSH_LOG);
|
||||
UHCI_OUT_LL_PUT_EV;
|
||||
}
|
||||
|
||||
esp_timer_start_once(flush_timer, UHCI_OUT_FLUSH_TIMEOUT_US);
|
||||
}
|
||||
|
||||
static void uhci_out_user_write_str(const uint8_t *src, uint16_t len)
|
||||
{
|
||||
if (!user_log_inited || !src || !len) {
|
||||
return;
|
||||
}
|
||||
|
||||
xSemaphoreTake(user_log_mutex, portMAX_DELAY);
|
||||
|
||||
bool need_append;
|
||||
if (uhci_out_log_cb_check_trans(user_log_cb, len, &need_append)) {
|
||||
uhci_out_trans_cb_t *trans_cb = user_log_cb->trans_cb[user_log_cb->trans_cb_idx];
|
||||
uint8_t *buf = trans_cb->buffer + trans_cb->length;
|
||||
|
||||
memcpy(buf, (const uint8_t *)src, len);
|
||||
trans_cb->length += len;
|
||||
}
|
||||
|
||||
if (need_append) {
|
||||
uhci_out_log_cb_append_trans(user_log_cb);
|
||||
}
|
||||
|
||||
user_last_write_ts = pdTICKS_TO_MS(xTaskGetTickCount());
|
||||
|
||||
xSemaphoreGive(user_log_mutex);
|
||||
}
|
||||
|
||||
#if UHCI_OUT_UART_PORT == UHCI_OUT_UART_PORT0
|
||||
static void uhci_out_user_write_char(char c)
|
||||
{
|
||||
uhci_out_user_write_str((const uint8_t *)&c, 1);
|
||||
}
|
||||
#endif // UHCI_OUT_UART_PORT == UHCI_OUT_UART_PORT0
|
||||
|
||||
static int uhci_out_user_log_init(void)
|
||||
{
|
||||
if (user_log_inited) {
|
||||
return 0;
|
||||
}
|
||||
|
||||
// Initialize mutex
|
||||
user_log_mutex = xSemaphoreCreateMutex();
|
||||
if (!user_log_mutex) {
|
||||
goto failed;
|
||||
}
|
||||
|
||||
// Initialize log control block
|
||||
if (uhci_out_log_cb_init(&user_log_cb, UHCI_OUT_USER_BUF_SIZE, LOG_CB_TYPE_USER, 0) != 0) {
|
||||
goto failed;
|
||||
}
|
||||
|
||||
// Initialization done
|
||||
user_log_inited = true;
|
||||
return 0;
|
||||
|
||||
failed:
|
||||
uhci_out_user_log_deinit();
|
||||
return -1;
|
||||
}
|
||||
|
||||
static void uhci_out_user_log_deinit(void)
|
||||
{
|
||||
user_log_inited = false;
|
||||
|
||||
if (!user_log_mutex) {
|
||||
return;
|
||||
}
|
||||
xSemaphoreTake(user_log_mutex, portMAX_DELAY);
|
||||
|
||||
uhci_out_log_cb_deinit(&user_log_cb);
|
||||
|
||||
xSemaphoreGive(user_log_mutex);
|
||||
vSemaphoreDelete(user_log_mutex);
|
||||
user_log_mutex = NULL;
|
||||
}
|
||||
|
||||
static int uhci_out_ll_log_init(void)
|
||||
{
|
||||
if (ll_log_inited) {
|
||||
return 0;
|
||||
}
|
||||
|
||||
if (uhci_out_log_cb_init(&ll_task_log_cb, UHCI_OUT_LL_TASK_BUF_SIZE,
|
||||
LOG_CB_TYPE_LL, LOG_CB_LL_SUBTYPE_TASK) != 0) {
|
||||
goto failed;
|
||||
}
|
||||
if (uhci_out_log_cb_init(&ll_isr_log_cb, UHCI_OUT_LL_ISR_BUF_SIZE,
|
||||
LOG_CB_TYPE_LL, LOG_CB_LL_SUBTYPE_ISR) != 0) {
|
||||
goto failed;
|
||||
}
|
||||
if (uhci_out_log_cb_init(&ll_hci_log_cb, UHCI_OUT_LL_HCI_BUF_SIZE,
|
||||
LOG_CB_TYPE_LL, LOG_CB_LL_SUBTYPE_HCI) != 0) {
|
||||
goto failed;
|
||||
}
|
||||
|
||||
ll_log_inited = true;
|
||||
return 0;
|
||||
|
||||
failed:
|
||||
uhci_out_ll_log_deinit();
|
||||
return -1;
|
||||
}
|
||||
|
||||
static void uhci_out_ll_log_deinit(void)
|
||||
{
|
||||
ll_log_inited = false;
|
||||
|
||||
uhci_out_log_cb_deinit(&ll_hci_log_cb);
|
||||
uhci_out_log_cb_deinit(&ll_isr_log_cb);
|
||||
uhci_out_log_cb_deinit(&ll_task_log_cb);
|
||||
}
|
||||
|
||||
static void uhci_out_ll_log_flush(void)
|
||||
{
|
||||
if (!ll_log_inited) {
|
||||
return;
|
||||
}
|
||||
|
||||
uhci_out_log_cb_write_loss(ll_task_log_cb);
|
||||
uhci_out_log_cb_write_loss(ll_hci_log_cb);
|
||||
|
||||
uhci_out_log_cb_flush_trans(ll_task_log_cb);
|
||||
uhci_out_log_cb_flush_trans(ll_hci_log_cb);
|
||||
|
||||
portMUX_TYPE spinlock = portMUX_INITIALIZER_UNLOCKED;
|
||||
portENTER_CRITICAL_SAFE(&spinlock);
|
||||
uhci_out_log_cb_write_loss(ll_isr_log_cb);
|
||||
uhci_out_log_cb_flush_trans(ll_isr_log_cb);
|
||||
portEXIT_CRITICAL_SAFE(&spinlock);
|
||||
|
||||
uhci_out_log_cb_append_trans(ll_task_log_cb);
|
||||
uhci_out_log_cb_append_trans(ll_hci_log_cb);
|
||||
uhci_out_log_cb_append_trans(ll_isr_log_cb);
|
||||
}
|
||||
|
||||
// Public functions
|
||||
int ble_log_uhci_out_init(void)
|
||||
{
|
||||
// Avoid double init
|
||||
if (uhci_out_inited) {
|
||||
return 0;
|
||||
}
|
||||
|
||||
#if UHCI_OUT_UART_NEED_INIT
|
||||
uart_config_t uart_config = {
|
||||
.baud_rate = UHCI_OUT_UART_BAUD_RATE,
|
||||
.data_bits = UART_DATA_8_BITS,
|
||||
.parity = UART_PARITY_DISABLE,
|
||||
.stop_bits = UART_STOP_BITS_1,
|
||||
.flow_ctrl = UART_HW_FLOWCTRL_CTS_RTS,
|
||||
.rx_flow_ctrl_thresh = 122,
|
||||
};
|
||||
// Configure UART parameters
|
||||
uart_param_config(UHCI_OUT_UART_PORT, &uart_config);
|
||||
uart_set_pin(UHCI_OUT_UART_PORT, UHCI_OUT_UART_IO_NUM_TX, -1, -1, -1);
|
||||
#endif // UHCI_OUT_UART_NEED_INIT
|
||||
|
||||
uhci_controller_config_t uhci_config = {
|
||||
.uart_port = UHCI_OUT_UART_PORT,
|
||||
.tx_trans_queue_depth = UHCI_OUT_QUEUE_SIZE,
|
||||
.max_receive_internal_mem = 1024,
|
||||
.max_transmit_size = UHCI_OUT_MAX_TRANSFER_SIZE,
|
||||
.dma_burst_size = 32,
|
||||
.rx_eof_flags.idle_eof = 1,
|
||||
};
|
||||
if (uhci_new_controller(&uhci_config, &uhci_handle) != ESP_OK) {
|
||||
goto failed;
|
||||
}
|
||||
|
||||
uhci_event_callbacks_t uhci_cbs = {
|
||||
.on_tx_trans_done = uhci_out_tx_done_cb,
|
||||
};
|
||||
uhci_register_event_callbacks(uhci_handle, &uhci_cbs, NULL);
|
||||
|
||||
if (uhci_out_user_log_init() != 0) {
|
||||
goto failed;
|
||||
}
|
||||
|
||||
if (uhci_out_ll_log_init() != 0) {
|
||||
goto failed;
|
||||
}
|
||||
|
||||
esp_timer_create_args_t timer_args = {
|
||||
.callback = (esp_timer_cb_t)esp_timer_cb_log_flush,
|
||||
.dispatch_method = ESP_TIMER_TASK
|
||||
};
|
||||
if (esp_timer_create(&timer_args, &flush_timer) != ESP_OK) {
|
||||
goto failed;
|
||||
}
|
||||
|
||||
#if UHCI_OUT_UART_PORT == UHCI_OUT_UART_PORT0
|
||||
// Install UART Driver if not installed
|
||||
if (!uart_is_driver_installed(UHCI_OUT_UART_PORT0)) {
|
||||
uart_driver_install(UHCI_OUT_UART_PORT0, UHCI_OUT_UART_DRIVER_RX_BUF_SIZE, 0, 0, NULL, 0);
|
||||
}
|
||||
|
||||
// Redirect UART VFS Driver to UART Driver
|
||||
uart_vfs_dev_use_driver(UHCI_OUT_UART_PORT0);
|
||||
|
||||
// Redirect esp_rom_printf to BLE Log UHCI Out
|
||||
esp_rom_install_channel_putc(1, uhci_out_user_write_char);
|
||||
esp_rom_install_channel_putc(2, NULL);
|
||||
#endif // UHCI_OUT_UART_PORT == UHCI_OUT_UART_PORT0
|
||||
|
||||
uhci_out_inited = true;
|
||||
esp_timer_start_once(flush_timer, UHCI_OUT_FLUSH_TIMEOUT_US);
|
||||
return 0;
|
||||
|
||||
failed:
|
||||
ble_log_uhci_out_deinit();
|
||||
return -1;
|
||||
}
|
||||
|
||||
void ble_log_uhci_out_deinit(void)
|
||||
{
|
||||
uhci_out_inited = false;
|
||||
|
||||
if (flush_timer) {
|
||||
esp_timer_stop(flush_timer);
|
||||
esp_timer_delete(flush_timer);
|
||||
flush_timer = NULL;
|
||||
}
|
||||
|
||||
if (uhci_handle) {
|
||||
uhci_wait_all_tx_transaction_done(uhci_handle, portMAX_DELAY);
|
||||
uhci_del_controller(uhci_handle);
|
||||
uhci_handle = NULL;
|
||||
}
|
||||
|
||||
uhci_out_ll_log_deinit();
|
||||
uhci_out_user_log_deinit();
|
||||
}
|
||||
|
||||
IRAM_ATTR void ble_log_uhci_out_ll_write(uint32_t len, const uint8_t *addr, uint32_t len_append,
|
||||
const uint8_t *addr_append, uint32_t flag)
|
||||
{
|
||||
// Raw logs will come in case of assert, shall be printed to console directly
|
||||
if (flag & BIT(LL_LOG_FLAG_RAW)) {
|
||||
if (len && addr) {
|
||||
for (uint32_t i = 0; i < len; i++) { esp_rom_printf("%02x ", addr[i]); }
|
||||
}
|
||||
if (len_append && addr_append) {
|
||||
for (uint32_t i = 0; i < len_append; i++) { esp_rom_printf("%02x ", addr_append[i]); }
|
||||
}
|
||||
if (flag & BIT(LL_LOG_FLAG_END)) { esp_rom_printf("\n"); }
|
||||
}
|
||||
|
||||
if (!ll_log_inited) {
|
||||
return;
|
||||
}
|
||||
|
||||
bool in_isr = false;
|
||||
uint8_t source;
|
||||
uhci_out_log_cb_t *log_cb;
|
||||
if (flag & BIT(LL_LOG_FLAG_ISR)) {
|
||||
log_cb = ll_isr_log_cb;
|
||||
source = BLE_LOG_UHCI_OUT_SOURCE_ESP_ISR;
|
||||
in_isr = true;
|
||||
} else if (flag & BIT(LL_LOG_FLAG_HCI)) {
|
||||
log_cb = ll_hci_log_cb;
|
||||
source = BLE_LOG_UHCI_OUT_SOURCE_LL_HCI;
|
||||
} else {
|
||||
log_cb = ll_task_log_cb;
|
||||
source = BLE_LOG_UHCI_OUT_SOURCE_ESP;
|
||||
}
|
||||
|
||||
bool need_append;
|
||||
uint16_t frame_len = len + len_append + UHCI_OUT_FRAME_OVERHEAD;
|
||||
if (uhci_out_log_cb_check_trans(log_cb, frame_len, &need_append)) {
|
||||
need_append |= uhci_out_log_cb_write(log_cb, addr, len, addr_append,
|
||||
len_append, source);
|
||||
}
|
||||
|
||||
ll_last_write_ts = in_isr?\
|
||||
pdTICKS_TO_MS(xTaskGetTickCountFromISR()):\
|
||||
pdTICKS_TO_MS(xTaskGetTickCount());
|
||||
|
||||
if (need_append) {
|
||||
if (in_isr) {
|
||||
ll_ev_flags |= BIT(LL_EV_FLAG_ISR_APPEND);
|
||||
UHCI_OUT_LL_PUT_EV;
|
||||
} else {
|
||||
uhci_out_log_cb_append_trans(log_cb);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
IRAM_ATTR void ble_log_uhci_out_ll_log_ev_proc(void)
|
||||
{
|
||||
if (!ll_log_inited) {
|
||||
return;
|
||||
}
|
||||
|
||||
if (ll_ev_flags & BIT(LL_EV_FLAG_ISR_APPEND)) {
|
||||
uhci_out_log_cb_append_trans(ll_isr_log_cb);
|
||||
ll_ev_flags &= ~BIT(LL_EV_FLAG_ISR_APPEND);
|
||||
}
|
||||
|
||||
if (ll_ev_flags & BIT(LL_EV_FLAG_FLUSH_LOG)) {
|
||||
uhci_out_ll_log_flush();
|
||||
ll_ev_flags &= ~BIT(LL_EV_FLAG_FLUSH_LOG);
|
||||
}
|
||||
|
||||
ll_ev_flags = 0;
|
||||
}
|
||||
|
||||
// Redirect UART Driver to BLE Log UHCI Out
|
||||
int __real_uart_tx_chars(uart_port_t uart_num, const char *buffer, uint32_t len);
|
||||
int __wrap_uart_tx_chars(uart_port_t uart_num, const char *buffer, uint32_t len)
|
||||
{
|
||||
#if UHCI_OUT_UART_PORT == UHCI_OUT_UART_PORT0
|
||||
uhci_out_user_write_str((const uint8_t *)buffer, len);
|
||||
return 0;
|
||||
#else
|
||||
return __real_uart_tx_chars(uart_num, buffer, len);
|
||||
#endif // UHCI_OUT_UART_PORT == UHCI_OUT_UART_PORT0
|
||||
}
|
||||
|
||||
int __real_uart_write_bytes(uart_port_t uart_num, const void *src, size_t size);
|
||||
int __wrap_uart_write_bytes(uart_port_t uart_num, const void *src, size_t size)
|
||||
{
|
||||
#if UHCI_OUT_UART_PORT == UHCI_OUT_UART_PORT0
|
||||
uhci_out_user_write_str((const uint8_t *)src, size);
|
||||
return 0;
|
||||
#else
|
||||
return __real_uart_write_bytes(uart_num, src, size);
|
||||
#endif // UHCI_OUT_UART_PORT == UHCI_OUT_UART_PORT0
|
||||
}
|
||||
|
||||
int __real_uart_write_bytes_with_break(uart_port_t uart_num, const void *src, size_t size, int brk_len);
|
||||
int __wrap_uart_write_bytes_with_break(uart_port_t uart_num, const void *src, size_t size, int brk_len)
|
||||
{
|
||||
#if UHCI_OUT_UART_PORT == UHCI_OUT_UART_PORT0
|
||||
return __wrap_uart_write_bytes(uart_num, src, size);
|
||||
#else
|
||||
return __real_uart_write_bytes_with_break(uart_num, src, size, brk_len);
|
||||
#endif // UHCI_OUT_UART_PORT == UHCI_OUT_UART_PORT0
|
||||
}
|
||||
|
||||
void ble_log_uhci_out_dump_all(void)
|
||||
{
|
||||
if (!uhci_out_inited) {
|
||||
return;
|
||||
}
|
||||
|
||||
#if UHCI_OUT_UART_PORT == UHCI_OUT_UART_PORT0
|
||||
esp_rom_output_tx_wait_idle(UHCI_OUT_UART_PORT0);
|
||||
esp_rom_install_uart_printf();
|
||||
#endif // UHCI_OUT_UART_PORT == UHCI_OUT_UART_PORT0
|
||||
|
||||
portMUX_TYPE spinlock = portMUX_INITIALIZER_UNLOCKED;
|
||||
portENTER_CRITICAL_SAFE(&spinlock);
|
||||
|
||||
if (ll_log_inited) {
|
||||
esp_rom_printf("[DUMP_START:\n");
|
||||
uhci_out_log_cb_dump(ll_isr_log_cb);
|
||||
uhci_out_log_cb_dump(ll_task_log_cb);
|
||||
uhci_out_log_cb_dump(ll_hci_log_cb);
|
||||
esp_rom_printf("\n:DUMP_END]\n\n");
|
||||
}
|
||||
portEXIT_CRITICAL_SAFE(&spinlock);
|
||||
|
||||
#if UHCI_OUT_UART_PORT == UHCI_OUT_UART_PORT0
|
||||
esp_rom_install_channel_putc(1, uhci_out_user_write_char);
|
||||
#endif // UHCI_OUT_UART_PORT == UHCI_OUT_UART_PORT0
|
||||
}
|
||||
#endif // CONFIG_BT_BLE_LOG_UHCI_OUT_ENABLED
|
||||
@@ -11,9 +11,8 @@
|
||||
#include "driver/spi_master.h"
|
||||
#include "driver/gpio.h"
|
||||
#include "esp_timer.h"
|
||||
#include "esp_log.h"
|
||||
#include "freertos/semphr.h"
|
||||
#include "esp_heap_caps.h"
|
||||
#include "esp_task.h"
|
||||
|
||||
// Public enums
|
||||
enum {
|
||||
@@ -27,22 +26,21 @@ enum {
|
||||
BLE_LOG_SPI_OUT_SOURCE_ESP_LEGACY_ISR,
|
||||
BLE_LOG_SPI_OUT_SOURCE_LL_HCI,
|
||||
BLE_LOG_SPI_OUT_SOURCE_LE_AUDIO,
|
||||
BLE_LOG_SPI_OUT_SOURCE_MESH,
|
||||
BLE_LOG_SPI_OUT_SOURCE_USER = 0x10,
|
||||
BLE_LOG_SPI_OUT_SOURCE_SSC = 0xFD,
|
||||
BLE_LOG_SPI_OUT_SOURCE_SYNC,
|
||||
BLE_LOG_SPI_OUT_SOURCE_LOSS,
|
||||
};
|
||||
|
||||
#define BLE_LOG_SPI_OUT_LEVEL_NONE 0
|
||||
#define BLE_LOG_SPI_OUT_LEVEL_ERROR 1
|
||||
#define BLE_LOG_SPI_OUT_LEVEL_WARN 2
|
||||
#define BLE_LOG_SPI_OUT_LEVEL_INFO 3
|
||||
#define BLE_LOG_SPI_OUT_LEVEL_DEBUG 4
|
||||
#define BLE_LOG_SPI_OUT_LEVEL_VERBOSE 5
|
||||
#define BLE_LOG_SPI_OUT_STR(x) #x
|
||||
#define BLE_LOG_SPI_OUT_XSTR(x) BLE_LOG_SPI_OUT_STR(x)
|
||||
#define BLE_LOG_SPI_OUT_BUILD_PREFIX(LEVEL, TAG) "[" BLE_LOG_SPI_OUT_XSTR(LEVEL) "][" TAG "]"
|
||||
enum {
|
||||
BLE_LOG_SPI_OUT_LEVEL_NONE = 0,
|
||||
BLE_LOG_SPI_OUT_LEVEL_ERROR,
|
||||
BLE_LOG_SPI_OUT_LEVEL_WARN,
|
||||
BLE_LOG_SPI_OUT_LEVEL_INFO,
|
||||
BLE_LOG_SPI_OUT_LEVEL_DEBUG,
|
||||
BLE_LOG_SPI_OUT_LEVEL_VERBOSE,
|
||||
BLE_LOG_SPI_OUT_LEVEL_MAX,
|
||||
};
|
||||
|
||||
// Public functions
|
||||
int ble_log_spi_out_init(void);
|
||||
@@ -54,12 +52,12 @@ void ble_log_spi_out_ll_write(uint32_t len, const uint8_t *addr, uint32_t len_ap
|
||||
void ble_log_spi_out_ll_log_ev_proc(void);
|
||||
void ble_log_spi_out_ts_sync_start(void);
|
||||
void ble_log_spi_out_ts_sync_stop(void);
|
||||
int ble_log_spi_out_printf(uint8_t source, const char *format, ...);
|
||||
int ble_log_spi_out_printf_enh(uint8_t source, uint8_t level, const char *tag, const char *format, ...);
|
||||
int ble_log_spi_out_write_with_ts(uint8_t source, const uint8_t *addr, uint16_t len);
|
||||
void ble_log_spi_out_dump_all(void);
|
||||
void ble_log_spi_out_enable(bool enable);
|
||||
void ble_log_spi_out_flush(void);
|
||||
void ble_log_spi_out_le_audio_write(const uint8_t *addr, uint16_t len);
|
||||
int ble_log_spi_out_host_write(uint8_t source, const char *prefix, const char *format, ...);
|
||||
int ble_log_spi_out_hci_write(uint8_t source, const uint8_t *addr, uint16_t len);
|
||||
int ble_log_spi_out_mesh_write(const char *prefix, const char *format, ...);
|
||||
|
||||
#endif // __BT_SPI_OUT_H__
|
||||
|
||||
@@ -1,35 +0,0 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
#ifndef __BT_SPI_OUT_H__
|
||||
#define __BT_SPI_OUT_H__
|
||||
|
||||
#include <stdarg.h>
|
||||
#include <string.h>
|
||||
#include "driver/uhci.h"
|
||||
#include "driver/uart.h"
|
||||
#include "driver/uart_vfs.h"
|
||||
#include "esp_rom_uart.h"
|
||||
#include "esp_timer.h"
|
||||
#include "freertos/semphr.h"
|
||||
|
||||
// Public enums
|
||||
enum {
|
||||
BLE_LOG_UHCI_OUT_SOURCE_ESP = 0,
|
||||
BLE_LOG_UHCI_OUT_SOURCE_ESP_ISR = 6,
|
||||
BLE_LOG_UHCI_OUT_SOURCE_LL_HCI = 8,
|
||||
BLE_LOG_UHCI_OUT_SOURCE_USER = 0x10,
|
||||
BLE_LOG_UHCI_OUT_SOURCE_LOSS = 0xFF,
|
||||
};
|
||||
|
||||
// Public functions
|
||||
int ble_log_uhci_out_init(void);
|
||||
void ble_log_uhci_out_deinit(void);
|
||||
void ble_log_uhci_out_ll_write(uint32_t len, const uint8_t *addr, uint32_t len_append,
|
||||
const uint8_t *addr_append, uint32_t flag);
|
||||
void ble_log_uhci_out_ll_log_ev_proc(void);
|
||||
void ble_log_uhci_out_dump_all(void);
|
||||
|
||||
#endif // __BT_SPI_OUT_H__
|
||||
@@ -298,7 +298,7 @@ int esp_blufi_gatt_svr_deinit(void)
|
||||
return 0;
|
||||
}
|
||||
|
||||
int
|
||||
static int
|
||||
esp_blufi_gap_event(struct ble_gap_event *event, void *arg)
|
||||
{
|
||||
struct ble_gap_conn_desc desc;
|
||||
@@ -331,7 +331,7 @@ esp_blufi_gap_event(struct ble_gap_event *event, void *arg)
|
||||
}
|
||||
if (event->connect.status != 0) {
|
||||
/* Connection failed; resume advertising. */
|
||||
((void(*)(void))arg)();
|
||||
esp_blufi_adv_start();
|
||||
}
|
||||
return 0;
|
||||
case BLE_GAP_EVENT_DISCONNECT:
|
||||
@@ -366,7 +366,7 @@ esp_blufi_gap_event(struct ble_gap_event *event, void *arg)
|
||||
case BLE_GAP_EVENT_ADV_COMPLETE:
|
||||
ESP_LOGI(TAG, "advertise complete; reason=%d",
|
||||
event->adv_complete.reason);
|
||||
((void(*)(void))arg)();
|
||||
esp_blufi_adv_start();
|
||||
return 0;
|
||||
|
||||
case BLE_GAP_EVENT_SUBSCRIBE:
|
||||
@@ -461,7 +461,7 @@ void esp_blufi_adv_start(void)
|
||||
adv_params.conn_mode = BLE_GAP_CONN_MODE_UND;
|
||||
adv_params.disc_mode = BLE_GAP_DISC_MODE_GEN;
|
||||
rc = ble_gap_adv_start(own_addr_type, NULL, BLE_HS_FOREVER,
|
||||
&adv_params, esp_blufi_gap_event, esp_blufi_adv_start);
|
||||
&adv_params, esp_blufi_gap_event, NULL);
|
||||
if (rc != 0) {
|
||||
ESP_LOGE(TAG, "error enabling advertisement; rc=%d", rc);
|
||||
return;
|
||||
|
||||
@@ -10,7 +10,6 @@
|
||||
#include "bt_common.h"
|
||||
#include "osi/mutex.h"
|
||||
#include "esp_attr.h"
|
||||
#include "esp_timer.h"
|
||||
|
||||
#if (BT_HCI_LOG_INCLUDED == TRUE)
|
||||
#define BT_HCI_LOG_PRINT_TAG (1)
|
||||
@@ -209,8 +208,6 @@ esp_err_t IRAM_ATTR bt_hci_log_record_data(bt_hci_log_t *p_hci_log_ctl, char *st
|
||||
{
|
||||
osi_mutex_t mutex_lock;
|
||||
uint8_t *g_hci_log_buffer;
|
||||
int64_t ts;
|
||||
uint8_t *temp_buf;
|
||||
|
||||
if (!p_hci_log_ctl->p_hci_log_buffer) {
|
||||
return ESP_FAIL;
|
||||
@@ -222,16 +219,6 @@ esp_err_t IRAM_ATTR bt_hci_log_record_data(bt_hci_log_t *p_hci_log_ctl, char *st
|
||||
return ESP_FAIL;
|
||||
}
|
||||
|
||||
ts = esp_timer_get_time();
|
||||
|
||||
temp_buf = (uint8_t *)malloc(data_len + 8);
|
||||
memset(temp_buf, 0x0, data_len + 8);
|
||||
|
||||
memcpy(temp_buf, &ts, 8);
|
||||
memcpy(temp_buf + 8, data, data_len);
|
||||
|
||||
data_len += 8;
|
||||
|
||||
mutex_lock = p_hci_log_ctl->mutex_lock;
|
||||
osi_mutex_lock(&mutex_lock, OSI_MUTEX_MAX_TIMEOUT);
|
||||
|
||||
@@ -263,7 +250,7 @@ esp_err_t IRAM_ATTR bt_hci_log_record_data(bt_hci_log_t *p_hci_log_ctl, char *st
|
||||
bt_hci_log_record_string(p_hci_log_ctl, str);
|
||||
}
|
||||
|
||||
bt_hci_log_record_hex(p_hci_log_ctl, temp_buf, data_len);
|
||||
bt_hci_log_record_hex(p_hci_log_ctl, data, data_len);
|
||||
|
||||
g_hci_log_buffer[p_hci_log_ctl->log_record_in] = '\n';
|
||||
|
||||
@@ -279,8 +266,6 @@ esp_err_t IRAM_ATTR bt_hci_log_record_data(bt_hci_log_t *p_hci_log_ctl, char *st
|
||||
|
||||
osi_mutex_unlock(&mutex_lock);
|
||||
|
||||
free(temp_buf);
|
||||
|
||||
return ESP_OK;
|
||||
}
|
||||
|
||||
|
||||
@@ -459,7 +459,6 @@ config BTDM_CTRL_SCAN_BACKOFF_UPPERLIMITMAX
|
||||
|
||||
config BTDM_CTRL_CHECK_CONNECT_IND_ACCESS_ADDRESS
|
||||
bool "Enable enhanced Access Address check in CONNECT_IND"
|
||||
depends on (BTDM_CTRL_MODE_BLE_ONLY || BTDM_CTRL_MODE_BTDM)
|
||||
default n
|
||||
help
|
||||
Enabling this option will add stricter verification of the Access Address in the CONNECT_IND PDU.
|
||||
|
||||
@@ -252,7 +252,6 @@ extern uint32_t _bt_controller_data_end;
|
||||
extern void config_bt_funcs_reset(void);
|
||||
extern void config_ble_funcs_reset(void);
|
||||
extern void config_btdm_funcs_reset(void);
|
||||
extern void btdm_aa_check_enhance_enable(void);
|
||||
|
||||
#ifdef CONFIG_BT_BLUEDROID_ENABLED
|
||||
extern void bt_stack_enableSecCtrlVsCmd(bool en);
|
||||
@@ -262,7 +261,6 @@ extern void bt_stack_enableCoexVsCmd(bool en);
|
||||
extern void scan_stack_enableAdvFlowCtrlVsCmd(bool en);
|
||||
extern void adv_stack_enableClearLegacyAdvVsCmd(bool en);
|
||||
extern void advFilter_stack_enableDupExcListVsCmd(bool en);
|
||||
extern void arr_stack_enableMultiConnVsCmd(bool en);
|
||||
#endif // (CONFIG_BT_NIMBLE_ENABLED) || (CONFIG_BT_BLUEDROID_ENABLED)
|
||||
|
||||
/* Local Function Declare
|
||||
@@ -1542,14 +1540,12 @@ static esp_err_t btdm_low_power_mode_init(void)
|
||||
bool select_src_ret __attribute__((unused));
|
||||
bool set_div_ret __attribute__((unused));
|
||||
if (btdm_lpclk_sel == ESP_BT_SLEEP_CLOCK_MAIN_XTAL) {
|
||||
ESP_LOGI(BTDM_LOG_TAG, "Using main XTAL as clock source");
|
||||
select_src_ret = btdm_lpclk_select_src(BTDM_LPCLK_SEL_XTAL);
|
||||
set_div_ret = btdm_lpclk_set_div(esp_clk_xtal_freq() * 2 / MHZ - 1);
|
||||
assert(select_src_ret && set_div_ret);
|
||||
btdm_lpcycle_us_frac = RTC_CLK_CAL_FRACT;
|
||||
btdm_lpcycle_us = 2 << (btdm_lpcycle_us_frac);
|
||||
} else { // btdm_lpclk_sel == BTDM_LPCLK_SEL_XTAL32K
|
||||
ESP_LOGI(BTDM_LOG_TAG, "Using external 32.768 kHz crystal/oscillator as clock source");
|
||||
select_src_ret = btdm_lpclk_select_src(BTDM_LPCLK_SEL_XTAL32K);
|
||||
set_div_ret = btdm_lpclk_set_div(0);
|
||||
assert(select_src_ret && set_div_ret);
|
||||
@@ -1728,7 +1724,6 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
|
||||
scan_stack_enableAdvFlowCtrlVsCmd(true);
|
||||
adv_stack_enableClearLegacyAdvVsCmd(true);
|
||||
advFilter_stack_enableDupExcListVsCmd(true);
|
||||
arr_stack_enableMultiConnVsCmd(true);
|
||||
#endif // (CONFIG_BT_NIMBLE_ENABLED) || (CONFIG_BT_BLUEDROID_ENABLED)
|
||||
|
||||
btdm_controller_status = ESP_BT_CONTROLLER_STATUS_INITED;
|
||||
@@ -1768,7 +1763,6 @@ esp_err_t esp_bt_controller_deinit(void)
|
||||
scan_stack_enableAdvFlowCtrlVsCmd(false);
|
||||
adv_stack_enableClearLegacyAdvVsCmd(false);
|
||||
advFilter_stack_enableDupExcListVsCmd(false);
|
||||
arr_stack_enableMultiConnVsCmd(false);
|
||||
#endif // (CONFIG_BT_NIMBLE_ENABLED) || (CONFIG_BT_BLUEDROID_ENABLED)
|
||||
|
||||
return ESP_OK;
|
||||
@@ -1855,10 +1849,6 @@ static void patch_apply(void)
|
||||
#ifndef CONFIG_BTDM_CTRL_MODE_BR_EDR_ONLY
|
||||
config_ble_funcs_reset();
|
||||
#endif
|
||||
|
||||
#if BTDM_CTRL_CHECK_CONNECT_IND_ACCESS_ADDRESS_ENABLED
|
||||
btdm_aa_check_enhance_enable();
|
||||
#endif
|
||||
}
|
||||
|
||||
esp_err_t esp_bt_controller_enable(esp_bt_mode_t mode)
|
||||
|
||||
@@ -57,17 +57,17 @@ xt_highint4:
|
||||
wsr a0, CCOMPARE2
|
||||
|
||||
/* Enable Timer 2 interrupt */
|
||||
rsr a0, INTENABLE
|
||||
rsr a0, XT_REG_INTENABLE
|
||||
extui a0, a0, 16, 1
|
||||
bnez a0, 1f
|
||||
movi a0, 0
|
||||
xsr a0, INTENABLE /* disable all interrupts */
|
||||
xsr a0, XT_REG_INTENABLE /* disable all interrupts */
|
||||
/* And a0 with (1 << 16) for Timer 2 interrupt mask */
|
||||
addmi a0, a0, (1<<14)
|
||||
addmi a0, a0, (1<<14)
|
||||
addmi a0, a0, (1<<14)
|
||||
addmi a0, a0, (1<<14)
|
||||
wsr a0, INTENABLE /* Enable Timer 2 */
|
||||
wsr a0, XT_REG_INTENABLE /* Enable Timer 2 */
|
||||
1:
|
||||
#endif
|
||||
|
||||
@@ -76,37 +76,37 @@ xt_highint4:
|
||||
s32i a1, a0, 4
|
||||
s32i a2, a0, 8
|
||||
s32i a3, a0, 12
|
||||
rsr a2, EXCSAVE_4 /* holds the value of a0 */
|
||||
rsr a2, XT_REG_EXCSAVE_4 /* holds the value of a0 */
|
||||
s32i a2, a0, 0
|
||||
|
||||
/* Save special registers */
|
||||
addi a0, a0, SPECREG_OFFSET
|
||||
rsr a2, WINDOWBASE
|
||||
rsr a2, XT_REG_WINDOWBASE
|
||||
s32i a2, a0, 0
|
||||
rsr a2, WINDOWSTART
|
||||
rsr a2, XT_REG_WINDOWSTART
|
||||
s32i a2, a0, 4
|
||||
rsr a2, SAR
|
||||
rsr a2, XT_REG_SAR
|
||||
s32i a2, a0, 8
|
||||
rsr a2, LBEG
|
||||
rsr a2, XT_REG_LBEG
|
||||
s32i a2, a0, 12
|
||||
rsr a2, LEND
|
||||
rsr a2, XT_REG_LEND
|
||||
s32i a2, a0, 16
|
||||
rsr a2, LCOUNT
|
||||
rsr a2, XT_REG_LCOUNT
|
||||
s32i a2, a0, 20
|
||||
rsr a2, EPC1
|
||||
s32i a2, a0, 24
|
||||
|
||||
#if CONFIG_ESP32_ECO3_CACHE_LOCK_FIX
|
||||
movi a0, 0
|
||||
xsr a0, INTENABLE /* disable all interrupts */
|
||||
xsr a0, XT_REG_INTENABLE /* disable all interrupts */
|
||||
movi a2, ~(1<<16)
|
||||
and a0, a2, a0
|
||||
wsr a0, INTENABLE
|
||||
wsr a0, XT_REG_INTENABLE
|
||||
#endif
|
||||
|
||||
/* disable exception mode, window overflow */
|
||||
movi a0, PS_INTLEVEL(5) | PS_EXCM
|
||||
wsr a0, PS
|
||||
wsr a0, XT_REG_PS
|
||||
rsync
|
||||
|
||||
/* Save the remaining physical registers.
|
||||
@@ -153,12 +153,12 @@ xt_highint4:
|
||||
/* a0 still points to _l4_save_ctx */
|
||||
|
||||
/* Can clear WINDOWSTART now, all registers are saved */
|
||||
rsr a2, WINDOWBASE
|
||||
rsr a2, XT_REG_WINDOWBASE
|
||||
/* WINDOWSTART = (1 << WINDOWBASE) */
|
||||
movi a3, 1
|
||||
ssl a2
|
||||
sll a3, a3
|
||||
wsr a3, WINDOWSTART
|
||||
wsr a3, XT_REG_WINDOWSTART
|
||||
|
||||
_highint4_stack_switch:
|
||||
movi a0, 0
|
||||
@@ -169,7 +169,7 @@ _highint4_stack_switch:
|
||||
|
||||
/* Set up PS for C, disable all interrupts except NMI and debug, and clear EXCM. */
|
||||
movi a6, PS_INTLEVEL(4) | PS_UM | PS_WOE
|
||||
wsr a6, PS
|
||||
wsr a6, XT_REG_PS
|
||||
rsync
|
||||
|
||||
/* Call C handler */
|
||||
@@ -180,7 +180,7 @@ _highint4_stack_switch:
|
||||
|
||||
/* Done with C handler; re-enable exception mode, disabling window overflow */
|
||||
movi a2, PS_INTLEVEL(5) | PS_EXCM /* TOCHECK */
|
||||
wsr a2, PS
|
||||
wsr a2, XT_REG_PS
|
||||
rsync
|
||||
|
||||
/* Restore the special registers.
|
||||
@@ -188,13 +188,13 @@ _highint4_stack_switch:
|
||||
*/
|
||||
movi a0, _l4_save_ctx + SPECREG_OFFSET
|
||||
l32i a2, a0, 8
|
||||
wsr a2, SAR
|
||||
wsr a2, XT_REG_SAR
|
||||
l32i a2, a0, 12
|
||||
wsr a2, LBEG
|
||||
wsr a2, XT_REG_LBEG
|
||||
l32i a2, a0, 16
|
||||
wsr a2, LEND
|
||||
wsr a2, XT_REG_LEND
|
||||
l32i a2, a0, 20
|
||||
wsr a2, LCOUNT
|
||||
wsr a2, XT_REG_LCOUNT
|
||||
l32i a2, a0, 24
|
||||
wsr a2, EPC1
|
||||
|
||||
@@ -247,12 +247,12 @@ _highint4_stack_switch:
|
||||
movi a0, _l4_save_ctx
|
||||
|
||||
l32i a2, a0, SPECREG_OFFSET + 4
|
||||
wsr a2, WINDOWSTART
|
||||
wsr a2, XT_REG_WINDOWSTART
|
||||
|
||||
l32i a1, a0, 4
|
||||
l32i a2, a0, 8
|
||||
l32i a3, a0, 12
|
||||
rsr a0, EXCSAVE_4 /* holds the value of a0 before the interrupt handler */
|
||||
rsr a0, XT_REG_EXCSAVE_4 /* holds the value of a0 before the interrupt handler */
|
||||
|
||||
/* Return from the interrupt, restoring PS from EPS_4 */
|
||||
rfi 4
|
||||
|
||||
@@ -281,103 +281,94 @@ config BT_LE_CONTROLLER_TASK_STACK_SIZE
|
||||
help
|
||||
This configures stack size of NimBLE controller task
|
||||
|
||||
menu "Controller debug features"
|
||||
menuconfig BT_LE_CONTROLLER_LOG_ENABLED
|
||||
bool "Controller log enable"
|
||||
default n
|
||||
help
|
||||
Enable controller log
|
||||
menuconfig BT_LE_CONTROLLER_LOG_ENABLED
|
||||
bool "Controller log enable"
|
||||
default n
|
||||
help
|
||||
Enable controller log
|
||||
|
||||
config BT_LE_CONTROLLER_LOG_CTRL_ENABLED
|
||||
bool "enable controller log module"
|
||||
depends on BT_LE_CONTROLLER_LOG_ENABLED
|
||||
default y
|
||||
help
|
||||
Enable controller log module
|
||||
config BT_LE_CONTROLLER_LOG_CTRL_ENABLED
|
||||
bool "enable controller log module"
|
||||
depends on BT_LE_CONTROLLER_LOG_ENABLED
|
||||
default y
|
||||
help
|
||||
Enable controller log module
|
||||
|
||||
config BT_LE_CONTROLLER_LOG_HCI_ENABLED
|
||||
bool "enable HCI log module"
|
||||
depends on BT_LE_CONTROLLER_LOG_ENABLED
|
||||
default y
|
||||
help
|
||||
Enable hci log module
|
||||
config BT_LE_CONTROLLER_LOG_HCI_ENABLED
|
||||
bool "enable HCI log module"
|
||||
depends on BT_LE_CONTROLLER_LOG_ENABLED
|
||||
default y
|
||||
help
|
||||
Enable hci log module
|
||||
|
||||
config BT_LE_CONTROLLER_LOG_DUMP_ONLY
|
||||
bool "Controller log dump mode only"
|
||||
depends on BT_LE_CONTROLLER_LOG_ENABLED
|
||||
default y
|
||||
help
|
||||
Only operate in dump mode
|
||||
config BT_LE_CONTROLLER_LOG_DUMP_ONLY
|
||||
bool "Controller log dump mode only"
|
||||
depends on BT_LE_CONTROLLER_LOG_ENABLED
|
||||
default y
|
||||
help
|
||||
Only operate in dump mode
|
||||
|
||||
config BT_LE_CONTROLLER_LOG_SPI_OUT_ENABLED
|
||||
bool "Output ble controller logs to SPI bus (Experimental)"
|
||||
depends on BT_LE_CONTROLLER_LOG_ENABLED
|
||||
depends on !BT_LE_CONTROLLER_LOG_DUMP_ONLY
|
||||
select BT_BLE_LOG_SPI_OUT_ENABLED
|
||||
default n
|
||||
help
|
||||
Output ble controller logs to SPI bus
|
||||
config BT_LE_CONTROLLER_LOG_SPI_OUT_ENABLED
|
||||
bool "Output ble controller logs to SPI bus (Experimental)"
|
||||
depends on BT_LE_CONTROLLER_LOG_ENABLED
|
||||
depends on !BT_LE_CONTROLLER_LOG_DUMP_ONLY
|
||||
select BT_BLE_LOG_SPI_OUT_ENABLED
|
||||
default n
|
||||
help
|
||||
Output ble controller logs to SPI bus
|
||||
|
||||
config BT_LE_CONTROLLER_LOG_STORAGE_ENABLE
|
||||
bool "Store ble controller logs to flash(Experimental)"
|
||||
depends on !BT_LE_CONTROLLER_LOG_DUMP_ONLY
|
||||
depends on BT_LE_CONTROLLER_LOG_ENABLED
|
||||
default n
|
||||
help
|
||||
Store ble controller logs to flash memory.
|
||||
config BT_LE_CONTROLLER_LOG_STORAGE_ENABLE
|
||||
bool "Store ble controller logs to flash(Experimental)"
|
||||
depends on !BT_LE_CONTROLLER_LOG_DUMP_ONLY
|
||||
depends on BT_LE_CONTROLLER_LOG_ENABLED
|
||||
default n
|
||||
help
|
||||
Store ble controller logs to flash memory.
|
||||
|
||||
config BT_LE_CONTROLLER_LOG_PARTITION_SIZE
|
||||
int "size of ble controller log partition(Multiples of 4K)"
|
||||
depends on BT_LE_CONTROLLER_LOG_STORAGE_ENABLE
|
||||
default 65536
|
||||
help
|
||||
The size of ble controller log partition shall be a multiples of 4K.
|
||||
The name of log partition shall be "bt_ctrl_log".
|
||||
The partition type shall be ESP_PARTITION_TYPE_DATA.
|
||||
The partition sub_type shall be ESP_PARTITION_SUBTYPE_ANY.
|
||||
config BT_LE_CONTROLLER_LOG_PARTITION_SIZE
|
||||
int "size of ble controller log partition(Multiples of 4K)"
|
||||
depends on BT_LE_CONTROLLER_LOG_STORAGE_ENABLE
|
||||
default 65536
|
||||
help
|
||||
The size of ble controller log partition shall be a multiples of 4K.
|
||||
The name of log partition shall be "bt_ctrl_log".
|
||||
The partition type shall be ESP_PARTITION_TYPE_DATA.
|
||||
The partition sub_type shall be ESP_PARTITION_SUBTYPE_ANY.
|
||||
|
||||
config BT_LE_LOG_CTRL_BUF1_SIZE
|
||||
int "size of the first BLE controller LOG buffer"
|
||||
depends on BT_LE_CONTROLLER_LOG_ENABLED
|
||||
default 4096
|
||||
help
|
||||
Configure the size of the first BLE controller LOG buffer.
|
||||
config BT_LE_LOG_CTRL_BUF1_SIZE
|
||||
int "size of the first BLE controller LOG buffer"
|
||||
depends on BT_LE_CONTROLLER_LOG_ENABLED
|
||||
default 4096
|
||||
help
|
||||
Configure the size of the first BLE controller LOG buffer.
|
||||
|
||||
config BT_LE_LOG_CTRL_BUF2_SIZE
|
||||
int "size of the second BLE controller LOG buffer"
|
||||
depends on BT_LE_CONTROLLER_LOG_ENABLED
|
||||
default 1024
|
||||
help
|
||||
Configure the size of the second BLE controller LOG buffer.
|
||||
config BT_LE_LOG_CTRL_BUF2_SIZE
|
||||
int "size of the second BLE controller LOG buffer"
|
||||
depends on BT_LE_CONTROLLER_LOG_ENABLED
|
||||
default 1024
|
||||
help
|
||||
Configure the size of the second BLE controller LOG buffer.
|
||||
|
||||
config BT_LE_LOG_HCI_BUF_SIZE
|
||||
int "size of the BLE HCI LOG buffer"
|
||||
depends on BT_LE_CONTROLLER_LOG_ENABLED
|
||||
default 4096
|
||||
help
|
||||
Configure the size of the BLE HCI LOG buffer.
|
||||
config BT_LE_LOG_HCI_BUF_SIZE
|
||||
int "size of the BLE HCI LOG buffer"
|
||||
depends on BT_LE_CONTROLLER_LOG_ENABLED
|
||||
default 4096
|
||||
help
|
||||
Configure the size of the BLE HCI LOG buffer.
|
||||
|
||||
config BT_LE_CONTROLLER_LOG_WRAP_PANIC_HANDLER_ENABLE
|
||||
bool "Enable wrap panic handler"
|
||||
depends on BT_LE_CONTROLLER_LOG_ENABLED
|
||||
default n
|
||||
help
|
||||
Wrap esp_panic_handler to get controller logs when PC pointer exception crashes.
|
||||
|
||||
config BT_LE_CONTROLLER_LOG_TASK_WDT_USER_HANDLER_ENABLE
|
||||
bool "Enable esp_task_wdt_isr_user_handler implementation"
|
||||
depends on BT_LE_CONTROLLER_LOG_ENABLED
|
||||
default n
|
||||
help
|
||||
Implement esp_task_wdt_isr_user_handler to get controller logs when task wdt issue is triggered.
|
||||
|
||||
config BT_LE_MEM_CHECK_ENABLED
|
||||
bool "Enable memory allocation check"
|
||||
default n
|
||||
help
|
||||
Used in internal tests only. Enable the memory allocation check.
|
||||
endmenu
|
||||
config BT_LE_CONTROLLER_LOG_WRAP_PANIC_HANDLER_ENABLE
|
||||
bool "Enable wrap panic handler"
|
||||
depends on BT_LE_CONTROLLER_LOG_ENABLED
|
||||
default n
|
||||
help
|
||||
Wrap esp_panic_handler to get controller logs when PC pointer exception crashes.
|
||||
|
||||
config BT_LE_CONTROLLER_LOG_TASK_WDT_USER_HANDLER_ENABLE
|
||||
bool "Enable esp_task_wdt_isr_user_handler implementation"
|
||||
depends on BT_LE_CONTROLLER_LOG_ENABLED
|
||||
default n
|
||||
help
|
||||
Implement esp_task_wdt_isr_user_handler to get controller logs when task wdt issue is triggered.
|
||||
config BT_LE_LL_RESOLV_LIST_SIZE
|
||||
int "BLE LL Resolving list size"
|
||||
range 1 5
|
||||
|
||||
@@ -13,7 +13,6 @@
|
||||
*/
|
||||
#if (CONFIG_BT_NIMBLE_ENABLED || CONFIG_BT_BLUEDROID_ENABLED)
|
||||
void scan_stack_enableAdvFlowCtrlVsCmd(bool en);
|
||||
void scan_stack_enableSpecifyScanChanVsCmd(bool en);
|
||||
void adv_stack_enableClearLegacyAdvVsCmd(bool en);
|
||||
void chanSel_stack_enableSetCsaVsCmd(bool en);
|
||||
void hci_stack_enableSetVsEvtMaskVsCmd(bool en);
|
||||
@@ -35,7 +34,6 @@ void ble_stack_enableVsCmds(bool en)
|
||||
|
||||
#if DEFAULT_BT_LE_ROLE_OBSERVER
|
||||
scan_stack_enableAdvFlowCtrlVsCmd(en);
|
||||
scan_stack_enableSpecifyScanChanVsCmd(en);
|
||||
#endif // DEFAULT_BT_LE_ROLE_OBSERVER
|
||||
|
||||
chanSel_stack_enableSetCsaVsCmd(en);
|
||||
|
||||
@@ -141,7 +141,7 @@ extern void esp_panic_handler_feed_wdts(void);
|
||||
#endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
|
||||
extern int ble_controller_deinit(void);
|
||||
extern int ble_controller_enable(uint8_t mode);
|
||||
extern void ble_controller_disable(void);
|
||||
extern int ble_controller_disable(void);
|
||||
extern int esp_register_ext_funcs (struct ext_funcs_t *);
|
||||
extern void esp_unregister_ext_funcs (void);
|
||||
extern int esp_ble_ll_set_public_addr(const uint8_t *addr);
|
||||
@@ -1077,9 +1077,9 @@ esp_err_t esp_bt_controller_disable(void)
|
||||
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "invalid controller state");
|
||||
return ESP_FAIL;
|
||||
}
|
||||
ble_controller_status = ESP_BT_CONTROLLER_STATUS_INITED;
|
||||
|
||||
ble_controller_disable();
|
||||
if (ble_controller_disable() != 0) {
|
||||
return ESP_FAIL;
|
||||
}
|
||||
ble_stack_disable();
|
||||
if (s_ble_active) {
|
||||
esp_phy_disable(PHY_MODEM_BT);
|
||||
@@ -1091,6 +1091,7 @@ esp_err_t esp_bt_controller_disable(void)
|
||||
#if CONFIG_SW_COEXIST_ENABLE
|
||||
coex_disable();
|
||||
#endif
|
||||
ble_controller_status = ESP_BT_CONTROLLER_STATUS_INITED;
|
||||
return ESP_OK;
|
||||
}
|
||||
|
||||
@@ -1573,10 +1574,3 @@ int ble_sm_alg_gen_key_pair(uint8_t *pub, uint8_t *priv)
|
||||
|
||||
#endif // CONFIG_BT_LE_SM_LEGACY || CONFIG_BT_LE_SM_SC
|
||||
#endif // (!CONFIG_BT_NIMBLE_ENABLED) && (CONFIG_BT_CONTROLLER_ENABLED)
|
||||
|
||||
#if CONFIG_BT_LE_MEM_CHECK_ENABLED
|
||||
void ble_memory_count_limit_set(uint16_t count_limit)
|
||||
{
|
||||
bt_osi_mem_count_limit_set(count_limit);
|
||||
}
|
||||
#endif // CONFIG_BT_LE_MEM_CHECK_ENABLED
|
||||
|
||||
@@ -416,10 +416,10 @@ menu "MODEM SLEEP Options"
|
||||
modem sleep to be used with both DFS and light sleep.
|
||||
|
||||
config BT_CTRL_LPCLK_SEL_RTC_SLOW
|
||||
bool "Internal 136kHz RC oscillator"
|
||||
bool "Internal 150kHz RC oscillator"
|
||||
depends on RTC_CLK_SRC_INT_RC
|
||||
help
|
||||
Internal 136kHz RC oscillator. The accuracy of this clock is a lot larger than 500ppm which is required
|
||||
Internal 150kHz RC oscillator. The accuracy of this clock is a lot larger than 500ppm which is required
|
||||
in Bluetooth communication, so don't select this option in scenarios such as BLE connection state.
|
||||
endchoice
|
||||
|
||||
@@ -599,7 +599,6 @@ menu "Controller debug log Options (Experimental)"
|
||||
depends on BT_CTRL_LE_LOG_EN
|
||||
depends on !BT_CTRL_LE_LOG_DUMP_ONLY
|
||||
select BT_BLE_LOG_SPI_OUT_ENABLED
|
||||
select BT_BLE_LOG_SPI_OUT_LL_ENABLED
|
||||
default n
|
||||
help
|
||||
Output ble controller logs to SPI bus
|
||||
|
||||
@@ -551,7 +551,7 @@ static void esp_bt_controller_log_interface(uint32_t len, const uint8_t *addr, b
|
||||
#if CONFIG_BT_CTRL_LE_LOG_SPI_OUT_EN
|
||||
static IRAM_ATTR void esp_bt_controller_spi_log_interface(uint32_t len, const uint8_t *addr, bool end)
|
||||
{
|
||||
ble_log_spi_out_ll_write(len, addr, 0, NULL, 0);
|
||||
ble_log_spi_out_write(BLE_LOG_SPI_OUT_SOURCE_ESP_LEGACY, addr, len);
|
||||
}
|
||||
#endif // CONFIG_BT_CTRL_LE_LOG_SPI_OUT_EN
|
||||
|
||||
@@ -1650,11 +1650,15 @@ static esp_err_t btdm_low_power_mode_init(esp_bt_controller_config_t *cfg)
|
||||
#endif
|
||||
}
|
||||
} else if (s_lp_cntl.lpclk_sel == ESP_BT_SLEEP_CLOCK_RTC_SLOW) { // Internal 136kHz RC oscillator
|
||||
if (rtc_clk_slow_src_get() != SOC_RTC_SLOW_CLK_SRC_RC_SLOW) {
|
||||
if (rtc_clk_slow_src_get() == SOC_RTC_SLOW_CLK_SRC_RC_SLOW) {
|
||||
ESP_LOGW(BT_LOG_TAG, "Internal 136kHz RC oscillator. The accuracy of this clock is a lot larger than 500ppm which is "
|
||||
"required in Bluetooth communication, so don't select this option in scenarios such as BLE connection state.");
|
||||
} else {
|
||||
ESP_LOGW(BT_LOG_TAG, "Internal 136kHz RC oscillator not detected.");
|
||||
assert(0);
|
||||
}
|
||||
} else if (s_lp_cntl.lpclk_sel == ESP_BT_SLEEP_CLOCK_MAIN_XTAL) {
|
||||
ESP_LOGI(BT_LOG_TAG, "Bluetooth will use main XTAL as Bluetooth sleep clock.");
|
||||
#if !CONFIG_BT_CTRL_MAIN_XTAL_PU_DURING_LIGHT_SLEEP
|
||||
s_lp_cntl.no_light_sleep = 1;
|
||||
#endif
|
||||
@@ -1666,7 +1670,6 @@ static esp_err_t btdm_low_power_mode_init(esp_bt_controller_config_t *cfg)
|
||||
bool select_src_ret __attribute__((unused));
|
||||
bool set_div_ret __attribute__((unused));
|
||||
if (s_lp_cntl.lpclk_sel == ESP_BT_SLEEP_CLOCK_MAIN_XTAL) {
|
||||
ESP_LOGI(BT_LOG_TAG, "Using main XTAL as clock source");
|
||||
#ifdef CONFIG_BT_CTRL_MAIN_XTAL_PU_DURING_LIGHT_SLEEP
|
||||
ESP_ERROR_CHECK(esp_sleep_pd_config(ESP_PD_DOMAIN_XTAL, ESP_PD_OPTION_ON));
|
||||
s_lp_cntl.main_xtal_pu = 1;
|
||||
@@ -1677,7 +1680,6 @@ static esp_err_t btdm_low_power_mode_init(esp_bt_controller_config_t *cfg)
|
||||
btdm_lpcycle_us_frac = RTC_CLK_CAL_FRACT;
|
||||
btdm_lpcycle_us = 1 << (btdm_lpcycle_us_frac);
|
||||
} else if (s_lp_cntl.lpclk_sel == ESP_BT_SLEEP_CLOCK_EXT_32K_XTAL) {
|
||||
ESP_LOGI(BT_LOG_TAG, "Using external 32.768 kHz crystal/oscillator as clock source");
|
||||
select_src_ret = btdm_lpclk_select_src(BTDM_LPCLK_SEL_XTAL32K);
|
||||
set_div_ret = btdm_lpclk_set_div(0);
|
||||
assert(select_src_ret && set_div_ret);
|
||||
@@ -1686,8 +1688,6 @@ static esp_err_t btdm_low_power_mode_init(esp_bt_controller_config_t *cfg)
|
||||
(1000000 >> (15 - RTC_CLK_CAL_FRACT));
|
||||
assert(btdm_lpcycle_us != 0);
|
||||
} else if (s_lp_cntl.lpclk_sel == ESP_BT_SLEEP_CLOCK_RTC_SLOW) {
|
||||
ESP_LOGW(BT_LOG_TAG, "Using 136 kHz RC as clock source. The accuracy of this clock is a lot larger than 500ppm which is "
|
||||
"required in Bluetooth communication, so don't select this option in scenarios such as BLE connection state.");
|
||||
select_src_ret = btdm_lpclk_select_src(BTDM_LPCLK_SEL_RTC_SLOW);
|
||||
set_div_ret = btdm_lpclk_set_div(0);
|
||||
assert(select_src_ret && set_div_ret);
|
||||
@@ -1809,7 +1809,6 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
|
||||
#if CONFIG_BT_BLE_LOG_SPI_OUT_ENABLED
|
||||
if (ble_log_spi_out_init() != 0) {
|
||||
ESP_LOGE(BT_LOG_TAG, "BLE Log SPI output init failed");
|
||||
err = ESP_ERR_NO_MEM;
|
||||
goto error;
|
||||
}
|
||||
#endif // CONFIG_BT_BLE_LOG_SPI_OUT_ENABLED
|
||||
|
||||
@@ -320,16 +320,6 @@ menu "Controller debug features"
|
||||
help
|
||||
Output ble controller logs to SPI bus
|
||||
|
||||
config BT_LE_CONTROLLER_LOG_UHCI_OUT_ENABLED
|
||||
bool "Output ble controller logs via UART DMA (Experimental)"
|
||||
depends on BT_LE_CONTROLLER_LOG_ENABLED
|
||||
depends on !BT_LE_CONTROLLER_LOG_DUMP_ONLY
|
||||
depends on !BT_LE_CONTROLLER_LOG_SPI_OUT_ENABLED
|
||||
select BT_BLE_LOG_UHCI_OUT_ENABLED
|
||||
default y
|
||||
help
|
||||
Output ble controller logs via UART DMA
|
||||
|
||||
config BT_LE_CONTROLLER_LOG_STORAGE_ENABLE
|
||||
bool "Store ble controller logs to flash(Experimental)"
|
||||
depends on !BT_LE_CONTROLLER_LOG_DUMP_ONLY
|
||||
@@ -416,12 +406,6 @@ menu "Controller debug features"
|
||||
config BT_LE_PTR_CHECK_ENABLED
|
||||
bool "Enable boundary check for internal memory"
|
||||
default n
|
||||
|
||||
config BT_LE_MEM_CHECK_ENABLED
|
||||
bool "Enable memory allocation check"
|
||||
default n
|
||||
help
|
||||
Used in internal tests only. Enable the memory allocation check.
|
||||
endmenu
|
||||
|
||||
config BT_LE_LL_RESOLV_LIST_SIZE
|
||||
@@ -828,38 +812,3 @@ config BT_LE_CTRL_FAST_CONN_DATA_TX_EN
|
||||
help
|
||||
If this option is enabled, The Controller will continue to
|
||||
Send an empty PDU after sending valid connection data within an interval.
|
||||
|
||||
menu "Reserved Memory Config"
|
||||
config BT_LE_EXT_ADV_RESERVED_MEMORY_COUNT
|
||||
int "The value of reserved EXT ADV memory count at initialization"
|
||||
range 0 4
|
||||
default 2
|
||||
help
|
||||
This value sets the number the Controller will allocate for extended advertisement
|
||||
instances at initialization process. If more extended advertisement instances are
|
||||
enabled, those memory will be dynamically allocated.
|
||||
Using reduced amount of reserved memory will save heap size at the cost of extra
|
||||
time consumption at advertising start process and possible advertising start failure
|
||||
due to memory shortage.
|
||||
The actual reserved memory count will be the minimum value between the maximum
|
||||
extended advertisement instances and the BT_LE_EXT_ADV_RESERVED_MEMORY_COUNT.
|
||||
|
||||
|
||||
config BT_LE_CONN_RESERVED_MEMORY_COUNT
|
||||
int "The value of reserved CONN memory count at initialization"
|
||||
range 0 70
|
||||
default 2
|
||||
help
|
||||
This value sets the number the Controller will allocate for connection instances
|
||||
at the initialization process. If more connection instances are enabled, those
|
||||
memory will be dynamically allocated.
|
||||
Using reduced amount of reserved memory will save heap size at the cost of extra
|
||||
time consumption at connection establishment process and possible connection
|
||||
establishment failure due to memory shortage.
|
||||
The actual reserved memory count will be the minimum value between the maximum
|
||||
connection instances and the BT_LE_CONN_RESERVED_MEMORY_COUNT.
|
||||
endmenu
|
||||
|
||||
config BT_LE_DTM_ENABLED
|
||||
bool "Enable Direct Test Mode (DTM) feature"
|
||||
default n
|
||||
|
||||
@@ -17,28 +17,6 @@ void base_stack_deinitEnv(void);
|
||||
int base_stack_enable(void);
|
||||
void base_stack_disable(void);
|
||||
|
||||
int adv_stack_initEnv(void);
|
||||
void adv_stack_deinitEnv(void);
|
||||
int adv_stack_enable(void);
|
||||
void adv_stack_disable(void);
|
||||
|
||||
int extAdv_stack_initEnv(void);
|
||||
void extAdv_stack_deinitEnv(void);
|
||||
int extAdv_stack_enable(void);
|
||||
void extAdv_stack_disable(void);
|
||||
|
||||
int sync_stack_initEnv(void);
|
||||
void sync_stack_deinitEnv(void);
|
||||
int sync_stack_enable(void);
|
||||
void sync_stack_disable(void);
|
||||
|
||||
#if CONFIG_BT_LE_DTM_ENABLED
|
||||
int dtm_stack_initEnv(void);
|
||||
void dtm_stack_deinitEnv(void);
|
||||
int dtm_stack_enable(void);
|
||||
void dtm_stack_disable(void);
|
||||
#endif // CONFIG_BT_LE_DTM_ENABLED
|
||||
|
||||
int conn_stack_initEnv(void);
|
||||
void conn_stack_deinitEnv(void);
|
||||
int conn_stack_enable(void);
|
||||
@@ -107,27 +85,6 @@ int ble_stack_initEnv(void)
|
||||
return rc;
|
||||
}
|
||||
|
||||
rc = adv_stack_initEnv();
|
||||
if (rc) {
|
||||
return rc;
|
||||
}
|
||||
|
||||
rc = extAdv_stack_initEnv();
|
||||
if (rc) {
|
||||
return rc;
|
||||
}
|
||||
|
||||
rc = sync_stack_initEnv();
|
||||
if (rc) {
|
||||
return rc;
|
||||
}
|
||||
|
||||
#if CONFIG_BT_LE_DTM_ENABLED
|
||||
rc = dtm_stack_initEnv();
|
||||
if (rc) {
|
||||
return rc;
|
||||
}
|
||||
#endif // CONFIG_BT_LE_DTM_ENABLED
|
||||
#if DEFAULT_BT_LE_MAX_CONNECTIONS
|
||||
rc = conn_stack_initEnv();
|
||||
if (rc) {
|
||||
@@ -140,6 +97,7 @@ int ble_stack_initEnv(void)
|
||||
}
|
||||
#endif // CONFIG_BT_LE_ERROR_SIM_ENABLED
|
||||
#endif // DEFAULT_BT_LE_MAX_CONNECTIONS
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@@ -151,12 +109,7 @@ void ble_stack_deinitEnv(void)
|
||||
#endif // CONFIG_BT_LE_ERROR_SIM_ENABLED
|
||||
conn_stack_deinitEnv();
|
||||
#endif // DEFAULT_BT_LE_MAX_CONNECTIONS
|
||||
#if CONFIG_BT_LE_DTM_ENABLED
|
||||
dtm_stack_deinitEnv();
|
||||
#endif // CONFIG_BT_LE_DTM_ENABLED
|
||||
sync_stack_deinitEnv();
|
||||
extAdv_stack_deinitEnv();
|
||||
adv_stack_deinitEnv();
|
||||
|
||||
base_stack_deinitEnv();
|
||||
}
|
||||
|
||||
@@ -169,28 +122,6 @@ int ble_stack_enable(void)
|
||||
return rc;
|
||||
}
|
||||
|
||||
rc = adv_stack_enable();
|
||||
if (rc) {
|
||||
return rc;
|
||||
}
|
||||
|
||||
rc = extAdv_stack_enable();
|
||||
if (rc) {
|
||||
return rc;
|
||||
}
|
||||
|
||||
rc = sync_stack_enable();
|
||||
if (rc) {
|
||||
return rc;
|
||||
}
|
||||
|
||||
#if CONFIG_BT_LE_DTM_ENABLED
|
||||
rc = dtm_stack_enable();
|
||||
if (rc) {
|
||||
return rc;
|
||||
}
|
||||
#endif // CONFIG_BT_LE_DTM_ENABLED
|
||||
|
||||
#if DEFAULT_BT_LE_MAX_CONNECTIONS
|
||||
rc = conn_stack_enable();
|
||||
if (rc) {
|
||||
@@ -212,20 +143,7 @@ int ble_stack_enable(void)
|
||||
#if CONFIG_BT_LE_RXBUF_OPT_ENABLED
|
||||
mmgmt_enableRxbufOptFeature();
|
||||
#endif // CONFIG_BT_LE_RXBUF_OPT_ENABLED
|
||||
rc = adv_stack_enable();
|
||||
if (rc) {
|
||||
return rc;
|
||||
}
|
||||
|
||||
rc = extAdv_stack_enable();
|
||||
if (rc) {
|
||||
return rc;
|
||||
}
|
||||
|
||||
rc = sync_stack_enable();
|
||||
if (rc) {
|
||||
return rc;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
@@ -242,11 +160,6 @@ void ble_stack_disable(void)
|
||||
#endif // CONFIG_BT_LE_ERROR_SIM_ENABLED
|
||||
conn_stack_disable();
|
||||
#endif // DEFAULT_BT_LE_MAX_CONNECTIONS
|
||||
#if CONFIG_BT_LE_DTM_ENABLED
|
||||
dtm_stack_disable();
|
||||
#endif // CONFIG_BT_LE_DTM_ENABLED
|
||||
sync_stack_disable();
|
||||
extAdv_stack_disable();
|
||||
adv_stack_disable();
|
||||
|
||||
base_stack_disable();
|
||||
}
|
||||
|
||||
@@ -60,10 +60,6 @@
|
||||
#include "ble_log/ble_log_spi_out.h"
|
||||
#endif // CONFIG_BT_BLE_LOG_SPI_OUT_ENABLED
|
||||
|
||||
#if CONFIG_BT_BLE_LOG_UHCI_OUT_ENABLED
|
||||
#include "ble_log/ble_log_uhci_out.h"
|
||||
#endif // CONFIG_BT_BLE_LOG_UHCI_OUT_ENABLED
|
||||
|
||||
/* Macro definition
|
||||
************************************************************************
|
||||
*/
|
||||
@@ -147,7 +143,8 @@ extern void r_ble_rtc_wake_up_state_clr(void);
|
||||
extern int os_msys_init(void);
|
||||
extern void os_msys_deinit(void);
|
||||
#if CONFIG_BT_CTRL_RUN_IN_FLASH_ONLY
|
||||
extern void esp_ble_controller_flash_only_param_config(void);
|
||||
extern void r_ble_ll_scan_start_time_init_compensation(uint32_t init_compensation);
|
||||
extern void r_priv_sdk_config_insert_proc_time_set(uint16_t insert_proc_time);
|
||||
#endif // CONFIG_BT_CTRL_RUN_IN_FLASH_ONLY
|
||||
#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
|
||||
extern sleep_retention_entries_config_t *r_esp_ble_mac_retention_link_get(uint8_t *size, uint8_t extra);
|
||||
@@ -192,9 +189,9 @@ static int esp_ecc_gen_key_pair(uint8_t *pub, uint8_t *priv);
|
||||
static int esp_ecc_gen_dh_key(const uint8_t *peer_pub_key_x, const uint8_t *peer_pub_key_y,
|
||||
const uint8_t *our_priv_key, uint8_t *out_dhkey);
|
||||
#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
|
||||
#if !CONFIG_BT_LE_CONTROLLER_LOG_SPI_OUT_ENABLED && !CONFIG_BT_LE_CONTROLLER_LOG_UHCI_OUT_ENABLED
|
||||
#if !CONFIG_BT_LE_CONTROLLER_LOG_SPI_OUT_ENABLED
|
||||
static void esp_bt_controller_log_interface(uint32_t len, const uint8_t *addr, uint32_t len_append, const uint8_t *addr_append, uint32_t flag);
|
||||
#endif // !CONFIG_BT_LE_CONTROLLER_LOG_SPI_OUT_ENABLED && !CONFIG_BT_LE_CONTROLLER_LOG_UHCI_OUT_ENABLED
|
||||
#endif // !CONFIG_BT_LE_CONTROLLER_LOG_SPI_OUT_ENABLED
|
||||
#if CONFIG_BT_LE_CONTROLLER_LOG_STORAGE_ENABLE
|
||||
static void esp_bt_ctrl_log_partition_get_and_erase_first_block(void);
|
||||
#endif // CONFIG_BT_LE_CONTROLLER_LOG_STORAGE_ENABLE
|
||||
@@ -221,35 +218,25 @@ esp_err_t esp_bt_controller_log_init(void)
|
||||
}
|
||||
#endif // CONFIG_BT_BLE_LOG_SPI_OUT_ENABLED
|
||||
|
||||
#if CONFIG_BT_BLE_LOG_UHCI_OUT_ENABLED
|
||||
if (ble_log_uhci_out_init() != 0) {
|
||||
goto uhci_out_init_failed;
|
||||
}
|
||||
#endif // CONFIG_BT_BLE_LOG_UHCI_OUT_ENABLED
|
||||
|
||||
#if CONFIG_BT_LE_CONTROLLER_LOG_SPI_OUT_ENABLED
|
||||
if (r_ble_log_init_simple(ble_log_spi_out_ll_write, ble_log_spi_out_ll_log_ev_proc) != 0) {
|
||||
goto log_init_failed;
|
||||
}
|
||||
#elif CONFIG_BT_LE_CONTROLLER_LOG_UHCI_OUT_ENABLED
|
||||
if (r_ble_log_init_simple(ble_log_uhci_out_ll_write, ble_log_uhci_out_ll_log_ev_proc) != 0) {
|
||||
goto log_init_failed;
|
||||
}
|
||||
#else
|
||||
#else // !CONFIG_BT_LE_CONTROLLER_LOG_SPI_OUT_ENABLED
|
||||
uint8_t buffers = 0;
|
||||
#if CONFIG_BT_LE_CONTROLLER_LOG_CTRL_ENABLED
|
||||
buffers |= ESP_BLE_LOG_BUF_CONTROLLER;
|
||||
#endif // CONFIG_BT_LE_CONTROLLER_LOG_CTRL_ENABLED
|
||||
#if CONFIG_BT_LE_CONTROLLER_LOG_HCI_ENABLED
|
||||
buffers |= ESP_BLE_LOG_BUF_HCI;
|
||||
#endif
|
||||
#endif // CONFIG_BT_LE_CONTROLLER_LOG_HCI_ENABLED
|
||||
|
||||
bool task_create = true;
|
||||
#if CONFIG_BT_LE_CONTROLLER_LOG_DUMP_ONLY
|
||||
task_create = false;
|
||||
#elif CONFIG_BT_LE_CONTROLLER_LOG_STORAGE_ENABLE
|
||||
esp_bt_ctrl_log_partition_get_and_erase_first_block();
|
||||
#endif
|
||||
#endif // CONFIG_BT_LE_CONTROLLER_LOG_SPI_OUT_ENABLED
|
||||
|
||||
if (r_ble_log_init_async(esp_bt_controller_log_interface, task_create, buffers, (uint32_t *)log_bufs_size) != 0) {
|
||||
goto log_init_failed;
|
||||
@@ -265,20 +252,14 @@ esp_err_t esp_bt_controller_log_init(void)
|
||||
ctrl_level_init_failed:
|
||||
#if CONFIG_BT_LE_CONTROLLER_LOG_SPI_OUT_ENABLED
|
||||
r_ble_log_deinit_simple();
|
||||
#elif CONFIG_BT_LE_CONTROLLER_LOG_UHCI_OUT_ENABLED
|
||||
r_ble_log_deinit_simple();
|
||||
#else
|
||||
#else // !CONFIG_BT_LE_CONTROLLER_LOG_SPI_OUT_ENABLED
|
||||
r_ble_log_deinit_async();
|
||||
#endif
|
||||
#endif // CONFIG_BT_LE_CONTROLLER_LOG_SPI_OUT_ENABLED
|
||||
log_init_failed:
|
||||
#if CONFIG_BT_BLE_LOG_SPI_OUT_ENABLED
|
||||
ble_log_spi_out_deinit();
|
||||
spi_out_init_failed:
|
||||
#endif // CONFIG_BT_BLE_LOG_SPI_OUT_ENABLED
|
||||
#if CONFIG_BT_BLE_LOG_UHCI_OUT_ENABLED
|
||||
ble_log_uhci_out_deinit();
|
||||
uhci_out_init_failed:
|
||||
#endif // CONFIG_BT_BLE_LOG_UHCI_OUT_ENABLED
|
||||
return ESP_FAIL;
|
||||
}
|
||||
|
||||
@@ -288,17 +269,11 @@ void esp_bt_controller_log_deinit(void)
|
||||
ble_log_spi_out_deinit();
|
||||
#endif // CONFIG_BT_BLE_LOG_SPI_OUT_ENABLED
|
||||
|
||||
#if CONFIG_BT_BLE_LOG_UHCI_OUT_ENABLED
|
||||
ble_log_uhci_out_deinit();
|
||||
#endif // CONFIG_BT_BLE_LOG_UHCI_OUT_ENABLED
|
||||
|
||||
#if CONFIG_BT_LE_CONTROLLER_LOG_SPI_OUT_ENABLED
|
||||
r_ble_log_deinit_simple();
|
||||
#elif CONFIG_BT_LE_CONTROLLER_LOG_UHCI_OUT_ENABLED
|
||||
r_ble_log_deinit_simple();
|
||||
#else
|
||||
#else // !CONFIG_BT_LE_CONTROLLER_LOG_SPI_OUT_ENABLED
|
||||
r_ble_log_deinit_async();
|
||||
#endif
|
||||
#endif // CONFIG_BT_LE_CONTROLLER_LOG_SPI_OUT_ENABLED
|
||||
|
||||
log_is_inited = false;
|
||||
}
|
||||
@@ -1136,7 +1111,8 @@ esp_err_t esp_bt_controller_enable(esp_bt_mode_t mode)
|
||||
#endif // CONFIG_SW_COEXIST_ENABLE
|
||||
|
||||
#if CONFIG_BT_CTRL_RUN_IN_FLASH_ONLY
|
||||
esp_ble_controller_flash_only_param_config();
|
||||
r_ble_ll_scan_start_time_init_compensation(500);
|
||||
r_priv_sdk_config_insert_proc_time_set(500);
|
||||
#endif // CONFIG_BT_CTRL_RUN_IN_FLASH_ONLY
|
||||
|
||||
if (ble_stack_enable() != 0) {
|
||||
@@ -1436,7 +1412,7 @@ esp_power_level_t esp_ble_tx_power_get_enhanced(esp_ble_enhanced_power_type_t po
|
||||
}
|
||||
|
||||
#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
|
||||
#if !CONFIG_BT_LE_CONTROLLER_LOG_SPI_OUT_ENABLED && !CONFIG_BT_LE_CONTROLLER_LOG_UHCI_OUT_ENABLED
|
||||
#if !CONFIG_BT_LE_CONTROLLER_LOG_SPI_OUT_ENABLED
|
||||
static void esp_bt_controller_log_interface(uint32_t len, const uint8_t *addr, uint32_t len_append, const uint8_t *addr_append, uint32_t flag)
|
||||
{
|
||||
bool end = (flag & BIT(BLE_LOG_INTERFACE_FLAG_END));
|
||||
@@ -1458,7 +1434,7 @@ static void esp_bt_controller_log_interface(uint32_t len, const uint8_t *addr, u
|
||||
portEXIT_CRITICAL_SAFE(&spinlock);
|
||||
#endif // CONFIG_BT_LE_CONTROLLER_LOG_STORAGE_ENABLE
|
||||
}
|
||||
#endif // !CONFIG_BT_LE_CONTROLLER_LOG_SPI_OUT_ENABLED && !CONFIG_BT_LE_CONTROLLER_LOG_UHCI_OUT_ENABLED
|
||||
#endif // !CONFIG_BT_LE_CONTROLLER_LOG_SPI_OUT_ENABLED
|
||||
|
||||
void esp_ble_controller_log_dump_all(bool output)
|
||||
{
|
||||
@@ -1466,13 +1442,9 @@ void esp_ble_controller_log_dump_all(bool output)
|
||||
ble_log_spi_out_dump_all();
|
||||
#endif // CONFIG_BT_BLE_LOG_SPI_OUT_ENABLED
|
||||
|
||||
#if CONFIG_BT_BLE_LOG_UHCI_OUT_ENABLED
|
||||
ble_log_uhci_out_dump_all();
|
||||
#endif // CONFIG_BT_BLE_LOG_UHCI_OUT_ENABLED
|
||||
|
||||
#if CONFIG_BT_LE_CONTROLLER_LOG_STORAGE_ENABLE
|
||||
esp_bt_read_ctrl_log_from_flash(output);
|
||||
#elif !CONFIG_BT_LE_CONTROLLER_LOG_SPI_OUT_ENABLED && !CONFIG_BT_LE_CONTROLLER_LOG_UHCI_OUT_ENABLED
|
||||
#elif !CONFIG_BT_LE_CONTROLLER_LOG_SPI_OUT_ENABLED
|
||||
portMUX_TYPE spinlock = portMUX_INITIALIZER_UNLOCKED;
|
||||
portENTER_CRITICAL_SAFE(&spinlock);
|
||||
esp_panic_handler_feed_wdts();
|
||||
@@ -1728,10 +1700,3 @@ ble_capture_info_user_handler(uint8_t type, uint32_t reason, uint32_t param1, ui
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
#if CONFIG_BT_LE_MEM_CHECK_ENABLED
|
||||
void ble_memory_count_limit_set(uint16_t count_limit)
|
||||
{
|
||||
bt_osi_mem_count_limit_set(count_limit);
|
||||
}
|
||||
#endif // CONFIG_BT_LE_MEM_CHECK_ENABLED
|
||||
|
||||
@@ -280,9 +280,6 @@ extern "C" {
|
||||
|
||||
#define BLE_LL_TX_PWR_DBM_N (CONFIG_BT_LE_DFT_TX_POWER_LEVEL_DBM_EFF)
|
||||
|
||||
#define BLE_LL_ADV_SM_RESERVE_CNT_N MIN(DEFAULT_BT_LE_MAX_EXT_ADV_INSTANCES, CONFIG_BT_LE_EXT_ADV_RESERVED_MEMORY_COUNT)
|
||||
#define BLE_LL_CONN_SM_RESERVE_CNT_N MIN(DEFAULT_BT_LE_MAX_CONNECTIONS, CONFIG_BT_LE_CONN_RESERVED_MEMORY_COUNT)
|
||||
|
||||
#define RUN_BQB_TEST (0)
|
||||
#define RUN_QA_TEST (0)
|
||||
#define NIMBLE_DISABLE_SCAN_BACKOFF (0)
|
||||
|
||||
@@ -361,16 +361,6 @@ menu "Controller debug features"
|
||||
help
|
||||
Output ble controller logs to SPI bus
|
||||
|
||||
config BT_LE_CONTROLLER_LOG_UHCI_OUT_ENABLED
|
||||
bool "Output ble controller logs via UART DMA (Experimental)"
|
||||
depends on BT_LE_CONTROLLER_LOG_ENABLED
|
||||
depends on !BT_LE_CONTROLLER_LOG_DUMP_ONLY
|
||||
depends on !BT_LE_CONTROLLER_LOG_SPI_OUT_ENABLED
|
||||
select BT_BLE_LOG_UHCI_OUT_ENABLED
|
||||
default y
|
||||
help
|
||||
Output ble controller logs via UART DMA
|
||||
|
||||
config BT_LE_CONTROLLER_LOG_STORAGE_ENABLE
|
||||
bool "Store ble controller logs to flash(Experimental)"
|
||||
depends on !BT_LE_CONTROLLER_LOG_DUMP_ONLY
|
||||
@@ -457,12 +447,6 @@ menu "Controller debug features"
|
||||
config BT_LE_PTR_CHECK_ENABLED
|
||||
bool "Enable boundary check for internal memory"
|
||||
default n
|
||||
|
||||
config BT_LE_MEM_CHECK_ENABLED
|
||||
bool "Enable memory allocation check"
|
||||
default n
|
||||
help
|
||||
Used in internal tests only. Enable the memory allocation check.
|
||||
endmenu
|
||||
|
||||
config BT_LE_LL_RESOLV_LIST_SIZE
|
||||
@@ -862,38 +846,3 @@ config BT_LE_CTRL_FAST_CONN_DATA_TX_EN
|
||||
help
|
||||
If this option is enabled, The Controller will continue to
|
||||
Send an empty PDU after sending valid connection data within an interval.
|
||||
|
||||
menu "Reserved Memory Config"
|
||||
config BT_LE_EXT_ADV_RESERVED_MEMORY_COUNT
|
||||
int "The value of reserved EXT ADV memory count at initialization"
|
||||
range 0 4
|
||||
default 2
|
||||
help
|
||||
This value sets the number the Controller will allocate for extended advertisement
|
||||
instances at initialization process. If more extended advertisement instances are
|
||||
enabled, those memory will be dynamically allocated.
|
||||
Using reduced amount of reserved memory will save heap size at the cost of extra
|
||||
time consumption at advertising start process and possible advertising start failure
|
||||
due to memory shortage.
|
||||
The actual reserved memory count will be the minimum value between the maximum
|
||||
extended advertisement instances and the BT_LE_EXT_ADV_RESERVED_MEMORY_COUNT.
|
||||
|
||||
|
||||
config BT_LE_CONN_RESERVED_MEMORY_COUNT
|
||||
int "The value of reserved CONN memory count at initialization"
|
||||
range 0 70
|
||||
default 2
|
||||
help
|
||||
This value sets the number the Controller will allocate for connection instances
|
||||
at the initialization process. If more connection instances are enabled, those
|
||||
memory will be dynamically allocated.
|
||||
Using reduced amount of reserved memory will save heap size at the cost of extra
|
||||
time consumption at connection establishment process and possible connection
|
||||
establishment failure due to memory shortage.
|
||||
The actual reserved memory count will be the minimum value between the maximum
|
||||
connection instances and the BT_LE_CONN_RESERVED_MEMORY_COUNT.
|
||||
endmenu
|
||||
|
||||
config BT_LE_DTM_ENABLED
|
||||
bool "Enable Direct Test Mode (DTM) feature"
|
||||
default n
|
||||
|
||||
@@ -22,28 +22,6 @@ void conn_stack_deinitEnv(void);
|
||||
int conn_stack_enable(void);
|
||||
void conn_stack_disable(void);
|
||||
|
||||
int adv_stack_initEnv(void);
|
||||
void adv_stack_deinitEnv(void);
|
||||
int adv_stack_enable(void);
|
||||
void adv_stack_disable(void);
|
||||
|
||||
int extAdv_stack_initEnv(void);
|
||||
void extAdv_stack_deinitEnv(void);
|
||||
int extAdv_stack_enable(void);
|
||||
void extAdv_stack_disable(void);
|
||||
|
||||
int sync_stack_initEnv(void);
|
||||
void sync_stack_deinitEnv(void);
|
||||
int sync_stack_enable(void);
|
||||
void sync_stack_disable(void);
|
||||
|
||||
#if CONFIG_BT_LE_DTM_ENABLED
|
||||
int dtm_stack_initEnv(void);
|
||||
void dtm_stack_deinitEnv(void);
|
||||
int dtm_stack_enable(void);
|
||||
void dtm_stack_disable(void);
|
||||
#endif // CONFIG_BT_LE_DTM_ENABLED
|
||||
|
||||
#if CONFIG_BT_LE_ERROR_SIM_ENABLED
|
||||
int conn_errorSim_initEnv(void);
|
||||
void conn_errorSim_deinitEnv(void);
|
||||
@@ -126,27 +104,6 @@ int ble_stack_initEnv(void)
|
||||
#endif // CONFIG_BT_LE_ERROR_SIM_ENABLED
|
||||
#endif // DEFAULT_BT_LE_MAX_CONNECTIONS
|
||||
|
||||
rc = adv_stack_initEnv();
|
||||
if (rc) {
|
||||
return rc;
|
||||
}
|
||||
|
||||
rc = extAdv_stack_initEnv();
|
||||
if (rc) {
|
||||
return rc;
|
||||
}
|
||||
|
||||
rc = sync_stack_initEnv();
|
||||
if (rc) {
|
||||
return rc;
|
||||
}
|
||||
|
||||
#if CONFIG_BT_LE_DTM_ENABLED
|
||||
rc = dtm_stack_initEnv();
|
||||
if (rc) {
|
||||
return rc;
|
||||
}
|
||||
#endif // CONFIG_BT_LE_DTM_ENABLED
|
||||
return 0;
|
||||
}
|
||||
|
||||
@@ -158,12 +115,7 @@ void ble_stack_deinitEnv(void)
|
||||
#endif // CONFIG_BT_LE_ERROR_SIM_ENABLED
|
||||
conn_stack_deinitEnv();
|
||||
#endif // DEFAULT_BT_LE_MAX_CONNECTIONS
|
||||
#if CONFIG_BT_LE_DTM_ENABLED
|
||||
dtm_stack_deinitEnv();
|
||||
#endif // CONFIG_BT_LE_DTM_ENABLED
|
||||
sync_stack_deinitEnv();
|
||||
extAdv_stack_deinitEnv();
|
||||
adv_stack_deinitEnv();
|
||||
|
||||
base_stack_deinitEnv();
|
||||
}
|
||||
|
||||
@@ -176,28 +128,6 @@ int ble_stack_enable(void)
|
||||
return rc;
|
||||
}
|
||||
|
||||
rc = adv_stack_enable();
|
||||
if (rc) {
|
||||
return rc;
|
||||
}
|
||||
|
||||
rc = extAdv_stack_enable();
|
||||
if (rc) {
|
||||
return rc;
|
||||
}
|
||||
|
||||
rc = sync_stack_enable();
|
||||
if (rc) {
|
||||
return rc;
|
||||
}
|
||||
|
||||
#if CONFIG_BT_LE_DTM_ENABLED
|
||||
rc = dtm_stack_enable();
|
||||
if (rc) {
|
||||
return rc;
|
||||
}
|
||||
#endif // CONFIG_BT_LE_DTM_ENABLED
|
||||
|
||||
#if DEFAULT_BT_LE_MAX_CONNECTIONS
|
||||
rc = conn_stack_enable();
|
||||
if (rc) {
|
||||
@@ -236,11 +166,6 @@ void ble_stack_disable(void)
|
||||
#endif // CONFIG_BT_LE_ERROR_SIM_ENABLED
|
||||
conn_stack_disable();
|
||||
#endif // DEFAULT_BT_LE_MAX_CONNECTIONS
|
||||
#if CONFIG_BT_LE_DTM_ENABLED
|
||||
dtm_stack_disable();
|
||||
#endif // CONFIG_BT_LE_DTM_ENABLED
|
||||
sync_stack_disable();
|
||||
extAdv_stack_disable();
|
||||
adv_stack_disable();
|
||||
|
||||
base_stack_disable();
|
||||
}
|
||||
|
||||
@@ -64,10 +64,6 @@
|
||||
#include "ble_log/ble_log_spi_out.h"
|
||||
#endif // CONFIG_BT_BLE_LOG_SPI_OUT_ENABLED
|
||||
|
||||
#if CONFIG_BT_BLE_LOG_UHCI_OUT_ENABLED
|
||||
#include "ble_log/ble_log_uhci_out.h"
|
||||
#endif // CONFIG_BT_BLE_LOG_UHCI_OUT_ENABLED
|
||||
|
||||
/* Macro definition
|
||||
************************************************************************
|
||||
*/
|
||||
@@ -160,7 +156,8 @@ extern void r_ble_rtc_wake_up_state_clr(void);
|
||||
extern int os_msys_init(void);
|
||||
extern void os_msys_deinit(void);
|
||||
#if CONFIG_BT_CTRL_RUN_IN_FLASH_ONLY
|
||||
extern void esp_ble_controller_flash_only_param_config(void);
|
||||
extern void r_ble_ll_scan_start_time_init_compensation(uint32_t init_compensation);
|
||||
extern void r_priv_sdk_config_insert_proc_time_set(uint16_t insert_proc_time);
|
||||
#endif // CONFIG_BT_CTRL_RUN_IN_FLASH_ONLY
|
||||
#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
|
||||
extern sleep_retention_entries_config_t *r_esp_ble_mac_retention_link_get(uint8_t *size, uint8_t extra);
|
||||
@@ -208,9 +205,9 @@ static int esp_ecc_gen_key_pair(uint8_t *pub, uint8_t *priv);
|
||||
static int esp_ecc_gen_dh_key(const uint8_t *peer_pub_key_x, const uint8_t *peer_pub_key_y,
|
||||
const uint8_t *our_priv_key, uint8_t *out_dhkey);
|
||||
#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
|
||||
#if !CONFIG_BT_LE_CONTROLLER_LOG_SPI_OUT_ENABLED && !CONFIG_BT_LE_CONTROLLER_LOG_UHCI_OUT_ENABLED
|
||||
#if !CONFIG_BT_LE_CONTROLLER_LOG_SPI_OUT_ENABLED
|
||||
static void esp_bt_controller_log_interface(uint32_t len, const uint8_t *addr, uint32_t len_append, const uint8_t *addr_append, uint32_t flag);
|
||||
#endif // !CONFIG_BT_LE_CONTROLLER_LOG_SPI_OUT_ENABLED && !CONFIG_BT_LE_CONTROLLER_LOG_UHCI_OUT_ENABLED
|
||||
#endif // !CONFIG_BT_LE_CONTROLLER_LOG_SPI_OUT_ENABLED
|
||||
#if CONFIG_BT_LE_CONTROLLER_LOG_STORAGE_ENABLE
|
||||
static void esp_bt_ctrl_log_partition_get_and_erase_first_block(void);
|
||||
#endif // CONFIG_BT_LE_CONTROLLER_LOG_STORAGE_ENABLE
|
||||
@@ -237,21 +234,11 @@ esp_err_t esp_bt_controller_log_init(void)
|
||||
}
|
||||
#endif // CONFIG_BT_BLE_LOG_SPI_OUT_ENABLED
|
||||
|
||||
#if CONFIG_BT_BLE_LOG_UHCI_OUT_ENABLED
|
||||
if (ble_log_uhci_out_init() != 0) {
|
||||
goto uhci_out_init_failed;
|
||||
}
|
||||
#endif // CONFIG_BT_BLE_LOG_UHCI_OUT_ENABLED
|
||||
|
||||
#if CONFIG_BT_LE_CONTROLLER_LOG_SPI_OUT_ENABLED
|
||||
if (r_ble_log_init_simple(ble_log_spi_out_ll_write, ble_log_spi_out_ll_log_ev_proc) != 0) {
|
||||
goto log_init_failed;
|
||||
}
|
||||
#elif CONFIG_BT_LE_CONTROLLER_LOG_UHCI_OUT_ENABLED
|
||||
if (r_ble_log_init_simple(ble_log_uhci_out_ll_write, ble_log_uhci_out_ll_log_ev_proc) != 0) {
|
||||
goto log_init_failed;
|
||||
}
|
||||
#else
|
||||
#else // !CONFIG_BT_LE_CONTROLLER_LOG_SPI_OUT_ENABLED
|
||||
uint8_t buffers = 0;
|
||||
#if CONFIG_BT_LE_CONTROLLER_LOG_CTRL_ENABLED
|
||||
buffers |= ESP_BLE_LOG_BUF_CONTROLLER;
|
||||
@@ -265,12 +252,12 @@ esp_err_t esp_bt_controller_log_init(void)
|
||||
task_create = false;
|
||||
#elif CONFIG_BT_LE_CONTROLLER_LOG_STORAGE_ENABLE
|
||||
esp_bt_ctrl_log_partition_get_and_erase_first_block();
|
||||
#endif
|
||||
#endif // CONFIG_BT_LE_CONTROLLER_LOG_SPI_OUT_ENABLED
|
||||
|
||||
if (r_ble_log_init_async(esp_bt_controller_log_interface, task_create, buffers, (uint32_t *)log_bufs_size) != 0) {
|
||||
goto log_init_failed;
|
||||
}
|
||||
#endif
|
||||
#endif // CONFIG_BT_LE_CONTROLLER_LOG_SPI_OUT_ENABLED
|
||||
|
||||
if (r_ble_log_ctrl_level_and_mod(CONFIG_BT_LE_CONTROLLER_LOG_OUTPUT_LEVEL, CONFIG_BT_LE_CONTROLLER_LOG_MOD_OUTPUT_SWITCH) != ESP_OK) {
|
||||
goto ctrl_level_init_failed;
|
||||
@@ -281,20 +268,14 @@ esp_err_t esp_bt_controller_log_init(void)
|
||||
ctrl_level_init_failed:
|
||||
#if CONFIG_BT_LE_CONTROLLER_LOG_SPI_OUT_ENABLED
|
||||
r_ble_log_deinit_simple();
|
||||
#elif CONFIG_BT_LE_CONTROLLER_LOG_UHCI_OUT_ENABLED
|
||||
r_ble_log_deinit_simple();
|
||||
#else
|
||||
#else // !CONFIG_BT_LE_CONTROLLER_LOG_SPI_OUT_ENABLED
|
||||
r_ble_log_deinit_async();
|
||||
#endif
|
||||
#endif // CONFIG_BT_LE_CONTROLLER_LOG_SPI_OUT_ENABLED
|
||||
log_init_failed:
|
||||
#if CONFIG_BT_BLE_LOG_SPI_OUT_ENABLED
|
||||
ble_log_spi_out_deinit();
|
||||
spi_out_init_failed:
|
||||
#endif // CONFIG_BT_BLE_LOG_SPI_OUT_ENABLED
|
||||
#if CONFIG_BT_BLE_LOG_UHCI_OUT_ENABLED
|
||||
ble_log_uhci_out_deinit();
|
||||
uhci_out_init_failed:
|
||||
#endif // CONFIG_BT_BLE_LOG_UHCI_OUT_ENABLED
|
||||
return ESP_FAIL;
|
||||
}
|
||||
|
||||
@@ -304,17 +285,11 @@ void esp_bt_controller_log_deinit(void)
|
||||
ble_log_spi_out_deinit();
|
||||
#endif // CONFIG_BT_BLE_LOG_SPI_OUT_ENABLED
|
||||
|
||||
#if CONFIG_BT_BLE_LOG_UHCI_OUT_ENABLED
|
||||
ble_log_uhci_out_deinit();
|
||||
#endif // CONFIG_BT_BLE_LOG_UHCI_OUT_ENABLED
|
||||
|
||||
#if CONFIG_BT_LE_CONTROLLER_LOG_SPI_OUT_ENABLED
|
||||
r_ble_log_deinit_simple();
|
||||
#elif CONFIG_BT_LE_CONTROLLER_LOG_UHCI_OUT_ENABLED
|
||||
r_ble_log_deinit_simple();
|
||||
#else
|
||||
#else // !CONFIG_BT_LE_CONTROLLER_LOG_SPI_OUT_ENABLED
|
||||
r_ble_log_deinit_async();
|
||||
#endif
|
||||
#endif // CONFIG_BT_LE_CONTROLLER_LOG_SPI_OUT_ENABLED
|
||||
|
||||
log_is_inited = false;
|
||||
}
|
||||
@@ -1207,7 +1182,8 @@ esp_err_t esp_bt_controller_enable(esp_bt_mode_t mode)
|
||||
#endif // CONFIG_SW_COEXIST_ENABLE
|
||||
|
||||
#if CONFIG_BT_CTRL_RUN_IN_FLASH_ONLY
|
||||
esp_ble_controller_flash_only_param_config();
|
||||
r_ble_ll_scan_start_time_init_compensation(500);
|
||||
r_priv_sdk_config_insert_proc_time_set(500);
|
||||
#endif // CONFIG_BT_CTRL_RUN_IN_FLASH_ONLY
|
||||
|
||||
if (ble_stack_enable() != 0) {
|
||||
@@ -1507,7 +1483,7 @@ esp_power_level_t esp_ble_tx_power_get_enhanced(esp_ble_enhanced_power_type_t po
|
||||
}
|
||||
|
||||
#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
|
||||
#if !CONFIG_BT_LE_CONTROLLER_LOG_SPI_OUT_ENABLED && !CONFIG_BT_LE_CONTROLLER_LOG_UHCI_OUT_ENABLED
|
||||
#if !CONFIG_BT_LE_CONTROLLER_LOG_SPI_OUT_ENABLED
|
||||
static void esp_bt_controller_log_interface(uint32_t len, const uint8_t *addr, uint32_t len_append, const uint8_t *addr_append, uint32_t flag)
|
||||
{
|
||||
bool end = (flag & BIT(BLE_LOG_INTERFACE_FLAG_END));
|
||||
@@ -1529,7 +1505,7 @@ static void esp_bt_controller_log_interface(uint32_t len, const uint8_t *addr, u
|
||||
portEXIT_CRITICAL_SAFE(&spinlock);
|
||||
#endif // CONFIG_BT_LE_CONTROLLER_LOG_STORAGE_ENABLE
|
||||
}
|
||||
#endif // !CONFIG_BT_LE_CONTROLLER_LOG_SPI_OUT_ENABLED && !CONFIG_BT_LE_CONTROLLER_LOG_UHCI_OUT_ENABLED
|
||||
#endif // !CONFIG_BT_LE_CONTROLLER_LOG_SPI_OUT_ENABLED
|
||||
|
||||
void esp_ble_controller_log_dump_all(bool output)
|
||||
{
|
||||
@@ -1537,13 +1513,9 @@ void esp_ble_controller_log_dump_all(bool output)
|
||||
ble_log_spi_out_dump_all();
|
||||
#endif // CONFIG_BT_BLE_LOG_SPI_OUT_ENABLED
|
||||
|
||||
#if CONFIG_BT_BLE_LOG_UHCI_OUT_ENABLED
|
||||
ble_log_uhci_out_dump_all();
|
||||
#endif // CONFIG_BT_BLE_LOG_UHCI_OUT_ENABLED
|
||||
|
||||
#if CONFIG_BT_LE_CONTROLLER_LOG_STORAGE_ENABLE
|
||||
esp_bt_read_ctrl_log_from_flash(output);
|
||||
#elif !CONFIG_BT_LE_CONTROLLER_LOG_SPI_OUT_ENABLED && !CONFIG_BT_LE_CONTROLLER_LOG_UHCI_OUT_ENABLED
|
||||
#elif !CONFIG_BT_LE_CONTROLLER_LOG_SPI_OUT_ENABLED
|
||||
portMUX_TYPE spinlock = portMUX_INITIALIZER_UNLOCKED;
|
||||
portENTER_CRITICAL_SAFE(&spinlock);
|
||||
esp_panic_handler_feed_wdts();
|
||||
@@ -1799,10 +1771,3 @@ ble_capture_info_user_handler(uint8_t type, uint32_t reason, uint32_t param1, ui
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
#if CONFIG_BT_LE_MEM_CHECK_ENABLED
|
||||
void ble_memory_count_limit_set(uint16_t count_limit)
|
||||
{
|
||||
bt_osi_mem_count_limit_set(count_limit);
|
||||
}
|
||||
#endif // CONFIG_BT_LE_MEM_CHECK_ENABLED
|
||||
|
||||
@@ -283,9 +283,6 @@ extern "C" {
|
||||
|
||||
#define BLE_LL_TX_PWR_DBM_N (CONFIG_BT_LE_DFT_TX_POWER_LEVEL_DBM_EFF)
|
||||
|
||||
#define BLE_LL_ADV_SM_RESERVE_CNT_N MIN(DEFAULT_BT_LE_MAX_EXT_ADV_INSTANCES, CONFIG_BT_LE_EXT_ADV_RESERVED_MEMORY_COUNT)
|
||||
#define BLE_LL_CONN_SM_RESERVE_CNT_N MIN(DEFAULT_BT_LE_MAX_CONNECTIONS, CONFIG_BT_LE_CONN_RESERVED_MEMORY_COUNT)
|
||||
|
||||
#define RUN_BQB_TEST (0)
|
||||
#define RUN_QA_TEST (0)
|
||||
#define NIMBLE_DISABLE_SCAN_BACKOFF (0)
|
||||
|
||||
@@ -355,16 +355,6 @@ menu "Controller debug features"
|
||||
help
|
||||
Output ble controller logs to SPI bus
|
||||
|
||||
config BT_LE_CONTROLLER_LOG_UHCI_OUT_ENABLED
|
||||
bool "Output ble controller logs via UART DMA (Experimental)"
|
||||
depends on BT_LE_CONTROLLER_LOG_ENABLED
|
||||
depends on !BT_LE_CONTROLLER_LOG_DUMP_ONLY
|
||||
depends on !BT_LE_CONTROLLER_LOG_SPI_OUT_ENABLED
|
||||
select BT_BLE_LOG_UHCI_OUT_ENABLED
|
||||
default y
|
||||
help
|
||||
Output ble controller logs via UART DMA
|
||||
|
||||
config BT_LE_CONTROLLER_LOG_STORAGE_ENABLE
|
||||
bool "Store ble controller logs to flash(Experimental)"
|
||||
depends on !BT_LE_CONTROLLER_LOG_DUMP_ONLY
|
||||
@@ -451,12 +441,6 @@ menu "Controller debug features"
|
||||
config BT_LE_PTR_CHECK_ENABLED
|
||||
bool "Enable boundary check for internal memory"
|
||||
default n
|
||||
|
||||
config BT_LE_MEM_CHECK_ENABLED
|
||||
bool "Enable memory allocation check"
|
||||
default n
|
||||
help
|
||||
Used in internal tests only. Enable the memory allocation check.
|
||||
endmenu
|
||||
|
||||
config BT_LE_LL_RESOLV_LIST_SIZE
|
||||
@@ -866,38 +850,3 @@ config BT_LE_CTRL_FAST_CONN_DATA_TX_EN
|
||||
help
|
||||
If this option is enabled, The Controller will continue to
|
||||
Send an empty PDU after sending valid connection data within an interval.
|
||||
|
||||
menu "Reserved Memory Config"
|
||||
config BT_LE_EXT_ADV_RESERVED_MEMORY_COUNT
|
||||
int "The value of reserved EXT ADV memory count at initialization"
|
||||
range 0 4
|
||||
default 2
|
||||
help
|
||||
This value sets the number the Controller will allocate for extended advertisement
|
||||
instances at initialization process. If more extended advertisement instances are
|
||||
enabled, those memory will be dynamically allocated.
|
||||
Using reduced amount of reserved memory will save heap size at the cost of extra
|
||||
time consumption at advertising start process and possible advertising start failure
|
||||
due to memory shortage.
|
||||
The actual reserved memory count will be the minimum value between the maximum
|
||||
extended advertisement instances and the BT_LE_EXT_ADV_RESERVED_MEMORY_COUNT.
|
||||
|
||||
|
||||
config BT_LE_CONN_RESERVED_MEMORY_COUNT
|
||||
int "The value of reserved CONN memory count at initialization"
|
||||
range 0 70
|
||||
default 2
|
||||
help
|
||||
This value sets the number the Controller will allocate for connection instances
|
||||
at the initialization process. If more connection instances are enabled, those
|
||||
memory will be dynamically allocated.
|
||||
Using reduced amount of reserved memory will save heap size at the cost of extra
|
||||
time consumption at connection establishment process and possible connection
|
||||
establishment failure due to memory shortage.
|
||||
The actual reserved memory count will be the minimum value between the maximum connection instances and
|
||||
the BT_LE_CONN_RESERVED_MEMORY_COUNT.
|
||||
endmenu
|
||||
|
||||
config BT_LE_DTM_ENABLED
|
||||
bool "Enable Direct Test Mode (DTM) feature"
|
||||
default n
|
||||
|
||||
@@ -22,28 +22,6 @@ void conn_stack_deinitEnv(void);
|
||||
int conn_stack_enable(void);
|
||||
void conn_stack_disable(void);
|
||||
|
||||
int adv_stack_initEnv(void);
|
||||
void adv_stack_deinitEnv(void);
|
||||
int adv_stack_enable(void);
|
||||
void adv_stack_disable(void);
|
||||
|
||||
int extAdv_stack_initEnv(void);
|
||||
void extAdv_stack_deinitEnv(void);
|
||||
int extAdv_stack_enable(void);
|
||||
void extAdv_stack_disable(void);
|
||||
|
||||
int sync_stack_initEnv(void);
|
||||
void sync_stack_deinitEnv(void);
|
||||
int sync_stack_enable(void);
|
||||
void sync_stack_disable(void);
|
||||
|
||||
#if CONFIG_BT_LE_DTM_ENABLED
|
||||
int dtm_stack_initEnv(void);
|
||||
void dtm_stack_deinitEnv(void);
|
||||
int dtm_stack_enable(void);
|
||||
void dtm_stack_disable(void);
|
||||
#endif // CONFIG_BT_LE_DTM_ENABLED
|
||||
|
||||
#if CONFIG_BT_LE_ERROR_SIM_ENABLED
|
||||
int conn_errorSim_initEnv(void);
|
||||
void conn_errorSim_deinitEnv(void);
|
||||
@@ -107,28 +85,6 @@ int ble_stack_initEnv(void)
|
||||
return rc;
|
||||
}
|
||||
|
||||
rc = adv_stack_initEnv();
|
||||
if (rc) {
|
||||
return rc;
|
||||
}
|
||||
|
||||
rc = extAdv_stack_initEnv();
|
||||
if (rc) {
|
||||
return rc;
|
||||
}
|
||||
|
||||
rc = sync_stack_initEnv();
|
||||
if (rc) {
|
||||
return rc;
|
||||
}
|
||||
|
||||
#if CONFIG_BT_LE_DTM_ENABLED
|
||||
rc = dtm_stack_initEnv();
|
||||
if (rc) {
|
||||
return rc;
|
||||
}
|
||||
#endif // CONFIG_BT_LE_DTM_ENABLED
|
||||
|
||||
#if DEFAULT_BT_LE_MAX_CONNECTIONS
|
||||
rc = conn_stack_initEnv();
|
||||
if (rc) {
|
||||
@@ -153,12 +109,7 @@ void ble_stack_deinitEnv(void)
|
||||
#endif // CONFIG_BT_LE_ERROR_SIM_ENABLED
|
||||
conn_stack_deinitEnv();
|
||||
#endif // DEFAULT_BT_LE_MAX_CONNECTIONS
|
||||
#if CONFIG_BT_LE_DTM_ENABLED
|
||||
dtm_stack_deinitEnv();
|
||||
#endif // CONFIG_BT_LE_DTM_ENABLED
|
||||
sync_stack_deinitEnv();
|
||||
extAdv_stack_deinitEnv();
|
||||
adv_stack_deinitEnv();
|
||||
|
||||
base_stack_deinitEnv();
|
||||
}
|
||||
|
||||
@@ -171,28 +122,6 @@ int ble_stack_enable(void)
|
||||
return rc;
|
||||
}
|
||||
|
||||
rc = adv_stack_enable();
|
||||
if (rc) {
|
||||
return rc;
|
||||
}
|
||||
|
||||
rc = extAdv_stack_enable();
|
||||
if (rc) {
|
||||
return rc;
|
||||
}
|
||||
|
||||
rc = sync_stack_enable();
|
||||
if (rc) {
|
||||
return rc;
|
||||
}
|
||||
|
||||
#if CONFIG_BT_LE_DTM_ENABLED
|
||||
rc = dtm_stack_enable();
|
||||
if (rc) {
|
||||
return rc;
|
||||
}
|
||||
#endif // CONFIG_BT_LE_DTM_ENABLED
|
||||
|
||||
#if DEFAULT_BT_LE_MAX_CONNECTIONS
|
||||
rc = conn_stack_enable();
|
||||
if (rc) {
|
||||
@@ -231,11 +160,6 @@ void ble_stack_disable(void)
|
||||
#endif // CONFIG_BT_LE_ERROR_SIM_ENABLED
|
||||
conn_stack_disable();
|
||||
#endif // DEFAULT_BT_LE_MAX_CONNECTIONS
|
||||
#if CONFIG_BT_LE_DTM_ENABLED
|
||||
dtm_stack_disable();
|
||||
#endif // CONFIG_BT_LE_DTM_ENABLED
|
||||
sync_stack_disable();
|
||||
extAdv_stack_disable();
|
||||
adv_stack_disable();
|
||||
|
||||
base_stack_disable();
|
||||
}
|
||||
|
||||
@@ -59,10 +59,6 @@
|
||||
#include "ble_log/ble_log_spi_out.h"
|
||||
#endif // CONFIG_BT_BLE_LOG_SPI_OUT_ENABLED
|
||||
|
||||
#if CONFIG_BT_BLE_LOG_UHCI_OUT_ENABLED
|
||||
#include "ble_log/ble_log_uhci_out.h"
|
||||
#endif // CONFIG_BT_BLE_LOG_UHCI_OUT_ENABLED
|
||||
|
||||
/* Macro definition
|
||||
************************************************************************
|
||||
*/
|
||||
@@ -146,7 +142,8 @@ extern void r_ble_rtc_wake_up_state_clr(void);
|
||||
extern int os_msys_init(void);
|
||||
extern void os_msys_deinit(void);
|
||||
#if CONFIG_BT_CTRL_RUN_IN_FLASH_ONLY
|
||||
extern void esp_ble_controller_flash_only_param_config(void);
|
||||
extern void r_ble_ll_scan_start_time_init_compensation(uint32_t init_compensation);
|
||||
extern void r_priv_sdk_config_insert_proc_time_set(uint16_t insert_proc_time);
|
||||
#endif // CONFIG_BT_CTRL_RUN_IN_FLASH_ONLY
|
||||
#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
|
||||
extern sleep_retention_entries_config_t *r_esp_ble_mac_retention_link_get(uint8_t *size, uint8_t extra);
|
||||
@@ -194,9 +191,9 @@ static int esp_ecc_gen_key_pair(uint8_t *pub, uint8_t *priv);
|
||||
static int esp_ecc_gen_dh_key(const uint8_t *peer_pub_key_x, const uint8_t *peer_pub_key_y,
|
||||
const uint8_t *our_priv_key, uint8_t *out_dhkey);
|
||||
#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
|
||||
#if !CONFIG_BT_LE_CONTROLLER_LOG_SPI_OUT_ENABLED && !CONFIG_BT_LE_CONTROLLER_LOG_UHCI_OUT_ENABLED
|
||||
#if !CONFIG_BT_LE_CONTROLLER_LOG_SPI_OUT_ENABLED
|
||||
static void esp_bt_controller_log_interface(uint32_t len, const uint8_t *addr, uint32_t len_append, const uint8_t *addr_append, uint32_t flag);
|
||||
#endif // !CONFIG_BT_LE_CONTROLLER_LOG_SPI_OUT_ENABLED && !CONFIG_BT_LE_CONTROLLER_LOG_UHCI_OUT_ENABLED
|
||||
#endif // !CONFIG_BT_LE_CONTROLLER_LOG_SPI_OUT_ENABLED
|
||||
#if CONFIG_BT_LE_CONTROLLER_LOG_STORAGE_ENABLE
|
||||
static void esp_bt_ctrl_log_partition_get_and_erase_first_block(void);
|
||||
#endif // CONFIG_BT_LE_CONTROLLER_LOG_STORAGE_ENABLE
|
||||
@@ -223,21 +220,11 @@ esp_err_t esp_bt_controller_log_init(void)
|
||||
}
|
||||
#endif // CONFIG_BT_BLE_LOG_SPI_OUT_ENABLED
|
||||
|
||||
#if CONFIG_BT_BLE_LOG_UHCI_OUT_ENABLED
|
||||
if (ble_log_uhci_out_init() != 0) {
|
||||
goto uhci_out_init_failed;
|
||||
}
|
||||
#endif // CONFIG_BT_BLE_LOG_UHCI_OUT_ENABLED
|
||||
|
||||
#if CONFIG_BT_LE_CONTROLLER_LOG_SPI_OUT_ENABLED
|
||||
if (r_ble_log_init_simple(ble_log_spi_out_ll_write, ble_log_spi_out_ll_log_ev_proc) != 0) {
|
||||
goto log_init_failed;
|
||||
}
|
||||
#elif CONFIG_BT_LE_CONTROLLER_LOG_UHCI_OUT_ENABLED
|
||||
if (r_ble_log_init_simple(ble_log_uhci_out_ll_write, ble_log_uhci_out_ll_log_ev_proc) != 0) {
|
||||
goto log_init_failed;
|
||||
}
|
||||
#else
|
||||
#else // !CONFIG_BT_LE_CONTROLLER_LOG_SPI_OUT_ENABLED
|
||||
uint8_t buffers = 0;
|
||||
#if CONFIG_BT_LE_CONTROLLER_LOG_CTRL_ENABLED
|
||||
buffers |= ESP_BLE_LOG_BUF_CONTROLLER;
|
||||
@@ -251,12 +238,12 @@ esp_err_t esp_bt_controller_log_init(void)
|
||||
task_create = false;
|
||||
#elif CONFIG_BT_LE_CONTROLLER_LOG_STORAGE_ENABLE
|
||||
esp_bt_ctrl_log_partition_get_and_erase_first_block();
|
||||
#endif
|
||||
#endif // CONFIG_BT_LE_CONTROLLER_LOG_SPI_OUT_ENABLED
|
||||
|
||||
if (r_ble_log_init_async(esp_bt_controller_log_interface, task_create, buffers, (uint32_t *)log_bufs_size) != 0) {
|
||||
goto log_init_failed;
|
||||
}
|
||||
#endif
|
||||
#endif // CONFIG_BT_LE_CONTROLLER_LOG_SPI_OUT_ENABLED
|
||||
|
||||
if (r_ble_log_ctrl_level_and_mod(CONFIG_BT_LE_CONTROLLER_LOG_OUTPUT_LEVEL, CONFIG_BT_LE_CONTROLLER_LOG_MOD_OUTPUT_SWITCH) != ESP_OK) {
|
||||
goto ctrl_level_init_failed;
|
||||
@@ -267,20 +254,14 @@ esp_err_t esp_bt_controller_log_init(void)
|
||||
ctrl_level_init_failed:
|
||||
#if CONFIG_BT_LE_CONTROLLER_LOG_SPI_OUT_ENABLED
|
||||
r_ble_log_deinit_simple();
|
||||
#elif CONFIG_BT_LE_CONTROLLER_LOG_UHCI_OUT_ENABLED
|
||||
r_ble_log_deinit_simple();
|
||||
#else
|
||||
#else // !CONFIG_BT_LE_CONTROLLER_LOG_SPI_OUT_ENABLED
|
||||
r_ble_log_deinit_async();
|
||||
#endif
|
||||
#endif // CONFIG_BT_LE_CONTROLLER_LOG_SPI_OUT_ENABLED
|
||||
log_init_failed:
|
||||
#if CONFIG_BT_BLE_LOG_SPI_OUT_ENABLED
|
||||
ble_log_spi_out_deinit();
|
||||
spi_out_init_failed:
|
||||
#endif // CONFIG_BT_BLE_LOG_SPI_OUT_ENABLED
|
||||
#if CONFIG_BT_BLE_LOG_UHCI_OUT_ENABLED
|
||||
ble_log_uhci_out_deinit();
|
||||
uhci_out_init_failed:
|
||||
#endif // CONFIG_BT_BLE_LOG_UHCI_OUT_ENABLED
|
||||
return ESP_FAIL;
|
||||
}
|
||||
|
||||
@@ -290,17 +271,11 @@ void esp_bt_controller_log_deinit(void)
|
||||
ble_log_spi_out_deinit();
|
||||
#endif // CONFIG_BT_BLE_LOG_SPI_OUT_ENABLED
|
||||
|
||||
#if CONFIG_BT_BLE_LOG_UHCI_OUT_ENABLED
|
||||
ble_log_uhci_out_deinit();
|
||||
#endif // CONFIG_BT_BLE_LOG_UHCI_OUT_ENABLED
|
||||
|
||||
#if CONFIG_BT_LE_CONTROLLER_LOG_SPI_OUT_ENABLED
|
||||
r_ble_log_deinit_simple();
|
||||
#elif CONFIG_BT_LE_CONTROLLER_LOG_UHCI_OUT_ENABLED
|
||||
r_ble_log_deinit_simple();
|
||||
#else
|
||||
#else // !CONFIG_BT_LE_CONTROLLER_LOG_SPI_OUT_ENABLED
|
||||
r_ble_log_deinit_async();
|
||||
#endif
|
||||
#endif // CONFIG_BT_LE_CONTROLLER_LOG_SPI_OUT_ENABLED
|
||||
|
||||
log_is_inited = false;
|
||||
}
|
||||
@@ -1131,7 +1106,8 @@ esp_err_t esp_bt_controller_enable(esp_bt_mode_t mode)
|
||||
#endif // CONFIG_SW_COEXIST_ENABLE
|
||||
|
||||
#if CONFIG_BT_CTRL_RUN_IN_FLASH_ONLY
|
||||
esp_ble_controller_flash_only_param_config();
|
||||
r_ble_ll_scan_start_time_init_compensation(500);
|
||||
r_priv_sdk_config_insert_proc_time_set(500);
|
||||
#endif // CONFIG_BT_CTRL_RUN_IN_FLASH_ONLY
|
||||
|
||||
if (ble_stack_enable() != 0) {
|
||||
@@ -1430,7 +1406,7 @@ esp_power_level_t esp_ble_tx_power_get_enhanced(esp_ble_enhanced_power_type_t po
|
||||
}
|
||||
|
||||
#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
|
||||
#if !CONFIG_BT_LE_CONTROLLER_LOG_SPI_OUT_ENABLED && !CONFIG_BT_LE_CONTROLLER_LOG_UHCI_OUT_ENABLED
|
||||
#if !CONFIG_BT_LE_CONTROLLER_LOG_SPI_OUT_ENABLED
|
||||
static void esp_bt_controller_log_interface(uint32_t len, const uint8_t *addr, uint32_t len_append, const uint8_t *addr_append, uint32_t flag)
|
||||
{
|
||||
bool end = (flag & BIT(BLE_LOG_INTERFACE_FLAG_END));
|
||||
@@ -1452,7 +1428,7 @@ static void esp_bt_controller_log_interface(uint32_t len, const uint8_t *addr, u
|
||||
portEXIT_CRITICAL_SAFE(&spinlock);
|
||||
#endif // CONFIG_BT_LE_CONTROLLER_LOG_STORAGE_ENABLE
|
||||
}
|
||||
#endif // !CONFIG_BT_LE_CONTROLLER_LOG_SPI_OUT_ENABLED && !CONFIG_BT_LE_CONTROLLER_LOG_UHCI_OUT_ENABLED
|
||||
#endif // !CONFIG_BT_LE_CONTROLLER_LOG_SPI_OUT_ENABLED
|
||||
|
||||
void esp_ble_controller_log_dump_all(bool output)
|
||||
{
|
||||
@@ -1460,13 +1436,9 @@ void esp_ble_controller_log_dump_all(bool output)
|
||||
ble_log_spi_out_dump_all();
|
||||
#endif // CONFIG_BT_BLE_LOG_SPI_OUT_ENABLED
|
||||
|
||||
#if CONFIG_BT_BLE_LOG_UHCI_OUT_ENABLED
|
||||
ble_log_uhci_out_dump_all();
|
||||
#endif // CONFIG_BT_BLE_LOG_UHCI_OUT_ENABLED
|
||||
|
||||
#if CONFIG_BT_LE_CONTROLLER_LOG_STORAGE_ENABLE
|
||||
esp_bt_read_ctrl_log_from_flash(output);
|
||||
#elif !CONFIG_BT_LE_CONTROLLER_LOG_SPI_OUT_ENABLED && !CONFIG_BT_LE_CONTROLLER_LOG_UHCI_OUT_ENABLED
|
||||
#elif !CONFIG_BT_LE_CONTROLLER_LOG_SPI_OUT_ENABLED
|
||||
portMUX_TYPE spinlock = portMUX_INITIALIZER_UNLOCKED;
|
||||
portENTER_CRITICAL_SAFE(&spinlock);
|
||||
esp_panic_handler_feed_wdts();
|
||||
@@ -1721,10 +1693,3 @@ ble_capture_info_user_handler(uint8_t type, uint32_t reason, uint32_t param1, ui
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
#if CONFIG_BT_LE_MEM_CHECK_ENABLED
|
||||
void ble_memory_count_limit_set(uint16_t count_limit)
|
||||
{
|
||||
bt_osi_mem_count_limit_set(count_limit);
|
||||
}
|
||||
#endif // CONFIG_BT_LE_MEM_CHECK_ENABLED
|
||||
|
||||
@@ -280,9 +280,6 @@ extern "C" {
|
||||
|
||||
#define BLE_LL_TX_PWR_DBM_N (CONFIG_BT_LE_DFT_TX_POWER_LEVEL_DBM_EFF)
|
||||
|
||||
#define BLE_LL_ADV_SM_RESERVE_CNT_N MIN(DEFAULT_BT_LE_MAX_EXT_ADV_INSTANCES, CONFIG_BT_LE_EXT_ADV_RESERVED_MEMORY_COUNT)
|
||||
#define BLE_LL_CONN_SM_RESERVE_CNT_N MIN(DEFAULT_BT_LE_MAX_CONNECTIONS, CONFIG_BT_LE_CONN_RESERVED_MEMORY_COUNT)
|
||||
|
||||
#define RUN_BQB_TEST (0)
|
||||
#define RUN_QA_TEST (0)
|
||||
#define NIMBLE_DISABLE_SCAN_BACKOFF (0)
|
||||
|
||||
Submodule components/bt/controller/lib_esp32 updated: 185c7205db...b0ebfcf639
Submodule components/bt/controller/lib_esp32c2/esp32c2-bt-lib updated: ff958fab2f...3ad0070589
Submodule components/bt/controller/lib_esp32c3_family updated: 0c68809d62...3ff529142f
Submodule components/bt/controller/lib_esp32c5/esp32c5-bt-lib updated: 74cfecd57f...40a1921b1f
Submodule components/bt/controller/lib_esp32c6/esp32c6-bt-lib updated: 3655fcdaad...250e75199e
Submodule components/bt/controller/lib_esp32h2/esp32h2-bt-lib updated: a2ba40fae2...82cbc1dd93
@@ -22,6 +22,14 @@ if BLE_MESH
|
||||
for mesh packets. And this could help avoid collision of
|
||||
advertising packets.
|
||||
|
||||
config BLE_MESH_USE_UNIFIED_CRYPTO
|
||||
bool "Use the unified BLE tinycrypt implementation"
|
||||
depends on !BT_LE_CRYPTO_STACK_MBEDTLS && !BT_NIMBLE_CRYPTO_STACK_MBEDTLS
|
||||
default n
|
||||
help
|
||||
Enable this option to use the unified BLE tinycrypt solution
|
||||
instead of the default one in BLE Mesh stack.
|
||||
|
||||
menuconfig BLE_MESH_USE_BLE_50
|
||||
bool "Support using BLE 5.0 APIs for BLE Mesh"
|
||||
depends on BLE_MESH_EXPERIMENTAL
|
||||
|
||||
@@ -1303,7 +1303,7 @@ config BT_BLE_50_EXTEND_ADV_EN
|
||||
|
||||
config BT_BLE_50_PERIODIC_ADV_EN
|
||||
bool "Enable BLE periodic advertising"
|
||||
depends on BT_BLE_50_EXTEND_ADV_EN
|
||||
depends on BT_BLE_50_FEATURES_SUPPORTED
|
||||
default y
|
||||
help
|
||||
This enables BLE periodic advertising
|
||||
@@ -1317,7 +1317,7 @@ config BT_BLE_50_EXTEND_SCAN_EN
|
||||
|
||||
config BT_BLE_50_EXTEND_SYNC_EN
|
||||
bool "Enable BLE periodic advertising sync"
|
||||
depends on BT_BLE_50_EXTEND_SCAN_EN
|
||||
depends on BT_BLE_50_FEATURES_SUPPORTED
|
||||
default y
|
||||
help
|
||||
This enables BLE periodic advertising sync
|
||||
@@ -1331,21 +1331,21 @@ config BT_BLE_50_DTM_TEST_EN
|
||||
|
||||
config BT_BLE_FEAT_PERIODIC_ADV_SYNC_TRANSFER
|
||||
bool "Enable BLE periodic advertising sync transfer feature"
|
||||
depends on (BT_BLUEDROID_ENABLED && BT_BLE_50_PERIODIC_ADV_EN && ((BT_CONTROLLER_ENABLED && SOC_ESP_NIMBLE_CONTROLLER) || BT_CONTROLLER_DISABLED)) # NOERROR
|
||||
depends on (BT_BLUEDROID_ENABLED && BT_BLE_50_FEATURES_SUPPORTED && ((BT_CONTROLLER_ENABLED && SOC_ESP_NIMBLE_CONTROLLER) || BT_CONTROLLER_DISABLED)) # NOERROR
|
||||
default n
|
||||
help
|
||||
This enables BLE periodic advertising sync transfer feature
|
||||
|
||||
config BT_BLE_FEAT_PERIODIC_ADV_ENH
|
||||
bool "Enable periodic adv enhancements(adi support)"
|
||||
depends on (BT_BLUEDROID_ENABLED && BT_BLE_50_PERIODIC_ADV_EN && ((BT_CONTROLLER_ENABLED && SOC_ESP_NIMBLE_CONTROLLER) || BT_CONTROLLER_DISABLED)) # NOERROR
|
||||
depends on (BT_BLUEDROID_ENABLED && BT_BLE_50_FEATURES_SUPPORTED && ((BT_CONTROLLER_ENABLED && SOC_ESP_NIMBLE_CONTROLLER) || BT_CONTROLLER_DISABLED)) # NOERROR
|
||||
default n
|
||||
help
|
||||
Enable the periodic advertising enhancements
|
||||
|
||||
config BT_BLE_FEAT_CREATE_SYNC_ENH
|
||||
bool "Enable create sync enhancements(reporting disable and duplicate filtering enable support)"
|
||||
depends on (BT_BLUEDROID_ENABLED && BT_BLE_50_EXTEND_SYNC_EN && ((BT_CONTROLLER_ENABLED && SOC_ESP_NIMBLE_CONTROLLER) || BT_CONTROLLER_DISABLED)) # NOERROR
|
||||
depends on (BT_BLUEDROID_ENABLED && BT_BLE_50_FEATURES_SUPPORTED && ((BT_CONTROLLER_ENABLED && SOC_ESP_NIMBLE_CONTROLLER) || BT_CONTROLLER_DISABLED)) # NOERROR
|
||||
default n
|
||||
help
|
||||
Enable the create sync enhancements
|
||||
|
||||
@@ -67,9 +67,9 @@ void hci_host_send_packet(uint8_t *data, uint16_t len)
|
||||
#if (BT_HCI_LOG_INCLUDED == TRUE)
|
||||
bt_hci_log_record_hci_data(data[0], &data[1], len - 1);
|
||||
#endif
|
||||
#if CONFIG_BT_BLE_LOG_SPI_OUT_HCI_ENABLED
|
||||
ble_log_spi_out_hci_write(BLE_LOG_SPI_OUT_SOURCE_HCI_DOWNSTREAM, data, len);
|
||||
#endif // CONFIG_BT_BLE_LOG_SPI_OUT_HCI_ENABLED
|
||||
#if (BT_BLE_LOG_SPI_OUT_HCI_ENABLED && !SOC_ESP_NIMBLE_CONTROLLER)
|
||||
ble_log_spi_out_write_with_ts(BLE_LOG_SPI_OUT_SOURCE_HCI_DOWNSTREAM, data, len);
|
||||
#endif // (BT_BLE_LOG_SPI_OUT_HCI_ENABLED && !SOC_ESP_NIMBLE_CONTROLLER)
|
||||
#if (BT_CONTROLLER_INCLUDED == TRUE)
|
||||
esp_vhci_host_send_packet(data, len);
|
||||
#else /* BT_CONTROLLER_INCLUDED == TRUE */
|
||||
|
||||
@@ -429,7 +429,7 @@ esp_err_t esp_ble_gap_get_local_used_addr(esp_bd_addr_t local_used_addr, uint8_t
|
||||
}
|
||||
return ESP_OK;
|
||||
}
|
||||
#if ((BLE_42_SCAN_EN == TRUE) || (BLE_50_EXTEND_SCAN_EN == TRUE))
|
||||
|
||||
uint8_t *esp_ble_resolve_adv_data_by_type( uint8_t *adv_data, uint16_t adv_data_len, esp_ble_adv_data_type type, uint8_t *length)
|
||||
{
|
||||
if (length == NULL) {
|
||||
@@ -460,7 +460,7 @@ uint8_t *esp_ble_resolve_adv_data( uint8_t *adv_data, uint8_t type, uint8_t *len
|
||||
{
|
||||
return esp_ble_resolve_adv_data_by_type( adv_data, ESP_BLE_ADV_DATA_LEN_MAX + ESP_BLE_SCAN_RSP_DATA_LEN_MAX, (esp_ble_adv_data_type) type, length);
|
||||
}
|
||||
#endif // #if ((BLE_42_SCAN_EN == TRUE) || (BLE_50_EXTEND_SCAN_EN == TRUE))
|
||||
|
||||
#if (BLE_42_FEATURE_SUPPORT == TRUE)
|
||||
#if (BLE_42_ADV_EN == TRUE)
|
||||
esp_err_t esp_ble_gap_config_adv_data_raw(uint8_t *raw_data, uint32_t raw_data_len)
|
||||
|
||||
@@ -225,7 +225,6 @@ typedef union {
|
||||
*/
|
||||
struct sdp_remove_record_evt_param {
|
||||
esp_sdp_status_t status; /*!< Status */
|
||||
int record_handle; /*!< SDP record handle */
|
||||
} remove_record; /*!< SDP callback param of ESP_SDP_REMOVE_RECORD_COMP_EVT */
|
||||
|
||||
} esp_sdp_cb_param_t;
|
||||
|
||||
@@ -186,7 +186,7 @@ uint32_t btc_get_ble_status(void)
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#if (BLE_50_EXTEND_ADV_EN == TRUE)
|
||||
#if (BLE_50_FEATURE_SUPPORT == TRUE)
|
||||
// Number of active extended advertsing
|
||||
extern uint8_t btm_ble_ext_adv_active_count(void);
|
||||
if (btm_ble_ext_adv_active_count()) {
|
||||
|
||||
@@ -1273,8 +1273,7 @@ static void btc_sdp_remove_record(btc_sdp_args_t *arg)
|
||||
} while(0);
|
||||
|
||||
if (ret != ESP_SDP_SUCCESS) {
|
||||
param.remove_record.status = ret;
|
||||
param.remove_record.record_handle = arg->remove_record.record_handle;
|
||||
param.create_record.status = ret;
|
||||
btc_sdp_cb_to_app(ESP_SDP_REMOVE_RECORD_COMP_EVT, ¶m);
|
||||
}
|
||||
}
|
||||
@@ -1423,7 +1422,6 @@ void btc_sdp_cb_handler(btc_msg_t *msg)
|
||||
}
|
||||
|
||||
param.remove_record.status = p_data->sdp_remove_record.status;
|
||||
param.remove_record.record_handle = p_data->sdp_remove_record.handle;
|
||||
btc_sdp_cb_to_app(ESP_SDP_REMOVE_RECORD_COMP_EVT, ¶m);
|
||||
break;
|
||||
default:
|
||||
|
||||
@@ -223,26 +223,20 @@ static inline void trc_dump_buffer(const char *prefix, uint8_t *data, uint16_t l
|
||||
#if (BT_BLE_LOG_SPI_OUT_HOST_ENABLED && !CLASSIC_BT_INCLUDED)
|
||||
|
||||
#define BTM_TRACE_ERROR(fmt, args...) { \
|
||||
ble_log_spi_out_host_write(BLE_LOG_SPI_OUT_SOURCE_BLUEDROID, \
|
||||
BLE_LOG_SPI_OUT_BUILD_PREFIX(BLE_LOG_SPI_OUT_LEVEL_ERROR, "BT_BTM"), fmt, ## args); \
|
||||
if (btm_cb.trace_level >= BT_TRACE_LEVEL_ERROR && BT_LOG_LEVEL_CHECK(BTM, ERROR)) BT_PRINT_E("BT_BTM", fmt, ## args); \
|
||||
}
|
||||
|
||||
#define BTM_TRACE_WARNING(fmt, args...) { \
|
||||
ble_log_spi_out_host_write(BLE_LOG_SPI_OUT_SOURCE_BLUEDROID, \
|
||||
BLE_LOG_SPI_OUT_BUILD_PREFIX(BLE_LOG_SPI_OUT_LEVEL_WARN, "BT_BTM"), fmt, ## args); \
|
||||
if (btm_cb.trace_level >= BT_TRACE_LEVEL_WARNING && BT_LOG_LEVEL_CHECK(BTM, WARNING)) BT_PRINT_W("BT_BTM", fmt, ## args); \
|
||||
}
|
||||
|
||||
#define BTM_TRACE_API(fmt, args...) { \
|
||||
ble_log_spi_out_host_write(BLE_LOG_SPI_OUT_SOURCE_BLUEDROID, \
|
||||
BLE_LOG_SPI_OUT_BUILD_PREFIX(BLE_LOG_SPI_OUT_LEVEL_INFO, "BT_BTM"), fmt, ## args); \
|
||||
ble_log_spi_out_printf_enh(BLE_LOG_SPI_OUT_SOURCE_BLUEDROID, BLE_LOG_SPI_OUT_LEVEL_INFO, "BT_BTM", fmt, ## args); \
|
||||
if (btm_cb.trace_level >= BT_TRACE_LEVEL_API && BT_LOG_LEVEL_CHECK(BTM, API)) BT_PRINT_I("BT_BTM", fmt, ## args); \
|
||||
}
|
||||
|
||||
#define BTM_TRACE_EVENT(fmt, args...) { \
|
||||
ble_log_spi_out_host_write(BLE_LOG_SPI_OUT_SOURCE_BLUEDROID, \
|
||||
BLE_LOG_SPI_OUT_BUILD_PREFIX(BLE_LOG_SPI_OUT_LEVEL_DEBUG, "BT_BTM"), fmt, ## args); \
|
||||
ble_log_spi_out_printf_enh(BLE_LOG_SPI_OUT_SOURCE_BLUEDROID, BLE_LOG_SPI_OUT_LEVEL_DEBUG, "BT_BTM", fmt, ## args); \
|
||||
if (btm_cb.trace_level >= BT_TRACE_LEVEL_EVENT && BT_LOG_LEVEL_CHECK(BTM, EVENT)) BT_PRINT_D("BT_BTM", fmt, ## args); \
|
||||
}
|
||||
|
||||
@@ -265,26 +259,19 @@ static inline void trc_dump_buffer(const char *prefix, uint8_t *data, uint16_t l
|
||||
#if (BT_BLE_LOG_SPI_OUT_HOST_ENABLED && !CLASSIC_BT_INCLUDED)
|
||||
|
||||
#define L2CAP_TRACE_ERROR(fmt, args...) { \
|
||||
ble_log_spi_out_host_write(BLE_LOG_SPI_OUT_SOURCE_BLUEDROID, \
|
||||
BLE_LOG_SPI_OUT_BUILD_PREFIX(BLE_LOG_SPI_OUT_LEVEL_ERROR, "BT_L2CAP"), fmt, ## args); \
|
||||
if (l2cb.l2cap_trace_level >= BT_TRACE_LEVEL_ERROR && BT_LOG_LEVEL_CHECK(L2CAP, ERROR)) BT_PRINT_E("BT_L2CAP", fmt, ## args); \
|
||||
}
|
||||
|
||||
#define L2CAP_TRACE_WARNING(fmt, args...) { \
|
||||
ble_log_spi_out_host_write(BLE_LOG_SPI_OUT_SOURCE_BLUEDROID, \
|
||||
BLE_LOG_SPI_OUT_BUILD_PREFIX(BLE_LOG_SPI_OUT_LEVEL_WARN, "BT_L2CAP"), fmt, ## args); \
|
||||
if (l2cb.l2cap_trace_level >= BT_TRACE_LEVEL_WARNING && BT_LOG_LEVEL_CHECK(L2CAP, WARNING)) BT_PRINT_W("BT_L2CAP", fmt, ## args); \
|
||||
}
|
||||
|
||||
#define L2CAP_TRACE_API(fmt, args...) { \
|
||||
ble_log_spi_out_host_write(BLE_LOG_SPI_OUT_SOURCE_BLUEDROID, \
|
||||
BLE_LOG_SPI_OUT_BUILD_PREFIX(BLE_LOG_SPI_OUT_LEVEL_INFO, "BT_L2CAP"), fmt, ## args); \
|
||||
ble_log_spi_out_printf_enh(BLE_LOG_SPI_OUT_SOURCE_BLUEDROID, BLE_LOG_SPI_OUT_LEVEL_INFO, "BT_L2CAP", fmt, ## args); \
|
||||
if (l2cb.l2cap_trace_level >= BT_TRACE_LEVEL_API && BT_LOG_LEVEL_CHECK(L2CAP, API)) BT_PRINT_I("BT_L2CAP", fmt, ## args); \
|
||||
}
|
||||
|
||||
#define L2CAP_TRACE_EVENT(fmt, args...) { \
|
||||
ble_log_spi_out_host_write(BLE_LOG_SPI_OUT_SOURCE_BLUEDROID, \
|
||||
BLE_LOG_SPI_OUT_BUILD_PREFIX(BLE_LOG_SPI_OUT_LEVEL_DEBUG, "BT_L2CAP"), fmt, ## args); \
|
||||
if (l2cb.l2cap_trace_level >= BT_TRACE_LEVEL_EVENT && BT_LOG_LEVEL_CHECK(L2CAP, EVENT)) BT_PRINT_D("BT_L2CAP", fmt, ## args); \
|
||||
}
|
||||
|
||||
@@ -323,26 +310,19 @@ static inline void trc_dump_buffer(const char *prefix, uint8_t *data, uint16_t l
|
||||
#if (BT_BLE_LOG_SPI_OUT_HOST_ENABLED && !CLASSIC_BT_INCLUDED)
|
||||
|
||||
#define GAP_TRACE_ERROR(fmt, args...) { \
|
||||
ble_log_spi_out_host_write(BLE_LOG_SPI_OUT_SOURCE_BLUEDROID, \
|
||||
BLE_LOG_SPI_OUT_BUILD_PREFIX(BLE_LOG_SPI_OUT_LEVEL_ERROR, "BT_GAP"), fmt, ## args); \
|
||||
if (gap_cb.trace_level >= BT_TRACE_LEVEL_ERROR && BT_LOG_LEVEL_CHECK(GAP, ERROR)) BT_PRINT_E("BT_GAP", fmt, ## args); \
|
||||
}
|
||||
|
||||
#define GAP_TRACE_WARNING(fmt, args...) { \
|
||||
ble_log_spi_out_host_write(BLE_LOG_SPI_OUT_SOURCE_BLUEDROID, \
|
||||
BLE_LOG_SPI_OUT_BUILD_PREFIX(BLE_LOG_SPI_OUT_LEVEL_WARN, "BT_GAP"), fmt, ## args); \
|
||||
if (gap_cb.trace_level >= BT_TRACE_LEVEL_WARNING && BT_LOG_LEVEL_CHECK(GAP, WARNING)) BT_PRINT_W("BT_GAP", fmt, ## args); \
|
||||
}
|
||||
|
||||
#define GAP_TRACE_API(fmt, args...) { \
|
||||
ble_log_spi_out_host_write(BLE_LOG_SPI_OUT_SOURCE_BLUEDROID, \
|
||||
BLE_LOG_SPI_OUT_BUILD_PREFIX(BLE_LOG_SPI_OUT_LEVEL_INFO, "BT_GAP"), fmt, ## args); \
|
||||
ble_log_spi_out_printf_enh(BLE_LOG_SPI_OUT_SOURCE_BLUEDROID, BLE_LOG_SPI_OUT_LEVEL_INFO, "BT_GAP", fmt, ## args); \
|
||||
if (gap_cb.trace_level >= BT_TRACE_LEVEL_API && BT_LOG_LEVEL_CHECK(GAP, API)) BT_PRINT_I("BT_GAP", fmt, ## args); \
|
||||
}
|
||||
|
||||
#define GAP_TRACE_EVENT(fmt, args...) { \
|
||||
ble_log_spi_out_host_write(BLE_LOG_SPI_OUT_SOURCE_BLUEDROID, \
|
||||
BLE_LOG_SPI_OUT_BUILD_PREFIX(BLE_LOG_SPI_OUT_LEVEL_DEBUG, "BT_GAP"), fmt, ## args); \
|
||||
if (gap_cb.trace_level >= BT_TRACE_LEVEL_EVENT && BT_LOG_LEVEL_CHECK(GAP, EVENT)) BT_PRINT_D("BT_GAP", fmt, ## args); \
|
||||
}
|
||||
|
||||
@@ -460,26 +440,19 @@ static inline void trc_dump_buffer(const char *prefix, uint8_t *data, uint16_t l
|
||||
#if (BT_BLE_LOG_SPI_OUT_HOST_ENABLED && !CLASSIC_BT_INCLUDED)
|
||||
|
||||
#define GATT_TRACE_ERROR(fmt, args...) { \
|
||||
ble_log_spi_out_host_write(BLE_LOG_SPI_OUT_SOURCE_BLUEDROID, \
|
||||
BLE_LOG_SPI_OUT_BUILD_PREFIX(BLE_LOG_SPI_OUT_LEVEL_ERROR, "BT_GATT"), fmt, ## args); \
|
||||
if (gatt_cb.trace_level >= BT_TRACE_LEVEL_ERROR && BT_LOG_LEVEL_CHECK(GATT, ERROR)) BT_PRINT_E("BT_GATT", fmt, ## args); \
|
||||
}
|
||||
|
||||
#define GATT_TRACE_WARNING(fmt, args...) { \
|
||||
ble_log_spi_out_host_write(BLE_LOG_SPI_OUT_SOURCE_BLUEDROID, \
|
||||
BLE_LOG_SPI_OUT_BUILD_PREFIX(BLE_LOG_SPI_OUT_LEVEL_WARN, "BT_GATT"), fmt, ## args); \
|
||||
if (gatt_cb.trace_level >= BT_TRACE_LEVEL_WARNING && BT_LOG_LEVEL_CHECK(GATT, WARNING)) BT_PRINT_W("BT_GATT", fmt, ## args); \
|
||||
}
|
||||
|
||||
#define GATT_TRACE_API(fmt, args...) { \
|
||||
ble_log_spi_out_host_write(BLE_LOG_SPI_OUT_SOURCE_BLUEDROID, \
|
||||
BLE_LOG_SPI_OUT_BUILD_PREFIX(BLE_LOG_SPI_OUT_LEVEL_INFO, "BT_GATT"), fmt, ## args); \
|
||||
ble_log_spi_out_printf_enh(BLE_LOG_SPI_OUT_SOURCE_BLUEDROID, BLE_LOG_SPI_OUT_LEVEL_INFO, "BT_GATT", fmt, ## args); \
|
||||
if (gatt_cb.trace_level >= BT_TRACE_LEVEL_API && BT_LOG_LEVEL_CHECK(GATT, API)) BT_PRINT_I("BT_GATT", fmt, ## args); \
|
||||
}
|
||||
|
||||
#define GATT_TRACE_EVENT(fmt, args...) { \
|
||||
ble_log_spi_out_host_write(BLE_LOG_SPI_OUT_SOURCE_BLUEDROID, \
|
||||
BLE_LOG_SPI_OUT_BUILD_PREFIX(BLE_LOG_SPI_OUT_LEVEL_DEBUG, "BT_GATT"), fmt, ## args); \
|
||||
if (gatt_cb.trace_level >= BT_TRACE_LEVEL_EVENT && BT_LOG_LEVEL_CHECK(GATT, EVENT)) BT_PRINT_D("BT_GATT", fmt, ## args); \
|
||||
}
|
||||
|
||||
@@ -502,26 +475,19 @@ static inline void trc_dump_buffer(const char *prefix, uint8_t *data, uint16_t l
|
||||
#if (BT_BLE_LOG_SPI_OUT_HOST_ENABLED && !CLASSIC_BT_INCLUDED)
|
||||
|
||||
#define SMP_TRACE_ERROR(fmt, args...) { \
|
||||
ble_log_spi_out_host_write(BLE_LOG_SPI_OUT_SOURCE_BLUEDROID, \
|
||||
BLE_LOG_SPI_OUT_BUILD_PREFIX(BLE_LOG_SPI_OUT_LEVEL_ERROR, "BT_SMP"), fmt, ## args); \
|
||||
if (smp_cb.trace_level >= BT_TRACE_LEVEL_ERROR && BT_LOG_LEVEL_CHECK(SMP, ERROR)) BT_PRINT_E("BT_SMP", fmt, ## args); \
|
||||
}
|
||||
|
||||
#define SMP_TRACE_WARNING(fmt, args...) { \
|
||||
ble_log_spi_out_host_write(BLE_LOG_SPI_OUT_SOURCE_BLUEDROID, \
|
||||
BLE_LOG_SPI_OUT_BUILD_PREFIX(BLE_LOG_SPI_OUT_LEVEL_WARN, "BT_SMP"), fmt, ## args); \
|
||||
if (smp_cb.trace_level >= BT_TRACE_LEVEL_WARNING && BT_LOG_LEVEL_CHECK(SMP, WARNING)) BT_PRINT_W("BT_SMP", fmt, ## args); \
|
||||
}
|
||||
|
||||
#define SMP_TRACE_API(fmt, args...) { \
|
||||
ble_log_spi_out_host_write(BLE_LOG_SPI_OUT_SOURCE_BLUEDROID, \
|
||||
BLE_LOG_SPI_OUT_BUILD_PREFIX(BLE_LOG_SPI_OUT_LEVEL_INFO, "BT_SMP"), fmt, ## args); \
|
||||
ble_log_spi_out_printf_enh(BLE_LOG_SPI_OUT_SOURCE_BLUEDROID, BLE_LOG_SPI_OUT_LEVEL_INFO, "BT_SMP", fmt, ## args); \
|
||||
if (smp_cb.trace_level >= BT_TRACE_LEVEL_API && BT_LOG_LEVEL_CHECK(SMP, API)) BT_PRINT_I("BT_SMP", fmt, ## args); \
|
||||
}
|
||||
|
||||
#define SMP_TRACE_EVENT(fmt, args...) { \
|
||||
ble_log_spi_out_host_write(BLE_LOG_SPI_OUT_SOURCE_BLUEDROID, \
|
||||
BLE_LOG_SPI_OUT_BUILD_PREFIX(BLE_LOG_SPI_OUT_LEVEL_DEBUG, "BT_SMP"), fmt, ## args); \
|
||||
if (smp_cb.trace_level >= BT_TRACE_LEVEL_EVENT && BT_LOG_LEVEL_CHECK(SMP, EVENT)) BT_PRINT_D("BT_SMP", fmt, ## args); \
|
||||
}
|
||||
|
||||
|
||||
@@ -600,9 +600,9 @@ void bt_record_hci_data(uint8_t *data, uint16_t len)
|
||||
|
||||
static int host_recv_pkt_cb(uint8_t *data, uint16_t len)
|
||||
{
|
||||
#if CONFIG_BT_BLE_LOG_SPI_OUT_HCI_ENABLED
|
||||
ble_log_spi_out_hci_write(BLE_LOG_SPI_OUT_SOURCE_HCI_UPSTREAM, data, len);
|
||||
#endif // CONFIG_BT_BLE_LOG_SPI_OUT_HCI_ENABLED
|
||||
#if (BT_BLE_LOG_SPI_OUT_HCI_ENABLED && !SOC_ESP_NIMBLE_CONTROLLER)
|
||||
ble_log_spi_out_write_with_ts(BLE_LOG_SPI_OUT_SOURCE_HCI_UPSTREAM, data, len);
|
||||
#endif // (BT_BLE_LOG_SPI_OUT_HCI_ENABLED && !SOC_ESP_NIMBLE_CONTROLLER)
|
||||
//Target has packet to host, malloc new buffer for packet
|
||||
BT_HDR *pkt = NULL;
|
||||
#if (BLE_42_SCAN_EN == TRUE)
|
||||
|
||||
@@ -2519,7 +2519,8 @@ tBTM_STATUS btm_remove_acl (BD_ADDR bd_addr, tBT_TRANSPORT transport)
|
||||
} else /* otherwise can disconnect right away */
|
||||
#endif
|
||||
{
|
||||
if (hci_handle != 0xFFFF && (( p_dev_rec && p_dev_rec->sec_state != BTM_SEC_STATE_DISCONNECTING) || (!p_dev_rec))) {
|
||||
if (hci_handle != 0xFFFF && p_dev_rec &&
|
||||
p_dev_rec->sec_state != BTM_SEC_STATE_DISCONNECTING) {
|
||||
if (!btsnd_hcic_disconnect (hci_handle, HCI_ERR_PEER_USER)) {
|
||||
status = BTM_NO_RESOURCES;
|
||||
}
|
||||
|
||||
@@ -50,9 +50,6 @@
|
||||
#define BTM_BLE_META_READ_IRK_LEN 2
|
||||
#define BTM_BLE_META_ADD_WL_ATTR_LEN 9
|
||||
|
||||
#if CONTROLLER_RPA_LIST_ENABLE && BLE_SMP_ID_RESET_ENABLE
|
||||
static bool is_deleting_zero_addr;
|
||||
#endif // CONTROLLER_RPA_LIST_ENABLE && BLE_SMP_ID_RESET_ENABLE
|
||||
/*******************************************************************************
|
||||
** Functions implemented controller based privacy using Resolving List
|
||||
*******************************************************************************/
|
||||
@@ -346,21 +343,8 @@ void btm_ble_remove_resolving_list_entry_complete(UINT8 *p, UINT16 evt_len)
|
||||
btm_cb.ble_ctr_cb.resolving_list_avail_size++;
|
||||
}
|
||||
} else {
|
||||
#if CONTROLLER_RPA_LIST_ENABLE && BLE_SMP_ID_RESET_ENABLE
|
||||
if (!is_deleting_zero_addr)
|
||||
#endif // CONTROLLER_RPA_LIST_ENABLE && BLE_SMP_ID_RESET_ENABLE
|
||||
{
|
||||
/* It's expected for some controllers to return error when deleting {0,0,0,0,0,0}, ignore that case */
|
||||
BTM_TRACE_ERROR("%s remove resolving list error, status = 0x%02x", __func__, status);
|
||||
}
|
||||
BTM_TRACE_ERROR("%s remove resolving list error 0x%x", __func__, status);
|
||||
}
|
||||
|
||||
#if CONTROLLER_RPA_LIST_ENABLE && BLE_SMP_ID_RESET_ENABLE
|
||||
/* Clear zero address deletion flag regardless of outcome */
|
||||
if (is_deleting_zero_addr) {
|
||||
is_deleting_zero_addr = false;
|
||||
}
|
||||
#endif // CONTROLLER_RPA_LIST_ENABLE && BLE_SMP_ID_RESET_ENABLE
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
@@ -1155,7 +1139,6 @@ void btm_ble_resolving_list_cleanup(void)
|
||||
|
||||
}
|
||||
|
||||
#if (CONTROLLER_RPA_LIST_ENABLE == TRUE)
|
||||
void btm_ble_add_default_entry_to_resolving_list(void)
|
||||
{
|
||||
/*
|
||||
@@ -1168,17 +1151,9 @@ void btm_ble_add_default_entry_to_resolving_list(void)
|
||||
BD_ADDR peer_addr = {0x0, 0x0, 0x0, 0x0, 0x0, 0x0};
|
||||
BT_OCTET16 peer_irk = {0x0};
|
||||
|
||||
#if (BLE_SMP_ID_RESET_ENABLE == TRUE)
|
||||
// Remove the existing entry in resolving list When resetting the device identity
|
||||
btsnd_hcic_ble_rm_device_resolving_list(BLE_ADDR_PUBLIC, peer_addr);
|
||||
|
||||
is_deleting_zero_addr = true;
|
||||
|
||||
btm_ble_enq_resolving_list_pending(peer_addr, BTM_BLE_META_REMOVE_IRK_ENTRY);
|
||||
#endif // (BLE_SMP_ID_RESET_ENABLE == TRUE)
|
||||
btsnd_hcic_ble_add_device_resolving_list (BLE_ADDR_PUBLIC, peer_addr, peer_irk, btm_cb.devcb.id_keys.irk);
|
||||
|
||||
btm_ble_enq_resolving_list_pending(peer_addr, BTM_BLE_META_ADD_IRK_ENTRY);
|
||||
}
|
||||
#endif // (CONTROLLER_RPA_LIST_ENABLE == TRUE)
|
||||
#endif
|
||||
|
||||
@@ -368,12 +368,6 @@ tBTM_SEC_DEV_REC *btm_sec_alloc_dev (BD_ADDR bd_addr)
|
||||
}
|
||||
if (!new_entry_found) {
|
||||
p_dev_rec = btm_find_oldest_dev();
|
||||
#if (BLE_INCLUDED == TRUE) && (SMP_INCLUDED == TRUE)
|
||||
// If device record exists and contains identity key, remove it from resolving list
|
||||
if (p_dev_rec && (p_dev_rec->ble.key_type & SMP_SEC_KEY_TYPE_ID)) {
|
||||
btm_ble_resolving_list_remove_dev(p_dev_rec);
|
||||
}
|
||||
#endif // (BLE_INCLUDED == TRUE) && (SMP_INCLUDED == TRUE)
|
||||
} else {
|
||||
/* if the old device entry not present go with new entry */
|
||||
if (old_entry_found) {
|
||||
@@ -681,7 +675,6 @@ tBTM_SEC_DEV_REC *btm_find_oldest_dev (void)
|
||||
|
||||
/* All devices are paired; find the oldest */
|
||||
for (p_node = list_begin(btm_cb.p_sec_dev_rec_list); p_node; p_node = list_next(p_node)) {
|
||||
p_dev_rec = list_node(p_node);
|
||||
if ((p_dev_rec->sec_flags & BTM_SEC_IN_USE) == 0) {
|
||||
continue;
|
||||
}
|
||||
|
||||
@@ -342,12 +342,7 @@ BOOLEAN BTM_GetSecurityFlags (BD_ADDR bd_addr, UINT8 *p_sec_flags)
|
||||
*p_sec_flags = (UINT8) p_dev_rec->sec_flags;
|
||||
return (TRUE);
|
||||
}
|
||||
|
||||
BTM_TRACE_ERROR("%s: BTM_GetSecurityFlags failed for device [%02X:%02X:%02X:%02X:%02X:%02X]",
|
||||
__func__,
|
||||
bd_addr[0], bd_addr[1], bd_addr[2],
|
||||
bd_addr[3], bd_addr[4], bd_addr[5]);
|
||||
|
||||
BTM_TRACE_ERROR ("BTM_GetSecurityFlags false");
|
||||
return (FALSE);
|
||||
}
|
||||
|
||||
@@ -374,12 +369,7 @@ BOOLEAN BTM_GetSecurityFlagsByTransport (BD_ADDR bd_addr, UINT8 *p_sec_flags,
|
||||
|
||||
return (TRUE);
|
||||
}
|
||||
|
||||
BTM_TRACE_ERROR("%s: BTM_GetSecurityFlags failed for device [%02X:%02X:%02X:%02X:%02X:%02X]",
|
||||
__func__,
|
||||
bd_addr[0], bd_addr[1], bd_addr[2],
|
||||
bd_addr[3], bd_addr[4], bd_addr[5]);
|
||||
|
||||
BTM_TRACE_ERROR ("BTM_GetSecurityFlags false\n");
|
||||
return (FALSE);
|
||||
}
|
||||
|
||||
|
||||
@@ -936,7 +936,7 @@ menu "BLE Services"
|
||||
bool "Device Information Service"
|
||||
default y
|
||||
help
|
||||
Enable DIS service support
|
||||
Enable Device Information service support
|
||||
|
||||
config BT_NIMBLE_SVC_DIS_MANUFACTURER_NAME
|
||||
depends on BT_NIMBLE_DIS_SERVICE
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user