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43 Commits

Author SHA1 Message Date
310beae373 Merge branch 'bugfix/revert_optimize_wifi_rx_v4.0' into 'release/v4.0'
esp_wifi: revert WiFi RX optimization

See merge request espressif/esp-idf!5941
2019-08-30 10:59:20 +08:00
cf0caaec11 esp_wifi: revert WiFi RX optimization
Revert following commit since it has compatibility issue:
commit 45dd6175cd
esp32: optimize wifi rx
2019-08-29 21:26:42 +08:00
ea1037742d Merge branch 'bugfix/confgen_msys_path_v4.0' into 'release/v4.0'
Fix sdkconfig.rename paths for confgen.py in MSYS (v4.0)

See merge request espressif/esp-idf!5904
2019-08-29 10:15:21 +08:00
465d46e9dd Merge branch 'bugfix/cmake_src_exclude_issue_v4.0' into 'release/v4.0'
cmake: fix issue with handling of EXCLUDE_SRCS (v4.0)

See merge request espressif/esp-idf!5900
2019-08-28 14:42:20 +08:00
ebcb3a22b8 Merge branch 'bugfix/btdm_fix_ble_data_loss_and_send_same_pkt_twice_v4.0' into 'release/v4.0'
Component/bt: fix some BLE bugs (backport v4.0)

See merge request espressif/esp-idf!5909
2019-08-27 18:49:55 +08:00
61ba1c3026 components/bt: backport 2 BT bugfix about controller
1.Bugfix btdm sleep twice after wakeup request
2.Set the minimum encryption key size to be 7 octects for BR/EDR link for preventing KNOB attack
    This patch is to address the CVE-2019-9506 vulnerability.
2019-08-27 10:42:40 +08:00
90bbea65c1 Component/bt: fix some BLE bugs
- fix data loss and send same pkt twice sometimes
- fix adv data error in air sometimes
- fix adv start/stop crash sometimes
2019-08-26 20:29:01 +08:00
cb3d458050 Fix sdkconfig.rename paths for confgen.py in MSYS
Closes https://github.com/espressif/esp-idf/issues/3950
2019-08-26 11:12:44 +02:00
b72ff61899 cmake: fix issue with handling of EXCLUDE_SRCS 2019-08-26 11:49:30 +05:30
7bb8b5ba9e Merge branch 'Bugfix/nonblocking_udp_is_zero_for_4.0' into 'release/v4.0'
fix bug for nonblocking udp is zero for v4.0

See merge request espressif/esp-idf!5855
2019-08-23 10:50:45 +08:00
1f5f6adcb6 fix bug for nonblocking udp is zero for v4.0 2019-08-21 17:07:45 +08:00
16ee476a77 Merge branch 'bugfix/config_panic_gdbstub_build_issue_v4.0' into 'release/v4.0'
esp32_gdbstub: fix build error with esp32-2019r1 toolchain (v4.0)

See merge request espressif/esp-idf!5764
2019-08-20 13:11:24 +08:00
674ecc3b56 Merge branch 'bugfix/vfs_concurrent_select_v4.0' into 'release/v4.0'
VFS: Support concurrent VFS select calls & improve the documentation (backport v4.0)

See merge request espressif/esp-idf!5797
2019-08-20 12:49:03 +08:00
43efee5232 Merge branch 'bugfix/fix_mbedtls_net_sockets_error_handling_v4.0' into 'release/v4.0'
mbedtls: use `errno` instead of `SO_ERROR` for getting socket errors (v4.0)

See merge request espressif/esp-idf!5768
2019-08-20 12:28:56 +08:00
5dab23ea98 Merge branch 'bugfix/confserver_temporaryfile_windows_v4.0' into 'release/v4.0'
confserver: Fix NamedTemporaryFile use on Windows (v4.0)

See merge request espressif/esp-idf!5818
2019-08-20 12:28:16 +08:00
79afd2d580 confserver: Fix NamedTemporaryFile use on Windows
Can't have the file open twice, so need to close and delete after reopening.
2019-08-19 17:44:18 +10:00
a8e8919bbf tools: Support sdkconfig.rename files from outside IDF in confgen.py 2019-08-19 17:44:18 +10:00
ba0f4f17ed Merge branch 'bugfix/doc_pip_requirements_v4.0' into 'release/v4.0'
Add -r flag to pip install command from file (backport v4.0)

See merge request espressif/esp-idf!5798
2019-08-16 13:16:04 +08:00
a63b3c4fe6 Merge branch 'feature/dport_eco_revision2_v4.0' into 'release/v4.0'
make dport workaround depend on chip revision (v4.0)

See merge request espressif/esp-idf!5765
2019-08-16 13:15:18 +08:00
6b8c75d87c Merge branch 'bugfix/hwcrypt_fault_inj_v4.0' into 'release/v4.0'
AES & SHA fault injection checks (backport v4.0)

See merge request espressif/esp-idf!5748
2019-08-16 05:29:54 +08:00
68d82abe52 Added -r flag to pip install command from file
Closes https://github.com/espressif/esp-idf/pull/3874
Closes https://github.com/espressif/esp-idf/issues/3915
2019-08-15 14:23:49 +02:00
ec31f235e9 docs: Correct and extend the documentation about VFS select() 2019-08-15 14:11:51 +02:00
7e9d90b180 VFS: Support concurrent VFS select calls
Closes https://github.com/espressif/esp-idf/issues/3392
2019-08-15 14:11:37 +02:00
d4fcbe37f3 Merge branch 'bugfix/idf_tool_default_encoding_v4.0' into 'release/v4.0'
idf_tool: fix UnicodeDecodeError (v4.0)

See merge request espressif/esp-idf!5720
2019-08-15 16:35:58 +08:00
b9a5f764ba Merge branch 'bugfix/fix_flash_read_error_in_dio_mode_v4.0' into 'release/v4.0'
bugfix(flash): add spi dio address bitlen configure in psram init (backprot v4.0)

See merge request espressif/esp-idf!5790
2019-08-15 12:08:56 +08:00
764b70d7e6 bugfix(flash): add spi dio address bitlen configure in psram init 2019-08-15 10:52:56 +08:00
a1496b90e5 Merge branch 'bugfix/fix_ledc_clock_select_bug_v4.0' into 'release/v4.0'
driver(ledc): fixed ledc clock selection bug for v4.0

See merge request espressif/esp-idf!5757
2019-08-14 10:44:39 +08:00
622d6d5504 mbedtls: use errno instead of SO_ERROR for getting socket errors
As per upgrade notes of lwIP v2.1.0:
socket API: according to the standard, SO_ERROR now only returns asynchronous errors.
All other/normal/synchronous errors are (and always were) available via 'errno'.
LWIP_SOCKET_SET_ERRNO has been removed - 'errno' is always set - and required!

Refer: https://www.nongnu.org/lwip/2_1_x/upgrading.html

Fixes https://github.com/espressif/esp-azure/issues/51
2019-08-13 13:11:24 +05:30
1b903111b6 efuse: update the scheme of getting chip revision 2019-08-13 14:37:17 +08:00
69ef694178 esp32_gdbstub: fix build error with esp32-2019r1 toolchain
Fixes https://github.com/espressif/esp-idf/issues/3866
Closes https://github.com/espressif/esp-idf/issues/3834
2019-08-13 11:38:28 +05:30
81651b47a4 Merge branch 'ci/disable_nimble_tests_v4.0' into 'release/v4.0'
ci: Temporarily disable NimBLE tests in CI (v4.0)

See merge request espressif/esp-idf!5754
2019-08-13 10:42:38 +08:00
30dc86179c Merge branch 'bugfix/fix_wifi_bugs_for_authmode_and_multi_ssid_v4.0' into 'release/v4.0'
fix wifi bugs for authmode and multi ssid (backport v4.0)

See merge request espressif/esp-idf!5725
2019-08-12 23:34:43 +08:00
eff3ac05b3 driver(ledc): fixed ledc clock selection bug for release/v4.0 2019-08-12 17:16:52 +08:00
e5349d47a8 ci: Temporarily disable NimBLE tests in CI 2019-08-12 17:14:54 +10:00
4253adf42b modify WIFI_CONN_0101 case for wrong authmode of AP 2019-08-12 02:38:44 +00:00
088ed65194 wifi: fix wifi bugs for authmode and multi ssid 2019-08-12 02:38:44 +00:00
0ce94950b7 sha: Add fault injection checks reading hash digest state
Vulnerability reported by LimitedResults under Espressif Bug Bounty Program.
2019-08-11 15:58:48 +10:00
ae8b2684d7 aes: Add fault injection checks when writing key to hardware
Vulnerability reported by LimitedResults under Espressif Bug Bounty Program.
2019-08-11 15:58:48 +10:00
9c51f679a7 Merge branch 'bugfix/update_example_docs_build_instructions_to_cmake_v4.0' into 'release/v4.0'
examples: change default build instructions in docs to CMake (v4.0)

See merge request espressif/esp-idf!5704
2019-08-09 13:20:25 +08:00
5c07acad46 idf_tool: fix unicode decode error
Closes https://github.com/espressif/esp-idf/issues/3841
2019-08-07 21:27:29 +08:00
70af759dd2 examples: change default build instructions in docs to CMake 2019-08-06 17:25:25 +05:30
76191a0f55 Merge branch 'move/ble_example_v4.0' into 'release/v4.0'
examples/bluetooth: Move the demos to the appropriate locations (v4.0)

See merge request espressif/esp-idf!5687
2019-08-06 00:32:26 +08:00
f0c3114f2f examples/bluetooth: Move the demos to the appropriate locations (v4.0) 2019-08-06 00:32:25 +08:00
125 changed files with 887 additions and 496 deletions

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@ -39,7 +39,7 @@ See the Getting Started guide links above for a detailed setup guide. This is a
* Install host build dependencies mentioned in Getting Started guide.
* Add `tools/` directory to the PATH
* Run `python -m pip install requirements.txt` to install Python dependencies
* Run `python -m pip install -r requirements.txt` to install Python dependencies
## Configuring the Project

View File

@ -203,7 +203,8 @@ extern void btdm_controller_enable_sleep(bool enable);
extern void btdm_controller_set_sleep_mode(uint8_t mode);
extern uint8_t btdm_controller_get_sleep_mode(void);
extern bool btdm_power_state_active(void);
extern void btdm_wakeup_request(void);
extern void btdm_wakeup_request(bool request_lock);
extern void btdm_wakeup_request_end(void);
/* Low Power Clock */
extern bool btdm_lpclk_select_src(uint32_t sel);
extern bool btdm_lpclk_set_div(uint32_t div);
@ -893,6 +894,8 @@ bool esp_vhci_host_check_send_available(void)
void esp_vhci_host_send_packet(uint8_t *data, uint16_t len)
{
bool do_wakeup_request = false;
if (!btdm_power_state_active()) {
#if CONFIG_PM_ENABLE
if (semphr_take_wrapper(s_pm_lock_sem, 0)) {
@ -900,9 +903,15 @@ void esp_vhci_host_send_packet(uint8_t *data, uint16_t len)
}
esp_timer_stop(s_btdm_slp_tmr);
#endif
btdm_wakeup_request();
do_wakeup_request = true;
btdm_wakeup_request(true);
}
API_vhci_host_send_packet(data, len);
if (do_wakeup_request) {
btdm_wakeup_request_end();
}
}
esp_err_t esp_vhci_host_register_callback(const esp_vhci_host_callback_t *callback)
@ -1328,7 +1337,7 @@ esp_err_t esp_bt_controller_disable(void)
if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_ORIG) {
btdm_controller_enable_sleep(false);
if (!btdm_power_state_active()) {
btdm_wakeup_request();
btdm_wakeup_request(false);
}
while (!btdm_power_state_active()) {
ets_delay_us(1000);
@ -1466,7 +1475,7 @@ void esp_bt_controller_wakeup_request(void)
return;
}
btdm_wakeup_request();
btdm_wakeup_request(false);
}
esp_err_t esp_bredr_sco_datapath_set(esp_sco_data_path_t data_path)

View File

@ -51,6 +51,13 @@ typedef enum {
LEDC_APB_CLK, /*!< LEDC timer clock divided from APB clock (80Mhz) */
} ledc_clk_src_t;
typedef enum {
LEDC_AUTO_CLK, /*!< The driver will automatically select the source clock(REF_TICK or APB) based on the giving resolution and duty parameter when init the timer*/
LEDC_USE_REF_TICK, /*!< LEDC timer select REF_TICK clock as source clock*/
LEDC_USE_APB_CLK, /*!< LEDC timer select APB clock as source clock*/
LEDC_USE_RTC8M_CLK, /*!< LEDC timer select RTC8M_CLK as source clock. Only for low speed channels and this parameter must be the same for all low speed channels*/
} ledc_clk_cfg_t;
typedef enum {
LEDC_TIMER_0 = 0, /*!< LEDC timer 0 */
LEDC_TIMER_1, /*!< LEDC timer 1 */
@ -125,6 +132,9 @@ typedef struct {
};
ledc_timer_t timer_num; /*!< The timer source of channel (0 - 3) */
uint32_t freq_hz; /*!< LEDC timer frequency (Hz) */
ledc_clk_cfg_t clk_cfg; /*!< Configure LEDC source clock.
For low speed channels and high speed channels, you can specify the source clock using LEDC_USE_REF_TICK, LEDC_USE_APB_CLK or LEDC_AUTO_CLK.
For low speed channels, you can also specify the source clock using LEDC_USE_RTC8M_CLK, in this case, all low speed channel's source clock must be RTC8M_CLK*/
} ledc_timer_config_t;
typedef intr_handle_t ledc_isr_handle_t;

View File

@ -19,6 +19,7 @@
#include "soc/gpio_periph.h"
#include "driver/ledc.h"
#include "soc/ledc_periph.h"
#include "soc/rtc.h"
#include "esp_log.h"
static const char* LEDC_TAG = "ledc";
@ -51,12 +52,17 @@ static ledc_isr_handle_t s_ledc_fade_isr_handle = NULL;
#define LEDC_VAL_NO_CHANGE (-1)
#define LEDC_STEP_NUM_MAX (1023)
#define LEDC_DUTY_DECIMAL_BIT_NUM (4)
#define DELAY_CLK8M_CLK_SWITCH (5)
#define SLOW_CLK_CYC_CALIBRATE (13)
#define LEDC_HPOINT_VAL_MAX (LEDC_HPOINT_HSCH1_V)
#define LEDC_FADE_TOO_SLOW_STR "LEDC FADE TOO SLOW"
#define LEDC_FADE_TOO_FAST_STR "LEDC FADE TOO FAST"
static const char *LEDC_FADE_SERVICE_ERR_STR = "LEDC fade service not installed";
static const char *LEDC_FADE_INIT_ERROR_STR = "LEDC fade channel init error, not enough memory or service not installed";
//This value will be calibrated when in use.
static uint32_t s_ledc_slow_clk_8M = 0;
static void ledc_ls_timer_update(ledc_mode_t speed_mode, ledc_timer_t timer_sel)
{
if (speed_mode == LEDC_LOW_SPEED_MODE) {
@ -71,6 +77,23 @@ static IRAM_ATTR void ledc_ls_channel_update(ledc_mode_t speed_mode, ledc_channe
}
}
//We know that CLK8M is about 8M, but don't know the actual value. So we need to do a calibration.
static bool ledc_slow_clk_calibrate(void)
{
//Enable CLK8M for LEDC
SET_PERI_REG_MASK(RTC_CNTL_CLK_CONF_REG, RTC_CNTL_DIG_CLK8M_EN_M);
//Waiting for CLK8M to turn on
ets_delay_us(DELAY_CLK8M_CLK_SWITCH);
uint32_t cal_val = rtc_clk_cal(RTC_CAL_8MD256, SLOW_CLK_CYC_CALIBRATE);
if(cal_val == 0) {
ESP_LOGE(LEDC_TAG, "CLK8M_CLK calibration failed");
return false;
}
s_ledc_slow_clk_8M = 1000000ULL * (1 << RTC_CLK_CAL_FRACT) * 256 / cal_val;
ESP_LOGD(LEDC_TAG, "Calibrate CLK8M_CLK : %d Hz", s_ledc_slow_clk_8M);
return true;
}
static esp_err_t ledc_enable_intr_type(ledc_mode_t speed_mode, uint32_t channel, ledc_intr_type_t type)
{
LEDC_ARG_CHECK(speed_mode < LEDC_SPEED_MODE_MAX, "speed_mode");
@ -219,6 +242,60 @@ esp_err_t ledc_isr_register(void (*fn)(void*), void * arg, int intr_alloc_flags,
return ret;
}
// Setting the LEDC timer divisor with the given source clock, frequency and resolution.
static esp_err_t ledc_set_timer_div(ledc_mode_t speed_mode, ledc_timer_t timer_num, ledc_clk_cfg_t clk_cfg, int freq_hz, int duty_resolution)
{
uint32_t div_param = 0;
uint32_t precision = ( 0x1 << duty_resolution );
ledc_clk_src_t timer_clk_src = LEDC_APB_CLK;
// Calculate the divisor
// User specified source clock(RTC8M_CLK) for low speed channel
if ((speed_mode == LEDC_LOW_SPEED_MODE) && (clk_cfg == LEDC_USE_RTC8M_CLK)) {
if(s_ledc_slow_clk_8M == 0) {
if (ledc_slow_clk_calibrate() == false) {
goto error;
}
}
div_param = ( (uint64_t) s_ledc_slow_clk_8M << 8 ) / freq_hz / precision;
} else {
// Automatically select APB or REF_TICK as the source clock.
if (clk_cfg == LEDC_AUTO_CLK) {
// Try calculating divisor based on LEDC_APB_CLK
div_param = ( (uint64_t) LEDC_APB_CLK_HZ << 8 ) / freq_hz / precision;
if (div_param > LEDC_DIV_NUM_HSTIMER0_V) {
// APB_CLK results in divisor which too high. Try using REF_TICK as clock source.
timer_clk_src = LEDC_REF_TICK;
div_param = ((uint64_t) LEDC_REF_CLK_HZ << 8) / freq_hz / precision;
} else if (div_param < 256) {
// divisor is too low
goto error;
}
// User specified source clock(LEDC_APB_CLK_HZ or LEDC_REF_TICK)
} else {
timer_clk_src = (clk_cfg == LEDC_USE_APB_CLK) ? LEDC_APB_CLK : LEDC_REF_TICK;
uint32_t sclk_freq = (clk_cfg == LEDC_USE_APB_CLK) ? LEDC_APB_CLK_HZ : LEDC_REF_CLK_HZ;
div_param = ( (uint64_t) sclk_freq << 8 ) / freq_hz / precision;
}
}
if (div_param < 256 || div_param > LEDC_DIV_NUM_LSTIMER0_V) {
goto error;
}
// For low speed channels, if RTC_8MCLK is used as the source clock, the `slow_clk_sel` register should be cleared, otherwise it should be set.
if (speed_mode == LEDC_LOW_SPEED_MODE) {
LEDC.conf.slow_clk_sel = (clk_cfg == LEDC_USE_RTC8M_CLK) ? 0 : 1;
}
//Set the divisor
ledc_timer_set(speed_mode, timer_num, div_param, duty_resolution, timer_clk_src);
// reset the timer
ledc_timer_rst(speed_mode, timer_num);
return ESP_OK;
error:
ESP_LOGE(LEDC_TAG, "requested frequency and duty resolution can not be achieved, try reducing freq_hz or duty_resolution. div_param=%d",
(uint32_t ) div_param);
return ESP_FAIL;
}
esp_err_t ledc_timer_config(const ledc_timer_config_t* timer_conf)
{
LEDC_ARG_CHECK(timer_conf != NULL, "timer_conf");
@ -227,6 +304,7 @@ esp_err_t ledc_timer_config(const ledc_timer_config_t* timer_conf)
uint32_t timer_num = timer_conf->timer_num;
uint32_t speed_mode = timer_conf->speed_mode;
LEDC_ARG_CHECK(speed_mode < LEDC_SPEED_MODE_MAX, "speed_mode");
LEDC_ARG_CHECK(!((timer_conf->clk_cfg == LEDC_USE_RTC8M_CLK) && (speed_mode != LEDC_LOW_SPEED_MODE)), "Only low speed channel support RTC8M_CLK");
periph_module_enable(PERIPH_LEDC_MODULE);
if (freq_hz == 0 || duty_resolution == 0 || duty_resolution >= LEDC_TIMER_BIT_MAX) {
ESP_LOGE(LEDC_TAG, "freq_hz=%u duty_resolution=%u", freq_hz, duty_resolution);
@ -236,38 +314,7 @@ esp_err_t ledc_timer_config(const ledc_timer_config_t* timer_conf)
ESP_LOGE(LEDC_TAG, "invalid timer #%u", timer_num);
return ESP_ERR_INVALID_ARG;
}
esp_err_t ret = ESP_OK;
uint32_t precision = ( 0x1 << duty_resolution ); // 2**depth
// Try calculating divisor based on LEDC_APB_CLK
ledc_clk_src_t timer_clk_src = LEDC_APB_CLK;
// div_param is a Q10.8 fixed point value
uint64_t div_param = ( (uint64_t) LEDC_APB_CLK_HZ << 8 ) / freq_hz / precision;
if (div_param < 256) {
// divisor is too low
ESP_LOGE(LEDC_TAG, "requested frequency and duty resolution can not be achieved, try reducing freq_hz or duty_resolution. div_param=%d",
(uint32_t ) div_param);
ret = ESP_FAIL;
}
if (div_param > LEDC_DIV_NUM_HSTIMER0_V) {
// APB_CLK results in divisor which too high. Try using REF_TICK as clock source.
timer_clk_src = LEDC_REF_TICK;
div_param = ((uint64_t) LEDC_REF_CLK_HZ << 8) / freq_hz / precision;
if (div_param < 256 || div_param > LEDC_DIV_NUM_HSTIMER0_V) {
ESP_LOGE(LEDC_TAG, "requested frequency and duty resolution can not be achieved, try increasing freq_hz or duty_resolution. div_param=%d",
(uint32_t ) div_param);
ret = ESP_FAIL;
}
} else {
if (speed_mode == LEDC_LOW_SPEED_MODE) {
//for now, we only select 80mhz for slow clk of LEDC low speed channels.
LEDC.conf.slow_clk_sel = 1;
}
}
// set timer parameters
ledc_timer_set(speed_mode, timer_num, div_param, duty_resolution, timer_clk_src);
// reset timer
ledc_timer_rst(speed_mode, timer_num);
return ret;
return ledc_set_timer_div(speed_mode, timer_num, timer_conf->clk_cfg, freq_hz, duty_resolution);
}
esp_err_t ledc_set_pin(int gpio_num, ledc_mode_t speed_mode, ledc_channel_t ledc_channel)

View File

@ -86,6 +86,7 @@ static void timer_frequency_test(ledc_channel_t channel, ledc_timer_bit_t timer_
.bit_num = timer_bit,
.timer_num = timer,
.freq_hz = 5000,
.clk_cfg = LEDC_AUTO_CLK,
};
TEST_ESP_OK(ledc_channel_config(&ledc_ch_config));
TEST_ESP_OK(ledc_timer_config(&ledc_time_config));
@ -126,6 +127,7 @@ static void timer_duty_test(ledc_channel_t channel, ledc_timer_bit_t timer_bit,
.bit_num = timer_bit,
.timer_num = timer,
.freq_hz = 5000,
.clk_cfg = LEDC_AUTO_CLK,
};
TEST_ESP_OK(ledc_channel_config(&ledc_ch_config));
TEST_ESP_OK(ledc_timer_config(&ledc_time_config));
@ -188,6 +190,7 @@ TEST_CASE("LEDC error log channel and timer config", "[ledc][test_env=UT_T1_LEDC
ledc_time_config.duty_resolution = LEDC_TIMER_13_BIT;
ledc_time_config.timer_num = LEDC_TIMER_0;
ledc_time_config.freq_hz = 5000;
ledc_time_config.clk_cfg = LEDC_AUTO_CLK;
ledc_timer_config_t temp_timer_config = ledc_time_config;
TEST_ESP_OK(ledc_timer_config(&ledc_time_config));
@ -228,6 +231,7 @@ TEST_CASE("LEDC normal channel and timer config", "[ledc][test_env=UT_T1_LEDC]")
.bit_num = LEDC_TIMER_13_BIT,
.timer_num = LEDC_TIMER_0,
.freq_hz = 5000,
.clk_cfg = LEDC_AUTO_CLK,
};
ledc_timer_config_t temp_time_config = ledc_time_config;
@ -297,6 +301,7 @@ TEST_CASE("LEDC timer set", "[ledc][test_env=UT_T1_LEDC]")
.bit_num = 13,
.timer_num = LEDC_TIMER_0,
.freq_hz = 5000,
.clk_cfg = LEDC_AUTO_CLK,
};
TEST_ESP_OK(ledc_timer_config(&ledc_time_config));
@ -347,6 +352,7 @@ TEST_CASE("LEDC timer pause and resume", "[ledc][test_env=UT_T1_LEDC]")
.duty_resolution = LEDC_TIMER_13_BIT,
.timer_num = LEDC_TIMER_0,
.freq_hz = 5000,
.clk_cfg = LEDC_AUTO_CLK,
};
TEST_ESP_OK(ledc_timer_config(&ledc_time_config));
@ -392,6 +398,7 @@ TEST_CASE("LEDC fade with time(logic analyzer)", "[ledc][ignore]")
.duty_resolution = LEDC_TIMER_13_BIT,
.timer_num = LEDC_TIMER_0,
.freq_hz = 5000,
.clk_cfg = LEDC_AUTO_CLK,
};
TEST_ESP_OK(ledc_timer_config(&ledc_time_config));
@ -429,6 +436,7 @@ TEST_CASE("LEDC fade with step(logic analyzer)", "[ledc][ignore]")
.duty_resolution = LEDC_TIMER_13_BIT,
.timer_num = LEDC_TIMER_0,
.freq_hz = 5000,
.clk_cfg = LEDC_AUTO_CLK,
};
TEST_ESP_OK(ledc_timer_config(&ledc_time_config));
@ -470,6 +478,7 @@ TEST_CASE("LEDC memory test", "[ledc][test_env=UT_T1_LEDC]")
.duty_resolution = LEDC_TIMER_13_BIT,
.timer_num = LEDC_TIMER_0,
.freq_hz = 5000,
.clk_cfg = LEDC_AUTO_CLK,
};
TEST_ESP_OK(ledc_timer_config(&ledc_time_config));

View File

@ -55,6 +55,7 @@ static void produce_pulse(void)
.timer_num = LEDC_TIMER_1,
.duty_resolution = LEDC_TIMER_10_BIT,
.freq_hz = 1,
.clk_cfg = LEDC_AUTO_CLK,
};
ledc_timer_config(&ledc_timer);
@ -160,6 +161,7 @@ static void count_mode_test(gpio_num_t ctl_io)
.timer_num = LEDC_TIMER_1,
.duty_resolution = LEDC_TIMER_10_BIT,
.freq_hz = 100,
.clk_cfg = LEDC_AUTO_CLK,
};
ledc_timer_config(&ledc_timer);

View File

@ -17,7 +17,7 @@
#include <assert.h>
#include "esp_efuse_table.h"
// md5_digest_table 544d434da010ce22f7db1b14d38e1d66
// md5_digest_table 2e23344575b3d07f01ecb695294e9770
// This file was generated from the file esp_efuse_table.csv. DO NOT CHANGE THIS FILE MANUALLY.
// If you want to change some fields, you need to change esp_efuse_table.csv file
// then run `efuse_common_table` or `efuse_custom_table` command it will generate this file.
@ -151,6 +151,10 @@ static const esp_efuse_desc_t CHIP_VER_REV1[] = {
{EFUSE_BLK0, 111, 1}, // EFUSE_RD_CHIP_VER_REV1,
};
static const esp_efuse_desc_t CHIP_VER_REV2[] = {
{EFUSE_BLK0, 180, 1}, // EFUSE_RD_CHIP_VER_REV2,
};
static const esp_efuse_desc_t XPD_SDIO_REG[] = {
{EFUSE_BLK0, 142, 1}, // EFUSE_RD_XPD_SDIO_REG,
};
@ -336,6 +340,11 @@ const esp_efuse_desc_t* ESP_EFUSE_CHIP_VER_REV1[] = {
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_CHIP_VER_REV2[] = {
&CHIP_VER_REV2[0], // EFUSE_RD_CHIP_VER_REV2
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_XPD_SDIO_REG[] = {
&XPD_SDIO_REG[0], // EFUSE_RD_XPD_SDIO_REG
NULL

View File

@ -6,7 +6,7 @@
##########################################################################
# *) The value MAX_BLK_LEN depends on CONFIG_EFUSE_MAX_BLK_LEN, will be replaced with "None" - 256. "3/4" - 192. "REPEAT" - 128.
# !!!!!!!!!!! #
# After editing this file, run the command manually "make efuse_common_table" or "idf.py efuse_common_table"
# After editing this file, run the command manually "make efuse_common_table" or "idf.py efuse_common_table"
# this will generate new source files, next rebuild all the sources.
# !!!!!!!!!!! #
@ -36,11 +36,11 @@ ABS_DONE_0, EFUSE_BLK0, 196, 1, Secure boot is enabled for
ENCRYPT_FLASH_KEY, EFUSE_BLK1, 0, MAX_BLK_LEN, Flash encrypt. Key. (length = "None" - 256. "3/4" - 192. "REPEAT" - 128)
ENCRYPT_CONFIG, EFUSE_BLK0, 188, 4, Flash encrypt. EFUSE_FLASH_CRYPT_CONFIG_M
DISABLE_DL_ENCRYPT, EFUSE_BLK0, 199, 1, Flash encrypt. Disable UART bootloader encryption. EFUSE_DISABLE_DL_ENCRYPT.
DISABLE_DL_DECRYPT, EFUSE_BLK0, 200, 1, Flash encrypt. Disable UART bootloader decryption. EFUSE_DISABLE_DL_DECRYPT.
DISABLE_DL_CACHE, EFUSE_BLK0, 201, 1, Flash encrypt. Disable UART bootloader MMU cache. EFUSE_DISABLE_DL_CACHE.
DISABLE_JTAG, EFUSE_BLK0, 198, 1, Flash encrypt. Disable JTAG. EFUSE_RD_DISABLE_JTAG.
CONSOLE_DEBUG_DISABLE, EFUSE_BLK0, 194, 1, Flash encrypt. Disable ROM BASIC interpreter fallback. EFUSE_RD_CONSOLE_DEBUG_DISABLE.
DISABLE_DL_ENCRYPT, EFUSE_BLK0, 199, 1, Flash encrypt. Disable UART bootloader encryption. EFUSE_DISABLE_DL_ENCRYPT.
DISABLE_DL_DECRYPT, EFUSE_BLK0, 200, 1, Flash encrypt. Disable UART bootloader decryption. EFUSE_DISABLE_DL_DECRYPT.
DISABLE_DL_CACHE, EFUSE_BLK0, 201, 1, Flash encrypt. Disable UART bootloader MMU cache. EFUSE_DISABLE_DL_CACHE.
DISABLE_JTAG, EFUSE_BLK0, 198, 1, Flash encrypt. Disable JTAG. EFUSE_RD_DISABLE_JTAG.
CONSOLE_DEBUG_DISABLE, EFUSE_BLK0, 194, 1, Flash encrypt. Disable ROM BASIC interpreter fallback. EFUSE_RD_CONSOLE_DEBUG_DISABLE.
FLASH_CRYPT_CNT, EFUSE_BLK0, 20, 7, Flash encrypt. Flash encryption is enabled if this field has an odd number of bits set. EFUSE_FLASH_CRYPT_CNT.
# Write protection #
@ -53,7 +53,7 @@ WR_DIS_BLK3, EFUSE_BLK0, 9, 1, Write protection for EFUSE_B
# Read protection #
###################
RD_DIS_BLK1, EFUSE_BLK0, 16, 1, Flash encrypt. efuse_key_read_protected. EFUSE_RD_DIS_BLK1
RD_DIS_BLK2, EFUSE_BLK0, 17, 1, Security boot. efuse_key_read_protected. EFUSE_RD_DIS_BLK2
RD_DIS_BLK2, EFUSE_BLK0, 17, 1, Security boot. efuse_key_read_protected. EFUSE_RD_DIS_BLK2
RD_DIS_BLK3, EFUSE_BLK0, 18, 1, Read protection for EFUSE_BLK3. EFUSE_RD_DIS_BLK3
# Chip info #
@ -64,6 +64,7 @@ CHIP_VER_PKG, EFUSE_BLK0, 105, 3, EFUSE_RD_CHIP_VER_PKG
CHIP_CPU_FREQ_LOW, EFUSE_BLK0, 108, 1, EFUSE_RD_CHIP_CPU_FREQ_LOW
CHIP_CPU_FREQ_RATED, EFUSE_BLK0, 109, 1, EFUSE_RD_CHIP_CPU_FREQ_RATED
CHIP_VER_REV1, EFUSE_BLK0, 111, 1, EFUSE_RD_CHIP_VER_REV1
CHIP_VER_REV2, EFUSE_BLK0, 180, 1, EFUSE_RD_CHIP_VER_REV2
XPD_SDIO_REG, EFUSE_BLK0, 142, 1, EFUSE_RD_XPD_SDIO_REG
SDIO_TIEH, EFUSE_BLK0, 143, 1, EFUSE_RD_SDIO_TIEH
SDIO_FORCE, EFUSE_BLK0, 144, 1, EFUSE_RD_SDIO_FORCE

Can't render this file because it contains an unexpected character in line 7 and column 87.

View File

@ -17,7 +17,7 @@ extern "C" {
#endif
// md5_digest_table 544d434da010ce22f7db1b14d38e1d66
// md5_digest_table 2e23344575b3d07f01ecb695294e9770
// This file was generated from the file esp_efuse_table.csv. DO NOT CHANGE THIS FILE MANUALLY.
// If you want to change some fields, you need to change esp_efuse_table.csv file
// then run `efuse_common_table` or `efuse_custom_table` command it will generate this file.
@ -52,6 +52,7 @@ extern const esp_efuse_desc_t* ESP_EFUSE_CHIP_VER_PKG[];
extern const esp_efuse_desc_t* ESP_EFUSE_CHIP_CPU_FREQ_LOW[];
extern const esp_efuse_desc_t* ESP_EFUSE_CHIP_CPU_FREQ_RATED[];
extern const esp_efuse_desc_t* ESP_EFUSE_CHIP_VER_REV1[];
extern const esp_efuse_desc_t* ESP_EFUSE_CHIP_VER_REV2[];
extern const esp_efuse_desc_t* ESP_EFUSE_XPD_SDIO_REG[];
extern const esp_efuse_desc_t* ESP_EFUSE_SDIO_TIEH[];
extern const esp_efuse_desc_t* ESP_EFUSE_SDIO_FORCE[];

View File

@ -23,6 +23,7 @@
#include "esp_log.h"
#include "soc/efuse_periph.h"
#include "bootloader_random.h"
#include "soc/apb_ctrl_reg.h"
const static char *TAG = "efuse";
@ -31,8 +32,29 @@ const static char *TAG = "efuse";
// Returns chip version from efuse
uint8_t esp_efuse_get_chip_ver(void)
{
uint8_t chip_ver;
esp_efuse_read_field_blob(ESP_EFUSE_CHIP_VER_REV1, &chip_ver, 1);
uint8_t eco_bit0, eco_bit1, eco_bit2;
esp_efuse_read_field_blob(ESP_EFUSE_CHIP_VER_REV1, &eco_bit0, 1);
esp_efuse_read_field_blob(ESP_EFUSE_CHIP_VER_REV2, &eco_bit1, 1);
eco_bit2 = (REG_READ(APB_CTRL_DATE_REG) & 80000000) >> 31;
uint32_t combine_value = (eco_bit2 << 2) | (eco_bit1 << 1) | eco_bit0;
uint8_t chip_ver = 0;
switch (combine_value) {
case 0:
chip_ver = 0;
break;
case 1:
chip_ver = 1;
break;
case 3:
chip_ver = 2;
break;
case 7:
chip_ver = 3;
break;
default:
chip_ver = 0;
break;
}
return chip_ver;
}
@ -111,7 +133,7 @@ void esp_efuse_write_random_key(uint32_t blk_wdata0_reg)
ESP_LOGV(TAG, "Writing random values to address 0x%08x", blk_wdata0_reg);
for (int i = 0; i < 8; i++) {
ESP_LOGV(TAG, "EFUSE_BLKx_WDATA%d_REG = 0x%08x", i, buf[i]);
REG_WRITE(blk_wdata0_reg + 4*i, buf[i]);
REG_WRITE(blk_wdata0_reg + 4 * i, buf[i]);
}
bzero(buf, sizeof(buf));
bzero(raw, sizeof(raw));

View File

@ -1,5 +1,33 @@
menu "ESP32-specific"
choice ESP32_REV_MIN
prompt "Minimum Supported ESP32 Revision"
default ESP32_REV_MIN_0
help
Minimum revision that ESP-IDF would support.
ESP-IDF performs different strategy on different esp32 revision.
config ESP32_REV_MIN_0
bool "Rev 0"
config ESP32_REV_MIN_1
bool "Rev 1"
config ESP32_REV_MIN_2
bool "Rev 2"
config ESP32_REV_MIN_3
bool "Rev 3"
endchoice
config ESP32_REV_MIN
int
default 0 if ESP32_REV_MIN_0
default 1 if ESP32_REV_MIN_1
default 2 if ESP32_REV_MIN_2
default 3 if ESP32_REV_MIN_3
config ESP32_DPORT_WORKAROUND
bool
default "y" if !FREERTOS_UNICORE && ESP32_REV_MIN < 2
choice ESP32_DEFAULT_CPU_FREQ_MHZ
prompt "CPU frequency"
default ESP32_DEFAULT_CPU_FREQ_160

View File

@ -204,7 +204,7 @@ void IRAM_ATTR call_start_cpu0()
abort();
}
ESP_EARLY_LOGI(TAG, "Starting app cpu, entry point is %p", call_start_cpu1);
esp_flash_enc_mode_t mode;
mode = esp_get_flash_encryption_mode();
if (mode == ESP_FLASH_ENC_MODE_DEVELOPMENT) {
@ -408,6 +408,16 @@ void start_cpu0_default(void)
esp_flash_app_init();
esp_err_t flash_ret = esp_flash_init_default_chip();
assert(flash_ret == ESP_OK);
uint8_t revision = esp_efuse_get_chip_ver();
ESP_LOGI(TAG, "Chip Revision: %d", revision);
if (revision > CONFIG_ESP32_REV_MIN) {
ESP_LOGW(TAG, "Chip revision is higher than the one configured in menuconfig. Suggest to upgrade it.");
} else if(revision != CONFIG_ESP32_REV_MIN) {
ESP_LOGE(TAG, "ESP-IDF can't support this chip revision. Modify minimum supported revision in menuconfig");
abort();
}
#ifdef CONFIG_PM_ENABLE
esp_pm_impl_init();
#ifdef CONFIG_PM_DFS_INIT_AUTO

View File

@ -16,7 +16,7 @@
* DPORT access is used for do protection when dual core access DPORT internal register and APB register via DPORT simultaneously
* This function will be initialize after FreeRTOS startup.
* When cpu0 want to access DPORT register, it should notify cpu1 enter in high-priority interrupt for be mute. When cpu1 already in high-priority interrupt,
* cpu0 can access DPORT register. Currently, cpu1 will wait for cpu0 finish access and exit high-priority interrupt.
* cpu0 can access DPORT register. Currently, cpu1 will wait for cpu0 finish access and exit high-priority interrupt.
*/
#include <stdint.h>
@ -116,7 +116,7 @@ void IRAM_ATTR esp_dport_access_stall_other_cpu_end(void)
{
#ifndef CONFIG_FREERTOS_UNICORE
int cpu_id = xPortGetCoreID();
if (dport_core_state[0] == DPORT_CORE_STATE_IDLE
|| dport_core_state[1] == DPORT_CORE_STATE_IDLE) {
return;
@ -249,7 +249,7 @@ void IRAM_ATTR esp_dport_access_read_buffer(uint32_t *buff_out, uint32_t address
*/
uint32_t IRAM_ATTR esp_dport_access_reg_read(uint32_t reg)
{
#if defined(BOOTLOADER_BUILD) || defined(CONFIG_FREERTOS_UNICORE) || !defined(ESP_PLATFORM)
#if defined(BOOTLOADER_BUILD) || !defined(CONFIG_ESP32_DPORT_WORKAROUND) || !defined(ESP_PLATFORM)
return _DPORT_REG_READ(reg);
#else
uint32_t apb;
@ -295,7 +295,7 @@ uint32_t IRAM_ATTR esp_dport_access_reg_read(uint32_t reg)
*/
uint32_t IRAM_ATTR esp_dport_access_sequence_reg_read(uint32_t reg)
{
#if defined(BOOTLOADER_BUILD) || defined(CONFIG_FREERTOS_UNICORE) || !defined(ESP_PLATFORM)
#if defined(BOOTLOADER_BUILD) || !defined(CONFIG_ESP32_DPORT_WORKAROUND) || !defined(ESP_PLATFORM)
return _DPORT_REG_READ(reg);
#else
uint32_t apb;

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@ -33,7 +33,7 @@ uint32_t esp_dport_access_sequence_reg_read(uint32_t reg);
//only call in case of panic().
void esp_dport_access_int_abort(void);
#if defined(BOOTLOADER_BUILD) || defined(CONFIG_FREERTOS_UNICORE) || !defined(ESP_PLATFORM)
#if defined(BOOTLOADER_BUILD) || !defined(CONFIG_ESP32_DPORT_WORKAROUND) || !defined(ESP_PLATFORM)
#define DPORT_STALL_OTHER_CPU_START()
#define DPORT_STALL_OTHER_CPU_END()
#define DPORT_INTERRUPT_DISABLE()

View File

@ -429,6 +429,7 @@ static inline void disableAllWdts()
TIMERG1.wdt_wprotect = 0;
}
#if CONFIG_ESP32_PANIC_PRINT_REBOOT || CONFIG_ESP32_PANIC_SILENT_REBOOT
static void esp_panic_dig_reset() __attribute__((noreturn));
static void esp_panic_dig_reset()
@ -444,6 +445,7 @@ static void esp_panic_dig_reset()
;
}
}
#endif
static void putEntry(uint32_t pc, uint32_t sp)
{

View File

@ -508,6 +508,7 @@ static void IRAM_ATTR psram_gpio_config(psram_io_t *psram_io, psram_cache_mode_t
spi_cache_dummy = SPI0_R_QIO_DUMMY_CYCLELEN;
} else if (rd_mode_reg & SPI_FREAD_DIO_M) {
spi_cache_dummy = SPI0_R_DIO_DUMMY_CYCLELEN;
SET_PERI_REG_BITS(SPI_USER1_REG(0), SPI_USR_ADDR_BITLEN_V, SPI0_R_DIO_ADDR_BITSLEN, SPI_USR_ADDR_BITLEN_S);
} else if (rd_mode_reg & (SPI_FREAD_QUAD_M | SPI_FREAD_DUAL_M)) {
spi_cache_dummy = SPI0_R_FAST_DUMMY_CYCLELEN;
} else {

View File

@ -204,7 +204,7 @@ esp_err_t esp_read_mac(uint8_t* mac, esp_mac_type_t type)
ESP_LOGW(TAG, "incorrect mac type");
break;
}
return ESP_OK;
}
@ -307,10 +307,10 @@ void IRAM_ATTR esp_restart_noos()
WRITE_PERI_REG(GPIO_FUNC5_IN_SEL_CFG_REG, 0x30);
// Reset wifi/bluetooth/ethernet/sdio (bb/mac)
DPORT_SET_PERI_REG_MASK(DPORT_CORE_RST_EN_REG,
DPORT_SET_PERI_REG_MASK(DPORT_CORE_RST_EN_REG,
DPORT_BB_RST | DPORT_FE_RST | DPORT_MAC_RST |
DPORT_BT_RST | DPORT_BTMAC_RST | DPORT_SDIO_RST |
DPORT_SDIO_HOST_RST | DPORT_EMAC_RST | DPORT_MACPWR_RST |
DPORT_SDIO_HOST_RST | DPORT_EMAC_RST | DPORT_MACPWR_RST |
DPORT_RW_BTMAC_RST | DPORT_RW_BTLP_RST);
DPORT_REG_WRITE(DPORT_CORE_RST_EN_REG, 0);
@ -366,35 +366,27 @@ const char* esp_get_idf_version(void)
return IDF_VER;
}
static void get_chip_info_esp32(esp_chip_info_t* out_info)
void esp_chip_info(esp_chip_info_t* out_info)
{
uint32_t reg = REG_READ(EFUSE_BLK0_RDATA3_REG);
uint32_t efuse_rd3 = REG_READ(EFUSE_BLK0_RDATA3_REG);
memset(out_info, 0, sizeof(*out_info));
out_info->model = CHIP_ESP32;
if ((reg & EFUSE_RD_CHIP_VER_REV1_M) != 0) {
out_info->revision = 1;
}
if ((reg & EFUSE_RD_CHIP_VER_DIS_APP_CPU_M) == 0) {
out_info->revision = esp_efuse_get_chip_ver();
if ((efuse_rd3 & EFUSE_RD_CHIP_VER_DIS_APP_CPU_M) == 0) {
out_info->cores = 2;
} else {
out_info->cores = 1;
}
out_info->features = CHIP_FEATURE_WIFI_BGN;
if ((reg & EFUSE_RD_CHIP_VER_DIS_BT_M) == 0) {
if ((efuse_rd3 & EFUSE_RD_CHIP_VER_DIS_BT_M) == 0) {
out_info->features |= CHIP_FEATURE_BT | CHIP_FEATURE_BLE;
}
int package = (reg & EFUSE_RD_CHIP_VER_PKG_M) >> EFUSE_RD_CHIP_VER_PKG_S;
int package = (efuse_rd3 & EFUSE_RD_CHIP_VER_PKG_M) >> EFUSE_RD_CHIP_VER_PKG_S;
if (package == EFUSE_RD_CHIP_VER_PKG_ESP32D2WDQ5 ||
package == EFUSE_RD_CHIP_VER_PKG_ESP32PICOD2 ||
package == EFUSE_RD_CHIP_VER_PKG_ESP32PICOD4) {
out_info->features |= CHIP_FEATURE_EMB_FLASH;
}
}
void esp_chip_info(esp_chip_info_t* out_info)
{
// Only ESP32 is supported now, in the future call one of the
// chip-specific functions based on sdkconfig choice
return get_chip_info_esp32(out_info);
}

View File

@ -205,12 +205,14 @@ static void handle_H_command(const unsigned char* cmd, int len)
} else if (requested_task_index > s_scratch.task_count) {
ret = "E00";
} else {
TaskHandle_t handle;
TaskHandle_t handle = NULL;
get_task_handle(requested_task_index, &handle);
/* FIXME: for the task currently running on the other CPU, extracting the registers from TCB
* isn't valid. Need to use some IPC mechanism to obtain the registers of the other CPU
*/
esp_gdbstub_tcb_to_regfile(handle, &s_scratch.regfile);
if (handle != NULL) {
esp_gdbstub_tcb_to_regfile(handle, &s_scratch.regfile);
}
}
esp_gdbstub_send_str_packet(ret);
} else {

View File

@ -26,7 +26,7 @@
#define IDF_PERFORMANCE_MAX_ESP32_TIME_SHA1_32KB 5000
#define IDF_PERFORMANCE_MAX_ESP32_TIME_SHA512_32KB 4500
// AES-CBC hardware throughput (accounts for worst-case performance with PSRAM workaround)
#define IDF_PERFORMANCE_MIN_AES_CBC_THROUGHPUT_MBSEC 8.5
#define IDF_PERFORMANCE_MIN_AES_CBC_THROUGHPUT_MBSEC 8.2
// floating point instructions per divide and per sqrt (configured for worst-case with PSRAM workaround)
#define IDF_PERFORMANCE_MAX_ESP32_CYCLES_PER_DIV 70
#define IDF_PERFORMANCE_MAX_ESP32_CYCLES_PER_SQRT 140

View File

@ -28,20 +28,20 @@ test cases:
- - SSC SSC2 sta -C -s <target_ssid> -p <target_password>
- - R SSC2 RE "\+JAP:CONNECTED,%%s"%%(<target_ssid>)
- - SSC SSC1 ap -S -s <target_ssid> -p <target_password> -t 1
- - R SSC1 C +SAP:OK
- - R SSC1 C +SAP:ERROR
- - SSC SSC2 sta -D
- - R SSC2 C +QAP:OK
- - SSC SSC2 sta -S
- - R SSC2 RE "\+SCAN:%%s,.+,0,\d+"%%(<target_ssid>) C +SCANDONE
- - SSC SSC1 ap -S -s <target_ssid> -p <target_password> -t 5
- - R SSC1 C +SAP:OK
- - SSC SSC1 ap -S -s <target_ssid> -p <target_password> -t 6
- - R SSC1 C +SAP:ERROR
- - SSC SSC2 sta -S
- - R SSC2 RE "\+SCAN:%%s,.+,0,\d+"%%(<target_ssid>) C +SCANDONE
execution time: 0.0
expected result: "1.target1 set AP,open, \n2.target 2 jap succeed\n3.target1 set
AP,wpa_psk \n4.target 2 jap succeed\n5.target1 set AP, wpa2_psk \n6.target 2 jap
succeed\n7.target1 set AP,wap_wpa2_psk\n8.target 2 jap succeed\n9.target1 set
AP,加密方式为t 1\n10.target 2 上查询到target_ssid\n11.target1 set AP,加密方式为t 5\n12.target
AP,加密方式为t 1\n10.target 2 上查询到target_ssid\n11.target1 set AP,加密方式为t 6\n12.target
2 上查询到target_ssid"
initial condition: T2_1
level: Integration
@ -50,7 +50,7 @@ test cases:
和pwd,加密方式 wpa_psk \n4.target2 jap target1\n5.target1下设置ssid 和pwd,加密方式 wpa2_psk
\n6.target 2 jap target1\n7.target1下设置ssid 和pwd,加密方式 wap_wpa2_psk\n8.target2 jap
target1\n9.target1下设置ssid 和pwd,加密方式 wep \n10.target2上查询target_ssid\n11.target1下设置ssid
和pwd,加密方式 t 5 错误的加密方式\n12.target2上查询 target_ssid"
和pwd,加密方式 t 6 错误的加密方式\n12.target2上查询 target_ssid"
sub module: WIFI Connect
summary: station SAP+JAP test, different encryption
test environment: SSC_T2_5

View File

@ -7,6 +7,7 @@ entries:
sockets:tryget_socket_unconn (noflash_text)
sockets:sock_inc_used (noflash_text)
sockets:tryget_socket_unconn_nouse (noflash_text)
sockets:tryget_socket_unconn_locked (noflash_text)
sockets:done_socket (noflash_text)
sockets:lwip_recvfrom (noflash_text)
sockets:lwip_recv_tcp (noflash_text)
@ -15,6 +16,8 @@ entries:
sockets:lwip_send (noflash_text)
sockets:lwip_sendto (noflash_text)
sockets:event_callback (noflash_text)
sockets:lwip_select (noflash_text)
sockets:select_check_waiters (noflash_text)
api_lib:netconn_apimsg (noflash_text)
api_lib:netconn_recv_data (noflash_text)
api_lib:netconn_tcp_recvd_msg (noflash_text)

View File

@ -778,6 +778,7 @@
#define ESP_PPP 1
#define ESP_IPV6 1
#define ESP_SOCKET 1
#define ESP_LWIP_SELECT 1
#ifdef ESP_IRAM_ATTR
#undef ESP_IRAM_ATTR

View File

@ -49,6 +49,11 @@
*/
static portMUX_TYPE aes_spinlock = portMUX_INITIALIZER_UNLOCKED;
static inline bool valid_key_length(const esp_aes_context *ctx)
{
return ctx->key_bytes == 128/8 || ctx->key_bytes == 192/8 || ctx->key_bytes == 256/8;
}
void esp_aes_acquire_hardware( void )
{
portENTER_CRITICAL(&aes_spinlock);
@ -93,6 +98,7 @@ int esp_aes_setkey( esp_aes_context *ctx, const unsigned char *key,
}
ctx->key_bytes = keybits / 8;
memcpy(ctx->key, key, ctx->key_bytes);
ctx->key_in_hardware = 0;
return 0;
}
@ -102,28 +108,47 @@ int esp_aes_setkey( esp_aes_context *ctx, const unsigned char *key,
*
* Call only while holding esp_aes_acquire_hardware().
*/
static inline void esp_aes_setkey_hardware( esp_aes_context *ctx, int mode)
static void esp_aes_setkey_hardware(esp_aes_context *ctx, int mode)
{
const uint32_t MODE_DECRYPT_BIT = 4;
unsigned mode_reg_base = (mode == ESP_AES_ENCRYPT) ? 0 : MODE_DECRYPT_BIT;
ctx->key_in_hardware = 0;
for (int i = 0; i < ctx->key_bytes/4; ++i) {
DPORT_REG_WRITE(AES_KEY_BASE + i * 4, *(((uint32_t *)ctx->key) + i));
ctx->key_in_hardware += 4;
}
DPORT_REG_WRITE(AES_MODE_REG, mode_reg_base + ((ctx->key_bytes / 8) - 2));
/* Fault injection check: all words of key data should have been written to hardware */
if (ctx->key_in_hardware < 16
|| ctx->key_in_hardware != ctx->key_bytes) {
abort();
}
}
/* Run a single 16 byte block of AES, using the hardware engine.
*
* Call only while holding esp_aes_acquire_hardware().
*/
static void esp_aes_block(const void *input, void *output)
static int esp_aes_block(esp_aes_context *ctx, const void *input, void *output)
{
const uint32_t *input_words = (const uint32_t *)input;
uint32_t i0, i1, i2, i3;
uint32_t *output_words = (uint32_t *)output;
/* If no key is written to hardware yet, either the user hasn't called
mbedtls_aes_setkey_enc/mbedtls_aes_setkey_dec - meaning we also don't
know which mode to use - or a fault skipped the
key write to hardware. Treat this as a fatal error and zero the output block.
*/
if (ctx->key_in_hardware != ctx->key_bytes) {
bzero(output, 16);
return MBEDTLS_ERR_AES_INVALID_INPUT_LENGTH;
}
/* Storing i0,i1,i2,i3 in registers not an array
helps a lot with optimisations at -Os level */
i0 = input_words[0];
@ -152,11 +177,14 @@ static void esp_aes_block(const void *input, void *output)
Bypassing this check requires at least one additional fault.
*/
if(i0 == output_words[0] && i1 == output_words[1] && i2 == output_words[2] && i3 == output_words[3]) {
// calling two zeroing functions to narrow the
// window for a double-fault here
// calling zeroing functions to narrow the
// window for a double-fault of the abort step, here
memset(output, 0, 16);
mbedtls_platform_zeroize(output, 16);
abort();
}
return 0;
}
/*
@ -166,11 +194,18 @@ int esp_internal_aes_encrypt( esp_aes_context *ctx,
const unsigned char input[16],
unsigned char output[16] )
{
int r;
if (!valid_key_length(ctx)) {
return MBEDTLS_ERR_AES_INVALID_KEY_LENGTH;
}
esp_aes_acquire_hardware();
ctx->key_in_hardware = 0;
esp_aes_setkey_hardware(ctx, ESP_AES_ENCRYPT);
esp_aes_block(input, output);
r = esp_aes_block(ctx, input, output);
esp_aes_release_hardware();
return 0;
return r;
}
void esp_aes_encrypt( esp_aes_context *ctx,
@ -188,11 +223,18 @@ int esp_internal_aes_decrypt( esp_aes_context *ctx,
const unsigned char input[16],
unsigned char output[16] )
{
int r;
if (!valid_key_length(ctx)) {
return MBEDTLS_ERR_AES_INVALID_KEY_LENGTH;
}
esp_aes_acquire_hardware();
ctx->key_in_hardware = 0;
esp_aes_setkey_hardware(ctx, ESP_AES_DECRYPT);
esp_aes_block(input, output);
r = esp_aes_block(ctx, input, output);
esp_aes_release_hardware();
return 0;
return r;
}
void esp_aes_decrypt( esp_aes_context *ctx,
@ -202,7 +244,6 @@ void esp_aes_decrypt( esp_aes_context *ctx,
esp_internal_aes_decrypt(ctx, input, output);
}
/*
* AES-ECB block encryption/decryption
*/
@ -211,12 +252,19 @@ int esp_aes_crypt_ecb( esp_aes_context *ctx,
const unsigned char input[16],
unsigned char output[16] )
{
int r;
if (!valid_key_length(ctx)) {
return MBEDTLS_ERR_AES_INVALID_KEY_LENGTH;
}
esp_aes_acquire_hardware();
ctx->key_in_hardware = 0;
esp_aes_setkey_hardware(ctx, mode);
esp_aes_block(input, output);
r = esp_aes_block(ctx, input, output);
esp_aes_release_hardware();
return 0;
return r;
}
@ -240,14 +288,19 @@ int esp_aes_crypt_cbc( esp_aes_context *ctx,
return ( ERR_ESP_AES_INVALID_INPUT_LENGTH );
}
if (!valid_key_length(ctx)) {
return MBEDTLS_ERR_AES_INVALID_KEY_LENGTH;
}
esp_aes_acquire_hardware();
ctx->key_in_hardware = 0;
esp_aes_setkey_hardware(ctx, mode);
if ( mode == ESP_AES_DECRYPT ) {
while ( length > 0 ) {
memcpy(temp, input_words, 16);
esp_aes_block(input_words, output_words);
esp_aes_block(ctx, input_words, output_words);
for ( i = 0; i < 4; i++ ) {
output_words[i] = output_words[i] ^ iv_words[i];
@ -266,7 +319,7 @@ int esp_aes_crypt_cbc( esp_aes_context *ctx,
output_words[i] = input_words[i] ^ iv_words[i];
}
esp_aes_block(output_words, output_words);
esp_aes_block(ctx, output_words, output_words);
memcpy( iv_words, output_words, 16 );
input_words += 4;
@ -294,14 +347,19 @@ int esp_aes_crypt_cfb128( esp_aes_context *ctx,
int c;
size_t n = *iv_off;
if (!valid_key_length(ctx)) {
return MBEDTLS_ERR_AES_INVALID_KEY_LENGTH;
}
esp_aes_acquire_hardware();
ctx->key_in_hardware = 0;
esp_aes_setkey_hardware(ctx, ESP_AES_ENCRYPT);
if ( mode == ESP_AES_DECRYPT ) {
while ( length-- ) {
if ( n == 0 ) {
esp_aes_block(iv, iv );
esp_aes_block(ctx, iv, iv);
}
c = *input++;
@ -313,7 +371,7 @@ int esp_aes_crypt_cfb128( esp_aes_context *ctx,
} else {
while ( length-- ) {
if ( n == 0 ) {
esp_aes_block(iv, iv );
esp_aes_block(ctx, iv, iv);
}
iv[n] = *output++ = (unsigned char)( iv[n] ^ *input++ );
@ -342,13 +400,18 @@ int esp_aes_crypt_cfb8( esp_aes_context *ctx,
unsigned char c;
unsigned char ov[17];
if (!valid_key_length(ctx)) {
return MBEDTLS_ERR_AES_INVALID_KEY_LENGTH;
}
esp_aes_acquire_hardware();
ctx->key_in_hardware = 0;
esp_aes_setkey_hardware(ctx, ESP_AES_ENCRYPT);
while ( length-- ) {
memcpy( ov, iv, 16 );
esp_aes_block(iv, iv);
esp_aes_block(ctx, iv, iv);
if ( mode == ESP_AES_DECRYPT ) {
ov[16] = *input;
@ -382,13 +445,18 @@ int esp_aes_crypt_ctr( esp_aes_context *ctx,
int c, i;
size_t n = *nc_off;
if (!valid_key_length(ctx)) {
return MBEDTLS_ERR_AES_INVALID_KEY_LENGTH;
}
esp_aes_acquire_hardware();
ctx->key_in_hardware = 0;
esp_aes_setkey_hardware(ctx, ESP_AES_ENCRYPT);
while ( length-- ) {
if ( n == 0 ) {
esp_aes_block(nonce_counter, stream_block);
esp_aes_block(ctx, nonce_counter, stream_block);
for ( i = 16; i > 0; i-- )
if ( ++nonce_counter[i - 1] != 0 ) {
@ -432,13 +500,17 @@ int esp_aes_crypt_ofb( esp_aes_context *ctx,
return( MBEDTLS_ERR_AES_BAD_INPUT_DATA );
}
if (!valid_key_length(ctx)) {
return MBEDTLS_ERR_AES_INVALID_KEY_LENGTH;
}
esp_aes_acquire_hardware();
esp_aes_setkey_hardware(ctx, ESP_AES_ENCRYPT);
while( length-- ) {
if( n == 0 ) {
esp_aes_block( iv, iv );
esp_aes_block(ctx, iv, iv);
}
*output++ = *input++ ^ iv[n];

View File

@ -228,6 +228,7 @@ void esp_sha_read_digest_state(esp_sha_type sha_type, void *digest_state)
{
uint32_t *digest_state_words = NULL;
uint32_t *reg_addr_buf = NULL;
uint32_t word_len = sha_length(sha_type)/4;
#ifndef NDEBUG
{
SemaphoreHandle_t *engine_state = sha_get_engine_state(sha_type);
@ -250,15 +251,25 @@ void esp_sha_read_digest_state(esp_sha_type sha_type, void *digest_state)
if(sha_type == SHA2_384 || sha_type == SHA2_512) {
/* for these ciphers using 64-bit states, swap each pair of words */
DPORT_INTERRUPT_DISABLE(); // Disable interrupt only on current CPU.
for(int i = 0; i < sha_length(sha_type)/4; i += 2) {
for(int i = 0; i < word_len; i += 2) {
digest_state_words[i+1] = DPORT_SEQUENCE_REG_READ((uint32_t)&reg_addr_buf[i]);
digest_state_words[i] = DPORT_SEQUENCE_REG_READ((uint32_t)&reg_addr_buf[i+1]);
}
DPORT_INTERRUPT_RESTORE(); // restore the previous interrupt level
} else {
esp_dport_access_read_buffer(digest_state_words, (uint32_t)&reg_addr_buf[0], sha_length(sha_type)/4);
esp_dport_access_read_buffer(digest_state_words, (uint32_t)&reg_addr_buf[0], word_len);
}
esp_sha_unlock_memory_block();
/* Fault injection check: verify SHA engine actually ran,
state is not all zeroes.
*/
for (int i = 0; i < word_len; i++) {
if (digest_state_words[i] != 0) {
return;
}
}
abort(); // SHA peripheral returned all zero state, probably due to fault injection
}
void esp_sha_block(esp_sha_type sha_type, const void *data_block, bool is_first_block)

View File

@ -41,17 +41,13 @@ extern "C" {
/**
* \brief AES context structure
*
* \note buf is able to hold 32 extra bytes, which can be used:
* - for alignment purposes if VIA padlock is used, and/or
* - to simplify key expansion in the 256-bit case by
* generating an extra round key
*/
typedef struct {
uint8_t key_bytes;
volatile uint8_t key_in_hardware; /* This variable is used for fault injection checks, so marked volatile to avoid optimisation */
uint8_t key[32];
} esp_aes_context;
/**
* \brief The AES XTS context-type definition.
*/

View File

@ -59,16 +59,6 @@ static int net_prepare( void )
return ( 0 );
}
static int mbedtls_net_errno(int fd)
{
int sock_errno = 0;
u32_t optlen = sizeof(sock_errno);
getsockopt(fd, SOL_SOCKET, SO_ERROR, &sock_errno, &optlen);
return sock_errno;
}
/*
* Initialize a context
*/
@ -204,22 +194,19 @@ int mbedtls_net_bind( mbedtls_net_context *ctx, const char *bind_ip, const char
*
* Note: on a blocking socket this function always returns 0!
*/
static int net_would_block( const mbedtls_net_context *ctx, int *errout )
static int net_would_block( const mbedtls_net_context *ctx )
{
int error = mbedtls_net_errno(ctx->fd);
if ( errout ) {
*errout = error;
}
int error = errno;
/*
* Never return 'WOULD BLOCK' on a non-blocking socket
*/
if ( ( fcntl( ctx->fd, F_GETFL, 0) & O_NONBLOCK ) != O_NONBLOCK ) {
errno = error;
return ( 0 );
}
switch ( error ) {
switch ( errno = error ) {
#if defined EAGAIN
case EAGAIN:
#endif
@ -267,7 +254,7 @@ int mbedtls_net_accept( mbedtls_net_context *bind_ctx,
}
if ( ret < 0 ) {
if ( net_would_block( bind_ctx, NULL ) != 0 ) {
if ( net_would_block( bind_ctx ) != 0 ) {
return ( MBEDTLS_ERR_SSL_WANT_READ );
}
@ -347,7 +334,6 @@ int mbedtls_net_recv( void *ctx, unsigned char *buf, size_t len )
{
int ret;
int fd = ((mbedtls_net_context *) ctx)->fd;
int error = 0;
if ( fd < 0 ) {
return ( MBEDTLS_ERR_NET_INVALID_CONTEXT );
@ -356,15 +342,15 @@ int mbedtls_net_recv( void *ctx, unsigned char *buf, size_t len )
ret = (int) read( fd, buf, len );
if ( ret < 0 ) {
if ( net_would_block( ctx, &error ) != 0 ) {
if ( net_would_block( ctx ) != 0 ) {
return ( MBEDTLS_ERR_SSL_WANT_READ );
}
if ( error == EPIPE || error == ECONNRESET ) {
if ( errno == EPIPE || errno == ECONNRESET ) {
return ( MBEDTLS_ERR_NET_CONN_RESET );
}
if ( error == EINTR ) {
if ( errno == EINTR ) {
return ( MBEDTLS_ERR_SSL_WANT_READ );
}
@ -422,8 +408,6 @@ int mbedtls_net_send( void *ctx, const unsigned char *buf, size_t len )
int ret;
int fd = ((mbedtls_net_context *) ctx)->fd;
int error = 0;
if ( fd < 0 ) {
return ( MBEDTLS_ERR_NET_INVALID_CONTEXT );
}
@ -431,15 +415,15 @@ int mbedtls_net_send( void *ctx, const unsigned char *buf, size_t len )
ret = (int) write( fd, buf, len );
if ( ret < 0 ) {
if ( net_would_block( ctx, &error ) != 0 ) {
if ( net_would_block( ctx ) != 0 ) {
return ( MBEDTLS_ERR_SSL_WANT_WRITE );
}
if ( error == EPIPE || error == ECONNRESET ) {
if ( errno == EPIPE || errno == ECONNRESET ) {
return ( MBEDTLS_ERR_NET_CONN_RESET );
}
if ( error == EINTR ) {
if ( errno == EINTR ) {
return ( MBEDTLS_ERR_SSL_WANT_WRITE );
}

View File

@ -48,7 +48,7 @@ extern "C" {
// After completing read operations, use DPORT_STALL_OTHER_CPU_END().
// This method uses stall other CPU while reading DPORT registers.
// Useful for compatibility, as well as for large consecutive readings.
// This method is slower, but must be used if ROM functions or
// This method is slower, but must be used if ROM functions or
// other code is called which accesses DPORT without any other workaround.
// *) The pre-readable APB register before reading the DPORT register
// helps synchronize the operation of the two CPUs,
@ -73,7 +73,7 @@ extern "C" {
*/
static inline uint32_t IRAM_ATTR DPORT_REG_READ(uint32_t reg)
{
#if defined(BOOTLOADER_BUILD) || defined(CONFIG_FREERTOS_UNICORE) || !defined(ESP_PLATFORM)
#if defined(BOOTLOADER_BUILD) || !defined(CONFIG_ESP32_DPORT_WORKAROUND) || !defined(ESP_PLATFORM)
return _DPORT_REG_READ(reg);
#else
return esp_dport_access_reg_read(reg);
@ -106,7 +106,7 @@ static inline uint32_t IRAM_ATTR DPORT_REG_READ(uint32_t reg)
*/
static inline uint32_t IRAM_ATTR DPORT_SEQUENCE_REG_READ(uint32_t reg)
{
#if defined(BOOTLOADER_BUILD) || defined(CONFIG_FREERTOS_UNICORE) || !defined(ESP_PLATFORM)
#if defined(BOOTLOADER_BUILD) || !defined(CONFIG_ESP32_DPORT_WORKAROUND) || !defined(ESP_PLATFORM)
return _DPORT_REG_READ(reg);
#else
return esp_dport_access_sequence_reg_read(reg);
@ -166,7 +166,7 @@ static inline uint32_t IRAM_ATTR DPORT_SEQUENCE_REG_READ(uint32_t reg)
*/
static inline uint32_t IRAM_ATTR DPORT_READ_PERI_REG(uint32_t reg)
{
#if defined(BOOTLOADER_BUILD) || defined(CONFIG_FREERTOS_UNICORE) || !defined(ESP_PLATFORM)
#if defined(BOOTLOADER_BUILD) || !defined(CONFIG_ESP32_DPORT_WORKAROUND) || !defined(ESP_PLATFORM)
return _DPORT_REG_READ(reg);
#else
return esp_dport_access_reg_read(reg);

View File

@ -108,7 +108,7 @@
#define IS_DPORT_REG(_r) (((_r) >= DR_REG_DPORT_BASE) && (_r) <= DR_REG_DPORT_END)
#if !defined( BOOTLOADER_BUILD ) && !defined( CONFIG_FREERTOS_UNICORE ) && defined( ESP_PLATFORM )
#if !defined( BOOTLOADER_BUILD ) && defined( CONFIG_ESP32_DPORT_WORKAROUND ) && defined( ESP_PLATFORM )
#define ASSERT_IF_DPORT_REG(_r, OP) TRY_STATIC_ASSERT(!IS_DPORT_REG(_r), (Cannot use OP for DPORT registers use DPORT_##OP));
#else
#define ASSERT_IF_DPORT_REG(_r, OP)

View File

@ -66,9 +66,29 @@ Case 2: API functions are declared with an extra context pointer (the FS driver
Synchronous input/output multiplexing
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
If you want to use synchronous input/output multiplexing by :cpp:func:`select`
then you need to register VFS with the functions :cpp:func:`start_select` and
:cpp:func:`end_select` similar to the following example:
Synchronous input/output multiplexing by :cpp:func:`select` is supported in the VFS component. The implementation
works in the following way.
1. :cpp:func:`select` is called with file descriptors which could belong to various VFS drivers.
2. The file descriptors are divided into groups each belonging to one VFS driver.
3. The file descriptors belonging to non-socket VFS drivers are handed over to the given VFS drivers by :cpp:func:`start_select`
described later on this page. This function represents the driver-specific implementation of :cpp:func:`select` for
the given driver. This should be a non-blocking call which means the function should immediately return after setting up
the environment for checking events related to the given file descriptors.
4. The file descriptors belonging to the socket VFS driver are handed over to the socket driver by
:cpp:func:`socket_select` described later on this page. This is a blocking call which means that it will return only
if there is an event related to socket file descriptors or a non-socket driver signals :cpp:func:`socket_select`
to exit.
5. Results are collected from each VFS driver and all drivers are stopped by deinitiazation
of the environment for checking events.
6. The :cpp:func:`select` call ends and returns the appropriate results.
Non-socket VFS drivers
""""""""""""""""""""""
If you want to use :cpp:func:`select` with a file descriptor belonging to a non-socket VFS driver
then you need to register the driver with functions :cpp:func:`start_select` and
:cpp:func:`end_select` similarly to the following example:
.. highlight:: c
@ -81,25 +101,57 @@ then you need to register VFS with the functions :cpp:func:`start_select` and
:cpp:func:`start_select` is called for setting up the environment for
detection of read/write/error conditions on file descriptors belonging to the
given VFS. :cpp:func:`end_select` is called to stop/deinitialize/free the
environment which was setup by :cpp:func:`start_select`. Please refer to the
given VFS driver.
:cpp:func:`end_select` is called to stop/deinitialize/free the
environment which was setup by :cpp:func:`start_select`.
Please refer to the
reference implementation for the UART peripheral in
:component_file:`vfs/vfs_uart.c` and most particularly to the functions
:cpp:func:`esp_vfs_dev_uart_register`, :cpp:func:`uart_start_select`, and
:cpp:func:`uart_end_select`.
:cpp:func:`uart_end_select` for more information.
Please check the following examples that demonstrate the use of :cpp:func:`select` with VFS file descriptors:
- :example:`peripherals/uart_select`
- :example:`system/select`
- :example:`peripherals/uart/uart_select`
- :example:`system/select`
<<<<<<< HEAD
If :cpp:func:`select` is used for socket file descriptors only then one can
enable the :envvar:`CONFIG_LWIP_USE_ONLY_LWIP_SELECT` option which can reduce the code
=======
If you use :cpp:func:`select` for socket file descriptors, you can enable the :envvar:`CONFIG_LWIP_USE_ONLY_LWIP_SELECT` option to reduce the code
>>>>>>> afc2fdf27... Review all the files in the esp-idf's api_ref/storage directory
size and improve performance.
Socket VFS drivers
""""""""""""""""""
A socket VFS driver is using its own internal implementation of :cpp:func:`select` and non-socket VFS drivers notify
it upon read/write/error conditions.
A socket VFS driver needs to be registered with the following functions defined:
.. highlight:: c
::
// In definition of esp_vfs_t:
.socket_select = &lwip_select,
.get_socket_select_semaphore = &lwip_get_socket_select_semaphore,
.stop_socket_select = &lwip_stop_socket_select,
.stop_socket_select_isr = &lwip_stop_socket_select_isr,
// ... other members initialized
:cpp:func:`socket_select` is the internal implementation of :cpp:func:`select` for the socket driver. It works only
with file descriptors belonging to the socket VFS.
:cpp:func:`get_socket_select_semaphore` returns the signalization object (semaphore) which will be used in non-socket
drivers to stop the waiting in :cpp:func:`socket_select`.
:cpp:func:`stop_socket_select` call is used to stop the waiting in :cpp:func:`socket_select` by passing the object
returned by :cpp:func:`get_socket_select_semaphore`.
:cpp:func:`stop_socket_select_isr` has the same functionality as :cpp:func:`stop_socket_select` but it can be used
from ISR.
Please see :component_file:`lwip/port/esp32/vfs_lwip.c` for a reference socket driver implementation using LWIP.
.. note::
If you use :cpp:func:`select` for socket file descriptors only then you can enable the
:envvar:`CONFIG_LWIP_USE_ONLY_LWIP_SELECT` option to reduce the code size and improve performance.
Paths
-----

View File

@ -236,7 +236,7 @@ typedef struct
#endif // CONFIG_VFS_SUPPORT_TERMIOS
/** start_select is called for setting up synchronous I/O multiplexing of the desired file descriptors in the given VFS */
esp_err_t (*start_select)(int nfds, fd_set *readfds, fd_set *writefds, fd_set *exceptfds, esp_vfs_select_sem_t sem);
esp_err_t (*start_select)(int nfds, fd_set *readfds, fd_set *writefds, fd_set *exceptfds, esp_vfs_select_sem_t sem, void **end_select_args);
/** socket select function for socket FDs with the functionality of POSIX select(); this should be set only for the socket VFS */
int (*socket_select)(int nfds, fd_set *readfds, fd_set *writefds, fd_set *errorfds, struct timeval *timeout);
/** called by VFS to interrupt the socket_select call when select is activated from a non-socket VFS driver; set only for the socket driver */
@ -246,7 +246,7 @@ typedef struct
/** end_select is called to stop the I/O multiplexing and deinitialize the environment created by start_select for the given VFS */
void* (*get_socket_select_semaphore)();
/** get_socket_select_semaphore returns semaphore allocated in the socket driver; set only for the socket driver */
void (*end_select)();
esp_err_t (*end_select)(void *end_select_args);
} esp_vfs_t;

View File

@ -31,6 +31,16 @@ typedef struct {
xSemaphoreHandle sem;
} test_task_param_t;
typedef struct {
fd_set *rdfds;
fd_set *wrfds;
fd_set *errfds;
int maxfds;
struct timeval *tv;
int select_ret;
xSemaphoreHandle sem;
} test_select_task_param_t;
static const char message[] = "Hello world!";
static int open_dummy_socket()
@ -420,73 +430,121 @@ TEST_CASE("poll() timeout", "[vfs]")
deinit(uart_fd, socket_fd);
}
static void select_task(void *param)
static void select_task(void *task_param)
{
const test_task_param_t *test_task_param = param;
struct timeval tv = {
.tv_sec = 0,
.tv_usec = 100000,
};
const test_select_task_param_t *param = task_param;
fd_set rfds;
FD_ZERO(&rfds);
FD_SET(test_task_param->fd, &rfds);
int s = select(param->maxfds, param->rdfds, param->wrfds, param->errfds, param->tv);
TEST_ASSERT_EQUAL(param->select_ret, s);
int s = select(test_task_param->fd + 1, &rfds, NULL, NULL, &tv);
TEST_ASSERT_EQUAL(0, s); //timeout
if (test_task_param->sem) {
xSemaphoreGive(test_task_param->sem);
if (param->sem) {
xSemaphoreGive(param->sem);
}
vTaskDelete(NULL);
}
TEST_CASE("concurent selects work", "[vfs]")
static void inline start_select_task(test_select_task_param_t *param)
{
struct timeval tv = {
.tv_sec = 0,
.tv_usec = 100000,//irrelevant
};
xTaskCreate(select_task, "select_task", 4*1024, (void *) param, 5, NULL);
}
TEST_CASE("concurrent selects work", "[vfs]")
{
int uart_fd, socket_fd;
init(&uart_fd, &socket_fd);
const int dummy_socket_fd = open_dummy_socket();
fd_set rfds;
FD_ZERO(&rfds);
FD_SET(uart_fd, &rfds);
{
// Two tasks will wait for the same UART FD for reading and they will time-out
test_task_param_t test_task_param = {
.fd = uart_fd,
.sem = xSemaphoreCreateBinary(),
};
TEST_ASSERT_NOT_NULL(test_task_param.sem);
struct timeval tv = {
.tv_sec = 0,
.tv_usec = 100000,
};
xTaskCreate(select_task, "select_task", 4*1024, (void *) &test_task_param, 5, NULL);
vTaskDelay(10 / portTICK_PERIOD_MS); //make sure the task has started and waits in select()
fd_set rdfds1;
FD_ZERO(&rdfds1);
FD_SET(uart_fd, &rdfds1);
int s = select(uart_fd + 1, &rfds, NULL, NULL, &tv);
TEST_ASSERT_EQUAL(-1, s); //this select should fail because two selects are accessing UART
//(the other one is waiting for the timeout)
TEST_ASSERT_EQUAL(EINTR, errno);
test_select_task_param_t param = {
.rdfds = &rdfds1,
.wrfds = NULL,
.errfds = NULL,
.maxfds = uart_fd + 1,
.tv = &tv,
.select_ret = 0, // expected timeout
.sem = xSemaphoreCreateBinary(),
};
TEST_ASSERT_NOT_NULL(param.sem);
TEST_ASSERT_EQUAL(pdTRUE, xSemaphoreTake(test_task_param.sem, 1000 / portTICK_PERIOD_MS));
fd_set rdfds2;
FD_ZERO(&rdfds2);
FD_SET(uart_fd, &rdfds2);
FD_SET(socket_fd, &rdfds2);
FD_SET(dummy_socket_fd, &rdfds2);
FD_ZERO(&rfds);
FD_SET(socket_fd, &rfds);
start_select_task(&param);
vTaskDelay(10 / portTICK_PERIOD_MS); //make sure the task has started and waits in select()
test_task_param.fd = dummy_socket_fd;
int s = select(MAX(MAX(uart_fd, dummy_socket_fd), socket_fd) + 1, &rdfds2, NULL, NULL, &tv);
TEST_ASSERT_EQUAL(0, s); // timeout here as well
xTaskCreate(select_task, "select_task", 4*1024, (void *) &test_task_param, 5, NULL);
vTaskDelay(10 / portTICK_PERIOD_MS); //make sure the task has started and waits in select()
TEST_ASSERT_EQUAL(pdTRUE, xSemaphoreTake(param.sem, 1000 / portTICK_PERIOD_MS));
vSemaphoreDelete(param.sem);
}
s = select(socket_fd + 1, &rfds, NULL, NULL, &tv);
TEST_ASSERT_EQUAL(0, s); //this select should timeout as well as the concurrent one because
//concurrent socket select should work
{
// One tasks waits for UART reading and one for writing. The former will be successful and latter will
// time-out.
TEST_ASSERT_EQUAL(pdTRUE, xSemaphoreTake(test_task_param.sem, 1000 / portTICK_PERIOD_MS));
vSemaphoreDelete(test_task_param.sem);
struct timeval tv = {
.tv_sec = 0,
.tv_usec = 100000,
};
fd_set wrfds1;
FD_ZERO(&wrfds1);
FD_SET(uart_fd, &wrfds1);
test_select_task_param_t param = {
.rdfds = NULL,
.wrfds = &wrfds1,
.errfds = NULL,
.maxfds = uart_fd + 1,
.tv = &tv,
.select_ret = 0, // expected timeout
.sem = xSemaphoreCreateBinary(),
};
TEST_ASSERT_NOT_NULL(param.sem);
start_select_task(&param);
fd_set rdfds2;
FD_ZERO(&rdfds2);
FD_SET(uart_fd, &rdfds2);
FD_SET(socket_fd, &rdfds2);
FD_SET(dummy_socket_fd, &rdfds2);
const test_task_param_t send_param = {
.fd = uart_fd,
.delay_ms = 50,
.sem = xSemaphoreCreateBinary(),
};
TEST_ASSERT_NOT_NULL(send_param.sem);
start_task(&send_param); // This task will write to UART which will be detected by select()
int s = select(MAX(MAX(uart_fd, dummy_socket_fd), socket_fd) + 1, &rdfds2, NULL, NULL, &tv);
TEST_ASSERT_EQUAL(1, s);
TEST_ASSERT(FD_ISSET(uart_fd, &rdfds2));
TEST_ASSERT_UNLESS(FD_ISSET(socket_fd, &rdfds2));
TEST_ASSERT_UNLESS(FD_ISSET(dummy_socket_fd, &rdfds2));
TEST_ASSERT_EQUAL(pdTRUE, xSemaphoreTake(param.sem, 1000 / portTICK_PERIOD_MS));
vSemaphoreDelete(param.sem);
TEST_ASSERT_EQUAL(pdTRUE, xSemaphoreTake(send_param.sem, 1000 / portTICK_PERIOD_MS));
vSemaphoreDelete(send_param.sem);
}
deinit(uart_fd, socket_fd);
close(dummy_socket_fd);

View File

@ -794,13 +794,16 @@ int truncate(const char *path, off_t length)
return ret;
}
static void call_end_selects(int end_index, const fds_triple_t *vfs_fds_triple)
static void call_end_selects(int end_index, const fds_triple_t *vfs_fds_triple, void **driver_args)
{
for (int i = 0; i < end_index; ++i) {
const vfs_entry_t *vfs = get_vfs_for_index(i);
const fds_triple_t *item = &vfs_fds_triple[i];
if (vfs && vfs->vfs.end_select && item->isset) {
vfs->vfs.end_select();
esp_err_t err = vfs->vfs.end_select(driver_args[i]);
if (err != ESP_OK) {
ESP_LOGD(TAG, "end_select failed: %s", esp_err_to_name(err));
}
}
}
}
@ -855,6 +858,8 @@ static void esp_vfs_log_fd_set(const char *fds_name, const fd_set *fds)
int esp_vfs_select(int nfds, fd_set *readfds, fd_set *writefds, fd_set *errorfds, struct timeval *timeout)
{
// NOTE: Please see the "Synchronous input/output multiplexing" section of the ESP-IDF Programming Guide
// (API Reference -> Storage -> Virtual Filesystem) for a general overview of the implementation of VFS select().
int ret = 0;
struct _reent* r = __getreent();
@ -947,6 +952,15 @@ int esp_vfs_select(int nfds, fd_set *readfds, fd_set *writefds, fd_set *errorfds
}
}
void **driver_args = calloc(s_vfs_count, sizeof(void *));
if (driver_args == NULL) {
free(vfs_fds_triple);
__errno_r(r) = ENOMEM;
ESP_LOGD(TAG, "calloc is unsuccessful for driver args");
return -1;
}
for (int i = 0; i < s_vfs_count; ++i) {
const vfs_entry_t *vfs = get_vfs_for_index(i);
fds_triple_t *item = &vfs_fds_triple[i];
@ -958,16 +972,18 @@ int esp_vfs_select(int nfds, fd_set *readfds, fd_set *writefds, fd_set *errorfds
esp_vfs_log_fd_set("readfds", &item->readfds);
esp_vfs_log_fd_set("writefds", &item->writefds);
esp_vfs_log_fd_set("errorfds", &item->errorfds);
esp_err_t err = vfs->vfs.start_select(nfds, &item->readfds, &item->writefds, &item->errorfds, sel_sem);
esp_err_t err = vfs->vfs.start_select(nfds, &item->readfds, &item->writefds, &item->errorfds, sel_sem,
driver_args + i);
if (err != ESP_OK) {
call_end_selects(i, vfs_fds_triple);
call_end_selects(i, vfs_fds_triple, driver_args);
(void) set_global_fd_sets(vfs_fds_triple, s_vfs_count, readfds, writefds, errorfds);
if (sel_sem.is_sem_local && sel_sem.sem) {
vSemaphoreDelete(sel_sem.sem);
sel_sem.sem = NULL;
}
free(vfs_fds_triple);
free(driver_args);
__errno_r(r) = EINTR;
ESP_LOGD(TAG, "start_select failed: %s", esp_err_to_name(err));
return -1;
@ -1006,7 +1022,7 @@ int esp_vfs_select(int nfds, fd_set *readfds, fd_set *writefds, fd_set *errorfds
xSemaphoreTake(sel_sem.sem, ticks_to_wait);
}
call_end_selects(s_vfs_count, vfs_fds_triple); // for VFSs for start_select was called before
call_end_selects(s_vfs_count, vfs_fds_triple, driver_args); // for VFSs for start_select was called before
if (ret >= 0) {
ret += set_global_fd_sets(vfs_fds_triple, s_vfs_count, readfds, writefds, errorfds);
}
@ -1015,6 +1031,7 @@ int esp_vfs_select(int nfds, fd_set *readfds, fd_set *writefds, fd_set *errorfds
sel_sem.sem = NULL;
}
free(vfs_fds_triple);
free(driver_args);
ESP_LOGD(TAG, "esp_vfs_select returns %d", ret);
esp_vfs_log_fd_set("readfds", readfds);

View File

@ -111,20 +111,21 @@ static vfs_uart_context_t* s_ctx[UART_NUM] = {
#endif
};
/* Lock ensuring that uart_select is used from only one task at the time */
static _lock_t s_one_select_lock;
typedef struct {
esp_vfs_select_sem_t select_sem;
fd_set *readfds;
fd_set *writefds;
fd_set *errorfds;
fd_set readfds_orig;
fd_set writefds_orig;
fd_set errorfds_orig;
} uart_select_args_t;
static esp_vfs_select_sem_t _select_sem = {.sem = NULL};
static fd_set *_readfds = NULL;
static fd_set *_writefds = NULL;
static fd_set *_errorfds = NULL;
static fd_set *_readfds_orig = NULL;
static fd_set *_writefds_orig = NULL;
static fd_set *_errorfds_orig = NULL;
static void uart_end_select();
static uart_select_args_t **s_registered_selects = NULL;
static int s_registered_select_num = 0;
static portMUX_TYPE s_registered_select_lock = portMUX_INITIALIZER_UNLOCKED;
static esp_err_t uart_end_select(void *end_select_args);
static int uart_open(const char * path, int flags, int mode)
{
@ -335,132 +336,156 @@ static int uart_fsync(int fd)
return 0;
}
static void select_notif_callback(uart_port_t uart_num, uart_select_notif_t uart_select_notif, BaseType_t *task_woken)
static esp_err_t register_select(uart_select_args_t *args)
{
switch (uart_select_notif) {
case UART_SELECT_READ_NOTIF:
if (FD_ISSET(uart_num, _readfds_orig)) {
FD_SET(uart_num, _readfds);
esp_vfs_select_triggered_isr(_select_sem, task_woken);
}
break;
case UART_SELECT_WRITE_NOTIF:
if (FD_ISSET(uart_num, _writefds_orig)) {
FD_SET(uart_num, _writefds);
esp_vfs_select_triggered_isr(_select_sem, task_woken);
}
break;
case UART_SELECT_ERROR_NOTIF:
if (FD_ISSET(uart_num, _errorfds_orig)) {
FD_SET(uart_num, _errorfds);
esp_vfs_select_triggered_isr(_select_sem, task_woken);
}
break;
esp_err_t ret = ESP_ERR_INVALID_ARG;
if (args) {
portENTER_CRITICAL(&s_registered_select_lock);
const int new_size = s_registered_select_num + 1;
if ((s_registered_selects = realloc(s_registered_selects, new_size * sizeof(uart_select_args_t *))) == NULL) {
ret = ESP_ERR_NO_MEM;
} else {
s_registered_selects[s_registered_select_num] = args;
s_registered_select_num = new_size;
ret = ESP_OK;
}
portEXIT_CRITICAL(&s_registered_select_lock);
}
return ret;
}
static esp_err_t uart_start_select(int nfds, fd_set *readfds, fd_set *writefds, fd_set *exceptfds, esp_vfs_select_sem_t select_sem)
static esp_err_t unregister_select(uart_select_args_t *args)
{
if (_lock_try_acquire(&s_one_select_lock)) {
return ESP_ERR_INVALID_STATE;
esp_err_t ret = ESP_OK;
if (args) {
ret = ESP_ERR_INVALID_STATE;
portENTER_CRITICAL(&s_registered_select_lock);
for (int i = 0; i < s_registered_select_num; ++i) {
if (s_registered_selects[i] == args) {
const int new_size = s_registered_select_num - 1;
// The item is removed by overwriting it with the last item. The subsequent rellocation will drop the
// last item.
s_registered_selects[i] = s_registered_selects[new_size];
s_registered_selects = realloc(s_registered_selects, new_size * sizeof(uart_select_args_t *));
if (s_registered_selects || new_size == 0) {
s_registered_select_num = new_size;
ret = ESP_OK;
} else {
ret = ESP_ERR_NO_MEM;
}
break;
}
}
portEXIT_CRITICAL(&s_registered_select_lock);
}
return ret;
}
const int max_fds = MIN(nfds, UART_NUM);
portENTER_CRITICAL(uart_get_selectlock());
if (_readfds || _writefds || _errorfds || _readfds_orig || _writefds_orig || _errorfds_orig || _select_sem.sem) {
portEXIT_CRITICAL(uart_get_selectlock());
uart_end_select();
return ESP_ERR_INVALID_STATE;
}
if ((_readfds_orig = malloc(sizeof(fd_set))) == NULL) {
portEXIT_CRITICAL(uart_get_selectlock());
uart_end_select();
return ESP_ERR_NO_MEM;
}
if ((_writefds_orig = malloc(sizeof(fd_set))) == NULL) {
portEXIT_CRITICAL(uart_get_selectlock());
uart_end_select();
return ESP_ERR_NO_MEM;
}
if ((_errorfds_orig = malloc(sizeof(fd_set))) == NULL) {
portEXIT_CRITICAL(uart_get_selectlock());
uart_end_select();
return ESP_ERR_NO_MEM;
}
//uart_set_select_notif_callback set the callbacks in UART ISR
for (int i = 0; i < max_fds; ++i) {
if (FD_ISSET(i, readfds) || FD_ISSET(i, writefds) || FD_ISSET(i, exceptfds)) {
uart_set_select_notif_callback(i, select_notif_callback);
static void select_notif_callback_isr(uart_port_t uart_num, uart_select_notif_t uart_select_notif, BaseType_t *task_woken)
{
portENTER_CRITICAL_ISR(&s_registered_select_lock);
for (int i = 0; i < s_registered_select_num; ++i) {
uart_select_args_t *args = s_registered_selects[i];
if (args) {
switch (uart_select_notif) {
case UART_SELECT_READ_NOTIF:
if (FD_ISSET(uart_num, &args->readfds_orig)) {
FD_SET(uart_num, args->readfds);
esp_vfs_select_triggered_isr(args->select_sem, task_woken);
}
break;
case UART_SELECT_WRITE_NOTIF:
if (FD_ISSET(uart_num, &args->writefds_orig)) {
FD_SET(uart_num, args->writefds);
esp_vfs_select_triggered_isr(args->select_sem, task_woken);
}
break;
case UART_SELECT_ERROR_NOTIF:
if (FD_ISSET(uart_num, &args->errorfds_orig)) {
FD_SET(uart_num, args->errorfds);
esp_vfs_select_triggered_isr(args->select_sem, task_woken);
}
break;
}
}
}
portEXIT_CRITICAL_ISR(&s_registered_select_lock);
}
_select_sem = select_sem;
static esp_err_t uart_start_select(int nfds, fd_set *readfds, fd_set *writefds, fd_set *exceptfds,
esp_vfs_select_sem_t select_sem, void **end_select_args)
{
const int max_fds = MIN(nfds, UART_NUM);
*end_select_args = NULL;
_readfds = readfds;
_writefds = writefds;
_errorfds = exceptfds;
uart_select_args_t *args = malloc(sizeof(uart_select_args_t));
*_readfds_orig = *readfds;
*_writefds_orig = *writefds;
*_errorfds_orig = *exceptfds;
if (args == NULL) {
return ESP_ERR_NO_MEM;
}
args->select_sem = select_sem;
args->readfds = readfds;
args->writefds = writefds;
args->errorfds = exceptfds;
args->readfds_orig = *readfds; // store the original values because they will be set to zero
args->writefds_orig = *writefds;
args->errorfds_orig = *exceptfds;
FD_ZERO(readfds);
FD_ZERO(writefds);
FD_ZERO(exceptfds);
portENTER_CRITICAL(uart_get_selectlock());
//uart_set_select_notif_callback sets the callbacks in UART ISR
for (int i = 0; i < max_fds; ++i) {
if (FD_ISSET(i, _readfds_orig)) {
if (FD_ISSET(i, &args->readfds_orig) || FD_ISSET(i, &args->writefds_orig) || FD_ISSET(i, &args->errorfds_orig)) {
uart_set_select_notif_callback(i, select_notif_callback_isr);
}
}
for (int i = 0; i < max_fds; ++i) {
if (FD_ISSET(i, &args->readfds_orig)) {
size_t buffered_size;
if (uart_get_buffered_data_len(i, &buffered_size) == ESP_OK && buffered_size > 0) {
// signalize immediately when data is buffered
FD_SET(i, _readfds);
esp_vfs_select_triggered(_select_sem);
FD_SET(i, readfds);
esp_vfs_select_triggered(args->select_sem);
}
}
}
portEXIT_CRITICAL(uart_get_selectlock());
// s_one_select_lock is not released on successfull exit - will be
// released in uart_end_select()
esp_err_t ret = register_select(args);
if (ret != ESP_OK) {
portEXIT_CRITICAL(uart_get_selectlock());
free(args);
return ret;
}
portEXIT_CRITICAL(uart_get_selectlock());
*end_select_args = args;
return ESP_OK;
}
static void uart_end_select()
static esp_err_t uart_end_select(void *end_select_args)
{
uart_select_args_t *args = end_select_args;
if (args) {
free(args);
}
portENTER_CRITICAL(uart_get_selectlock());
esp_err_t ret = unregister_select(args);
for (int i = 0; i < UART_NUM; ++i) {
uart_set_select_notif_callback(i, NULL);
}
_select_sem.sem = NULL;
_readfds = NULL;
_writefds = NULL;
_errorfds = NULL;
if (_readfds_orig) {
free(_readfds_orig);
_readfds_orig = NULL;
}
if (_writefds_orig) {
free(_writefds_orig);
_writefds_orig = NULL;
}
if (_errorfds_orig) {
free(_errorfds_orig);
_errorfds_orig = NULL;
}
portEXIT_CRITICAL(uart_get_selectlock());
_lock_release(&s_one_select_lock);
return ret;
}
#ifdef CONFIG_VFS_SUPPORT_TERMIOS

View File

@ -93,13 +93,16 @@ temp_sdkconfig_path = '{}/sdkconfig.tmp'.format(builddir)
kconfigs = find_component_files("../../components", "Kconfig")
kconfig_projbuilds = find_component_files("../../components", "Kconfig.projbuild")
sdkconfig_renames = find_component_files("../../components", "sdkconfig.rename")
confgen_args = [sys.executable,
"../../tools/kconfig_new/confgen.py",
"--kconfig", "../../Kconfig",
"--sdkconfig-rename", "../../sdkconfig.rename",
"--config", temp_sdkconfig_path,
"--env", "COMPONENT_KCONFIGS={}".format(" ".join(kconfigs)),
"--env", "COMPONENT_KCONFIGS_PROJBUILD={}".format(" ".join(kconfig_projbuilds)),
"--env", "COMPONENT_SDKCONFIG_RENAMES={}".format(" ".join(sdkconfig_renames)),
"--env", "IDF_PATH={}".format(idf_path),
"--output", "docs", kconfig_inc_path + '.in'
]

View File

@ -26,8 +26,8 @@ Building an example is the same as building any other project:
* Follow the Getting Started instructions which include building the "Hello World" example.
* Change into the directory of the new example you'd like to build.
* Run `idf.py menuconfig` to open the project configuration menu. Most examples have a project-specific "Example Configuration" section here (for example, to set the WiFi SSID & password to use).
* `make` to build the example.
* Follow the printed instructions to flash, or run `idf.py flash`.
* `idf.py build` to build the example.
* Follow the printed instructions to flash, or run `idf.py -p PORT flash`.
# Copying Examples

View File

@ -7,10 +7,10 @@ This demo is to test the compatibility of Bluetooth and mobile phones.
* IDF version: 7c29a39d6f9f2dfbefc49d34d34e9267afc7200d
* [Test case](https://github.com/espressif/esp-idf/blob/master/examples/bluetooth/ble_compatibility_test/ble_compatibility_test_case.md)
* [Test case](https://github.com/espressif/esp-idf/blob/master/examples/bluetooth/bluedroid/ble/ble_compatibility_test/ble_compatibility_test_case.md)
* Test APK: LightBlue V1.1.3
* [Test report](https://github.com/espressif/esp-idf/blob/master/examples/bluetooth/ble_compatibility_test/esp_ble_compatibility_test_report.md)
* [Test report](https://github.com/espressif/esp-idf/blob/master/examples/bluetooth/bluedroid/ble/ble_compatibility_test/esp_ble_compatibility_test_report.md)

View File

@ -81,7 +81,7 @@
Build each project and flash it to the board, then run monitor tool to view serial output:
```
make -j4 flash monitor
idf.py -p PORT flash monitor
```
(To exit the serial monitor, type ``Ctrl-]``.)

View File

@ -40,7 +40,7 @@ idf.py menuconfig
Build the project and flash it to the board, then run monitor tool to view serial output.
```
idf.py flash monitor
idf.py -p PORT flash monitor
```
(To exit the serial monitor, type ``Ctrl-]``.)

View File

@ -16,7 +16,7 @@ A video of this demo can be seen
> 1. Please flash the [`ble_mesh_fast_prov_server`](https://glab.espressif.cn/ble_mesh/esp-ble-mesh-v0.6/tree/ble_mesh_release/esp-ble-mesh-v0.6/examples/bluetooth/esp_ble_mesh/ble_mesh_fast_provision/ble_mesh_fast_prov_server) to your boards first;
> 2. To have a better understanding of the performance of the BLE Mesh network, we recommend that at least 3 devices should be added in your network.
> 3. We recommend that you solder LED indicators if your development board does not come with lights.
> 4. Please check the type of board and LED pin definition enabled in `Example BLE Mesh Config` by running `make menuconfig`
> 4. Please check the type of board and LED pin definition enabled in `Example BLE Mesh Config` by running `idf.py menuconfig`
![Board](images/device.png)
@ -30,7 +30,7 @@ examples/bluetooth/esp_ble_mesh/ble_mesh_fast_provision/ble_mesh_fast_prov_serve
![Checkenvironment](images/picture1.png)
4. Run `make -j4 flash` to compile codes and flash the codes to the device.
4. Run `idf.py -p PORT flash` to compile codes and flash the codes to the device.
![compiledcode](images/picture2.png)

View File

@ -8,9 +8,9 @@ This demo shows how BLE Mesh device can be set up as a node with the following f
- **Configuration Server model**: The role of this model is mainly to configure Provisioner devices AppKey and set up its relay function, TTL size, subscription, etc.
- **OnOff Server model**: This model implements the most basic function of turning the lights on and off.
The default purpose of this demo is to enable the advertising function with 20-ms non-connectable interval in BLE 5.0. You can disable this function through menuconfig: `make menuconfig --> Example Configuration --> This option facilitates sending with 20ms non-connectable interval...`
The default purpose of this demo is to enable the advertising function with 20-ms non-connectable interval in BLE 5.0. You can disable this function through menuconfig: `idf.py menuconfig --> Example Configuration --> This option facilitates sending with 20ms non-connectable interval...`
For a better demonstration effect, an RGB LED can be soldered onto the ESP32-DevKitC board, by connecting their corresponding GPIO pins are GPIO\_NUM\_25, GPIO\_NUM\_26, GPIO\_NUM\_27. Then you need to select the following option in menuconfig:
`make menuconfig --> Example Configuration --> Board selection for BLE Mesh --> ESP-WROOM-32`
`idf.py menuconfig --> Example Configuration --> Board selection for BLE Mesh --> ESP-WROOM-32`
Please check the [tutorial](tutorial/Ble_Mesh_Node_Example_Walkthrough.md) for more information about this example.

View File

@ -27,9 +27,9 @@ $ tree examples/bluetooth/esp_ble_mesh/ble_mesh/ble_mesh_node
├── README.md /* Quick start guide */
├── build
├── main /* Stores the `.c` and `.h` application code files for this demo */
├── sdkconfig /* Current parameters of `make menuconfig` */
├── sdkconfig.defaults /* Default parameters of `make menuconfig` */
├── sdkconfig.old /* Previously saved parameters of `make menuconfig` */
├── sdkconfig /* Current parameters of `idf.py menuconfig` */
├── sdkconfig.defaults /* Default parameters of `idf.py menuconfig` */
├── sdkconfig.old /* Previously saved parameters of `idf.py menuconfig` */
└── tutorial /* More in-depth information about the demo */
```
@ -381,7 +381,7 @@ These variables should be set to `0` for this demo, as it uses the most basic au
To be functional across different applications, the BLE Mesh menuconfig is specifically designed to offer a variety of configuration options, which can be helpful in tailoring your own configuration.
The list of configuration options in BLE Mesh menuconfig is stored in `Component config` ---> `[]Bluetooth Mesh support` and can be accessed with the command `make menuconfig`. This configuration option list is shown below.
The list of configuration options in BLE Mesh menuconfig is stored in `Component config` ---> `[]Bluetooth Mesh support` and can be accessed with the command `idf.py menuconfig`. This configuration option list is shown below.
```
—— Bluetooth Mesh support

View File

@ -40,9 +40,9 @@ $ tree examples/bluetooth/esp_ble_mesh/ble_mesh/ble_mesh_wifi_coexist
├── Makefile /* Compiling parameters for the demo */
├── README.md /* Quick start guide */
├── build
├── sdkconfig /* Current parameters of `make menuconfig` */
├── sdkconfig.defaults /* Default parameters of `make menuconfig` */
├── sdkconfig.old /* Previously saved parameters of `make menuconfig` */
├── sdkconfig /* Current parameters of `idf.py menuconfig` */
├── sdkconfig.defaults /* Default parameters of `idf.py menuconfig` */
├── sdkconfig.old /* Previously saved parameters of `idf.py menuconfig` */
└── tutorial /* More in-depth information about the demo */
```

View File

@ -32,7 +32,7 @@ Note :
### Configure the project
```
make menuconfig
idf.py menuconfig
```
* Set serial port under Serial Flasher Options.
@ -42,7 +42,7 @@ make menuconfig
Build the project and flash it to the board, then run monitor tool to view serial output:
```
make -j4 flash monitor
idf.py -p PORT flash monitor
```
(To exit the serial monitor, type ``Ctrl-]``.)

View File

@ -23,7 +23,7 @@ Note :
### Configure the project
```
make menuconfig
idf.py menuconfig
```
* Set serial port under Serial Flasher Options.
@ -33,7 +33,7 @@ make menuconfig
Build the project and flash it to the board, then run monitor tool to view serial output:
```
make -j4 flash monitor
idf.py -p PORT flash monitor
```
(To exit the serial monitor, type ``Ctrl-]``.)

View File

@ -20,7 +20,7 @@ To test this demo, any BLE mesh provisioner app can be used.
### Configure the project
```
make menuconfig
idf.py menuconfig
```
* Set serial port under Serial Flasher Options.
@ -32,7 +32,7 @@ make menuconfig
Build the project and flash it to the board, then run monitor tool to view serial output:
```
make -j4 flash monitor
idf.py -p PORT flash monitor
```
(To exit the serial monitor, type ``Ctrl-]``.)

View File

@ -24,7 +24,7 @@ Note :
### Configure the project
```
make menuconfig
idf.py menuconfig
```
* Set serial port under Serial Flasher Options.
@ -38,7 +38,7 @@ make menuconfig
Build the project and flash it to the board, then run monitor tool to view serial output:
```
make -j4 flash monitor
idf.py -p PORT flash monitor
```
(To exit the serial monitor, type ``Ctrl-]``.)

View File

@ -21,7 +21,7 @@ To run this example, it's recommended that you have an official ESP32 Ethernet d
### Project configuration in menuconfig
Enter `make menuconfig` if you are using GNU Make based build system or enter `idf.py menuconfig` if you' are using CMake based build system.
Enter `idf.py menuconfig` if you are using GNU Make based build system or enter `idf.py menuconfig` if you' are using CMake based build system.
1. In the `Example Configuration` menu:
* Choose the kind of Ethernet this example will run on under `Ethernet Type`.
@ -59,7 +59,7 @@ Enter `make menuconfig` if you are using GNU Make based build system or enter `i
### Build and Flash
Enter `make -j4 flash monitor` if you are using GNU Make based build system or enter `idf.py build flash monitor` if you' are using CMake based build system.
Enter `idf.py -p PORT flash monitor` if you are using GNU Make based build system or enter `idf.py build flash monitor` if you' are using CMake based build system.
(To exit the serial monitor, type ``Ctrl-]``.)

View File

@ -25,7 +25,7 @@ To run this example, it's recommended that you have an official ESP32 Ethernet d
### Project configuration in menuconfig
Enter `make menuconfig` if you are using GNU Make based build system or enter `idf.py menuconfig` if you' are using CMake based build system.
Enter `idf.py menuconfig` if you are using GNU Make based build system or enter `idf.py menuconfig` if you' are using CMake based build system.
1. In the `Example Configuration` menu:
* Enable storing history commands in flash under `Store command history in flash`.
@ -63,7 +63,7 @@ Enter `make menuconfig` if you are using GNU Make based build system or enter `i
### Build and Flash
Enter `make -j4 flash monitor` if you are using GNU Make based build system or enter `idf.py build flash monitor` if you' are using CMake based build system.
Enter `idf.py -p PORT flash monitor` if you are using GNU Make based build system or enter `idf.py build flash monitor` if you' are using CMake based build system.
(To exit the serial monitor, type ``Ctrl-]``.)

View File

@ -42,7 +42,8 @@ esp_err_t mesh_light_init(void)
.bit_num = LEDC_TIMER_13_BIT,
.freq_hz = 5000,
.speed_mode = LEDC_HIGH_SPEED_MODE,
.timer_num = LEDC_TIMER_0
.timer_num = LEDC_TIMER_0,
.clk_cfg = LEDC_AUTO_CLK,
};
ledc_timer_config(&ledc_timer);

View File

@ -42,7 +42,8 @@ esp_err_t mesh_light_init(void)
.bit_num = LEDC_TIMER_13_BIT,
.freq_hz = 5000,
.speed_mode = LEDC_HIGH_SPEED_MODE,
.timer_num = LEDC_TIMER_0
.timer_num = LEDC_TIMER_0,
.clk_cfg = LEDC_AUTO_CLK,
};
ledc_timer_config(&ledc_timer);

View File

@ -16,7 +16,7 @@ In this example, we use `ADC_UNIT_1` by default, we need to connect a voltage so
### Configure the project
```
make menuconfig
idf.py menuconfig
```
* Set serial port under Serial Flasher Options.
@ -26,7 +26,7 @@ make menuconfig
Build the project and flash it to the board, then run monitor tool to view serial output:
```
make -j4 flash monitor
idf.py -p PORT flash monitor
```
(To exit the serial monitor, type ``Ctrl-]``.)
@ -48,7 +48,7 @@ Raw: 18 Voltage: 79mV
* program upload failure
* Hardware connection is not correct: run `idf.py monitor`, and reboot your board to see if there are any output logs.
* Hardware connection is not correct: run `idf.py -p PORT monitor`, and reboot your board to see if there are any output logs.
* The baud rate for downloading is too high: lower your baud rate in the `menuconfig` menu, and try again.
For any technical queries, please open an [issue](https://github.com/espressif/esp-idf/issues) on GitHub. We will get back to you soon.

View File

@ -16,7 +16,7 @@ We use ADC1_CHANNEL_7 (GPIO27) and DAC_CHANNEL_1 (GPIO25) by default, you need t
### Configure the project
```
make menuconfig
idf.py menuconfig
```
* Set serial port under Serial Flasher Options.
@ -27,7 +27,7 @@ make menuconfig
Build the project and flash it to the board, then run monitor tool to view serial output:
```
make -j4 flash monitor
idf.py -p PORT flash monitor
```
(To exit the serial monitor, type ``Ctrl-]``.)
@ -59,7 +59,7 @@ start conversion.
* program upload failure
* Hardware connection is not correct: run `idf.py monitor`, and reboot your board to see if there are any output logs.
* Hardware connection is not correct: run `idf.py -p PORT monitor`, and reboot your board to see if there are any output logs.
* The baud rate for downloading is too high: lower your baud rate in the `menuconfig` menu, and try again.
For any technical queries, please open an [issue](https://github.com/espressif/esp-idf/issues) on GitHub. We will get back to you soon.

View File

@ -14,7 +14,7 @@ In this example, we generate a 100Hz triangle and sine wave and send it out from
### Configure the Project
```
make menuconfig
idf.py menuconfig
```
* Set serial port under Serial Flasher Options.
@ -24,7 +24,7 @@ make menuconfig
Build the project and flash it to the board, then run monitor tool to view serial output:
```
make -j4 flash monitor
idf.py -p PORT flash monitor
```
(To exit the serial monitor, type ``Ctrl-]``.)
@ -61,7 +61,7 @@ If you have a logic analyzer, you can use a logic analyzer to grab online data.
* Program upload failure
* Hardware connection is not correct: run `idf.py monitor`, and reboot your board to see if there are any output logs.
* Hardware connection is not correct: run `idf.py -p PORT monitor`, and reboot your board to see if there are any output logs.
* The baud rate for downloading is too high: lower your baud rate in the `menuconfig` menu, and try again.
For any technical queries, please open an [issue](https://github.com/espressif/esp-idf/issues) on GitHub. We will get back to you soon.

View File

@ -35,7 +35,7 @@ The following is the hardware connection:
### Configure the Project
```
make menuconfig
idf.py menuconfig
```
* Set serial port under Serial Flasher Options, the flash size should be set to 4 MB.
@ -48,7 +48,7 @@ make menuconfig
Build the project and flash it to the board, then run monitor tool to view serial output:
```
make -j4 flash monitor
idf.py -p PORT flash monitor
```
(To exit the serial monitor, type ``Ctrl-]``.)
@ -85,7 +85,7 @@ I2S: PLL_D2: Req RATE: 16000, real rate: 1004.000, BITS: 16, CLKM: 83, BCK: 60,
* Program upload failure
* Hardware connection is not correct: run `idf.py monitor`, and reboot your board to see if there are any output logs.
* Hardware connection is not correct: run `idf.py -p PORT monitor`, and reboot your board to see if there are any output logs.
* The baud rate for downloading is too high: lower your baud rate in the `menuconfig` menu, and try again.
For any technical queries, please open an [issue](https://github.com/espressif/esp-idf/issues) on GitHub. We will get back to you soon.

View File

@ -23,7 +23,7 @@ Connect four LEDs to the following LEDC channels / individual GPIOs:
### Configure the project
```
make menuconfig
idf.py menuconfig
```
* Set serial port under Serial Flasher Options.
@ -33,7 +33,7 @@ make menuconfig
Build the project and flash it to the board, then run monitor tool to view serial output:
```
make -j4 flash monitor
idf.py -p PORT flash monitor
```
(To exit the serial monitor, type ``Ctrl-]``.)
@ -63,7 +63,7 @@ you can also see the following output log on the serial monitor:
* Programming fail
* Hardware connection is not correct: run `idf.py monitor`, and reboot your board to see if there are any output logs.
* Hardware connection is not correct: run `idf.py -p PORT monitor`, and reboot your board to see if there are any output logs.
* The baud rate for downloading is too high: lower your baud rate in the `menuconfig` menu, and try again.
For any technical queries, please open an [issue] (https://github.com/espressif/esp-idf/issues) on GitHub. We will get back to you soon.

View File

@ -63,7 +63,8 @@ void app_main()
.duty_resolution = LEDC_TIMER_13_BIT, // resolution of PWM duty
.freq_hz = 5000, // frequency of PWM signal
.speed_mode = LEDC_HS_MODE, // timer mode
.timer_num = LEDC_HS_TIMER // timer index
.timer_num = LEDC_HS_TIMER, // timer index
.clk_cfg = LEDC_AUTO_CLK, // Auto select the source clock
};
// Set configuration of timer0 for high speed channels
ledc_timer_config(&ledc_timer);

View File

@ -20,7 +20,7 @@ Pin connection:
### Configure the project
```
make menuconfig
idf.py menuconfig
```
* Set serial port under Serial Flasher Options.
@ -30,7 +30,7 @@ make menuconfig
Build the project and flash it to the board, then run monitor tool to view serial output:
```
make -j4 flash monitor
idf.py -p PORT flash monitor
```
(To exit the serial monitor, type ``Ctrl-]``.)
@ -68,7 +68,7 @@ Current counter value :-1
* program upload failure
* Hardware connection is not correct: run `idf.py monitor`, and reboot your board to see if there are any output logs.
* Hardware connection is not correct: run `idf.py -p PORT monitor`, and reboot your board to see if there are any output logs.
* The baud rate for downloading is too high: lower your baud rate in the `menuconfig` menu, and try again.
For any technical queries, please open an [issue](https://github.com/espressif/esp-idf/issues) on GitHub. We will get back to you soon.

View File

@ -100,6 +100,7 @@ static void ledc_init(void)
ledc_timer.timer_num = LEDC_TIMER_1;
ledc_timer.duty_resolution = LEDC_TIMER_10_BIT;
ledc_timer.freq_hz = 1; // set output frequency at 1 Hz
ledc_timer.clk_cfg = LEDC_AUTO_CLK;
ledc_timer_config(&ledc_timer);
// Prepare and then apply the LEDC PWM channel configuration

View File

@ -25,7 +25,7 @@ The TX pin and RX pin can be modified in top of the main/infrared_nec_main.c fil
### Configure the Project
```
make menuconfig
idf.py menuconfig
```
* Set serial port under Serial Flasher Options.
@ -35,7 +35,7 @@ make menuconfig
Build the project and flash it to the board, then run monitor tool to view serial output:
```
make -j4 flash monitor
idf.py -p PORT flash monitor
```
(To exit the serial monitor, type ``Ctrl-]``.)
@ -74,7 +74,7 @@ NEC: RMT RCV --- addr: 0xda25 cmd: 0xeb14
* Programming fail
* Hardware connection is not correct: run `idf.py monitor`, and reboot your board to see if there is any output logs.
* Hardware connection is not correct: run `idf.py -p PORT monitor`, and reboot your board to see if there is any output logs.
* The baud rate for downloading is too high: lower your baud rate in the `menuconfig` menu, and try again.
For any technical queries, please open an [issue] (https://github.com/espressif/esp-idf/issues) on GitHub. We will get back to you soon.

View File

@ -30,7 +30,7 @@ GPIO18 +----/\/\/\----+------|>|-----+ GND
### Configure the Project
```
make menuconfig
idf.py menuconfig
```
* Set serial port under Serial Flasher Options.
@ -40,7 +40,7 @@ make menuconfig
Build the project and flash it to the board, then run monitor tool to view serial output:
```
make -j4 flash monitor
idf.py -p PORT flash monitor
```
(To exit the serial monitor, type ``Ctrl-]``.)
@ -61,7 +61,7 @@ RMT Tx: Sample transmission complete
* Programming fail
* Hardware connection is not correct: run `idf.py monitor`, and reboot your board to see if there is any output logs.
* Hardware connection is not correct: run `idf.py -p PORT monitor`, and reboot your board to see if there is any output logs.
* The baud rate for downloading is too high: lower your baud rate in the `menuconfig` menu, and try again.
For any technical queries, please open an [issue] (https://github.com/espressif/esp-idf/issues) on GitHub. We will get back to you soon.

View File

@ -24,7 +24,7 @@ By default the GPIO output is 4. To change it, edit the line with `GPIO_NUM_4` i
### Configure the project
```
make menuconfig
idf.py menuconfig
```
Set serial port under Serial Flasher Options and save the configuration.
@ -35,7 +35,7 @@ Set serial port under Serial Flasher Options and save the configuration.
Build the project and flash it to the board, then run monitor tool to view serial output:
```
make -j4 flash monitor
idf.py -p PORT flash monitor
```
(To exit the serial monitor, type ``Ctrl-]``.)

View File

@ -24,7 +24,7 @@ order to receive back the same data which were sent out.
### Configure the project
```
make menuconfig
idf.py menuconfig
```
or
```
@ -38,11 +38,11 @@ idf.py menuconfig
Build the project and flash it to the board, then run monitor tool to view serial output:
```
make -j4 flash monitor
idf.py -p PORT flash monitor
```
or
```
idf.py flash monitor
idf.py -p PORT flash monitor
```
(To exit the serial monitor, type ``Ctrl-]``.)

View File

@ -36,7 +36,7 @@ UART1 driver to use the hardware flow control by setting `.flow_ctrl = UART_HW_F
### Configure the project
```
make menuconfig
idf.py menuconfig
```
or
```
@ -50,11 +50,11 @@ idf.py menuconfig
Build the project and flash it to the board, then run monitor tool to view serial output:
```
make -j4 flash monitor
idf.py -p PORT flash monitor
```
or
```
idf.py flash monitor
idf.py -p PORT flash monitor
```
(To exit the serial monitor, type ``Ctrl-]``.)

View File

@ -45,7 +45,7 @@ Connect USB to RS485 adapter to computer and connect its D+, D- output lines wit
### Configure the project
```
make menuconfig
idf.py menuconfig
```
or
```
@ -56,11 +56,11 @@ idf.py menuconfig
### Build and Flash
Build the project and flash it to the board, then run monitor tool to view serial output:
```
make -j4 flash monitor
idf.py -p PORT flash monitor
```
or
```
idf.py flash monitor
idf.py -p PORT flash monitor
```
(To exit the serial monitor, type ``Ctrl-]``.)

View File

@ -14,7 +14,7 @@ The example can be used with any ESP32 development board connected to a computer
### Configure the project
```
make menuconfig
idf.py menuconfig
```
or
```
@ -28,11 +28,11 @@ idf.py menuconfig
Build the project and flash it to the board, then run monitor tool to view serial output:
```
make -j4 flash monitor
idf.py -p PORT flash monitor
```
or
```
idf.py flash monitor
idf.py -p PORT flash monitor
```
(To exit the serial monitor, type ``Ctrl-]``.)

View File

@ -26,7 +26,7 @@ through UART.
### Configure the project
```
make menuconfig
idf.py menuconfig
```
or
```
@ -40,11 +40,11 @@ idf.py menuconfig
Build the project and flash it to the board, then run monitor tool to view serial output:
```
make -j4 flash monitor
idf.py -p PORT flash monitor
```
or
```
idf.py flash monitor
idf.py -p PORT flash monitor
```
(To exit the serial monitor, type ``Ctrl-]``.)

View File

@ -6,7 +6,7 @@ Simple Asio chat client using WiFi STA or Ethernet.
- Wi-Fi or Ethernet connection is established, and IP address is obtained.
- Asio chat client connects to the corresponding server whose port number and IP are defined through the project configuration menu.
- Chat client receives all messages from other chat clients, also it sends message received from stdin using `idf.py monitor`.
- Chat client receives all messages from other chat clients, also it sends message received from stdin using `idf.py -p PORT monitor`.
## Running the example

View File

@ -16,7 +16,7 @@ please refer to [RFC7252](https://www.rfc-editor.org/rfc/pdfrfc/rfc7252.txt.pdf)
### Configure the project
```
make menuconfig
idf.py menuconfig
```
* Set serial port under Serial Flasher config
@ -29,7 +29,7 @@ make menuconfig
Build the project and flash it to the board, then run monitor tool to view serial output:
```
make -j4 flash monitor
idf.py -p PORT flash monitor
```
(To exit the serial monitor, type ``Ctrl-]``.)

View File

@ -16,7 +16,7 @@ please refer to [RFC7252](https://www.rfc-editor.org/rfc/pdfrfc/rfc7252.txt.pdf)
### Configure the project
```
make menuconfig
idf.py menuconfig
```
* Set default serial port under Serial Flasher config
@ -28,7 +28,7 @@ make menuconfig
Build the project and flash it to the board, then run monitor tool to view serial output:
```
make -j4 flash monitor
idf.py -p PORT flash monitor
```
(To exit the serial monitor, type ``Ctrl-]``.)

View File

@ -4,7 +4,7 @@ This example creates a `esp_local_ctrl` service over HTTPS transport, for secure
See the `esp_local_ctrl` component documentation for details.
Before using the example, run `make menuconfig` (or `idf.py menuconfig` if using CMake build system) to configure Wi-Fi or Ethernet. See "Establishing Wi-Fi or Ethernet Connection" section in [examples/protocols/README.md](../README.md) for more details.
Before using the example, run `idf.py menuconfig` (or `idf.py menuconfig` if using CMake build system) to configure Wi-Fi or Ethernet. See "Establishing Wi-Fi or Ethernet Connection" section in [examples/protocols/README.md](../README.md) for more details.
## Client Side Implementation

View File

@ -20,7 +20,7 @@
#include "lwip/err.h"
#include "lwip/sys.h"
/* The examples use WiFi configuration that you can set via 'make menuconfig'.
/* The examples use WiFi configuration that you can set via 'idf.py menuconfig'.
If you'd rather not, just change the below entries to strings with
the config you want - ie #define EXAMPLE_WIFI_SSID "mywifissid"

View File

@ -27,7 +27,7 @@ File server implementation can be found under `main/file_server.c` which uses SP
* In order to test the file server demo :
1. compile and burn the firmware `idf.py -p PORT flash`
2. run `idf.py monitor` and note down the IP assigned to your ESP module. The default port is 80
2. run `idf.py -p PORT monitor` and note down the IP assigned to your ESP module. The default port is 80
3. test the example interactively on a web browser (assuming IP is 192.168.43.130):
1. open path `http://192.168.43.130/` or `http://192.168.43.130/index.html` to see an HTML web page with list of files on the server (initially empty)
2. use the file upload form on the webpage to select and upload a file to the server

View File

@ -24,7 +24,7 @@ Shows how to use mDNS to advertise lookup services and hosts
Build the project and flash it to the board, then run monitor tool to view serial output:
```
make -j4 flash monitor
idf.py -p PORT flash monitor
```
- Wait for WiFi to connect to your access point

View File

@ -72,7 +72,7 @@ ESP32 WROVER KIT 1 | | RS-485 side | | Exter
### Configure the application
Configure the UART pins used for modbus communication using command and table below.
```
make menuconfig
idf.py menuconfig
```
```
@ -98,7 +98,7 @@ Other option is to have the modbus_slave example flashed into ESP32 WROVER KIT b
### Build and flash software of master device
Build the project and flash it to the board, then run monitor tool to view serial output:
```
make -j4 flash monitor
idf.py -p PORT flash monitor
```
(To exit the serial monitor, type ``Ctrl-]``.)

View File

@ -30,7 +30,7 @@ ESP32 WROVER KIT 1 | | RS-485 side | | Modbus
### Configure the application
Configure the UART pins used for modbus communication using command and table below.
```
make menuconfig
idf.py menuconfig
```
```
@ -53,7 +53,7 @@ As an example the Modbus Poll application can be used with this example.
### Build and flash software
Build the project and flash it to the board, then run monitor tool to view serial output:
```
make -j4 flash monitor
idf.py -p PORT flash monitor
```
(To exit the serial monitor, type ``Ctrl-]``.)

View File

@ -33,7 +33,7 @@ This example can be executed on any ESP32 board, the only required interface is
Build the project and flash it to the board, then run monitor tool to view serial output:
```
make -j4 flash monitor
idf.py -p PORT flash monitor
```
(To exit the serial monitor, type ``Ctrl-]``.)

View File

@ -33,7 +33,7 @@ with text operation.
Build the project and flash it to the board, then run monitor tool to view serial output:
```
make -j4 flash monitor
idf.py -p PORT flash monitor
```
(To exit the serial monitor, type ``Ctrl-]``.)

View File

@ -43,7 +43,7 @@ Please note, that the supplied files `client.crt` and `client.key` in the `main`
Build the project and flash it to the board, then run monitor tool to view serial output:
```
make -j4 flash monitor
idf.py -p PORT flash monitor
```
(To exit the serial monitor, type ``Ctrl-]``.)

View File

@ -1,7 +1,7 @@
# ESP-MQTT sample application
(See the README.md file in the upper level 'examples' directory for more information about examples.)
This example connects to the broker URI selected using `make menuconfig` (using mqtt tcp transport) and as a demonstration subscribes/unsubscribes and send a message on certain topic.
This example connects to the broker URI selected using `idf.py menuconfig` (using mqtt tcp transport) and as a demonstration subscribes/unsubscribes and send a message on certain topic.
(Please note that the public broker is maintained by the community so may not be always available, for details please see this [disclaimer](https://iot.eclipse.org/getting-started/#sandboxes))
Note: If the URI equals `FROM_STDIN` then the broker address is read from stdin upon application startup (used for testing)
@ -25,7 +25,7 @@ This example can be executed on any ESP32 board, the only required interface is
Build the project and flash it to the board, then run monitor tool to view serial output:
```
make -j4 flash monitor
idf.py -p PORT flash monitor
```
(To exit the serial monitor, type ``Ctrl-]``.)

View File

@ -24,7 +24,7 @@ This example can be executed on any ESP32 board, the only required interface is
Build the project and flash it to the board, then run monitor tool to view serial output:
```
make -j4 flash monitor
idf.py -p PORT flash monitor
```
(To exit the serial monitor, type ``Ctrl-]``.)

View File

@ -34,7 +34,7 @@ with text operation.
Build the project and flash it to the board, then run monitor tool to view serial output:
```
make -j4 flash monitor
idf.py -p PORT flash monitor
```
(To exit the serial monitor, type ``Ctrl-]``.)

View File

@ -79,7 +79,7 @@ This example can be run on any commonly available ESP32 development board.
## Configure the project
```
make menuconfig
idf.py menuconfig
```
* Set serial port under Serial Flasher Options.
@ -91,7 +91,7 @@ make menuconfig
Build the project and flash it to the board, then run monitor tool to view serial output:
```
make -j4 flash monitor
idf.py -p PORT flash monitor
```
(To exit the serial monitor, type ``Ctrl-]``.)

View File

@ -35,7 +35,7 @@ This example can be run on any commonly available ESP32 development board.
## Configure the project
```
make menuconfig
idf.py menuconfig
```
Set following parameter under Serial Flasher Options:
@ -59,7 +59,7 @@ Configure Wi-Fi or Ethernet under "Example Connection Configuration" menu. See "
Build the project and flash it to the board, then run monitor tool to view serial output:
```
make -j4 flash monitor
idf.py -p PORT flash monitor
```
(To exit the serial monitor, type ``Ctrl-]``.)

View File

@ -37,7 +37,7 @@ This example can be run on any commonly available ESP32 development board.
## Configure the project
```
make menuconfig
idf.py menuconfig
```
Set following parameter under Serial Flasher Options:
@ -57,7 +57,7 @@ Configure Wi-Fi or Ethernet under "Example Connection Configuration" menu. See "
Build the project and flash it to the board, then run monitor tool to view serial output:
```
make -j4 flash monitor
idf.py -p PORT flash monitor
```
(To exit the serial monitor, type ``Ctrl-]``.)

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