versions: Update to v5.1.4

Merge branch 'bugfix/libphy_chips_20240430_v5.1' into 'release/v5.1'
Bugfix/libphy chips 20240430 v5.1 See merge request espressif/esp-idf!30578
2024-05-09 18:35:18 +08:00 · 2024-05-09 12:08:10 +08:00 · 2024-05-08 17:15:09 +08:00 · 2024-04-30 12:11:29 +08:00 · 2024-04-30 11:42:46 +08:00 · 2024-04-30 10:53:28 +08:00
3390 changed files with 114629 additions and 163718 deletions
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@ -13,7 +13,7 @@ stages:
 workflow:
  rules:
    # Disable those non-protected push triggered pipelines
-    - if: '$CI_COMMIT_REF_NAME != "master" && $CI_COMMIT_BRANCH !~ /^release\/v/ && $CI_COMMIT_TAG !~ /^v\d+\.\d+(\.\d+)?($|-)/ && $CI_PIPELINE_SOURCE == "push"'
+    - if: '$CI_COMMIT_REF_NAME != "master" && $CI_COMMIT_BRANCH !~ /^release\/v/ && $CI_COMMIT_TAG !~ /^v\d+\.\d+(\.\d+)?($|-)/ && $CI_COMMIT_TAG !~ /^qa-test/ && $CI_PIPELINE_SOURCE == "push"'
      when: never
    # when running merged result pipelines, it would create a temp commit id. use $CI_MERGE_REQUEST_SOURCE_BRANCH_SHA instead of $CI_COMMIT_SHA.
    # Please use PIPELINE_COMMIT_SHA at all places that require a commit sha
@ -72,9 +72,6 @@ variables:

  PRE_COMMIT_IMAGE: "$CI_DOCKER_REGISTRY/esp-idf-pre-commit:1"

-  # target test config file, used by assign test job
-  CI_TARGET_TEST_CONFIG_FILE: "$CI_PROJECT_DIR/.gitlab/ci/target-test.yml"
-
  # target test repo parameters
  TEST_ENV_CONFIG_REPO: "https://gitlab-ci-token:${BOT_TOKEN}@${CI_SERVER_HOST}:${CI_SERVER_PORT}/qa/ci-test-runner-configs.git"

@ -98,6 +95,9 @@ variables:
  # This is used only if CI_PYTHON_TOOL_REPO is not empty.
  CI_PYTHON_TOOL_BRANCH: ""

+  # Set this variable to specify the file name for the known failure cases.
+  KNOWN_FAILURE_CASES_FILE_NAME: "5.1.txt"
+
  IDF_CI_BUILD: 1

 cache:
@ -131,8 +131,8 @@ cache:
  export PYTHONPATH="$IDF_PATH/tools:$IDF_PATH/tools/esp_app_trace:$IDF_PATH/components/partition_table:$IDF_PATH/tools/ci/python_packages:$PYTHONPATH"

 .setup_tools_and_idf_python_venv: &setup_tools_and_idf_python_venv |
-  # must use after setup_tools_except_target_test
-  # otherwise the export.sh won't work properly
+  # Since the version 3.21 CMake passes source files and include dirs to ninja using absolute paths.
+  $IDF_PATH/tools/idf_tools.py --non-interactive install cmake

  # download constraint file for dev
  if [[ -n "$CI_PYTHON_CONSTRAINT_BRANCH" ]]; then
@ -236,6 +236,7 @@ include:
  - '.gitlab/ci/pre_check.yml'
  - '.gitlab/ci/build.yml'
  - '.gitlab/ci/assign-test.yml'
+  - '.gitlab/ci/integration_test.yml'
  - '.gitlab/ci/host-test.yml'
  - '.gitlab/ci/target-test.yml'
  - '.gitlab/ci/deploy.yml'
--- a/.gitlab/CODEOWNERS
+++ b/.gitlab/CODEOWNERS
@ -2,214 +2,5 @@
 #
 #    https://docs.gitlab.com/ee/user/project/code_owners.html#the-syntax-of-code-owners-files
 #
-# If more than one rule matches a given file, the latest rule is used.
-# The file should be generally kept sorted, except when it is necessary
-# to use a different order due to the fact above. In that case, use
-# '# sort-order-reset' comment line to reset the sort order.
-#
-# Recipes for a few common cases:
-#
-# 1. Specific directory with all its contents:
-#
-#    /components/app_trace/
-#
-#    Note the trailing slash!
-#
-# 2. File with certain extension in any subdirectory of a certain directory:
-#
-#    /examples/**/*.py
-#
-#    This includes an *.py files in /examples/ directory as well.
-#
-# 3. Contents of a directory with a certain name, anywhere in the tree:
-#
-#    test_*_host/
-#
-#    Will match everything under components/efuse/test_efuse_host/,
-#    components/heap/test_multi_heap_host/, components/lwip/test_afl_host/, etc.
-#
-# 4. Same as above, except limited to a specific place in the tree:
-#
-#    /components/esp32*/
-#
-#    Matches everything under /components/esp32, /components/esp32s2, etc.
-#    Doesn't match /tools/some-test/components/esp32s5.
-#
-# 5. Specific file:
-#
-#    /tools/tools.json
-#
-# 6. File with a certain name anywhere in the tree
-#
-#    .gitignore
-#

-* @esp-idf-codeowners/other
-
-/.*                                   @esp-idf-codeowners/tools
-/.github/workflows/                   @esp-idf-codeowners/ci
-/.gitlab-ci.yml                       @esp-idf-codeowners/ci
-/.gitlab/ci/                          @esp-idf-codeowners/ci
-/.gitlab/dangerjs/                    @esp-idf-codeowners/ci @esp-idf-codeowners/tools
-/.pre-commit-config.yaml              @esp-idf-codeowners/ci
-/.readthedocs.yml                     @esp-idf-codeowners/docs
-/CMakeLists.txt                       @esp-idf-codeowners/build-config
-/CONTRIBUTING.md                      @esp-idf-codeowners/docs
-/Kconfig                              @esp-idf-codeowners/build-config
-/README*.md                           @esp-idf-codeowners/docs
-/SUPPORT_POLICY*.md                   @esp-idf-codeowners/docs
-/add_path.sh                          @esp-idf-codeowners/tools
-/conftest.py                          @esp-idf-codeowners/ci
-/export.*                             @esp-idf-codeowners/tools
-/install.*                            @esp-idf-codeowners/tools
-/pytest.ini                           @esp-idf-codeowners/ci
-/sdkconfig.rename                     @esp-idf-codeowners/build-config
-/sonar-project.properties             @esp-idf-codeowners/ci
-
-# sort-order-reset
-
-/components/app_trace/                @esp-idf-codeowners/tools
-/components/app_update/               @esp-idf-codeowners/system @esp-idf-codeowners/app-utilities
-/components/bootloader*/              @esp-idf-codeowners/system @esp-idf-codeowners/security
-/components/bootloader_support/bootloader_flash/    @esp-idf-codeowners/peripherals
-/components/bt/                       @esp-idf-codeowners/bluetooth
-/components/cmock/                    @esp-idf-codeowners/system
-/components/console/                  @esp-idf-codeowners/system @esp-idf-codeowners/app-utilities/console
-/components/cxx/                      @esp-idf-codeowners/system
-/components/driver/                   @esp-idf-codeowners/peripherals
-/components/efuse/                    @esp-idf-codeowners/system
-/components/esp_adc/                  @esp-idf-codeowners/peripherals
-/components/esp_app_format/           @esp-idf-codeowners/system @esp-idf-codeowners/app-utilities
-/components/esp_coex/                 @esp-idf-codeowners/wifi @esp-idf-codeowners/bluetooth @esp-idf-codeowners/ieee802154
-/components/esp_common/               @esp-idf-codeowners/system
-/components/esp_eth/                  @esp-idf-codeowners/network
-/components/esp_event/                @esp-idf-codeowners/system
-/components/esp_gdbstub/              @esp-idf-codeowners/tools
-/components/esp_hid/                  @esp-idf-codeowners/bluetooth
-/components/esp_http_client/          @esp-idf-codeowners/app-utilities
-/components/esp_http_server/          @esp-idf-codeowners/app-utilities
-/components/esp_https_ota/            @esp-idf-codeowners/app-utilities
-/components/esp_https_server/         @esp-idf-codeowners/app-utilities
-/components/esp_hw_support/           @esp-idf-codeowners/system @esp-idf-codeowners/peripherals
-/components/esp_lcd/                  @esp-idf-codeowners/peripherals
-/components/esp_local_ctrl/           @esp-idf-codeowners/app-utilities
-/components/esp_mm/                   @esp-idf-codeowners/peripherals
-/components/esp_netif/                @esp-idf-codeowners/network
-/components/esp_netif_stack/          @esp-idf-codeowners/network
-/components/esp_partition/            @esp-idf-codeowners/storage
-/components/esp_phy/                  @esp-idf-codeowners/bluetooth @esp-idf-codeowners/wifi @esp-idf-codeowners/ieee802154
-/components/esp_pm/                   @esp-idf-codeowners/power-management @esp-idf-codeowners/bluetooth @esp-idf-codeowners/wifi @esp-idf-codeowners/system
-/components/esp_psram/                @esp-idf-codeowners/peripherals @esp-idf-codeowners/system
-/components/esp_ringbuf/              @esp-idf-codeowners/system
-/components/esp_rom/                  @esp-idf-codeowners/system @esp-idf-codeowners/bluetooth @esp-idf-codeowners/wifi
-/components/esp_system/               @esp-idf-codeowners/system
-/components/esp_timer/                @esp-idf-codeowners/system
-/components/esp-tls/                  @esp-idf-codeowners/app-utilities
-/components/esp_wifi/                 @esp-idf-codeowners/wifi
-/components/espcoredump/              @esp-idf-codeowners/tools
-/components/esptool_py/               @esp-idf-codeowners/tools
-/components/fatfs/                    @esp-idf-codeowners/storage
-/components/fatfs/**/*.py             @esp-idf-codeowners/tools
-/components/freertos/                 @esp-idf-codeowners/system
-/components/hal/                      @esp-idf-codeowners/peripherals
-/components/heap/                     @esp-idf-codeowners/system
-/components/http_parser/              @esp-idf-codeowners/app-utilities
-/components/idf_test/                 @esp-idf-codeowners/ci
-/components/ieee802154/               @esp-idf-codeowners/ieee802154
-/components/json/                     @esp-idf-codeowners/app-utilities
-/components/linux/                    @esp-idf-codeowners/system
-/components/log/                      @esp-idf-codeowners/system
-/components/lwip/                     @esp-idf-codeowners/lwip
-/components/mbedtls/                  @esp-idf-codeowners/app-utilities/mbedtls @esp-idf-codeowners/security
-/components/mqtt/                     @esp-idf-codeowners/network
-/components/newlib/                   @esp-idf-codeowners/system @esp-idf-codeowners/tools
-/components/nvs_flash/                @esp-idf-codeowners/storage
-/components/openthread/               @esp-idf-codeowners/ieee802154
-/components/partition_table/          @esp-idf-codeowners/system
-/components/perfmon/                  @esp-idf-codeowners/tools
-/components/protobuf-c/               @esp-idf-codeowners/app-utilities
-/components/protocomm/                @esp-idf-codeowners/app-utilities/provisioning
-/components/pthread/                  @esp-idf-codeowners/system
-/components/riscv/                    @esp-idf-codeowners/system
-/components/sdmmc/                    @esp-idf-codeowners/storage
-/components/soc/                      @esp-idf-codeowners/peripherals @esp-idf-codeowners/system
-/components/spi_flash/                @esp-idf-codeowners/peripherals
-/components/spiffs/                   @esp-idf-codeowners/storage
-/components/tcp_transport/            @esp-idf-codeowners/network
-/components/touch_element/            @esp-idf-codeowners/peripherals
-/components/ulp/                      @esp-idf-codeowners/system
-/components/unity/                    @esp-idf-codeowners/ci
-/components/usb/                      @esp-idf-codeowners/peripherals/usb
-/components/vfs/                      @esp-idf-codeowners/storage
-/components/wear_levelling/           @esp-idf-codeowners/storage
-/components/wifi_provisioning/        @esp-idf-codeowners/app-utilities/provisioning
-/components/wpa_supplicant/           @esp-idf-codeowners/wifi @esp-idf-codeowners/app-utilities/mbedtls
-/components/xtensa/                   @esp-idf-codeowners/system
-
-/docs/                                  @esp-idf-codeowners/docs
-/docs/**/api-reference/bluetooth/       @esp-idf-codeowners/bluetooth
-/docs/**/api-reference/network/         @esp-idf-codeowners/network
-/docs/**/api-reference/peripherals/     @esp-idf-codeowners/peripherals
-/docs/**/api-reference/peripherals/usb* @esp-idf-codeowners/peripherals @esp-idf-codeowners/peripherals/usb
-/docs/**/api-reference/protocols/       @esp-idf-codeowners/network @esp-idf-codeowners/app-utilities
-/docs/**/api-reference/provisioning/    @esp-idf-codeowners/app-utilities/provisioning
-/docs/**/api-reference/storage/         @esp-idf-codeowners/storage
-/docs/**/api-reference/system/          @esp-idf-codeowners/system
-/docs/**/security/                      @esp-idf-codeowners/security
-/docs/**/migration-guides/              @esp-idf-codeowners/docs @esp-idf-codeowners/all-maintainers
-
-/examples/README.md           @esp-idf-codeowners/docs @esp-idf-codeowners/ci
-/examples/**/*.py             @esp-idf-codeowners/ci @esp-idf-codeowners/tools
-/examples/bluetooth/          @esp-idf-codeowners/bluetooth
-/examples/build_system/       @esp-idf-codeowners/build-config
-/examples/common_components/  @esp-idf-codeowners/system
-/examples/custom_bootloader/  @esp-idf-codeowners/system
-/examples/cxx/                @esp-idf-codeowners/system
-/examples/ethernet/           @esp-idf-codeowners/network
-/examples/get-started/        @esp-idf-codeowners/system
-/examples/mesh/               @esp-idf-codeowners/wifi
-/examples/network/            @esp-idf-codeowners/network @esp-idf-codeowners/wifi
-/examples/openthread/         @esp-idf-codeowners/ieee802154
-/examples/peripherals/        @esp-idf-codeowners/peripherals
-/examples/peripherals/usb/    @esp-idf-codeowners/peripherals @esp-idf-codeowners/peripherals/usb
-/examples/protocols/          @esp-idf-codeowners/network @esp-idf-codeowners/app-utilities
-/examples/provisioning/       @esp-idf-codeowners/app-utilities/provisioning
-/examples/security/           @esp-idf-codeowners/security
-/examples/storage/            @esp-idf-codeowners/storage
-/examples/system/             @esp-idf-codeowners/system
-/examples/system/ota/         @esp-idf-codeowners/app-utilities
-/examples/wifi/               @esp-idf-codeowners/wifi
-/examples/zigbee/             @esp-idf-codeowners/ieee802154
-
-/tools/                       @esp-idf-codeowners/tools
-/tools/ble/                   @esp-idf-codeowners/app-utilities
-/tools/catch/                 @esp-idf-codeowners/ci
-/tools/ci/                    @esp-idf-codeowners/ci
-/tools/cmake/                 @esp-idf-codeowners/build-config
-/tools/esp_prov/              @esp-idf-codeowners/app-utilities
-/tools/kconfig*/              @esp-idf-codeowners/build-config
-/tools/ldgen/                 @esp-idf-codeowners/build-config
-/tools/mass_mfg/              @esp-idf-codeowners/app-utilities
-/tools/mocks/                 @esp-idf-codeowners/system
-/tools/test_apps/README.md    @esp-idf-codeowners/docs @esp-idf-codeowners/ci
-
-## Note: owners here should be the same as the owners for the same example subdir, above
-/tools/test_apps/build_system/       @esp-idf-codeowners/build-config
-/tools/test_apps/protocols/          @esp-idf-codeowners/network @esp-idf-codeowners/app-utilities
-/tools/test_apps/security/           @esp-idf-codeowners/security
-/tools/test_apps/system/             @esp-idf-codeowners/system
-
-/tools/test_apps/**/*.py             @esp-idf-codeowners/ci @esp-idf-codeowners/tools
-
-/tools/test_build_system/     @esp-idf-codeowners/tools @esp-idf-codeowners/build-config
-
-/tools/unit-test-app/         @esp-idf-codeowners/system @esp-idf-codeowners/tools
-
-# sort-order-reset
-
-/components/**/test_apps/**/*.py     @esp-idf-codeowners/ci @esp-idf-codeowners/tools
-
-# ignore lists
-/tools/ci/check_copyright_config.yaml                   @esp-idf-codeowners/all-maintainers
-/tools/ci/check_copyright_ignore.txt                    @esp-idf-codeowners/all-maintainers
-/tools/ci/mypy_ignore_list.txt                          @esp-idf-codeowners/tools
+* @esp-idf-codeowners/all-maintainers
--- a/.gitlab/ci/README.md
+++ b/.gitlab/ci/README.md
@ -21,11 +21,6 @@
      - [Shell Script Related](#shell-script-related)
  - [Manifest File to Control the Build/Test apps](#manifest-file-to-control-the-buildtest-apps)
    - [Grammar](#grammar)
-      - [Operands](#operands)
-      - [Operators](#operators)
-      - [Limitation:](#limitation)
-    - [How does it work?](#how-does-it-work)
-    - [Example](#example)

 ## General Workflow

@ -56,7 +51,7 @@
 - `example_test[_esp32/esp32s2/...]`
 - `fuzzer_test`
 - `host_test`
- `integration_test[_wifi/ble]`
+- `integration_test`
 - `iperf_stress_test`
 - `macos`
 - `macos_test`
@ -144,10 +139,11 @@ check if there's a suitable `.if-<if-anchor-you-need>` anchor
 1. if there is, create a rule following [`rules` Template Naming Rules](#rules-template-naming-rules).For detail information, please refer to [GitLab Documentation `rules-if`](https://docs.gitlab.com/ee/ci/yaml/README.html#rulesif). Here's an example.

    ```yaml
-    .rules:dev:
+    .rules:patterns:python-files:
      rules:
-        - <<: *if-trigger
+        - <<: *if-protected
        - <<: *if-dev-push
+          changes: *patterns-python-files
    ```

 2. if there isn't
--- a/.gitlab/ci/assign-test.yml
+++ b/.gitlab/ci/assign-test.yml
@ -5,6 +5,7 @@
    - assign_test
  variables:
    SUBMODULES_TO_FETCH: "none"
+    CI_TARGET_TEST_CONFIG_FILE: "$CI_PROJECT_DIR/.gitlab/ci/target-test.yml"
  artifacts:
    paths:
      - ${TEST_DIR}/test_configs/
@ -66,34 +67,3 @@ assign_unit_test:
  variables:
    TEST_TYPE: unit_test
    TEST_DIR: components/idf_test/unit_test
-
-assign_integration_test:
-  extends:
-    - .assign_test_template
-    - .rules:test:integration_test
-    - .before_script_minimal
-  image: ${CI_INTEGRATION_TEST_ENV_IMAGE}
-  needs:
-    - build_ssc_esp32
-    - build_ssc_esp32c3
-    - build_ssc_esp32c2
-  artifacts:
-    paths:
-      - $TEST_DIR/test_configs
-    expire_in: 1 week
-  variables:
-    TEST_DIR: ${CI_PROJECT_DIR}/tools/ci/integration_test
-    BUILD_DIR: ${CI_PROJECT_DIR}/SSC/ssc_bin
-    INTEGRATION_TEST_CASE_PATH: "${CI_PROJECT_DIR}/auto_test_script/TestCaseFiles"
-    ASSIGN_TEST_CASE_SCRIPT: "${CI_PROJECT_DIR}/auto_test_script/bin/CIAssignTestCases.py"
-    PYTHONPATH: ${CI_PROJECT_DIR}/auto_test_script/packages
-    GIT_LFS_SKIP_SMUDGE: 1
-  script:
-    - add_gitlab_ssh_keys
-    # clone test script to assign tests
-    - retry_failed git clone ${CI_AUTO_TEST_SCRIPT_REPO_URL} auto_test_script
-    - python $CHECKOUT_REF_SCRIPT auto_test_script auto_test_script
-    - cd auto_test_script
-    - ./tools/ci/setup_idfci.sh
-    # assign integration test cases
-    - python ${ASSIGN_TEST_CASE_SCRIPT} -t ${INTEGRATION_TEST_CASE_PATH} -c $CI_TARGET_TEST_CONFIG_FILE -b ${BUILD_DIR} -o $TEST_DIR/test_configs
--- a/.gitlab/ci/build.yml
+++ b/.gitlab/ci/build.yml
@ -215,14 +215,6 @@ build_pytest_examples_esp32c2:
    IDF_TARGET: esp32c2
    TEST_DIR: examples

-build_pytest_examples_esp32h4:
-  extends:
-    - .build_pytest_no_jtag_template
-    - .rules:build:example_test-esp32h4
-  variables:
-    IDF_TARGET: esp32h4
-    TEST_DIR: examples
-
 build_pytest_examples_jtag:  # for all targets
  extends:
    - .build_pytest_jtag_template
@ -244,6 +236,7 @@ build_pytest_examples_esp32h2:
  extends:
    - .build_pytest_template
    - .rules:build:example_test-esp32h2
+  parallel: 2
  variables:
    IDF_TARGET: esp32h2
    TEST_DIR: examples
@ -410,7 +403,7 @@ build_only_tools_test_apps:
  extends:
    - .build_cmake_template
    - .rules:build:custom_test
-  parallel: 9
+  parallel: 8
  script:
    # CI specific options start from "--collect-size-info xxx". could ignore when running locally
    - run_cmd python tools/ci/ci_build_apps.py tools/test_apps -v
@ -458,66 +451,6 @@ fast_template_app:
  variables:
    BUILD_COMMAND_ARGS: "-p"
 #------------------------------------------------------------------------------
-
-.build_ssc_template:
-  extends:
-    - .build_template
-    - .rules:build:integration_test
-  needs:
-    - job: fast_template_app
-      artifacts: false
-  artifacts:
-    paths:
-      - SSC/ssc_bin
-    expire_in: 1 week
-  script:
-    - retry_failed git clone $SSC_REPOSITORY
-    - python $CHECKOUT_REF_SCRIPT SSC SSC
-    - cd SSC
-    - MAKEFLAGS= ./ci_build_ssc.sh $TARGET_NAME
-
-build_ssc_esp32:
-  extends: .build_ssc_template
-  parallel: 3
-  variables:
-    TARGET_NAME: "ESP32"
-
-build_ssc_esp32s2:
-  extends: .build_ssc_template
-  parallel: 2
-  variables:
-    TARGET_NAME: "ESP32S2"
-
-build_ssc_esp32c2:
-  extends: .build_ssc_template
-  parallel: 2
-  variables:
-    TARGET_NAME: "ESP32C2"
-
-build_ssc_esp32c3:
-  extends: .build_ssc_template
-  parallel: 3
-  variables:
-    TARGET_NAME: "ESP32C3"
-
-build_ssc_esp32s3:
-  extends: .build_ssc_template
-  parallel: 3
-  variables:
-    TARGET_NAME: "ESP32S3"
-
-build_ssc_esp32c6:
-  extends: .build_ssc_template
-  parallel: 3
-  variables:
-    TARGET_NAME: "ESP32C6"
-
-build_ssc_esp32h2:
-  extends: .build_ssc_template
-  parallel: 2
-  variables:
-    TARGET_NAME: "ESP32H2"
-
 .build_esp_idf_tests_cmake_template:
  extends:
    - .build_cmake_template
@ -644,24 +577,16 @@ build_examples_cmake_esp32c3:
  extends:
    - .build_cmake_template
    - .rules:build:example_test-esp32c3
-  parallel: 6
+  parallel: 8
  variables:
    IDF_TARGET: esp32c3
    TEST_DIR: examples

-build_examples_cmake_esp32h4:
-  extends:
-    - .build_cmake_template
-    - .rules:build:example_test-esp32h4
-  variables:
-    IDF_TARGET: esp32h4
-    TEST_DIR: examples
-
 build_examples_cmake_esp32c6:
  extends:
    - .build_cmake_template
    - .rules:build:example_test-esp32c6
-  parallel: 6
+  parallel: 10
  variables:
    IDF_TARGET: esp32c6
    TEST_DIR: examples
@ -670,7 +595,7 @@ build_examples_cmake_esp32h2:
  extends:
    - .build_cmake_template
    - .rules:build:example_test-esp32h2
-  parallel: 2
+  parallel: 6
  variables:
    IDF_TARGET: esp32h2
    TEST_DIR: examples
@ -729,13 +654,6 @@ build_clang_test_apps_esp32c6:
  variables:
    IDF_TARGET: esp32c6

-build_clang_test_apps_esp32h4:
-  extends:
-    - .build_clang_test_apps_riscv
-    - .rules:build:custom_test-esp32h4
-  variables:
-    IDF_TARGET: esp32h4
-
 .test_build_system_template:
  stage: host_test
  extends:
--- a/.gitlab/ci/dependencies/dependencies.yml
+++ b/.gitlab/ci/dependencies/dependencies.yml
@ -3,7 +3,6 @@
  - esp32s2
  - esp32s3
  - esp32c3
-  - esp32h4
  - esp32c2
  - esp32c6
  - esp32h2
@ -76,16 +75,6 @@
    - "build:{0}"
    - build:target_test

-build:integration_test:
-  labels:
-    - build
-  patterns:
-    - build_components
-    - build_system
-  included_in:
-    - build:target_test
-
-
 ####################
 # Target Test Jobs #
 ####################
@ -133,13 +122,15 @@ build:integration_test:
    - *target_test
    - *all_targets
    - - bt        # example_test_005
-      - wifi      # example_test_002, example_test*wifi*
-      - ethernet  # example_test*ethernet*
-      - sdio      # component_ut_pytest_esp32_sdio
+      - wifi      # pytest*wifi*
+      - ethernet  # pytest*ethernet*
+      - sdio      # pytest*sdio*
      - usb       # USB Device & Host tests
-      - adc       # component_ut_pytest_esp32x_adc
+      - adc       # pytest*adc*
      - i154
      - flash_multi
+      - ecdsa
+      - ccs811    # pytest*ccs811*
  patterns:
    - "{0}-{1}-{2}"
    - "{0}-{2}"
@ -181,21 +172,18 @@ build:integration_test:
    - "build:example_test"
    - build:target_test

-"test:integration_test_{0}":
-  matrix:
-    - - wifi
-      - ble
-  labels:
-    - integration_test_{0}
-    - integration_test
-    - target_test
+# For openthread sleepy
+"test:example_test-otsleepy":
  patterns:
-    - integration_test-{0}
-    - target_test-{0}
-    # - maybe others
+    - "example_test-otsleepy"
+    - "target_test-i154"
+  labels:
+    - target_test
+    - example_test
  included_in:
-    - test:integration_test
-    - build:integration_test
+    - "build:example_test-esp32c6"
+    - "build:example_test-esp32h2"
+    - "build:example_test"
    - build:target_test

 "test:host_test":
@ -213,37 +201,6 @@ build:integration_test:
 #################################
 # Triggered Only By Labels Jobs #
 #################################
-"labels:iperf_stress_test": # example_test
-  labels:
-    - iperf_stress_test
-  included_in:
-    - build:example_test
-    - build:example_test-esp32
-    - build:target_test
-
-"labels:weekend_test": # custom test
-  labels:
-    - weekend_test
-  included_in:
-    - build:custom_test
-    - build:custom_test-esp32
-    - build:target_test
-
 "labels:nvs_coverage": # host_test
  labels:
    - nvs_coverage
-
-"labels:fuzzer_test-weekend_test": # host test
-  labels:
-    - fuzzer_test
-    - weekend_test
-
-"labels-protected:lan8720":  # UT # FIXME: IDFCI-1176 temporary run this on master/release or with label
-  labels:
-    - lan8720
-  included_in:
-    - build:unit_test
-    - build:unit_test-esp32
-    - build:target_test
-    - build:component_ut
-    - build:component_ut-esp32
--- a/.gitlab/ci/deploy.yml
+++ b/.gitlab/ci/deploy.yml
@ -32,50 +32,25 @@ push_to_github:
  extends:
    - .deploy_job_template
    - .before_script_minimal
-    - .rules:protected-no_label
-  dependencies: []
+    - .rules:push_to_github
+  needs:
+    - check_submodule_sync
  script:
    - add_github_ssh_keys
    - git remote remove github &>/dev/null || true
    - git remote add github git@github.com:espressif/esp-idf.git
    - tools/ci/push_to_github.sh

-deploy_test_result:
+deploy_update_SHA_in_esp-dockerfiles:
  extends:
    - .deploy_job_template
    - .before_script_minimal
-    - .rules:ref:master-always
-  image: $CI_DOCKER_REGISTRY/bot-env:1
+    - .rules:protected-no_label-always
  dependencies: []
-  tags:
-    - deploy_test
-  artifacts:
-    when: always
-    paths:
-      - ${CI_PROJECT_DIR}/test-management/*.log
-    expire_in: 1 week
  variables:
-    BOT_ACCOUNT_CONFIG_FILE: "${CI_PROJECT_DIR}/test-management/Config/Account.local.yml"
-    TEST_RESULTS_PATH: "${CI_PROJECT_DIR}/TEST_RESULTS"
+    GIT_DEPTH: 2
+  tags: [ shiny, build ]
  script:
-    - add_gitlab_ssh_keys
-    - export GIT_SHA=$(echo ${CI_COMMIT_SHA} | cut -c 1-8)
-    - export REV_COUNT=$(git rev-list --count ${GIT_SHA} --)
-    - export SUMMARY="IDF CI test result for $GIT_SHA (r${REV_COUNT})"
-    # Download test result
-    - export PYTHONPATH="$IDF_PATH/tools:$IDF_PATH/tools/ci/python_packages:$PYTHONPATH"
-    - python3 ${IDF_PATH}/tools/ci/get_all_test_results.py --path ${TEST_RESULTS_PATH} --include_retried
-    - if [[ -z $(find ${TEST_RESULTS_PATH} -name "*.xml") ]]; then exit 0; fi
-    # Clone test-management repo
-    - retry_failed git clone $TEST_MANAGEMENT_REPO
-    - python3 $CHECKOUT_REF_SCRIPT test-management test-management
-    - cd test-management
-    - echo $BOT_JIRA_ACCOUNT > ${BOT_ACCOUNT_CONFIG_FILE}
-    # Make sure all requirements are installed
-    - pip3 install -r requirements.txt
-    # Update test cases
-    - python3 ImportTestCase.py $JIRA_TEST_MANAGEMENT_PROJECT from_xml -d ${TEST_RESULTS_PATH} -r $GIT_SHA -l IDFCI
-    # update test results
-    - python3 ImportTestResult.py -r "$GIT_SHA (r${REV_COUNT})" -j $JIRA_TEST_MANAGEMENT_PROJECT -s "$SUMMARY" -l IDFCI -p ${TEST_RESULTS_PATH} --pipeline_url ${CI_PIPELINE_URL}
-  # May need a long time to upload all test results.
-  timeout: 4 hours
+    - 'curl --header "PRIVATE-TOKEN: ${ESPCI_SCRIPTS_TOKEN}" -o create_MR_in_esp_dockerfile.sh $GITLAB_HTTP_SERVER/api/v4/projects/1260/repository/files/create_MR_in_esp_dockerfile%2Fcreate_MR_in_esp_dockerfile.sh/raw\?ref\=master'
+    - chmod +x create_MR_in_esp_dockerfile.sh
+    - ./create_MR_in_esp_dockerfile.sh
--- a/.gitlab/ci/docs.yml
+++ b/.gitlab/ci/docs.yml
@ -3,6 +3,7 @@
  - "docs/**/*"
  - "**/*.rst"
  - "CONTRIBUTING.rst"
+  - "**/soc_caps.h"

 .patterns-docs-partial: &patterns-docs-partial
  - "components/**/*.h"
@ -24,6 +25,9 @@
 .if-protected-no_label: &if-protected-no_label
  if: '($CI_COMMIT_REF_NAME == "master" || $CI_COMMIT_BRANCH =~ /^release\/v/ || $CI_COMMIT_TAG =~ /^v\d+\.\d+(\.\d+)?($|-)/) && $BOT_TRIGGER_WITH_LABEL == null'

+.if-qa-test-tag: &if-qa-test-tag
+  if: '$CI_COMMIT_TAG =~ /^qa-test/'
+
 .if-label-build_docs: &if-label-build_docs
  if: '$BOT_LABEL_BUILD_DOCS || $CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*build_docs(?:,[^,\n\r]+)*$/i'

@ -31,10 +35,12 @@
  if: '$BOT_LABEL_DOCS_FULL || $CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*docs_full(?:,[^,\n\r]+)*$/i'

 .if-dev-push: &if-dev-push
-  if: '$CI_COMMIT_REF_NAME != "master" && $CI_COMMIT_BRANCH !~ /^release\/v/ && $CI_COMMIT_TAG !~ /^v\d+\.\d+(\.\d+)?($|-)/ && ($CI_PIPELINE_SOURCE == "push" || $CI_PIPELINE_SOURCE == "merge_request_event")'
+  if: '$CI_COMMIT_REF_NAME != "master" && $CI_COMMIT_BRANCH !~ /^release\/v/ && $CI_COMMIT_TAG !~ /^v\d+\.\d+(\.\d+)?($|-)/ && $CI_COMMIT_TAG !~ /^qa-test/ && ($CI_PIPELINE_SOURCE == "push" || $CI_PIPELINE_SOURCE == "merge_request_event")'

 .doc-rules:build:docs-full:
  rules:
+    - <<: *if-qa-test-tag
+      when: never
    - <<: *if-protected
    - <<: *if-label-build_docs
    - <<: *if-label-docs_full
@ -43,6 +49,11 @@

 .doc-rules:build:docs-partial:
  rules:
+    - <<: *if-qa-test-tag
+      when: never
+    - <<: *if-dev-push
+      changes: *patterns-docs-full
+      when: never
    - <<: *if-dev-push
      changes: *patterns-docs-partial

--- a/.gitlab/ci/host-test.yml
+++ b/.gitlab/ci/host-test.yml
@ -135,10 +135,10 @@ test_idf_tools:
    entrypoint: [""]  # use system python3. no extra pip package installed
  script:
    # Tools must be downloaded for testing
-    - python3 ${IDF_PATH}/tools/idf_tools.py download
+    - python3 ${IDF_PATH}/tools/idf_tools.py download required qemu-riscv32 qemu-xtensa
    - cd ${IDF_PATH}/tools/test_idf_tools
    - python3 -m pip install jsonschema
-    - python3 ./test_idf_tools.py
+    - python3 ./test_idf_tools.py -v
    - python3 ./test_idf_tools_python_env.py

 .test_efuse_table_on_host_template:
@ -185,30 +185,6 @@ test_efuse_table_on_host_esp32c6:
  variables:
    IDF_TARGET: esp32c6

-test_efuse_table_on_host_esp32h4:
-  extends: .test_efuse_table_on_host_template
-  variables:
-    IDF_TARGET: esp32h4
-
-test_espcoredump:
-  extends: .host_test_template
-  artifacts:
-    when: always
-    paths:
-      - components/espcoredump/test/**/.coverage
-      - components/espcoredump/test/**/output
-    expire_in: 1 week
-  variables:
-    IDF_COREDUMP_ELF_REPO: "https://gitlab-ci-token:${BOT_TOKEN}@${CI_SERVER_HOST}:${CI_SERVER_PORT}/idf/idf-coredump-elf.git"
-    IDF_COREDUMP_ELF_TAG: idf-20220928
-    # install CMake version specified in tools.json
-    SETUP_TOOLS_LIST: "all"
-  script:
-    - eval $($IDF_PATH/tools/idf_tools.py export)
-    - retry_failed git clone ${IDF_COREDUMP_ELF_REPO} -b $IDF_COREDUMP_ELF_TAG
-    - cd ${IDF_PATH}/components/espcoredump/test/
-    - ./test_espcoredump.sh ${CI_PROJECT_DIR}/idf-coredump-elf
-
 test_logtrace_proc:
  extends: .host_test_template
  artifacts:
@ -340,13 +316,13 @@ test_pytest_qemu:
      --target esp32
      --pytest-apps
      -m qemu
-    - retry_failed git clone $KNOWN_FAILURE_CASES_REPO known_failure_cases
+    - python tools/ci/get_known_failure_cases_file.py
    - pytest
      --target esp32
      -m qemu
      --embedded-services idf,qemu
      --junitxml=XUNIT_RESULT.xml
-      --known-failure-cases-file known_failure_cases/known_failure_cases.txt
+      --known-failure-cases-file ${KNOWN_FAILURE_CASES_FILE_NAME}

 test_pytest_linux:
  extends:
@ -365,6 +341,6 @@ test_pytest_linux:
      --target linux
      --pytest-apps
      -m host_test
-    - retry_failed git clone $KNOWN_FAILURE_CASES_REPO known_failure_cases
+    - python tools/ci/get_known_failure_cases_file.py
    - run_cmd pytest --target linux -m host_test --junitxml=XUNIT_RESULT.xml
-      --known-failure-cases-file known_failure_cases/known_failure_cases.txt
+      --known-failure-cases-file ${KNOWN_FAILURE_CASES_FILE_NAME}
--- a/.gitlab/ci/integration_test.yml
+++ b/.gitlab/ci/integration_test.yml
@ -0,0 +1,69 @@
+# generate dynamic integration pipeline by `idf-integration-ci` project
+
+.patterns-integration_test: &patterns-integration_test
+  # add all possible patterns to make sure `gen_integration_pipeline` can be triggered.
+  # fine-grained control will be done while generating the pipeline
+  # find `patterns` in `idf-integration-ci` project
+  - "components/**/*"
+  - "tools/**/*"
+  - ".gitlab-ci.yml"
+  - ".gitlab/ci/common.yml"
+  - ".gitlab/ci/integration_test.yml"
+  - ".gitmodules"
+  - "CMakeLists.txt"
+  - "install.sh"
+  - "export.sh"
+  - "Kconfig"
+  - "sdkconfig.rename"
+
+# Simplify the rules
+.integration_test_rules:
+  rules:
+    - if: '$CI_PIPELINE_SOURCE != "merge_request_event"'
+    - if: '$CI_PIPELINE_SOURCE == "merge_request_event"'
+      changes: *patterns-integration_test
+    # support trigger by ci labels
+    - if: '$CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*target_test(?:,[^,\n\r]+)*$/i'
+    - if: '$CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*integration_test(?:,[^,\n\r]+)*$/i'
+    - if: '$CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*build(?:,[^,\n\r]+)*$/i'
+
+gen_integration_pipeline:
+  extends:
+    - .before_script_minimal
+    - .integration_test_rules
+  image: ${CI_INTEGRATION_ASSIGN_ENV}
+  stage: assign_test
+  cache: []
+  tags:
+    - assign_test
+  variables:
+    SUBMODULES_TO_FETCH: "none"
+    GIT_LFS_SKIP_SMUDGE: 1
+  needs:
+    - job: fast_template_app
+      artifacts: false
+      optional: true
+  artifacts:
+    paths:
+      - idf-integration-ci/child_pipeline/
+    expire_in: 2 weeks
+  script:
+    - add_gitlab_ssh_keys
+    - retry_failed git clone ${CI_GEN_INTEGRATION_PIPELINE_REPO} idf-integration-ci
+    - python $CHECKOUT_REF_SCRIPT idf-integration-ci idf-integration-ci
+    - cd idf-integration-ci
+    - python tools/generate_child_pipeline.py -o child_pipeline/
+
+child_integration_test_pipeline:
+  extends:
+    - .integration_test_rules
+  stage: assign_test
+  needs:
+    - gen_integration_pipeline
+  trigger:
+    include:
+      - artifact: idf-integration-ci/child_pipeline/pipeline.yml
+        job: gen_integration_pipeline
+    forward:
+      yaml_variables: false
+    strategy: depend
--- a/.gitlab/ci/pre_check.yml
+++ b/.gitlab/ci/pre_check.yml
@ -17,13 +17,15 @@ check_pre_commit_master_release:
    - .rules:protected
  script:
    - git diff-tree --no-commit-id --name-only -r $PIPELINE_COMMIT_SHA | xargs pre-commit run --files
+    - pre-commit run --hook-stage post-commit validate-sbom-manifest

 check_pre_commit_MR:
  extends:
    - .check_pre_commit_template
-    - .rules:dev
+    - .rules:mr
  script:
    - python ${CI_PROJECT_DIR}/tools/ci/ci_get_mr_info.py files ${CI_MERGE_REQUEST_SOURCE_BRANCH_NAME} | xargs pre-commit run --files
+    - pre-commit run --hook-stage post-commit validate-sbom-manifest

 check_MR_style_dangerjs:
  extends:
--- a/.gitlab/ci/rules.yml
+++ b/.gitlab/ci/rules.yml
@ -55,8 +55,6 @@
  - "tools/test_build_system/**/*"

 .patterns-custom_test: &patterns-custom_test
-  - "components/espcoredump/**/*"
-
  - "tools/ci/python_packages/gitlab_api.py"
  - "tools/ci/python_packages/tiny_test_fw/**/*"
  - "tools/ci/python_packages/ttfw_idf/**/*"
@ -95,6 +93,13 @@
  - "examples/common_components/iperf/**/*"
  - "examples/openthread/**/*"

+.patterns-example_test-otsleepy: &patterns-example_test-otsleepy
+  - "components/esp_hw_support/**/*"
+  - "components/esp_netif/**/*"
+  - "components/lwip/**/*"
+  - "components/openthread/**/*"
+  - "examples/openthread/**/*"
+
 .patterns-target_test-wifi: &patterns-target_test-wifi
  - "components/esp_netif/**/*"
  - "components/lwip/**/*"
@ -103,20 +108,6 @@
  - "components/wpa_supplicant/**/*"
  - "components/esp_coex/**/*"

-.patterns-integration_test-ble: &patterns-integration_test-ble
-  - "tools/ci/python_packages/gitlab_api.py"
-  - "tools/ci/integration_test/**/*"
-  - "components/bt/controller/lib_esp32"
-  - "components/bt/controller/lib_esp32c3_family"
-  - "components/bt/controller/lib_esp32h2/esp32h2-bt-lib"
-  - "components/bt/host/nimble/nimble"
-  - "components/esp_phy/lib"
-  - "components/esp_coex/**/*"
-
-.patterns-integration_test-wifi: &patterns-integration_test-wifi
-  - "tools/ci/python_packages/gitlab_api.py"
-  - "tools/ci/integration_test/**/*"
-
 .patterns-host_test: &patterns-host_test
  - ".gitlab/ci/host-test.yml"

@ -168,6 +159,8 @@

  - "tools/split_paths_by_spaces.py"

+  - "tools/check_python_dependencies.py"
+
 .patterns-windows: &patterns-windows
  - "tools/windows/**/*"

@ -185,7 +178,6 @@
  - "components/esp_phy/lib"
  - "components/esp_wifi/lib"
  - "components/esp_coex/lib"
-  - "components/ieee802154/lib"
  - "components/json/cJSON"
  - "components/lwip/lwip"
  - "components/mbedtls/mbedtls"
@ -246,6 +238,7 @@
  - "components/driver/include/driver/sdio*.h"
  - "components/driver/include/driver/sdmmc*.h"
  - "components/sdmmc/**/*"
+  - "examples/peripherals/sdio/**/*"

 # for jobs: component_ut_pytest_sdio related
 .patterns-component_ut-sdio: &patterns-component_ut-sdio
@ -259,6 +252,13 @@
  - "components/driver/include/driver/sdmmc*.h"
  - "components/sdmmc/**/*"

+.patterns-example_test-ccs811: &patterns-example_test-ccs811
+  # components
+  - "examples/system/console/advanced/components/**/*"
+  - "components/driver/i2c/**/*"
+  # tests
+  - "examples/peripherals/i2c/i2c_tools/**/*"
+
 # for jobs: UT_xx_SDSPI related
 .patterns-unit_test-sdio: &patterns-unit_test-sdio
  - "components/hal/sdio*.c"
@ -306,6 +306,11 @@
  - "components/efuse/**/*"
  - "examples/peripherals/adc/**/*"

+.patterns-target_test-ecdsa: &patterns-target_test-ecdsa
+  - "components/hal/**/*"
+  - "components/efuse/**/*"
+  - "components/mbedtls/port/ecdsa/*"
+
 ##############
 # if anchors #
 ##############
@ -316,13 +321,19 @@
  if: '$CI_COMMIT_TAG =~ /^v\d+\.\d+(\.\d+)?($|-)/'

 .if-protected: &if-protected
-  if: '($CI_COMMIT_REF_NAME == "master" || $CI_COMMIT_BRANCH =~ /^release\/v/ || $CI_COMMIT_TAG =~ /^v\d+\.\d+(\.\d+)?($|-)/)'
+  if: '($CI_COMMIT_REF_NAME == "master" || $CI_COMMIT_BRANCH =~ /^release\/v/ || $CI_COMMIT_TAG =~ /^v\d+\.\d+(\.\d+)?($|-)/) || $CI_COMMIT_TAG =~ /^qa-test/'

 .if-protected-no_label: &if-protected-no_label
  if: '($CI_COMMIT_REF_NAME == "master" || $CI_COMMIT_BRANCH =~ /^release\/v/ || $CI_COMMIT_TAG =~ /^v\d+\.\d+(\.\d+)?($|-)/) && $BOT_TRIGGER_WITH_LABEL == null'

+.if-qa-test-tag: &if-qa-test-tag
+  if: '$CI_COMMIT_TAG =~ /^qa-test/'
+
 .if-dev-push: &if-dev-push
-  if: '$CI_COMMIT_REF_NAME != "master" && $CI_COMMIT_BRANCH !~ /^release\/v/ && $CI_COMMIT_TAG !~ /^v\d+\.\d+(\.\d+)?($|-)/ && ($CI_PIPELINE_SOURCE == "push" || $CI_PIPELINE_SOURCE == "merge_request_event")'
+  if: '$CI_COMMIT_REF_NAME != "master" && $CI_COMMIT_BRANCH !~ /^release\/v/ && $CI_COMMIT_TAG !~ /^v\d+\.\d+(\.\d+)?($|-)/ && $CI_COMMIT_TAG !~ /^qa-test/ && ($CI_PIPELINE_SOURCE == "push" || $CI_PIPELINE_SOURCE == "merge_request_event")'
+
+.if-merge_request: &if-merge_request
+  if: '$CI_PIPELINE_SOURCE == "merge_request_event"'

 .if-schedule: &if-schedule
  if: '$CI_PIPELINE_SOURCE == "schedule"'
@ -355,10 +366,24 @@
  rules:
    - <<: *if-protected

-.rules:protected-no_label:
+.rules:push_to_github:
  rules:
+    - <<: *if-qa-test-tag
+      when: never
    - <<: *if-protected-no_label

+.rules:protected-no_label-always:
+  rules:
+    - <<: *if-qa-test-tag
+      when: never
+    - <<: *if-protected-no_label
+      when: always
+
+.rules:mr:
+  rules:
+    - <<: *if-merge_request
+
+### Patterns ###
 .rules:patterns:python-cache:
  rules:
    - *if-schedule
@ -447,9 +472,6 @@
 .if-label-component_ut_esp32h2: &if-label-component_ut_esp32h2
  if: '$BOT_LABEL_COMPONENT_UT_ESP32H2 || $CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*component_ut_esp32h2(?:,[^,\n\r]+)*$/i'

-.if-label-component_ut_esp32h4: &if-label-component_ut_esp32h4
-  if: '$BOT_LABEL_COMPONENT_UT_ESP32H4 || $CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*component_ut_esp32h4(?:,[^,\n\r]+)*$/i'
-
 .if-label-component_ut_esp32s2: &if-label-component_ut_esp32s2
  if: '$BOT_LABEL_COMPONENT_UT_ESP32S2 || $CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*component_ut_esp32s2(?:,[^,\n\r]+)*$/i'

@ -474,9 +496,6 @@
 .if-label-custom_test_esp32h2: &if-label-custom_test_esp32h2
  if: '$BOT_LABEL_CUSTOM_TEST_ESP32H2 || $CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*custom_test_esp32h2(?:,[^,\n\r]+)*$/i'

-.if-label-custom_test_esp32h4: &if-label-custom_test_esp32h4
-  if: '$BOT_LABEL_CUSTOM_TEST_ESP32H4 || $CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*custom_test_esp32h4(?:,[^,\n\r]+)*$/i'
-
 .if-label-custom_test_esp32s2: &if-label-custom_test_esp32s2
  if: '$BOT_LABEL_CUSTOM_TEST_ESP32S2 || $CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*custom_test_esp32s2(?:,[^,\n\r]+)*$/i'

@ -504,36 +523,15 @@
 .if-label-example_test_esp32h2: &if-label-example_test_esp32h2
  if: '$BOT_LABEL_EXAMPLE_TEST_ESP32H2 || $CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*example_test_esp32h2(?:,[^,\n\r]+)*$/i'

-.if-label-example_test_esp32h4: &if-label-example_test_esp32h4
-  if: '$BOT_LABEL_EXAMPLE_TEST_ESP32H4 || $CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*example_test_esp32h4(?:,[^,\n\r]+)*$/i'
-
 .if-label-example_test_esp32s2: &if-label-example_test_esp32s2
  if: '$BOT_LABEL_EXAMPLE_TEST_ESP32S2 || $CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*example_test_esp32s2(?:,[^,\n\r]+)*$/i'

 .if-label-example_test_esp32s3: &if-label-example_test_esp32s3
  if: '$BOT_LABEL_EXAMPLE_TEST_ESP32S3 || $CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*example_test_esp32s3(?:,[^,\n\r]+)*$/i'

-.if-label-fuzzer_test: &if-label-fuzzer_test
-  if: '$BOT_LABEL_FUZZER_TEST || $CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*fuzzer_test(?:,[^,\n\r]+)*$/i'
-
 .if-label-host_test: &if-label-host_test
  if: '$BOT_LABEL_HOST_TEST || $CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*host_test(?:,[^,\n\r]+)*$/i'

-.if-label-integration_test: &if-label-integration_test
-  if: '$BOT_LABEL_INTEGRATION_TEST || $CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*integration_test(?:,[^,\n\r]+)*$/i'
-
-.if-label-integration_test_ble: &if-label-integration_test_ble
-  if: '$BOT_LABEL_INTEGRATION_TEST_BLE || $CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*integration_test_ble(?:,[^,\n\r]+)*$/i'
-
-.if-label-integration_test_wifi: &if-label-integration_test_wifi
-  if: '$BOT_LABEL_INTEGRATION_TEST_WIFI || $CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*integration_test_wifi(?:,[^,\n\r]+)*$/i'
-
-.if-label-iperf_stress_test: &if-label-iperf_stress_test
-  if: '$BOT_LABEL_IPERF_STRESS_TEST || $CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*iperf_stress_test(?:,[^,\n\r]+)*$/i'
-
-.if-label-lan8720: &if-label-lan8720
-  if: '$BOT_LABEL_LAN8720 || $CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*lan8720(?:,[^,\n\r]+)*$/i'
-
 .if-label-macos: &if-label-macos
  if: '$BOT_LABEL_MACOS || $CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*macos(?:,[^,\n\r]+)*$/i'

@ -567,18 +565,12 @@
 .if-label-unit_test_esp32h2: &if-label-unit_test_esp32h2
  if: '$BOT_LABEL_UNIT_TEST_ESP32H2 || $CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*unit_test_esp32h2(?:,[^,\n\r]+)*$/i'

-.if-label-unit_test_esp32h4: &if-label-unit_test_esp32h4
-  if: '$BOT_LABEL_UNIT_TEST_ESP32H4 || $CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*unit_test_esp32h4(?:,[^,\n\r]+)*$/i'
-
 .if-label-unit_test_esp32s2: &if-label-unit_test_esp32s2
  if: '$BOT_LABEL_UNIT_TEST_ESP32S2 || $CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*unit_test_esp32s2(?:,[^,\n\r]+)*$/i'

 .if-label-unit_test_esp32s3: &if-label-unit_test_esp32s3
  if: '$BOT_LABEL_UNIT_TEST_ESP32S3 || $CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*unit_test_esp32s3(?:,[^,\n\r]+)*$/i'

-.if-label-weekend_test: &if-label-weekend_test
-  if: '$BOT_LABEL_WEEKEND_TEST || $CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*weekend_test(?:,[^,\n\r]+)*$/i'
-
 .if-label-windows: &if-label-windows
  if: '$BOT_LABEL_WINDOWS || $CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*windows(?:,[^,\n\r]+)*$/i'

@ -607,10 +599,8 @@
    - <<: *if-label-component_ut_esp32c3
    - <<: *if-label-component_ut_esp32c6
    - <<: *if-label-component_ut_esp32h2
-    - <<: *if-label-component_ut_esp32h4
    - <<: *if-label-component_ut_esp32s2
    - <<: *if-label-component_ut_esp32s3
-    - <<: *if-label-lan8720
    - <<: *if-label-target_test
    - <<: *if-label-unit_test
    - <<: *if-label-unit_test_esp32
@ -618,7 +608,6 @@
    - <<: *if-label-unit_test_esp32c3
    - <<: *if-label-unit_test_esp32c6
    - <<: *if-label-unit_test_esp32h2
-    - <<: *if-label-unit_test_esp32h4
    - <<: *if-label-unit_test_esp32s2
    - <<: *if-label-unit_test_esp32s3
    - <<: *if-dev-push
@ -637,6 +626,8 @@
      changes: *patterns-downloadable-tools
    - <<: *if-dev-push
      changes: *patterns-target_test-adc
+    - <<: *if-dev-push
+      changes: *patterns-target_test-ecdsa
    - <<: *if-dev-push
      changes: *patterns-target_test-i154
    - <<: *if-dev-push
@ -650,7 +641,6 @@
    - <<: *if-label-build
    - <<: *if-label-component_ut
    - <<: *if-label-component_ut_esp32
-    - <<: *if-label-lan8720
    - <<: *if-label-target_test
    - <<: *if-label-unit_test
    - <<: *if-label-unit_test_esp32
@ -670,6 +660,8 @@
      changes: *patterns-downloadable-tools
    - <<: *if-dev-push
      changes: *patterns-target_test-adc
+    - <<: *if-dev-push
+      changes: *patterns-target_test-ecdsa
    - <<: *if-dev-push
      changes: *patterns-target_test-i154
    - <<: *if-dev-push
@ -702,6 +694,8 @@
      changes: *patterns-downloadable-tools
    - <<: *if-dev-push
      changes: *patterns-target_test-adc
+    - <<: *if-dev-push
+      changes: *patterns-target_test-ecdsa
    - <<: *if-dev-push
      changes: *patterns-target_test-i154
    - <<: *if-dev-push
@ -734,6 +728,8 @@
      changes: *patterns-downloadable-tools
    - <<: *if-dev-push
      changes: *patterns-target_test-adc
+    - <<: *if-dev-push
+      changes: *patterns-target_test-ecdsa
    - <<: *if-dev-push
      changes: *patterns-target_test-i154
    - <<: *if-dev-push
@ -766,6 +762,8 @@
      changes: *patterns-downloadable-tools
    - <<: *if-dev-push
      changes: *patterns-target_test-adc
+    - <<: *if-dev-push
+      changes: *patterns-target_test-ecdsa
    - <<: *if-dev-push
      changes: *patterns-target_test-i154
    - <<: *if-dev-push
@ -798,6 +796,8 @@
      changes: *patterns-downloadable-tools
    - <<: *if-dev-push
      changes: *patterns-target_test-adc
+    - <<: *if-dev-push
+      changes: *patterns-target_test-ecdsa
    - <<: *if-dev-push
      changes: *patterns-target_test-i154
    - <<: *if-dev-push
@ -830,6 +830,8 @@
      changes: *patterns-downloadable-tools
    - <<: *if-dev-push
      changes: *patterns-target_test-adc
+    - <<: *if-dev-push
+      changes: *patterns-target_test-ecdsa
    - <<: *if-dev-push
      changes: *patterns-target_test-i154
    - <<: *if-dev-push
@ -862,6 +864,8 @@
      changes: *patterns-downloadable-tools
    - <<: *if-dev-push
      changes: *patterns-target_test-adc
+    - <<: *if-dev-push
+      changes: *patterns-target_test-ecdsa
    - <<: *if-dev-push
      changes: *patterns-target_test-i154
    - <<: *if-dev-push
@ -879,11 +883,9 @@
    - <<: *if-label-custom_test_esp32c3
    - <<: *if-label-custom_test_esp32c6
    - <<: *if-label-custom_test_esp32h2
-    - <<: *if-label-custom_test_esp32h4
    - <<: *if-label-custom_test_esp32s2
    - <<: *if-label-custom_test_esp32s3
    - <<: *if-label-target_test
-    - <<: *if-label-weekend_test
    - <<: *if-dev-push
      changes: *patterns-build_components
    - <<: *if-dev-push
@ -894,6 +896,8 @@
      changes: *patterns-downloadable-tools
    - <<: *if-dev-push
      changes: *patterns-target_test-adc
+    - <<: *if-dev-push
+      changes: *patterns-target_test-ecdsa
    - <<: *if-dev-push
      changes: *patterns-target_test-i154
    - <<: *if-dev-push
@ -908,7 +912,6 @@
    - <<: *if-label-custom_test
    - <<: *if-label-custom_test_esp32
    - <<: *if-label-target_test
-    - <<: *if-label-weekend_test
    - <<: *if-dev-push
      changes: *patterns-build_components
    - <<: *if-dev-push
@ -919,6 +922,8 @@
      changes: *patterns-downloadable-tools
    - <<: *if-dev-push
      changes: *patterns-target_test-adc
+    - <<: *if-dev-push
+      changes: *patterns-target_test-ecdsa
    - <<: *if-dev-push
      changes: *patterns-target_test-i154
    - <<: *if-dev-push
@ -943,6 +948,8 @@
      changes: *patterns-downloadable-tools
    - <<: *if-dev-push
      changes: *patterns-target_test-adc
+    - <<: *if-dev-push
+      changes: *patterns-target_test-ecdsa
    - <<: *if-dev-push
      changes: *patterns-target_test-i154
    - <<: *if-dev-push
@ -967,6 +974,8 @@
      changes: *patterns-downloadable-tools
    - <<: *if-dev-push
      changes: *patterns-target_test-adc
+    - <<: *if-dev-push
+      changes: *patterns-target_test-ecdsa
    - <<: *if-dev-push
      changes: *patterns-target_test-i154
    - <<: *if-dev-push
@ -991,6 +1000,8 @@
      changes: *patterns-downloadable-tools
    - <<: *if-dev-push
      changes: *patterns-target_test-adc
+    - <<: *if-dev-push
+      changes: *patterns-target_test-ecdsa
    - <<: *if-dev-push
      changes: *patterns-target_test-i154
    - <<: *if-dev-push
@ -1016,29 +1027,7 @@
    - <<: *if-dev-push
      changes: *patterns-target_test-adc
    - <<: *if-dev-push
-      changes: *patterns-target_test-i154
-    - <<: *if-dev-push
-      changes: *patterns-target_test-wifi
-
-.rules:build:custom_test-esp32h4:
-  rules:
-    - <<: *if-revert-branch
-      when: never
-    - <<: *if-protected
-    - <<: *if-label-build
-    - <<: *if-label-custom_test
-    - <<: *if-label-custom_test_esp32h4
-    - <<: *if-label-target_test
-    - <<: *if-dev-push
-      changes: *patterns-build_components
-    - <<: *if-dev-push
-      changes: *patterns-build_system
-    - <<: *if-dev-push
-      changes: *patterns-custom_test
-    - <<: *if-dev-push
-      changes: *patterns-downloadable-tools
-    - <<: *if-dev-push
-      changes: *patterns-target_test-adc
+      changes: *patterns-target_test-ecdsa
    - <<: *if-dev-push
      changes: *patterns-target_test-i154
    - <<: *if-dev-push
@ -1063,6 +1052,8 @@
      changes: *patterns-downloadable-tools
    - <<: *if-dev-push
      changes: *patterns-target_test-adc
+    - <<: *if-dev-push
+      changes: *patterns-target_test-ecdsa
    - <<: *if-dev-push
      changes: *patterns-target_test-i154
    - <<: *if-dev-push
@ -1087,6 +1078,8 @@
      changes: *patterns-downloadable-tools
    - <<: *if-dev-push
      changes: *patterns-target_test-adc
+    - <<: *if-dev-push
+      changes: *patterns-target_test-ecdsa
    - <<: *if-dev-push
      changes: *patterns-target_test-i154
    - <<: *if-dev-push
@ -1121,10 +1114,8 @@
    - <<: *if-label-example_test_esp32c3
    - <<: *if-label-example_test_esp32c6
    - <<: *if-label-example_test_esp32h2
-    - <<: *if-label-example_test_esp32h4
    - <<: *if-label-example_test_esp32s2
    - <<: *if-label-example_test_esp32s3
-    - <<: *if-label-iperf_stress_test
    - <<: *if-label-target_test
    - <<: *if-dev-push
      changes: *patterns-build-example_test
@ -1138,10 +1129,14 @@
      changes: *patterns-example_test
    - <<: *if-dev-push
      changes: *patterns-example_test-bt
+    - <<: *if-dev-push
+      changes: *patterns-example_test-ccs811
    - <<: *if-dev-push
      changes: *patterns-example_test-ethernet
    - <<: *if-dev-push
      changes: *patterns-example_test-i154
+    - <<: *if-dev-push
+      changes: *patterns-example_test-otsleepy
    - <<: *if-dev-push
      changes: *patterns-example_test-sdio
    - <<: *if-dev-push
@ -1150,6 +1145,8 @@
      changes: *patterns-example_test-wifi
    - <<: *if-dev-push
      changes: *patterns-target_test-adc
+    - <<: *if-dev-push
+      changes: *patterns-target_test-ecdsa
    - <<: *if-dev-push
      changes: *patterns-target_test-i154
    - <<: *if-dev-push
@ -1164,7 +1161,6 @@
    - <<: *if-label-build
    - <<: *if-label-example_test
    - <<: *if-label-example_test_esp32
-    - <<: *if-label-iperf_stress_test
    - <<: *if-label-target_test
    - <<: *if-dev-push
      changes: *patterns-build-example_test
@ -1178,6 +1174,8 @@
      changes: *patterns-example_test
    - <<: *if-dev-push
      changes: *patterns-example_test-bt
+    - <<: *if-dev-push
+      changes: *patterns-example_test-ccs811
    - <<: *if-dev-push
      changes: *patterns-example_test-ethernet
    - <<: *if-dev-push
@ -1190,6 +1188,8 @@
      changes: *patterns-example_test-wifi
    - <<: *if-dev-push
      changes: *patterns-target_test-adc
+    - <<: *if-dev-push
+      changes: *patterns-target_test-ecdsa
    - <<: *if-dev-push
      changes: *patterns-target_test-i154
    - <<: *if-dev-push
@ -1216,6 +1216,8 @@
      changes: *patterns-example_test
    - <<: *if-dev-push
      changes: *patterns-example_test-bt
+    - <<: *if-dev-push
+      changes: *patterns-example_test-ccs811
    - <<: *if-dev-push
      changes: *patterns-example_test-ethernet
    - <<: *if-dev-push
@ -1228,6 +1230,8 @@
      changes: *patterns-example_test-wifi
    - <<: *if-dev-push
      changes: *patterns-target_test-adc
+    - <<: *if-dev-push
+      changes: *patterns-target_test-ecdsa
    - <<: *if-dev-push
      changes: *patterns-target_test-i154
    - <<: *if-dev-push
@ -1255,6 +1259,8 @@
      changes: *patterns-example_test
    - <<: *if-dev-push
      changes: *patterns-example_test-bt
+    - <<: *if-dev-push
+      changes: *patterns-example_test-ccs811
    - <<: *if-dev-push
      changes: *patterns-example_test-ethernet
    - <<: *if-dev-push
@ -1267,6 +1273,8 @@
      changes: *patterns-example_test-wifi
    - <<: *if-dev-push
      changes: *patterns-target_test-adc
+    - <<: *if-dev-push
+      changes: *patterns-target_test-ecdsa
    - <<: *if-dev-push
      changes: *patterns-target_test-i154
    - <<: *if-dev-push
@ -1293,10 +1301,14 @@
      changes: *patterns-example_test
    - <<: *if-dev-push
      changes: *patterns-example_test-bt
+    - <<: *if-dev-push
+      changes: *patterns-example_test-ccs811
    - <<: *if-dev-push
      changes: *patterns-example_test-ethernet
    - <<: *if-dev-push
      changes: *patterns-example_test-i154
+    - <<: *if-dev-push
+      changes: *patterns-example_test-otsleepy
    - <<: *if-dev-push
      changes: *patterns-example_test-sdio
    - <<: *if-dev-push
@ -1305,6 +1317,8 @@
      changes: *patterns-example_test-wifi
    - <<: *if-dev-push
      changes: *patterns-target_test-adc
+    - <<: *if-dev-push
+      changes: *patterns-target_test-ecdsa
    - <<: *if-dev-push
      changes: *patterns-target_test-i154
    - <<: *if-dev-push
@ -1331,10 +1345,14 @@
      changes: *patterns-example_test
    - <<: *if-dev-push
      changes: *patterns-example_test-bt
+    - <<: *if-dev-push
+      changes: *patterns-example_test-ccs811
    - <<: *if-dev-push
      changes: *patterns-example_test-ethernet
    - <<: *if-dev-push
      changes: *patterns-example_test-i154
+    - <<: *if-dev-push
+      changes: *patterns-example_test-otsleepy
    - <<: *if-dev-push
      changes: *patterns-example_test-sdio
    - <<: *if-dev-push
@ -1344,43 +1362,7 @@
    - <<: *if-dev-push
      changes: *patterns-target_test-adc
    - <<: *if-dev-push
-      changes: *patterns-target_test-i154
-    - <<: *if-dev-push
-      changes: *patterns-target_test-wifi
-
-.rules:build:example_test-esp32h4:
-  rules:
-    - <<: *if-revert-branch
-      when: never
-    - <<: *if-protected
-    - <<: *if-label-build
-    - <<: *if-label-example_test
-    - <<: *if-label-example_test_esp32h4
-    - <<: *if-label-target_test
-    - <<: *if-dev-push
-      changes: *patterns-build-example_test
-    - <<: *if-dev-push
-      changes: *patterns-build_components
-    - <<: *if-dev-push
-      changes: *patterns-build_system
-    - <<: *if-dev-push
-      changes: *patterns-downloadable-tools
-    - <<: *if-dev-push
-      changes: *patterns-example_test
-    - <<: *if-dev-push
-      changes: *patterns-example_test-bt
-    - <<: *if-dev-push
-      changes: *patterns-example_test-ethernet
-    - <<: *if-dev-push
-      changes: *patterns-example_test-i154
-    - <<: *if-dev-push
-      changes: *patterns-example_test-sdio
-    - <<: *if-dev-push
-      changes: *patterns-example_test-usb
-    - <<: *if-dev-push
-      changes: *patterns-example_test-wifi
-    - <<: *if-dev-push
-      changes: *patterns-target_test-adc
+      changes: *patterns-target_test-ecdsa
    - <<: *if-dev-push
      changes: *patterns-target_test-i154
    - <<: *if-dev-push
@ -1407,6 +1389,8 @@
      changes: *patterns-example_test
    - <<: *if-dev-push
      changes: *patterns-example_test-bt
+    - <<: *if-dev-push
+      changes: *patterns-example_test-ccs811
    - <<: *if-dev-push
      changes: *patterns-example_test-ethernet
    - <<: *if-dev-push
@ -1419,6 +1403,8 @@
      changes: *patterns-example_test-wifi
    - <<: *if-dev-push
      changes: *patterns-target_test-adc
+    - <<: *if-dev-push
+      changes: *patterns-target_test-ecdsa
    - <<: *if-dev-push
      changes: *patterns-target_test-i154
    - <<: *if-dev-push
@ -1445,6 +1431,8 @@
      changes: *patterns-example_test
    - <<: *if-dev-push
      changes: *patterns-example_test-bt
+    - <<: *if-dev-push
+      changes: *patterns-example_test-ccs811
    - <<: *if-dev-push
      changes: *patterns-example_test-ethernet
    - <<: *if-dev-push
@ -1457,32 +1445,13 @@
      changes: *patterns-example_test-wifi
    - <<: *if-dev-push
      changes: *patterns-target_test-adc
+    - <<: *if-dev-push
+      changes: *patterns-target_test-ecdsa
    - <<: *if-dev-push
      changes: *patterns-target_test-i154
    - <<: *if-dev-push
      changes: *patterns-target_test-wifi

-.rules:build:integration_test:
-  rules:
-    - <<: *if-revert-branch
-      when: never
-    - <<: *if-protected
-    - <<: *if-label-build
-    - <<: *if-label-integration_test
-    - <<: *if-label-integration_test_ble
-    - <<: *if-label-integration_test_wifi
-    - <<: *if-label-target_test
-    - <<: *if-dev-push
-      changes: *patterns-build_components
-    - <<: *if-dev-push
-      changes: *patterns-build_system
-    - <<: *if-dev-push
-      changes: *patterns-integration_test-ble
-    - <<: *if-dev-push
-      changes: *patterns-integration_test-wifi
-    - <<: *if-dev-push
-      changes: *patterns-target_test-wifi
-
 .rules:build:macos:
  rules:
    - <<: *if-revert-branch
@ -1509,7 +1478,6 @@
    - <<: *if-label-component_ut_esp32c3
    - <<: *if-label-component_ut_esp32c6
    - <<: *if-label-component_ut_esp32h2
-    - <<: *if-label-component_ut_esp32h4
    - <<: *if-label-component_ut_esp32s2
    - <<: *if-label-component_ut_esp32s3
    - <<: *if-label-custom_test
@ -1518,7 +1486,6 @@
    - <<: *if-label-custom_test_esp32c3
    - <<: *if-label-custom_test_esp32c6
    - <<: *if-label-custom_test_esp32h2
-    - <<: *if-label-custom_test_esp32h4
    - <<: *if-label-custom_test_esp32s2
    - <<: *if-label-custom_test_esp32s3
    - <<: *if-label-example_test
@ -1527,14 +1494,8 @@
    - <<: *if-label-example_test_esp32c3
    - <<: *if-label-example_test_esp32c6
    - <<: *if-label-example_test_esp32h2
-    - <<: *if-label-example_test_esp32h4
    - <<: *if-label-example_test_esp32s2
    - <<: *if-label-example_test_esp32s3
-    - <<: *if-label-integration_test
-    - <<: *if-label-integration_test_ble
-    - <<: *if-label-integration_test_wifi
-    - <<: *if-label-iperf_stress_test
-    - <<: *if-label-lan8720
    - <<: *if-label-target_test
    - <<: *if-label-unit_test
    - <<: *if-label-unit_test_esp32
@ -1542,10 +1503,8 @@
    - <<: *if-label-unit_test_esp32c3
    - <<: *if-label-unit_test_esp32c6
    - <<: *if-label-unit_test_esp32h2
-    - <<: *if-label-unit_test_esp32h4
    - <<: *if-label-unit_test_esp32s2
    - <<: *if-label-unit_test_esp32s3
-    - <<: *if-label-weekend_test
    - <<: *if-dev-push
      changes: *patterns-build-example_test
    - <<: *if-dev-push
@ -1568,22 +1527,24 @@
      changes: *patterns-example_test
    - <<: *if-dev-push
      changes: *patterns-example_test-bt
+    - <<: *if-dev-push
+      changes: *patterns-example_test-ccs811
    - <<: *if-dev-push
      changes: *patterns-example_test-ethernet
    - <<: *if-dev-push
      changes: *patterns-example_test-i154
+    - <<: *if-dev-push
+      changes: *patterns-example_test-otsleepy
    - <<: *if-dev-push
      changes: *patterns-example_test-sdio
    - <<: *if-dev-push
      changes: *patterns-example_test-usb
    - <<: *if-dev-push
      changes: *patterns-example_test-wifi
-    - <<: *if-dev-push
-      changes: *patterns-integration_test-ble
-    - <<: *if-dev-push
-      changes: *patterns-integration_test-wifi
    - <<: *if-dev-push
      changes: *patterns-target_test-adc
+    - <<: *if-dev-push
+      changes: *patterns-target_test-ecdsa
    - <<: *if-dev-push
      changes: *patterns-target_test-i154
    - <<: *if-dev-push
@ -1601,7 +1562,6 @@
      when: never
    - <<: *if-protected
    - <<: *if-label-build
-    - <<: *if-label-lan8720
    - <<: *if-label-target_test
    - <<: *if-label-unit_test
    - <<: *if-label-unit_test_esp32
@ -1609,7 +1569,6 @@
    - <<: *if-label-unit_test_esp32c3
    - <<: *if-label-unit_test_esp32c6
    - <<: *if-label-unit_test_esp32h2
-    - <<: *if-label-unit_test_esp32h4
    - <<: *if-label-unit_test_esp32s2
    - <<: *if-label-unit_test_esp32s3
    - <<: *if-dev-push
@ -1620,6 +1579,8 @@
      changes: *patterns-downloadable-tools
    - <<: *if-dev-push
      changes: *patterns-target_test-adc
+    - <<: *if-dev-push
+      changes: *patterns-target_test-ecdsa
    - <<: *if-dev-push
      changes: *patterns-target_test-i154
    - <<: *if-dev-push
@ -1637,7 +1598,6 @@
      when: never
    - <<: *if-protected
    - <<: *if-label-build
-    - <<: *if-label-lan8720
    - <<: *if-label-target_test
    - <<: *if-label-unit_test
    - <<: *if-label-unit_test_esp32
@ -1649,6 +1609,8 @@
      changes: *patterns-downloadable-tools
    - <<: *if-dev-push
      changes: *patterns-target_test-adc
+    - <<: *if-dev-push
+      changes: *patterns-target_test-ecdsa
    - <<: *if-dev-push
      changes: *patterns-target_test-i154
    - <<: *if-dev-push
@ -1677,6 +1639,8 @@
      changes: *patterns-downloadable-tools
    - <<: *if-dev-push
      changes: *patterns-target_test-adc
+    - <<: *if-dev-push
+      changes: *patterns-target_test-ecdsa
    - <<: *if-dev-push
      changes: *patterns-target_test-i154
    - <<: *if-dev-push
@ -1705,6 +1669,8 @@
      changes: *patterns-downloadable-tools
    - <<: *if-dev-push
      changes: *patterns-target_test-adc
+    - <<: *if-dev-push
+      changes: *patterns-target_test-ecdsa
    - <<: *if-dev-push
      changes: *patterns-target_test-i154
    - <<: *if-dev-push
@ -1733,6 +1699,8 @@
      changes: *patterns-downloadable-tools
    - <<: *if-dev-push
      changes: *patterns-target_test-adc
+    - <<: *if-dev-push
+      changes: *patterns-target_test-ecdsa
    - <<: *if-dev-push
      changes: *patterns-target_test-i154
    - <<: *if-dev-push
@ -1761,6 +1729,8 @@
      changes: *patterns-downloadable-tools
    - <<: *if-dev-push
      changes: *patterns-target_test-adc
+    - <<: *if-dev-push
+      changes: *patterns-target_test-ecdsa
    - <<: *if-dev-push
      changes: *patterns-target_test-i154
    - <<: *if-dev-push
@ -1789,6 +1759,8 @@
      changes: *patterns-downloadable-tools
    - <<: *if-dev-push
      changes: *patterns-target_test-adc
+    - <<: *if-dev-push
+      changes: *patterns-target_test-ecdsa
    - <<: *if-dev-push
      changes: *patterns-target_test-i154
    - <<: *if-dev-push
@ -1817,6 +1789,8 @@
      changes: *patterns-downloadable-tools
    - <<: *if-dev-push
      changes: *patterns-target_test-adc
+    - <<: *if-dev-push
+      changes: *patterns-target_test-ecdsa
    - <<: *if-dev-push
      changes: *patterns-target_test-i154
    - <<: *if-dev-push
@ -1828,13 +1802,6 @@
    - <<: *if-dev-push
      changes: *patterns-unit_test-sdio

-.rules:labels-protected:lan8720:
-  rules:
-    - <<: *if-revert-branch
-      when: never
-    - <<: *if-protected
-    - <<: *if-label-lan8720
-
 .rules:labels:nvs_coverage:
  rules:
    - <<: *if-revert-branch
@ -2085,6 +2052,19 @@
    - <<: *if-dev-push
      changes: *patterns-target_test-adc

+.rules:test:component_ut-esp32h2-ecdsa:
+  rules:
+    - <<: *if-revert-branch
+      when: never
+    - <<: *if-protected
+    - <<: *if-label-build-only
+      when: never
+    - <<: *if-label-component_ut
+    - <<: *if-label-component_ut_esp32h2
+    - <<: *if-label-target_test
+    - <<: *if-dev-push
+      changes: *patterns-target_test-ecdsa
+
 .rules:test:component_ut-esp32s2:
  rules:
    - <<: *if-revert-branch
@ -2338,6 +2318,19 @@
    - <<: *if-dev-push
      changes: *patterns-example_test-bt

+.rules:test:example_test-esp32-ccs811:
+  rules:
+    - <<: *if-revert-branch
+      when: never
+    - <<: *if-protected
+    - <<: *if-label-build-only
+      when: never
+    - <<: *if-label-example_test
+    - <<: *if-label-example_test_esp32
+    - <<: *if-label-target_test
+    - <<: *if-dev-push
+      changes: *patterns-example_test-ccs811
+
 .rules:test:example_test-esp32-ethernet:
  rules:
    - <<: *if-revert-branch
@ -2663,6 +2656,20 @@
    - <<: *if-dev-push
      changes: *patterns-target_test-i154

+.rules:test:example_test-otsleepy:
+  rules:
+    - <<: *if-revert-branch
+      when: never
+    - <<: *if-protected
+    - <<: *if-label-build-only
+      when: never
+    - <<: *if-label-example_test
+    - <<: *if-label-target_test
+    - <<: *if-dev-push
+      changes: *patterns-example_test-otsleepy
+    - <<: *if-dev-push
+      changes: *patterns-target_test-i154
+
 .rules:test:host_test:
  rules:
    - <<: *if-revert-branch
@ -2674,52 +2681,6 @@
    - <<: *if-dev-push
      changes: *patterns-host_test

-.rules:test:integration_test:
-  rules:
-    - <<: *if-revert-branch
-      when: never
-    - <<: *if-protected
-    - <<: *if-label-build-only
-      when: never
-    - <<: *if-label-integration_test
-    - <<: *if-label-integration_test_ble
-    - <<: *if-label-integration_test_wifi
-    - <<: *if-label-target_test
-    - <<: *if-dev-push
-      changes: *patterns-integration_test-ble
-    - <<: *if-dev-push
-      changes: *patterns-integration_test-wifi
-    - <<: *if-dev-push
-      changes: *patterns-target_test-wifi
-
-.rules:test:integration_test_ble:
-  rules:
-    - <<: *if-revert-branch
-      when: never
-    - <<: *if-protected
-    - <<: *if-label-build-only
-      when: never
-    - <<: *if-label-integration_test
-    - <<: *if-label-integration_test_ble
-    - <<: *if-label-target_test
-    - <<: *if-dev-push
-      changes: *patterns-integration_test-ble
-
-.rules:test:integration_test_wifi:
-  rules:
-    - <<: *if-revert-branch
-      when: never
-    - <<: *if-protected
-    - <<: *if-label-build-only
-      when: never
-    - <<: *if-label-integration_test
-    - <<: *if-label-integration_test_wifi
-    - <<: *if-label-target_test
-    - <<: *if-dev-push
-      changes: *patterns-integration_test-wifi
-    - <<: *if-dev-push
-      changes: *patterns-target_test-wifi
-
 .rules:test:submodule:
  rules:
    - <<: *if-revert-branch
--- a/.gitlab/ci/target-test.yml
+++ b/.gitlab/ci/target-test.yml
@ -24,7 +24,7 @@
      junit: XUNIT_RESULT.xml
    expire_in: 1 week
  script:
-    - retry_failed git clone $KNOWN_FAILURE_CASES_REPO known_failure_cases
+    - python tools/ci/get_known_failure_cases_file.py
    # get runner env config file
    - retry_failed git clone $TEST_ENV_CONFIG_REPO
    - python $CHECKOUT_REF_SCRIPT ci-test-runner-configs ci-test-runner-configs
@ -35,7 +35,7 @@
    - run_cmd pytest $TEST_DIR
      -m \"${markers}\"
      --junitxml=XUNIT_RESULT.xml
-      --known-failure-cases-file known_failure_cases/known_failure_cases.txt
+      --known-failure-cases-file ${KNOWN_FAILURE_CASES_FILE_NAME}
      --parallel-count ${CI_NODE_TOTAL:-1}
      --parallel-index ${CI_NODE_INDEX:-1}
      ${PYTEST_EXTRA_FLAGS}
@ -97,6 +97,22 @@ pytest_examples_esp32_jtag:
    SETUP_TOOLS: "1"  # need gdb openocd
    PYTEST_EXTRA_FLAGS: "--log-cli-level DEBUG"

+pytest_examples_esp32_ccs811:
+  extends:
+    - .pytest_examples_dir_template
+    - .rules:test:example_test-esp32-ccs811
+  needs:
+    - build_pytest_examples_esp32
+  tags: [ esp32, ccs811 ]
+
+pytest_examples_esp32_sdio:
+  extends:
+    - .pytest_examples_dir_template
+    - .rules:test:example_test-esp32-sdio
+  needs:
+    - build_pytest_examples_esp32
+  tags: [ esp32, sdio_master_slave ]
+
 pytest_examples_esp32s2_generic:
  extends:
    - .pytest_examples_dir_template
@ -249,6 +265,14 @@ pytest_examples_esp32_ethernet:
    - build_pytest_examples_esp32
  tags: [ esp32, ethernet]

+pytest_examples_esp32_ethernet_httpbin:
+  extends:
+    - .pytest_examples_dir_template
+    - .rules:test:example_test-esp32-ethernet
+  needs:
+    - build_pytest_examples_esp32
+  tags: [ esp32, httpbin]
+
 pytest_examples_esp32_8mb_flash:
  extends:
    - .pytest_examples_dir_template
@ -334,7 +358,7 @@ pytest_examples_esp32_ethernet_ip101:
    - .rules:test:example_test-esp32
  needs:
    - build_pytest_examples_esp32
-  tags: [ esp32, ip101 ]
+  tags: [ esp32, eth_ip101 ]

 pytest_examples_esp32_flash_encryption:
  extends:
@ -488,6 +512,14 @@ pytest_examples_esp32h2_adc:
    - build_pytest_examples_esp32h2
  tags: [ esp32h2, adc ]

+example_test_pytest_esp32s3_emmc:
+  extends:
+    - .pytest_examples_dir_template
+    - .rules:test:example_test-esp32s3
+  needs:
+    - build_pytest_examples_esp32s3
+  tags: [ esp32s3, emmc ]
+
 .pytest_components_dir_template:
  extends: .pytest_template
  variables:
@ -540,15 +572,63 @@ pytest_components_esp32_ip101:
    - .rules:test:component_ut-esp32
  needs:
    - build_pytest_components_esp32
-  tags: [ esp32, ip101 ]
+  tags: [ esp32, eth_ip101 ]

 pytest_components_esp32_lan8720:
  extends:
    - .pytest_components_dir_template
-    - .rules:labels-protected:lan8720  # FIXME: IDFCI-1176
+    - .rules:test:component_ut-esp32
  needs:
    - build_pytest_components_esp32
-  tags: [ esp32, lan8720 ]
+  tags: [ esp32, eth_lan8720 ]
+
+pytest_components_esp32_rtl8201:
+  extends:
+    - .pytest_components_dir_template
+    - .rules:test:component_ut-esp32
+  needs:
+    - build_pytest_components_esp32
+  tags: [ esp32, eth_rtl8201 ]
+
+pytest_components_esp32_w5500:
+  extends:
+    - .pytest_components_dir_template
+    - .rules:test:component_ut-esp32
+  needs:
+    - build_pytest_components_esp32
+  tags: [ esp32, eth_w5500 ]
+
+pytest_components_esp32_ksz8851snl:
+  extends:
+    - .pytest_components_dir_template
+    - .rules:test:component_ut-esp32
+  needs:
+    - build_pytest_components_esp32
+  tags: [ esp32, eth_ksz8851snl ]
+
+pytest_components_esp32_dm9051:
+  extends:
+    - .pytest_components_dir_template
+    - .rules:test:component_ut-esp32
+  needs:
+    - build_pytest_components_esp32
+  tags: [ esp32, eth_dm9051 ]
+
+pytest_components_esp32_ksz8041:
+  extends:
+    - .pytest_components_dir_template
+    - .rules:test:component_ut-esp32
+  needs:
+    - build_pytest_components_esp32
+  tags: [ esp32, eth_ksz8041 ]
+
+pytest_components_esp32_dp83848:
+  extends:
+    - .pytest_components_dir_template
+    - .rules:test:component_ut-esp32
+  needs:
+    - build_pytest_components_esp32
+  tags: [ esp32, eth_dp83848 ]

 pytest_components_esp32_ethernet:
  extends:
@ -884,6 +964,14 @@ pytest_components_esp32h2_adc:
    - build_pytest_components_esp32h2
  tags: [ esp32h2, adc ]

+component_ut_pytest_esp32h2_ecdsa:
+  extends:
+    - .pytest_components_dir_template
+    - .rules:test:component_ut-esp32h2-ecdsa
+  needs:
+    - build_pytest_components_esp32h2
+  tags: [ esp32h2, ecdsa_efuse ]
+
 pytest_components_esp32c6_generic_multi_device:
  extends:
    - .pytest_components_dir_template
@ -920,6 +1008,17 @@ pytest_examples_openthread_br:
    - esp32c6
    - openthread_br

+pytest_examples_openthread_sleep:
+  extends:
+    - .pytest_examples_dir_template
+    - .rules:test:example_test-otsleepy
+  needs:
+    - build_pytest_examples_esp32c6
+    - build_pytest_examples_esp32h2
+  tags:
+    - esp32c6
+    - openthread_sleep
+
 pytest_components_esp32s3_usb_host:
  extends:
    - .pytest_components_dir_template
@ -1061,10 +1160,10 @@ pytest_test_apps_esp32s3_mspi_f4r4:
    - retry_failed git clone $TEST_ENV_CONFIG_REPO
    - python $CHECKOUT_REF_SCRIPT ci-test-runner-configs ci-test-runner-configs
    # git clone the known failure cases repo, run test
-    - retry_failed git clone $KNOWN_FAILURE_CASES_REPO known_failure_cases
+    - python tools/ci/get_known_failure_cases_file.py
    # run test
    - cd tools/ci/python_packages/tiny_test_fw/bin
-    - run_cmd python Runner.py $TEST_CASE_PATH -c $CONFIG_FILE -e $ENV_FILE --known_failure_cases_file $CI_PROJECT_DIR/known_failure_cases/known_failure_cases.txt
+    - run_cmd python Runner.py $TEST_CASE_PATH -c $CONFIG_FILE -e $ENV_FILE --known_failure_cases_file $CI_PROJECT_DIR/${KNOWN_FAILURE_CASES_FILE_NAME}

 .example_test_template:
  extends: .target_test_job_template
@ -1090,12 +1189,6 @@ example_test_001C:
    - ESP32
    - Example_GENERIC

-.example_test_003:
-  extends: .example_test_esp32_template
-  tags:
-    - ESP32
-    - Example_SDIO
-
 example_test_005:
  extends:
    - .example_test_esp32_template
@ -1104,12 +1197,6 @@ example_test_005:
    - ESP32
    - Example_WIFI_BT

-example_test_007:
-  extends: .example_test_esp32_template
-  tags:
-    - ESP32
-    - Example_I2C_CCS811_SENSOR
-
 example_test_C3_GENERIC:
  extends: .example_test_esp32c3_template
  tags:
@ -1203,19 +1290,12 @@ UT_006:
    - UT_T1_SPIMODE
    - psram

-UT_017:
+.UT_017:
  extends: .unit_test_esp32_template
  tags:
    - ESP32_IDF
    - EMMC

-UT_022:
-  extends: .unit_test_esp32_template
-  tags:
-    - ESP32_IDF
-    - UT_T2_I2C
-    - psram
-
 UT_028:
  extends: .unit_test_esp32_template
  tags:
@ -1288,12 +1368,6 @@ UT_C3_FLASH:
    - ESP32C3_IDF
    - UT_T1_ESP_FLASH

-UT_C3_I2C:
-  extends: .unit_test_esp32c3_template
-  tags:
-    - ESP32C3_IDF
-    - UT_T2_I2C
-
 UT_C3_SDSPI:
  extends:
    - .unit_test_esp32c3_template
@ -1337,301 +1411,3 @@ UT_S3_QUAD_PSRAM:
    - ESP32S3_IDF
    - UT_T1_1
    - quad_psram
-
-.integration_test_template:
-  extends:
-    - .target_test_job_template
-    - .rules:test:integration_test
-    - .before_script_minimal
-  image: ${CI_INTEGRATION_TEST_ENV_IMAGE}
-  cache: []
-  needs: # the assign already needs all the build jobs
-    - assign_integration_test
-  variables:
-    LOCAL_ENV_CONFIG_PATH: "$CI_PROJECT_DIR/ci-test-runner-configs/$CI_RUNNER_DESCRIPTION/ESP32_IDF"
-    LOG_PATH: "${CI_PROJECT_DIR}/TEST_LOGS"
-    TEST_CASE_FILE_PATH: "$CI_PROJECT_DIR/auto_test_script/TestCaseFiles"
-    CONFIG_FILE_PATH: "${CI_PROJECT_DIR}/tools/ci/integration_test/test_configs"
-    KNOWN_ISSUE_FILE: "${CI_PROJECT_DIR}/tools/ci/integration_test/KnownIssues"
-    CI_RUNNER_SCRIPT: "${CI_PROJECT_DIR}/auto_test_script/bin/CIRunner.py"
-    PREPARE_TEST_BIN_SCRIPT: "${CI_PROJECT_DIR}/auto_test_script/tools/ci/idf_prepare_test_bins.py"
-    PYTHONPATH: "${CI_PROJECT_DIR}/auto_test_script/packages:${CI_PROJECT_DIR}/tools/ci/python_packages:${PYTHONPATH}"
-    INITIAL_CONDITION_RETRY_COUNT: "1"
-    GIT_LFS_SKIP_SMUDGE: 1
-  script:
-    - *define_config_file_name
-    # first test if config file exists, if not exist, exit 0
-    - test -e $CONFIG_FILE || exit 0
-    # clone local test env configs
-    - add_gitlab_ssh_keys
-    - retry_failed git clone $TEST_ENV_CONFIG_REPO
-    - python $CHECKOUT_REF_SCRIPT ci-test-runner-configs ci-test-runner-configs
-    # clone test bench
-    - retry_failed git clone ${CI_AUTO_TEST_SCRIPT_REPO_URL} auto_test_script
-    - python $CHECKOUT_REF_SCRIPT auto_test_script auto_test_script
-    - cd auto_test_script
-    - ./tools/ci/setup_idfci.sh
-    # Merge known issues
-    - cat ${KNOWN_ISSUE_FILE} >> ${TEST_CASE_FILE_PATH}/KnownIssues
-    # run test
-    - python ${PREPARE_TEST_BIN_SCRIPT} $CONFIG_FILE
-    - python ${CI_RUNNER_SCRIPT} -l "$LOG_PATH/$JOB_FULL_NAME" -c $CONFIG_FILE -e $LOCAL_ENV_CONFIG_PATH -t $TEST_CASE_FILE_PATH
-
-.integration_test_esp32c3_template:
-  extends:
-    - .integration_test_template
-  variables:
-    LOCAL_ENV_CONFIG_PATH: "$CI_PROJECT_DIR/ci-test-runner-configs/$CI_RUNNER_DESCRIPTION/ESP32C3_IDF"
-
-.integration_test_esp32c2_template:
-  extends:
-    - .integration_test_template
-  variables:
-    LOCAL_ENV_CONFIG_PATH: "$CI_PROJECT_DIR/ci-test-runner-configs/$CI_RUNNER_DESCRIPTION/ESP32C2_IDF"
-
-nvs_compatible_test:
-  extends:
-    - .integration_test_template
-    - .rules:test:integration_test
-  artifacts:
-    when: always
-    paths:
-      - $LOG_PATH
-      - nvs_wifi.bin
-    expire_in: 1 mos
-  tags:
-    - ESP32_IDF
-    - NVS_Compatible
-  script:
-    - *define_config_file_name
-    # first test if config file exists, if not exist, exit 0
-    - test -e $CONFIG_FILE || exit 0
-    # clone local test env configs
-    - add_gitlab_ssh_keys
-    - retry_failed git clone $TEST_ENV_CONFIG_REPO
-    - python $CHECKOUT_REF_SCRIPT ci-test-runner-configs ci-test-runner-configs
-    # clone test bench
-    - retry_failed git clone ${CI_AUTO_TEST_SCRIPT_REPO_URL} auto_test_script
-    - python $CHECKOUT_REF_SCRIPT auto_test_script auto_test_script
-    - cd auto_test_script
-    - ./tools/ci/setup_idfci.sh
-    # prepare nvs bins
-    - ./tools/prepare_nvs_bin.sh
-    # run test
-    - python ${PREPARE_TEST_BIN_SCRIPT} $CONFIG_FILE
-    - python ${CI_RUNNER_SCRIPT} -l "$LOG_PATH/$JOB_FULL_NAME" -c $CONFIG_FILE -e $LOCAL_ENV_CONFIG_PATH -t $TEST_CASE_FILE_PATH
-
-IT_T1_Simple:
-  extends:
-    - .integration_test_template
-    - .rules:test:integration_test_wifi
-  parallel: 2
-  tags:
-    - ESP32_IDF
-    - SSC_T1_Simple
-
-IT_T1_WAP:
-  extends:
-    - .integration_test_template
-    - .rules:test:integration_test_wifi
-  tags:
-    - ESP32_IDF
-    - SSC_T1_WAP
-
-IT_T2_Simple:
-  extends:
-    - .integration_test_template
-    - .rules:test:integration_test_wifi
-  parallel: 9
-  tags:
-    - ESP32_IDF
-    - SSC_T2_Simple
-
-IT_T5_BT_Simple:
-  extends:
-    - .integration_test_template
-    - .rules:test:integration_test_ble
-  parallel: 3
-  tags:
-    - ESP32_IDF
-    - SSC_T5_BT_Simple
-
-IT_T2_BT_Simple:
-  extends:
-    - .integration_test_template
-    - .rules:test:integration_test_ble
-  parallel: 6
-  tags:
-    - ESP32_IDF
-    - SSC_T2_BT_Simple
-
-IT_T1_BT_Dongle:
-  extends:
-    - .integration_test_template
-    - .rules:test:integration_test_ble
-  parallel: 2
-  tags:
-    - ESP32_IDF
-    - SSC_T1_BT_Dongle
-
-IT_T1_AP:
-  extends:
-    - .integration_test_template
-    - .rules:test:integration_test_wifi
-  tags:
-    - ESP32_IDF
-    - SSC_T1_AP
-
-IT_T1_AP_E:
-  extends:
-    - .integration_test_template
-    - .rules:test:integration_test_wifi
-  parallel: 5
-  tags:
-    - ESP32_IDF
-    - SSC_T1_AP_E
-
-IT_T1_WNIC_AP:
-  extends:
-    - .integration_test_template
-    - .rules:test:integration_test_wifi
-  tags:
-    - ESP32_IDF
-    - SSC_T1_WNIC_AP
-
-IT_T1_WNIC_AP_E:
-  extends:
-    - .integration_test_template
-    - .rules:test:integration_test_wifi
-  tags:
-    - ESP32_IDF
-    - SSC_T1_WNIC_AP_E
-
-IT_T1_MESH1:
-  extends:
-    - .integration_test_template
-    - .rules:test:integration_test_wifi
-  tags:
-    - ESP32_IDF
-    - SSC_T1_MESH1
-
-IT_T2_MESH1:
-  extends:
-    - .integration_test_template
-    - .rules:test:integration_test_wifi
-  parallel: 2
-  tags:
-    - ESP32_IDF
-    - SSC_T2_MESH1
-
-IT_T3_MESH1:
-  extends:
-    - .integration_test_template
-    - .rules:test:integration_test_wifi
-  tags:
-    - ESP32_IDF
-    - SSC_T3_MESH1
-
-IT_T6_MESH1:
-  extends:
-    - .integration_test_template
-    - .rules:test:integration_test_wifi
-  tags:
-    - ESP32_IDF
-    - SSC_T6_MESH1
-
-IT_T12_MESH1:
-  extends:
-    - .integration_test_template
-    - .rules:test:integration_test_wifi
-  tags:
-    - ESP32_IDF
-    - SSC_T12_MESH1
-
-IT_T50_MESH1:
-  extends:
-    - .integration_test_template
-    - .rules:test:integration_test_wifi
-  allow_failure: true
-  tags:
-    - ESP32_IDF
-    - SSC_T50_MESH1
-
-IT_T1_MESH2:
-  extends:
-    - .integration_test_template
-    - .rules:test:integration_test_wifi
-  tags:
-    - ESP32_IDF
-    - SSC_T1_MESH2
-
-IT_T2_WNIC:
-  extends:
-   - .integration_test_template
-   - .rules:test:integration_test_wifi
-  tags:
-    - ESP32_IDF
-    - SSC_T2_WNIC
-
-IT_T2_AP:
-  extends:
-    - .integration_test_template
-    - .rules:test:integration_test_wifi
-  tags:
-    - ESP32_IDF
-    - SSC_T2_AP
-
-IT_T3_Simple:
-  extends:
-    - .integration_test_template
-    - .rules:test:integration_test_wifi
-  tags:
-    - ESP32_IDF
-    - SSC_T3_Simple
-
-IT_C3_T2_BT_Simple:
-  extends:
-    - .integration_test_esp32c3_template
-    - .rules:test:integration_test_ble
-  parallel: 11
-  tags:
-    - ESP32C3_IDF
-    - SSC_T2_BT_Simple
-
-IT_C3_T5_BT_Simple:
-  extends:
-    - .integration_test_esp32c3_template
-    - .rules:test:integration_test_ble
-  parallel: 5
-  tags:
-    - ESP32C3_IDF
-    - SSC_T5_BT_Simple
-
-IT_C3_T1_BT_Dongle:
-  extends:
-    - .integration_test_esp32c3_template
-    - .rules:test:integration_test_ble
-  image: gitlab.espressif.cn:5050/qa/dockerfiles/integration-test-env-dbg:1
-  parallel: 2
-  tags:
-    - ESP32C3_IDF
-    - SSC_T1_BT_Dongle
-
-IT_C2_T2_BT_Simple:
-  extends:
-    - .integration_test_esp32c2_template
-    - .rules:test:integration_test_ble
-  parallel: 9
-  tags:
-    - ESP32C2_IDF
-    - SSC_T2_BT_Simple
-
-IT_C2_T1_BT_Dongle:
-  extends:
-    - .integration_test_esp32c2_template
-    - .rules:test:integration_test_ble
-  image: gitlab.espressif.cn:5050/qa/dockerfiles/integration-test-env-dbg:1
-  parallel: 2
-  tags:
-    - ESP32C2_IDF
-    - SSC_T1_BT_Dongle
--- a/.gitmodules
+++ b/.gitmodules
@ -2,6 +2,26 @@
 # All the relative URL paths are intended to be GitHub ones
 # For Espressif's public projects please use '../../espressif/proj', not a '../proj'
 #
+# Submodules SBOM information
+# ---------------------------
+# Submodules, which are used directly and not forked into espressif namespace should
+# contain SBOM information here. Other submodules should have the SBOM manifest file
+# included in the root of their project's repository.
+#
+# The sbom-hash entry records the submodule's checkout SHA as presented in git-tree
+# commit object. For example spiffs submodule
+#
+# $ git ls-tree HEAD components/spiffs/spiffs
+# 160000 commit 0dbb3f71c5f6fae3747a9d935372773762baf852	components/spiffs/spiffs
+#
+# The hash can be also obtained with git submodule command
+#
+# $ git submodule status components/spiffs/spiffs
+# 0dbb3f71c5f6fae3747a9d935372773762baf852 components/spiffs/spiffs (0.2-255-g0dbb3f71c5f6)
+#
+# The submodule SHA recorded here has to match with SHA, which is presented in git-tree.
+# This is checked by CI. Also please don't forget to update the submodule version
+# if you are changing the sbom-hash. This is important for SBOM generation.

 [submodule "components/bt/controller/lib_esp32"]
 	path = components/bt/controller/lib_esp32
@ -10,14 +30,31 @@
 [submodule "components/bootloader/subproject/components/micro-ecc/micro-ecc"]
 	path = components/bootloader/subproject/components/micro-ecc/micro-ecc
 	url = ../../kmackay/micro-ecc.git
+	sbom-version = 1.1
+	sbom-cpe = cpe:2.3:a:micro-ecc_project:micro-ecc:{}:*:*:*:*:*:*:*
+	sbom-supplier = Person: Ken MacKay
+	sbom-url = https://github.com/kmackay/micro-ecc
+	sbom-description = A small and fast ECDH and ECDSA implementation for 8-bit, 32-bit, and 64-bit processors
+	sbom-hash = 24c60e243580c7868f4334a1ba3123481fe1aa48

 [submodule "components/spiffs/spiffs"]
 	path = components/spiffs/spiffs
 	url = ../../pellepl/spiffs.git
+	sbom-version = 0.2-255-g0dbb3f71c5f6
+	sbom-supplier = Person: Peter Andersson
+	sbom-url = https://github.com/pellepl/spiffs
+	sbom-description = Wear-leveled SPI flash file system for embedded devices
+	sbom-hash = 0dbb3f71c5f6fae3747a9d935372773762baf852

 [submodule "components/json/cJSON"]
 	path = components/json/cJSON
 	url = ../../DaveGamble/cJSON.git
+	sbom-version = 1.7.17
+	sbom-cpe = cpe:2.3:a:cjson_project:cjson:{}:*:*:*:*:*:*:*
+	sbom-supplier = Person: Dave Gamble
+	sbom-url = https://github.com/DaveGamble/cJSON
+	sbom-description = Ultralightweight JSON parser in ANSI C
+	sbom-hash = 87d8f0961a01bf09bef98ff89bae9fdec42181ee

 [submodule "components/mbedtls/mbedtls"]
 	path = components/mbedtls/mbedtls
@ -34,10 +71,21 @@
 [submodule "components/protobuf-c/protobuf-c"]
 	path = components/protobuf-c/protobuf-c
 	url = ../../protobuf-c/protobuf-c.git
+	sbom-version = 1.4.1
+	sbom-cpe = cpe:2.3:a:protobuf-c_project:protobuf-c:{}:*:*:*:*:*:*:*
+	sbom-supplier = Organization: protobuf-c community <https://groups.google.com/g/protobuf-c>
+	sbom-url = https://github.com/protobuf-c/protobuf-c
+	sbom-description = Protocol Buffers implementation in C
+	sbom-hash = abc67a11c6db271bedbb9f58be85d6f4e2ea8389

 [submodule "components/unity/unity"]
 	path = components/unity/unity
 	url = ../../ThrowTheSwitch/Unity.git
+	sbom-version = v2.4.3-51-g7d2bf62b7e6a
+	sbom-supplier = Organization: ThrowTheSwitch community <http://www.throwtheswitch.org>
+	sbom-url = https://github.com/ThrowTheSwitch/Unity
+	sbom-description = Simple Unit Testing for C
+	sbom-hash = 7d2bf62b7e6afaf38153041a9d53c21aeeca9a25

 [submodule "components/bt/host/nimble/nimble"]
 	path = components/bt/host/nimble/nimble
@ -50,6 +98,11 @@
 [submodule "components/cmock/CMock"]
 	path = components/cmock/CMock
 	url = ../../ThrowTheSwitch/CMock.git
+	sbom-version = v2.5.2-2-geeecc49ce8af
+	sbom-supplier = Organization: ThrowTheSwitch community <http://www.throwtheswitch.org>
+	sbom-url = https://github.com/ThrowTheSwitch/CMock
+	sbom-description = CMock - Mock/stub generator for C
+	sbom-hash = eeecc49ce8af123cf8ad40efdb9673e37b56230f

 [submodule "components/openthread/openthread"]
 	path = components/openthread/openthread
@ -67,10 +120,6 @@
 	path = components/openthread/lib
 	url = ../../espressif/esp-thread-lib.git

-[submodule "components/ieee802154/lib"]
-	path = components/ieee802154/lib
-	url = ../../espressif/esp-ieee802154-lib.git
-
 [submodule "components/bt/controller/lib_esp32h2/esp32h2-bt-lib"]
 	path = components/bt/controller/lib_esp32h2/esp32h2-bt-lib
 	url = ../../espressif/esp32h2-bt-lib.git
--- a/.pre-commit-config.yaml
+++ b/.pre-commit-config.yaml
@ -1,9 +1,11 @@
 # See https://pre-commit.com for more information
 # See https://pre-commit.com/hooks.html for more hooks

+default_stages: [commit]
+
 repos:
  - repo: https://github.com/pre-commit/pre-commit-hooks
-    rev: v4.0.1
+    rev: v4.5.0
    hooks:
      - id: trailing-whitespace
        # note: whitespace exclusions use multiline regex, see https://pre-commit.com/#regular-expressions
@ -33,11 +35,12 @@ repos:
    hooks:
      - id: flake8
        args: ['--config=.flake8', '--tee', '--benchmark']
-  - repo: https://github.com/pycqa/isort
-    rev: 5.11.5  # python 3.7 compatible
+  - repo: https://github.com/asottile/reorder-python-imports
+    rev: v3.12.0
    hooks:
-      - id: isort
-        name: isort (python)
+      - id: reorder-python-imports
+        name: Reorder Python imports
+        args: [--py37-plus]
        exclude: >
          (?x)^(
              .*_pb2.py
@ -139,10 +142,11 @@ repos:
        name: Check if all apps readme files match given .build-test-rules.yml files. Modify the supported target tables
        entry: tools/ci/check_build_test_rules.py check-readmes
        language: python
-        files: 'tools/test_apps/.+|examples/.+|components/.+'
+        files: 'tools/test_apps/.+|examples/.+|components/.+|tools/idf_py_actions/constants.py|tools/ci/check_build_test_rules.py'
+        require_serial: true
        additional_dependencies:
          - PyYAML == 5.3.1
-          - idf_build_apps
+          - idf_build_apps~=1.0
      - id: sort-build-test-rules-ymls
        name: sort .build-test-rules.yml files
        entry: tools/ci/check_build_test_rules.py sort-yaml
@ -157,7 +161,12 @@ repos:
      - id: file-contents-sorter
        files: 'tools\/ci\/(executable-list\.txt|mypy_ignore_list\.txt|check_copyright_ignore\.txt)'
  - repo: https://github.com/espressif/check-copyright/
-    rev: v1.0.1
+    rev: v1.0.3
    hooks:
      - id: check-copyright
        args: ['--ignore', 'tools/ci/check_copyright_ignore.txt', '--config', 'tools/ci/check_copyright_config.yaml']
+  - repo: https://github.com/espressif/esp-idf-sbom.git
+    rev: v0.13.0
+    hooks:
+      - id: validate-sbom-manifest
+        stages: [post-commit]
--- a/24
+++ b/24
@ -66,28 +66,6 @@ mainmenu "Espressif IoT Development Framework Configuration"
        select FREERTOS_UNICORE
        select IDF_TARGET_ARCH_RISCV

-    config IDF_TARGET_ESP32H4
-        bool
-        default "y" if IDF_TARGET="esp32h4"
-        select FREERTOS_UNICORE
-        select IDF_TARGET_ARCH_RISCV
-
-    choice IDF_TARGET_ESP32H4_BETA_VERSION
-        prompt "ESP32-H4 beta version"
-        depends on IDF_TARGET_ESP32H4
-        default IDF_TARGET_ESP32H4_BETA_VERSION_2
-        help
-            Currently ESP32-H4 has several beta versions for internal use only.
-            Select the one that matches your chip model.
-
-        config IDF_TARGET_ESP32H4_BETA_VERSION_1
-            bool
-            prompt "ESP32-H4 beta1"
-        config IDF_TARGET_ESP32H4_BETA_VERSION_2
-            bool
-            prompt "ESP32-H4 beta2"
-    endchoice
-
    config IDF_TARGET_ESP32C2
        bool
        default "y" if IDF_TARGET="esp32c2"
@ -116,10 +94,8 @@ mainmenu "Espressif IoT Development Framework Configuration"
        default 0x0002 if IDF_TARGET_ESP32S2
        default 0x0005 if IDF_TARGET_ESP32C3
        default 0x0009 if IDF_TARGET_ESP32S3
-        default 0x000A if IDF_TARGET_ESP32H4_BETA_VERSION_1
        default 0x000C if IDF_TARGET_ESP32C2
        default 0x000D if IDF_TARGET_ESP32C6
-        default 0x000E if IDF_TARGET_ESP32H4_BETA_VERSION_2 # ESP32-TODO: IDF-3475
        default 0x0010 if IDF_TARGET_ESP32H2
        default 0xFFFF

--- a/components/app_trace/Kconfig
+++ b/components/app_trace/Kconfig
@ -389,4 +389,11 @@ menu "Application Level Tracing"
        help
            Enables support for GCOV data transfer to host.

+    config APPTRACE_GCOV_DUMP_TASK_STACK_SIZE
+        int "Gcov dump task stack size"
+        depends on APPTRACE_GCOV_ENABLE
+        default 2048
+        help
+            Configures stack size of Gcov dump task
+
 endmenu
--- a/components/app_trace/gcov/gcov_rtio.c
+++ b/components/app_trace/gcov/gcov_rtio.c
@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2017-2024 Espressif Systems (Shanghai) CO LTD
 *
 * SPDX-License-Identifier: Apache-2.0
 */
@ -76,7 +76,8 @@ gcov_exit:
 void gcov_create_task(void *arg)
 {
    ESP_EARLY_LOGV(TAG, "%s", __FUNCTION__);
-    xTaskCreatePinnedToCore(&gcov_dump_task, "gcov_dump_task", 2048, (void *)&s_gcov_task_running, configMAX_PRIORITIES - 1, NULL, 0);
+    xTaskCreatePinnedToCore(&gcov_dump_task, "gcov_dump_task", CONFIG_APPTRACE_GCOV_DUMP_TASK_STACK_SIZE,
+		(void *)&s_gcov_task_running, configMAX_PRIORITIES - 1, NULL, 0);
 }

 void gcov_create_task_tick_hook(void)
@ -105,12 +106,16 @@ static int esp_dbg_stub_gcov_entry(void)

 void gcov_rtio_init(void)
 {
-    uint32_t capabilities = 0;
+    uint32_t stub_entry = 0;
    ESP_EARLY_LOGV(TAG, "%s", __FUNCTION__);
-    esp_dbg_stub_entry_set(ESP_DBG_STUB_ENTRY_GCOV, (uint32_t)&esp_dbg_stub_gcov_entry);
-    if (esp_dbg_stub_entry_get(ESP_DBG_STUB_ENTRY_CAPABILITIES, &capabilities) == ESP_OK) {
-        esp_dbg_stub_entry_set(ESP_DBG_STUB_ENTRY_CAPABILITIES, capabilities | ESP_DBG_STUB_CAP_GCOV_TASK);
+    assert(esp_dbg_stub_entry_get(ESP_DBG_STUB_ENTRY_GCOV, &stub_entry) == ESP_OK);
+    if (stub_entry != 0) {
+        /* "__gcov_init()" can be called several times. We must avoid multiple tick hook registration */
+        return;
    }
+    esp_dbg_stub_entry_set(ESP_DBG_STUB_ENTRY_GCOV, (uint32_t)&esp_dbg_stub_gcov_entry);
+    assert(esp_dbg_stub_entry_get(ESP_DBG_STUB_ENTRY_CAPABILITIES, &stub_entry) == ESP_OK);
+    esp_dbg_stub_entry_set(ESP_DBG_STUB_ENTRY_CAPABILITIES, stub_entry | ESP_DBG_STUB_CAP_GCOV_TASK);
    esp_register_freertos_tick_hook(gcov_create_task_tick_hook);
 }

--- a/components/app_trace/heap_trace_tohost.c
+++ b/components/app_trace/heap_trace_tohost.c
@ -8,7 +8,7 @@
 #define HEAP_TRACE_SRCFILE /* don't warn on inclusion here */
 #include "esp_heap_trace.h"
 #undef HEAP_TRACE_SRCFILE
-
+#include "esp_heap_caps.h"
 #if CONFIG_APPTRACE_SV_ENABLE
 #include "esp_app_trace.h"
 #include "esp_sysview_trace.h"
@ -85,7 +85,7 @@ void heap_trace_dump_caps(__attribute__((unused)) const uint32_t caps)
 }

 /* Add a new allocation to the heap trace records */
-static IRAM_ATTR void record_allocation(const heap_trace_record_t *record)
+static HEAP_IRAM_ATTR void record_allocation(const heap_trace_record_t *record)
 {
    if (!s_tracing) {
        return;
@ -100,7 +100,7 @@ static IRAM_ATTR void record_allocation(const heap_trace_record_t *record)
   For HEAP_TRACE_ALL, this means filling in the freed_by pointer.
   For HEAP_TRACE_LEAKS, this means removing the record from the log.
 */
-static IRAM_ATTR void record_free(void *p, void **callers)
+static HEAP_IRAM_ATTR void record_free(void *p, void **callers)
 {
    if (!s_tracing) {
        return;
--- a/components/app_trace/host_file_io.c
+++ b/components/app_trace/host_file_io.c
@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2017-2023 Espressif Systems (Shanghai) CO LTD
 *
 * SPDX-License-Identifier: Apache-2.0
 */
@ -228,8 +228,11 @@ size_t esp_apptrace_fwrite(esp_apptrace_dest_t dest, const void *ptr, size_t siz
        ESP_EARLY_LOGE(TAG, "Failed to read response (%d)!", ret);
        return 0;
    }
-
-    return resp/size; // return the number of items written
+    /* OpenOCD writes it like that:
+     *      fwrite(buf, size, 1, file);
+     * So, if 1 was returned that means fwrite succeed
+     */
+    return resp == 1 ? nmemb : 0;
 }

 static void esp_apptrace_fread_args_prepare(uint8_t *buf, void *priv)
@ -275,6 +278,10 @@ size_t esp_apptrace_fread(esp_apptrace_dest_t dest, void *ptr, size_t size, size
        ESP_EARLY_LOGE(TAG, "Failed to read file data (%d)!", ret);
        return 0;
    }
+    /* OpenOCD reads it like that:
+     *      fread(buf, 1 ,size, file);
+     * So, total read bytes count returns
+     */
    return resp/size; // return the number of items read
 }

--- a/components/app_trace/sys_view/esp/SEGGER_RTT_esp.c
+++ b/components/app_trace/sys_view/esp/SEGGER_RTT_esp.c
@ -167,8 +167,8 @@ unsigned SEGGER_RTT_WriteSkipNoLock(unsigned BufferIndex, const void* pBuffer, u
      (event_id == SYSVIEW_EVTID_TASK_STOP_EXEC) ||
      (event_id == SYSVIEW_EVTID_TASK_START_READY) ||
      (event_id == SYSVIEW_EVTID_TASK_STOP_READY) ||
-      (event_id == SYSVIEW_EVTID_USER_START) ||
-      (event_id == SYSVIEW_EVTID_USER_STOP) ||
+      (event_id == SYSVIEW_EVTID_MARK_START) ||
+      (event_id == SYSVIEW_EVTID_MARK_STOP) ||
      (event_id == SYSVIEW_EVTID_TIMER_ENTER) ||
      (event_id == SYSVIEW_EVTID_TIMER_EXIT) ||
      (event_id == SYSVIEW_EVTID_STACK_INFO) ||
--- a/components/app_update/esp_ota_ops.c
+++ b/components/app_update/esp_ota_ops.c
@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
 *
 * SPDX-License-Identifier: Apache-2.0
 */
@ -37,8 +37,6 @@
 #include "esp32c3/rom/secure_boot.h"
 #elif CONFIG_IDF_TARGET_ESP32S3
 #include "esp32s3/rom/secure_boot.h"
-#elif CONFIG_IDF_TARGET_ESP32H4
-#include "esp32h4/rom/secure_boot.h"
 #elif CONFIG_IDF_TARGET_ESP32C2
 #include "esp32c2/rom/secure_boot.h"
 #elif CONFIG_IDF_TARGET_ESP32C6
@ -197,13 +195,18 @@ esp_err_t esp_ota_write(esp_ota_handle_t handle, const void *data, size_t size)
        return ESP_ERR_INVALID_ARG;
    }

+    if (size == 0) {
+        ESP_LOGD(TAG, "write data size is 0");
+        return ESP_OK;
+    }
+
    // find ota handle in linked list
    for (it = LIST_FIRST(&s_ota_ops_entries_head); it != NULL; it = LIST_NEXT(it, entries)) {
        if (it->handle == handle) {
            if (it->need_erase) {
                // must erase the partition before writing to it
-                uint32_t first_sector = it->wrote_size / SPI_FLASH_SEC_SIZE;
-                uint32_t last_sector = (it->wrote_size + size) / SPI_FLASH_SEC_SIZE;
+                uint32_t first_sector = it->wrote_size / SPI_FLASH_SEC_SIZE; // first affected sector
+                uint32_t last_sector = (it->wrote_size + size - 1) / SPI_FLASH_SEC_SIZE; // last affected sector

                ret = ESP_OK;
                if ((it->wrote_size % SPI_FLASH_SEC_SIZE) == 0) {
@ -898,9 +901,27 @@ esp_err_t esp_ota_erase_last_boot_app_partition(void)
    return ESP_OK;
 }

-#if SOC_EFUSE_SECURE_BOOT_KEY_DIGESTS > 1 && CONFIG_SECURE_BOOT_V2_ENABLED
-esp_err_t esp_ota_revoke_secure_boot_public_key(esp_ota_secure_boot_public_key_index_t index) {
+#if SOC_SUPPORT_SECURE_BOOT_REVOKE_KEY && CONFIG_SECURE_BOOT_V2_ENABLED

+// Validates the image at "app_pos" with the secure boot digests other than "revoked_key_index"
+static bool validate_img(esp_ota_secure_boot_public_key_index_t revoked_key_index, esp_partition_pos_t *app_pos)
+{
+    bool verified = false;
+    for (int i = 0; i < SOC_EFUSE_SECURE_BOOT_KEY_DIGESTS; i++) {
+        if (i == revoked_key_index) {
+            continue;
+        }
+        if (esp_secure_boot_verify_with_efuse_digest_index(i, app_pos) == ESP_OK) {
+            verified = true;
+            ESP_LOGI(TAG, "Application successfully verified with public key digest %d", i);
+            break;
+        }
+    }
+    return verified;
+}
+
+esp_err_t esp_ota_revoke_secure_boot_public_key(esp_ota_secure_boot_public_key_index_t index)
+{
    if (!esp_secure_boot_enabled()) {
        ESP_LOGE(TAG, "Secure boot v2 has not been enabled.");
        return ESP_FAIL;
@ -913,14 +934,21 @@ esp_err_t esp_ota_revoke_secure_boot_public_key(esp_ota_secure_boot_public_key_i
        return ESP_ERR_INVALID_ARG;
    }

-    esp_image_sig_public_key_digests_t app_digests = { 0 };
-    esp_err_t err = esp_secure_boot_get_signature_blocks_for_running_app(true, &app_digests);
-    if (err != ESP_OK || app_digests.num_digests == 0) {
-        ESP_LOGE(TAG, "This app is not signed, but check signature on update is enabled in config. It won't be possible to verify any update.");
+    const esp_partition_t *running_app_part = esp_ota_get_running_partition();
+    esp_err_t ret = ESP_FAIL;
+#ifdef CONFIG_BOOTLOADER_APP_ROLLBACK_ENABLE
+    esp_ota_img_states_t running_app_state;
+    ret = esp_ota_get_state_partition(running_app_part, &running_app_state);
+    if (ret != ESP_OK) {
+        ESP_LOGE(TAG, "esp_ota_get_state_partition returned: %s", esp_err_to_name(ret));
        return ESP_FAIL;
    }
+    if (running_app_state != ESP_OTA_IMG_VALID) {
+        ESP_LOGE(TAG, "The current running application is not marked as a valid image. Aborting..");
+        return ESP_FAIL;
+    }
+#endif

-    esp_err_t ret;
    esp_secure_boot_key_digests_t trusted_keys;
    ret = esp_secure_boot_read_key_digests(&trusted_keys);
    if (ret != ESP_OK) {
@ -929,55 +957,38 @@ esp_err_t esp_ota_revoke_secure_boot_public_key(esp_ota_secure_boot_public_key_i
    }

    if (trusted_keys.key_digests[index] == NULL) {
-        ESP_LOGI(TAG, "Trusted Key block(%d) already revoked.", index);
+        ESP_LOGI(TAG, "Given public key digest(%d) is already revoked.", index);
        return ESP_OK;
    }

-    esp_image_sig_public_key_digests_t trusted_digests = { 0 };
-    for (unsigned i = 0; i < SECURE_BOOT_NUM_BLOCKS; i++) {
-        if (i == index) {
-            continue; // omitting - to find if there is a valid key after revoking this digest
-        }
+    /* Check if the application can be verified with a key other than the one being revoked */
+    esp_partition_pos_t running_app_pos = {
+        .offset = running_app_part->address,
+        .size   = running_app_part->size,
+    };

-        if (trusted_keys.key_digests[i] != NULL) {
-            bool all_zeroes = true;
-            for (unsigned j = 0; j < ESP_SECURE_BOOT_DIGEST_LEN; j++) {
-                all_zeroes = all_zeroes && (*(uint8_t *)(trusted_keys.key_digests[i] + j) == 0);
-            }
-            if (!all_zeroes) {
-                memcpy(trusted_digests.key_digests[trusted_digests.num_digests++], (uint8_t *)trusted_keys.key_digests[i], ESP_SECURE_BOOT_DIGEST_LEN);
-            } else {
-                ESP_LOGD(TAG, "Empty trusted key block (%d).", i);
-            }
-        }
-    }
-
-    bool match = false;
-    for (unsigned i = 0; i < trusted_digests.num_digests; i++) {
-        if (match == true) {
-            break;
-        }
-
-        for (unsigned j = 0; j < app_digests.num_digests; j++) {
-            if (memcmp(trusted_digests.key_digests[i], app_digests.key_digests[j], ESP_SECURE_BOOT_DIGEST_LEN) == 0) {
-                ESP_LOGI(TAG, "App key block(%d) matches Trusted key block(%d)[%d -> Next active trusted key block].", j, i, i);
-                esp_err_t err = esp_efuse_set_digest_revoke(index);
-                if (err != ESP_OK) {
-                    ESP_LOGE(TAG, "Failed to revoke digest (0x%x).", err);
-                    return ESP_FAIL;
-                }
-                ESP_LOGI(TAG, "Revoked signature block %d.", index);
-                match = true;
-                break;
-            }
-        }
-    }
-
-    if (match == false) {
-        ESP_LOGE(TAG, "Running app doesn't have another valid secure boot key. Cannot revoke current key(%d).", index);
+    if (!validate_img(index, &running_app_pos)) {
+        ESP_LOGE(TAG, "Application cannot be verified with any key other than the one being revoked");
        return ESP_FAIL;
    }

+    /* Check if bootloder can be verified with any key other than the one being revoked */
+    esp_partition_pos_t bootloader_pos = {
+        .offset = ESP_BOOTLOADER_OFFSET,
+        .size   = (ESP_PARTITION_TABLE_OFFSET - ESP_BOOTLOADER_OFFSET),
+    };
+
+    if (!validate_img(index, &bootloader_pos)) {
+        ESP_LOGE(TAG, "Bootloader cannot be verified with any key other than the one being revoked");
+        return ESP_FAIL;
+    }
+
+    esp_err_t err = esp_efuse_set_digest_revoke(index);
+    if (err != ESP_OK) {
+        ESP_LOGE(TAG, "Failed to revoke digest (0x%x).", err);
+        return ESP_FAIL;
+    }
+    ESP_LOGI(TAG, "Revoked signature block %d.", index);
    return ESP_OK;
 }
 #endif
--- a/components/app_update/include/esp_ota_ops.h
+++ b/components/app_update/include/esp_ota_ops.h
@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
 *
 * SPDX-License-Identifier: Apache-2.0
 */
@ -110,7 +110,7 @@ esp_err_t esp_ota_begin(const esp_partition_t* partition, size_t image_size, esp
 * @param size    Size of data buffer in bytes.
 *
 * @return
- *    - ESP_OK: Data was written to flash successfully.
+ *    - ESP_OK: Data was written to flash successfully, or size = 0
 *    - ESP_ERR_INVALID_ARG: handle is invalid.
 *    - ESP_ERR_OTA_VALIDATE_FAILED: First byte of image contains invalid app image magic byte.
 *    - ESP_ERR_FLASH_OP_TIMEOUT or ESP_ERR_FLASH_OP_FAIL: Flash write failed.
@ -332,10 +332,10 @@ typedef enum {
 } esp_ota_secure_boot_public_key_index_t;

 /**
- * @brief Revokes the old signature digest. To be called in the application after the rollback logic.
+ * @brief Revokes the signature digest denoted by the given index. This should be called in the application only after the rollback logic otherwise the device may end up in unrecoverable state.
 *
- * Relevant for Secure boot v2 on ESP32-S2, ESP32-S3, ESP32-C3, ESP32-H4 where upto 3 key digests can be stored (Key \#N-1, Key \#N, Key \#N+1).
- * When key \#N-1 used to sign an app is invalidated, an OTA update is to be sent with an app signed with key \#N-1 & Key \#N.
+ * Relevant for Secure boot v2 on ESP32-S2, ESP32-S3, ESP32-C3, ESP32-C6, ESP32-H2 where up to 3 key digests can be stored (Key \#N-1, Key \#N, Key \#N+1).
+ * When a key used to sign an app is invalidated, an OTA update is to be sent with an app signed with at least one of the other two keys which has not been revoked already.
 * After successfully booting the OTA app should call this function to revoke Key \#N-1.
 *
 * @param index - The index of the signature block to be revoked
--- a/components/bootloader/Kconfig.projbuild
+++ b/components/bootloader/Kconfig.projbuild
@ -62,34 +62,66 @@ menu "Bootloader config"
        default 4 if BOOTLOADER_LOG_LEVEL_DEBUG
        default 5 if BOOTLOADER_LOG_LEVEL_VERBOSE

-    config BOOTLOADER_SPI_CUSTOM_WP_PIN
-        bool "Use custom SPI Flash WP Pin when flash pins set in eFuse (read help)"
-        depends on IDF_TARGET_ESP32 && (ESPTOOLPY_FLASHMODE_QIO || ESPTOOLPY_FLASHMODE_QOUT)
-        default y if BOOTLOADER_SPI_WP_PIN != 7  # backwards compatibility, can remove in IDF 5
-        default n
-        help
-            This setting is only used if the SPI flash pins have been overridden by setting the eFuses
-            SPI_PAD_CONFIG_xxx, and the SPI flash mode is QIO or QOUT.
+    menu "Serial Flash Configurations"
+        config BOOTLOADER_SPI_CUSTOM_WP_PIN
+            bool "Use custom SPI Flash WP Pin when flash pins set in eFuse (read help)"
+            depends on IDF_TARGET_ESP32 && (ESPTOOLPY_FLASHMODE_QIO || ESPTOOLPY_FLASHMODE_QOUT)
+            default y if BOOTLOADER_SPI_WP_PIN != 7  # backwards compatibility, can remove in IDF 5
+            default n
+            help
+                This setting is only used if the SPI flash pins have been overridden by setting the eFuses
+                SPI_PAD_CONFIG_xxx, and the SPI flash mode is QIO or QOUT.

-            When this is the case, the eFuse config only defines 3 of the 4 Quad I/O data pins. The WP pin (aka
-            ESP32 pin "SD_DATA_3" or SPI flash pin "IO2") is not specified in eFuse. The same pin is also used
-            for external SPIRAM if it is enabled.
+                When this is the case, the eFuse config only defines 3 of the 4 Quad I/O data pins. The WP pin (aka
+                ESP32 pin "SD_DATA_3" or SPI flash pin "IO2") is not specified in eFuse. The same pin is also used
+                for external SPIRAM if it is enabled.

-            If this config item is set to N (default), the correct WP pin will be automatically used for any
-            Espressif chip or module with integrated flash. If a custom setting is needed, set this config item to
-            Y and specify the GPIO number connected to the WP.
+                If this config item is set to N (default), the correct WP pin will be automatically used for any
+                Espressif chip or module with integrated flash. If a custom setting is needed, set this config item to
+                Y and specify the GPIO number connected to the WP.

-    config BOOTLOADER_SPI_WP_PIN
-        int "Custom SPI Flash WP Pin"
-        range 0 33
-        default 7
-        depends on IDF_TARGET_ESP32 && (ESPTOOLPY_FLASHMODE_QIO || ESPTOOLPY_FLASHMODE_QOUT)
-        #depends on BOOTLOADER_SPI_CUSTOM_WP_PIN  # backwards compatibility, can uncomment in IDF 5
-        help
-            The option "Use custom SPI Flash WP Pin" must be set or this value is ignored
+        config BOOTLOADER_SPI_WP_PIN
+            int "Custom SPI Flash WP Pin"
+            range 0 33
+            default 7
+            depends on IDF_TARGET_ESP32 && (ESPTOOLPY_FLASHMODE_QIO || ESPTOOLPY_FLASHMODE_QOUT)
+            #depends on BOOTLOADER_SPI_CUSTOM_WP_PIN  # backwards compatibility, can uncomment in IDF 5
+            help
+                The option "Use custom SPI Flash WP Pin" must be set or this value is ignored

-            If burning a customized set of SPI flash pins in eFuse and using QIO or QOUT mode for flash, set this
-            value to the GPIO number of the SPI flash WP pin.
+                If burning a customized set of SPI flash pins in eFuse and using QIO or QOUT mode for flash, set this
+                value to the GPIO number of the SPI flash WP pin.
+
+        config BOOTLOADER_FLASH_DC_AWARE
+            bool "Allow app adjust Dummy Cycle bits in SPI Flash for higher frequency (READ HELP FIRST)"
+            help
+                This will force 2nd bootloader to be loaded by DOUT mode, and will restore Dummy Cycle setting by
+                resetting the Flash
+
+        config BOOTLOADER_FLASH_XMC_SUPPORT
+            bool "Enable the support for flash chips of XMC (READ DOCS FIRST)"
+            default y
+            help
+                Perform the startup flow recommended by XMC. Please consult XMC for the details of this flow.
+                XMC chips will be forbidden to be used, when this option is disabled.
+
+                DON'T DISABLE THIS UNLESS YOU KNOW WHAT YOU ARE DOING.
+
+                comment "Features below require specific hardware (READ DOCS FIRST!)"
+
+        config BOOTLOADER_FLASH_32BIT_ADDR
+            bool
+            default y if ESPTOOLPY_FLASHSIZE_32MB || ESPTOOLPY_FLASHSIZE_64MB || ESPTOOLPY_FLASHSIZE_128MB
+            default n
+            help
+                This is a helper config for 32bits address flash. Invisible for users.
+
+        config BOOTLOADER_CACHE_32BIT_ADDR_OCTAL_FLASH
+            bool
+            default y if ESPTOOLPY_OCT_FLASH && BOOTLOADER_FLASH_32BIT_ADDR
+            default n
+
+    endmenu

    choice BOOTLOADER_VDDSDIO_BOOST
        bool "VDDSDIO LDO voltage"
@ -405,6 +437,21 @@ menu "Bootloader config"
            (The application and bootoloader must be compiled with the same option).
            The RTC FAST memory has access only through PRO_CPU.

+    config BOOTLOADER_CUSTOM_RESERVE_RTC_IN_CRC
+        bool "Include custom memory in the CRC calculation"
+        depends on BOOTLOADER_CUSTOM_RESERVE_RTC
+        default n
+        help
+            This option allows the customer to use the legacy bootloader behavior when the
+            RTC FAST memory CRC calculation takes place. When this option is enabled, the
+            allocated user custom data will be taken into account in the CRC calculcation.
+            This means that any change to the custom data would need a CRC update to prevent
+            the bootloader from marking this data as corrupted.
+            If this option is disabled, the custom data will not be taken into account when
+            calculating the RTC FAST memory CRC. The user custom data can be changed freely,
+            without the need to update the CRC.
+            THIS OPTION MUST BE THE SAME FOR BOTH THE BOOTLOADER AND THE APPLICATION BUILDS.
+
    config BOOTLOADER_CUSTOM_RESERVE_RTC_SIZE
        hex "Size in bytes for custom purposes"
        default 0
@ -424,15 +471,6 @@ menu "Bootloader config"
            - "Reserve RTC FAST memory for custom purposes"
            - "GPIO triggers factory reset"

-    config BOOTLOADER_FLASH_XMC_SUPPORT
-        bool "Enable the support for flash chips of XMC (READ HELP FIRST)"
-        default y
-        help
-            Perform the startup flow recommended by XMC. Please consult XMC for the details of this flow.
-            XMC chips will be forbidden to be used, when this option is disabled.
-
-            DON'T DISABLE THIS UNLESS YOU KNOW WHAT YOU ARE DOING.
-
 endmenu  # Bootloader


@ -704,14 +742,12 @@ menu "Security features"

    config SECURE_BOOT_VERIFICATION_KEY
        string "Secure boot public signature verification key"
-        depends on SECURE_SIGNED_APPS && !SECURE_BOOT_BUILD_SIGNED_BINARIES && !SECURE_SIGNED_APPS_RSA_SCHEME
+        depends on SECURE_SIGNED_APPS && SECURE_SIGNED_APPS_ECDSA_SCHEME && !SECURE_BOOT_BUILD_SIGNED_BINARIES
        default "signature_verification_key.bin"
        help
            Path to a public key file used to verify signed images.
            Secure Boot V1: This ECDSA public key is compiled into the bootloader and/or
            app, to verify app images.
-            Secure Boot V2: This RSA public key is compiled into the signature block at
-            the end of the bootloader/app.

            Key file is in raw binary format, and can be extracted from a
            PEM formatted private key using the espsecure.py
@ -1009,6 +1045,22 @@ menu "Security features"
                DIS_DOWNLOAD_MANUAL_ENCRYPT, DIS_USB_JTAG, DIS_USB_SERIAL_JTAG, STRAP_JTAG_SEL, USB_PHY_SEL.
    endmenu  # Potentially Insecure

+    config SECURE_FLASH_ENCRYPT_ONLY_IMAGE_LEN_IN_APP_PART
+        bool "Encrypt only the app image that is present in the partition of type app"
+        depends on SECURE_FLASH_ENC_ENABLED && !SECURE_FLASH_REQUIRE_ALREADY_ENABLED
+        default n
+        help
+            If set, optimise encryption time for the partition of type APP,
+            by only encrypting the app image that is present in the partition,
+            instead of the whole partition.
+            The image length used for encryption is derived from the image metadata, which
+            includes the size of the app image, checksum, hash and also the signature sector
+            when secure boot is enabled.
+
+            If not set (default), the whole partition of type APP would be encrypted,
+            which increases the encryption time but might be useful if there
+            is any custom data appended to the firmware image.
+
    config SECURE_FLASH_CHECK_ENC_EN_IN_APP
        bool "Check Flash Encryption enabled on app startup"
        depends on SECURE_FLASH_ENC_ENABLED
--- a/components/bootloader/project_include.cmake
+++ b/components/bootloader/project_include.cmake
@ -148,5 +148,5 @@ endif()
 #
 # So for now we just have the top-level build remove the final build products...
 set_property(DIRECTORY "${CMAKE_CURRENT_SOURCE_DIR}" APPEND PROPERTY
-    ADDITIONAL_MAKE_CLEAN_FILES
+    ADDITIONAL_CLEAN_FILES
    ${bootloader_binary_files})
--- a/components/bootloader/sdkconfig.rename
+++ b/components/bootloader/sdkconfig.rename
@ -23,3 +23,5 @@ CONFIG_FLASH_ENCRYPTION_UART_BOOTLOADER_ALLOW_CACHE         CONFIG_SECURE_FLASH_

 # Secure Boot Scheme
 CONFIG_SECURE_BOOT_ENABLED                                  CONFIG_SECURE_BOOT_V1_ENABLED
+
+CONFIG_SPI_FLASH_OCTAL_32BIT_ADDR_ENABLE                    CONFIG_BOOTLOADER_CACHE_32BIT_ADDR_OCTAL_FLASH
--- a/components/bootloader/subproject/components/micro-ecc/micro-ecc
+++ b/components/bootloader/subproject/components/micro-ecc/micro-ecc
--- a/components/bootloader/subproject/main/ld/esp32/bootloader.ld
+++ b/components/bootloader/subproject/main/ld/esp32/bootloader.ld
@ -25,7 +25,7 @@ MEMORY
  */
  iram_seg (RWX) :                  org = 0x40080400, len = 0xfc00
  /* 64k at the end of DRAM, after ROM bootloader stack */
-  dram_seg (RW) :                  	org = 0x3FFF0000, len = 0x10000
+  dram_seg (RW) :                  	org = 0x3FFF0000, len = 0x6000
 }

 /*  Default entry point:  */
--- a/components/bootloader/subproject/main/ld/esp32/bootloader.rom.ld
+++ b/components/bootloader/subproject/main/ld/esp32/bootloader.rom.ld
@ -1,9 +0,0 @@
-PROVIDE ( ets_update_cpu_frequency = 0x40008550 ); /* Updates g_ticks_per_us on the current CPU only; not on the other core */
-PROVIDE ( MD5Final = 0x4005db1c );
-PROVIDE ( MD5Init = 0x4005da7c );
-PROVIDE ( MD5Update = 0x4005da9c );
-
-/* bootloader will use following functions from xtensa hal library */
-xthal_get_ccount = 0x4000c050;
-xthal_get_ccompare = 0x4000c078;
-xthal_set_ccompare = 0x4000c058;
--- a/components/bootloader/subproject/main/ld/esp32h4/bootloader.ld
+++ b/components/bootloader/subproject/main/ld/esp32h4/bootloader.ld
@ -1,240 +0,0 @@
-/*
- * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-/** Simplified memory map for the bootloader.
- *  Make sure the bootloader can load into main memory without overwriting itself.
- *
- *  ESP32-H4 ROM static data usage is as follows:
- *  - 0x3fccb900 - 0x3fcdd210: Shared buffers, used in UART/USB/SPI download mode only
- *  - 0x3fcdd210 - 0x3fcdf210: PRO CPU stack, can be reclaimed as heap after RTOS startup
- *  - 0x3fcdf210 - 0x3fce0000: ROM .bss and .data (not easily reclaimable)
- *
- *  The 2nd stage bootloader can take space up to the end of ROM shared
- *  buffers area (0x3fce9704). For alignment purpose we shall use value (0x3fce9700).
- */
-
-/* The offset between Dbus and Ibus. Used to convert between 0x403xxxxx and 0x3fcxxxxx addresses. */
-iram_dram_offset = 0x700000;
-
-/* We consider 0x3fce9700 to be the last usable address for 2nd stage bootloader stack overhead, dram_seg,
- * and work out iram_seg and iram_loader_seg addresses from there, backwards.
- */
-
-/* These lengths can be adjusted, if necessary: */
-bootloader_usable_dram_end = 0x3fcdd120;
-bootloader_stack_overhead = 0x2000; /* For safety margin between bootloader data section and startup stacks */
-bootloader_dram_seg_len = 0x5000;
-bootloader_iram_loader_seg_len = 0x7000;
-bootloader_iram_seg_len = 0x2000;
-
-/* Start of the lower region is determined by region size and the end of the higher region */
-bootloader_dram_seg_end = bootloader_usable_dram_end - bootloader_stack_overhead;
-bootloader_dram_seg_start = bootloader_dram_seg_end - bootloader_dram_seg_len;
-bootloader_iram_loader_seg_start = bootloader_dram_seg_start - bootloader_iram_loader_seg_len + iram_dram_offset;
-bootloader_iram_seg_start = bootloader_iram_loader_seg_start - bootloader_iram_seg_len;
-
-MEMORY
-{
-  iram_seg (RWX) :                  org = bootloader_iram_seg_start, len = bootloader_iram_seg_len
-  iram_loader_seg (RWX) :           org = bootloader_iram_loader_seg_start, len = bootloader_iram_loader_seg_len
-  dram_seg (RW) :                   org = bootloader_dram_seg_start, len = bootloader_dram_seg_len
-}
-
-/* Default entry point: */
-ENTRY(call_start_cpu0);
-
-SECTIONS
-{
-
-  .iram_loader.text :
-  {
-    . = ALIGN (16);
-    _loader_text_start = ABSOLUTE(.);
-    *(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
-     *(.iram1 .iram1.*) /* catch stray IRAM_ATTR */
-    *liblog.a:(.literal .text .literal.* .text.*)
-    *libgcc.a:(.literal .text .literal.* .text.*)
-    *libbootloader_support.a:bootloader_clock_loader.*(.literal .text .literal.* .text.*)
-    *libbootloader_support.a:bootloader_common_loader.*(.literal .text .literal.* .text.*)
-    *libbootloader_support.a:bootloader_flash.*(.literal .text .literal.* .text.*)
-    *libbootloader_support.a:bootloader_random.*(.literal .text .literal.* .text.*)
-    *libbootloader_support.a:bootloader_random*.*(.literal.bootloader_random_disable .text.bootloader_random_disable)
-    *libbootloader_support.a:bootloader_random*.*(.literal.bootloader_random_enable .text.bootloader_random_enable)
-    *libbootloader_support.a:bootloader_efuse.*(.literal .text .literal.* .text.*)
-    *libbootloader_support.a:bootloader_utility.*(.literal .text .literal.* .text.*)
-    *libbootloader_support.a:bootloader_sha.*(.literal .text .literal.* .text.*)
-    *libbootloader_support.a:bootloader_console_loader.*(.literal .text .literal.* .text.*)
-    *libbootloader_support.a:bootloader_panic.*(.literal .text .literal.* .text.*)
-    *libbootloader_support.a:bootloader_soc.*(.literal .text .literal.* .text.*)
-    *libbootloader_support.a:esp_image_format.*(.literal .text .literal.* .text.*)
-    *libbootloader_support.a:flash_encrypt.*(.literal .text .literal.* .text.*)
-    *libbootloader_support.a:flash_partitions.*(.literal .text .literal.* .text.*)
-    *libbootloader_support.a:secure_boot.*(.literal .text .literal.* .text.*)
-    *libbootloader_support.a:secure_boot_signatures_bootloader.*(.literal .text .literal.* .text.*)
-    *libmicro-ecc.a:*.*(.literal .text .literal.* .text.*)
-    *libspi_flash.a:*.*(.literal .text .literal.* .text.*)
-    *libhal.a:wdt_hal_iram.*(.literal .text .literal.* .text.*)
-    *libhal.a:mmu_hal.*(.literal .text .literal.* .text.*)
-    *libhal.a:cache_hal.*(.literal .text .literal.* .text.*)
-    *libhal.a:efuse_hal.*(.literal .text .literal.* .text.*)
-    *libesp_hw_support.a:rtc_clk.*(.literal .text .literal.* .text.*)
-    *libesp_hw_support.a:rtc_time.*(.literal .text .literal.* .text.*)
-    *libesp_hw_support.a:regi2c_ctrl.*(.literal .text .literal.* .text.*)
-    *libefuse.a:*.*(.literal .text .literal.* .text.*)
-    *(.fini.literal)
-    *(.fini)
-    *(.gnu.version)
-    _loader_text_end = ABSOLUTE(.);
-  } > iram_loader_seg
-
-  .iram.text :
-  {
-    . = ALIGN (16);
-    *(.entry.text)
-    *(.init.literal)
-    *(.init)
-  } > iram_seg
-
-
-  /* Shared RAM */
-  .dram0.bss (NOLOAD) :
-  {
-    . = ALIGN (8);
-    _dram_start = ABSOLUTE(.);
-    _bss_start = ABSOLUTE(.);
-    *(.dynsbss)
-    *(.sbss)
-    *(.sbss.*)
-    *(.gnu.linkonce.sb.*)
-    *(.scommon)
-    *(.sbss2)
-    *(.sbss2.*)
-    *(.gnu.linkonce.sb2.*)
-    *(.dynbss)
-    *(.bss)
-    *(.bss.*)
-    *(.gnu.linkonce.b.*)
-    *(COMMON)
-    . = ALIGN (8);
-    _bss_end = ABSOLUTE(.);
-  } > dram_seg
-
-  .dram0.data :
-  {
-    _data_start = ABSOLUTE(.);
-    *(.data)
-    *(.data.*)
-    *(.gnu.linkonce.d.*)
-    *(.data1)
-    *(.sdata)
-    *(.sdata.*)
-    *(.gnu.linkonce.s.*)
-    *(.gnu.linkonce.s2.*)
-    *(.jcr)
-    _data_end = ABSOLUTE(.);
-  } > dram_seg
-
-  .dram0.rodata :
-  {
-    _rodata_start = ABSOLUTE(.);
-    *(.rodata)
-    *(.rodata.*)
-    *(.gnu.linkonce.r.*)
-    *(.rodata1)
-    *(.sdata2 .sdata2.* .srodata .srodata.*)
-    __XT_EXCEPTION_TABLE_ = ABSOLUTE(.);
-    *(.xt_except_table)
-    *(.gcc_except_table)
-    *(.gnu.linkonce.e.*)
-    *(.gnu.version_r)
-    *(.eh_frame)
-    . = (. + 3) & ~ 3;
-    /* C++ constructor and destructor tables, properly ordered: */
-    __init_array_start = ABSOLUTE(.);
-    KEEP (*crtbegin.*(.ctors))
-    KEEP (*(EXCLUDE_FILE (*crtend.*) .ctors))
-    KEEP (*(SORT(.ctors.*)))
-    KEEP (*(.ctors))
-    __init_array_end = ABSOLUTE(.);
-    KEEP (*crtbegin.*(.dtors))
-    KEEP (*(EXCLUDE_FILE (*crtend.*) .dtors))
-    KEEP (*(SORT(.dtors.*)))
-    KEEP (*(.dtors))
-    /*  C++ exception handlers table:  */
-    __XT_EXCEPTION_DESCS_ = ABSOLUTE(.);
-    *(.xt_except_desc)
-    *(.gnu.linkonce.h.*)
-    __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
-    *(.xt_except_desc_end)
-    *(.dynamic)
-    *(.gnu.version_d)
-    _rodata_end = ABSOLUTE(.);
-    /* Literals are also RO data. */
-    _lit4_start = ABSOLUTE(.);
-    *(*.lit4)
-    *(.lit4.*)
-    *(.gnu.linkonce.lit4.*)
-    _lit4_end = ABSOLUTE(.);
-    . = ALIGN(4);
-    _dram_end = ABSOLUTE(.);
-  } > dram_seg
-
-  .iram.text :
-  {
-    _stext = .;
-    _text_start = ABSOLUTE(.);
-    *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
-    *(.iram .iram.*) /* catch stray IRAM_ATTR */
-    *(.fini.literal)
-    *(.fini)
-    *(.gnu.version)
-
-    /** CPU will try to prefetch up to 16 bytes of
-      * of instructions. This means that any configuration (e.g. MMU, PMS) must allow
-      * safe access to up to 16 bytes after the last real instruction, add
-      * dummy bytes to ensure this
-      */
-    . += 16;
-
-    _text_end = ABSOLUTE(.);
-    _etext = .;
-  } > iram_seg
-
-}
-
-/**
- *  Appendix: Memory Usage of ROM bootloader
- *
- * 0x3fccb81c ------------------> _dram0_0_start
- *            |               |
- *            |               |
- *            |               |   1. Large buffers that are only used in certain boot modes, see shared_buffers.h
- *            |               |
- *            |               |
- * 0x3fcdd120 ------------------> __stack_sentry
- *            |               |
- *            |               |   2. Startup pro cpu stack (freed when IDF app is running)
- *            |               |
- * 0x3fcdf120 ------------------> __stack (pro cpu)
- *            |               |
- *            |               |
- *            |               |   3. Shared memory only used in startup code or nonos/early boot*
- *            |               |      (can be freed when IDF runs)
- *            |               |
- *            |               |
- * 0x3fcdfa6c ------------------> _dram0_rtos_reserved_start
- *            |               |
- *            |               |
- *            |               |   4. Shared memory used in startup code and when IDF runs
- *            |               |
- *            |               |
- * 0x3fcdfe40 ------------------> _dram0_rtos_reserved_end
- *            |               |
- * 0x3fcdfe4c ------------------> _data_start_interface
- *            |               |
- *            |               |   5. End of DRAM is the 'interface' data with constant addresses (ECO compatible)
- *            |               |
- * 0x3fce0000 ------------------> _data_end_interface
- */
--- a/components/bootloader/subproject/main/ld/esp32h4/bootloader.rom.ld
+++ b/components/bootloader/subproject/main/ld/esp32h4/bootloader.rom.ld
@ -1,6 +0,0 @@
-/*
- * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-/* No definition for ESP32-H4 target */
--- a/components/bootloader/subproject/main/ld/esp32s2/bootloader.rom.ld
+++ b/components/bootloader/subproject/main/ld/esp32s2/bootloader.rom.ld
@ -1,13 +0,0 @@
-/*
- * ESP32S2 ROM address table
- * Generated for ROM with MD5sum: 0a2c7ec5109c17884606d23b47045796
-*/
-PROVIDE (ets_update_cpu_frequency = 0x4000d8a4);
-
-PROVIDE (MD5Final = 0x4000530c);
-PROVIDE (MD5Init = 0x4000526c);
-PROVIDE (MD5Update = 0x4000528c);
-/* bootloader will use following functions from xtensa hal library */
-xthal_get_ccount = 0x4001aa90;
-xthal_get_ccompare = 0x4001aabc;
-xthal_set_ccompare = 0x4001aa98;
--- a/components/bootloader/subproject/main/ld/esp32s3/bootloader.rom.ld
+++ b/components/bootloader/subproject/main/ld/esp32s3/bootloader.rom.ld
@ -1,6 +0,0 @@
-/**
- * ESP32S3 ROM address table
- * Generated for ROM with MD5sum: d20fb231463ce337432b1fa9cba0b3c9
- */
-
-PROVIDE ( ets_update_cpu_frequency = 0x40043164 );
--- a/components/bootloader_support/.build-test-rules.yml
+++ b/components/bootloader_support/.build-test-rules.yml
@ -5,7 +5,3 @@ components/bootloader_support/test_apps/rtc_custom_section:
    - if: IDF_TARGET == "esp32c2"
      temporary: false
      reason: esp32c2 does not have RTC memory
-  disable_test:
-    - if: IDF_TARGET == "esp32h2"
-      temporary: true
-      reason: target esp32h2 is not supported yet
--- a/components/bootloader_support/CMakeLists.txt
+++ b/components/bootloader_support/CMakeLists.txt
@ -164,7 +164,7 @@ if(CONFIG_SECURE_SIGNED_APPS AND (CONFIG_SECURE_BOOT_V1_ENABLED OR CONFIG_SECURE
    target_add_binary_data(${COMPONENT_LIB} "${secure_boot_verification_key}" "BINARY"
        RENAME_TO signature_verification_key_bin)
    set_property(DIRECTORY "${CMAKE_CURRENT_SOURCE_DIR}"
-        APPEND PROPERTY ADDITIONAL_MAKE_CLEAN_FILES
+        APPEND PROPERTY ADDITIONAL_CLEAN_FILES
        "${secure_boot_verification_key}")
 endif()

--- a/components/bootloader_support/bootloader_flash/include/bootloader_flash.h
+++ b/components/bootloader_support/bootloader_flash/include/bootloader_flash.h
@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2020-2023 Espressif Systems (Shanghai) CO LTD
 *
 * SPDX-License-Identifier: Apache-2.0
 */
@ -54,6 +54,13 @@ esp_err_t bootloader_flash_reset_chip(void);
 */
 bool bootloader_flash_is_octal_mode_enabled(void);

+/**
+ * @brief Get the spi flash working mode.
+ *
+ * @return The mode of flash working mode, see `esp_rom_spiflash_read_mode_t`
+ */
+esp_rom_spiflash_read_mode_t bootloader_flash_get_spi_mode(void);
+
 #ifdef __cplusplus
 }
 #endif
--- a/components/bootloader_support/bootloader_flash/include/bootloader_flash_override.h
+++ b/components/bootloader_support/bootloader_flash/include/bootloader_flash_override.h
@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2020-2023 Espressif Systems (Shanghai) CO LTD
 *
 * SPDX-License-Identifier: Apache-2.0
 */
@ -109,6 +109,17 @@ extern const bootloader_qio_info_t __attribute__((weak)) bootloader_flash_qe_sup
  */
 esp_err_t __attribute__((weak)) bootloader_flash_unlock(void);

+#if CONFIG_BOOTLOADER_CACHE_32BIT_ADDR_OCTAL_FLASH
+/**
+ * @brief Enable 32bits address flash(larger than 16MB) can map to cache.
+ *
+ * @param flash_mode SPI flash working mode.
+ *
+ * @note This can be overridden because it's attribute weak.
+ */
+void __attribute__((weak)) bootloader_flash_32bits_address_map_enable(esp_rom_spiflash_read_mode_t flash_mode);
+#endif
+
 #ifdef __cplusplus
 }
 #endif
--- a/components/bootloader_support/bootloader_flash/include/bootloader_flash_priv.h
+++ b/components/bootloader_support/bootloader_flash/include/bootloader_flash_priv.h
@ -52,6 +52,8 @@ extern "C" {
 #define CMD_RESUME     0x7A /* Resume command to clear flash suspend bit */
 #define CMD_RESETEN    0x66
 #define CMD_RESET      0x99
+#define CMD_FASTRD_4B       0x0C
+#define CMD_SLOWRD_4B       0x13


 /* Provide a Flash API for bootloader_support code,
--- a/components/bootloader_support/bootloader_flash/src/bootloader_flash.c
+++ b/components/bootloader_support/bootloader_flash/src/bootloader_flash.c
@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
 *
 * SPDX-License-Identifier: Apache-2.0
 */
@ -120,9 +120,13 @@ esp_err_t bootloader_flash_erase_range(uint32_t start_addr, uint32_t size)
 #include "esp32/rom/cache.h"
 #endif
 #include "esp_rom_spiflash.h"
+#include "esp_rom_sys.h"
 #include "hal/mmu_hal.h"
 #include "hal/mmu_ll.h"
 #include "hal/cache_hal.h"
+#if CONFIG_IDF_TARGET_ESP32S3
+#include "esp32s3/rom/opi_flash.h"
+#endif
 static const char *TAG = "bootloader_flash";

 #if CONFIG_IDF_TARGET_ESP32
@ -409,6 +413,33 @@ esp_err_t bootloader_flash_erase_range(uint32_t start_addr, uint32_t size)
    return spi_to_esp_err(rc);
 }

+#if CONFIG_BOOTLOADER_CACHE_32BIT_ADDR_OCTAL_FLASH
+void bootloader_flash_32bits_address_map_enable(esp_rom_spiflash_read_mode_t flash_mode)
+{
+    esp_rom_opiflash_spi0rd_t cache_rd = {};
+    switch (flash_mode) {
+    case ESP_ROM_SPIFLASH_FASTRD_MODE:
+        cache_rd.addr_bit_len = 32;
+        cache_rd.dummy_bit_len = 8;
+        cache_rd.cmd = CMD_FASTRD_4B;
+        cache_rd.cmd_bit_len = 8;
+        break;
+     case ESP_ROM_SPIFLASH_SLOWRD_MODE:
+        cache_rd.addr_bit_len = 32;
+        cache_rd.dummy_bit_len = 0;
+        cache_rd.cmd = CMD_SLOWRD_4B;
+        cache_rd.cmd_bit_len = 8;
+        break;
+    default:
+        assert(false);
+        break;
+    }
+    cache_hal_disable(CACHE_TYPE_ALL);
+    esp_rom_opiflash_cache_mode_config(flash_mode, &cache_rd);
+    cache_hal_enable(CACHE_TYPE_ALL);
+}
+#endif
+
 #endif // BOOTLOADER_BUILD


@ -755,3 +786,40 @@ bool IRAM_ATTR bootloader_flash_is_octal_mode_enabled(void)
    return false;
 #endif
 }
+
+esp_rom_spiflash_read_mode_t bootloader_flash_get_spi_mode(void)
+{
+    esp_rom_spiflash_read_mode_t spi_mode = ESP_ROM_SPIFLASH_FASTRD_MODE;
+#if CONFIG_IDF_TARGET_ESP32
+    uint32_t spi_ctrl = REG_READ(SPI_CTRL_REG(0));
+    if (spi_ctrl & SPI_FREAD_QIO) {
+        spi_mode = ESP_ROM_SPIFLASH_QIO_MODE;
+    } else if (spi_ctrl & SPI_FREAD_QUAD) {
+        spi_mode = ESP_ROM_SPIFLASH_QOUT_MODE;
+    } else if (spi_ctrl & SPI_FREAD_DIO) {
+        spi_mode = ESP_ROM_SPIFLASH_DIO_MODE;
+    } else if (spi_ctrl & SPI_FREAD_DUAL) {
+        spi_mode = ESP_ROM_SPIFLASH_DOUT_MODE;
+    } else if (spi_ctrl & SPI_FASTRD_MODE) {
+        spi_mode = ESP_ROM_SPIFLASH_FASTRD_MODE;
+    } else {
+        spi_mode = ESP_ROM_SPIFLASH_SLOWRD_MODE;
+    }
+#else
+    uint32_t spi_ctrl = REG_READ(SPI_MEM_CTRL_REG(0));
+    if (spi_ctrl & SPI_MEM_FREAD_QIO) {
+        spi_mode = ESP_ROM_SPIFLASH_QIO_MODE;
+    } else if (spi_ctrl & SPI_MEM_FREAD_QUAD) {
+        spi_mode = ESP_ROM_SPIFLASH_QOUT_MODE;
+    } else if (spi_ctrl & SPI_MEM_FREAD_DIO) {
+        spi_mode = ESP_ROM_SPIFLASH_DIO_MODE;
+    } else if (spi_ctrl & SPI_MEM_FREAD_DUAL) {
+        spi_mode = ESP_ROM_SPIFLASH_DOUT_MODE;
+    } else if (spi_ctrl & SPI_MEM_FASTRD_MODE) {
+        spi_mode = ESP_ROM_SPIFLASH_FASTRD_MODE;
+    } else {
+        spi_mode = ESP_ROM_SPIFLASH_SLOWRD_MODE;
+    }
+#endif
+    return spi_mode;
+}
--- a/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32c6.c
+++ b/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32c6.c
@ -200,6 +200,12 @@ esp_err_t bootloader_init_spi_flash(void)
    bootloader_enable_qio_mode();
 #endif

+    // Since the workaround in IDF-6709, the spi_speed value in the bootloader header
+    // is not the real value, overwrite it.
+#if CONFIG_ESPTOOLPY_FLASHFREQ_80M
+    bootloader_image_hdr.spi_speed = ESP_IMAGE_SPI_SPEED_DIV_1;
+#endif
+
    print_flash_info(&bootloader_image_hdr);
    update_flash_config(&bootloader_image_hdr);
    //ensure the flash is write-protected
--- a/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32h4.c
+++ b/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32h4.c
@ -1,250 +0,0 @@
-/*
- * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-#include <stdbool.h>
-#include <assert.h>
-#include "string.h"
-#include "sdkconfig.h"
-#include "esp_err.h"
-#include "esp_log.h"
-#include "esp_rom_gpio.h"
-#include "esp_rom_efuse.h"
-#include "esp32h4/rom/gpio.h"
-#include "esp32h4/rom/spi_flash.h"
-#include "esp32h4/rom/efuse.h"
-#include "soc/gpio_periph.h"
-#include "soc/efuse_reg.h"
-#include "soc/spi_reg.h"
-#include "soc/spi_mem_reg.h"
-#include "soc/soc_caps.h"
-#include "flash_qio_mode.h"
-#include "bootloader_flash_config.h"
-#include "bootloader_common.h"
-#include "bootloader_flash_priv.h"
-#include "bootloader_init.h"
-#include "hal/mmu_hal.h"
-#include "hal/cache_hal.h"
-#include "hal/mmu_ll.h"
-
-#define FLASH_IO_MATRIX_DUMMY_40M   0
-#define FLASH_IO_MATRIX_DUMMY_80M   0
-
-void bootloader_flash_update_id()
-{
-    esp_rom_spiflash_chip_t *chip = &rom_spiflash_legacy_data->chip;
-    chip->device_id = bootloader_read_flash_id();
-}
-
-void IRAM_ATTR bootloader_flash_cs_timing_config()
-{
-    SET_PERI_REG_MASK(SPI_MEM_USER_REG(0), SPI_MEM_CS_HOLD_M | SPI_MEM_CS_SETUP_M);
-    SET_PERI_REG_BITS(SPI_MEM_CTRL2_REG(0), SPI_MEM_CS_HOLD_TIME_V, 0, SPI_MEM_CS_HOLD_TIME_S);
-    SET_PERI_REG_BITS(SPI_MEM_CTRL2_REG(0), SPI_MEM_CS_SETUP_TIME_V, 0, SPI_MEM_CS_SETUP_TIME_S);
-    SET_PERI_REG_MASK(SPI_MEM_USER_REG(1), SPI_MEM_CS_HOLD_M | SPI_MEM_CS_SETUP_M);
-    SET_PERI_REG_BITS(SPI_MEM_CTRL2_REG(1), SPI_MEM_CS_HOLD_TIME_V, 1, SPI_MEM_CS_HOLD_TIME_S);
-    SET_PERI_REG_BITS(SPI_MEM_CTRL2_REG(1), SPI_MEM_CS_SETUP_TIME_V, 0, SPI_MEM_CS_SETUP_TIME_S);
-}
-
-void IRAM_ATTR bootloader_flash_clock_config(const esp_image_header_t *pfhdr)
-{
-    uint32_t spi_clk_div = 0;
-    switch (pfhdr->spi_speed) {
-    case ESP_IMAGE_SPI_SPEED_DIV_1:
-        spi_clk_div = 1;
-        break;
-    case ESP_IMAGE_SPI_SPEED_DIV_2:
-        spi_clk_div = 2;
-        break;
-    case ESP_IMAGE_SPI_SPEED_DIV_3:
-        spi_clk_div = 3;
-        break;
-    case ESP_IMAGE_SPI_SPEED_DIV_4:
-        spi_clk_div = 4;
-        break;
-    default:
-        break;
-    }
-    esp_rom_spiflash_config_clk(spi_clk_div, 0);
-}
-
-void IRAM_ATTR bootloader_flash_set_dummy_out(void)
-{
-    REG_SET_BIT(SPI_MEM_CTRL_REG(0), SPI_MEM_FDUMMY_OUT | SPI_MEM_D_POL | SPI_MEM_Q_POL);
-    REG_SET_BIT(SPI_MEM_CTRL_REG(1), SPI_MEM_FDUMMY_OUT | SPI_MEM_D_POL | SPI_MEM_Q_POL);
-}
-
-void IRAM_ATTR bootloader_flash_dummy_config(const esp_image_header_t *pfhdr)
-{
-    bootloader_configure_spi_pins(1);
-    bootloader_flash_set_dummy_out();
-}
-
-static const char *TAG = "boot.esp32h4";
-
-void IRAM_ATTR bootloader_configure_spi_pins(int drv)
-{
-    const uint32_t spiconfig = esp_rom_efuse_get_flash_gpio_info();
-    uint8_t wp_pin = esp_rom_efuse_get_flash_wp_gpio();
-    uint8_t clk_gpio_num = SPI_CLK_GPIO_NUM;
-    uint8_t q_gpio_num   = SPI_Q_GPIO_NUM;
-    uint8_t d_gpio_num   = SPI_D_GPIO_NUM;
-    uint8_t cs0_gpio_num = SPI_CS0_GPIO_NUM;
-    uint8_t hd_gpio_num  = SPI_HD_GPIO_NUM;
-    uint8_t wp_gpio_num  = SPI_WP_GPIO_NUM;
-    if (spiconfig == 0) {
-
-    } else {
-        clk_gpio_num = spiconfig         & 0x3f;
-        q_gpio_num = (spiconfig >> 6)    & 0x3f;
-        d_gpio_num = (spiconfig >> 12)   & 0x3f;
-        cs0_gpio_num = (spiconfig >> 18) & 0x3f;
-        hd_gpio_num = (spiconfig >> 24)  & 0x3f;
-        wp_gpio_num = wp_pin;
-    }
-    esp_rom_gpio_pad_set_drv(clk_gpio_num, drv);
-    esp_rom_gpio_pad_set_drv(q_gpio_num,   drv);
-    esp_rom_gpio_pad_set_drv(d_gpio_num,   drv);
-    esp_rom_gpio_pad_set_drv(cs0_gpio_num, drv);
-    if (hd_gpio_num <= MAX_PAD_GPIO_NUM) {
-        esp_rom_gpio_pad_set_drv(hd_gpio_num, drv);
-    }
-    if (wp_gpio_num <= MAX_PAD_GPIO_NUM) {
-        esp_rom_gpio_pad_set_drv(wp_gpio_num, drv);
-    }
-}
-
-static void update_flash_config(const esp_image_header_t *bootloader_hdr)
-{
-    uint32_t size;
-    switch (bootloader_hdr->spi_size) {
-    case ESP_IMAGE_FLASH_SIZE_1MB:
-        size = 1;
-        break;
-    case ESP_IMAGE_FLASH_SIZE_2MB:
-        size = 2;
-        break;
-    case ESP_IMAGE_FLASH_SIZE_4MB:
-        size = 4;
-        break;
-    case ESP_IMAGE_FLASH_SIZE_8MB:
-        size = 8;
-        break;
-    case ESP_IMAGE_FLASH_SIZE_16MB:
-        size = 16;
-        break;
-    default:
-        size = 2;
-    }
-    cache_hal_disable(CACHE_TYPE_ALL);
-    // Set flash chip size
-    esp_rom_spiflash_config_param(rom_spiflash_legacy_data->chip.device_id, size * 0x100000, 0x10000, 0x1000, 0x100, 0xffff);    // TODO: set mode
-    cache_hal_enable(CACHE_TYPE_ALL);
-}
-
-static void print_flash_info(const esp_image_header_t *bootloader_hdr)
-{
-    ESP_EARLY_LOGD(TAG, "magic %02x", bootloader_hdr->magic);
-    ESP_EARLY_LOGD(TAG, "segments %02x", bootloader_hdr->segment_count);
-    ESP_EARLY_LOGD(TAG, "spi_mode %02x", bootloader_hdr->spi_mode);
-    ESP_EARLY_LOGD(TAG, "spi_speed %02x", bootloader_hdr->spi_speed);
-    ESP_EARLY_LOGD(TAG, "spi_size %02x", bootloader_hdr->spi_size);
-
-    const char *str;
-    switch (bootloader_hdr->spi_speed) {
-    case ESP_IMAGE_SPI_SPEED_DIV_2:
-        str = "24MHz";
-        break;
-    case ESP_IMAGE_SPI_SPEED_DIV_3:
-        str = "16MHz";
-        break;
-    case ESP_IMAGE_SPI_SPEED_DIV_4:
-        str = "12MHz";
-        break;
-    case ESP_IMAGE_SPI_SPEED_DIV_1:
-        str = "48MHz";
-        break;
-    default:
-        str = "12MHz";
-        break;
-    }
-    ESP_EARLY_LOGI(TAG, "SPI Speed      : %s", str);
-
-    /* SPI mode could have been set to QIO during boot already,
-       so test the SPI registers not the flash header */
-    uint32_t spi_ctrl = REG_READ(SPI_MEM_CTRL_REG(0));
-    if (spi_ctrl & SPI_MEM_FREAD_QIO) {
-        str = "QIO";
-    } else if (spi_ctrl & SPI_MEM_FREAD_QUAD) {
-        str = "QOUT";
-    } else if (spi_ctrl & SPI_MEM_FREAD_DIO) {
-        str = "DIO";
-    } else if (spi_ctrl & SPI_MEM_FREAD_DUAL) {
-        str = "DOUT";
-    } else if (spi_ctrl & SPI_MEM_FASTRD_MODE) {
-        str = "FAST READ";
-    } else {
-        str = "SLOW READ";
-    }
-    ESP_EARLY_LOGI(TAG, "SPI Mode       : %s", str);
-
-    switch (bootloader_hdr->spi_size) {
-    case ESP_IMAGE_FLASH_SIZE_1MB:
-        str = "1MB";
-        break;
-    case ESP_IMAGE_FLASH_SIZE_2MB:
-        str = "2MB";
-        break;
-    case ESP_IMAGE_FLASH_SIZE_4MB:
-        str = "4MB";
-        break;
-    case ESP_IMAGE_FLASH_SIZE_8MB:
-        str = "8MB";
-        break;
-    case ESP_IMAGE_FLASH_SIZE_16MB:
-        str = "16MB";
-        break;
-    default:
-        str = "2MB";
-        break;
-    }
-    ESP_EARLY_LOGI(TAG, "SPI Flash Size : %s", str);
-}
-
-static void IRAM_ATTR bootloader_init_flash_configure(void)
-{
-    bootloader_flash_dummy_config(&bootloader_image_hdr);
-    bootloader_flash_cs_timing_config();
-}
-
-static void bootloader_spi_flash_resume(void)
-{
-    bootloader_execute_flash_command(CMD_RESUME, 0, 0, 0);
-    esp_rom_spiflash_wait_idle(&g_rom_flashchip);
-}
-
-esp_err_t bootloader_init_spi_flash(void)
-{
-    bootloader_init_flash_configure();
-#ifndef CONFIG_SPI_FLASH_ROM_DRIVER_PATCH
-    const uint32_t spiconfig = esp_rom_efuse_get_flash_gpio_info();
-    if (spiconfig != ESP_ROM_EFUSE_FLASH_DEFAULT_SPI && spiconfig != ESP_ROM_EFUSE_FLASH_DEFAULT_HSPI) {
-        ESP_EARLY_LOGE(TAG, "SPI flash pins are overridden. Enable CONFIG_SPI_FLASH_ROM_DRIVER_PATCH in menuconfig");
-        return ESP_FAIL;
-    }
-#endif
-
-    bootloader_spi_flash_resume();
-    bootloader_flash_unlock();
-
-#if CONFIG_ESPTOOLPY_FLASHMODE_QIO || CONFIG_ESPTOOLPY_FLASHMODE_QOUT
-    bootloader_enable_qio_mode();
-#endif
-
-    print_flash_info(&bootloader_image_hdr);
-    update_flash_config(&bootloader_image_hdr);
-    //ensure the flash is write-protected
-    bootloader_enable_wp();
-    return ESP_OK;
-}
--- a/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32s3.c
+++ b/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32s3.c
@ -260,7 +260,7 @@ esp_err_t bootloader_init_spi_flash(void)
    }
 #endif

-#if CONFIG_SPI_FLASH_HPM_ENABLE
+#if CONFIG_BOOTLOADER_FLASH_DC_AWARE
    // Reset flash, clear volatile bits DC[0:1]. Make it work under default mode to boot.
    bootloader_spi_flash_reset();
 #endif
@ -272,7 +272,9 @@ esp_err_t bootloader_init_spi_flash(void)
        bootloader_enable_qio_mode();
    }
 #endif
-
+#if CONFIG_BOOTLOADER_CACHE_32BIT_ADDR_OCTAL_FLASH
+    bootloader_flash_32bits_address_map_enable(bootloader_flash_get_spi_mode());
+#endif
    print_flash_info(&bootloader_image_hdr);
    update_flash_config(&bootloader_image_hdr);
    //ensure the flash is write-protected
--- a/components/bootloader_support/include/esp_app_format.h
+++ b/components/bootloader_support/include/esp_app_format.h
@ -18,12 +18,8 @@ typedef enum {
    ESP_CHIP_ID_ESP32C3 = 0x0005, /*!< chip ID: ESP32-C3 */
    ESP_CHIP_ID_ESP32S3 = 0x0009, /*!< chip ID: ESP32-S3 */
    ESP_CHIP_ID_ESP32C2 = 0x000C, /*!< chip ID: ESP32-C2 */
-#if CONFIG_IDF_TARGET_ESP32H4_BETA_VERSION_2
-    ESP_CHIP_ID_ESP32H4 = 0x000E, /*!< chip ID: ESP32-H4 Beta2*/  // ESP32H4-TODO: IDF-3475
-#elif CONFIG_IDF_TARGET_ESP32H4_BETA_VERSION_1
-    ESP_CHIP_ID_ESP32H4 = 0x000A, /*!< chip ID: ESP32-H4 Beta1 */
-#endif
    ESP_CHIP_ID_ESP32C6 = 0x000D, /*!< chip ID: ESP32-C6 */
+    ESP_CHIP_ID_ESP32H2 = 0x0010, /*!< chip ID: ESP32-H2 */
    ESP_CHIP_ID_INVALID = 0xFFFF /*!< Invalid chip ID (we defined it to make sure the esp_chip_id_t is 2 bytes size) */
 } __attribute__((packed)) esp_chip_id_t;

--- a/components/bootloader_support/include/esp_image_format.h
+++ b/components/bootloader_support/include/esp_image_format.h
@ -33,6 +33,7 @@ typedef struct {
  uint32_t segment_data[ESP_IMAGE_MAX_SEGMENTS]; /* Data offsets for each segment */
  uint32_t image_len; /* Length of image on flash, in bytes */
  uint8_t image_digest[32]; /* appended SHA-256 digest */
+  uint32_t secure_version; /* secure version for anti-rollback, it is covered by sha256 (set if CONFIG_BOOTLOADER_APP_ANTI_ROLLBACK=y) */
 } esp_image_metadata_t;

 typedef enum {
--- a/components/bootloader_support/include/esp_secure_boot.h
+++ b/components/bootloader_support/include/esp_secure_boot.h
@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
 *
 * SPDX-License-Identifier: Apache-2.0
 */
@ -282,6 +282,23 @@ esp_err_t esp_secure_boot_enable_secure_features(void);
 */
 bool esp_secure_boot_cfg_verify_release_mode(void);

+
+#if !defined(BOOTLOADER_BUILD) && SOC_SUPPORT_SECURE_BOOT_REVOKE_KEY && CONFIG_SECURE_BOOT_V2_ENABLED
+
+/** @brief Returns the verification status of the image pointed by the part_pos argument against the public key digest present at index `efuse_digest_index`
+ *
+ * @param index[in]         Index of public key digest present in efuse against which the image is to be verified
+ * @param part_pos[in]      It is a pointer to the bootloader/app partition.
+ *
+ * @return
+ *  - ESP_OK - if the image can be verified by the key at efuse_index.
+ *  - ESP_FAIL - if the image cannot be verified by the key at efuse_index.
+ *  - ESP_ERR_INVALID_ARG: Error in the passed arguments.
+ */
+esp_err_t esp_secure_boot_verify_with_efuse_digest_index(int efuse_digest_index, esp_partition_pos_t *part_pos);
+
+#endif // !defined(BOOTLOADER_BUILD) && SOC_SUPPORT_SECURE_BOOT_REVOKE_KEY && CONFIG_SECURE_BOOT_V2_ENABLED
+
 #ifdef __cplusplus
 }
 #endif
--- a/components/bootloader_support/private_include/bootloader_signature.h
+++ b/components/bootloader_support/private_include/bootloader_signature.h
@ -17,8 +17,6 @@
 #include "esp32c3/rom/secure_boot.h"
 #elif CONFIG_IDF_TARGET_ESP32S3
 #include "esp32s3/rom/secure_boot.h"
-#elif CONFIG_IDF_TARGET_ESP32H4
-#include "esp32h4/rom/secure_boot.h"
 #elif CONFIG_IDF_TARGET_ESP32C2
 #include "esp32c2/rom/secure_boot.h"
 #elif CONFIG_IDF_TARGET_ESP32C6
--- a/components/bootloader_support/private_include/bootloader_utility.h
+++ b/components/bootloader_support/private_include/bootloader_utility.h
@ -45,7 +45,7 @@ int bootloader_utility_get_selected_boot_partition(const bootloader_state_t *bs)
 * @param[in] bs Bootloader state structure.
 * @param[in] start_index The index from which the search for images begins.
 */
-__attribute__((noreturn)) void bootloader_utility_load_boot_image(const bootloader_state_t *bs, int start_index);
+__attribute__((__noreturn__)) void bootloader_utility_load_boot_image(const bootloader_state_t *bs, int start_index);

 #ifdef CONFIG_BOOTLOADER_SKIP_VALIDATE_IN_DEEP_SLEEP
 /**
@ -65,7 +65,7 @@ void bootloader_utility_load_boot_image_from_deep_sleep(void);
 *
 * It is not recommended to call this function from an app (if called, the app will abort).
 */
-__attribute__((noreturn)) void bootloader_reset(void);
+__attribute__((__noreturn__)) void bootloader_reset(void);

 /**
 * @brief Do any cleanup before exiting the bootloader, before starting the app or resetting
--- a/components/bootloader_support/src/bootloader_common_loader.c
+++ b/components/bootloader_support/src/bootloader_common_loader.c
@ -121,52 +121,38 @@ int bootloader_common_select_otadata(const esp_ota_select_entry_t *two_otadata,

 #if CONFIG_BOOTLOADER_RESERVE_RTC_MEM

-#define RTC_RETAIN_MEM_ADDR (SOC_RTC_DRAM_HIGH - sizeof(rtc_retain_mem_t))
-
-_Static_assert(RTC_RETAIN_MEM_ADDR >= SOC_RTC_DRAM_LOW, "rtc_retain_mem_t structure size is bigger than the RTC memory size. Consider reducing RTC reserved memory size.");
-
-rtc_retain_mem_t *const rtc_retain_mem = (rtc_retain_mem_t *)RTC_RETAIN_MEM_ADDR;
-
-#ifndef BOOTLOADER_BUILD
-#include "heap_memory_layout.h"
-/* The app needs to be told this memory is reserved, important if configured to use RTC memory as heap.
-
-   Note that keeping this macro here only works when other symbols in this file are referenced by the app, as
-   this feature is otherwise 100% part of the bootloader. However this seems to happen in all apps.
- */
-SOC_RESERVE_MEMORY_REGION(RTC_RETAIN_MEM_ADDR, RTC_RETAIN_MEM_ADDR + sizeof(rtc_retain_mem_t), rtc_retain_mem);
-#endif
-
 static uint32_t rtc_retain_mem_size(void) {
-#ifdef CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC
+#if CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC && !CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC_IN_CRC
    /* A custom memory has been reserved by the user, do not consider this memory into CRC calculation as it may change without
     * the have the user updating the CRC. Return the offset of the custom field, which is equivalent to size of the structure
     * minus the size of everything after (including) `custom` */
    return offsetof(rtc_retain_mem_t, custom);
 #else
-    return sizeof(rtc_retain_mem_t) - sizeof(rtc_retain_mem->crc);
+    return sizeof(rtc_retain_mem_t) - sizeof(bootloader_common_get_rtc_retain_mem()->crc);
 #endif
 }

 static bool is_retain_mem_valid(void)
 {
+    rtc_retain_mem_t* rtc_retain_mem = bootloader_common_get_rtc_retain_mem();
    return esp_rom_crc32_le(UINT32_MAX, (uint8_t*)rtc_retain_mem, rtc_retain_mem_size()) == rtc_retain_mem->crc && rtc_retain_mem->crc != UINT32_MAX;
 }

 static void update_rtc_retain_mem_crc(void)
 {
+    rtc_retain_mem_t* rtc_retain_mem = bootloader_common_get_rtc_retain_mem();
    rtc_retain_mem->crc = esp_rom_crc32_le(UINT32_MAX, (uint8_t*)rtc_retain_mem, rtc_retain_mem_size());
 }

 NOINLINE_ATTR void bootloader_common_reset_rtc_retain_mem(void)
 {
-    hal_memset(rtc_retain_mem, 0, sizeof(rtc_retain_mem_t));
+    hal_memset(bootloader_common_get_rtc_retain_mem(), 0, sizeof(rtc_retain_mem_t));
 }

 uint16_t bootloader_common_get_rtc_retain_mem_reboot_counter(void)
 {
    if (is_retain_mem_valid()) {
-        return rtc_retain_mem->reboot_counter;
+        return bootloader_common_get_rtc_retain_mem()->reboot_counter;
    }
    return 0;
 }
@ -176,12 +162,13 @@ void bootloader_common_set_rtc_retain_mem_factory_reset_state(void)
    if (!is_retain_mem_valid()) {
        bootloader_common_reset_rtc_retain_mem();
    }
-    rtc_retain_mem->flags.factory_reset_state = true;
+    bootloader_common_get_rtc_retain_mem()->flags.factory_reset_state = true;
    update_rtc_retain_mem_crc();
 }

 bool bootloader_common_get_rtc_retain_mem_factory_reset_state(void)
 {
+    rtc_retain_mem_t* rtc_retain_mem = bootloader_common_get_rtc_retain_mem();
    if (is_retain_mem_valid()) {
        bool factory_reset_state = rtc_retain_mem->flags.factory_reset_state;
        if (factory_reset_state == true) {
@ -196,13 +183,14 @@ bool bootloader_common_get_rtc_retain_mem_factory_reset_state(void)
 esp_partition_pos_t* bootloader_common_get_rtc_retain_mem_partition(void)
 {
    if (is_retain_mem_valid()) {
-        return &rtc_retain_mem->partition;
+        return &bootloader_common_get_rtc_retain_mem()->partition;
    }
    return NULL;
 }

 void bootloader_common_update_rtc_retain_mem(esp_partition_pos_t* partition, bool reboot_counter)
 {
+    rtc_retain_mem_t* rtc_retain_mem = bootloader_common_get_rtc_retain_mem();
    if (reboot_counter) {
        if (!is_retain_mem_valid()) {
            bootloader_common_reset_rtc_retain_mem();
@ -224,7 +212,14 @@ void bootloader_common_update_rtc_retain_mem(esp_partition_pos_t* partition, boo

 rtc_retain_mem_t* bootloader_common_get_rtc_retain_mem(void)
 {
-    return rtc_retain_mem;
+#ifdef BOOTLOADER_BUILD
+    #define RTC_RETAIN_MEM_ADDR (SOC_RTC_DRAM_HIGH - sizeof(rtc_retain_mem_t))
+    static rtc_retain_mem_t *const s_bootloader_retain_mem = (rtc_retain_mem_t *)RTC_RETAIN_MEM_ADDR;
+    return s_bootloader_retain_mem;
+#else
+    static __attribute__((section(".bootloader_data_rtc_mem"))) rtc_retain_mem_t s_bootloader_retain_mem;
+    return &s_bootloader_retain_mem;
+#endif // !BOOTLOADER_BUILD
 }

 #endif // CONFIG_BOOTLOADER_RESERVE_RTC_MEM
--- a/components/bootloader_support/src/bootloader_console.c
+++ b/components/bootloader_support/src/bootloader_console.c
@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2020-2023 Espressif Systems (Shanghai) CO LTD
 *
 * SPDX-License-Identifier: Apache-2.0
 */
@ -18,6 +18,9 @@
 #include "esp32s2/rom/usb/cdc_acm.h"
 #include "esp32s2/rom/usb/usb_common.h"
 #endif
+#if SOC_USB_SERIAL_JTAG_SUPPORTED
+#include "hal/usb_fsls_phy_ll.h"
+#endif
 #include "esp_rom_gpio.h"
 #include "esp_rom_uart.h"
 #include "esp_rom_sys.h"
@ -95,8 +98,12 @@ void bootloader_console_init(void)
 #endif

    esp_rom_uart_usb_acm_init(s_usb_cdc_buf, sizeof(s_usb_cdc_buf));
-    esp_rom_uart_set_as_console(ESP_ROM_UART_USB);
+    esp_rom_uart_set_as_console(ESP_ROM_USB_OTG_NUM);
    esp_rom_install_channel_putc(1, bootloader_console_write_char_usb);
+#if SOC_USB_SERIAL_JTAG_SUPPORTED
+    usb_fsls_phy_ll_usb_wrap_pad_enable(&USB_WRAP, true);
+    usb_fsls_phy_ll_int_otg_enable(&USB_WRAP);
+#endif
 }
 #endif //CONFIG_ESP_CONSOLE_USB_CDC

--- a/components/bootloader_support/src/bootloader_efuse.c
+++ b/components/bootloader_support/src/bootloader_efuse.c
@ -27,9 +27,6 @@ int bootloader_clock_get_rated_freq_mhz(void)
 #elif CONFIG_IDF_TARGET_ESP32C3
    return 160;

-#elif CONFIG_IDF_TARGET_ESP32H4
-    return 96;
-
 #elif CONFIG_IDF_TARGET_ESP32C6
    return 160;

--- a/components/bootloader_support/src/bootloader_panic.c
+++ b/components/bootloader_support/src/bootloader_panic.c
@ -26,9 +26,11 @@ void abort(void)
 #if !CONFIG_ESP_SYSTEM_PANIC_SILENT_REBOOT
    esp_rom_printf("abort() was called at PC 0x%08x\r\n", (intptr_t)__builtin_return_address(0) - 3);
 #endif
+#if CONFIG_ESP_DEBUG_OCDAWARE
    if (esp_cpu_dbgr_is_attached()) {
        esp_cpu_dbgr_break();
    }
+#endif
    while (1) {
    }
 }
--- a/components/bootloader_support/src/bootloader_random.c
+++ b/components/bootloader_support/src/bootloader_random.c
@ -8,6 +8,10 @@
 #include "esp_cpu.h"
 #include "soc/wdev_reg.h"

+#if SOC_LP_TIMER_SUPPORTED
+#include "hal/lp_timer_hal.h"
+#endif
+
 #ifndef BOOTLOADER_BUILD
 #include "esp_random.h"
 #include "esp_private/periph_ctrl.h"
@ -20,9 +24,14 @@
 #else

 #if !defined CONFIG_IDF_TARGET_ESP32S3
-#define RNG_CPU_WAIT_CYCLE_NUM (80 * 32 * 2) /* extra factor of 2 is precautionary */
+  #if (defined CONFIG_IDF_TARGET_ESP32C6 || defined CONFIG_IDF_TARGET_ESP32H2)
+    #define RNG_CPU_WAIT_CYCLE_NUM (80 * 16) // Keep the byte sampling frequency in the ~62KHz range which has been
+                                             // tested.
+  #else
+    #define RNG_CPU_WAIT_CYCLE_NUM (80 * 32 * 2) /* extra factor of 2 is precautionary */
+  #endif
 #else
-#define RNG_CPU_WAIT_CYCLE_NUM (80 * 23) /* 45 KHz reading frequency is the maximum we have tested so far on S3 */
+  #define RNG_CPU_WAIT_CYCLE_NUM (80 * 23) /* 45 KHz reading frequency is the maximum we have tested so far on S3 */
 #endif

 __attribute__((weak)) void bootloader_fill_random(void *buffer, size_t length)
@ -34,6 +43,21 @@
    assert(buffer != NULL);

    for (size_t i = 0; i < length; i++) {
+#if SOC_LP_TIMER_SUPPORTED
+        random = REG_READ(WDEV_RND_REG);
+        start = esp_cpu_get_cycle_count();
+        do {
+            random ^= REG_READ(WDEV_RND_REG);
+            now = esp_cpu_get_cycle_count();
+        } while (now - start < RNG_CPU_WAIT_CYCLE_NUM);
+
+        // XOR the RT slow clock, which is asynchronous, to add some entropy and improve
+        // the distribution
+        uint32_t current_rtc_timer_counter = (lp_timer_hal_get_cycle_count() & 0xFF);
+        random = random ^ current_rtc_timer_counter;
+
+        buffer_bytes[i] = random & 0xFF;
+#else
        if (i == 0 || i % 4 == 0) { /* redundant check is for a compiler warning */
            /* in bootloader with ADC feeding HWRNG, we accumulate 1
               bit of entropy per 40 APB cycles (==80 CPU cycles.)
@ -50,6 +74,7 @@
            } while (now - start < RNG_CPU_WAIT_CYCLE_NUM);
        }
        buffer_bytes[i] = random >> ((i % 4) * 8);
+#endif
    }
 }

--- a/components/bootloader_support/src/bootloader_random_esp32c6.c
+++ b/components/bootloader_support/src/bootloader_random_esp32c6.c
@ -1,22 +1,99 @@
 /*
- * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
 *
 * SPDX-License-Identifier: Apache-2.0
 */
 #include "sdkconfig.h"
 #include "bootloader_random.h"
+#include "soc/soc.h"
+#include "soc/pcr_reg.h"
+#include "soc/apb_saradc_reg.h"
+#include "soc/pmu_reg.h"
+#include "hal/regi2c_ctrl.h"
+#include "soc/regi2c_saradc.h"
 #include "esp_log.h"

-static const char *TAG = "bootloader_random";
+static const uint32_t SAR2_CHANNEL = 9;
+static const uint32_t PATTERN_BIT_WIDTH = 6;
+static const uint32_t SAR1_ATTEN = 1;
+static const uint32_t SAR2_ATTEN = 1;

 void bootloader_random_enable(void)
 {
-    // TODO: IDF-5352
-    ESP_EARLY_LOGW(TAG, "bootloader_random_enable() has not been implemented yet");
+    // pull SAR ADC out of reset
+    REG_SET_BIT(PCR_SARADC_CONF_REG, PCR_SARADC_RST_EN);
+    REG_CLR_BIT(PCR_SARADC_CONF_REG, PCR_SARADC_RST_EN);
+
+    // enable SAR ADC APB clock
+    REG_SET_BIT(PCR_SARADC_CONF_REG, PCR_SARADC_REG_CLK_EN);
+
+    // enable ADC_CTRL_CLK (SAR ADC function clock)
+    REG_SET_BIT(PCR_SARADC_CLKM_CONF_REG, PCR_SARADC_CLKM_EN);
+
+    // select XTAL clock (40 MHz) source for ADC_CTRL_CLK
+    REG_SET_FIELD(PCR_SARADC_CLKM_CONF_REG, PCR_SARADC_CLKM_SEL, 0);
+
+    // set the clock divider for ADC_CTRL_CLK to default value (in case it has been changed)
+    REG_SET_FIELD(PCR_SARADC_CLKM_CONF_REG, PCR_SARADC_CLKM_DIV_NUM, 0);
+
+    // some ADC sensor registers are in power group PERIF_I2C and need to be enabled via PMU
+    SET_PERI_REG_MASK(PMU_RF_PWC_REG, PMU_PERIF_I2C_RSTB);
+    SET_PERI_REG_MASK(PMU_RF_PWC_REG, PMU_XPD_PERIF_I2C);
+
+    // Config ADC circuit (Analog part) with I2C(HOST ID 0x69) and chose internal voltage as sampling source
+    REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SARADC_DTEST_RTC_ADDR , 2);
+    REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SARADC_ENT_RTC_ADDR   , 1);
+    REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SARADC1_ENCAL_REF_ADDR, 1);
+    REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SARADC2_ENCAL_REF_ADDR, 1);
+
+    REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SAR2_INITIAL_CODE_HIGH_ADDR, 0x08);
+    REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SAR2_INITIAL_CODE_LOW_ADDR, 0x66);
+    REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SAR1_INITIAL_CODE_HIGH_ADDR, 0x08);
+    REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SAR1_INITIAL_CODE_LOW_ADDR, 0x66);
+
+    // create patterns and set them in pattern table
+    uint32_t pattern_one = (SAR2_CHANNEL << 2) | SAR2_ATTEN; // we want channel 9 with max attenuation
+    uint32_t pattern_two = SAR1_ATTEN; // we want channel 0 with max attenuation, channel doesn't really matter here
+    uint32_t pattern_table = 0 | (pattern_two << 3 * PATTERN_BIT_WIDTH) | pattern_one << 2 * PATTERN_BIT_WIDTH;
+    REG_WRITE(APB_SARADC_SAR_PATT_TAB1_REG, pattern_table);
+
+    // set pattern length to 2 (APB_SARADC_SAR_PATT_LEN counts from 0)
+    REG_SET_FIELD(APB_SARADC_CTRL_REG, APB_SARADC_SARADC_SAR_PATT_LEN, 1);
+
+    // Same as in C3
+    REG_SET_FIELD(APB_SARADC_CTRL_REG, APB_SARADC_SARADC_SAR_CLK_DIV, 15);
+
+    // set timer expiry (timer is ADC_CTRL_CLK)
+    REG_SET_FIELD(APB_SARADC_CTRL2_REG, APB_SARADC_SARADC_TIMER_TARGET, 200);
+
+    // enable timer
+    REG_SET_BIT(APB_SARADC_CTRL2_REG, APB_SARADC_SARADC_TIMER_EN);
 }

 void bootloader_random_disable(void)
 {
-    // TODO: IDF-5352
-    ESP_EARLY_LOGW(TAG, "bootloader_random_enable() has not been implemented yet");
+    // disable timer
+    REG_CLR_BIT(APB_SARADC_CTRL2_REG, APB_SARADC_SARADC_TIMER_EN);
+
+    // Write reset value of this register
+    REG_WRITE(APB_SARADC_SAR_PATT_TAB1_REG, 0xFFFFFF);
+
+    // Revert ADC I2C configuration and initial voltage source setting
+    REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SAR2_INITIAL_CODE_HIGH_ADDR, 0x60);
+    REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SAR2_INITIAL_CODE_LOW_ADDR, 0x0);
+    REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SAR1_INITIAL_CODE_HIGH_ADDR, 0x60);
+    REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SAR1_INITIAL_CODE_LOW_ADDR, 0x0);
+    REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SARADC_DTEST_RTC_ADDR, 0);
+    REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SARADC_ENT_RTC_ADDR, 0);
+    REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SARADC1_ENCAL_REF_ADDR, 0);
+    REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SARADC2_ENCAL_REF_ADDR, 0);
+
+    // Revert PMU_RF_PWC_REG to it's initial value
+    CLEAR_PERI_REG_MASK(PMU_RF_PWC_REG, PMU_PERIF_I2C_RSTB);
+
+    // disable ADC_CTRL_CLK (SAR ADC function clock)
+    REG_WRITE(PCR_SARADC_CLKM_CONF_REG, 0x00404000);
+
+    // Set PCR_SARADC_CONF_REG to initial state
+    REG_WRITE(PCR_SARADC_CONF_REG, 0x5);
 }
--- a/components/bootloader_support/src/bootloader_random_esp32h2.c
+++ b/components/bootloader_support/src/bootloader_random_esp32h2.c
@ -1,21 +1,88 @@
 /*
- * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
 *
 * SPDX-License-Identifier: Apache-2.0
 */
 #include "sdkconfig.h"
 #include "bootloader_random.h"
+#include "soc/soc.h"
+#include "soc/pcr_reg.h"
+#include "soc/apb_saradc_reg.h"
+#include "soc/pmu_reg.h"
+#include "hal/regi2c_ctrl.h"
+#include "soc/regi2c_saradc.h"
 #include "esp_log.h"

-static const char *TAG = "bootloader_random";
+static const uint32_t SAR2_CHANNEL = 9;
+static const uint32_t PATTERN_BIT_WIDTH = 6;
+static const uint32_t SAR1_ATTEN = 1;
+static const uint32_t SAR2_ATTEN = 1;
+
 void bootloader_random_enable(void)
 {
-    // ESP32H2-TODO: IDF-6274
-    ESP_EARLY_LOGW(TAG, "bootloader_random_enable() has not been implemented yet");
+    REG_SET_BIT(PCR_SARADC_CONF_REG, PCR_SARADC_RST_EN);
+    REG_CLR_BIT(PCR_SARADC_CONF_REG, PCR_SARADC_RST_EN);
+
+    REG_SET_BIT(PCR_SARADC_CONF_REG, PCR_SARADC_REG_CLK_EN);
+
+    REG_SET_BIT(PCR_SARADC_CLKM_CONF_REG, PCR_SARADC_CLKM_EN);
+
+    // select XTAL clock (40 MHz) source for ADC_CTRL_CLK
+    REG_SET_FIELD(PCR_SARADC_CLKM_CONF_REG, PCR_SARADC_CLKM_SEL, 0);
+
+    REG_SET_FIELD(PCR_SARADC_CLKM_CONF_REG, PCR_SARADC_CLKM_DIV_NUM, 0);
+
+    // some ADC sensor registers are in power group PERIF_I2C and need to be enabled via PMU
+    SET_PERI_REG_MASK(PMU_RF_PWC_REG, PMU_XPD_PERIF_I2C);
+
+    REGI2C_WRITE_MASK(I2C_SAR_ADC, I2C_SARADC_DTEST, 0);
+    REGI2C_WRITE_MASK(I2C_SAR_ADC, I2C_SARADC_ENT_SAR, 1);
+    REGI2C_WRITE_MASK(I2C_SAR_ADC, I2C_SARADC_EN_TOUT_SAR1_BUS, 1);
+
+    REGI2C_WRITE_MASK(I2C_SAR_ADC, I2C_SARADC_SAR2_INIT_CODE_MSB, 0X08);
+    REGI2C_WRITE_MASK(I2C_SAR_ADC, I2C_SARADC_SAR2_INIT_CODE_LSB, 0X66);
+    REGI2C_WRITE_MASK(I2C_SAR_ADC, I2C_SARADC_SAR1_INIT_CODE_MSB, 0X08);
+    REGI2C_WRITE_MASK(I2C_SAR_ADC, I2C_SARADC_SAR1_INIT_CODE_LSB, 0X66);
+
+    // create patterns and set them in pattern table
+    uint32_t pattern_one = (SAR2_CHANNEL << 2) | SAR2_ATTEN;
+    uint32_t pattern_two = SAR1_ATTEN; // we want channel 0 with max attenuation, channel doesn't really matter here
+    uint32_t pattern_table = 0 | (pattern_two << 3 * PATTERN_BIT_WIDTH) | pattern_one << 2 * PATTERN_BIT_WIDTH;
+    REG_WRITE(APB_SARADC_SAR_PATT_TAB1_REG, pattern_table);
+
+    // set pattern length to 2 (APB_SARADC_SAR_PATT_LEN counts from 0)
+    REG_SET_FIELD(APB_SARADC_CTRL_REG, APB_SARADC_SARADC_SAR_PATT_LEN, 0);
+
+    // Same as in C3
+    REG_SET_FIELD(APB_SARADC_CTRL_REG, APB_SARADC_SARADC_SAR_CLK_DIV, 15);
+
+    // set timer expiry (timer is ADC_CTRL_CLK)
+    REG_SET_FIELD(APB_SARADC_CTRL2_REG, APB_SARADC_SARADC_TIMER_TARGET, 200);
+
+    // ENABLE_TIMER
+    REG_SET_BIT(APB_SARADC_CTRL2_REG, APB_SARADC_SARADC_TIMER_EN);
 }

 void bootloader_random_disable(void)
 {
-    // ESP32H2-TODO: IDF-6274
-    ESP_EARLY_LOGW(TAG, "bootloader_random_disable() has not been implemented yet");
+    // disable timer
+    REG_CLR_BIT(APB_SARADC_CTRL2_REG, APB_SARADC_SARADC_TIMER_EN);
+
+    // Write reset value of this register
+    REG_WRITE(APB_SARADC_SAR_PATT_TAB1_REG, 0xFFFFFF);
+
+    // Revert ADC I2C configuration and initial voltage source setting
+    REGI2C_WRITE_MASK(I2C_SAR_ADC, I2C_SARADC_SAR2_INIT_CODE_MSB, 0x60);
+    REGI2C_WRITE_MASK(I2C_SAR_ADC, I2C_SARADC_SAR2_INIT_CODE_LSB, 0x0);
+    REGI2C_WRITE_MASK(I2C_SAR_ADC, I2C_SARADC_SAR1_INIT_CODE_MSB, 0x60);
+    REGI2C_WRITE_MASK(I2C_SAR_ADC, I2C_SARADC_SAR1_INIT_CODE_LSB, 0x0);
+    REGI2C_WRITE_MASK(I2C_SAR_ADC, I2C_SARADC_DTEST, 0);
+    REGI2C_WRITE_MASK(I2C_SAR_ADC, I2C_SARADC_ENT_SAR, 0);
+    REGI2C_WRITE_MASK(I2C_SAR_ADC, I2C_SARADC_EN_TOUT_SAR1_BUS, 0);
+
+    // disable ADC_CTRL_CLK (SAR ADC function clock)
+    REG_WRITE(PCR_SARADC_CLKM_CONF_REG, 0x00404000);
+
+    // Set PCR_SARADC_CONF_REG to initial state
+    REG_WRITE(PCR_SARADC_CONF_REG, 0x5);
 }
--- a/components/bootloader_support/src/bootloader_random_esp32h4.c
+++ b/components/bootloader_support/src/bootloader_random_esp32h4.c
@ -1,24 +0,0 @@
-/*
- * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-#include "sdkconfig.h"
-#include "bootloader_random.h"
-#include "esp_log.h"
-#include "soc/syscon_reg.h"
-#include "soc/rtc_cntl_reg.h"
-#include "soc/apb_saradc_reg.h"
-#include "soc/system_reg.h"
-#include "esp_private/regi2c_ctrl.h"
-
-// ESP32H4-TODO: IDF-3381
-void bootloader_random_enable(void)
-{
-
-}
-
-void bootloader_random_disable(void)
-{
-
-}
--- a/components/bootloader_support/src/bootloader_utility.c
+++ b/components/bootloader_support/src/bootloader_utility.c
@ -28,12 +28,6 @@
 #include "esp32c3/rom/uart.h"
 #include "esp32c3/rom/gpio.h"
 #include "esp32c3/rom/secure_boot.h"
-#elif CONFIG_IDF_TARGET_ESP32H4
-#include "esp32h4/rom/efuse.h"
-#include "esp32h4/rom/crc.h"
-#include "esp32h4/rom/uart.h"
-#include "esp32h4/rom/gpio.h"
-#include "esp32h4/rom/secure_boot.h"
 #elif CONFIG_IDF_TARGET_ESP32C2
 #include "esp32c2/rom/efuse.h"
 #include "esp32c2/rom/crc.h"
--- a/components/bootloader_support/src/esp32/bootloader_soc.c
+++ b/components/bootloader_support/src/esp32/bootloader_soc.c
@ -3,18 +3,10 @@
 *
 * SPDX-License-Identifier: Apache-2.0
 */
+
 #include <stdbool.h>

-void bootloader_ana_super_wdt_reset_config(bool enable)
-{
-    (void)enable;
-}
-
-void bootloader_ana_bod_reset_config(bool enable)
-{
-    (void)enable;
-}
-
+//Not supported but common bootloader calls the function. Do nothing
 void bootloader_ana_clock_glitch_reset_config(bool enable)
 {
    (void)enable;
--- a/components/bootloader_support/src/esp32c2/bootloader_esp32c2.c
+++ b/components/bootloader_support/src/esp32c2/bootloader_esp32c2.c
@ -34,6 +34,7 @@
 #include "bootloader_mem.h"
 #include "bootloader_console.h"
 #include "bootloader_flash_priv.h"
+#include "bootloader_soc.h"
 #include "esp_private/bootloader_flash_internal.h"
 #include "esp_efuse.h"
 #include "hal/mmu_hal.h"
@ -78,10 +79,19 @@ static void bootloader_super_wdt_auto_feed(void)
    REG_WRITE(RTC_CNTL_SWD_WPROTECT_REG, 0);
 }

+static inline void bootloader_ana_reset_config(void)
+{
+    //Enable super WDT reset.
+    bootloader_ana_super_wdt_reset_config(true);
+    //Enable BOD reset
+    bootloader_ana_bod_reset_config(true);
+}
+
 esp_err_t bootloader_init(void)
 {
    esp_err_t ret = ESP_OK;

+    bootloader_ana_reset_config();
    bootloader_super_wdt_auto_feed();

 // In RAM_APP, memory will be initialized in `call_start_cpu0`
--- a/components/bootloader_support/src/esp32c2/bootloader_soc.c
+++ b/components/bootloader_support/src/esp32c2/bootloader_soc.c
@ -3,19 +3,34 @@
 *
 * SPDX-License-Identifier: Apache-2.0
 */
+
 #include <stdbool.h>
+#include "soc/rtc_cntl_reg.h"

 void bootloader_ana_super_wdt_reset_config(bool enable)
 {
-    (void)enable; // ESP32-C2 has none of these features.
+    REG_CLR_BIT(RTC_CNTL_FIB_SEL_REG, RTC_CNTL_FIB_SUPER_WDT_RST);
+
+    if (enable) {
+        REG_CLR_BIT(RTC_CNTL_SWD_CONF_REG, RTC_CNTL_SWD_BYPASS_RST);
+    } else {
+        REG_SET_BIT(RTC_CNTL_SWD_CONF_REG, RTC_CNTL_SWD_BYPASS_RST);
+    }
 }

 void bootloader_ana_bod_reset_config(bool enable)
 {
-    (void)enable; // ESP32-C2 has none of these features.
+    REG_CLR_BIT(RTC_CNTL_FIB_SEL_REG, RTC_CNTL_FIB_BOD_RST);
+
+    if (enable) {
+        REG_SET_BIT(RTC_CNTL_BROWN_OUT_REG, RTC_CNTL_BROWN_OUT_ANA_RST_EN);
+    } else {
+        REG_CLR_BIT(RTC_CNTL_BROWN_OUT_REG, RTC_CNTL_BROWN_OUT_ANA_RST_EN);
+    }
 }

+//Not supported but common bootloader calls the function. Do nothing
 void bootloader_ana_clock_glitch_reset_config(bool enable)
 {
-    (void)enable; // ESP32-C2 has none of these features.
+    (void)enable;
 }
--- a/components/bootloader_support/src/esp32c3/bootloader_esp32c3.c
+++ b/components/bootloader_support/src/esp32c3/bootloader_esp32c3.c
@ -96,29 +96,29 @@ static inline void bootloader_hardware_init(void)

 static inline void bootloader_ana_reset_config(void)
 {
+    //Enable super WDT reset.
+    bootloader_ana_super_wdt_reset_config(true);
+
    /*
-      For origin chip & ECO1: only support swt reset;
-      For ECO2: fix brownout reset bug, support swt & brownout reset;
-      For ECO3: fix clock glitch reset bug, support all reset, include: swt & brownout & clock glitch reset.
+      For origin chip & ECO1: brownout & clock glitch reset not available
+      For ECO2: fix brownout reset bug
+      For ECO3: fix clock glitch reset bug
    */
    switch (efuse_hal_chip_revision()) {
        case 0:
        case 1:
-            //Enable WDT reset. Disable BOR and GLITCH reset
-            bootloader_ana_super_wdt_reset_config(true);
+            //Disable BOD and GLITCH reset
            bootloader_ana_bod_reset_config(false);
            bootloader_ana_clock_glitch_reset_config(false);
            break;
        case 2:
-            //Enable WDT and BOR reset. Disable GLITCH reset
-            bootloader_ana_super_wdt_reset_config(true);
+            //Enable BOD reset. Disable GLITCH reset
            bootloader_ana_bod_reset_config(true);
            bootloader_ana_clock_glitch_reset_config(false);
            break;
        case 3:
        default:
-            //Enable WDT, BOR, and GLITCH reset
-            bootloader_ana_super_wdt_reset_config(true);
+            //Enable BOD, and GLITCH reset
            bootloader_ana_bod_reset_config(true);
            bootloader_ana_clock_glitch_reset_config(true);
            break;
--- a/components/bootloader_support/src/esp32c3/bootloader_soc.c
+++ b/components/bootloader_support/src/esp32c3/bootloader_soc.c
@ -12,15 +12,15 @@ void bootloader_ana_super_wdt_reset_config(bool enable)
    REG_CLR_BIT(RTC_CNTL_FIB_SEL_REG, RTC_CNTL_FIB_SUPER_WDT_RST);

    if (enable) {
-        REG_SET_BIT(RTC_CNTL_SWD_CONF_REG, RTC_CNTL_SWD_BYPASS_RST);
-    } else {
        REG_CLR_BIT(RTC_CNTL_SWD_CONF_REG, RTC_CNTL_SWD_BYPASS_RST);
+    } else {
+        REG_SET_BIT(RTC_CNTL_SWD_CONF_REG, RTC_CNTL_SWD_BYPASS_RST);
    }
 }

 void bootloader_ana_bod_reset_config(bool enable)
 {
-    REG_CLR_BIT(RTC_CNTL_FIB_SEL_REG, RTC_CNTL_FIB_BOR_RST);
+    REG_CLR_BIT(RTC_CNTL_FIB_SEL_REG, RTC_CNTL_FIB_BOD_RST);

    if (enable) {
        REG_SET_BIT(RTC_CNTL_BROWN_OUT_REG, RTC_CNTL_BROWN_OUT_ANA_RST_EN);
--- a/components/bootloader_support/src/esp32c6/bootloader_esp32c6.c
+++ b/components/bootloader_support/src/esp32c6/bootloader_esp32c6.c
@ -103,33 +103,10 @@ static inline void bootloader_hardware_init(void)

 static inline void bootloader_ana_reset_config(void)
 {
-    // TODO: IDF-5990 copied from C3, need update
-    // Have removed bootloader_ana_super_wdt_reset_config for now; can be evaluated later to see whether needs to add it back
-    /*
-      For origin chip & ECO1: only support swt reset;
-      For ECO2: fix brownout reset bug, support swt & brownout reset;
-      For ECO3: fix clock glitch reset bug, support all reset, include: swt & brownout & clock glitch reset.
-    */
-    uint8_t chip_version = efuse_hal_get_minor_chip_version();
-    switch (chip_version) {
-        case 0:
-        case 1:
-            //Disable BOR and GLITCH reset
-            bootloader_ana_bod_reset_config(false);
-            bootloader_ana_clock_glitch_reset_config(false);
-            break;
-        case 2:
-            //Enable BOR reset. Disable GLITCH reset
-            bootloader_ana_bod_reset_config(true);
-            bootloader_ana_clock_glitch_reset_config(false);
-            break;
-        case 3:
-        default:
-            //Enable BOR, and GLITCH reset
-            bootloader_ana_bod_reset_config(true);
-            bootloader_ana_clock_glitch_reset_config(true);
-            break;
-    }
+    //Enable super WDT reset.
+    bootloader_ana_super_wdt_reset_config(true);
+    //Enable BOD reset
+    bootloader_ana_bod_reset_config(true);
 }

 esp_err_t bootloader_init(void)
--- a/components/bootloader_support/src/esp32c6/bootloader_soc.c
+++ b/components/bootloader_support/src/esp32c6/bootloader_soc.c
@ -1,15 +1,24 @@
 /*
- * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
 *
 * SPDX-License-Identifier: Apache-2.0
 */
 #include <stdbool.h>
+#include <assert.h>
 #include "soc/soc.h"
 #include "soc/lp_analog_peri_reg.h"

+void bootloader_ana_super_wdt_reset_config(bool enable)
+{
+    //C6 doesn't support bypass super WDT reset
+    assert(enable);
+    REG_CLR_BIT(LP_ANALOG_PERI_LP_ANA_FIB_ENABLE_REG, LP_ANALOG_PERI_LP_ANA_FIB_SUPER_WDT_RST);
+}
+
 void bootloader_ana_bod_reset_config(bool enable)
 {
-    REG_CLR_BIT(LP_ANALOG_PERI_LP_ANA_FIB_ENABLE_REG, LP_ANALOG_PERI_LP_ANA_FIB_BOR_RST);
+    REG_CLR_BIT(LP_ANALOG_PERI_LP_ANA_FIB_ENABLE_REG, LP_ANALOG_PERI_LP_ANA_FIB_BOD_RST);
+
    if (enable) {
        REG_SET_BIT(LP_ANALOG_PERI_LP_ANA_BOD_MODE1_CNTL_REG, LP_ANALOG_PERI_LP_ANA_BOD_MODE1_RESET_ENA);
    } else {
@ -17,12 +26,8 @@ void bootloader_ana_bod_reset_config(bool enable)
    }
 }

+//Not supported but common bootloader calls the function. Do nothing
 void bootloader_ana_clock_glitch_reset_config(bool enable)
 {
-    REG_CLR_BIT(LP_ANALOG_PERI_LP_ANA_FIB_ENABLE_REG, LP_ANALOG_PERI_LP_ANA_FIB_GLITCH_RST);
-    if (enable) {
-        REG_SET_BIT(LP_ANALOG_PERI_LP_ANA_CK_GLITCH_CNTL_REG, LP_ANALOG_PERI_LP_ANA_CK_GLITCH_RESET_ENA);
-    } else {
-        REG_CLR_BIT(LP_ANALOG_PERI_LP_ANA_CK_GLITCH_CNTL_REG, LP_ANALOG_PERI_LP_ANA_CK_GLITCH_RESET_ENA);
-    }
+    (void)enable;
 }
--- a/components/bootloader_support/src/esp32h2/bootloader_esp32h2.c
+++ b/components/bootloader_support/src/esp32h2/bootloader_esp32h2.c
@ -86,40 +86,16 @@ static void bootloader_super_wdt_auto_feed(void)

 static inline void bootloader_hardware_init(void)
 {
-    // TODO: IDF-6267
    /* Enable analog i2c master clock */
    SET_PERI_REG_MASK(MODEM_LPCON_CLK_CONF_REG, MODEM_LPCON_CLK_I2C_MST_EN);
 }

 static inline void bootloader_ana_reset_config(void)
 {
-    // TODO: IDF-5990 copied from C6, need update
-    // Have removed bootloader_ana_super_wdt_reset_config for now; can be evaluated later to see whether needs to add it back
-    /*
-      For origin chip & ECO1: only support swt reset;
-      For ECO2: fix brownout reset bug, support swt & brownout reset;
-      For ECO3: fix clock glitch reset bug, support all reset, include: swt & brownout & clock glitch reset.
-    */
-    uint8_t chip_version = efuse_hal_get_minor_chip_version();
-    switch (chip_version) {
-        case 0:
-        case 1:
-            //Disable BOR and GLITCH reset
-            bootloader_ana_bod_reset_config(false);
-            bootloader_ana_clock_glitch_reset_config(false);
-            break;
-        case 2:
-            //Enable BOR reset. Disable GLITCH reset
-            bootloader_ana_bod_reset_config(true);
-            bootloader_ana_clock_glitch_reset_config(false);
-            break;
-        case 3:
-        default:
-            //Enable BOR, and GLITCH reset
-            bootloader_ana_bod_reset_config(true);
-            bootloader_ana_clock_glitch_reset_config(true);
-            break;
-    }
+    //Enable super WDT reset.
+    bootloader_ana_super_wdt_reset_config(true);
+    //Enable BOD reset
+    bootloader_ana_bod_reset_config(true);
 }

 esp_err_t bootloader_init(void)
--- a/components/bootloader_support/src/esp32h2/bootloader_soc.c
+++ b/components/bootloader_support/src/esp32h2/bootloader_soc.c
@ -1,20 +1,22 @@
 /*
- * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
 *
 * SPDX-License-Identifier: Apache-2.0
 */
 #include <stdbool.h>
-#include "soc/soc.h"
 #include "soc/lp_analog_peri_reg.h"

 void bootloader_ana_super_wdt_reset_config(bool enable)
 {
-    // ESP32H2 has removed the super wdt
+    //H2 doesn't support bypass super WDT reset
+    assert(enable);
+    REG_CLR_BIT(LP_ANALOG_PERI_LP_ANA_FIB_ENABLE_REG, LP_ANALOG_PERI_LP_ANA_FIB_SUPER_WDT_RST);
 }

 void bootloader_ana_bod_reset_config(bool enable)
 {
-    REG_CLR_BIT(LP_ANALOG_PERI_LP_ANA_FIB_ENABLE_REG, LP_ANALOG_PERI_LP_ANA_FIB_BOR_RST);
+    REG_CLR_BIT(LP_ANALOG_PERI_LP_ANA_FIB_ENABLE_REG, LP_ANALOG_PERI_LP_ANA_FIB_BOD_RST);
+
    if (enable) {
        REG_SET_BIT(LP_ANALOG_PERI_LP_ANA_BOD_MODE1_CNTL_REG, LP_ANALOG_PERI_LP_ANA_BOD_MODE1_RESET_ENA);
    } else {
@ -22,12 +24,8 @@ void bootloader_ana_bod_reset_config(bool enable)
    }
 }

+//Not supported but common bootloader calls the function. Do nothing
 void bootloader_ana_clock_glitch_reset_config(bool enable)
 {
-    REG_CLR_BIT(LP_ANALOG_PERI_LP_ANA_FIB_ENABLE_REG, LP_ANALOG_PERI_LP_ANA_FIB_GLITCH_RST);
-    if (enable) {
-        REG_SET_BIT(LP_ANALOG_PERI_LP_ANA_CK_GLITCH_CNTL_REG, LP_ANALOG_PERI_LP_ANA_CK_GLITCH_RESET_ENA);
-    } else {
-        REG_CLR_BIT(LP_ANALOG_PERI_LP_ANA_CK_GLITCH_CNTL_REG, LP_ANALOG_PERI_LP_ANA_CK_GLITCH_RESET_ENA);
-    }
+    (void)enable;
 }
--- a/components/bootloader_support/src/esp32h4/bootloader_esp32h4.c
+++ b/components/bootloader_support/src/esp32h4/bootloader_esp32h4.c
@ -1,155 +0,0 @@
-/*
- * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-#include <stdint.h>
-#include "sdkconfig.h"
-#include "esp_attr.h"
-#include "esp_log.h"
-#include "esp_image_format.h"
-#include "flash_qio_mode.h"
-#include "esp_rom_gpio.h"
-#include "esp_rom_efuse.h"
-#include "esp_rom_uart.h"
-#include "esp_rom_sys.h"
-#include "esp_rom_spiflash.h"
-#include "soc/efuse_reg.h"
-#include "soc/gpio_sig_map.h"
-#include "soc/io_mux_reg.h"
-#include "soc/assist_debug_reg.h"
-#include "esp_cpu.h"
-#include "soc/rtc.h"
-#include "soc/rtc_cntl_reg.h"
-#include "soc/spi_periph.h"
-#include "soc/extmem_reg.h"
-#include "soc/io_mux_reg.h"
-#include "soc/system_reg.h"
-#include "esp32h4/rom/efuse.h"
-#include "esp32h4/rom/ets_sys.h"
-#include "bootloader_common.h"
-#include "bootloader_init.h"
-#include "bootloader_clock.h"
-#include "bootloader_flash_config.h"
-#include "bootloader_mem.h"
-#include "bootloader_console.h"
-#include "bootloader_flash_priv.h"
-#include "bootloader_soc.h"
-#include "esp_private/bootloader_flash_internal.h"
-#include "hal/mmu_hal.h"
-#include "hal/cache_hal.h"
-
-static const char *TAG = "boot.esp32h4";
-
-static void wdt_reset_cpu0_info_enable(void)
-{
-    REG_SET_BIT(SYSTEM_CPU_PERI_CLK_EN_REG, SYSTEM_CLK_EN_ASSIST_DEBUG);
-    REG_CLR_BIT(SYSTEM_CPU_PERI_RST_EN_REG, SYSTEM_RST_EN_ASSIST_DEBUG);
-    REG_WRITE(ASSIST_DEBUG_CORE_0_RCD_EN_REG, ASSIST_DEBUG_CORE_0_RCD_PDEBUGEN | ASSIST_DEBUG_CORE_0_RCD_RECORDEN);
-}
-
-static void wdt_reset_info_dump(int cpu)
-{
-    (void) cpu;
-    // saved PC was already printed by the ROM bootloader.
-    // nothing to do here.
-}
-
-static void bootloader_check_wdt_reset(void)
-{
-    int wdt_rst = 0;
-    soc_reset_reason_t rst_reason = esp_rom_get_reset_reason(0);
-    if (rst_reason == RESET_REASON_CORE_RTC_WDT || rst_reason == RESET_REASON_CORE_MWDT0 || rst_reason == RESET_REASON_CORE_MWDT1 ||
-        rst_reason == RESET_REASON_CPU0_MWDT0 || rst_reason == RESET_REASON_CPU0_MWDT1 || rst_reason == RESET_REASON_CPU0_RTC_WDT) {
-        ESP_LOGW(TAG, "PRO CPU has been reset by WDT.");
-        wdt_rst = 1;
-    }
-    if (wdt_rst) {
-        // if reset by WDT dump info from trace port
-        wdt_reset_info_dump(0);
-    }
-    wdt_reset_cpu0_info_enable();
-}
-
-static void bootloader_super_wdt_auto_feed(void)
-{
-    REG_WRITE(RTC_CNTL_SWD_WPROTECT_REG, RTC_CNTL_SWD_WKEY_VALUE);
-    REG_SET_BIT(RTC_CNTL_SWD_CONF_REG, RTC_CNTL_SWD_AUTO_FEED_EN);
-    REG_WRITE(RTC_CNTL_SWD_WPROTECT_REG, 0);
-}
-
-static inline void bootloader_hardware_init(void)
-{
-
-}
-
-static inline void bootloader_ana_reset_config(void)
-{
-    //Enable WDT, BOR, and GLITCH reset
-    bootloader_ana_super_wdt_reset_config(true);
-    bootloader_ana_bod_reset_config(true);
-    bootloader_ana_clock_glitch_reset_config(true);
-}
-
-esp_err_t bootloader_init(void)
-{
-    esp_err_t ret = ESP_OK;
-
-    bootloader_hardware_init();
-    bootloader_ana_reset_config();
-    bootloader_super_wdt_auto_feed();
-
-// In RAM_APP, memory will be initialized in `call_start_cpu0`
-#if !CONFIG_APP_BUILD_TYPE_RAM
-    // protect memory region
-    bootloader_init_mem();
-    /* check that static RAM is after the stack */
-    assert(&_bss_start <= &_bss_end);
-    assert(&_data_start <= &_data_end);
-    // clear bss section
-    bootloader_clear_bss_section();
-#endif // !CONFIG_APP_BUILD_TYPE_RAM
-
-    // config clock
-    bootloader_clock_configure();
-    // initialize console, from now on, we can use esp_log
-    bootloader_console_init();
-    /* print 2nd bootloader banner */
-    bootloader_print_banner();
-
-#if !CONFIG_APP_BUILD_TYPE_PURE_RAM_APP
-    //init cache hal
-    cache_hal_init();   //TODO IDF-4649
-    //init mmu
-    mmu_hal_init();
-    // update flash ID
-    bootloader_flash_update_id();
-    // Check and run XMC startup flow
-    if ((ret = bootloader_flash_xmc_startup()) != ESP_OK) {
-        ESP_LOGE(TAG, "failed when running XMC startup flow, reboot!");
-        return ret;
-    }
-#if !CONFIG_APP_BUILD_TYPE_RAM
-    // read bootloader header
-    if ((ret = bootloader_read_bootloader_header()) != ESP_OK) {
-        return ret;
-    }
-    // read chip revision and check if it's compatible to bootloader
-    if ((ret = bootloader_check_bootloader_validity()) != ESP_OK) {
-        return ret;
-    }
-#endif // !CONFIG_APP_BUILD_TYPE_RAM
-    // initialize spi flash
-    if ((ret = bootloader_init_spi_flash()) != ESP_OK) {
-        return ret;
-    }
-#endif // #if !CONFIG_APP_BUILD_TYPE_PURE_RAM_APP
-
-    // check whether a WDT reset happend
-    bootloader_check_wdt_reset();
-    // config WDT
-    bootloader_config_wdt();
-    // enable RNG early entropy source
-    bootloader_enable_random();
-    return ret;
-}
--- a/components/bootloader_support/src/esp32h4/bootloader_sha.c
+++ b/components/bootloader_support/src/esp32h4/bootloader_sha.c
@ -1,40 +0,0 @@
-/*
- * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-#include "bootloader_sha.h"
-#include <stdbool.h>
-#include <string.h>
-#include <assert.h>
-#include <sys/param.h>
-
-#include "esp32h4/rom/sha.h"
-
-static SHA_CTX ctx;
-
-bootloader_sha256_handle_t bootloader_sha256_start()
-{
-    // Enable SHA hardware
-    ets_sha_enable();
-    ets_sha_init(&ctx, SHA2_256);
-    return &ctx; // Meaningless non-NULL value
-}
-
-void bootloader_sha256_data(bootloader_sha256_handle_t handle, const void *data, size_t data_len)
-{
-    assert(handle != NULL);
-    assert(data_len % 4 == 0);
-    ets_sha_update(&ctx, data, data_len, false);
-}
-
-void bootloader_sha256_finish(bootloader_sha256_handle_t handle, uint8_t *digest)
-{
-    assert(handle != NULL);
-
-    if (digest == NULL) {
-        bzero(&ctx, sizeof(ctx));
-        return;
-    }
-    ets_sha_finish(&ctx, digest);
-}
--- a/components/bootloader_support/src/esp32h4/bootloader_soc.c
+++ b/components/bootloader_support/src/esp32h4/bootloader_soc.c
@ -1,41 +0,0 @@
-/*
- * SPDX-FileCopyrightText: 2019-2021 Espressif Systems (Shanghai) CO LTD
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-#include <stdbool.h>
-#include "soc/soc.h"
-#include "soc/rtc_cntl_reg.h"
-
-void bootloader_ana_super_wdt_reset_config(bool enable)
-{
-    REG_CLR_BIT(RTC_CNTL_FIB_SEL_REG, RTC_CNTL_FIB_SUPER_WDT_RST);
-
-    if (enable) {
-        REG_SET_BIT(RTC_CNTL_SWD_CONF_REG, RTC_CNTL_SWD_BYPASS_RST);
-    } else {
-        REG_CLR_BIT(RTC_CNTL_SWD_CONF_REG, RTC_CNTL_SWD_BYPASS_RST);
-    }
-}
-
-void bootloader_ana_bod_reset_config(bool enable)
-{
-    REG_CLR_BIT(RTC_CNTL_FIB_SEL_REG, RTC_CNTL_FIB_BOR_RST);
-
-    if (enable) {
-        REG_SET_BIT(RTC_CNTL_BROWN_OUT_REG, RTC_CNTL_BROWN_OUT_ANA_RST_EN);
-    } else {
-        REG_CLR_BIT(RTC_CNTL_BROWN_OUT_REG, RTC_CNTL_BROWN_OUT_ANA_RST_EN);
-    }
-}
-
-void bootloader_ana_clock_glitch_reset_config(bool enable)
-{
-    REG_CLR_BIT(RTC_CNTL_FIB_SEL_REG, RTC_CNTL_FIB_GLITCH_RST);
-
-    if (enable) {
-        REG_SET_BIT(RTC_CNTL_ANA_CONF_REG, RTC_CNTL_GLITCH_RST_EN);
-    } else {
-        REG_CLR_BIT(RTC_CNTL_ANA_CONF_REG, RTC_CNTL_GLITCH_RST_EN);
-    }
-}
--- a/components/bootloader_support/src/esp32h4/flash_encryption_secure_features.c
+++ b/components/bootloader_support/src/esp32h4/flash_encryption_secure_features.c
@ -1,59 +0,0 @@
-/*
- * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-
-#include <strings.h>
-#include "esp_flash_encrypt.h"
-#include "esp_secure_boot.h"
-#include "esp_efuse.h"
-#include "esp_efuse_table.h"
-#include "esp_log.h"
-#include "sdkconfig.h"
-
-static __attribute__((unused)) const char *TAG = "flash_encrypt";
-
-esp_err_t esp_flash_encryption_enable_secure_features(void)
-{
-#ifndef CONFIG_SECURE_FLASH_UART_BOOTLOADER_ALLOW_ENC
-    ESP_LOGI(TAG, "Disable UART bootloader encryption...");
-    esp_efuse_write_field_bit(ESP_EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT);
-#else
-    ESP_LOGW(TAG, "Not disabling UART bootloader encryption");
-#endif
-
-#ifndef CONFIG_SECURE_FLASH_UART_BOOTLOADER_ALLOW_CACHE
-    ESP_LOGI(TAG, "Disable UART bootloader cache...");
-    esp_efuse_write_field_bit(ESP_EFUSE_DIS_DOWNLOAD_ICACHE);
-#else
-    ESP_LOGW(TAG, "Not disabling UART bootloader cache - SECURITY COMPROMISED");
-#endif
-
-#ifndef CONFIG_SECURE_BOOT_ALLOW_JTAG
-    ESP_LOGI(TAG, "Disable JTAG...");
-    esp_efuse_write_field_bit(ESP_EFUSE_DIS_PAD_JTAG);
-    esp_efuse_write_field_bit(ESP_EFUSE_DIS_USB_JTAG);
-#else
-    ESP_LOGW(TAG, "Not disabling JTAG - SECURITY COMPROMISED");
-#endif
-
-    esp_efuse_write_field_bit(ESP_EFUSE_DIS_DIRECT_BOOT);
-
-#if defined(CONFIG_SECURE_BOOT_V2_ENABLED) && !defined(CONFIG_SECURE_BOOT_V2_ALLOW_EFUSE_RD_DIS)
-    // This bit is set when enabling Secure Boot V2, but we can't enable it until this later point in the first boot
-    // otherwise the Flash Encryption key cannot be read protected
-    esp_efuse_write_field_bit(ESP_EFUSE_WR_DIS_RD_DIS);
-#endif
-
-#ifndef CONFIG_SECURE_FLASH_SKIP_WRITE_PROTECTION_CACHE
-    // Set write-protection for DIS_ICACHE to prevent bricking chip in case it will be set accidentally.
-    // esp32h4 has DIS_ICACHE. Write-protection bit = 2.
-    // List of eFuses with the same write protection bit:
-    // DIS_ICACHE, DIS_USB_JTAG, POWERGLITCH_EN, DIS_FORCE_DOWNLOAD, SPI_DOWNLOAD_MSPI_DIS,
-    // DIS_TWAI, JTAG_SEL_ENABLE, DIS_PAD_JTAG, DIS_DOWNLOAD_MANUAL_ENCRYPT
-    esp_efuse_write_field_bit(ESP_EFUSE_WR_DIS_DIS_ICACHE);
-#endif
-
-    return ESP_OK;
-}
--- a/components/bootloader_support/src/esp32h4/secure_boot_secure_features.c
+++ b/components/bootloader_support/src/esp32h4/secure_boot_secure_features.c
@ -1,70 +0,0 @@
-/*
- * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-
-#include <strings.h>
-#include "esp_flash_encrypt.h"
-#include "esp_secure_boot.h"
-#include "esp_efuse.h"
-#include "esp_efuse_table.h"
-#include "esp_log.h"
-#include "sdkconfig.h"
-
-static __attribute__((unused)) const char *TAG = "secure_boot";
-
-esp_err_t esp_secure_boot_enable_secure_features(void)
-{
-    esp_efuse_write_field_bit(ESP_EFUSE_DIS_DIRECT_BOOT);
-
-#ifdef CONFIG_SECURE_ENABLE_SECURE_ROM_DL_MODE
-    ESP_LOGI(TAG, "Enabling Security download mode...");
-    esp_err_t err = esp_efuse_enable_rom_secure_download_mode();
-    if (err != ESP_OK) {
-        ESP_LOGE(TAG, "Could not enable Security download mode...");
-        return err;
-    }
-#elif CONFIG_SECURE_DISABLE_ROM_DL_MODE
-    ESP_LOGI(TAG, "Disable ROM Download mode...");
-    esp_err_t err = esp_efuse_disable_rom_download_mode();
-    if (err != ESP_OK) {
-        ESP_LOGE(TAG, "Could not disable ROM Download mode...");
-        return err;
-    }
-#else
-    ESP_LOGW(TAG, "UART ROM Download mode kept enabled - SECURITY COMPROMISED");
-#endif
-
-#ifndef CONFIG_SECURE_BOOT_ALLOW_JTAG
-    ESP_LOGI(TAG, "Disable hardware & software JTAG...");
-    esp_efuse_write_field_bit(ESP_EFUSE_DIS_PAD_JTAG);
-    esp_efuse_write_field_bit(ESP_EFUSE_DIS_USB_JTAG);
-    esp_efuse_write_field_cnt(ESP_EFUSE_SOFT_DIS_JTAG, ESP_EFUSE_SOFT_DIS_JTAG[0]->bit_count);
-#else
-    ESP_LOGW(TAG, "Not disabling JTAG - SECURITY COMPROMISED");
-#endif
-
-#ifdef CONFIG_SECURE_BOOT_ENABLE_AGGRESSIVE_KEY_REVOKE
-    esp_efuse_write_field_bit(ESP_EFUSE_SECURE_BOOT_AGGRESSIVE_REVOKE);
-#endif
-
-    esp_efuse_write_field_bit(ESP_EFUSE_SECURE_BOOT_EN);
-
-#ifndef CONFIG_SECURE_BOOT_V2_ALLOW_EFUSE_RD_DIS
-    bool rd_dis_now = true;
-#ifdef CONFIG_SECURE_FLASH_ENC_ENABLED
-    /* If flash encryption is not enabled yet then don't read-disable efuses yet, do it later in the boot
-       when Flash Encryption is being enabled */
-    rd_dis_now = esp_flash_encryption_enabled();
-#endif
-    if (rd_dis_now) {
-        ESP_LOGI(TAG, "Prevent read disabling of additional efuses...");
-        esp_efuse_write_field_bit(ESP_EFUSE_WR_DIS_RD_DIS);
-    }
-#else
-    ESP_LOGW(TAG, "Allowing read disabling of additional efuses - SECURITY COMPROMISED");
-#endif
-
-    return ESP_OK;
-}
--- a/components/bootloader_support/src/esp32s2/bootloader_soc.c
+++ b/components/bootloader_support/src/esp32s2/bootloader_soc.c
@ -3,18 +3,10 @@
 *
 * SPDX-License-Identifier: Apache-2.0
 */
+
 #include <stdbool.h>

-void bootloader_ana_super_wdt_reset_config(bool enable)
-{
-    (void)enable;
-}
-
-void bootloader_ana_bod_reset_config(bool enable)
-{
-    (void)enable;
-}
-
+//Not supported but common bootloader calls the function. Do nothing
 void bootloader_ana_clock_glitch_reset_config(bool enable)
 {
    (void)enable;
--- a/components/bootloader_support/src/esp32s3/bootloader_esp32s3.c
+++ b/components/bootloader_support/src/esp32s3/bootloader_esp32s3.c
@ -130,7 +130,7 @@ static void bootloader_super_wdt_auto_feed(void)

 static inline void bootloader_ana_reset_config(void)
 {
-    //Enable WDT, BOR, and GLITCH reset
+    //Enable WDT, BOD, and GLITCH reset
    bootloader_ana_super_wdt_reset_config(true);
    bootloader_ana_bod_reset_config(true);
    bootloader_ana_clock_glitch_reset_config(true);
--- a/components/bootloader_support/src/esp32s3/bootloader_soc.c
+++ b/components/bootloader_support/src/esp32s3/bootloader_soc.c
@ -12,15 +12,15 @@ void bootloader_ana_super_wdt_reset_config(bool enable)
    REG_CLR_BIT(RTC_CNTL_FIB_SEL_REG, RTC_CNTL_FIB_SUPER_WDT_RST);

    if (enable) {
-        REG_SET_BIT(RTC_CNTL_SWD_CONF_REG, RTC_CNTL_SWD_BYPASS_RST);
-    } else {
        REG_CLR_BIT(RTC_CNTL_SWD_CONF_REG, RTC_CNTL_SWD_BYPASS_RST);
+    } else {
+        REG_SET_BIT(RTC_CNTL_SWD_CONF_REG, RTC_CNTL_SWD_BYPASS_RST);
    }
 }

 void bootloader_ana_bod_reset_config(bool enable)
 {
-    REG_CLR_BIT(RTC_CNTL_FIB_SEL_REG, RTC_CNTL_FIB_BOR_RST);
+    REG_CLR_BIT(RTC_CNTL_FIB_SEL_REG, RTC_CNTL_FIB_BOD_RST);

    if (enable) {
        REG_SET_BIT(RTC_CNTL_BROWN_OUT_REG, RTC_CNTL_BROWN_OUT_ANA_RST_EN);
--- a/components/bootloader_support/src/esp_image_format.c
+++ b/components/bootloader_support/src/esp_image_format.c
@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
 *
 * SPDX-License-Identifier: Apache-2.0
 */
@ -19,6 +19,8 @@
 #include "bootloader_util.h"
 #include "bootloader_common.h"
 #include "esp_rom_sys.h"
+#include "esp_efuse.h"
+#include "esp_app_desc.h"
 #include "bootloader_memory_utils.h"
 #include "soc/soc_caps.h"
 #if CONFIG_IDF_TARGET_ESP32
@ -29,8 +31,6 @@
 #include "esp32s3/rom/secure_boot.h"
 #elif CONFIG_IDF_TARGET_ESP32C3
 #include "esp32c3/rom/secure_boot.h"
-#elif CONFIG_IDF_TARGET_ESP32H4
-#include "esp32h4/rom/secure_boot.h"
 #elif CONFIG_IDF_TARGET_ESP32C2
 #include "esp32c2/rom/rtc.h"
 #include "esp32c2/rom/secure_boot.h"
@ -87,10 +87,10 @@ static bool should_map(uint32_t load_addr);

 static esp_err_t process_segments(esp_image_metadata_t *data, bool silent, bool do_load, bootloader_sha256_handle_t sha_handle, uint32_t *checksum);
 /* Load or verify a segment */
-static esp_err_t process_segment(int index, uint32_t flash_addr, esp_image_segment_header_t *header, bool silent, bool do_load, bootloader_sha256_handle_t sha_handle, uint32_t *checksum);
+static esp_err_t process_segment(int index, uint32_t flash_addr, esp_image_segment_header_t *header, bool silent, bool do_load, bootloader_sha256_handle_t sha_handle, uint32_t *checksum, esp_image_metadata_t *metadata);

 /* split segment and verify if data_len is too long */
-static esp_err_t process_segment_data(intptr_t load_addr, uint32_t data_addr, uint32_t data_len, bool do_load, bootloader_sha256_handle_t sha_handle, uint32_t *checksum);
+static esp_err_t process_segment_data(int segment, intptr_t load_addr, uint32_t data_addr, uint32_t data_len, bool do_load, bootloader_sha256_handle_t sha_handle, uint32_t *checksum, esp_image_metadata_t *metadata);

 /* Verify the main image header */
 static esp_err_t verify_image_header(uint32_t src_addr, const esp_image_header_t *image, bool silent);
@ -235,6 +235,21 @@ static esp_err_t image_load(esp_image_load_mode_t mode, const esp_partition_pos_
            }
        }
    }
+
+#if CONFIG_BOOTLOADER_APP_ANTI_ROLLBACK
+    /* For anti-rollback case, reconfirm security version of the application to prevent FI attacks */
+    bool sec_ver = false;
+    if (do_load) {
+        sec_ver = esp_efuse_check_secure_version(data->secure_version);
+        if (!sec_ver) {
+            err = ESP_FAIL;
+            goto err;
+        }
+    }
+    /* Ensure that the security version check passes for image loading scenario */
+    ESP_FAULT_ASSERT(!do_load || sec_ver == true);
+#endif // CONFIG_BOOTLOADER_APP_ANTI_ROLLBACK
+
 #endif // BOOTLOADER_BUILD

    // Success!
@ -511,7 +526,7 @@ static esp_err_t process_segments(esp_image_metadata_t *data, bool silent, bool
    for (int i = 0; i < data->image.segment_count; i++) {
        esp_image_segment_header_t *header = &data->segments[i];
        ESP_LOGV(TAG, "loading segment header %d at offset 0x%"PRIx32, i, next_addr);
-        CHECK_ERR(process_segment(i, next_addr, header, silent, do_load, sha_handle, checksum));
+        CHECK_ERR(process_segment(i, next_addr, header, silent, do_load, sha_handle, checksum, data));
        next_addr += sizeof(esp_image_segment_header_t);
        data->segment_data[i] = next_addr;
        next_addr += header->data_len;
@ -532,7 +547,7 @@ err:
    return err;
 }

-static esp_err_t process_segment(int index, uint32_t flash_addr, esp_image_segment_header_t *header, bool silent, bool do_load, bootloader_sha256_handle_t sha_handle, uint32_t *checksum)
+static esp_err_t process_segment(int index, uint32_t flash_addr, esp_image_segment_header_t *header, bool silent, bool do_load, bootloader_sha256_handle_t sha_handle, uint32_t *checksum, esp_image_metadata_t *metadata)
 {
    esp_err_t err;

@ -590,7 +605,7 @@ static esp_err_t process_segment(int index, uint32_t flash_addr, esp_image_segme
        uint32_t offset_page = ((data_addr & MMAP_ALIGNED_MASK) != 0) ? 1 : 0;
        /* Data we could map in case we are not aligned to PAGE boundary is one page size lesser. */
        data_len = MIN(data_len_remain, ((free_page_count - offset_page) * SPI_FLASH_MMU_PAGE_SIZE));
-        CHECK_ERR(process_segment_data(load_addr, data_addr, data_len, do_load, sha_handle, checksum));
+        CHECK_ERR(process_segment_data(index, load_addr, data_addr, data_len, do_load, sha_handle, checksum, metadata));
        data_addr += data_len;
        data_len_remain -= data_len;
    }
@ -605,7 +620,42 @@ err:
    return err;
 }

-static esp_err_t process_segment_data(intptr_t load_addr, uint32_t data_addr, uint32_t data_len, bool do_load, bootloader_sha256_handle_t sha_handle, uint32_t *checksum)
+#if CONFIG_BOOTLOADER_APP_ANTI_ROLLBACK
+/* The __attribute__((optimize("O0"))) is used to disable optimizations for this function,
+ * preventing the compiler from potentially optimizing data_buffer and reading data directly from src.
+ * This is crucial as we want to read from Flash only once, ensuring the integrity of the data.
+ */
+__attribute__((optimize("O0")))
+static size_t process_esp_app_desc_data(const uint32_t *src, bootloader_sha256_handle_t sha_handle, uint32_t *checksum, esp_image_metadata_t *metadata)
+{
+    /* Using data_buffer here helps to securely read secure_version
+     * (for anti-rollback) from esp_app_desc_t, preventing FI attack.
+     * We read data from Flash into this buffer, which is covered by sha256.
+     * Therefore, if the flash is under attackers control and contents are modified
+     * the sha256 comparison will fail.
+     *
+     * The esp_app_desc_t structure is located in DROM and is always in segment #0.
+     *
+     * esp_app_desc_t is always at #0 segment (index==0).
+     * secure_version field of esp_app_desc_t is located at #2 word (w_i==1).
+     */
+    uint32_t data_buffer[2];
+    memcpy(data_buffer, src, sizeof(data_buffer));
+    assert(data_buffer[0] == ESP_APP_DESC_MAGIC_WORD);
+    metadata->secure_version = data_buffer[1];
+    if (checksum != NULL) {
+        *checksum ^= data_buffer[0] ^ data_buffer[1];
+    }
+    if (sha_handle != NULL) {
+        bootloader_sha256_data(sha_handle, data_buffer, sizeof(data_buffer));
+    }
+    ESP_FAULT_ASSERT(memcmp(data_buffer, src, sizeof(data_buffer)) == 0);
+    ESP_FAULT_ASSERT(memcmp(&metadata->secure_version, &src[1], sizeof(uint32_t)) == 0);
+    return sizeof(data_buffer);
+}
+#endif // CONFIG_BOOTLOADER_APP_ANTI_ROLLBACK
+
+static esp_err_t process_segment_data(int segment, intptr_t load_addr, uint32_t data_addr, uint32_t data_len, bool do_load, bootloader_sha256_handle_t sha_handle, uint32_t *checksum, esp_image_metadata_t *metadata)
 {
    // If we are not loading, and the checksum is empty, skip processing this
    // segment for data
@ -638,10 +688,24 @@ static esp_err_t process_segment_data(intptr_t load_addr, uint32_t data_addr, ui
 #endif
    }
    uint32_t *dest = (uint32_t *)load_addr;
-#endif
+#endif // BOOTLOADER_BUILD

    const uint32_t *src = data;

+#if CONFIG_BOOTLOADER_APP_ANTI_ROLLBACK
+    // Case I: Bootloader verifying application
+    // Case II: Bootloader verifying bootloader
+    // Anti-rollback check should handle only Case I from above.
+    if (segment == 0 && metadata->start_addr != ESP_BOOTLOADER_OFFSET) {
+        ESP_LOGD(TAG, "additional anti-rollback check 0x%"PRIx32, data_addr);
+        // The esp_app_desc_t structure is located in DROM and is always in segment #0.
+        size_t len = process_esp_app_desc_data(src, sha_handle, checksum, metadata);
+        data_len -= len;
+        src += len / 4;
+        // In BOOTLOADER_BUILD, for DROM (segment #0) we do not load it into dest (only map it), do_load = false.
+    }
+#endif // CONFIG_BOOTLOADER_APP_ANTI_ROLLBACK
+
    for (size_t i = 0; i < data_len; i += 4) {
        int w_i = i / 4; // Word index
        uint32_t w = src[w_i];
@ -866,7 +930,7 @@ static esp_err_t verify_secure_boot_signature(bootloader_sha256_handle_t sha_han
        bootloader_munmap(simple_hash);
    }

-#if CONFIG_SECURE_BOOT_V2_ENABLED
+#if CONFIG_SECURE_SIGNED_APPS_RSA_SCHEME || CONFIG_SECURE_SIGNED_APPS_ECDSA_V2_SCHEME
    // End of the image needs to be padded all the way to a 4KB boundary, after the simple hash
    // (for apps they are usually already padded due to --secure-pad-v2, only a problem if this option was not used.)
    uint32_t padded_end = ALIGN_UP(end, FLASH_SECTOR_SIZE);
@ -876,7 +940,7 @@ static esp_err_t verify_secure_boot_signature(bootloader_sha256_handle_t sha_han
        bootloader_munmap(padding);
        end = padded_end;
    }
-#endif
+#endif // CONFIG_SECURE_SIGNED_APPS_RSA_SCHEME || CONFIG_SECURE_SIGNED_APPS_ECDSA_V2_SCHEME

    bootloader_sha256_finish(sha_handle, image_digest);

@ -916,9 +980,13 @@ static esp_err_t verify_secure_boot_signature(bootloader_sha256_handle_t sha_han
        return ESP_ERR_IMAGE_INVALID;
    }

-#if CONFIG_SECURE_SIGNED_APPS_RSA_SCHEME || CONFIG_SECURE_SIGNED_APPS_ECDSA_V2_SCHEME
    // Adjust image length result to include the appended signature
+#if CONFIG_SECURE_SIGNED_APPS_RSA_SCHEME || CONFIG_SECURE_SIGNED_APPS_ECDSA_V2_SCHEME
    data->image_len = end - data->start_addr + sizeof(ets_secure_boot_signature_t);
+#elif defined(CONFIG_SECURE_SIGNED_APPS_ECDSA_SCHEME)
+    if (data->start_addr != ESP_BOOTLOADER_OFFSET) {
+        data->image_len = end - data->start_addr + sizeof(esp_secure_boot_sig_block_t);
+    }
 #endif

 #endif // SECURE_BOOT_CHECK_SIGNATURE
--- a/components/bootloader_support/src/flash_encryption/flash_encrypt.c
+++ b/components/bootloader_support/src/flash_encryption/flash_encrypt.c
@ -393,14 +393,21 @@ static esp_err_t encrypt_partition(int index, const esp_partition_info_t *partit
 {
    esp_err_t err;
    bool should_encrypt = (partition->flags & PART_FLAG_ENCRYPTED);
+    uint32_t size = partition->pos.size;

    if (partition->type == PART_TYPE_APP) {
        /* check if the partition holds a valid unencrypted app */
-        esp_image_metadata_t data_ignored;
+        esp_image_metadata_t image_data = {};
        err = esp_image_verify(ESP_IMAGE_VERIFY,
                               &partition->pos,
-                               &data_ignored);
+                               &image_data);
        should_encrypt = (err == ESP_OK);
+#ifdef SECURE_FLASH_ENCRYPT_ONLY_IMAGE_LEN_IN_APP_PART
+        if (should_encrypt) {
+            // Encrypt only the app image instead of encrypting the whole partition
+            size = image_data.image_len;
+        }
+#endif
    } else if ((partition->type == PART_TYPE_DATA && partition->subtype == PART_SUBTYPE_DATA_OTA)
                || (partition->type == PART_TYPE_DATA && partition->subtype == PART_SUBTYPE_DATA_NVS_KEYS)) {
        /* check if we have ota data partition and the partition should be encrypted unconditionally */
@ -411,9 +418,9 @@ static esp_err_t encrypt_partition(int index, const esp_partition_info_t *partit
        return ESP_OK;
    } else {
        /* should_encrypt */
-        ESP_LOGI(TAG, "Encrypting partition %d at offset 0x%x (length 0x%x)...", index, partition->pos.offset, partition->pos.size);
+        ESP_LOGI(TAG, "Encrypting partition %d at offset 0x%x (length 0x%x)...", index, partition->pos.offset, size);

-        err = esp_flash_encrypt_region(partition->pos.offset, partition->pos.size);
+        err = esp_flash_encrypt_region(partition->pos.offset, size);
        ESP_LOGI(TAG, "Done encrypting");
        if (err != ESP_OK) {
            ESP_LOGE(TAG, "Failed to encrypt partition %d", index);
--- a/components/bootloader_support/src/secure_boot.c
+++ b/components/bootloader_support/src/secure_boot.c
@ -144,9 +144,9 @@ static esp_err_t secure_boot_v2_check(bool *need_fix)
 #endif
 #endif // CONFIG_SECURE_BOOT

-#if CONFIG_SECURE_SIGNED_APPS_RSA_SCHEME && CONFIG_SECURE_SIGNED_ON_UPDATE_NO_SECURE_BOOT
+#if (CONFIG_SECURE_SIGNED_APPS_RSA_SCHEME || CONFIG_SECURE_SIGNED_APPS_ECDSA_V2_SCHEME) && CONFIG_SECURE_SIGNED_ON_UPDATE_NO_SECURE_BOOT

-static void rsa_check_signature_on_update_check(void)
+static void check_signature_on_update_check(void)
 {
    // We rely on the keys used to sign this app to verify the next app on OTA, so make sure there is at
    // least one to avoid a stuck firmware
@ -164,7 +164,7 @@ static void rsa_check_signature_on_update_check(void)
    }
 #endif
 }
-#endif // CONFIG_SECURE_SIGNED_APPS_RSA_SCHEME && CONFIG_SECURE_SIGNED_ON_UPDATE_NO_SECURE_BOOT
+#endif // (CONFIG_SECURE_SIGNED_APPS_RSA_SCHEME || CONFIG_SECURE_SIGNED_APPS_ECDSA_V2_SCHEME) && CONFIG_SECURE_SIGNED_ON_UPDATE_NO_SECURE_BOOT

 void esp_secure_boot_init_checks(void)
 {
@ -184,9 +184,9 @@ void esp_secure_boot_init_checks(void)
 #endif // CONFIG_SECURE_BOOT


-#if CONFIG_SECURE_SIGNED_APPS_RSA_SCHEME && CONFIG_SECURE_SIGNED_ON_UPDATE_NO_SECURE_BOOT
-    rsa_check_signature_on_update_check();
-#endif // CONFIG_SECURE_SIGNED_APPS_RSA_SCHEME && CONFIG_SECURE_SIGNED_ON_UPDATE_NO_SECURE_BOOT
+#if (CONFIG_SECURE_SIGNED_APPS_RSA_SCHEME || CONFIG_SECURE_SIGNED_APPS_ECDSA_V2_SCHEME) && CONFIG_SECURE_SIGNED_ON_UPDATE_NO_SECURE_BOOT
+    check_signature_on_update_check();
+#endif // (CONFIG_SECURE_SIGNED_APPS_RSA_SCHEME || CONFIG_SECURE_SIGNED_APPS_ECDSA_V2_SCHEME) && CONFIG_SECURE_SIGNED_ON_UPDATE_NO_SECURE_BOOT

 }

--- a/components/bootloader_support/src/secure_boot_v2/secure_boot_signature_priv.h
+++ b/components/bootloader_support/src/secure_boot_v2/secure_boot_signature_priv.h
@ -13,8 +13,6 @@
 #include "esp32c3/rom/secure_boot.h"
 #elif CONFIG_IDF_TARGET_ESP32S3
 #include "esp32s3/rom/secure_boot.h"
-#elif CONFIG_IDF_TARGET_ESP32H4
-#include "esp32h4/rom/secure_boot.h"
 #elif CONFIG_IDF_TARGET_ESP32C2
 #include "esp32c2/rom/secure_boot.h"
 #elif CONFIG_IDF_TARGET_ESP32C6
--- a/components/bootloader_support/src/secure_boot_v2/secure_boot_signatures_app.c
+++ b/components/bootloader_support/src/secure_boot_v2/secure_boot_signatures_app.c
@ -22,6 +22,7 @@
 #include "esp_secure_boot.h"
 #include "esp_ota_ops.h"
 #include "esp_efuse.h"
+#include "esp_efuse_chip.h"

 #include "secure_boot_signature_priv.h"

@ -46,31 +47,32 @@ static esp_err_t validate_signature_block(const ets_secure_boot_sig_block_t *blo
    return ESP_OK;
 }

-esp_err_t esp_secure_boot_get_signature_blocks_for_running_app(bool digest_public_keys, esp_image_sig_public_key_digests_t *public_key_digests)
+static esp_err_t calculate_image_public_key_digests(bool verify_image_digest, bool digest_public_keys, esp_image_sig_public_key_digests_t *public_key_digests, esp_partition_pos_t *part_pos)
 {
-    esp_image_metadata_t metadata;
-    const esp_partition_t* running_app_part = esp_ota_get_running_partition();
-    if (running_app_part == NULL) {
-        ESP_LOGE(TAG, "Cannot get running partition");
-        return ESP_FAIL;
-    }
-    const esp_partition_pos_t part_pos = {
-        .offset = running_app_part->address,
-        .size   = running_app_part->size,
-    };
-    esp_err_t err = esp_image_get_metadata(&part_pos, &metadata);
-    if (err != ESP_OK) {
-        ESP_LOGE(TAG, "Error reading metadata from running app (err=0x%x)", err);
+    esp_image_metadata_t img_metadata = {0};
+    esp_err_t ret = esp_image_get_metadata(part_pos, &img_metadata);
+    if (ret != ESP_OK) {
+        ESP_LOGE(TAG, "Error reading metadata from running app (err=0x%x)", ret);
        return ESP_FAIL;
    }

-    memset(public_key_digests, 0, sizeof(esp_image_sig_public_key_digests_t));
+    uint8_t image_digest[ESP_SECURE_BOOT_DIGEST_LEN] = {0};
+    uint8_t __attribute__((aligned(4))) key_digest[ESP_SECURE_BOOT_DIGEST_LEN] = {0};
+    size_t sig_block_addr = img_metadata.start_addr + ALIGN_UP(img_metadata.image_len, FLASH_SECTOR_SIZE);

-    // Generating the SHA of the public key components in the signature block
+    ESP_LOGD(TAG, "calculating public key digests for sig blocks of image offset 0x%"PRIu32" (sig block offset 0x%u)", img_metadata.start_addr, sig_block_addr);

-    // metadata.image_len doesn't include any padding to start of the signature sector, so pad it here
-    size_t sig_block_addr = metadata.start_addr + ALIGN_UP(metadata.image_len, FLASH_SECTOR_SIZE);
-    ESP_LOGD(TAG, "reading signatures for app address 0x%"PRIx32" sig block address 0x%x", part_pos.offset, sig_block_addr);
+    bzero(public_key_digests, sizeof(esp_image_sig_public_key_digests_t));
+
+    if (verify_image_digest) {
+        ret = bootloader_sha256_flash_contents(img_metadata.start_addr, sig_block_addr - img_metadata.start_addr, image_digest);
+        if (ret != ESP_OK) {
+            ESP_LOGE(TAG, "error generating image digest, %d", ret);
+            return ret;
+        }
+    }
+
+    ESP_LOGD(TAG, "reading signature(s)");
    for (unsigned i = 0; i < SECURE_BOOT_NUM_BLOCKS; i++) {
        ets_secure_boot_sig_block_t block;
        size_t addr = sig_block_addr + sizeof(ets_secure_boot_sig_block_t) * i;
@ -84,20 +86,59 @@ esp_err_t esp_secure_boot_get_signature_blocks_for_running_app(bool digest_publi
 #elif CONFIG_SECURE_SIGNED_APPS_ECDSA_V2_SCHEME
                    bootloader_sha256_data(sig_block_sha, &block.ecdsa.key, sizeof(block.ecdsa.key));
 #endif
-                    bootloader_sha256_finish(sig_block_sha, public_key_digests->key_digests[i]);
+                    bootloader_sha256_finish(sig_block_sha, key_digest);
+                    if (verify_image_digest) {
+                        // Check we can verify the image using this signature and this key
+                        uint8_t temp_verified_digest[ESP_SECURE_BOOT_DIGEST_LEN];
+    #if CONFIG_SECURE_SIGNED_APPS_RSA_SCHEME
+                        bool verified = ets_rsa_pss_verify(&block.key, block.signature, image_digest, temp_verified_digest);
+    #elif CONFIG_SECURE_SIGNED_APPS_ECDSA_V2_SCHEME
+                        bool verified = ets_ecdsa_verify(&block.ecdsa.key.point[0], block.ecdsa.signature, block.ecdsa.key.curve_id, image_digest, temp_verified_digest);
+    #endif
+                        if (!verified) {
+                            ESP_LOGE(TAG, "Secure boot key (%d) verification failed.", i);
+                            continue;
+                        }
+                        ESP_LOGD(TAG, "Signature block (%d) is verified", i);
+                    }
+                    /* Copy the key digest to the buffer provided by the caller */
+                    memcpy((void *)public_key_digests->key_digests[public_key_digests->num_digests], key_digest, ESP_SECURE_BOOT_DIGEST_LEN);
                }
                public_key_digests->num_digests++;
            }
        } else {
-            ESP_LOGE(TAG, "Secure boot sign blocks cannot be read from a running app (err=0x%x)", err);
+            ESP_LOGE(TAG, "Secure boot sign blocks cannot be read from image at %lx (err=0x%x)", part_pos->offset, err);
            return ESP_FAIL;
        }
    }
-    if (public_key_digests->num_digests > 0) {
-        return ESP_OK;
+
+    if (ret == ESP_OK && public_key_digests->num_digests > 0) {
+        ESP_LOGD(TAG, "Digests successfully calculated, %d valid signatures (image offset 0x%"PRIu32")",
+                 public_key_digests->num_digests, img_metadata.start_addr);
    }
-    ESP_LOGE(TAG, "No signatures were found for the running app");
-    return ESP_ERR_NOT_FOUND;
+
+    if (public_key_digests->num_digests == 0) {
+        return ESP_ERR_NOT_FOUND;
+    }
+    return ret;
+}
+
+esp_err_t esp_secure_boot_get_signature_blocks_for_running_app(bool digest_public_keys, esp_image_sig_public_key_digests_t *public_key_digests)
+{
+    esp_partition_pos_t part_pos;
+    const esp_partition_t* running_app_part = esp_ota_get_running_partition();
+    if (running_app_part == NULL) {
+        ESP_LOGE(TAG, "Cannot get running partition");
+        return ESP_FAIL;
+    }
+    part_pos.offset = running_app_part->address;
+    part_pos.size   = running_app_part->size;
+
+    esp_err_t err = calculate_image_public_key_digests(false, digest_public_keys, public_key_digests, &part_pos);
+    if (public_key_digests->num_digests == 0) {
+        ESP_LOGE(TAG, "No signatures were found for the running app");
+    }
+    return err;
 }

 static esp_err_t get_secure_boot_key_digests(esp_image_sig_public_key_digests_t *public_key_digests)
@ -236,3 +277,33 @@ esp_err_t esp_secure_boot_verify_rsa_signature_block(const ets_secure_boot_signa
 #endif

 #endif // CONFIG_SECURE_SIGNED_APPS_RSA_SCHEME || CONFIG_SECURE_SIGNED_APPS_ECDSA_V2_SCHEME || CONFIG_SECURE_SIGNED_ON_UPDATE_NO_SECURE_BOOT
+
+#if SOC_SUPPORT_SECURE_BOOT_REVOKE_KEY && CONFIG_SECURE_BOOT_V2_ENABLED
+
+esp_err_t esp_secure_boot_verify_with_efuse_digest_index(int efuse_digest_index, esp_partition_pos_t *part_pos)
+{
+    if (!part_pos || (efuse_digest_index < 0 || efuse_digest_index >= SOC_EFUSE_SECURE_BOOT_KEY_DIGESTS)) {
+        return ESP_ERR_INVALID_ARG;
+    }
+    esp_image_sig_public_key_digests_t img_key_digests = {0};
+    esp_err_t ret = calculate_image_public_key_digests(true, true, &img_key_digests, part_pos);
+    if (ret != ESP_OK) {
+        return ESP_FAIL;
+    }
+    if (esp_efuse_get_digest_revoke(efuse_digest_index)) {
+        return ESP_FAIL;
+    }
+
+    // Read key digests from efuse
+    esp_secure_boot_key_digests_t efuse_key_digests;
+    memset(&efuse_key_digests, 0, sizeof(esp_secure_boot_key_digests_t));
+    esp_secure_boot_read_key_digests(&efuse_key_digests);
+
+    for (int i = 0; i < img_key_digests.num_digests; i++) {
+        if (!memcmp(img_key_digests.key_digests[i], efuse_key_digests.key_digests[efuse_digest_index], ESP_SECURE_BOOT_KEY_DIGEST_LEN)) {
+            return ESP_OK;
+        }
+    }
+    return ESP_FAIL;
+}
+#endif // SOC_SUPPORT_SECURE_BOOT_REVOKE_KEY && CONFIG_SECURE_BOOT_V2_ENABLED
--- a/components/bootloader_support/test_apps/bootloader_support/CMakeLists.txt
+++ b/components/bootloader_support/test_apps/bootloader_support/CMakeLists.txt
@ -4,8 +4,7 @@ cmake_minimum_required(VERSION 3.16)

 include($ENV{IDF_PATH}/tools/cmake/project.cmake)

-set(SDKCONFIG_DEFAULTS "$ENV{IDF_PATH}/tools/test_apps/configs/sdkconfig.debug_helpers")
-list(APPEND SDKCONFIG_DEFAULTS "sdkconfig.defaults")
+list(PREPEND SDKCONFIG_DEFAULTS "$ENV{IDF_PATH}/tools/test_apps/configs/sdkconfig.debug_helpers" "sdkconfig.defaults")

 # "Trim" the build. Include the minimal set of components, main, and anything it depends on.
 set(COMPONENTS main)
--- a/components/bootloader_support/test_apps/rtc_custom_section/CMakeLists.txt
+++ b/components/bootloader_support/test_apps/rtc_custom_section/CMakeLists.txt
@ -4,8 +4,7 @@ cmake_minimum_required(VERSION 3.16)

 include($ENV{IDF_PATH}/tools/cmake/project.cmake)

-set(SDKCONFIG_DEFAULTS "$ENV{IDF_PATH}/tools/test_apps/configs/sdkconfig.debug_helpers")
-list(APPEND SDKCONFIG_DEFAULTS "sdkconfig.defaults")
+list(PREPEND SDKCONFIG_DEFAULTS "$ENV{IDF_PATH}/tools/test_apps/configs/sdkconfig.debug_helpers" "sdkconfig.defaults")

 # "Trim" the build. Include the minimal set of components, main, and anything it depends on.
 set(COMPONENTS main)
--- a/components/bootloader_support/test_apps/rtc_custom_section/pytest_rtc_mem.py
+++ b/components/bootloader_support/test_apps/rtc_custom_section/pytest_rtc_mem.py
@ -9,6 +9,7 @@ from pytest_embedded import Dut
@pytest.mark.esp32
@pytest.mark.esp32c3
@pytest.mark.esp32c6
+@pytest.mark.esp32h2
@pytest.mark.esp32s2
@pytest.mark.esp32s3
 def test_rtc_reserved_memory(dut: Dut) -> None:
--- a/components/bt/CMakeLists.txt
+++ b/components/bt/CMakeLists.txt
@ -2,36 +2,36 @@ if(CONFIG_BT_ENABLED)

    set(srcs "")
    set(include_dirs "")
+    set(ldfragments "linker.lf")
+    if(CONFIG_BT_CONTROLLER_ENABLED)
+        if(CONFIG_IDF_TARGET_ESP32)
+            list(APPEND srcs "controller/esp32/bt.c"
+                             "controller/esp32/hli_api.c"
+                             "controller/esp32/hli_vectors.S")
+            list(APPEND include_dirs include/esp32/include)

-    if(CONFIG_IDF_TARGET_ESP32)
-        list(APPEND srcs "controller/esp32/bt.c"
-                         "controller/esp32/hli_api.c"
-                         "controller/esp32/hli_vectors.S")
-        list(APPEND include_dirs include/esp32/include)
+        elseif(CONFIG_IDF_TARGET_ESP32C3)
+            list(APPEND srcs "controller/esp32c3/bt.c")
+            list(APPEND include_dirs include/esp32c3/include)

-    elseif(CONFIG_IDF_TARGET_ESP32C3)
-        list(APPEND srcs "controller/esp32c3/bt.c")
-        list(APPEND include_dirs include/esp32c3/include)
+        elseif(CONFIG_IDF_TARGET_ESP32S3)
+            list(APPEND srcs "controller/esp32c3/bt.c")
+            list(APPEND include_dirs include/esp32c3/include)

-    elseif(CONFIG_IDF_TARGET_ESP32S3)
-        list(APPEND srcs "controller/esp32c3/bt.c")
-        list(APPEND include_dirs include/esp32c3/include)
+        elseif(CONFIG_IDF_TARGET_ESP32C2)
+            set(ldfragments "linker.lf.esp32c2")
+            list(APPEND srcs "controller/esp32c2/bt.c")
+            list(APPEND include_dirs include/esp32c2/include)

-    elseif(CONFIG_IDF_TARGET_ESP32H4)
-        list(APPEND srcs "controller/esp32h4/bt.c")
-        list(APPEND include_dirs include/esp32h4/include)
+        elseif(CONFIG_IDF_TARGET_ESP32C6)
+            list(APPEND srcs "controller/esp32c6/bt.c")
+            list(APPEND include_dirs include/esp32c6/include)

-    elseif(CONFIG_IDF_TARGET_ESP32C2)
-        list(APPEND srcs "controller/esp32c2/bt.c")
-        list(APPEND include_dirs include/esp32c2/include)
+        elseif(CONFIG_IDF_TARGET_ESP32H2)
+            list(APPEND srcs "controller/esp32h2/bt.c")
+            list(APPEND include_dirs include/esp32h2/include)
+        endif()

-    elseif(CONFIG_IDF_TARGET_ESP32C6)
-        list(APPEND srcs "controller/esp32c6/bt.c")
-        list(APPEND include_dirs include/esp32c6/include)
-
-    elseif(CONFIG_IDF_TARGET_ESP32H2)
-        list(APPEND srcs "controller/esp32h2/bt.c")
-        list(APPEND include_dirs include/esp32h2/include)
    endif()


@ -485,6 +485,11 @@ if(CONFIG_BT_ENABLED)
                    "porting/nimble/src/os_msys_init.c"
            )

+            if(CONFIG_BT_CONTROLLER_DISABLED)
+                list(APPEND srcs
+                        "host/nimble/nimble/porting/nimble/src/hal_uart.c"
+                    )
+            endif()
            list(APPEND include_dirs
                    porting/include
                    porting/nimble/include
@ -526,16 +531,22 @@ if(CONFIG_BT_ENABLED)
        list(APPEND include_dirs

                    host/nimble/nimble/nimble/host/include
+                    host/nimble/nimble/nimble/include
                    host/nimble/nimble/nimble/host/services/ans/include
                    host/nimble/nimble/nimble/host/services/bas/include
                    host/nimble/nimble/nimble/host/services/dis/include
                    host/nimble/nimble/nimble/host/services/gap/include
                    host/nimble/nimble/nimble/host/services/gatt/include
                    host/nimble/nimble/nimble/host/services/hr/include
+                    host/nimble/nimble/nimble/host/services/htp/include
                    host/nimble/nimble/nimble/host/services/ias/include
                    host/nimble/nimble/nimble/host/services/ipss/include
                    host/nimble/nimble/nimble/host/services/lls/include
+                    host/nimble/nimble/nimble/host/services/prox/include
+                    host/nimble/nimble/nimble/host/services/cts/include
                    host/nimble/nimble/nimble/host/services/tps/include
+                    host/nimble/nimble/nimble/host/services/hid/include
+                    host/nimble/nimble/nimble/host/services/sps/include
                    host/nimble/nimble/nimble/host/util/include
                    host/nimble/nimble/nimble/host/store/ram/include
                    host/nimble/nimble/nimble/host/store/config/include
@ -549,10 +560,15 @@ if(CONFIG_BT_ENABLED)
                    "host/nimble/nimble/nimble/host/services/ipss/src/ble_svc_ipss.c"
                    "host/nimble/nimble/nimble/host/services/ans/src/ble_svc_ans.c"
                    "host/nimble/nimble/nimble/host/services/hr/src/ble_svc_hr.c"
+                    "host/nimble/nimble/nimble/host/services/htp/src/ble_svc_htp.c"
                    "host/nimble/nimble/nimble/host/services/gap/src/ble_svc_gap.c"
                    "host/nimble/nimble/nimble/host/services/bas/src/ble_svc_bas.c"
                    "host/nimble/nimble/nimble/host/services/dis/src/ble_svc_dis.c"
                    "host/nimble/nimble/nimble/host/services/lls/src/ble_svc_lls.c"
+                    "host/nimble/nimble/nimble/host/services/prox/src/ble_svc_prox.c"
+                    "host/nimble/nimble/nimble/host/services/cts/src/ble_svc_cts.c"
+                    "host/nimble/nimble/nimble/host/services/hid/src/ble_svc_hid.c"
+                    "host/nimble/nimble/nimble/host/services/sps/src/ble_svc_sps.c"
                    "host/nimble/nimble/nimble/host/src/ble_hs_conn.c"
                    "host/nimble/nimble/nimble/host/src/ble_store_util.c"
                    "host/nimble/nimble/nimble/host/src/ble_sm.c"
@ -571,6 +587,8 @@ if(CONFIG_BT_ENABLED)
                    "host/nimble/nimble/nimble/host/src/ble_hs_mqueue.c"
                    "host/nimble/nimble/nimble/host/src/ble_hs_periodic_sync.c"
                    "host/nimble/nimble/nimble/host/src/ble_att.c"
+                    "host/nimble/nimble/nimble/host/src/ble_ead.c"
+                    "host/nimble/nimble/nimble/host/src/ble_aes_ccm.c"
                    "host/nimble/nimble/nimble/host/src/ble_gattc.c"
                    "host/nimble/nimble/nimble/host/src/ble_store.c"
                    "host/nimble/nimble/nimble/host/src/ble_sm_lgcy.c"
@ -599,11 +617,21 @@ if(CONFIG_BT_ENABLED)
                    "host/nimble/nimble/nimble/host/store/ram/src/ble_store_ram.c"
                    "host/nimble/nimble/nimble/host/store/config/src/ble_store_config.c"
                    "host/nimble/nimble/nimble/host/store/config/src/ble_store_nvs.c"
+                    "host/nimble/nimble/nimble/host/src/ble_gattc_cache.c"
+                    "host/nimble/nimble/nimble/host/src/ble_gattc_cache_conn.c"
                )

+            if(CONFIG_BT_CONTROLLER_DISABLED AND CONFIG_BT_NIMBLE_TRANSPORT_UART)
+                list(APPEND srcs
+                        "host/nimble/nimble/nimble/transport/uart_ll/src/hci_uart.c"
+                        "host/nimble/nimble/nimble/transport/common/hci_h4/src/hci_h4.c"
+                )
+            endif()
+
            list(APPEND srcs
                "host/nimble/nimble/porting/nimble/src/nimble_port.c"
                "host/nimble/nimble/porting/npl/freertos/src/nimble_port_freertos.c"
+                "host/nimble/port/src/nvs_port.c"
            )
            list(APPEND include_dirs
                porting/include
@ -612,6 +640,12 @@ if(CONFIG_BT_ENABLED)
                host/nimble/nimble/nimble/transport/include
            )

+            if(CONFIG_BT_CONTROLLER_DISABLED)
+                list(APPEND include_dirs
+                    host/nimble/nimble/nimble/transport/common/hci_h4/include
+                )
+            endif()
+
        if(NOT CONFIG_BT_LE_CONTROLLER_NPL_OS_PORTING_SUPPORT)
            list(APPEND srcs
                    "host/nimble/nimble/porting/nimble/src/endian.c"
@ -621,6 +655,13 @@ if(CONFIG_BT_ENABLED)
                    "host/nimble/nimble/porting/nimble/src/os_msys_init.c"
                    "host/nimble/nimble/porting/npl/freertos/src/npl_os_freertos.c"
                    )
+
+            if(CONFIG_BT_CONTROLLER_DISABLED AND CONFIG_BT_NIMBLE_TRANSPORT_UART)
+                list(APPEND srcs
+                    "host/nimble/nimble/porting/nimble/src/hal_uart.c"
+                )
+            endif()
+
            list(APPEND include_dirs
                    host/nimble/nimble/porting/npl/freertos/include
                    host/nimble/nimble/porting/nimble/include
@ -628,7 +669,7 @@ if(CONFIG_BT_ENABLED)
            )
        endif()

-        if(CONFIG_BT_NIMBLE_LEGACY_VHCI_ENABLE)
+        if(CONFIG_BT_NIMBLE_LEGACY_VHCI_ENABLE AND CONFIG_BT_CONTROLLER_ENABLED)
            list(APPEND srcs
                "host/nimble/esp-hci/src/esp_nimble_hci.c"
            )
@ -693,13 +734,12 @@ if(CONFIG_BT_ENABLED)

 endif()

-# requirements can't depend on config
 idf_component_register(SRCS "${srcs}"
-                INCLUDE_DIRS "${include_dirs}"
-                PRIV_INCLUDE_DIRS "${priv_include_dirs}"
-                REQUIRES esp_timer esp_wifi
-                PRIV_REQUIRES nvs_flash soc esp_pm esp_phy esp_coex mbedtls driver vfs
-                LDFRAGMENTS "linker.lf")
+                       INCLUDE_DIRS "${include_dirs}"
+                       PRIV_INCLUDE_DIRS "${priv_include_dirs}"
+                       REQUIRES esp_timer esp_wifi
+                       PRIV_REQUIRES nvs_flash soc esp_pm esp_phy esp_coex mbedtls driver vfs
+                       LDFRAGMENTS "${ldfragments}")

 if(CONFIG_BT_ENABLED)
    target_compile_options(${COMPONENT_LIB} PRIVATE -Wno-implicit-fallthrough -Wno-unused-const-variable)
@ -716,22 +756,13 @@ if(CONFIG_BT_ENABLED)
        target_link_directories(${COMPONENT_LIB} INTERFACE
                "${CMAKE_CURRENT_LIST_DIR}/controller/lib_esp32c3_family/esp32s3")
        target_link_libraries(${COMPONENT_LIB} PUBLIC btdm_app)
-    elseif(CONFIG_IDF_TARGET_ESP32H4)
-        if(CONFIG_IDF_TARGET_ESP32H4_BETA_VERSION_1)
-            # TODO: rename esp32h2 to esp32h4 [BT-2875]
-            add_prebuilt_library(libble_app "controller/lib_esp32h2/esp32h2-bt-lib/beta1/libble_app.a")
-        elseif(CONFIG_IDF_TARGET_ESP32H4_BETA_VERSION_2)
-            # TODO: rename esp32h2 to esp32h4 [BT-2875]
-            add_prebuilt_library(libble_app "controller/lib_esp32h2/esp32h2-bt-lib/beta2/libble_app.a")
-        endif()
-        target_link_libraries(${COMPONENT_LIB} PRIVATE libble_app)
-    elseif(CONFIG_IDF_TARGET_ESP32C2)
+    elseif(CONFIG_IDF_TARGET_ESP32C2 AND CONFIG_BT_CONTROLLER_ENABLED)
        add_prebuilt_library(libble_app "controller/lib_esp32c2/esp32c2-bt-lib/libble_app.a")
        target_link_libraries(${COMPONENT_LIB} PRIVATE libble_app)
-    elseif(CONFIG_IDF_TARGET_ESP32C6)
+    elseif(CONFIG_IDF_TARGET_ESP32C6 AND CONFIG_BT_CONTROLLER_ENABLED)
        add_prebuilt_library(libble_app "controller/lib_esp32c6/esp32c6-bt-lib/libble_app.a")
        target_link_libraries(${COMPONENT_LIB} PRIVATE libble_app)
-    elseif(CONFIG_IDF_TARGET_ESP32H2)
+    elseif(CONFIG_IDF_TARGET_ESP32H2 AND CONFIG_BT_CONTROLLER_ENABLED)
        add_prebuilt_library(libble_app "controller/lib_esp32h2/esp32h2-bt-lib/libble_app.a")
        target_link_libraries(${COMPONENT_LIB} PRIVATE libble_app)
    endif()
--- a/components/bt/Kconfig
+++ b/components/bt/Kconfig
@ -1,9 +1,8 @@
 menu "Bluetooth"
-    visible if SOC_BT_SUPPORTED

    config BT_ENABLED
        bool "Bluetooth"
-        depends on SOC_BT_SUPPORTED && !APP_NO_BLOBS
+        depends on !APP_NO_BLOBS
        help
            Select this option to enable Bluetooth and show the submenu with Bluetooth configuration choices.

@ -15,6 +14,7 @@ menu "Bluetooth"
            This helps to choose Bluetooth host stack

        config BT_BLUEDROID_ENABLED
+            depends on BT_CONTROLLER_ENABLED
            bool "Bluedroid - Dual-mode"
            help
                This option is recommended for classic Bluetooth or for dual-mode
@ -26,6 +26,7 @@ menu "Bluetooth"
                This option is recommended for BLE only usecases to save on memory

        config BT_CONTROLLER_ONLY
+            depends on SOC_BT_SUPPORTED
            bool "Disabled"
            help
                This option is recommended when you want to communicate directly with the
@ -42,6 +43,7 @@ menu "Bluetooth"
            This helps to choose Bluetooth controller stack

        config BT_CONTROLLER_ENABLED
+            depends on SOC_BT_SUPPORTED
            bool "Enabled"
            help
                This option is recommended for Bluetooth controller usecases
@ -68,6 +70,17 @@ menu "Bluetooth"
        source "$IDF_PATH/components/bt/controller/$IDF_TARGET/Kconfig.in"
    endmenu

+    config BT_RELEASE_IRAM
+        depends on BT_ENABLED && BT_LE_RELEASE_IRAM_SUPPORTED
+        bool "Release Bluetooth text (READ DOCS FIRST)"
+        default n
+        help
+            This option release Bluetooth text section and merge Bluetooth data, bss & text into
+            a large free heap region when esp_bt_mem_release is called, total saving ~21kB or more of IRAM.
+            ESP32-C2 only 3 configurable PMP entries available, rest of them are hard-coded.
+            We cannot split the memory into 3 different regions (IRAM, BLE-IRAM, DRAM).
+            So this option will disable the PMP (ESP_SYSTEM_PMP_IDRAM_SPLIT)
+
 endmenu

 menuconfig BLE_MESH
--- a/components/bt/common/btc/core/btc_task.c
+++ b/components/bt/common/btc/core/btc_task.c
@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
 *
 * SPDX-License-Identifier: Apache-2.0
 */
@ -335,6 +335,13 @@ static void btc_deinit_mem(void) {
 #endif
 #endif

+#if BTC_HF_INCLUDED == TRUE && HFP_DYNAMIC_MEMORY == TRUE
+    if (hf_local_param_ptr) {
+        osi_free(hf_local_param_ptr);
+        hf_local_param_ptr = NULL;
+    }
+#endif
+
 #if BTC_HF_CLIENT_INCLUDED == TRUE && HFP_DYNAMIC_MEMORY == TRUE
    if (hf_client_local_param_ptr) {
        osi_free(hf_client_local_param_ptr);
@ -390,6 +397,13 @@ static bt_status_t btc_init_mem(void) {
 #endif
 #endif

+#if BTC_HF_INCLUDED == TRUE && HFP_DYNAMIC_MEMORY == TRUE
+    if ((hf_local_param_ptr = (hf_local_param_t *)osi_malloc(BTC_HF_NUM_CB * sizeof(hf_local_param_t))) == NULL) {
+        goto error_exit;
+    }
+    memset((void *)hf_local_param_ptr, 0, BTC_HF_NUM_CB * sizeof(hf_local_param_t));
+#endif
+
 #if BTC_HF_CLIENT_INCLUDED == TRUE && HFP_DYNAMIC_MEMORY == TRUE
    if ((hf_client_local_param_ptr = (hf_client_local_param_t *)osi_malloc(sizeof(hf_client_local_param_t))) == NULL) {
        goto error_exit;
--- a/components/bt/common/btc/profile/esp/blufi/blufi_prf.c
+++ b/components/bt/common/btc/profile/esp/blufi/blufi_prf.c
@ -366,7 +366,7 @@ void btc_blufi_send_wifi_list(uint16_t apCount, esp_blufi_ap_record_t *list)
    int data_len;
    uint8_t *p;
    // malloc size: (len + RSSI + ssid buffer) * apCount;
-    uint malloc_size = (1 + 1 + sizeof(list->ssid)) * apCount;
+    uint32_t malloc_size = (1 + 1 + sizeof(list->ssid)) * apCount;
    p = data = osi_malloc(malloc_size);
    if (data == NULL) {
        BTC_TRACE_ERROR("malloc error\n");
@ -375,7 +375,7 @@ void btc_blufi_send_wifi_list(uint16_t apCount, esp_blufi_ap_record_t *list)
    type = BLUFI_BUILD_TYPE(BLUFI_TYPE_DATA, BLUFI_TYPE_DATA_SUBTYPE_WIFI_LIST);
    for (int i = 0; i < apCount; ++i)
    {
-        uint len = strlen((const char *)list[i].ssid);
+        uint32_t len = strlen((const char *)list[i].ssid);
        data_len = (p - data);
        //current_len + ssid + rssi + total_len_value
        if((data_len + len + 1 + 1) >  malloc_size) {
--- a/components/bt/common/btc/profile/esp/blufi/include/blufi_int.h
+++ b/components/bt/common/btc/profile/esp/blufi/include/blufi_int.h
@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
 *
 * SPDX-License-Identifier: Apache-2.0
 */
@ -9,6 +9,11 @@

 #include "btc/btc_task.h"
 #include "esp_blufi_api.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 #if (BLUFI_INCLUDED == TRUE)

 #define BTC_BLUFI_GREAT_VER   0x01  //Version + Subversion
@ -193,5 +198,10 @@ void btc_blufi_cb_deep_copy(btc_msg_t *msg, void *p_dest, void *p_src);

 void btc_blufi_cb_deep_free(btc_msg_t *msg);

-#endif /* __BLUFI_INT_H__ */
-#endif  ///BLUFI_INCLUDED == TRUE
+#endif ///BLUFI_INCLUDED == TRUE
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif  /* __BLUFI_INT_H__ */
--- a/components/bt/common/btc/profile/esp/blufi/include/esp_blufi.h
+++ b/components/bt/common/btc/profile/esp/blufi/include/esp_blufi.h
@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
 *
 * SPDX-License-Identifier: Apache-2.0
 */
@ -20,6 +20,10 @@
 #include "esp_gap_ble_api.h"
 #endif

+#ifdef __cplusplus
+extern "C" {
+#endif
+
 #define BLUFI_APP_UUID      0xFFFF
 #define BLUFI_DEVICE_NAME            "BLUFI_DEVICE"

@ -96,4 +100,7 @@ void esp_blufi_send_encap(void *arg);
 int esp_blufi_handle_gap_events(struct ble_gap_event *event, void *arg);
 #endif

+#ifdef __cplusplus
+}
+#endif
 #endif/* _ESP_BLUFI_ */
--- a/components/bt/common/btc/profile/esp/include/btc_blufi_prf.h
+++ b/components/bt/common/btc/profile/esp/include/btc_blufi_prf.h
@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
 *
 * SPDX-License-Identifier: Apache-2.0
 */
@ -21,6 +21,11 @@
 #define ESP_BLUFI_SUCCESS 0x00
 #endif

+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 #define BT_BD_ADDR_STR         "%02x:%02x:%02x:%02x:%02x:%02x"
 #define BT_BD_ADDR_HEX(addr)   addr[0], addr[1], addr[2], addr[3], addr[4], addr[5]

@ -100,4 +105,7 @@ void btc_blufi_call_deep_free(btc_msg_t *msg);

 uint16_t btc_blufi_get_version(void);

+#ifdef __cplusplus
+}
+#endif
 #endif /* __BTC_BLUFI_PRF_H__ */
--- a/components/bt/common/osi/config.c
+++ b/components/bt/common/osi/config.c
@ -254,6 +254,32 @@ bool config_remove_section(config_t *config, const char *section)
    return list_remove(config->sections, sec);
 }

+bool config_update_newest_section(config_t *config, const char *section)
+{
+    assert(config != NULL);
+    assert(section != NULL);
+
+    list_node_t *first_node = list_begin(config->sections);
+    if (first_node == NULL) {
+        return false;
+    }
+    section_t *first_sec = list_node(first_node);
+    if (strcmp(first_sec->name, section) == 0) {
+        return true;
+    }
+
+    for (const list_node_t *node = list_begin(config->sections); node != list_end(config->sections); node = list_next(node)) {
+        section_t *sec = list_node(node);
+        if (strcmp(sec->name, section) == 0) {
+            list_delete(config->sections, sec);
+            list_prepend(config->sections, sec);
+            return true;
+        }
+    }
+
+    return false;
+}
+
 bool config_remove_key(config_t *config, const char *section, const char *key)
 {
    assert(config != NULL);
--- a/components/bt/common/osi/include/osi/config.h
+++ b/components/bt/common/osi/include/osi/config.h
@ -99,6 +99,11 @@ void config_set_string(config_t *config, const char *section, const char *key, c
 // Neither |config| nor |section| may be NULL.
 bool config_remove_section(config_t *config, const char *section);

+// Updates |section| to be the first section in |config|. Return true if |section| is in
+// |config| and updated successfully, false otherwise.
+// Neither |config| nor |section| may be NULL.
+bool config_update_newest_section(config_t *config, const char *section);
+
 // Removes one specific |key| residing in |section| of the |config|. Returns true
 // if the section and key were found and the key was removed, false otherwise.
 // None of |config|, |section|, or |key| may be NULL.
--- a/components/bt/controller/esp32/Kconfig.in
+++ b/components/bt/controller/esp32/Kconfig.in
@ -205,6 +205,11 @@ menu "HCI UART(H4) Options"
        help
            UART Baudrate for HCI. Please use standard baudrate.

+    config BTDM_CTRL_HCI_UART_FLOW_CTRL_EN
+        bool "Enable UART flow control"
+        depends on BTDM_CTRL_HCI_MODE_UART_H4
+        default y
+
 endmenu

 menu "MODEM SLEEP Options"
@ -351,7 +356,7 @@ config BTDM_SCAN_DUPL_CACHE_SIZE
    default 100
    help
        Maximum number of devices which can be recorded in scan duplicate filter.
-        When the maximum amount of device in the filter is reached, the cache will be refreshed.
+        When the maximum amount of device in the filter is reached, the oldest device will be refreshed.

 config BTDM_SCAN_DUPL_CACHE_REFRESH_PERIOD
    int "Duplicate scan list refresh period (seconds)"
--- a/components/bt/controller/esp32/bt.c
+++ b/components/bt/controller/esp32/bt.c
@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
 *
 * SPDX-License-Identifier: Apache-2.0
 */
@ -35,7 +35,7 @@
 #include "soc/rtc.h"
 #include "soc/soc_memory_layout.h"
 #include "soc/dport_reg.h"
-#include "esp_coexist_internal.h"
+#include "private/esp_coexist_internal.h"
 #include "esp_timer.h"
 #if !CONFIG_FREERTOS_UNICORE
 #include "esp_ipc.h"
@ -89,7 +89,7 @@ do{\
 } while(0)

 #define OSI_FUNCS_TIME_BLOCKING  0xffffffff
-#define OSI_VERSION              0x00010004
+#define OSI_VERSION              0x00010005
 #define OSI_MAGIC_VALUE          0xFADEBEAD

 /* Types definition
@ -111,7 +111,6 @@ typedef struct {

 typedef struct {
    void *handle;
-    void *storage;
 } btdm_queue_item_t;

 /* OSI function */
@ -177,6 +176,7 @@ struct osi_funcs_t {
    void (*_interrupt_l3_restore)(void);
    void *(* _customer_queue_create)(uint32_t queue_len, uint32_t item_size);
    int (* _coex_version_get)(unsigned int *major, unsigned int *minor, unsigned int *patch);
+    void (* _patch_apply)(void);
    uint32_t _magic;
 };

@ -221,6 +221,8 @@ extern void bredr_sco_datapath_set(uint8_t data_path);
 extern void btdm_controller_scan_duplicate_list_clear(void);
 /* Shutdown */
 extern void esp_bt_controller_shutdown(void);
+extern void sdk_config_set_bt_pll_track_enable(bool enable);
+extern void sdk_config_set_uart_flow_ctrl_enable(bool enable);

 extern char _bss_start_btdm;
 extern char _bss_end_btdm;
@ -242,6 +244,10 @@ extern uint32_t _nimble_data_end;
 extern uint32_t _btdm_data_start;
 extern uint32_t _btdm_data_end;

+extern void config_bt_funcs_reset(void);
+extern void config_ble_funcs_reset(void);
+extern void config_btdm_funcs_reset(void);
+
 /* Local Function Declare
 *********************************************************************
 */
@ -314,6 +320,7 @@ static void *customer_queue_create_hlevel_wrapper(uint32_t queue_len, uint32_t i
 static void interrupt_l3_disable(void);
 static void interrupt_l3_restore(void);
 static void bt_controller_deinit_internal(void);
+static void patch_apply(void);

 /* Local variable definition
 ***************************************************************************
@ -401,6 +408,7 @@ static const struct osi_funcs_t osi_funcs_ro = {
    ._customer_queue_create = NULL,
 #endif /* CONFIG_BTDM_CTRL_HLI */
    ._coex_version_get = coex_version_get_wrapper,
+    ._patch_apply = patch_apply,
    ._magic = OSI_MAGIC_VALUE,
 };

@ -555,17 +563,8 @@ static void *semphr_create_wrapper(uint32_t max, uint32_t init)

    void *handle = NULL;

-#if !CONFIG_SPIRAM_USE_MALLOC
+    /* IDF FreeRTOS guarantees that all dynamic memory allocation goes to internal RAM. */
    handle = (void *)xSemaphoreCreateCounting(max, init);
-#else
-    StaticQueue_t *queue_buffer = NULL;
-
-    queue_buffer = heap_caps_malloc(sizeof(StaticQueue_t), MALLOC_CAP_INTERNAL|MALLOC_CAP_8BIT);
-    assert(queue_buffer);
-    semphr->storage = queue_buffer;
-
-    handle = (void *)xSemaphoreCreateCountingStatic(max, init, queue_buffer);
-#endif
    assert(handle);

 #if CONFIG_BTDM_CTRL_HLI
@ -601,11 +600,6 @@ static void semphr_delete_wrapper(void *semphr)
    if (handle) {
        vSemaphoreDelete(handle);
    }
-#ifdef CONFIG_SPIRAM_USE_MALLOC
-    if (semphr_item->storage) {
-        free(semphr_item->storage);
-    }
-#endif

    free(semphr);
 }
@ -691,18 +685,9 @@ static void *queue_create_wrapper(uint32_t queue_len, uint32_t item_size)
    queue = (btdm_queue_item_t*)heap_caps_malloc(sizeof(btdm_queue_item_t), MALLOC_CAP_INTERNAL|MALLOC_CAP_8BIT);
    assert(queue);

-#if CONFIG_SPIRAM_USE_MALLOC
-
-    queue->storage = heap_caps_calloc(1, sizeof(StaticQueue_t) + (queue_len*item_size), MALLOC_CAP_INTERNAL|MALLOC_CAP_8BIT);
-    assert(queue->storage);
-
-    queue->handle = xQueueCreateStatic( queue_len, item_size, ((uint8_t*)(queue->storage)) + sizeof(StaticQueue_t), (StaticQueue_t*)(queue->storage));
-    assert(queue->handle);
-
-#else
+    /* IDF FreeRTOS guarantees that all dynamic memory allocation goes to internal RAM. */
    queue->handle = xQueueCreate( queue_len, item_size);
    assert(queue->handle);
-#endif

    return queue;
 }
@ -714,13 +699,6 @@ static void queue_delete_wrapper(void *queue)
        if(queue_item->handle){
            vQueueDelete(queue_item->handle);
        }
-
-#if CONFIG_SPIRAM_USE_MALLOC
-        if (queue_item->storage) {
-            free(queue_item->storage);
-        }
-#endif
-
        free(queue_item);
    }
 }
@ -895,7 +873,11 @@ static void *malloc_internal_wrapper(size_t size)

 static int32_t IRAM_ATTR read_mac_wrapper(uint8_t mac[6])
 {
-    return esp_read_mac(mac, ESP_MAC_BT);
+    int ret = esp_read_mac(mac, ESP_MAC_BT);
+    ESP_LOGI(BTDM_LOG_TAG, "Bluetooth MAC: %02x:%02x:%02x:%02x:%02x:%02x",
+               mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
+
+    return ret;
 }

 static void IRAM_ATTR srand_wrapper(unsigned int seed)
@ -964,7 +946,7 @@ static void btdm_sleep_enter_phase1_wrapper(uint32_t lpcycles)
 static void btdm_sleep_enter_phase2_wrapper(void)
 {
    if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_ORIG) {
-        esp_phy_disable();
+        esp_phy_disable(PHY_MODEM_BT);
 #ifdef CONFIG_PM_ENABLE
        if (s_pm_lock_acquired) {
            esp_pm_lock_release(s_pm_lock);
@ -972,7 +954,7 @@ static void btdm_sleep_enter_phase2_wrapper(void)
        }
 #endif
    } else if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_EVED) {
-        esp_phy_disable();
+        esp_phy_disable(PHY_MODEM_BT);
        // pause bluetooth baseband
        periph_module_disable(PERIPH_BT_BASEBAND_MODULE);
    }
@ -988,7 +970,7 @@ static void btdm_sleep_exit_phase3_wrapper(void)
 #endif

    if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_ORIG) {
-        esp_phy_enable();
+        esp_phy_enable(PHY_MODEM_BT);
        btdm_check_and_init_bb();
 #ifdef CONFIG_PM_ENABLE
        esp_timer_stop(s_btdm_slp_tmr);
@ -996,7 +978,7 @@ static void btdm_sleep_exit_phase3_wrapper(void)
    } else if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_EVED) {
        // resume bluetooth baseband
        periph_module_enable(PERIPH_BT_BASEBAND_MODULE);
-        esp_phy_enable();
+        esp_phy_enable(PHY_MODEM_BT);
    }
 }

@ -1222,23 +1204,12 @@ static int coex_register_wifi_channel_change_callback_wrapper(void *cb)
 static int coex_version_get_wrapper(unsigned int *major, unsigned int *minor, unsigned int *patch)
 {
 #if CONFIG_SW_COEXIST_ENABLE
-    const char *ver_str = esp_coex_version_get();
-    if (ver_str != NULL) {
-        unsigned int _major = 0, _minor = 0, _patch = 0;
-        if (sscanf(ver_str, "%u.%u.%u", &_major, &_minor, &_patch) != 3) {
-            return -1;
-        }
-        if (major != NULL) {
-            *major = _major;
-        }
-        if (minor != NULL) {
-            *minor = _minor;
-        }
-        if (patch != NULL) {
-            *patch = _patch;
-        }
-        return 0;
-    }
+    coex_version_t version;
+    ESP_ERROR_CHECK(coex_version_get_value(&version));
+    *major = (unsigned int)version.major;
+    *minor = (unsigned int)version.minor;
+    *patch = (unsigned int)version.patch;
+    return 0;
 #endif
    return -1;
 }
@ -1553,6 +1524,12 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
    btdm_controller_set_sleep_mode(BTDM_MODEM_SLEEP_MODE_NONE);
 #endif

+#if CONFIG_BTDM_CTRL_HCI_UART_FLOW_CTRL_EN
+    sdk_config_set_uart_flow_ctrl_enable(true);
+#else
+    sdk_config_set_uart_flow_ctrl_enable(false);
+#endif
+
 #ifdef CONFIG_PM_ENABLE
    if (!s_btdm_allow_light_sleep) {
        if ((err = esp_pm_lock_create(ESP_PM_NO_LIGHT_SLEEP, 0, "btLS", &s_light_sleep_pm_lock)) != ESP_OK) {
@ -1668,11 +1645,23 @@ static void bt_shutdown(void)
 #else
    bt_controller_shutdown(NULL);
 #endif
-    esp_phy_disable();
+    esp_phy_disable(PHY_MODEM_BT);

    return;
 }

+static void patch_apply(void)
+{
+    config_btdm_funcs_reset();
+
+#ifndef CONFIG_BTDM_CTRL_MODE_BLE_ONLY
+    config_bt_funcs_reset();
+#endif
+
+#ifndef CONFIG_BTDM_CTRL_MODE_BR_EDR_ONLY
+    config_ble_funcs_reset();
+#endif
+}

 esp_err_t esp_bt_controller_enable(esp_bt_mode_t mode)
 {
@ -1694,7 +1683,7 @@ esp_err_t esp_bt_controller_enable(esp_bt_mode_t mode)
    esp_pm_lock_acquire(s_pm_lock);
 #endif

-    esp_phy_enable();
+    esp_phy_enable(PHY_MODEM_BT);

 #if CONFIG_SW_COEXIST_ENABLE
    coex_enable();
@ -1704,6 +1693,8 @@ esp_err_t esp_bt_controller_enable(esp_bt_mode_t mode)
        btdm_controller_enable_sleep(true);
    }

+    sdk_config_set_bt_pll_track_enable(true);
+
    // inititalize bluetooth baseband
    btdm_check_and_init_bb();

@ -1712,7 +1703,7 @@ esp_err_t esp_bt_controller_enable(esp_bt_mode_t mode)
 #if CONFIG_SW_COEXIST_ENABLE
        coex_disable();
 #endif
-        esp_phy_disable();
+        esp_phy_disable(PHY_MODEM_BT);
 #ifdef CONFIG_PM_ENABLE
        if (!s_btdm_allow_light_sleep) {
            esp_pm_lock_release(s_light_sleep_pm_lock);
@ -1752,7 +1743,7 @@ esp_err_t esp_bt_controller_disable(void)
    coex_disable();
 #endif

-    esp_phy_disable();
+    esp_phy_disable(PHY_MODEM_BT);
    btdm_controller_status = ESP_BT_CONTROLLER_STATUS_INITED;
    esp_unregister_shutdown_handler(bt_shutdown);

--- a/components/bt/controller/esp32c2/Kconfig.in
+++ b/components/bt/controller/esp32c2/Kconfig.in
@ -147,7 +147,7 @@ if BT_LE_EXT_ADV
            Enable this option to start periodic advertisement.

    config BT_LE_PERIODIC_ADV_SYNC_TRANSFER
-        bool "Enable Transer Sync Events"
+        bool "Enable Transfer Sync Events"
        depends on BT_LE_ENABLE_PERIODIC_ADV
        default y
        help
@ -253,6 +253,54 @@ config BT_LE_CONTROLLER_TASK_STACK_SIZE
    help
        This configures stack size of NimBLE controller task

+menuconfig BT_LE_CONTROLLER_LOG_ENABLED
+    bool "Controller log enable"
+    default n
+    help
+        Enable controller log
+
+config BT_LE_CONTROLLER_LOG_CTRL_ENABLED
+    bool "enable controller log module"
+    depends on BT_LE_CONTROLLER_LOG_ENABLED
+    default y
+    help
+            Enable controller log module
+
+config BT_LE_CONTROLLER_LOG_HCI_ENABLED
+    bool "enable HCI log module"
+    depends on BT_LE_CONTROLLER_LOG_ENABLED
+    default y
+    help
+            Enable hci log module
+
+config BT_LE_CONTROLLER_LOG_DUMP_ONLY
+    bool "Controller log dump mode only"
+    depends on BT_LE_CONTROLLER_LOG_ENABLED
+    default y
+    help
+            Only operate in dump mode
+
+config BT_LE_LOG_CTRL_BUF1_SIZE
+    int "size of the first BLE controller LOG buffer"
+    depends on BT_LE_CONTROLLER_LOG_ENABLED
+    default 4096
+    help
+            Configure the size of the first BLE controller LOG buffer.
+
+config BT_LE_LOG_CTRL_BUF2_SIZE
+    int "size of the second BLE controller LOG buffer"
+    depends on BT_LE_CONTROLLER_LOG_ENABLED
+    default 1024
+    help
+            Configure the size of the second BLE controller LOG buffer.
+
+config BT_LE_LOG_HCI_BUF_SIZE
+    int "size of the BLE HCI LOG buffer"
+    depends on BT_LE_CONTROLLER_LOG_ENABLED
+    default 4096
+    help
+            Configure the size of the BLE HCI LOG buffer.
+
 config BT_LE_LL_RESOLV_LIST_SIZE
    int "BLE LL Resolving list size"
    range 1 5
@ -345,7 +393,7 @@ config BT_LE_MAX_CONNECTIONS
 choice BT_LE_COEX_PHY_CODED_TX_RX_TLIM
    prompt "Coexistence: limit on MAX Tx/Rx time for coded-PHY connection"
    default BT_LE_COEX_PHY_CODED_TX_RX_TLIM_DIS
-    depends on !BT_NIMBLE_ENABLED
+    depends on ESP_COEX_SW_COEXIST_ENABLE
    help
        When using PHY-Coded in BLE connection, limitation on max tx/rx time can be applied to
        better avoid dramatic performance deterioration of Wi-Fi.
@ -363,7 +411,7 @@ endchoice

 config BT_LE_COEX_PHY_CODED_TX_RX_TLIM_EFF
    int
-    depends on !BT_NIMBLE_ENABLED
+    default 0 if !ESP_COEX_SW_COEXIST_ENABLE
    default 1 if BT_LE_COEX_PHY_CODED_TX_RX_TLIM_EN
    default 0 if BT_LE_COEX_PHY_CODED_TX_RX_TLIM_DIS

@ -373,19 +421,24 @@ config BT_LE_SLEEP_ENABLE
    help
        Enable BLE sleep

-choice BT_LE_WAKEUP_SOURCE
-    prompt "BLE light sleep wakeup source"
-    depends on BT_LE_SLEEP_ENABLE
-    default BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER
-    config BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
-        bool "Use ESP timer to wakeup CPU"
+choice BT_LE_LP_CLK_SRC
+    prompt "BLE low power clock source"
+    default BT_LE_LP_CLK_SRC_MAIN_XTAL
+    config BT_LE_LP_CLK_SRC_MAIN_XTAL
+        bool "Use main XTAL as RTC clock source"
        help
-            Use esp timer to wakeup CPU
+            User main XTAL as RTC clock source.
+            This option is recommended if external 32.768k XTAL is not available.
+            Using the external 32.768 kHz XTAL will have lower current consumption
+            in light sleep compared to using the main XTAL.

-    config BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER
-        bool "Use BLE rtc timer to wakeup CPU"
+    config BT_LE_LP_CLK_SRC_DEFAULT
+        bool "Use system RTC slow clock source"
        help
-            Use BLE rtc timer to wakeup CPU
+            Use the same slow clock source as system RTC
+            Using any clock source other than external 32.768 kHz XTAL at pin0 supports only
+            legacy ADV and SCAN due to low clock accuracy.
+
 endchoice

 config BT_LE_USE_ESP_TIMER
@ -394,3 +447,53 @@ config BT_LE_USE_ESP_TIMER
    default y
    help
        Set this option to use Esp Timer which has higher priority timer instead of FreeRTOS timer
+
+config BT_CTRL_BLE_ADV_REPORT_FLOW_CTRL_SUPP
+    bool "BLE adv report flow control supported"
+    default y
+    help
+        The function is mainly used to enable flow control for advertising reports. When it is enabled,
+        advertising reports will be discarded by the controller if the number of unprocessed advertising
+        reports exceeds the size of BLE adv report flow control.
+
+config BT_CTRL_BLE_ADV_REPORT_FLOW_CTRL_NUM
+    int "BLE adv report flow control number"
+    depends on BT_CTRL_BLE_ADV_REPORT_FLOW_CTRL_SUPP
+    range 50 1000
+    default 100
+    help
+        The number of unprocessed advertising report that bluetooth host can save.If you set
+        `BT_CTRL_BLE_ADV_REPORT_FLOW_CTRL_NUM` to a small value, this may cause adv packets lost.
+        If you set `BT_CTRL_BLE_ADV_REPORT_FLOW_CTRL_NUM` to a large value, bluetooth host may cache a
+        lot of adv packets and this may cause system memory run out. For example, if you set
+        it to 50, the maximum memory consumed by host is 35 * 50 bytes. Please set
+        `BT_CTRL_BLE_ADV_REPORT_FLOW_CTRL_NUM` according to your system free memory and handle adv
+        packets as fast as possible, otherwise it will cause adv packets lost.
+
+config BT_CTRL_BLE_ADV_REPORT_DISCARD_THRSHOLD
+    int "BLE adv lost event threshold value"
+    depends on BT_CTRL_BLE_ADV_REPORT_FLOW_CTRL_SUPP
+    range 1 1000
+    default 20
+    help
+        When adv report flow control is enabled, The ADV lost event will be generated when the number
+        of ADV packets lost in the controller reaches this threshold. It is better to set a larger value.
+        If you set `BT_CTRL_BLE_ADV_REPORT_DISCARD_THRSHOLD` to a small value or printf every adv lost event, it
+        may cause adv packets lost more.
+config BT_LE_RELEASE_IRAM_SUPPORTED
+    bool
+    default y
+
+config BT_LE_TX_CCA_ENABLED
+    bool "Enable TX CCA feature"
+    default n
+    help
+        Enable CCA feature to cancel sending the packet if the signal power is stronger than CCA threshold.
+
+config BT_LE_CCA_RSSI_THRESH
+    int "CCA RSSI threshold value"
+    depends on BT_LE_TX_CCA_ENABLED
+    range 20 100
+    default 20
+    help
+        Power threshold of CCA in unit of -1 dBm.
--- a/components/bt/controller/esp32c2/bt.c
+++ b/components/bt/controller/esp32c2/bt.c
@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
 *
 * SPDX-License-Identifier: Apache-2.0
 */
@ -24,7 +24,7 @@
 #endif

 #if CONFIG_SW_COEXIST_ENABLE
-#include "esp_coexist_internal.h"
+#include "private/esp_coexist_internal.h"
 #endif

 #include "nimble/nimble_npl_os.h"
@ -46,14 +46,22 @@
 #include "hci/hci_hal.h"
 #endif

+#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
+#include "esp_private/sleep_modem.h"
+#endif // CONFIG_FREERTOS_USE_TICKLESS_IDLE
+
 #include "freertos/FreeRTOS.h"
 #include "freertos/task.h"

 #include "esp_private/periph_ctrl.h"
+#include "esp_private/esp_clk.h"
 #include "esp_sleep.h"

 #include "soc/syscon_reg.h"
 #include "soc/dport_access.h"
+
+#include "hal/efuse_ll.h"
+#include "soc/rtc.h"
 /* Macro definition
 ************************************************************************
 */
@ -70,12 +78,16 @@
 #ifdef CONFIG_BT_BLUEDROID_ENABLED
 /* ACL_DATA_MBUF_LEADINGSPCAE: The leadingspace in user info header for ACL data */
 #define ACL_DATA_MBUF_LEADINGSPCAE    4
-#endif
+#endif // CONFIG_BT_BLUEDROID_ENABLED
+
+typedef enum ble_rtc_slow_clk_src {
+    BT_SLOW_CLK_SRC_MAIN_XTAL,
+    BT_SLOW_CLK_SRC_32K_XTAL_ON_PIN0,
+} ble_rtc_slow_clk_src_t;

 /* Types definition
 ************************************************************************
 */
-
 struct osi_coex_funcs_t {
    uint32_t _magic;
    uint32_t _version;
@ -108,13 +120,21 @@ struct ext_funcs_t {
    uint32_t magic;
 };

+#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
+typedef void (*interface_func_t) (uint32_t len, const uint8_t*addr, bool end);
+#endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED

 /* External functions or variables
 ************************************************************************
 */
-
 extern int ble_osi_coex_funcs_register(struct osi_coex_funcs_t *coex_funcs);
 extern int ble_controller_init(esp_bt_controller_config_t *cfg);
+#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
+extern int ble_log_init_async(interface_func_t bt_controller_log_interface, bool task_create, uint8_t buffers, uint32_t *bufs_size);
+extern int ble_log_deinit_async(void);
+extern void ble_log_async_output_dump_all(bool output);
+extern void esp_panic_handler_reconfigure_wdts(uint32_t timeout_ms);
+#endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
 extern int ble_controller_deinit(void);
 extern int ble_controller_enable(uint8_t mode);
 extern int ble_controller_disable(void);
@ -130,6 +150,9 @@ extern uint32_t r_os_cputime_get32(void);
 extern uint32_t r_os_cputime_ticks_to_usecs(uint32_t ticks);
 extern void r_ble_lll_rfmgmt_set_sleep_cb(void *s_cb, void *w_cb, void *s_arg, void *w_arg, uint32_t us_to_enabled);
 extern void r_ble_rtc_wake_up_state_clr(void);
+#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
+extern void esp_ble_set_wakeup_overhead(uint32_t overhead);
+#endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */
 extern int os_msys_init(void);
 extern void os_msys_buf_free(void);
 extern int ble_sm_alg_gen_dhkey(const uint8_t *peer_pub_key_x,
@ -139,14 +162,16 @@ extern int ble_sm_alg_gen_key_pair(uint8_t *pub, uint8_t *priv);
 extern int ble_txpwr_set(esp_ble_enhanced_power_type_t power_type, uint16_t handle, int power_level);
 extern int ble_txpwr_get(esp_ble_enhanced_power_type_t power_type, uint16_t handle);
 extern int ble_get_npl_element_info(esp_bt_controller_config_t *cfg, ble_npl_count_info_t * npl_info);
-extern uint32_t _bt_bss_start;
+extern void bt_track_pll_cap(void);
+extern char *ble_controller_get_compile_version(void);
+extern const char *r_ble_controller_get_rom_compile_version(void);
+#if CONFIG_BT_RELEASE_IRAM
+extern uint32_t _iram_bt_text_start;
+extern uint32_t _bss_bt_end;
+#else
 extern uint32_t _bt_bss_end;
-extern uint32_t _nimble_bss_start;
-extern uint32_t _nimble_bss_end;
-extern uint32_t _nimble_data_start;
-extern uint32_t _nimble_data_end;
-extern uint32_t _bt_data_start;
-extern uint32_t _bt_data_end;
+extern uint32_t _bt_controller_data_start;
+#endif

 /* Local Function Declaration
 *********************************************************************
@ -164,36 +189,37 @@ static int hci_uart_config_wrapper(int uart_no, int32_t speed, uint8_t databits,
 static int hci_uart_close_wrapper(int uart_no);
 static void hci_uart_blocking_tx_wrapper(int port, uint8_t data);
 static int hci_uart_init_wrapper(int uart_no, void *cfg);
-#endif
-static int esp_intr_alloc_wrapper(int source, int flags, intr_handler_t handler, void *arg, void **ret_handle_in);
+#endif // CONFIG_BT_LE_HCI_INTERFACE_USE_UART
+static int esp_intr_alloc_wrapper(int source, int flags, intr_handler_t handler,
+                                  void *arg, void **ret_handle_in);
 static int esp_intr_free_wrapper(void **ret_handle);
 static void osi_assert_wrapper(const uint32_t ln, const char *fn, uint32_t param1, uint32_t param2);
 static uint32_t osi_random_wrapper(void);
 static void esp_reset_rpa_moudle(void);
-
+static int esp_ecc_gen_key_pair(uint8_t *pub, uint8_t *priv);
+static int esp_ecc_gen_dh_key(const uint8_t *peer_pub_key_x, const uint8_t *peer_pub_key_y,
+                              const uint8_t *our_priv_key, uint8_t *out_dhkey);
+#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
+static void esp_bt_controller_log_interface(uint32_t len, const uint8_t *addr, bool end);
+#endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
 /* Local variable definition
 ***************************************************************************
 */
-
 /* Static variable declare */
 static DRAM_ATTR esp_bt_controller_status_t ble_controller_status = ESP_BT_CONTROLLER_STATUS_IDLE;

+#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
+const static uint32_t log_bufs_size[] = {CONFIG_BT_LE_LOG_CTRL_BUF1_SIZE, CONFIG_BT_LE_LOG_HCI_BUF_SIZE, CONFIG_BT_LE_LOG_CTRL_BUF2_SIZE};
+#endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
+
 /* This variable tells if BLE is running */
 static bool s_ble_active = false;
 #ifdef CONFIG_PM_ENABLE
 static DRAM_ATTR esp_pm_lock_handle_t s_pm_lock = NULL;
 #define BTDM_MIN_TIMER_UNCERTAINTY_US      (200)
-#endif /* #ifdef CONFIG_PM_ENABLE */
+#endif // CONFIG_PM_ENABLE

-#ifdef CONFIG_BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER
 #define BLE_RTC_DELAY_US                    (1800)
-#endif
-
-#ifdef CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
-#define BLE_RTC_DELAY_US                    (0)
-static void ble_sleep_timer_callback(void *arg);
-static DRAM_ATTR esp_timer_handle_t s_ble_sleep_timer = NULL;
-#endif


 static const struct osi_coex_funcs_t s_osi_coex_funcs_ro = {
@ -223,9 +249,10 @@ struct ext_funcs_t ext_funcs_ro = {
    ._task_delete = task_delete_wrapper,
    ._osi_assert = osi_assert_wrapper,
    ._os_random = osi_random_wrapper,
-    ._ecc_gen_key_pair = ble_sm_alg_gen_key_pair,
-    ._ecc_gen_dh_key = ble_sm_alg_gen_dhkey,
+    ._ecc_gen_key_pair = esp_ecc_gen_key_pair,
+    ._ecc_gen_dh_key = esp_ecc_gen_dh_key,
    ._esp_reset_rpa_moudle = esp_reset_rpa_moudle,
+    ._esp_bt_track_pll_cap = NULL,
    .magic = EXT_FUNC_MAGIC_VALUE,
 };

@ -235,9 +262,13 @@ static void IRAM_ATTR esp_reset_rpa_moudle(void)
    DPORT_CLEAR_PERI_REG_MASK(SYSTEM_CORE_RST_EN_REG, BLE_RPA_REST_BIT);
 }

-static void IRAM_ATTR osi_assert_wrapper(const uint32_t ln, const char *fn, uint32_t param1, uint32_t param2)
+static void IRAM_ATTR osi_assert_wrapper(const uint32_t ln, const char *fn,
+                                         uint32_t param1, uint32_t param2)
 {
    BT_ASSERT_PRINT("BLE assert: line %d in function %s, param: 0x%x, 0x%x", ln, fn, param1, param2);
+#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
+    esp_ble_controller_log_dump_all(true);
+#endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
    assert(0);
 }

@ -250,17 +281,17 @@ static void coex_schm_status_bit_set_wrapper(uint32_t type, uint32_t status)
 {
 #if CONFIG_SW_COEXIST_ENABLE
    coex_schm_status_bit_set(type, status);
-#endif
+#endif // CONFIG_SW_COEXIST_ENABLE
 }

 static void coex_schm_status_bit_clear_wrapper(uint32_t type, uint32_t status)
 {
 #if CONFIG_SW_COEXIST_ENABLE
    coex_schm_status_bit_clear(type, status);
-#endif
+#endif // CONFIG_SW_COEXIST_ENABLE
 }
-#ifdef CONFIG_BT_BLUEDROID_ENABLED

+#ifdef CONFIG_BT_BLUEDROID_ENABLED
 bool esp_vhci_host_check_send_available(void)
 {
    if (ble_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
@ -313,6 +344,7 @@ void esp_vhci_host_send_packet(uint8_t *data, uint16_t len)
    if (*(data) == DATA_TYPE_COMMAND) {
        struct ble_hci_cmd *cmd = NULL;
        cmd = (struct ble_hci_cmd *) ble_hci_trans_buf_alloc(BLE_HCI_TRANS_BUF_CMD);
+        assert(cmd);
        memcpy((uint8_t *)cmd, data + 1, len - 1);
        ble_hci_trans_hs_cmd_tx((uint8_t *)cmd);
    }
@ -323,7 +355,6 @@ void esp_vhci_host_send_packet(uint8_t *data, uint16_t len)
        assert(os_mbuf_append(om, &data[1], len - 1) == 0);
        ble_hci_trans_hs_acl_tx(om);
    }
-
 }

 esp_err_t esp_vhci_host_register_callback(const esp_vhci_host_callback_t *callback)
@ -336,8 +367,7 @@ esp_err_t esp_vhci_host_register_callback(const esp_vhci_host_callback_t *callba

    return ESP_OK;
 }
-
-#endif
+#endif // CONFIG_BT_BLUEDROID_ENABLED
 static int task_create_wrapper(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id)
 {
    return (uint32_t)xTaskCreatePinnedToCore(task_func, name, stack_depth, param, prio, task_handle, (core_id < portNUM_PROCESSORS ? core_id : tskNO_AFFINITY));
@ -348,6 +378,25 @@ static void task_delete_wrapper(void *task_handle)
    vTaskDelete(task_handle);
 }

+static int esp_ecc_gen_key_pair(uint8_t *pub, uint8_t *priv)
+{
+    int rc = -1;
+#if CONFIG_BT_LE_SM_LEGACY || CONFIG_BT_LE_SM_SC
+    rc = ble_sm_alg_gen_key_pair(pub, priv);
+#endif // CONFIG_BT_LE_SM_LEGACY || CONFIG_BT_LE_SM_SC
+    return rc;
+}
+
+static int esp_ecc_gen_dh_key(const uint8_t *peer_pub_key_x, const uint8_t *peer_pub_key_y,
+                              const uint8_t *our_priv_key, uint8_t *out_dhkey)
+{
+    int rc = -1;
+#if CONFIG_BT_LE_SM_LEGACY || CONFIG_BT_LE_SM_SC
+    rc = ble_sm_alg_gen_dhkey(peer_pub_key_x, peer_pub_key_y, our_priv_key, out_dhkey);
+#endif // CONFIG_BT_LE_SM_LEGACY || CONFIG_BT_LE_SM_SC
+    return rc;
+}
+
 #ifdef CONFIG_BT_LE_HCI_INTERFACE_USE_UART
 static void hci_uart_start_tx_wrapper(int uart_no)
 {
@ -363,8 +412,9 @@ static int hci_uart_init_cbs_wrapper(int uart_no, hci_uart_tx_char tx_func,
 }


-static int hci_uart_config_wrapper(int port_num, int32_t baud_rate, uint8_t data_bits, uint8_t stop_bits,
-                                   uart_parity_t parity, uart_hw_flowcontrol_t flow_ctl)
+static int hci_uart_config_wrapper(int port_num, int32_t baud_rate, uint8_t data_bits,
+                                   uint8_t stop_bits,uart_parity_t parity,
+                                   uart_hw_flowcontrol_t flow_ctl)
 {
    int rc = -1;
    rc = hci_uart_config(port_num, baud_rate, data_bits, stop_bits, parity, flow_ctl);
@ -411,43 +461,23 @@ static int esp_intr_free_wrapper(void **ret_handle)
    return rc;
 }

+#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
+void sleep_modem_light_sleep_overhead_set(uint32_t overhead)
+{
+    esp_ble_set_wakeup_overhead(overhead);
+}
+#endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */
+
 IRAM_ATTR void controller_sleep_cb(uint32_t enable_tick, void *arg)
 {
    if (!s_ble_active) {
        return;
    }
 #ifdef CONFIG_PM_ENABLE
-#ifdef CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
-    uint32_t delta_tick;
-    uint32_t us_to_sleep;
-    uint32_t sleep_tick;
-    uint32_t tick_invalid = *(uint32_t*)(arg);
-    assert(arg != NULL);
-    if (!tick_invalid) {
-        sleep_tick = r_os_cputime_get32();
-        // start a timer to wake up and acquire the pm_lock before modem_sleep awakes
-        delta_tick = enable_tick - sleep_tick;
-        if (delta_tick & 0x80000000) {
-            return;
-        }
-        us_to_sleep = r_os_cputime_ticks_to_usecs(delta_tick);
-        if (us_to_sleep <= BTDM_MIN_TIMER_UNCERTAINTY_US) {
-            return;
-        }
-        esp_err_t err = esp_timer_start_once(s_ble_sleep_timer, us_to_sleep - BTDM_MIN_TIMER_UNCERTAINTY_US);
-        if (err != ESP_OK) {
-            ESP_LOGW(NIMBLE_PORT_LOG_TAG, "ESP timer start failed\n");
-            return;
-        }
-    }
-#endif // CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
-
-#ifdef CONFIG_BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER
    r_ble_rtc_wake_up_state_clr();
-#endif
    esp_pm_lock_release(s_pm_lock);
 #endif // CONFIG_PM_ENABLE
-    esp_phy_disable();
+    esp_phy_disable(PHY_MODEM_BT);
    s_ble_active = false;
 }

@ -456,7 +486,7 @@ IRAM_ATTR void controller_wakeup_cb(void *arg)
    if (s_ble_active) {
        return;
    }
-    esp_phy_enable();
+    esp_phy_enable(PHY_MODEM_BT);
    // need to check if need to call pm lock here
 #ifdef CONFIG_PM_ENABLE
    esp_pm_lock_acquire(s_pm_lock);
@ -464,17 +494,7 @@ IRAM_ATTR void controller_wakeup_cb(void *arg)
    s_ble_active = true;
 }

-#ifdef CONFIG_PM_ENABLE
-#ifdef CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
-static void ble_sleep_timer_callback(void * arg)
-{
-
-}
-
-#endif // CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
-#endif // CONFIG_PM_ENABLE
-
-esp_err_t controller_sleep_init(void)
+esp_err_t controller_sleep_init(ble_rtc_slow_clk_src_t slow_clk_src)
 {
    esp_err_t rc = 0;
 #ifdef CONFIG_BT_LE_SLEEP_ENABLE
@ -482,7 +502,11 @@ esp_err_t controller_sleep_init(void)
    r_ble_lll_rfmgmt_set_sleep_cb(controller_sleep_cb, controller_wakeup_cb, 0, 0, 500 + BLE_RTC_DELAY_US);

 #ifdef CONFIG_PM_ENABLE
-    esp_sleep_pd_config(ESP_PD_DOMAIN_XTAL, ESP_PD_OPTION_ON);
+    if (slow_clk_src == BT_SLOW_CLK_SRC_MAIN_XTAL) {
+        esp_sleep_pd_config(ESP_PD_DOMAIN_XTAL, ESP_PD_OPTION_ON);
+    } else {
+        esp_sleep_pd_config(ESP_PD_DOMAIN_XTAL, ESP_PD_OPTION_AUTO);
+    }
 #endif // CONFIG_PM_ENABLE

 #endif // CONFIG_BT_LE_SLEEP_ENABLE
@ -493,107 +517,114 @@ esp_err_t controller_sleep_init(void)
    if (rc != ESP_OK) {
        goto error;
    }
-    esp_pm_lock_acquire(s_pm_lock);
-#ifdef CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
-    esp_timer_create_args_t create_args = {
-        .callback = ble_sleep_timer_callback,
-        .arg = NULL,
-        .name = "btSlp"
-    };
-    rc = esp_timer_create(&create_args, &s_ble_sleep_timer);
+#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
+    esp_sleep_enable_bt_wakeup();
+    ESP_LOGW(NIMBLE_PORT_LOG_TAG, "Enable light sleep, the wake up source is BLE timer");
+
+    rc = esp_pm_register_inform_out_light_sleep_overhead_callback(sleep_modem_light_sleep_overhead_set);
    if (rc != ESP_OK) {
        goto error;
    }
-    ESP_LOGW(NIMBLE_PORT_LOG_TAG, "Enable light sleep, the wake up source is ESP timer");
-#endif //CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
-
-#ifdef CONFIG_BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER
-    esp_sleep_enable_bt_wakeup();
-    ESP_LOGW(NIMBLE_PORT_LOG_TAG, "Enable light sleep, the wake up source is BLE timer");
-#endif // CONFIG_BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER
-
+#endif // CONFIG_FREERTOS_USE_TICKLESS_IDLE
    return rc;

 error:
+#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
+    esp_sleep_disable_bt_wakeup();
+    esp_pm_unregister_inform_out_light_sleep_overhead_callback(sleep_modem_light_sleep_overhead_set);
+#endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */
    /*lock should release first and then delete*/
    if (s_pm_lock != NULL) {
-        esp_pm_lock_release(s_pm_lock);
        esp_pm_lock_delete(s_pm_lock);
        s_pm_lock = NULL;
    }
-#ifdef CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
-    if (s_ble_sleep_timer != NULL) {
-        esp_timer_stop(s_ble_sleep_timer);
-        esp_timer_delete(s_ble_sleep_timer);
-        s_ble_sleep_timer = NULL;
-    }
-#endif // CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
-
-#ifdef CONFIG_BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER
-    esp_sleep_disable_bt_wakeup();
-#endif // CONFIG_BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER
-
 #endif //CONFIG_PM_ENABLE
    return rc;
 }

 void controller_sleep_deinit(void)
 {
-#ifdef CONFIG_PM_ENABLE
-#ifdef CONFIG_BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER
+#ifdef CONFIG_FREERTOS_USE_TICKLESS_IDLE
    r_ble_rtc_wake_up_state_clr();
    esp_sleep_disable_bt_wakeup();
-#endif //CONFIG_BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER
    esp_sleep_pd_config(ESP_PD_DOMAIN_XTAL, ESP_PD_OPTION_AUTO);
-
+    esp_pm_unregister_inform_out_light_sleep_overhead_callback(sleep_modem_light_sleep_overhead_set);
+#endif // CONFIG_FREERTOS_USE_TICKLESS_IDLE
+#ifdef CONFIG_PM_ENABLE
    /*lock should release first and then delete*/
-    if (s_ble_active) {
-        esp_pm_lock_release(s_pm_lock);
-    }
-
    esp_pm_lock_delete(s_pm_lock);
    s_pm_lock = NULL;
-#ifdef CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
-    if (s_ble_sleep_timer != NULL) {
-        esp_timer_stop(s_ble_sleep_timer);
-        esp_timer_delete(s_ble_sleep_timer);
-        s_ble_sleep_timer = NULL;
-    }
-#endif //CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
 #endif //CONFIG_PM_ENABLE
 }

-void ble_rtc_clk_init(void)
+static void esp_bt_rtc_slow_clk_select(ble_rtc_slow_clk_src_t slow_clk_src)
 {
-    // modem_clkrst_reg
-    // LP_TIMER_SEL_XTAL32K -> 0
-    // LP_TIMER_SEL_XTAL -> 1
-    // LP_TIMER_SEL_8M -> 0
-    // LP_TIMER_SEL_RTC_SLOW -> 0
-    SET_PERI_REG_BITS(MODEM_CLKRST_MODEM_LP_TIMER_CONF_REG, 1, 0, MODEM_CLKRST_LP_TIMER_SEL_XTAL32K_S);
-    SET_PERI_REG_BITS(MODEM_CLKRST_MODEM_LP_TIMER_CONF_REG, 1, 1, MODEM_CLKRST_LP_TIMER_SEL_XTAL_S);
-    SET_PERI_REG_BITS(MODEM_CLKRST_MODEM_LP_TIMER_CONF_REG, 1, 0, MODEM_CLKRST_LP_TIMER_SEL_8M_S);
-    SET_PERI_REG_BITS(MODEM_CLKRST_MODEM_LP_TIMER_CONF_REG, 1, 0, MODEM_CLKRST_LP_TIMER_SEL_RTC_SLOW_S);
-
+    /* Select slow clock source for BT momdule */
+    switch (slow_clk_src) {
+        case BT_SLOW_CLK_SRC_MAIN_XTAL:
+            ESP_LOGI(NIMBLE_PORT_LOG_TAG, "Using main XTAL as clock source");
+            SET_PERI_REG_BITS(MODEM_CLKRST_MODEM_LP_TIMER_CONF_REG, 1, 0, MODEM_CLKRST_LP_TIMER_SEL_XTAL32K_S);
+            SET_PERI_REG_BITS(MODEM_CLKRST_MODEM_LP_TIMER_CONF_REG, 1, 1, MODEM_CLKRST_LP_TIMER_SEL_XTAL_S);
+            SET_PERI_REG_BITS(MODEM_CLKRST_MODEM_LP_TIMER_CONF_REG, 1, 0, MODEM_CLKRST_LP_TIMER_SEL_8M_S);
+            SET_PERI_REG_BITS(MODEM_CLKRST_MODEM_LP_TIMER_CONF_REG, 1, 0, MODEM_CLKRST_LP_TIMER_SEL_RTC_SLOW_S);
 #ifdef CONFIG_XTAL_FREQ_26
-    // LP_TIMER_CLK_DIV_NUM -> 130
-    SET_PERI_REG_BITS(MODEM_CLKRST_MODEM_LP_TIMER_CONF_REG, MODEM_CLKRST_LP_TIMER_CLK_DIV_NUM, 129, MODEM_CLKRST_LP_TIMER_CLK_DIV_NUM_S);
+            SET_PERI_REG_BITS(MODEM_CLKRST_MODEM_LP_TIMER_CONF_REG, MODEM_CLKRST_LP_TIMER_CLK_DIV_NUM, 129, MODEM_CLKRST_LP_TIMER_CLK_DIV_NUM_S);
 #else
-    // LP_TIMER_CLK_DIV_NUM -> 250
-    SET_PERI_REG_BITS(MODEM_CLKRST_MODEM_LP_TIMER_CONF_REG, MODEM_CLKRST_LP_TIMER_CLK_DIV_NUM, 249, MODEM_CLKRST_LP_TIMER_CLK_DIV_NUM_S);
+            SET_PERI_REG_BITS(MODEM_CLKRST_MODEM_LP_TIMER_CONF_REG, MODEM_CLKRST_LP_TIMER_CLK_DIV_NUM, 249, MODEM_CLKRST_LP_TIMER_CLK_DIV_NUM_S);
 #endif // CONFIG_XTAL_FREQ_26
-
-    // MODEM_CLKRST_ETM_CLK_ACTIVE -> 1
-    // MODEM_CLKRST_ETM_CLK_SEL -> 0
+            break;
+        case BT_SLOW_CLK_SRC_32K_XTAL_ON_PIN0:
+            ESP_LOGI(NIMBLE_PORT_LOG_TAG, "Using external 32.768 kHz XTAL as clock source");
+            SET_PERI_REG_BITS(MODEM_CLKRST_MODEM_LP_TIMER_CONF_REG, 1, 1, MODEM_CLKRST_LP_TIMER_SEL_XTAL32K_S);
+            SET_PERI_REG_BITS(MODEM_CLKRST_MODEM_LP_TIMER_CONF_REG, 1, 0, MODEM_CLKRST_LP_TIMER_SEL_XTAL_S);
+            SET_PERI_REG_BITS(MODEM_CLKRST_MODEM_LP_TIMER_CONF_REG, 1, 0, MODEM_CLKRST_LP_TIMER_SEL_8M_S);
+            SET_PERI_REG_BITS(MODEM_CLKRST_MODEM_LP_TIMER_CONF_REG, 1, 0, MODEM_CLKRST_LP_TIMER_SEL_RTC_SLOW_S);
+            SET_PERI_REG_BITS(MODEM_CLKRST_MODEM_LP_TIMER_CONF_REG, MODEM_CLKRST_LP_TIMER_CLK_DIV_NUM, 0, MODEM_CLKRST_LP_TIMER_CLK_DIV_NUM_S);
+            break;
+        default:
+            ESP_LOGE(NIMBLE_PORT_LOG_TAG, "Unsupported slow clock");
+            assert(0);
+            break;
+    }
    SET_PERI_REG_BITS(MODEM_CLKRST_ETM_CLK_CONF_REG, 1, 1, MODEM_CLKRST_ETM_CLK_ACTIVE_S);
    SET_PERI_REG_BITS(MODEM_CLKRST_ETM_CLK_CONF_REG, 1, 0, MODEM_CLKRST_ETM_CLK_SEL_S);
+}

+static ble_rtc_slow_clk_src_t ble_rtc_clk_init(esp_bt_controller_config_t *cfg)
+{
+    ble_rtc_slow_clk_src_t slow_clk_src;
+
+#if CONFIG_BT_LE_LP_CLK_SRC_MAIN_XTAL
+#ifdef CONFIG_XTAL_FREQ_26
+   cfg->rtc_freq = 40000;
+#else
+   cfg->rtc_freq = 32000;
+#endif // CONFIG_XTAL_FREQ_26
+    slow_clk_src = BT_SLOW_CLK_SRC_MAIN_XTAL;
+#else
+    if (rtc_clk_slow_src_get() == SOC_RTC_SLOW_CLK_SRC_OSC_SLOW) {
+        cfg->rtc_freq = 32768;
+        slow_clk_src = BT_SLOW_CLK_SRC_32K_XTAL_ON_PIN0;
+    } else {
+        ESP_LOGW(NIMBLE_PORT_LOG_TAG, "32.768kHz XTAL not detected, fall back to main XTAL as Bluetooth sleep clock");
+#ifdef CONFIG_XTAL_FREQ_26
+        cfg->rtc_freq = 40000;
+#else
+        cfg->rtc_freq = 32000;
+#endif // CONFIG_XTAL_FREQ_26
+        slow_clk_src = BT_SLOW_CLK_SRC_MAIN_XTAL;
+    }
+#endif /* CONFIG_BT_LE_LP_CLK_SRC_MAIN_XTAL */
+    esp_bt_rtc_slow_clk_select(slow_clk_src);
+    return slow_clk_src;
 }

 esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
 {
    esp_err_t ret = ESP_OK;
    ble_npl_count_info_t npl_info;
+    ble_rtc_slow_clk_src_t rtc_clk_src;
+
    memset(&npl_info, 0, sizeof(ble_npl_count_info_t));
    if (ble_controller_status != ESP_BT_CONTROLLER_STATUS_IDLE) {
        ESP_LOGW(NIMBLE_PORT_LOG_TAG, "invalid controller state");
@ -605,7 +636,7 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
        return ESP_ERR_INVALID_ARG;
    }

-    ble_rtc_clk_init();
+    rtc_clk_src = ble_rtc_clk_init(cfg);

    ret = esp_register_ext_funcs(&ext_funcs_ro);
    if (ret != ESP_OK) {
@ -650,18 +681,12 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
 #endif
    esp_phy_modem_init();
    periph_module_enable(PERIPH_BT_MODULE);
-
-    // init phy
-    esp_phy_enable();
-    s_ble_active = true;
-
-    // init bb
-    bt_bb_v2_init_cmplx(1);
+    periph_module_reset(PERIPH_BT_MODULE);

    if (ble_osi_coex_funcs_register((struct osi_coex_funcs_t *)&s_osi_coex_funcs_ro) != 0) {
        ESP_LOGW(NIMBLE_PORT_LOG_TAG, "osi coex funcs reg failed");
        ret = ESP_ERR_INVALID_ARG;
-        goto free_controller;
+        goto modem_deint;
    }

 #if CONFIG_SW_COEXIST_ENABLE
@ -670,10 +695,34 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
    ret = ble_controller_init(cfg);
    if (ret != ESP_OK) {
        ESP_LOGW(NIMBLE_PORT_LOG_TAG, "ble_controller_init failed %d", ret);
-        goto free_controller;
+        goto modem_deint;
    }

-    ret = controller_sleep_init();
+    ESP_LOGI(NIMBLE_PORT_LOG_TAG, "ble controller commit:[%s]", ble_controller_get_compile_version());
+    ESP_LOGI(NIMBLE_PORT_LOG_TAG, "ble rom commit:[%s]", r_ble_controller_get_rom_compile_version());
+
+#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
+    interface_func_t bt_controller_log_interface;
+    bt_controller_log_interface = esp_bt_controller_log_interface;
+    uint8_t buffers = 0;
+#if CONFIG_BT_LE_CONTROLLER_LOG_CTRL_ENABLED
+    buffers |= ESP_BLE_LOG_BUF_CONTROLLER;
+#endif // CONFIG_BT_LE_CONTROLLER_LOG_CTRL_ENABLED
+#if CONFIG_BT_LE_CONTROLLER_LOG_HCI_ENABLED
+    buffers |= ESP_BLE_LOG_BUF_HCI;
+#endif // CONFIG_BT_LE_CONTROLLER_LOG_HCI_ENABLED
+#if CONFIG_BT_LE_CONTROLLER_LOG_DUMP_ONLY
+    ret = ble_log_init_async(bt_controller_log_interface, false, buffers, (uint32_t *)log_bufs_size);
+#else
+    ret = ble_log_init_async(bt_controller_log_interface, true, buffers, (uint32_t *)log_bufs_size);
+#endif // CONFIG_BT_CONTROLLER_LOG_DUMP
+    if (ret != ESP_OK) {
+        ESP_LOGW(NIMBLE_PORT_LOG_TAG, "ble_controller_log_init failed %d", ret);
+        goto controller_init_err;
+    }
+#endif // CONFIG_BT_CONTROLLER_LOG_ENABLED
+
+    ret = controller_sleep_init(rtc_clk_src);
    if (ret != ESP_OK) {
        ESP_LOGW(NIMBLE_PORT_LOG_TAG, "controller_sleep_init failed %d", ret);
        goto free_controller;
@ -693,9 +742,14 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
    return ESP_OK;
 free_controller:
    controller_sleep_deinit();
+#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
+controller_init_err:
+    ble_log_deinit_async();
+#endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
    ble_controller_deinit();
-    esp_phy_disable();
+modem_deint:
    esp_phy_modem_deinit();
+    periph_module_disable(PERIPH_BT_MODULE);
 #if CONFIG_BT_NIMBLE_ENABLED
    ble_npl_eventq_deinit(nimble_port_get_dflt_eventq());
 #endif // CONFIG_BT_NIMBLE_ENABLED
@ -717,13 +771,13 @@ esp_err_t esp_bt_controller_deinit(void)

    controller_sleep_deinit();

-    if (s_ble_active) {
-        esp_phy_disable();
-        s_ble_active = false;
-    }
-
+#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
+    ble_log_deinit_async();
+#endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
    ble_controller_deinit();

+    periph_module_disable(PERIPH_BT_MODULE);
+
 #if CONFIG_BT_NIMBLE_ENABLED
    /* De-initialize default event queue */
    ble_npl_eventq_deinit(nimble_port_get_dflt_eventq());
@ -758,6 +812,17 @@ esp_err_t esp_bt_controller_enable(esp_bt_mode_t mode)
        ESP_LOGW(NIMBLE_PORT_LOG_TAG, "invalid controller state");
        return ESP_FAIL;
    }
+    if (!s_ble_active) {
+#if CONFIG_PM_ENABLE
+        esp_pm_lock_acquire(s_pm_lock);
+#endif  // CONFIG_PM_ENABLE
+        // init phy
+        esp_phy_enable(PHY_MODEM_BT);
+        s_ble_active = true;
+    }
+    // init bb
+    bt_bb_v2_init_cmplx(1);
+
 #if CONFIG_SW_COEXIST_ENABLE
    coex_enable();
 #endif
@ -773,6 +838,13 @@ error:
 #if CONFIG_SW_COEXIST_ENABLE
    coex_disable();
 #endif
+    if (s_ble_active) {
+        esp_phy_disable(PHY_MODEM_BT);
+#if CONFIG_PM_ENABLE
+        esp_pm_lock_release(s_pm_lock);
+#endif  // CONFIG_PM_ENABLE
+        s_ble_active = false;
+    }
    return ret;
 }

@ -785,6 +857,14 @@ esp_err_t esp_bt_controller_disable(void)
    if (ble_controller_disable() != 0) {
        return ESP_FAIL;
    }
+
+    if (s_ble_active) {
+        esp_phy_disable(PHY_MODEM_BT);
+#if CONFIG_PM_ENABLE
+        esp_pm_lock_release(s_pm_lock);
+#endif  // CONFIG_PM_ENABLE
+        s_ble_active = false;
+    }
 #if CONFIG_SW_COEXIST_ENABLE
    coex_disable();
 #endif
@ -815,34 +895,30 @@ esp_err_t esp_bt_mem_release(esp_bt_mode_t mode)
 {
    intptr_t mem_start, mem_end;

-    if (mode == ESP_BT_MODE_BLE) {
-	mem_start = (intptr_t)&_bt_bss_start;
+#if CONFIG_BT_RELEASE_IRAM && CONFIG_ESP_SYSTEM_PMP_IDRAM_SPLIT
+    /* Release Bluetooth text section and merge Bluetooth data, bss & text into a large free heap
+     * region when esp_bt_mem_release is called, total saving ~21kB or more of IRAM. ESP32-C2 has
+     * only 3 configurable PMP entries available, rest of them are hard-coded. We cannot split the
+     * memory into 3 different regions (IRAM, BLE-IRAM, DRAM). So `ESP_SYSTEM_PMP_IDRAM_SPLIT` needs
+     * to be disabled.
+     */
+    ESP_LOGE(NIMBLE_PORT_LOG_TAG, "`ESP_SYSTEM_PMP_IDRAM_SPLIT` should be disabled!");
+    assert(0);
+#endif // CONFIG_BT_RELEASE_IRAM && CONFIG_ESP_SYSTEM_PMP_IDRAM_SPLIT
+
+    if (mode & ESP_BT_MODE_BLE) {
+#if CONFIG_BT_RELEASE_IRAM
+        mem_start = (intptr_t)MAP_IRAM_TO_DRAM((intptr_t)&_iram_bt_text_start);
+        mem_end = (intptr_t)&_bss_bt_end;
+#else
+        mem_start = (intptr_t)&_bt_controller_data_start;
        mem_end = (intptr_t)&_bt_bss_end;
+#endif // CONFIG_BT_RELEASE_IRAM
        if (mem_start != mem_end) {
-            ESP_LOGD(NIMBLE_PORT_LOG_TAG, "Release BT BSS [0x%08x] - [0x%08x]", mem_start, mem_end);
+            ESP_LOGI(NIMBLE_PORT_LOG_TAG, "Release BLE [0x%08x] - [0x%08x], len %d", mem_start,
+                     mem_end, mem_end - mem_start);
            ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
        }
-
-        mem_start = (intptr_t)&_bt_data_start;
-        mem_end = (intptr_t)&_bt_data_end;
-        if (mem_start != mem_end) {
-            ESP_LOGD(NIMBLE_PORT_LOG_TAG, "Release BT Data [0x%08x] - [0x%08x]", mem_start, mem_end);
-            ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
-        }
-
-        mem_start = (intptr_t)&_nimble_bss_start;
-	mem_end = (intptr_t)&_nimble_bss_end;
-	if (mem_start != mem_end) {
-	    ESP_LOGD(NIMBLE_PORT_LOG_TAG, "Release NimBLE BSS [0x%08x] - [0x%08x]", mem_start, mem_end);
-	    ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
-	}
-
-	mem_start = (intptr_t)&_nimble_data_start;
-	mem_end = (intptr_t)&_nimble_data_end;
-	if (mem_start != mem_end) {
-	    ESP_LOGD(NIMBLE_PORT_LOG_TAG, "Release NimBLE Data [0x%08x] - [0x%08x]", mem_start, mem_end);
-	    ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
-	}
    }

    return ESP_OK;
@ -970,14 +1046,40 @@ esp_power_level_t esp_ble_tx_power_get_enhanced(esp_ble_enhanced_power_type_t po
    return (esp_power_level_t)tx_level;
 }

+uint8_t esp_ble_get_chip_rev_version(void)
+{
+    return efuse_ll_get_chip_wafer_version_minor();
+}

-#if (!CONFIG_BT_NIMBLE_ENABLED) && (CONFIG_BT_CONTROLLER_ENABLED == true)
+#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
+static void esp_bt_controller_log_interface(uint32_t len, const uint8_t *addr, bool end)
+{
+    for (int i = 0; i < len; i++) {
+        esp_rom_printf("%02x ", addr[i]);
+    }
+    if (end) {
+        esp_rom_printf("\n");
+    }
+}

+void esp_ble_controller_log_dump_all(bool output)
+{
+    portMUX_TYPE spinlock = portMUX_INITIALIZER_UNLOCKED;
+
+    portENTER_CRITICAL_SAFE(&spinlock);
+    esp_panic_handler_reconfigure_wdts(5000);
+    BT_ASSERT_PRINT("\r\n[DUMP_START:");
+    ble_log_async_output_dump_all(output);
+    BT_ASSERT_PRINT(":DUMP_END]\r\n");
+    portEXIT_CRITICAL_SAFE(&spinlock);
+}
+#endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
+
+#if (!CONFIG_BT_NIMBLE_ENABLED) && (CONFIG_BT_CONTROLLER_ENABLED)
+#if CONFIG_BT_LE_SM_LEGACY || CONFIG_BT_LE_SM_SC
 #define BLE_SM_KEY_ERR 0x17
-
 #if CONFIG_BT_LE_CRYPTO_STACK_MBEDTLS
 #include "mbedtls/aes.h"
-
 #if CONFIG_BT_LE_SM_SC
 #include "mbedtls/cipher.h"
 #include "mbedtls/entropy.h"
@ -985,7 +1087,9 @@ esp_power_level_t esp_ble_tx_power_get_enhanced(esp_ble_enhanced_power_type_t po
 #include "mbedtls/cmac.h"
 #include "mbedtls/ecdh.h"
 #include "mbedtls/ecp.h"
-#endif
+
+static mbedtls_ecp_keypair keypair;
+#endif // CONFIG_BT_LE_SM_SC

 #else
 #include "tinycrypt/aes.h"
@ -995,15 +1099,15 @@ esp_power_level_t esp_ble_tx_power_get_enhanced(esp_ble_enhanced_power_type_t po
 #if CONFIG_BT_LE_SM_SC
 #include "tinycrypt/cmac_mode.h"
 #include "tinycrypt/ecc_dh.h"
-#endif
+#endif // CONFIG_BT_LE_SM_SC
+#endif // CONFIG_BT_LE_CRYPTO_STACK_MBEDTLS

-#endif
-
-#if CONFIG_BT_LE_CRYPTO_STACK_MBEDTLS
-#if CONFIG_BT_LE_SM_SC
-static mbedtls_ecp_keypair keypair;
-#endif
-#endif
+/* Based on Core Specification 4.2 Vol 3. Part H 2.3.5.6.1 */
+static const uint8_t ble_sm_alg_dbg_priv_key[32] = {
+    0x3f, 0x49, 0xf6, 0xd4, 0xa3, 0xc5, 0x5f, 0x38, 0x74, 0xc9, 0xb3, 0xe3,
+    0xd2, 0x10, 0x3f, 0x50, 0x4a, 0xff, 0x60, 0x7b, 0xeb, 0x40, 0xb7, 0x99,
+    0x58, 0x99, 0xb8, 0xa6, 0xcd, 0x3c, 0x1a, 0xbd
+};

 int ble_sm_alg_gen_dhkey(const uint8_t *peer_pub_key_x, const uint8_t *peer_pub_key_y,
                         const uint8_t *our_priv_key, uint8_t *out_dhkey)
@ -1050,8 +1154,7 @@ int ble_sm_alg_gen_dhkey(const uint8_t *peer_pub_key_x, const uint8_t *peer_pub_
    }

    /* Set PRNG */
-    if ((rc = mbedtls_ctr_drbg_seed(&ctr_drbg, mbedtls_entropy_func, &entropy,
-                                    NULL, 0)) != 0) {
+    if ((rc = mbedtls_ctr_drbg_seed(&ctr_drbg, mbedtls_entropy_func, &entropy, NULL, 0)) != 0) {
        goto exit;
    }

@ -1095,19 +1198,12 @@ exit:
    if (rc == TC_CRYPTO_FAIL) {
        return BLE_SM_KEY_ERR;
    }
-#endif
+#endif // CONFIG_BT_LE_CRYPTO_STACK_MBEDTLS

    swap_buf(out_dhkey, dh, 32);
    return 0;
 }

-/* based on Core Specification 4.2 Vol 3. Part H 2.3.5.6.1 */
-static const uint8_t ble_sm_alg_dbg_priv_key[32] = {
-    0x3f, 0x49, 0xf6, 0xd4, 0xa3, 0xc5, 0x5f, 0x38, 0x74, 0xc9, 0xb3, 0xe3,
-    0xd2, 0x10, 0x3f, 0x50, 0x4a, 0xff, 0x60, 0x7b, 0xeb, 0x40, 0xb7, 0x99,
-    0x58, 0x99, 0xb8, 0xa6, 0xcd, 0x3c, 0x1a, 0xbd
-};
-
 #if CONFIG_BT_LE_CRYPTO_STACK_MBEDTLS
 static int mbedtls_gen_keypair(uint8_t *public_key, uint8_t *private_key)
 {
@ -1153,7 +1249,7 @@ exit:

    return 0;
 }
-#endif
+#endif  // CONFIG_BT_LE_CRYPTO_STACK_MBEDTLS

 /**
 * pub: 64 bytes
@ -1169,7 +1265,6 @@ int ble_sm_alg_gen_key_pair(uint8_t *pub, uint8_t *priv)
    uint8_t pk[64];

    do {
-
 #if CONFIG_BT_LE_CRYPTO_STACK_MBEDTLS
        if (mbedtls_gen_keypair(pk, priv) != 0) {
            return BLE_SM_KEY_ERR;
@ -1178,17 +1273,16 @@ int ble_sm_alg_gen_key_pair(uint8_t *pub, uint8_t *priv)
        if (uECC_make_key(pk, priv, &curve_secp256r1) != TC_CRYPTO_SUCCESS) {
            return BLE_SM_KEY_ERR;
        }
-#endif
-
+#endif  // CONFIG_BT_LE_CRYPTO_STACK_MBEDTLS
        /* Make sure generated key isn't debug key. */
    } while (memcmp(priv, ble_sm_alg_dbg_priv_key, 32) == 0);

    swap_buf(pub, pk, 32);
    swap_buf(&pub[32], &pk[32], 32);
    swap_in_place(priv, 32);
-#endif
-
+#endif // CONFIG_BT_LE_SM_SC_DEBUG_KEYS
    return 0;
 }

-#endif
+#endif // CONFIG_BT_LE_SM_LEGACY || CONFIG_BT_LE_SM_SC
+#endif // (!CONFIG_BT_NIMBLE_ENABLED) && (CONFIG_BT_CONTROLLER_ENABLED)
--- a/components/bt/include/esp32c2/include/esp_bt_cfg.h
+++ b/components/bt/include/esp32c2/include/esp_bt_cfg.h
@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
 *
 * SPDX-License-Identifier: Apache-2.0
 */
@ -40,7 +40,11 @@ extern "C" {
    #define DEFAULT_BT_NIMBLE_WHITELIST_SIZE MYNEWT_VAL(BLE_LL_WHITELIST_SIZE)
    #define DEFAULT_BT_LE_HCI_EVT_HI_BUF_COUNT MYNEWT_VAL(BLE_TRANSPORT_EVT_COUNT)
    #define DEFAULT_BT_LE_HCI_EVT_LO_BUF_COUNT MYNEWT_VAL(BLE_TRANSPORT_EVT_DISCARDABLE_COUNT)
-    #define DEFAULT_BT_LE_COEX_PHY_CODED_TX_RX_TLIM_EFF CONFIG_BT_NIMBLE_COEX_PHY_CODED_TX_RX_TLIM_EFF
+    #if defined(CONFIG_BT_NIMBLE_50_FEATURE_SUPPORT)
+    #define DEFAULT_BT_LE_50_FEATURE_SUPPORT (1)
+    #else
+    #define DEFAULT_BT_LE_50_FEATURE_SUPPORT (0)
+    #endif

 #else

@ -115,12 +119,15 @@ extern "C" {
    #else
        #define DEFAULT_BT_LE_HCI_EVT_LO_BUF_COUNT (8)
    #endif
-
-    #define DEFAULT_BT_LE_COEX_PHY_CODED_TX_RX_TLIM_EFF CONFIG_BT_LE_COEX_PHY_CODED_TX_RX_TLIM_EFF
+    #if defined(CONFIG_BT_LE_50_FEATURE_SUPPORT)
+        #define DEFAULT_BT_LE_50_FEATURE_SUPPORT (1)
+    #else
+        #define DEFAULT_BT_LE_50_FEATURE_SUPPORT (0)
+    #endif

 #endif

-
+#define DEFAULT_BT_LE_COEX_PHY_CODED_TX_RX_TLIM_EFF CONFIG_BT_LE_COEX_PHY_CODED_TX_RX_TLIM_EFF

 #ifdef CONFIG_BT_LE_HCI_INTERFACE_USE_UART
 #define HCI_UART_EN CONFIG_BT_LE_HCI_INTERFACE_USE_UART
--- a/components/bt/controller/esp32c3/Kconfig.in
+++ b/components/bt/controller/esp32c3/Kconfig.in
@ -78,15 +78,29 @@ config BT_CTRL_ADV_DUP_FILT_MAX
    help
        The maxinum number of suplicate scan filter

-config BT_CTRL_HW_CCA
-    bool "HW CCA check enable"
-    default n
+choice BT_BLE_CCA_MODE
+    prompt "BLE CCA mode"
+    default BT_BLE_CCA_MODE_NONE
    help
-        It enables HW CCA feature in controller
+        Define BT BLE CCA mode
+
+    config BT_BLE_CCA_MODE_NONE
+        bool "NONE"
+    config BT_BLE_CCA_MODE_HW
+        bool "Hardware"
+    config BT_BLE_CCA_MODE_SW
+        bool "Software"
+endchoice
+
+config BT_BLE_CCA_MODE
+    int
+    default 0 if BT_BLE_CCA_MODE_NONE
+    default 1 if BT_BLE_CCA_MODE_HW
+    default 2 if BT_BLE_CCA_MODE_SW

 config BT_CTRL_HW_CCA_VAL
    int "CCA threshold value"
-    range 20 60
+    range 20 100
    default 20
    help
        It is the threshold value of HW CCA, if the value is 30, it means CCA threshold is -30 dBm.
@ -265,20 +279,19 @@ choice BT_CTRL_SCAN_DUPL_TYPE
    config BT_CTRL_SCAN_DUPL_TYPE_DEVICE
        bool "Scan Duplicate By Device Address"
        help
-            This way is to use advertiser address filtering. The adv packet of the same address is only
-            allowed to be reported once
+            Advertising packets with the same address, address type, and advertising type are reported once.

    config BT_CTRL_SCAN_DUPL_TYPE_DATA
        bool "Scan Duplicate By Advertising Data"
        help
-            This way is to use advertising data filtering. All same advertising data only allow to be reported
-            once even though they are from different devices.
+            Advertising packets with identical advertising data, address type, and advertising type
+            are reported only once, even if they originate from different devices.

    config BT_CTRL_SCAN_DUPL_TYPE_DATA_DEVICE
        bool "Scan Duplicate By Device Address And Advertising Data"
        help
-            This way is to use advertising data and device address filtering. All different adv packets with
-            the same address are allowed to be reported.
+            Advertising packets with the same address, advertising data, address type,
+            and advertising type are reported only once.
 endchoice

 config BT_CTRL_SCAN_DUPL_TYPE
@ -333,7 +346,7 @@ config BT_CTRL_MESH_DUPL_SCAN_CACHE_SIZE
 choice BT_CTRL_COEX_PHY_CODED_TX_RX_TLIM
    prompt "Coexistence: limit on MAX Tx/Rx time for coded-PHY connection"
    default BT_CTRL_COEX_PHY_CODED_TX_RX_TLIM_DIS
-    depends on ESP_WIFI_SW_COEXIST_ENABLE
+    depends on ESP_COEX_SW_COEXIST_ENABLE
    help
        When using PHY-Coded in BLE connection, limitation on max tx/rx time can be applied to
        better avoid dramatic performance deterioration of Wi-Fi.
@ -351,7 +364,7 @@ endchoice

 config BT_CTRL_COEX_PHY_CODED_TX_RX_TLIM_EFF
    int
-    default 0 if (!ESP_WIFI_SW_COEXIST_ENABLE)
+    default 0 if !ESP_COEX_SW_COEXIST_ENABLE
    default 1 if BT_CTRL_COEX_PHY_CODED_TX_RX_TLIM_EN
    default 0 if BT_CTRL_COEX_PHY_CODED_TX_RX_TLIM_DIS

@ -454,3 +467,11 @@ config BT_CTRL_SCAN_BACKOFF_UPPERLIMITMAX
        Disable active scan backoff. The bluetooth spec requires that scanners should run a backoff procedure to
        minimize collision of scan request PDUs from nultiple scanners. If scan backoff is disabled, in active
        scanning, scan request PDU will be sent every time when HW receives scannable ADV PDU.
+
+config BT_BLE_ADV_DATA_LENGTH_ZERO_AUX
+    bool "Enable aux packet when ext adv data length is zero"
+    default n
+    help
+        When this option is enabled, auxiliary packets will be present in the events of
+        'Non-Connectable and Non-Scannable' regardless of whether the advertising length is 0.
+        If this option is not enabled, auxiliary packets will only be present when the advertising length is not 0.
--- a/components/bt/controller/esp32c3/bt.c
+++ b/components/bt/controller/esp32c3/bt.c
@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
 *
 * SPDX-License-Identifier: Apache-2.0
 */
@ -34,7 +34,7 @@
 #include "soc/rtc.h"
 #include "soc/rtc_cntl_reg.h"
 #include "soc/soc_memory_layout.h"
-#include "esp_coexist_internal.h"
+#include "private/esp_coexist_internal.h"
 #include "esp_timer.h"
 #include "esp_sleep.h"
 #include "esp_rom_sys.h"
@ -112,7 +112,7 @@ do{\
 } while(0)

 #define OSI_FUNCS_TIME_BLOCKING  0xffffffff
-#define OSI_VERSION              0x00010006
+#define OSI_VERSION              0x00010007
 #define OSI_MAGIC_VALUE          0xFADEBEAD

 /* Types definition
@ -135,7 +135,6 @@ typedef struct vhci_host_callback {

 typedef struct {
    void *handle;
-    void *storage;
 } btdm_queue_item_t;

 typedef void (* osi_intr_handler)(void);
@ -194,6 +193,8 @@ struct osi_funcs_t {
    void (* _esp_hw_power_down)(void);
    void (* _esp_hw_power_up)(void);
    void (* _ets_backup_dma_copy)(uint32_t reg, uint32_t mem_addr, uint32_t num, bool to_rem);
+    void (* _ets_delay_us)(uint32_t us);
+    void (* _btdm_rom_table_ready)(void);
 };


@ -245,6 +246,7 @@ extern bool btdm_deep_sleep_mem_init(void);
 extern void btdm_deep_sleep_mem_deinit(void);
 extern void btdm_ble_power_down_dma_copy(bool copy);
 extern uint8_t btdm_sleep_clock_sync(void);
+extern void sdk_config_extend_set_pll_track(bool enable);

 #if CONFIG_MAC_BB_PD
 extern void esp_mac_bb_power_down(void);
@ -252,6 +254,8 @@ extern void esp_mac_bb_power_up(void);
 extern void ets_backup_dma_copy(uint32_t reg, uint32_t mem_addr, uint32_t num, bool to_mem);
 #endif

+extern void btdm_cca_feature_enable(void);
+
 extern uint32_t _bt_bss_start;
 extern uint32_t _bt_bss_end;
 extern uint32_t _btdm_bss_start;
@ -311,6 +315,7 @@ static void interrupt_off_wrapper(int intr_num);
 static void btdm_hw_mac_power_up_wrapper(void);
 static void btdm_hw_mac_power_down_wrapper(void);
 static void btdm_backup_dma_copy_wrapper(uint32_t reg, uint32_t mem_addr, uint32_t num,  bool to_mem);
+static void btdm_funcs_table_ready_wrapper(void);

 static void btdm_slp_tmr_callback(void *arg);

@ -375,6 +380,8 @@ static const struct osi_funcs_t osi_funcs_ro = {
    ._esp_hw_power_down = btdm_hw_mac_power_down_wrapper,
    ._esp_hw_power_up = btdm_hw_mac_power_up_wrapper,
    ._ets_backup_dma_copy = btdm_backup_dma_copy_wrapper,
+    ._ets_delay_us = esp_rom_delay_us,
+    ._btdm_rom_table_ready = btdm_funcs_table_ready_wrapper,
 };

 static DRAM_ATTR struct osi_funcs_t *osi_funcs_p;
@ -511,16 +518,10 @@ static void *semphr_create_wrapper(uint32_t max, uint32_t init)
    btdm_queue_item_t *semphr = heap_caps_calloc(1, sizeof(btdm_queue_item_t), MALLOC_CAP_8BIT|MALLOC_CAP_INTERNAL);
    assert(semphr);

-#if !CONFIG_SPIRAM_USE_MALLOC
+    /* IDF FreeRTOS guarantees that all dynamic memory allocation goes to internal RAM. */
    semphr->handle = (void *)xSemaphoreCreateCounting(max, init);
-#else
-
-    semphr->storage = heap_caps_malloc(sizeof(StaticQueue_t), MALLOC_CAP_INTERNAL|MALLOC_CAP_8BIT);
-    assert(semphr->storage);
-
-    semphr->handle = (void *)xSemaphoreCreateCountingStatic(max, init, semphr->storage);
-#endif
    assert(semphr->handle);
+
    return semphr;
 }

@ -535,11 +536,6 @@ static void semphr_delete_wrapper(void *semphr)
    if (semphr_item->handle) {
        vSemaphoreDelete(semphr_item->handle);
    }
-#ifdef CONFIG_SPIRAM_USE_MALLOC
-    if (semphr_item->storage) {
-        free(semphr_item->storage);
-    }
-#endif

    free(semphr);
 }
@ -595,18 +591,9 @@ static void *queue_create_wrapper(uint32_t queue_len, uint32_t item_size)
    queue = (btdm_queue_item_t*)heap_caps_malloc(sizeof(btdm_queue_item_t), MALLOC_CAP_INTERNAL|MALLOC_CAP_8BIT);
    assert(queue);

-#if CONFIG_SPIRAM_USE_MALLOC
-
-    queue->storage = heap_caps_calloc(1, sizeof(StaticQueue_t) + (queue_len*item_size), MALLOC_CAP_INTERNAL|MALLOC_CAP_8BIT);
-    assert(queue->storage);
-
-    queue->handle = xQueueCreateStatic( queue_len, item_size, ((uint8_t*)(queue->storage)) + sizeof(StaticQueue_t), (StaticQueue_t*)(queue->storage));
-    assert(queue->handle);
-
-#else
+    /* IDF FreeRTOS guarantees that all dynamic memory allocation goes to internal RAM. */
    queue->handle = xQueueCreate( queue_len, item_size);
    assert(queue->handle);
-#endif

    return queue;
 }
@ -618,13 +605,6 @@ static void queue_delete_wrapper(void *queue)
        if(queue_item->handle){
            vQueueDelete(queue_item->handle);
        }
-
-#if CONFIG_SPIRAM_USE_MALLOC
-        if (queue_item->storage) {
-            free(queue_item->storage);
-        }
-#endif
-
        free(queue_item);
    }
 }
@ -674,7 +654,7 @@ static bool IRAM_ATTR is_in_isr_wrapper(void)

 static void *malloc_internal_wrapper(size_t size)
 {
-    void *p = heap_caps_malloc(size, MALLOC_CAP_DEFAULT|MALLOC_CAP_INTERNAL|MALLOC_CAP_DMA);
+    void *p = heap_caps_malloc(size, MALLOC_CAP_INTERNAL|MALLOC_CAP_DMA);
    if(p == NULL) {
        ESP_LOGE(BT_LOG_TAG, "Malloc failed");
    }
@ -743,19 +723,26 @@ static void btdm_sleep_enter_phase1_wrapper(uint32_t lpcycles)
        return;
    }

-    // start a timer to wake up and acquire the pm_lock before modem_sleep awakes
    uint32_t us_to_sleep = btdm_lpcycles_2_hus(lpcycles, NULL) >> 1;

 #define BTDM_MIN_TIMER_UNCERTAINTY_US      (1800)
+#define BTDM_RTC_SLOW_CLK_RC_DRIFT_PERCENT 7
    assert(us_to_sleep > BTDM_MIN_TIMER_UNCERTAINTY_US);
    // allow a maximum time uncertainty to be about 488ppm(1/2048) at least as clock drift
    // and set the timer in advance
    uint32_t uncertainty = (us_to_sleep >> 11);
+#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
+    if (rtc_clk_slow_src_get() == SOC_RTC_SLOW_CLK_SRC_RC_SLOW) {
+        uncertainty = us_to_sleep * BTDM_RTC_SLOW_CLK_RC_DRIFT_PERCENT / 100;
+    }
+#endif
+
    if (uncertainty < BTDM_MIN_TIMER_UNCERTAINTY_US) {
        uncertainty = BTDM_MIN_TIMER_UNCERTAINTY_US;
    }

    assert (s_lp_stat.wakeup_timer_started == 0);
+    // start a timer to wake up and acquire the pm_lock before modem_sleep awakes
    if (esp_timer_start_once(s_btdm_slp_tmr, us_to_sleep - uncertainty) == ESP_OK) {
        s_lp_stat.wakeup_timer_started = 1;
    } else {
@ -768,18 +755,18 @@ static void btdm_sleep_enter_phase2_wrapper(void)
 {
    if (btdm_controller_get_sleep_mode() == ESP_BT_SLEEP_MODE_1) {
        if (s_lp_stat.phy_enabled) {
-            esp_phy_disable();
+            esp_phy_disable(PHY_MODEM_BT);
            s_lp_stat.phy_enabled = 0;
        } else {
            assert(0);
        }

-        if (s_lp_stat.pm_lock_released == 0) {
 #ifdef CONFIG_PM_ENABLE
+        if (s_lp_stat.pm_lock_released == 0) {
            esp_pm_lock_release(s_pm_lock);
-#endif
            s_lp_stat.pm_lock_released = 1;
        }
+#endif
    }
 }

@ -797,7 +784,7 @@ static void btdm_sleep_exit_phase3_wrapper(void)

    if (btdm_controller_get_sleep_mode() == ESP_BT_SLEEP_MODE_1) {
        if (s_lp_stat.phy_enabled == 0) {
-            esp_phy_enable();
+            esp_phy_enable(PHY_MODEM_BT);
            s_lp_stat.phy_enabled = 1;
        }
    }
@ -899,6 +886,13 @@ static void async_wakeup_request_end(int event)
    return;
 }

+static void btdm_funcs_table_ready_wrapper(void)
+{
+#if BT_BLE_CCA_MODE == 2
+    btdm_cca_feature_enable();
+#endif
+}
+
 static void coex_schm_status_bit_set_wrapper(uint32_t type, uint32_t status)
 {
 #if CONFIG_SW_COEXIST_ENABLE
@ -1168,18 +1162,6 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)

    btdm_controller_mem_init();

-#if CONFIG_MAC_BB_PD
-    if (esp_register_mac_bb_pd_callback(btdm_mac_bb_power_down_cb) != 0) {
-        err = ESP_ERR_INVALID_ARG;
-        goto error;
-    }
-
-    if (esp_register_mac_bb_pu_callback(btdm_mac_bb_power_up_cb) != 0) {
-        err = ESP_ERR_INVALID_ARG;
-        goto error;
-    }
-#endif
-
    osi_funcs_p = (struct osi_funcs_t *)malloc_internal_wrapper(sizeof(struct osi_funcs_t));
    if (osi_funcs_p == NULL) {
        return ESP_ERR_NO_MEM;
@ -1327,14 +1309,10 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
    periph_module_enable(PERIPH_BT_MODULE);
    periph_module_reset(PERIPH_BT_MODULE);

-    esp_phy_enable();
-    s_lp_stat.phy_enabled = 1;
-
    if (btdm_controller_init(cfg) != 0) {
        err = ESP_ERR_NO_MEM;
        goto error;
    }
-    coex_pti_v2();

    btdm_controller_status = ESP_BT_CONTROLLER_STATUS_INITED;

@ -1364,11 +1342,6 @@ static void bt_controller_deinit_internal(void)
 {
    periph_module_disable(PERIPH_BT_MODULE);

-    if (s_lp_stat.phy_enabled) {
-        esp_phy_disable();
-        s_lp_stat.phy_enabled = 0;
-    }
-
    // deinit low power control resources
    do {

@ -1429,11 +1402,6 @@ static void bt_controller_deinit_internal(void)
        btdm_lpcycle_us = 0;
    } while (0);

-#if CONFIG_MAC_BB_PD
-    esp_unregister_mac_bb_pd_callback(btdm_mac_bb_power_down_cb);
-    esp_unregister_mac_bb_pu_callback(btdm_mac_bb_power_up_cb);
-#endif
-
    esp_bt_power_domain_off();
 #if CONFIG_MAC_BB_PD
    esp_mac_bb_pd_mem_deinit();
@ -1462,6 +1430,12 @@ esp_err_t esp_bt_controller_enable(esp_bt_mode_t mode)
        return ESP_ERR_INVALID_ARG;
    }

+    /* Enable PHY when enabling controller to reduce power dissipation after controller init
+     * Notice the init order: esp_phy_enable() -> bt_bb_v2_init_cmplx() -> coex_pti_v2()
+     */
+    esp_phy_enable(PHY_MODEM_BT);
+    s_lp_stat.phy_enabled = 1;
+
 #if CONFIG_SW_COEXIST_ENABLE
    coex_enable();
 #endif
@ -1476,16 +1450,33 @@ esp_err_t esp_bt_controller_enable(esp_bt_mode_t mode)
        s_lp_stat.pm_lock_released = 0;
 #endif

+#if CONFIG_MAC_BB_PD
+        if (esp_register_mac_bb_pd_callback(btdm_mac_bb_power_down_cb) != 0) {
+            ret = ESP_ERR_INVALID_ARG;
+            goto error;
+        }
+
+        if (esp_register_mac_bb_pu_callback(btdm_mac_bb_power_up_cb) != 0) {
+            ret = ESP_ERR_INVALID_ARG;
+            goto error;
+        }
+#endif
+
        if (s_lp_cntl.enable) {
            btdm_controller_enable_sleep(true);
        }
    } while (0);

+    // Disable pll track by default in BLE controller on ESP32-C3 and ESP32-S3
+    sdk_config_extend_set_pll_track(false);
+
    if (btdm_controller_enable(mode) != 0) {
        ret = ESP_ERR_INVALID_STATE;
        goto error;
    }

+    coex_pti_v2();
+
    btdm_controller_status = ESP_BT_CONTROLLER_STATUS_ENABLED;

    return ret;
@ -1493,6 +1484,11 @@ esp_err_t esp_bt_controller_enable(esp_bt_mode_t mode)
 error:
    // disable low power mode
    do {
+#if CONFIG_MAC_BB_PD
+        esp_unregister_mac_bb_pd_callback(btdm_mac_bb_power_down_cb);
+        esp_unregister_mac_bb_pu_callback(btdm_mac_bb_power_up_cb);
+#endif
+
        btdm_controller_enable_sleep(false);
 #ifdef CONFIG_PM_ENABLE
        if (s_lp_cntl.no_light_sleep) {
@ -1508,6 +1504,10 @@ error:
 #if CONFIG_SW_COEXIST_ENABLE
    coex_disable();
 #endif
+    if (s_lp_stat.phy_enabled) {
+        esp_phy_disable(PHY_MODEM_BT);
+        s_lp_stat.phy_enabled = 0;
+    }
    return ret;
 }

@ -1526,11 +1526,20 @@ esp_err_t esp_bt_controller_disable(void)
 #if CONFIG_SW_COEXIST_ENABLE
    coex_disable();
 #endif
+    if (s_lp_stat.phy_enabled) {
+        esp_phy_disable(PHY_MODEM_BT);
+        s_lp_stat.phy_enabled = 0;
+    }

    btdm_controller_status = ESP_BT_CONTROLLER_STATUS_INITED;

    // disable low power mode
    do {
+#if CONFIG_MAC_BB_PD
+        esp_unregister_mac_bb_pd_callback(btdm_mac_bb_power_down_cb);
+        esp_unregister_mac_bb_pu_callback(btdm_mac_bb_power_up_cb);
+#endif
+
 #ifdef CONFIG_PM_ENABLE
        if (s_lp_cntl.no_light_sleep) {
            esp_pm_lock_release(s_light_sleep_pm_lock);
--- a/components/bt/controller/esp32c6/Kconfig.in
+++ b/components/bt/controller/esp32c6/Kconfig.in
@ -147,7 +147,7 @@ if BT_LE_EXT_ADV
            Enable this option to start periodic advertisement.

    config BT_LE_PERIODIC_ADV_SYNC_TRANSFER
-        bool "Enable Transer Sync Events"
+        bool "Enable Transfer Sync Events"
        depends on BT_LE_ENABLE_PERIODIC_ADV
        default y
        help
@ -212,6 +212,15 @@ menu "Memory Settings"
        help
            Dynamic memory size of block 2

+    config BT_LE_MSYS_BUF_FROM_HEAP
+        bool "Get Msys Mbuf from heap"
+        default y
+        depends on BT_LE_MSYS_INIT_IN_CONTROLLER
+        help
+            This option sets the source of the shared msys mbuf memory between
+            the Host and the Controller. Allocate the memory from the heap if
+            this option is sets, from the mempool otherwise.
+
    config BT_LE_ACL_BUF_COUNT
        int "ACL Buffer count"
        default 10
@ -260,6 +269,54 @@ config BT_LE_CONTROLLER_TASK_STACK_SIZE
    help
        This configures stack size of NimBLE controller task

+menuconfig BT_LE_CONTROLLER_LOG_ENABLED
+    bool "Controller log enable"
+    default n
+    help
+        Enable controller log
+
+config BT_LE_CONTROLLER_LOG_CTRL_ENABLED
+    bool "enable controller log module"
+    depends on BT_LE_CONTROLLER_LOG_ENABLED
+    default y
+    help
+            Enable controller log module
+
+config BT_LE_CONTROLLER_LOG_HCI_ENABLED
+    bool "enable HCI log module"
+    depends on BT_LE_CONTROLLER_LOG_ENABLED
+    default y
+    help
+            Enable hci log module
+
+config BT_LE_CONTROLLER_LOG_DUMP_ONLY
+    bool "Controller log dump mode only"
+    depends on BT_LE_CONTROLLER_LOG_ENABLED
+    default y
+    help
+            Only operate in dump mode
+
+config BT_LE_LOG_CTRL_BUF1_SIZE
+    int "size of the first BLE controller LOG buffer"
+    depends on BT_LE_CONTROLLER_LOG_ENABLED
+    default 4096
+    help
+            Configure the size of the first BLE controller LOG buffer.
+
+config BT_LE_LOG_CTRL_BUF2_SIZE
+    int "size of the second BLE controller LOG buffer"
+    depends on BT_LE_CONTROLLER_LOG_ENABLED
+    default 1024
+    help
+            Configure the size of the second BLE controller LOG buffer.
+
+config BT_LE_LOG_HCI_BUF_SIZE
+    int "size of the BLE HCI LOG buffer"
+    depends on BT_LE_CONTROLLER_LOG_ENABLED
+    default 4096
+    help
+            Configure the size of the BLE HCI LOG buffer.
+
 config BT_LE_LL_RESOLV_LIST_SIZE
    int "BLE LL Resolving list size"
    range 1 5
@ -325,7 +382,7 @@ config BT_LE_WHITELIST_SIZE

 config BT_LE_LL_DUP_SCAN_LIST_COUNT
    int "BLE duplicate scan list count"
-    range 1 100
+    range 5 100
    default 20
    help
        config the max count of duplicate scan list
@ -340,7 +397,7 @@ config BT_LE_LL_SCA
 config BT_LE_MAX_CONNECTIONS
    int "Maximum number of concurrent connections"
    depends on !BT_NIMBLE_ENABLED
-    range 1 9
+    range 1 70
    default 3
    help
        Defines maximum number of concurrent BLE connections. For ESP32, user
@ -352,7 +409,7 @@ config BT_LE_MAX_CONNECTIONS
 choice BT_LE_COEX_PHY_CODED_TX_RX_TLIM
    prompt "Coexistence: limit on MAX Tx/Rx time for coded-PHY connection"
    default BT_LE_COEX_PHY_CODED_TX_RX_TLIM_DIS
-    depends on !BT_NIMBLE_ENABLED
+    depends on ESP_COEX_SW_COEXIST_ENABLE
    help
        When using PHY-Coded in BLE connection, limitation on max tx/rx time can be applied to
        better avoid dramatic performance deterioration of Wi-Fi.
@ -370,7 +427,7 @@ endchoice

 config BT_LE_COEX_PHY_CODED_TX_RX_TLIM_EFF
    int
-    depends on !BT_NIMBLE_ENABLED
+    default 0 if !ESP_COEX_SW_COEXIST_ENABLE
    default 1 if BT_LE_COEX_PHY_CODED_TX_RX_TLIM_EN
    default 0 if BT_LE_COEX_PHY_CODED_TX_RX_TLIM_DIS

@ -380,19 +437,24 @@ config BT_LE_SLEEP_ENABLE
    help
        Enable BLE sleep

-choice BT_LE_WAKEUP_SOURCE
-    prompt "BLE light sleep wakeup source"
-    depends on BT_LE_SLEEP_ENABLE
-    default BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER
-    config BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
-        bool "Use ESP timer to wakeup CPU"
+choice BT_LE_LP_CLK_SRC
+    prompt "BLE low power clock source"
+    default BT_LE_LP_CLK_SRC_MAIN_XTAL
+    config BT_LE_LP_CLK_SRC_MAIN_XTAL
+        bool "Use main XTAL as RTC clock source"
        help
-            Use esp timer to wakeup CPU
+            User main XTAL as RTC clock source.
+            This option is recommended if external 32.768k XTAL is not available.
+            Using the external 32.768 kHz XTAL will have lower current consumption
+            in light sleep compared to using the main XTAL.

-    config BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER
-        bool "Use BLE rtc timer to wakeup CPU"
+    config BT_LE_LP_CLK_SRC_DEFAULT
+        bool "Use system RTC slow clock source"
        help
-            Use BLE rtc timer to wakeup CPU
+            Use the same slow clock source as system RTC
+            Using any clock source other than external 32.768 kHz XTAL supports only
+            legacy ADV and SCAN due to low clock accuracy.
+
 endchoice

 config BT_LE_USE_ESP_TIMER
@ -402,3 +464,115 @@ config BT_LE_USE_ESP_TIMER
    help
        Set this option to use Esp Timer which has higher priority timer
        instead of FreeRTOS timer
+config BT_CTRL_BLE_ADV_REPORT_FLOW_CTRL_SUPP
+    bool "BLE adv report flow control supported"
+    default y
+    help
+        The function is mainly used to enable flow control for advertising reports. When it is enabled,
+        advertising reports will be discarded by the controller if the number of unprocessed advertising
+        reports exceeds the size of BLE adv report flow control.
+
+config BT_CTRL_BLE_ADV_REPORT_FLOW_CTRL_NUM
+    int "BLE adv report flow control number"
+    depends on BT_CTRL_BLE_ADV_REPORT_FLOW_CTRL_SUPP
+    range 50 1000
+    default 100
+    help
+        The number of unprocessed advertising report that bluetooth host can save.If you set
+        `BT_CTRL_BLE_ADV_REPORT_FLOW_CTRL_NUM` to a small value, this may cause adv packets lost.
+        If you set `BT_CTRL_BLE_ADV_REPORT_FLOW_CTRL_NUM` to a large value, bluetooth host may cache a
+        lot of adv packets and this may cause system memory run out. For example, if you set
+        it to 50, the maximum memory consumed by host is 35 * 50 bytes. Please set
+        `BT_CTRL_BLE_ADV_REPORT_FLOW_CTRL_NUM` according to your system free memory and handle adv
+        packets as fast as possible, otherwise it will cause adv packets lost.
+
+config BT_CTRL_BLE_ADV_REPORT_DISCARD_THRSHOLD
+    int "BLE adv lost event threshold value"
+    depends on BT_CTRL_BLE_ADV_REPORT_FLOW_CTRL_SUPP
+    range 1 1000
+    default 20
+    help
+        When adv report flow control is enabled, The ADV lost event will be generated when the number
+        of ADV packets lost in the controller reaches this threshold. It is better to set a larger value.
+        If you set `BT_CTRL_BLE_ADV_REPORT_DISCARD_THRSHOLD` to a small value or printf every adv lost event, it
+        may cause adv packets lost more.
+
+config BT_LE_SCAN_DUPL
+    bool "BLE Scan Duplicate Options"
+    default y
+    help
+        This select enables parameters setting of BLE scan duplicate.
+
+choice BT_LE_SCAN_DUPL_TYPE
+    prompt "Scan Duplicate Type"
+    default BT_LE_SCAN_DUPL_TYPE_DEVICE
+    depends on BT_LE_SCAN_DUPL
+    help
+        Scan duplicate have three ways. one is "Scan Duplicate By Device Address", This way is to use
+        advertiser address filtering. The adv packet of the same address is only allowed to be reported once.
+        Another way is "Scan Duplicate By Device Address And Advertising Data". This way is to use advertising
+        data and device address filtering. All different adv packets with the same address are allowed to be
+        reported. The last way is "Scan Duplicate By Advertising Data". This way is to use advertising data
+        filtering. All same advertising data only allow to be reported once even though they are from
+        different devices.
+
+    config BT_LE_SCAN_DUPL_TYPE_DEVICE
+        bool "Scan Duplicate By Device Address"
+        help
+            This way is to use advertiser address filtering. The adv packet of the same address is only
+            allowed to be reported once
+
+    config BT_LE_SCAN_DUPL_TYPE_DATA
+        bool "Scan Duplicate By Advertising Data"
+        help
+            This way is to use advertising data filtering. All same advertising data only allow to be reported
+            once even though they are from different devices.
+
+    config BT_LE_SCAN_DUPL_TYPE_DATA_DEVICE
+        bool "Scan Duplicate By Device Address And Advertising Data"
+        help
+            This way is to use advertising data and device address filtering. All different adv packets with
+            the same address are allowed to be reported.
+endchoice
+
+config BT_LE_SCAN_DUPL_TYPE
+    int
+    depends on BT_LE_SCAN_DUPL
+    default 0 if BT_LE_SCAN_DUPL_TYPE_DEVICE
+    default 1 if BT_LE_SCAN_DUPL_TYPE_DATA
+    default 2 if BT_LE_SCAN_DUPL_TYPE_DATA_DEVICE
+    default 0
+
+config BT_LE_SCAN_DUPL_CACHE_REFRESH_PERIOD
+    int "Duplicate scan list refresh period (seconds)"
+    depends on BT_LE_SCAN_DUPL
+    range 0 1000
+    default 0
+    help
+        If the period value is non-zero, the controller will periodically clear the device information
+        stored in the scan duuplicate filter. If it is 0, the scan duuplicate filter will not be cleared
+        until the scanning is disabled. Duplicate advertisements for this period should not be sent to the
+        Host in advertising report events.
+        There are two scenarios where the ADV packet will be repeatedly reported:
+        1. The duplicate scan cache is full, the controller will delete the oldest device information and
+        add new device information.
+        2. When the refresh period is up, the controller will clear all device information and start filtering
+        again.
+
+config BT_LE_MSYS_INIT_IN_CONTROLLER
+    bool "Msys Mbuf Init in Controller"
+    default y
+
+config BT_LE_TX_CCA_ENABLED
+    bool "Enable TX CCA feature"
+    default n
+    help
+        Enable CCA feature to cancel sending the packet if the signal power is stronger than CCA threshold.
+
+config BT_LE_CCA_RSSI_THRESH
+    int "CCA RSSI threshold value"
+    depends on BT_LE_TX_CCA_ENABLED
+    range 20 100
+    default 20
+    help
+        Power threshold of CCA in unit of -1 dBm.
--- a/components/bt/controller/esp32c6/bt.c
+++ b/components/bt/controller/esp32c6/bt.c
@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
 *
 * SPDX-License-Identifier: Apache-2.0
 */
@ -24,7 +24,7 @@
 #endif // ESP_PLATFORM

 #if CONFIG_SW_COEXIST_ENABLE
-#include "esp_coexist_internal.h"
+#include "private/esp_coexist_internal.h"
 #endif // CONFIG_SW_COEXIST_ENABLE

 #include "nimble/nimble_npl_os.h"
@ -40,6 +40,14 @@
 #include "hci_uart.h"
 #include "bt_osi_mem.h"

+#if SOC_PM_RETENTION_HAS_CLOCK_BUG
+#include "esp_private/sleep_retention.h"
+#endif // SOC_PM_RETENTION_HAS_CLOCK_BUG
+
+#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
+#include "esp_private/sleep_modem.h"
+#endif // CONFIG_FREERTOS_USE_TICKLESS_IDLE
+
 #ifdef CONFIG_BT_BLUEDROID_ENABLED
 #include "hci/hci_hal.h"
 #endif // CONFIG_BT_BLUEDROID_ENABLED
@ -50,6 +58,8 @@
 #include "esp_private/periph_ctrl.h"
 #include "esp_sleep.h"

+#include "hal/efuse_hal.h"
+#include "soc/rtc.h"
 /* Macro definition
 ************************************************************************
 */
@ -67,7 +77,6 @@
 #define ACL_DATA_MBUF_LEADINGSPCAE    4
 #endif // CONFIG_BT_BLUEDROID_ENABLED

-
 /* Types definition
 ************************************************************************
 */
@ -104,12 +113,22 @@ struct ext_funcs_t {
    uint32_t magic;
 };

+#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
+typedef void (*interface_func_t) (uint32_t len, const uint8_t*addr, bool end);
+#endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED

 /* External functions or variables
 ************************************************************************
 */
 extern int ble_osi_coex_funcs_register(struct osi_coex_funcs_t *coex_funcs);
 extern int ble_controller_init(esp_bt_controller_config_t *cfg);
+#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
+extern int r_ble_log_init_async(interface_func_t bt_controller_log_interface, bool task_create, uint8_t buffers, uint32_t *bufs_size);
+extern int r_ble_log_deinit_async(void);
+extern void r_ble_log_async_select_dump_buffers(uint8_t buffers);
+extern void r_ble_log_async_output_dump_all(bool output);
+extern void esp_panic_handler_reconfigure_wdts(uint32_t timeout_ms);
+#endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
 extern int ble_controller_deinit(void);
 extern int ble_controller_enable(uint8_t mode);
 extern int ble_controller_disable(void);
@ -119,14 +138,18 @@ extern int esp_ble_ll_set_public_addr(const uint8_t *addr);
 extern int esp_register_npl_funcs (struct npl_funcs_t *p_npl_func);
 extern void esp_unregister_npl_funcs (void);
 extern void npl_freertos_mempool_deinit(void);
-extern int os_msys_buf_alloc(void);
 extern uint32_t r_os_cputime_get32(void);
 extern uint32_t r_os_cputime_ticks_to_usecs(uint32_t ticks);
-extern void ble_lll_rfmgmt_set_sleep_cb(void *s_cb, void *w_cb, void *s_arg,
-                                        void *w_arg, uint32_t us_to_enabled);
-extern void ble_rtc_wake_up_state_clr(void);
+extern void r_ble_lll_rfmgmt_set_sleep_cb(void *s_cb, void *w_cb, void *s_arg,
+                                          void *w_arg, uint32_t us_to_enabled);
+extern void r_ble_rtc_wake_up_state_clr(void);
 extern int os_msys_init(void);
-extern void os_msys_buf_free(void);
+extern void os_msys_deinit(void);
+#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
+extern const sleep_retention_entries_config_t *esp_ble_mac_retention_link_get(uint8_t *size, uint8_t extra);
+extern void esp_ble_set_wakeup_overhead(uint32_t overhead);
+#endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */
+extern void esp_ble_change_rtc_freq(uint32_t freq);
 extern int ble_sm_alg_gen_dhkey(const uint8_t *peer_pub_key_x,
                                const uint8_t *peer_pub_key_y,
                                const uint8_t *our_priv_key, uint8_t *out_dhkey);
@ -134,6 +157,7 @@ extern int ble_sm_alg_gen_key_pair(uint8_t *pub, uint8_t *priv);
 extern int ble_txpwr_set(esp_ble_enhanced_power_type_t power_type, uint16_t handle, int power_level);
 extern int ble_txpwr_get(esp_ble_enhanced_power_type_t power_type, uint16_t handle);
 extern int ble_get_npl_element_info(esp_bt_controller_config_t *cfg, ble_npl_count_info_t * npl_info);
+extern char *ble_controller_get_compile_version(void);
 extern uint32_t _bt_bss_start;
 extern uint32_t _bt_bss_end;
 extern uint32_t _bt_controller_bss_start;
@ -167,13 +191,22 @@ static int esp_intr_free_wrapper(void **ret_handle);
 static void osi_assert_wrapper(const uint32_t ln, const char *fn, uint32_t param1, uint32_t param2);
 static uint32_t osi_random_wrapper(void);
 static void esp_reset_rpa_moudle(void);
-
+static int esp_ecc_gen_key_pair(uint8_t *pub, uint8_t *priv);
+static int esp_ecc_gen_dh_key(const uint8_t *peer_pub_key_x, const uint8_t *peer_pub_key_y,
+                              const uint8_t *our_priv_key, uint8_t *out_dhkey);
+#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
+static void esp_bt_controller_log_interface(uint32_t len, const uint8_t *addr, bool end);
+#endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
 /* Local variable definition
 ***************************************************************************
 */
 /* Static variable declare */
 static DRAM_ATTR esp_bt_controller_status_t ble_controller_status = ESP_BT_CONTROLLER_STATUS_IDLE;

+#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
+const static uint32_t log_bufs_size[] = {CONFIG_BT_LE_LOG_CTRL_BUF1_SIZE, CONFIG_BT_LE_LOG_HCI_BUF_SIZE, CONFIG_BT_LE_LOG_CTRL_BUF2_SIZE};
+#endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
+
 /* This variable tells if BLE is running */
 static bool s_ble_active = false;
 #ifdef CONFIG_PM_ENABLE
@ -181,15 +214,8 @@ static DRAM_ATTR esp_pm_lock_handle_t s_pm_lock = NULL;
 #define BTDM_MIN_TIMER_UNCERTAINTY_US      (200)
 #endif // CONFIG_PM_ENABLE

-#ifdef CONFIG_BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER
-#define BLE_RTC_DELAY_US                    (1100)
-#endif // CONFIG_BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER
-
-#ifdef CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
-#define BLE_RTC_DELAY_US                    (0)
-static void ble_sleep_timer_callback(void *arg);
-static DRAM_ATTR esp_timer_handle_t s_ble_sleep_timer = NULL;
-#endif // CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
+#define BLE_RTC_DELAY_US_LIGHT_SLEEP        (2500)
+#define BLE_RTC_DELAY_US_MODEM_SLEEP        (500)

 static const struct osi_coex_funcs_t s_osi_coex_funcs_ro = {
    ._magic = OSI_COEX_MAGIC_VALUE,
@ -218,8 +244,8 @@ struct ext_funcs_t ext_funcs_ro = {
    ._task_delete = task_delete_wrapper,
    ._osi_assert = osi_assert_wrapper,
    ._os_random = osi_random_wrapper,
-    ._ecc_gen_key_pair = ble_sm_alg_gen_key_pair,
-    ._ecc_gen_dh_key = ble_sm_alg_gen_dhkey,
+    ._ecc_gen_key_pair = esp_ecc_gen_key_pair,
+    ._ecc_gen_dh_key = esp_ecc_gen_dh_key,
    ._esp_reset_rpa_moudle = esp_reset_rpa_moudle,
    .magic = EXT_FUNC_MAGIC_VALUE,
 };
@ -233,6 +259,9 @@ static void IRAM_ATTR osi_assert_wrapper(const uint32_t ln, const char *fn,
                                         uint32_t param1, uint32_t param2)
 {
    BT_ASSERT_PRINT("BLE assert: line %d in function %s, param: 0x%x, 0x%x", ln, fn, param1, param2);
+#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
+    esp_ble_controller_log_dump_all(true);
+#endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
    assert(0);
 }

@ -299,6 +328,7 @@ void esp_vhci_host_send_packet(uint8_t *data, uint16_t len)
    if (*(data) == DATA_TYPE_COMMAND) {
        struct ble_hci_cmd *cmd = NULL;
        cmd = (struct ble_hci_cmd *) ble_hci_trans_buf_alloc(BLE_HCI_TRANS_BUF_CMD);
+        assert(cmd);
        memcpy((uint8_t *)cmd, data + 1, len - 1);
        ble_hci_trans_hs_cmd_tx((uint8_t *)cmd);
    }
@ -335,6 +365,25 @@ static void task_delete_wrapper(void *task_handle)
    vTaskDelete(task_handle);
 }

+static int esp_ecc_gen_key_pair(uint8_t *pub, uint8_t *priv)
+{
+    int rc = -1;
+#if CONFIG_BT_LE_SM_LEGACY || CONFIG_BT_LE_SM_SC
+    rc = ble_sm_alg_gen_key_pair(pub, priv);
+#endif // CONFIG_BT_LE_SM_LEGACY || CONFIG_BT_LE_SM_SC
+    return rc;
+}
+
+static int esp_ecc_gen_dh_key(const uint8_t *peer_pub_key_x, const uint8_t *peer_pub_key_y,
+                              const uint8_t *our_priv_key, uint8_t *out_dhkey)
+{
+    int rc = -1;
+#if CONFIG_BT_LE_SM_LEGACY || CONFIG_BT_LE_SM_SC
+    rc = ble_sm_alg_gen_dhkey(peer_pub_key_x, peer_pub_key_y, our_priv_key, out_dhkey);
+#endif // CONFIG_BT_LE_SM_LEGACY || CONFIG_BT_LE_SM_SC
+    return rc;
+}
+
 #ifdef CONFIG_BT_LE_HCI_INTERFACE_USE_UART
 static void hci_uart_start_tx_wrapper(int uart_no)
 {
@ -401,47 +450,51 @@ static int esp_intr_free_wrapper(void **ret_handle)
    return rc;
 }

+void esp_bt_rtc_slow_clk_select(uint8_t slow_clk_src)
+{
+    /* Select slow clock source for BT momdule */
+    switch (slow_clk_src) {
+        case MODEM_CLOCK_LPCLK_SRC_MAIN_XTAL:
+            ESP_LOGI(NIMBLE_PORT_LOG_TAG, "Using main XTAL as clock source");
+            uint32_t chip_version = efuse_hal_chip_revision();
+            if (chip_version == 0) {
+                modem_clock_select_lp_clock_source(PERIPH_BT_MODULE, slow_clk_src, (400 - 1));
+            } else{
+                modem_clock_select_lp_clock_source(PERIPH_BT_MODULE, slow_clk_src, (5 - 1));
+            }
+            break;
+        case MODEM_CLOCK_LPCLK_SRC_RC_SLOW:
+            ESP_LOGI(NIMBLE_PORT_LOG_TAG, "Using 136 kHz RC as clock source, can only run legacy ADV or SCAN due to low clock accuracy!");
+            modem_clock_select_lp_clock_source(PERIPH_BT_MODULE, slow_clk_src, (5 - 1));
+            break;
+        case MODEM_CLOCK_LPCLK_SRC_XTAL32K:
+            ESP_LOGI(NIMBLE_PORT_LOG_TAG, "Using external 32.768 kHz XTAL as clock source");
+            modem_clock_select_lp_clock_source(PERIPH_BT_MODULE, slow_clk_src, (1 - 1));
+            break;
+        case MODEM_CLOCK_LPCLK_SRC_RC32K:
+            ESP_LOGI(NIMBLE_PORT_LOG_TAG, "Using 32 kHz RC as clock source, can only run legacy ADV or SCAN due to low clock accuracy!");
+            modem_clock_select_lp_clock_source(PERIPH_BT_MODULE, slow_clk_src, (1 - 1));
+            break;
+        case MODEM_CLOCK_LPCLK_SRC_EXT32K:
+            ESP_LOGI(NIMBLE_PORT_LOG_TAG, "Using 32 kHz oscillator as clock source, can only run legacy ADV or SCAN due to low clock accuracy!");
+            modem_clock_select_lp_clock_source(PERIPH_BT_MODULE, slow_clk_src, (1 - 1));
+            break;
+        default:
+    }
+}
+
 IRAM_ATTR void controller_sleep_cb(uint32_t enable_tick, void *arg)
 {
    if (!s_ble_active) {
        return;
    }
-
-#ifdef CONFIG_PM_ENABLE
-#ifdef CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
-    uint32_t delta_tick;
-    uint32_t us_to_sleep;
-    uint32_t sleep_tick;
-    uint32_t tick_invalid = *(uint32_t*)(arg);
-    assert(arg != NULL);
-    if (!tick_invalid) {
-        sleep_tick = r_os_cputime_get32();
-        /* start a timer to wake up and acquire the pm_lock before modem_sleep awakes */
-        delta_tick = enable_tick - sleep_tick;
-        if (delta_tick & 0x80000000) {
-            return;
-        }
-        us_to_sleep = r_os_cputime_ticks_to_usecs(delta_tick);
-        if (us_to_sleep <= BTDM_MIN_TIMER_UNCERTAINTY_US) {
-            return;
-        }
-        esp_err_t err = esp_timer_start_once(s_ble_sleep_timer,
-                                             us_to_sleep - BTDM_MIN_TIMER_UNCERTAINTY_US);
-        if (err != ESP_OK) {
-            ESP_LOGW(NIMBLE_PORT_LOG_TAG, "ESP timer start failed\n");
-            return;
-        }
-    }
-#endif // CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
-
-#ifdef CONFIG_BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER
+#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
    r_ble_rtc_wake_up_state_clr();
-#endif // CONFIG_BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER
-
+#endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */
+    esp_phy_disable(PHY_MODEM_BT);
+#ifdef CONFIG_PM_ENABLE
    esp_pm_lock_release(s_pm_lock);
 #endif // CONFIG_PM_ENABLE
-
-    esp_phy_disable();
    s_ble_active = false;
 }

@ -450,37 +503,51 @@ IRAM_ATTR void controller_wakeup_cb(void *arg)
    if (s_ble_active) {
        return;
    }
-    esp_phy_enable();
-
 #ifdef CONFIG_PM_ENABLE
    esp_pm_lock_acquire(s_pm_lock);
+    r_ble_rtc_wake_up_state_clr();
 #endif //CONFIG_PM_ENABLE
-
+    esp_phy_enable(PHY_MODEM_BT);
    s_ble_active = true;
 }

-#ifdef CONFIG_PM_ENABLE
-#ifdef CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
-static void ble_sleep_timer_callback(void * arg)
+#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
+static esp_err_t sleep_modem_ble_mac_modem_state_init(uint8_t extra)
 {
-
+    uint8_t size;
+    const sleep_retention_entries_config_t *ble_mac_modem_config = esp_ble_mac_retention_link_get(&size, extra);
+    esp_err_t err = sleep_retention_entries_create(ble_mac_modem_config, size, REGDMA_LINK_PRI_5, SLEEP_RETENTION_MODULE_BLE_MAC);
+    if (err == ESP_OK) {
+        ESP_LOGI(NIMBLE_PORT_LOG_TAG, "Modem BLE MAC retention initialization");
+    }
+    return err;
 }

-#endif // CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
-#endif // CONFIG_PM_ENABLE
+static void sleep_modem_ble_mac_modem_state_deinit(void)
+{
+    sleep_retention_entries_destroy(SLEEP_RETENTION_MODULE_BLE_MAC);
+}
+
+void sleep_modem_light_sleep_overhead_set(uint32_t overhead)
+{
+    esp_ble_set_wakeup_overhead(overhead);
+}
+#endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */
+

 esp_err_t controller_sleep_init(void)
 {
    esp_err_t rc = 0;

 #ifdef CONFIG_BT_LE_SLEEP_ENABLE
-    ESP_LOGW(NIMBLE_PORT_LOG_TAG, "BLE modem sleep is enabled\n");
-    ble_lll_rfmgmt_set_sleep_cb(controller_sleep_cb, controller_wakeup_cb, 0, 0,
-                                500 + BLE_RTC_DELAY_US);
-
-#ifdef CONFIG_PM_ENABLE
-    esp_sleep_pd_config(ESP_PD_DOMAIN_XTAL, ESP_PD_OPTION_ON);
-#endif // CONFIG_PM_ENABLE
+    ESP_LOGW(NIMBLE_PORT_LOG_TAG, "BLE modem sleep is enabled");
+#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
+    r_ble_lll_rfmgmt_set_sleep_cb(controller_sleep_cb, controller_wakeup_cb, 0, 0,
+                                BLE_RTC_DELAY_US_LIGHT_SLEEP);
+#else
+    r_ble_lll_rfmgmt_set_sleep_cb(controller_sleep_cb, controller_wakeup_cb, 0, 0,
+                                BLE_RTC_DELAY_US_MODEM_SLEEP);
+#endif /* FREERTOS_USE_TICKLESS_IDLE */
 #endif // CONFIG_BT_LE_SLEEP_ENABLE

 #ifdef CONFIG_PM_ENABLE
@ -488,85 +555,141 @@ esp_err_t controller_sleep_init(void)
    if (rc != ESP_OK) {
        goto error;
    }
-    esp_pm_lock_acquire(s_pm_lock);
+#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
+    /* Create a new regdma link for BLE related register restoration */
+    rc = sleep_modem_ble_mac_modem_state_init(1);
+    assert(rc == 0);
+    esp_sleep_enable_bt_wakeup();
+    ESP_LOGW(NIMBLE_PORT_LOG_TAG, "Enable light sleep, the wake up source is BLE timer");

-#ifdef CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
-    esp_timer_create_args_t create_args = {
-        .callback = ble_sleep_timer_callback,
-        .arg = NULL,
-        .name = "btSlp"
-    };
-    rc = esp_timer_create(&create_args, &s_ble_sleep_timer);
+    rc = esp_pm_register_inform_out_light_sleep_overhead_callback(sleep_modem_light_sleep_overhead_set);
    if (rc != ESP_OK) {
        goto error;
    }
-    ESP_LOGW(NIMBLE_PORT_LOG_TAG, "Enable light sleep, the wake up source is ESP timer");
-#endif //CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
-
-#ifdef CONFIG_BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER
-    esp_sleep_enable_bt_wakeup();
-    ESP_LOGW(NIMBLE_PORT_LOG_TAG, "Enable light sleep, the wake up source is BLE timer");
-#endif // CONFIG_BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER

+#if SOC_PM_RETENTION_HAS_CLOCK_BUG && CONFIG_MAC_BB_PD
+    sleep_modem_register_mac_bb_module_prepare_callback(sleep_modem_mac_bb_power_down_prepare,
+                                                   sleep_modem_mac_bb_power_up_prepare);
+#endif // SOC_PM_RETENTION_HAS_CLOCK_BUG && CONFIG_MAC_BB_PD
+#endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */
    return rc;

 error:
+
+#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
+#if SOC_PM_RETENTION_HAS_CLOCK_BUG && CONFIG_MAC_BB_PD
+    sleep_modem_unregister_mac_bb_module_prepare_callback(sleep_modem_mac_bb_power_down_prepare,
+                                                     sleep_modem_mac_bb_power_up_prepare);
+#endif // SOC_PM_RETENTION_HAS_CLOCK_BUG && CONFIG_MAC_BB_PD
+    esp_sleep_disable_bt_wakeup();
+    esp_pm_unregister_inform_out_light_sleep_overhead_callback(sleep_modem_light_sleep_overhead_set);
+#endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */
    /*lock should release first and then delete*/
    if (s_pm_lock != NULL) {
-        esp_pm_lock_release(s_pm_lock);
        esp_pm_lock_delete(s_pm_lock);
        s_pm_lock = NULL;
    }
-#ifdef CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
-    if (s_ble_sleep_timer != NULL) {
-        esp_timer_stop(s_ble_sleep_timer);
-        esp_timer_delete(s_ble_sleep_timer);
-        s_ble_sleep_timer = NULL;
-    }
-#endif // CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
-
-#ifdef CONFIG_BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER
-    esp_sleep_disable_bt_wakeup();
-#endif // CONFIG_BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER
-
-#endif //CONFIG_PM_ENABLE
+#endif // CONFIG_PM_ENABLE

    return rc;
 }

 void controller_sleep_deinit(void)
 {
-#ifdef CONFIG_PM_ENABLE
-#ifdef CONFIG_BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER
+#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
+#if SOC_PM_RETENTION_HAS_CLOCK_BUG && CONFIG_MAC_BB_PD
+    sleep_modem_unregister_mac_bb_module_prepare_callback(sleep_modem_mac_bb_power_down_prepare,
+                                                     sleep_modem_mac_bb_power_up_prepare);
+#endif // SOC_PM_RETENTION_HAS_CLOCK_BUG && CONFIG_MAC_BB_PD
    r_ble_rtc_wake_up_state_clr();
    esp_sleep_disable_bt_wakeup();
-#endif //CONFIG_BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER
-
-    esp_sleep_pd_config(ESP_PD_DOMAIN_XTAL, ESP_PD_OPTION_AUTO);
-
+    sleep_modem_ble_mac_modem_state_deinit();
+    esp_pm_unregister_inform_out_light_sleep_overhead_callback(sleep_modem_light_sleep_overhead_set);
+#endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */
+#ifdef CONFIG_PM_ENABLE
    /* lock should be released first */
-    if (s_ble_active) {
-        esp_pm_lock_release(s_pm_lock);
-    }
-
    esp_pm_lock_delete(s_pm_lock);
    s_pm_lock = NULL;
-
-#ifdef CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
-    if (s_ble_sleep_timer != NULL) {
-        esp_timer_stop(s_ble_sleep_timer);
-        esp_timer_delete(s_ble_sleep_timer);
-        s_ble_sleep_timer = NULL;
-    }
-#endif //CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
 #endif //CONFIG_PM_ENABLE
 }

+typedef enum {
+    FILTER_DUPLICATE_PDUTYPE = BIT(0),
+    FILTER_DUPLICATE_LENGTH  = BIT(1),
+    FILTER_DUPLICATE_ADDRESS = BIT(2),
+    FILTER_DUPLICATE_ADVDATA = BIT(3),
+    FILTER_DUPLICATE_DEFAULT = FILTER_DUPLICATE_PDUTYPE | FILTER_DUPLICATE_ADDRESS,
+    FILTER_DUPLICATE_PDU_ALL = 0xF,
+    FILTER_DUPLICATE_EXCEPTION_FOR_MESH = BIT(4),
+    FILTER_DUPLICATE_AD_TYPE = BIT(5),
+}disc_duplicate_mode_t;
+
+
+extern void r_filter_duplicate_mode_enable(disc_duplicate_mode_t mode);
+extern void r_filter_duplicate_mode_disable(disc_duplicate_mode_t mode);
+extern void r_filter_duplicate_set_ring_list_max_num(uint32_t max_num);
+extern void r_scan_duplicate_cache_refresh_set_time(uint32_t period_time);
+
+int
+ble_vhci_disc_duplicate_mode_enable(int mode)
+{
+    // TODO: use vendor hci to update
+    r_filter_duplicate_mode_enable(mode);
+    return true;
+}
+
+int
+ble_vhci_disc_duplicate_mode_disable(int mode)
+{
+    // TODO: use vendor hci to update
+    r_filter_duplicate_mode_disable(mode);
+    return true;
+}
+
+int ble_vhci_disc_duplicate_set_max_cache_size(int max_cache_size){
+    // TODO: use vendor hci to update
+    r_filter_duplicate_set_ring_list_max_num(max_cache_size);
+    return true;
+}
+
+int ble_vhci_disc_duplicate_set_period_refresh_time(int refresh_period_time){
+    // TODO: use vendor hci to update
+    r_scan_duplicate_cache_refresh_set_time(refresh_period_time);
+    return true;
+}
+
+/**
+ * @brief Config scan duplicate option mode from menuconfig (Adapt to the old configuration method.)
+ */
+void ble_controller_scan_duplicate_config(void)
+{
+    uint32_t duplicate_mode = FILTER_DUPLICATE_DEFAULT;
+    uint32_t cache_size = 100;
+#if CONFIG_BT_LE_SCAN_DUPL == true
+    cache_size = CONFIG_BT_LE_LL_DUP_SCAN_LIST_COUNT;
+    if (CONFIG_BT_LE_SCAN_DUPL_TYPE == 0) {
+        duplicate_mode = FILTER_DUPLICATE_ADDRESS | FILTER_DUPLICATE_PDUTYPE;
+    } else if (CONFIG_BT_LE_SCAN_DUPL_TYPE == 1) {
+        duplicate_mode = FILTER_DUPLICATE_ADVDATA;
+    } else if (CONFIG_BT_LE_SCAN_DUPL_TYPE == 2) {
+        duplicate_mode = FILTER_DUPLICATE_ADDRESS | FILTER_DUPLICATE_ADVDATA;
+    }
+    duplicate_mode |= FILTER_DUPLICATE_EXCEPTION_FOR_MESH;
+
+    ble_vhci_disc_duplicate_set_period_refresh_time(CONFIG_BT_LE_SCAN_DUPL_CACHE_REFRESH_PERIOD);
+#endif
+
+    ble_vhci_disc_duplicate_mode_disable(0xFFFFFFFF);
+    ble_vhci_disc_duplicate_mode_enable(duplicate_mode);
+    ble_vhci_disc_duplicate_set_max_cache_size(cache_size);
+}
+
 esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
 {
    uint8_t mac[6];
    esp_err_t ret = ESP_OK;
    ble_npl_count_info_t npl_info;
+    uint32_t slow_clk_freq = 0;

    memset(&npl_info, 0, sizeof(ble_npl_count_info_t));

@ -608,43 +731,89 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
        goto free_mem;
    }

-    /* Initialize the global memory pool */
-    ret = os_msys_buf_alloc();
-    if (ret != ESP_OK) {
-        ESP_LOGW(NIMBLE_PORT_LOG_TAG, "os msys alloc failed");
-        goto free_mem;
-    }
-
-    os_msys_init();
-
 #if CONFIG_BT_NIMBLE_ENABLED
    /* ble_npl_eventq_init() needs to use npl functions in rom and
     * must be called after esp_bt_controller_init().
     */
    ble_npl_eventq_init(nimble_port_get_dflt_eventq());
 #endif // CONFIG_BT_NIMBLE_ENABLED
-
    /* Enable BT-related clocks */
    modem_clock_module_enable(PERIPH_BT_MODULE);
-    modem_clock_select_lp_clock_source(PERIPH_BT_MODULE, MODEM_CLOCK_LPCLK_SRC_MAIN_XTAL, 249);
+    modem_clock_module_mac_reset(PERIPH_BT_MODULE);
+    /* Select slow clock source for BT momdule */
+#if CONFIG_BT_LE_LP_CLK_SRC_MAIN_XTAL
+   esp_bt_rtc_slow_clk_select(MODEM_CLOCK_LPCLK_SRC_MAIN_XTAL);
+   slow_clk_freq = 100000;
+#else
+#if CONFIG_RTC_CLK_SRC_INT_RC
+    esp_bt_rtc_slow_clk_select(MODEM_CLOCK_LPCLK_SRC_RC_SLOW);
+    slow_clk_freq = 30000;
+#elif CONFIG_RTC_CLK_SRC_EXT_CRYS
+    if (rtc_clk_slow_src_get() == SOC_RTC_SLOW_CLK_SRC_XTAL32K) {
+        esp_bt_rtc_slow_clk_select(MODEM_CLOCK_LPCLK_SRC_XTAL32K);
+        slow_clk_freq = 32768;
+    } else {
+        ESP_LOGW(NIMBLE_PORT_LOG_TAG, "32.768kHz XTAL not detected, fall back to main XTAL as Bluetooth sleep clock");
+        esp_bt_rtc_slow_clk_select(MODEM_CLOCK_LPCLK_SRC_MAIN_XTAL);
+        slow_clk_freq = 100000;
+    }
+#elif CONFIG_RTC_CLK_SRC_INT_RC32K
+    esp_bt_rtc_slow_clk_select(MODEM_CLOCK_LPCLK_SRC_RC32K);
+    slow_clk_freq = 32000;
+#elif CONFIG_RTC_CLK_SRC_EXT_OSC
+    esp_bt_rtc_slow_clk_select(MODEM_CLOCK_LPCLK_SRC_EXT32K);
+    slow_clk_freq = 32000;
+#else
+    ESP_LOGE(NIMBLE_PORT_LOG_TAG, "Unsupported clock source");
+    assert(0);
+#endif
+#endif /* CONFIG_BT_LE_LP_CLK_SRC_MAIN_XTAL */
    esp_phy_modem_init();
-    esp_phy_enable();
-    esp_btbb_enable();
-    s_ble_active = true;

    if (ble_osi_coex_funcs_register((struct osi_coex_funcs_t *)&s_osi_coex_funcs_ro) != 0) {
        ESP_LOGW(NIMBLE_PORT_LOG_TAG, "osi coex funcs reg failed");
        ret = ESP_ERR_INVALID_ARG;
-        goto free_controller;
+        goto modem_deint;
    }

 #if CONFIG_SW_COEXIST_ENABLE
    coex_init();
 #endif // CONFIG_SW_COEXIST_ENABLE

+#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
+    interface_func_t bt_controller_log_interface;
+    bt_controller_log_interface = esp_bt_controller_log_interface;
+    uint8_t buffers = 0;
+#if CONFIG_BT_LE_CONTROLLER_LOG_CTRL_ENABLED
+    buffers |= ESP_BLE_LOG_BUF_CONTROLLER;
+#endif // CONFIG_BT_LE_CONTROLLER_LOG_CTRL_ENABLED
+#if CONFIG_BT_LE_CONTROLLER_LOG_HCI_ENABLED
+    buffers |= ESP_BLE_LOG_BUF_HCI;
+#endif // CONFIG_BT_LE_CONTROLLER_LOG_HCI_ENABLED
+#if CONFIG_BT_LE_CONTROLLER_LOG_DUMP_ONLY
+    ret = r_ble_log_init_async(bt_controller_log_interface, false, buffers, (uint32_t *)log_bufs_size);
+#else
+    ret = r_ble_log_init_async(bt_controller_log_interface, true, buffers, (uint32_t *)log_bufs_size);
+#endif // CONFIG_BT_CONTROLLER_LOG_DUMP
+    if (ret != ESP_OK) {
+        ESP_LOGW(NIMBLE_PORT_LOG_TAG, "ble_controller_log_init failed %d", ret);
+        goto modem_deint;
+    }
+#endif // CONFIG_BT_CONTROLLER_LOG_ENABLED
    ret = ble_controller_init(cfg);
    if (ret != ESP_OK) {
        ESP_LOGW(NIMBLE_PORT_LOG_TAG, "ble_controller_init failed %d", ret);
+        goto modem_deint;
+    }
+
+    ESP_LOGI(NIMBLE_PORT_LOG_TAG, "ble controller commit:[%s]", ble_controller_get_compile_version());
+    esp_ble_change_rtc_freq(slow_clk_freq);
+
+    ble_controller_scan_duplicate_config();
+
+    ret = os_msys_init();
+    if (ret != ESP_OK) {
+        ESP_LOGW(NIMBLE_PORT_LOG_TAG, "msys_init failed %d", ret);
        goto free_controller;
    }

@ -653,7 +822,6 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
        ESP_LOGW(NIMBLE_PORT_LOG_TAG, "controller_sleep_init failed %d", ret);
        goto free_controller;
    }
-
    ESP_ERROR_CHECK(esp_read_mac((uint8_t *)mac, ESP_MAC_BT));
    swap_in_place(mac, 6);
    esp_ble_ll_set_public_addr(mac);
@ -666,9 +834,12 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)

 free_controller:
    controller_sleep_deinit();
+    os_msys_deinit();
    ble_controller_deinit();
-    esp_btbb_disable();
-    esp_phy_disable();
+modem_deint:
+#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
+    r_ble_log_deinit_async();
+#endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
    esp_phy_modem_deinit();
    modem_clock_deselect_lp_clock_source(PERIPH_BT_MODULE);
    modem_clock_module_disable(PERIPH_BT_MODULE);
@ -676,7 +847,6 @@ free_controller:
    ble_npl_eventq_deinit(nimble_port_get_dflt_eventq());
 #endif // CONFIG_BT_NIMBLE_ENABLED
 free_mem:
-    os_msys_buf_free();
    npl_freertos_mempool_deinit();
    esp_unregister_npl_funcs();
    npl_freertos_funcs_deinit();
@ -694,25 +864,22 @@ esp_err_t esp_bt_controller_deinit(void)

    controller_sleep_deinit();

-    esp_btbb_disable();
+    os_msys_deinit();

-    if (s_ble_active) {
-        esp_phy_disable();
-        s_ble_active = false;
-    }
    esp_phy_modem_deinit();
    modem_clock_deselect_lp_clock_source(PERIPH_BT_MODULE);
    modem_clock_module_disable(PERIPH_BT_MODULE);

    ble_controller_deinit();
+#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
+    r_ble_log_deinit_async();
+#endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED

 #if CONFIG_BT_NIMBLE_ENABLED
    /* De-initialize default event queue */
    ble_npl_eventq_deinit(nimble_port_get_dflt_eventq());
 #endif // CONFIG_BT_NIMBLE_ENABLED

-    os_msys_buf_free();
-
    esp_unregister_npl_funcs();

    esp_unregister_ext_funcs();
@ -739,7 +906,14 @@ esp_err_t esp_bt_controller_enable(esp_bt_mode_t mode)
        ESP_LOGW(NIMBLE_PORT_LOG_TAG, "invalid controller state");
        return ESP_FAIL;
    }
-
+    if (!s_ble_active) {
+#if CONFIG_PM_ENABLE
+        esp_pm_lock_acquire(s_pm_lock);
+#endif  // CONFIG_PM_ENABLE
+        esp_phy_enable(PHY_MODEM_BT);
+        s_ble_active = true;
+    }
+    esp_btbb_enable();
 #if CONFIG_SW_COEXIST_ENABLE
    coex_enable();
 #endif // CONFIG_SW_COEXIST_ENABLE
@ -755,6 +929,14 @@ error:
 #if CONFIG_SW_COEXIST_ENABLE
    coex_disable();
 #endif
+    esp_btbb_disable();
+    if (s_ble_active) {
+        esp_phy_disable(PHY_MODEM_BT);
+#if CONFIG_PM_ENABLE
+        esp_pm_lock_release(s_pm_lock);
+#endif  // CONFIG_PM_ENABLE
+        s_ble_active = false;
+    }
    return ret;
 }

@ -770,6 +952,14 @@ esp_err_t esp_bt_controller_disable(void)
 #if CONFIG_SW_COEXIST_ENABLE
    coex_disable();
 #endif
+    esp_btbb_disable();
+    if (s_ble_active) {
+        esp_phy_disable(PHY_MODEM_BT);
+#if CONFIG_PM_ENABLE
+        esp_pm_lock_release(s_pm_lock);
+#endif  // CONFIG_PM_ENABLE
+        s_ble_active = false;
+    }
    ble_controller_status = ESP_BT_CONTROLLER_STATUS_INITED;
    return ESP_OK;
 }
@ -983,10 +1173,33 @@ esp_power_level_t esp_ble_tx_power_get_enhanced(esp_ble_enhanced_power_type_t po
    return (esp_power_level_t)tx_level;
 }

+#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
+static void esp_bt_controller_log_interface(uint32_t len, const uint8_t *addr, bool end)
+{
+    for (int i = 0; i < len; i++) {
+        esp_rom_printf("%02x ", addr[i]);
+    }
+    if (end) {
+        esp_rom_printf("\n");
+    }
+}

-#if (!CONFIG_BT_NIMBLE_ENABLED) && (CONFIG_BT_CONTROLLER_ENABLED == true)
+void esp_ble_controller_log_dump_all(bool output)
+{
+    portMUX_TYPE spinlock = portMUX_INITIALIZER_UNLOCKED;
+
+    portENTER_CRITICAL_SAFE(&spinlock);
+    esp_panic_handler_reconfigure_wdts(5000);
+    BT_ASSERT_PRINT("\r\n[DUMP_START:");
+    r_ble_log_async_output_dump_all(output);
+    BT_ASSERT_PRINT(":DUMP_END]\r\n");
+    portEXIT_CRITICAL_SAFE(&spinlock);
+}
+#endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
+
+#if (!CONFIG_BT_NIMBLE_ENABLED) && (CONFIG_BT_CONTROLLER_ENABLED)
+#if CONFIG_BT_LE_SM_LEGACY || CONFIG_BT_LE_SM_SC
 #define BLE_SM_KEY_ERR 0x17
-
 #if CONFIG_BT_LE_CRYPTO_STACK_MBEDTLS
 #include "mbedtls/aes.h"
 #if CONFIG_BT_LE_SM_SC
@ -996,22 +1209,27 @@ esp_power_level_t esp_ble_tx_power_get_enhanced(esp_ble_enhanced_power_type_t po
 #include "mbedtls/cmac.h"
 #include "mbedtls/ecdh.h"
 #include "mbedtls/ecp.h"
+
+static mbedtls_ecp_keypair keypair;
 #endif // CONFIG_BT_LE_SM_SC
+
 #else
 #include "tinycrypt/aes.h"
 #include "tinycrypt/constants.h"
 #include "tinycrypt/utils.h"
+
 #if CONFIG_BT_LE_SM_SC
 #include "tinycrypt/cmac_mode.h"
 #include "tinycrypt/ecc_dh.h"
 #endif // CONFIG_BT_LE_SM_SC
 #endif // CONFIG_BT_LE_CRYPTO_STACK_MBEDTLS

-#if CONFIG_BT_LE_CRYPTO_STACK_MBEDTLS
-#if CONFIG_BT_LE_SM_SC
-static mbedtls_ecp_keypair keypair;
-#endif // CONFIG_BT_LE_SM_SC
-#endif// CONFIG_BT_LE_CRYPTO_STACK_MBEDTLS
+/* Based on Core Specification 4.2 Vol 3. Part H 2.3.5.6.1 */
+static const uint8_t ble_sm_alg_dbg_priv_key[32] = {
+    0x3f, 0x49, 0xf6, 0xd4, 0xa3, 0xc5, 0x5f, 0x38, 0x74, 0xc9, 0xb3, 0xe3,
+    0xd2, 0x10, 0x3f, 0x50, 0x4a, 0xff, 0x60, 0x7b, 0xeb, 0x40, 0xb7, 0x99,
+    0x58, 0x99, 0xb8, 0xa6, 0xcd, 0x3c, 0x1a, 0xbd
+};

 int ble_sm_alg_gen_dhkey(const uint8_t *peer_pub_key_x, const uint8_t *peer_pub_key_y,
                         const uint8_t *our_priv_key, uint8_t *out_dhkey)
@ -1058,8 +1276,7 @@ int ble_sm_alg_gen_dhkey(const uint8_t *peer_pub_key_x, const uint8_t *peer_pub_
    }

    /* Set PRNG */
-    if ((rc = mbedtls_ctr_drbg_seed(&ctr_drbg, mbedtls_entropy_func, &entropy,
-                                    NULL, 0)) != 0) {
+    if ((rc = mbedtls_ctr_drbg_seed(&ctr_drbg, mbedtls_entropy_func, &entropy, NULL, 0)) != 0) {
        goto exit;
    }

@ -1109,19 +1326,10 @@ exit:
    return 0;
 }

-/* based on Core Specification 4.2 Vol 3. Part H 2.3.5.6.1 */
-static const uint8_t ble_sm_alg_dbg_priv_key[32] = {
-    0x3f, 0x49, 0xf6, 0xd4, 0xa3, 0xc5, 0x5f, 0x38, 0x74, 0xc9, 0xb3, 0xe3,
-    0xd2, 0x10, 0x3f, 0x50, 0x4a, 0xff, 0x60, 0x7b, 0xeb, 0x40, 0xb7, 0x99,
-    0x58, 0x99, 0xb8, 0xa6, 0xcd, 0x3c, 0x1a, 0xbd
-};
-
 #if CONFIG_BT_LE_CRYPTO_STACK_MBEDTLS
 static int mbedtls_gen_keypair(uint8_t *public_key, uint8_t *private_key)
 {
    int rc = BLE_SM_KEY_ERR;
-    size_t olen = 0;
-    uint8_t pub[65] = {0};
    mbedtls_entropy_context entropy = {0};
    mbedtls_ctr_drbg_context ctr_drbg = {0};

@ -1143,11 +1351,11 @@ static int mbedtls_gen_keypair(uint8_t *public_key, uint8_t *private_key)
        goto exit;
    }

+    size_t olen = 0;
+    uint8_t pub[65] = {0};

-    if ((rc = mbedtls_ecp_point_write_binary(&keypair.MBEDTLS_PRIVATE(grp),
-                                             &keypair.MBEDTLS_PRIVATE(Q),
-                                             MBEDTLS_ECP_PF_UNCOMPRESSED,
-                                             &olen, pub, 65)) != 0) {
+    if ((rc = mbedtls_ecp_point_write_binary(&keypair.MBEDTLS_PRIVATE(grp), &keypair.MBEDTLS_PRIVATE(Q), MBEDTLS_ECP_PF_UNCOMPRESSED,
+              &olen, pub, 65)) != 0) {
        goto exit;
    }

@ -1163,7 +1371,7 @@ exit:

    return 0;
 }
-#endif // CONFIG_BT_LE_CRYPTO_STACK_MBEDTLS
+#endif  // CONFIG_BT_LE_CRYPTO_STACK_MBEDTLS

 /**
 * pub: 64 bytes
@ -1187,7 +1395,7 @@ int ble_sm_alg_gen_key_pair(uint8_t *pub, uint8_t *priv)
        if (uECC_make_key(pk, priv, &curve_secp256r1) != TC_CRYPTO_SUCCESS) {
            return BLE_SM_KEY_ERR;
        }
-#endif // CONFIG_BT_LE_CRYPTO_STACK_MBEDTLS
+#endif  // CONFIG_BT_LE_CRYPTO_STACK_MBEDTLS
        /* Make sure generated key isn't debug key. */
    } while (memcmp(priv, ble_sm_alg_dbg_priv_key, 32) == 0);

@ -1195,7 +1403,8 @@ int ble_sm_alg_gen_key_pair(uint8_t *pub, uint8_t *priv)
    swap_buf(&pub[32], &pk[32], 32);
    swap_in_place(priv, 32);
 #endif // CONFIG_BT_LE_SM_SC_DEBUG_KEYS
-
    return 0;
 }
-#endif // (!CONFIG_BT_NIMBLE_ENABLED) && (CONFIG_BT_CONTROLLER_ENABLED == true)
+
+#endif // CONFIG_BT_LE_SM_LEGACY || CONFIG_BT_LE_SM_SC
+#endif // (!CONFIG_BT_NIMBLE_ENABLED) && (CONFIG_BT_CONTROLLER_ENABLED)
--- a/components/bt/include/esp32c6/include/esp_bt_cfg.h
+++ b/components/bt/include/esp32c6/include/esp_bt_cfg.h
@ -39,8 +39,12 @@ extern "C" {
    #define DEFAULT_BT_NIMBLE_WHITELIST_SIZE MYNEWT_VAL(BLE_LL_WHITELIST_SIZE)
    #define DEFAULT_BT_LE_HCI_EVT_HI_BUF_COUNT MYNEWT_VAL(BLE_TRANSPORT_EVT_COUNT)
    #define DEFAULT_BT_LE_HCI_EVT_LO_BUF_COUNT MYNEWT_VAL(BLE_TRANSPORT_EVT_DISCARDABLE_COUNT)
-    #define DEFAULT_BT_LE_COEX_PHY_CODED_TX_RX_TLIM_EFF CONFIG_BT_NIMBLE_COEX_PHY_CODED_TX_RX_TLIM_EFF
    #define DEFAULT_BT_LE_POWER_CONTROL_ENABLED    MYNEWT_VAL(BLE_POWER_CONTROL)
+    #if defined(CONFIG_BT_NIMBLE_50_FEATURE_SUPPORT)
+    #define DEFAULT_BT_LE_50_FEATURE_SUPPORT (1)
+    #else
+    #define DEFAULT_BT_LE_50_FEATURE_SUPPORT (0)
+    #endif
 #else

    #if CONFIG_BT_LE_LL_CFG_FEAT_LE_CODED_PHY
@ -115,16 +119,19 @@ extern "C" {
        #define DEFAULT_BT_LE_HCI_EVT_LO_BUF_COUNT (8)
    #endif

-    #define DEFAULT_BT_LE_COEX_PHY_CODED_TX_RX_TLIM_EFF CONFIG_BT_LE_COEX_PHY_CODED_TX_RX_TLIM_EFF
-
    #if defined(CONFIG_BT_LE_POWER_CONTROL_ENABLED)
        #define DEFAULT_BT_LE_POWER_CONTROL_ENABLED (CONFIG_BT_LE_POWER_CONTROL_ENABLED)
    #else
        #define DEFAULT_BT_LE_POWER_CONTROL_ENABLED (0)
    #endif
+    #if defined(CONFIG_BT_LE_50_FEATURE_SUPPORT)
+        #define DEFAULT_BT_LE_50_FEATURE_SUPPORT (1)
+    #else
+        #define DEFAULT_BT_LE_50_FEATURE_SUPPORT (0)
+    #endif
 #endif

-
+#define DEFAULT_BT_LE_COEX_PHY_CODED_TX_RX_TLIM_EFF CONFIG_BT_LE_COEX_PHY_CODED_TX_RX_TLIM_EFF

 #ifdef CONFIG_BT_LE_HCI_INTERFACE_USE_UART
 #define HCI_UART_EN CONFIG_BT_LE_HCI_INTERFACE_USE_UART
@ -196,7 +203,7 @@ extern "C" {

 #define BLE_LL_CONN_DEF_AUTH_PYLD_TMO_N     (3000)

-#define RTC_FREQ_N                          (160000) /* in Hz */
+#define RTC_FREQ_N                          (32768) /* in Hz */

 #define BLE_LL_TX_PWR_DBM_N                 (9)

--- a/Show More
+++ b/Show More