Merge branch 'bugfix/bt_idf_ci_v5.2' into 'release/v5.2'

fix(example/classic_bt): Fix the potential stack overflow tasks (v5.2) See merge request espressif/esp-idf!42519
Merge branch 'fix/change_api_to_enable_rc32k_v5.2' into 'release/v5.2'
2026-06-13 20:52:42 +02:00 · 2025-10-16 13:56:09 +08:00 · 2025-10-16 11:11:22 +08:00 · 2025-10-15 12:52:06 +05:30 · 2025-10-14 21:36:11 +05:30 · 2025-10-14 19:13:18 +08:00
3966 changed files with 233578 additions and 336204 deletions
@@ -60,7 +60,9 @@ jobs:
          username: ${{ secrets.DOCKERHUB_USERNAME }}
          password: ${{ secrets.DOCKERHUB_TOKEN }}
      - name: Set up QEMU for multiarch builds
-        uses: docker/setup-qemu-action@v2
+        uses: docker/setup-qemu-action@v3
+        with:
+          image: tonistiigi/binfmt:qemu-v7.0.0-28
      - name: Set up Docker Buildx
        uses: docker/setup-buildx-action@v2
      - name: Build and push
@@ -8,10 +8,11 @@ on:
 jobs:
  release_zips:
    name: Create release zip file
-    runs-on: ubuntu-20.04
+    runs-on: ubuntu-24.04
    steps:
      - name: Create a recursive clone source zip
-        uses: espressif/github-actions/release_zips@master
-        env:
-            RELEASE_PROJECT_NAME: ESP-IDF
-            GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
+        uses: espressif/release-zips-action@v1
+        with:
+          github_token: ${{ secrets.GITHUB_TOKEN }}
+          release_project_name: ESP-IDF
+          git_extra_args: --shallow-since="1 year ago"
@@ -100,6 +100,8 @@ dependencies.lock
 managed_components

 # pytest log
+pytest-embedded/
+# legacy one
 pytest_embedded_log/
 list_job_*.txt
 size_info.txt
@@ -3,8 +3,8 @@ workflow:
    # Disable those non-protected push triggered pipelines
    - if: '$CI_COMMIT_REF_NAME != "master" && $CI_COMMIT_BRANCH !~ /^release\/v/ && $CI_COMMIT_TAG !~ /^v\d+\.\d+(\.\d+)?($|-)/ && $CI_COMMIT_TAG !~ /^qa-test/ && $CI_PIPELINE_SOURCE == "push"'
      when: never
-    # when running merged result pipelines, it would create a temp commit id. use $CI_MERGE_REQUEST_SOURCE_BRANCH_SHA instead of $CI_COMMIT_SHA.
-    # Please use PIPELINE_COMMIT_SHA at all places that require a commit sha
+    # when running merged result pipelines, CI_COMMIT_SHA represents the temp commit it created.
+    # Please use PIPELINE_COMMIT_SHA at all places that require a commit sha of the original commit.
    - if: $CI_OPEN_MERGE_REQUESTS != null
      variables:
        PIPELINE_COMMIT_SHA: $CI_MERGE_REQUEST_SOURCE_BRANCH_SHA
@@ -2,228 +2,5 @@
 #
 #    https://docs.gitlab.com/ee/user/project/code_owners.html#the-syntax-of-code-owners-files
 #
-# If more than one rule matches a given file, the latest rule is used.
-# The file should be generally kept sorted, except when it is necessary
-# to use a different order due to the fact above. In that case, use
-# '# sort-order-reset' comment line to reset the sort order.
-#
-# Recipes for a few common cases:
-#
-# 1. Specific directory with all its contents:
-#
-#    /components/app_trace/
-#
-#    Note the trailing slash!
-#
-# 2. File with certain extension in any subdirectory of a certain directory:
-#
-#    /examples/**/*.py
-#
-#    This includes an *.py files in /examples/ directory as well.
-#
-# 3. Contents of a directory with a certain name, anywhere in the tree:
-#
-#    test_*_host/
-#
-#    Will match everything under components/efuse/test_efuse_host/,
-#    components/heap/test_multi_heap_host/, components/lwip/test_afl_host/, etc.
-#
-# 4. Same as above, except limited to a specific place in the tree:
-#
-#    /components/esp32*/
-#
-#    Matches everything under /components/esp32, /components/esp32s2, etc.
-#    Doesn't match /tools/some-test/components/esp32s5.
-#
-# 5. Specific file:
-#
-#    /tools/tools.json
-#
-# 6. File with a certain name anywhere in the tree
-#
-#    .gitignore
-#

-* @esp-idf-codeowners/other
-
-/.*                                   @esp-idf-codeowners/tools
-/.github/dangerjs/                    @esp-idf-codeowners/ci @esp-idf-codeowners/tools
-/.github/dependabot.yml               @esp-idf-codeowners/ci
-/.github/workflows/                   @esp-idf-codeowners/ci
-/.gitlab-ci.yml                       @esp-idf-codeowners/ci
-/.gitlab/ci/                          @esp-idf-codeowners/ci
-/.gitlab/dangerjs/                    @esp-idf-codeowners/ci @esp-idf-codeowners/tools
-/.pre-commit-config.yaml              @esp-idf-codeowners/ci
-/.readthedocs.yml                     @esp-idf-codeowners/docs
-/.vale.ini                            @esp-idf-codeowners/docs
-/CMakeLists.txt                       @esp-idf-codeowners/build-config
-/COMPATIBILITY*.md                    @esp-idf-codeowners/peripherals
-/CONTRIBUTING.md                      @esp-idf-codeowners/docs
-/Kconfig                              @esp-idf-codeowners/build-config
-/README*.md                           @esp-idf-codeowners/docs
-/SUPPORT_POLICY*.md                   @esp-idf-codeowners/docs
-/add_path.sh                          @esp-idf-codeowners/tools
-/conftest.py                          @esp-idf-codeowners/ci
-/export.*                             @esp-idf-codeowners/tools
-/install.*                            @esp-idf-codeowners/tools
-/pytest.ini                           @esp-idf-codeowners/ci
-/sdkconfig.rename                     @esp-idf-codeowners/build-config
-/sonar-project.properties             @esp-idf-codeowners/ci
-
-# sort-order-reset
-
-/components/app_trace/                @esp-idf-codeowners/debugging
-/components/app_update/               @esp-idf-codeowners/system @esp-idf-codeowners/app-utilities
-/components/bootloader*/              @esp-idf-codeowners/system @esp-idf-codeowners/security
-/components/bootloader_support/bootloader_flash/    @esp-idf-codeowners/peripherals
-/components/bt/                       @esp-idf-codeowners/bluetooth
-/components/cmock/                    @esp-idf-codeowners/system
-/components/console/                  @esp-idf-codeowners/system @esp-idf-codeowners/app-utilities/console
-/components/cxx/                      @esp-idf-codeowners/system
-/components/driver/                   @esp-idf-codeowners/peripherals
-/components/efuse/                    @esp-idf-codeowners/system
-/components/esp_adc/                  @esp-idf-codeowners/peripherals
-/components/esp_app_format/           @esp-idf-codeowners/system @esp-idf-codeowners/app-utilities
-/components/esp_bootloader_format/    @esp-idf-codeowners/system @esp-idf-codeowners/app-utilities
-/components/esp_coex/                 @esp-idf-codeowners/wifi @esp-idf-codeowners/bluetooth @esp-idf-codeowners/ieee802154
-/components/esp_common/               @esp-idf-codeowners/system
-/components/esp_eth/                  @esp-idf-codeowners/network
-/components/esp_event/                @esp-idf-codeowners/system
-/components/esp_gdbstub/              @esp-idf-codeowners/debugging
-/components/esp_hid/                  @esp-idf-codeowners/bluetooth
-/components/esp_http_client/          @esp-idf-codeowners/app-utilities
-/components/esp_http_server/          @esp-idf-codeowners/app-utilities
-/components/esp_https_ota/            @esp-idf-codeowners/app-utilities
-/components/esp_https_server/         @esp-idf-codeowners/app-utilities
-/components/esp_hw_support/           @esp-idf-codeowners/system @esp-idf-codeowners/peripherals
-/components/esp_lcd/                  @esp-idf-codeowners/peripherals
-/components/esp_local_ctrl/           @esp-idf-codeowners/app-utilities
-/components/esp_mm/                   @esp-idf-codeowners/peripherals
-/components/esp_netif/                @esp-idf-codeowners/network
-/components/esp_netif_stack/          @esp-idf-codeowners/network
-/components/esp_partition/            @esp-idf-codeowners/storage
-/components/esp_phy/                  @esp-idf-codeowners/bluetooth @esp-idf-codeowners/wifi @esp-idf-codeowners/ieee802154
-/components/esp_pm/                   @esp-idf-codeowners/power-management @esp-idf-codeowners/bluetooth @esp-idf-codeowners/wifi @esp-idf-codeowners/system
-/components/esp_psram/                @esp-idf-codeowners/peripherals @esp-idf-codeowners/system
-/components/esp_ringbuf/              @esp-idf-codeowners/system
-/components/esp_rom/                  @esp-idf-codeowners/system @esp-idf-codeowners/bluetooth @esp-idf-codeowners/wifi
-/components/esp_system/               @esp-idf-codeowners/system
-/components/esp_timer/                @esp-idf-codeowners/system
-/components/esp-tls/                  @esp-idf-codeowners/app-utilities
-/components/esp_wifi/                 @esp-idf-codeowners/wifi
-/components/espcoredump/              @esp-idf-codeowners/debugging
-/components/esptool_py/               @esp-idf-codeowners/tools
-/components/fatfs/                    @esp-idf-codeowners/storage
-/components/fatfs/**/*.py             @esp-idf-codeowners/tools
-/components/freertos/                 @esp-idf-codeowners/system
-/components/hal/                      @esp-idf-codeowners/peripherals
-/components/heap/                     @esp-idf-codeowners/system
-/components/http_parser/              @esp-idf-codeowners/app-utilities
-/components/idf_test/                 @esp-idf-codeowners/ci
-/components/ieee802154/               @esp-idf-codeowners/ieee802154
-/components/json/                     @esp-idf-codeowners/app-utilities
-/components/linux/                    @esp-idf-codeowners/system
-/components/log/                      @esp-idf-codeowners/system
-/components/lwip/                     @esp-idf-codeowners/lwip
-/components/mbedtls/                  @esp-idf-codeowners/app-utilities/mbedtls @esp-idf-codeowners/security
-/components/mqtt/                     @esp-idf-codeowners/network
-/components/newlib/                   @esp-idf-codeowners/system @esp-idf-codeowners/toolchain
-/components/nvs_flash/                @esp-idf-codeowners/storage
-/components/nvs_sec_provider/         @esp-idf-codeowners/storage @esp-idf-codeowners/security
-/components/openthread/               @esp-idf-codeowners/ieee802154
-/components/partition_table/          @esp-idf-codeowners/system
-/components/perfmon/                  @esp-idf-codeowners/debugging
-/components/protobuf-c/               @esp-idf-codeowners/app-utilities
-/components/protocomm/                @esp-idf-codeowners/app-utilities/provisioning
-/components/pthread/                  @esp-idf-codeowners/system
-/components/riscv/                    @esp-idf-codeowners/system
-/components/sdmmc/                    @esp-idf-codeowners/storage
-/components/soc/                      @esp-idf-codeowners/peripherals @esp-idf-codeowners/system
-/components/spi_flash/                @esp-idf-codeowners/peripherals
-/components/spiffs/                   @esp-idf-codeowners/storage
-/components/tcp_transport/            @esp-idf-codeowners/network
-/components/touch_element/            @esp-idf-codeowners/peripherals
-/components/ulp/                      @esp-idf-codeowners/system
-/components/unity/                    @esp-idf-codeowners/ci
-/components/usb/                      @esp-idf-codeowners/peripherals/usb
-/components/vfs/                      @esp-idf-codeowners/storage
-/components/wear_levelling/           @esp-idf-codeowners/storage
-/components/wifi_provisioning/        @esp-idf-codeowners/app-utilities/provisioning
-/components/wpa_supplicant/           @esp-idf-codeowners/wifi @esp-idf-codeowners/app-utilities/mbedtls
-/components/xtensa/                   @esp-idf-codeowners/system
-
-/docs/                                  @esp-idf-codeowners/docs
-/docs/en/api-guides/jtag-debugging/     @esp-idf-codeowners/debugging
-/docs/**/api-reference/bluetooth/       @esp-idf-codeowners/bluetooth
-/docs/**/api-reference/network/         @esp-idf-codeowners/network @esp-idf-codeowners/wifi
-/docs/**/api-reference/peripherals/     @esp-idf-codeowners/peripherals
-/docs/**/api-reference/peripherals/usb* @esp-idf-codeowners/peripherals @esp-idf-codeowners/peripherals/usb
-/docs/**/api-reference/protocols/       @esp-idf-codeowners/network @esp-idf-codeowners/app-utilities
-/docs/**/api-reference/provisioning/    @esp-idf-codeowners/app-utilities/provisioning
-/docs/**/api-reference/storage/         @esp-idf-codeowners/storage
-/docs/**/api-reference/system/          @esp-idf-codeowners/system
-/docs/**/security/                      @esp-idf-codeowners/security
-/docs/**/migration-guides/              @esp-idf-codeowners/docs @esp-idf-codeowners/all-maintainers
-
-/examples/README.md           @esp-idf-codeowners/docs @esp-idf-codeowners/ci
-/examples/**/*.py             @esp-idf-codeowners/ci @esp-idf-codeowners/tools
-/examples/bluetooth/          @esp-idf-codeowners/bluetooth
-/examples/build_system/       @esp-idf-codeowners/build-config
-/examples/common_components/  @esp-idf-codeowners/system @esp-idf-codeowners/wifi @esp-idf-codeowners/lwip @esp-idf-codeowners/network
-/examples/custom_bootloader/  @esp-idf-codeowners/system
-/examples/cxx/                @esp-idf-codeowners/system
-/examples/ethernet/           @esp-idf-codeowners/network
-/examples/get-started/        @esp-idf-codeowners/system
-/examples/mesh/               @esp-idf-codeowners/wifi
-/examples/network/            @esp-idf-codeowners/network @esp-idf-codeowners/wifi
-/examples/openthread/         @esp-idf-codeowners/ieee802154
-/examples/peripherals/        @esp-idf-codeowners/peripherals
-/examples/peripherals/usb/    @esp-idf-codeowners/peripherals @esp-idf-codeowners/peripherals/usb
-/examples/phy/                @esp-idf-codeowners/bluetooth @esp-idf-codeowners/wifi @esp-idf-codeowners/ieee802154
-/examples/protocols/          @esp-idf-codeowners/network @esp-idf-codeowners/app-utilities
-/examples/provisioning/       @esp-idf-codeowners/app-utilities/provisioning
-/examples/security/           @esp-idf-codeowners/security
-/examples/storage/            @esp-idf-codeowners/storage
-/examples/system/             @esp-idf-codeowners/system
-/examples/system/ota/         @esp-idf-codeowners/app-utilities
-/examples/wifi/               @esp-idf-codeowners/wifi
-/examples/zigbee/             @esp-idf-codeowners/ieee802154
-
-/tools/                       @esp-idf-codeowners/tools
-/tools/ble/                   @esp-idf-codeowners/app-utilities
-/tools/catch/                 @esp-idf-codeowners/ci
-/tools/ci/                    @esp-idf-codeowners/ci
-/tools/cmake/                 @esp-idf-codeowners/build-config
-/tools/cmake/toolchain-*.cmake      @esp-idf-codeowners/toolchain
-/tools/esp_app_trace/         @esp-idf-codeowners/debugging
-/tools/esp_prov/              @esp-idf-codeowners/app-utilities
-/tools/gdb_panic_server.py    @esp-idf-codeowners/debugging
-/tools/kconfig*/              @esp-idf-codeowners/build-config
-/tools/ldgen/                 @esp-idf-codeowners/build-config
-/tools/mass_mfg/              @esp-idf-codeowners/app-utilities
-/tools/mocks/                 @esp-idf-codeowners/system
-/tools/test_apps/README.md    @esp-idf-codeowners/docs @esp-idf-codeowners/ci
-
-## Note: owners here should be the same as the owners for the same example subdir, above
-/tools/test_apps/build_system/       @esp-idf-codeowners/build-config
-/tools/test_apps/linux_compatible/   @esp-idf-codeowners/system
-/tools/test_apps/protocols/          @esp-idf-codeowners/network @esp-idf-codeowners/app-utilities
-/tools/test_apps/security/           @esp-idf-codeowners/security
-/tools/test_apps/system/             @esp-idf-codeowners/system
-
-/tools/test_apps/**/*.py             @esp-idf-codeowners/ci @esp-idf-codeowners/tools
-
-/tools/test_build_system/     @esp-idf-codeowners/tools @esp-idf-codeowners/build-config
-
-/tools/tools.json             @esp-idf-codeowners/tools @esp-idf-codeowners/toolchain @esp-idf-codeowners/debugging
-
-/tools/unit-test-app/         @esp-idf-codeowners/system @esp-idf-codeowners/tools
-
-# sort-order-reset
-
-/components/**/test_apps/**/*.py     @esp-idf-codeowners/ci @esp-idf-codeowners/tools
-
-# ignore lists
-/tools/ci/check_copyright_config.yaml                   @esp-idf-codeowners/all-maintainers
-/tools/ci/check_copyright_ignore.txt                    @esp-idf-codeowners/all-maintainers
-/tools/ci/mypy_ignore_list.txt                          @esp-idf-codeowners/tools
+* @esp-idf-codeowners/all-maintainers
@@ -59,7 +59,7 @@
 - `example_test[_esp32/esp32s2/...]`
 - `fuzzer_test`
 - `host_test`
- `integration_test[_wifi/ble]`
+- `integration_test`
 - `iperf_stress_test`
 - `macos`
 - `macos_test`
@@ -1,7 +1,7 @@
 .build_template:
  stage: build
  extends:
-    - .after_script:build:ccache
+    - .after_script:build:ccache-show-stats
  image: $ESP_ENV_IMAGE
  tags:
    - build
@@ -16,13 +16,12 @@
  extends:
    - .build_template
    - .before_script:build
-    - .after_script:build:ccache
+    - .after_script:build:ccache-show-stats
  dependencies: # set dependencies to null to avoid missing artifacts issue
  needs:
    - job: fast_template_app
      artifacts: false
-    - job: mr_variables
-      optional: true  # only MR pipelines would have this
+    - pipeline_variables
  artifacts:
    paths:
      # The other artifacts patterns are defined under tools/ci/artifacts_handler.py
@@ -46,9 +45,10 @@
        examples/bluetooth/esp_ble_mesh/ble_mesh_console
        examples/bluetooth/hci/controller_hci_uart_esp32
        examples/wifi/iperf
-      --modified-components ${MR_MODIFIED_COMPONENTS}
-      --modified-files ${MR_MODIFIED_FILES}
-    - upload_artifacts_to_s3
+      --modified-components ${MODIFIED_COMPONENTS}
+      --modified-files ${MODIFIED_FILES}
+    # for detailed documents, please refer to .gitlab/ci/README.md#uploaddownload-artifacts-to-internal-minio-server
+    - python tools/ci/artifacts_handler.py upload

 .build_cmake_clang_template:
  extends:
@@ -64,10 +64,10 @@
      --copy-sdkconfig
      --parallel-count ${CI_NODE_TOTAL:-1}
      --parallel-index ${CI_NODE_INDEX:-1}
-      --modified-components ${MR_MODIFIED_COMPONENTS}
-      --modified-files ${MR_MODIFIED_FILES}
+      --modified-components ${MODIFIED_COMPONENTS}
+      --modified-files ${MODIFIED_FILES}
      $TEST_BUILD_OPTS_EXTRA
-    - upload_artifacts_to_s3
+    - python tools/ci/artifacts_handler.py upload

 .build_pytest_template:
  extends:
@@ -81,9 +81,9 @@
      --parallel-count ${CI_NODE_TOTAL:-1}
      --parallel-index ${CI_NODE_INDEX:-1}
      --collect-app-info "list_job_${CI_JOB_NAME_SLUG}.txt"
-      --modified-components ${MR_MODIFIED_COMPONENTS}
-      --modified-files ${MR_MODIFIED_FILES}
-    - upload_artifacts_to_s3
+      --modified-components ${MODIFIED_COMPONENTS}
+      --modified-files ${MODIFIED_FILES}
+    - python tools/ci/artifacts_handler.py upload

 .build_pytest_no_jtag_template:
  extends:
@@ -97,9 +97,9 @@
      --parallel-count ${CI_NODE_TOTAL:-1}
      --parallel-index ${CI_NODE_INDEX:-1}
      --collect-app-info "list_job_${CI_JOB_NAME_SLUG}.txt"
-      --modified-components ${MR_MODIFIED_COMPONENTS}
-      --modified-files ${MR_MODIFIED_FILES}
-    - upload_artifacts_to_s3
+      --modified-components ${MODIFIED_COMPONENTS}
+      --modified-files ${MODIFIED_FILES}
+    - python tools/ci/artifacts_handler.py upload

 .build_pytest_jtag_template:
  extends:
@@ -113,9 +113,9 @@
      --parallel-count ${CI_NODE_TOTAL:-1}
      --parallel-index ${CI_NODE_INDEX:-1}
      --collect-app-info "list_job_${CI_JOB_NAME_SLUG}.txt"
-      --modified-components ${MR_MODIFIED_COMPONENTS}
-      --modified-files ${MR_MODIFIED_FILES}
-    - upload_artifacts_to_s3
+      --modified-components ${MODIFIED_COMPONENTS}
+      --modified-files ${MODIFIED_FILES}
+    - python tools/ci/artifacts_handler.py upload

 build_pytest_examples_esp32:
  extends:
@@ -263,9 +263,9 @@ build_only_components_apps:
      -t all
      --parallel-count ${CI_NODE_TOTAL:-1}
      --parallel-index ${CI_NODE_INDEX:-1}
-      --modified-components ${MR_MODIFIED_COMPONENTS}
-      --modified-files ${MR_MODIFIED_FILES}
-    - upload_artifacts_to_s3
+      --modified-components ${MODIFIED_COMPONENTS}
+      --modified-files ${MODIFIED_FILES}
+    - python tools/ci/artifacts_handler.py upload

 build_pytest_test_apps_esp32:
  extends:
@@ -335,9 +335,9 @@ build_only_tools_test_apps:
      -t all
      --parallel-count ${CI_NODE_TOTAL:-1}
      --parallel-index ${CI_NODE_INDEX:-1}
-      --modified-components ${MR_MODIFIED_COMPONENTS}
-      --modified-files ${MR_MODIFIED_FILES}
-    - upload_artifacts_to_s3
+      --modified-components ${MODIFIED_COMPONENTS}
+      --modified-files ${MODIFIED_FILES}
+    - python tools/ci/artifacts_handler.py upload

 .build_template_app_template:
  extends:
@@ -516,8 +516,14 @@ build_clang_test_apps_esp32c6:
  script:
    - ${IDF_PATH}/tools/ci/test_configure_ci_environment.sh
    - cd ${IDF_PATH}/tools/test_build_system
-    - pytest --parallel-count ${CI_NODE_TOTAL:-1} --parallel-index ${CI_NODE_INDEX:-1}
-      --work-dir ${CI_PROJECT_DIR}/test_build_system --junitxml=${CI_PROJECT_DIR}/XUNIT_RESULT.xml
+    - python ${IDF_PATH}/tools/ci/get_known_failure_cases_file.py
+    - pytest
+      --cleanup-idf-copy
+      --parallel-count ${CI_NODE_TOTAL:-1}
+      --parallel-index ${CI_NODE_INDEX:-1}
+      --work-dir ${CI_PROJECT_DIR}/test_build_system
+      --junitxml ${CI_PROJECT_DIR}/XUNIT_RESULT.xml
+      --ignore-result-files ${KNOWN_FAILURE_CASES_FILE_NAME}

 pytest_build_system:
  extends: .test_build_system_template
@@ -535,6 +541,7 @@ pytest_build_system_macos:
  extends:
    - .test_build_system_template
    - .before_script:build:macos
+    - .after_script:build:macos:upload-failed-job-logs:ccache-show-stats
    - .rules:build:macos
  tags:
    - macos_shell
@@ -547,6 +554,10 @@ pytest_build_system_macos:
    expire_in: 2 days
    reports:
      junit: XUNIT_RESULT.xml
+  variables:
+    PYENV_VERSION: "3.8"
+    # CCACHE_DIR: "/cache/idf_ccache". On macOS, you cannot write to this folder due to insufficient permissions.
+    CCACHE_DIR: "" # ccache will use "$HOME/Library/Caches/ccache".

 build_docker:
  extends:
@@ -555,17 +566,11 @@ build_docker:
  stage: host_test
  needs: []
  image: espressif/docker-builder:1
-  tags:
-    - build_docker_amd64_brno
+  tags: [shiny, dind]
  variables:
    DOCKER_TMP_IMAGE_NAME: "idf_tmp_image"
  script:
-    - export LOCAL_CI_REPOSITORY_URL=$CI_REPOSITORY_URL
-    - if [ -n "$LOCAL_GITLAB_HTTPS_HOST" ]; then export LOCAL_CI_REPOSITORY_URL="https://gitlab-ci-token:${CI_JOB_TOKEN}@${LOCAL_GITLAB_HTTPS_HOST}/${CI_PROJECT_PATH}"; fi
-    - if [ -n "$LOCAL_GIT_MIRROR" ]; then export LOCAL_CI_REPOSITORY_URL="${LOCAL_GIT_MIRROR}/${CI_PROJECT_PATH}"; fi
-    - echo "Using repository at $LOCAL_CI_REPOSITORY_URL"
-    - export DOCKER_BUILD_ARGS="--build-arg IDF_CLONE_URL=${LOCAL_CI_REPOSITORY_URL} --build-arg IDF_CLONE_BRANCH_OR_TAG=${CI_COMMIT_REF_NAME} --build-arg IDF_CHECKOUT_REF=${CI_COMMIT_TAG:-$PIPELINE_COMMIT_SHA}"
-    # Build
+    - export DOCKER_BUILD_ARGS="--build-arg IDF_CLONE_URL=${CI_REPOSITORY_URL} --build-arg IDF_CLONE_BRANCH_OR_TAG=${CI_COMMIT_REF_NAME} --build-arg IDF_CHECKOUT_REF=${CI_COMMIT_TAG:-$CI_COMMIT_SHA} --build-arg IDF_CLONE_SHALLOW=1 --build-arg IDF_GITHUB_ASSETS=${INTERNAL_GITHUB_ASSETS}"
    - docker build --tag ${DOCKER_TMP_IMAGE_NAME} ${DOCKER_BUILD_ARGS} tools/docker/
    # We can't mount $PWD/examples/get-started/blink into the container, see https://gitlab.com/gitlab-org/gitlab-ce/issues/41227.
    # The workaround mentioned there works, but leaves around directories which need to be cleaned up manually.
@@ -14,22 +14,33 @@ stages:
  - post_deploy

 variables:
-# System environment
+  # System environment

  # Common parameters for the 'make' during CI tests
  MAKEFLAGS: "-j5 --no-keep-going"

-# GitLab-CI environment
-
-  # XXX_ATTEMPTS variables (https://docs.gitlab.com/ee/ci/runners/configure_runners.html#job-stages-attempts) are not defined here.
-  # Use values from  "CI / CD Settings" - "Variables".
-
-  # GIT_STRATEGY is not defined here.
-  # Use an option from  "CI / CD Settings" - "General pipelines".
-
+  # GitLab-CI environment
+  # Thanks to pack-objects cache, clone strategy should behave faster than fetch
+  #   so we pick "clone" as default git strategy
+  # Shiny runners by default remove the CI_PROJECT_DIR every time at the beginning of one job
+  #   and clone with a --depth=1
+  # Brew runners will fetch from locally mirror first, and cache the local CI_PROJECT_DIR
+  # In conclusion
+  # - set GIT_STRATEGY: "clone" to shiny runners
+  # - set GIT_STRATEGY: "fetch" to brew runners
+  GIT_STRATEGY: clone
  # we will download archive for each submodule instead of clone.
  # we don't do "recursive" when fetch submodule as they're not used in CI now.
  GIT_SUBMODULE_STRATEGY: none
+  # since we're using merged-result pipelines, the last commit should work for most cases
+  GIT_DEPTH: 1
+  # --no-recurse-submodules: we use cache for submodules
+  # --prune --prune-tags: in case remote branch or tag is force pushed
+  GIT_FETCH_EXTRA_FLAGS: "--no-recurse-submodules --prune --prune-tags"
+  # we're using .cache folder for caches
+  GIT_CLEAN_FLAGS: -ffdx -e .cache/
+  LATEST_GIT_TAG: v5.2.6
+
  SUBMODULE_FETCH_TOOL: "tools/ci/ci_fetch_submodule.py"
  # by default we will fetch all submodules
  # jobs can overwrite this variable to only fetch submodules they required
@@ -39,20 +50,17 @@ variables:
  IDF_SKIP_CHECK_SUBMODULES: 1

  IDF_PATH: "$CI_PROJECT_DIR"
-  BATCH_BUILD: "1"
  V: "0"
  CHECKOUT_REF_SCRIPT: "$CI_PROJECT_DIR/tools/ci/checkout_project_ref.py"
-  PYTHON_VER: 3.8.17

  # Docker images
-  ESP_ENV_IMAGE: "$CI_DOCKER_REGISTRY/esp-env-v5.2:2"
-  ESP_IDF_DOC_ENV_IMAGE: "$CI_DOCKER_REGISTRY/esp-idf-doc-env-v5.2:2-1"
+  ESP_ENV_IMAGE: "${CI_DOCKER_REGISTRY}/esp-env-v5.2:2"
+  ESP_IDF_DOC_ENV_IMAGE: "${CI_DOCKER_REGISTRY}/esp-idf-doc-env-v5.2:2-1"
  QEMU_IMAGE: "${CI_DOCKER_REGISTRY}/qemu-v5.2:2-20230522"
-  TARGET_TEST_ENV_IMAGE: "$CI_DOCKER_REGISTRY/target-test-env-v5.2:2"
+  TARGET_TEST_ENV_IMAGE: "${CI_DOCKER_REGISTRY}/target-test-env-v5.2:2"

  SONARQUBE_SCANNER_IMAGE: "${CI_DOCKER_REGISTRY}/sonarqube-scanner:5"
-
-  PRE_COMMIT_IMAGE: "$CI_DOCKER_REGISTRY/esp-idf-pre-commit:1"
+  PRE_COMMIT_IMAGE: "${CI_DOCKER_REGISTRY}/esp-idf-pre-commit:1"

  # target test repo parameters
  TEST_ENV_CONFIG_REPO: "https://gitlab-ci-token:${BOT_TOKEN}@${CI_SERVER_HOST}:${CI_SERVER_PORT}/qa/ci-test-runner-configs.git"
@@ -77,6 +85,9 @@ variables:
  # This is used only if CI_PYTHON_TOOL_REPO is not empty.
  CI_PYTHON_TOOL_BRANCH: ""

+  # Set this variable to specify the file name for the known failure cases.
+  KNOWN_FAILURE_CASES_FILE_NAME: "5.2.txt"
+
  IDF_CI_BUILD: 1

 ################################################
@@ -92,6 +103,7 @@ variables:

  if echo "$CI_MERGE_REQUEST_LABELS" | egrep "(^|,)include_nightly_run(,|$)"; then
    export INCLUDE_NIGHTLY_RUN="1"
+    export NIGHTLY_RUN="1"
  fi

  # configure cmake related flags
@@ -137,6 +149,10 @@ variables:
    $IDF_PATH/tools/idf_tools.py --non-interactive install esp-clang
  fi

+  # Since the version 3.21 CMake passes source files and include dirs to ninja using absolute paths.
+  # Needed for pytest junit reports.
+  $IDF_PATH/tools/idf_tools.py --non-interactive install cmake
+
  source ./export.sh

  # Custom clang
@@ -149,13 +165,21 @@ variables:
  fi

  # Custom OpenOCD
-  if [[ ! -z "$OOCD_DISTRO_URL" && "$CI_JOB_STAGE" == "target_test" ]]; then
-    echo "Using custom OpenOCD from ${OOCD_DISTRO_URL}"
-    wget $OOCD_DISTRO_URL
-    ARCH_NAME=$(basename $OOCD_DISTRO_URL)
-    tar -x -f $ARCH_NAME
-    export OPENOCD_SCRIPTS=$PWD/openocd-esp32/share/openocd/scripts
-    export PATH=$PWD/openocd-esp32/bin:$PATH
+  if [[ "$CI_JOB_STAGE" == "target_test" ]]; then
+    machine="$(uname -m)"
+    if [[ "$machine" == "armv7l" ]] ; then
+      OOCD_DISTRO_URL="$OOCD_DISTRO_URL_ARMHF"
+    elif [[ "$machine" == "aarch64" ]] ; then
+      OOCD_DISTRO_URL="$OOCD_DISTRO_URL_ARM64"
+    fi
+    if [[ ! -z "$OOCD_DISTRO_URL" ]]; then
+      echo "Using custom OpenOCD from ${OOCD_DISTRO_URL}"
+      wget $OOCD_DISTRO_URL
+      ARCH_NAME=$(basename $OOCD_DISTRO_URL)
+      tar -x -f $ARCH_NAME
+      export OPENOCD_SCRIPTS=$PWD/openocd-esp32/share/openocd/scripts
+      export PATH=$PWD/openocd-esp32/bin:$PATH
+    fi
  fi

  if [[ -n "$CI_PYTHON_TOOL_REPO" ]]; then
@@ -168,12 +192,21 @@ variables:
  # Show ccache statistics if enabled globally
  test "$CI_CCACHE_STATS" == 1 && test -n "$(which ccache)" && ccache --show-stats || true

+.upload_failed_job_log_artifacts: &upload_failed_job_log_artifacts |
+  if [ $CI_JOB_STATUS = "failed" ]; then
+    python tools/ci/artifacts_handler.py upload --type logs
+  fi
+
 .before_script:minimal:
  before_script:
    - *common-before_scripts

 .before_script:build:macos:
  before_script:
+    # macos is running shell executor, which means it would use
+    # the system installed /usr/local/bin/python3 by default.
+    # Ensure pyenv and PYENV_VERSION installed
+    - eval "$(pyenv init -)"
    - *common-before_scripts
    # On macOS, these tools need to be installed
    - export IDF_TOOLS_PATH="${HOME}/.espressif_runner_${CI_RUNNER_ID}_${CI_CONCURRENT_ID}"
@@ -182,6 +215,15 @@ variables:
    - *setup_tools_and_idf_python_venv
    - fetch_submodules

+.after_script:build:macos:upload-failed-job-logs:ccache-show-stats:
+  after_script:
+    # macos is running shell executor, which means it would use
+    # the system installed /usr/local/bin/python3 by default.
+    # Ensure pyenv and PYENV_VERSION installed
+    - eval "$(pyenv init -)"
+    - *upload_failed_job_log_artifacts
+    - *show_ccache_statistics
+
 .before_script:build:
  before_script:
    - *common-before_scripts
@@ -191,9 +233,104 @@ variables:
    - export EXTRA_CFLAGS=${PEDANTIC_CFLAGS}
    - export EXTRA_CXXFLAGS=${PEDANTIC_CXXFLAGS}

-.after_script:build:ccache:
+.after_script:build:ccache-show-stats:
  after_script:
    - *show_ccache_statistics
+    - *upload_failed_job_log_artifacts
+
+##############################
+# Git Strategy Job Templates #
+##############################
+.git_init: &git_init |
+  mkdir -p "${CI_PROJECT_DIR}"
+  cd "${CI_PROJECT_DIR}"
+  git init
+
+.git_fetch_from_mirror_url_if_exists: &git_fetch_from_mirror_url_if_exists |
+  # check if set mirror
+  if [ -n "${LOCAL_GITLAB_HTTPS_HOST:-}" ] && [ -n "${ESPCI_TOKEN:-}" ]; then
+    MIRROR_REPO_URL="https://bot:${ESPCI_TOKEN}@${LOCAL_GITLAB_HTTPS_HOST}/${CI_PROJECT_PATH}"
+  elif [ -n "${LOCAL_GIT_MIRROR:-}" ]; then
+    MIRROR_REPO_URL="${LOCAL_GIT_MIRROR}/${CI_PROJECT_PATH}"
+  fi
+
+  # fetch from mirror first if set
+  if [ -n "${MIRROR_REPO_URL:-}" ]; then
+    if git remote -v | grep origin; then
+      git remote set-url origin "${MIRROR_REPO_URL}"
+    else
+      git remote add origin "${MIRROR_REPO_URL}"
+    fi
+    # mirror url may fail with authentication issue
+    git fetch origin --no-recurse-submodules || true
+  fi
+
+  # set remote url to CI_REPOSITORY_URL
+  if git remote -v | grep origin; then
+    git remote set-url origin "${CI_REPOSITORY_URL}"
+  else
+    git remote add origin "${CI_REPOSITORY_URL}"
+  fi
+
+.git_checkout_fetch_head: &git_checkout_fetch_head |
+  git checkout FETCH_HEAD
+  git clean ${GIT_CLEAN_FLAGS}
+
+# git diff requires two commits, with different CI env var
+#
+# By default, we use git strategy "clone" with depth 1 to speed up the clone process.
+# But for jobs requires running `git diff`, we need to fetch more commits to get the correct diffs.
+#
+# Since there's no way to get the correct git_depth before the job starts,
+# we can't set `GIT_DEPTH` in the job definition.
+#
+# Set git strategy to "none" and fetch manually instead.
+.before_script:fetch:git_diff:
+  variables:
+    GIT_STRATEGY: none
+  before_script:
+    - *git_init
+    - *git_fetch_from_mirror_url_if_exists
+    - |
+      # merged results pipelines, by default
+      if [[ -n $CI_MERGE_REQUEST_SOURCE_BRANCH_SHA ]]; then
+        git fetch origin $CI_MERGE_REQUEST_DIFF_BASE_SHA --depth=1 ${GIT_FETCH_EXTRA_FLAGS}
+        git fetch origin $CI_MERGE_REQUEST_SOURCE_BRANCH_SHA --depth=1 ${GIT_FETCH_EXTRA_FLAGS}
+        export GIT_DIFF_OUTPUT=$(git diff --name-only $CI_MERGE_REQUEST_DIFF_BASE_SHA $CI_MERGE_REQUEST_SOURCE_BRANCH_SHA)
+      # merge request pipelines, when the mr got conflicts
+      elif [[ -n $CI_MERGE_REQUEST_DIFF_BASE_SHA ]]; then
+        git fetch origin $CI_MERGE_REQUEST_DIFF_BASE_SHA --depth=1 ${GIT_FETCH_EXTRA_FLAGS}
+        git fetch origin $CI_COMMIT_SHA --depth=1 ${GIT_FETCH_EXTRA_FLAGS}
+        export GIT_DIFF_OUTPUT=$(git diff --name-only $CI_MERGE_REQUEST_DIFF_BASE_SHA $CI_COMMIT_SHA)
+      # other pipelines, like the protected branches pipelines
+      elif [[ "$CI_COMMIT_BEFORE_SHA" != "0000000000000000000000000000000000000000" ]]; then
+        git fetch origin $CI_COMMIT_BEFORE_SHA --depth=1 ${GIT_FETCH_EXTRA_FLAGS}
+        git fetch origin $CI_COMMIT_SHA --depth=1 ${GIT_FETCH_EXTRA_FLAGS}
+        export GIT_DIFF_OUTPUT=$(git diff --name-only $CI_COMMIT_BEFORE_SHA $CI_COMMIT_SHA)
+      else
+        # pipeline source could be web, scheduler, etc.
+        git fetch origin $CI_COMMIT_SHA --depth=2 ${GIT_FETCH_EXTRA_FLAGS}
+        export GIT_DIFF_OUTPUT=$(git diff --name-only $CI_COMMIT_SHA~1 $CI_COMMIT_SHA)
+      fi
+    - *git_checkout_fetch_head
+    - *common-before_scripts
+    - *setup_tools_and_idf_python_venv
+    - add_gitlab_ssh_keys
+
+# target test runners may locate in different places
+# for runners set git mirror, we fetch from the mirror first, then fetch the HEAD commit
+.before_script:fetch:target_test:
+  variables:
+    GIT_STRATEGY: none
+  before_script:
+    - *git_init
+    - *git_fetch_from_mirror_url_if_exists
+    - git fetch origin "${CI_COMMIT_SHA}" --depth=1 ${GIT_FETCH_EXTRA_FLAGS}
+    - *git_checkout_fetch_head
+    - *common-before_scripts
+    - *setup_tools_and_idf_python_venv
+    - add_gitlab_ssh_keys
+    # no submodules

 #############
 # `default` #
@@ -83,16 +83,6 @@
    - "build:{0}"
    - build:target_test

-build:integration_test:
-  labels:
-    - build
-  patterns:
-    - build_components
-    - build_system
-  included_in:
-    - build:target_test
-
-
 ####################
 # Target Test Jobs #
 ####################
@@ -173,23 +163,6 @@ build:integration_test:
    - "build:example_test"
    - build:target_test

-"test:integration_test_{0}":
-  matrix:
-    - - wifi
-      - ble
-  labels:
-    - integration_test_{0}
-    - integration_test
-    - target_test
-  patterns:
-    - integration_test-{0}
-    - target_test-{0}
-    # - maybe others
-  included_in:
-    - test:integration_test
-    - build:integration_test
-    - build:target_test
-
 "test:host_test":
  labels:
    - host_test
@@ -1,8 +1,7 @@
 .deploy_job_template:
  stage: deploy
  image: $ESP_ENV_IMAGE
-  tags:
-    - deploy
+  tags: [ deploy ]

 # Check this before push_to_github
 check_submodule_sync:
@@ -10,16 +9,17 @@ check_submodule_sync:
    - .deploy_job_template
    - .rules:test:submodule
  stage: test_deploy
-  tags:
-    - github_sync
+  tags: [ brew, github_sync ]
  retry: 2
  variables:
-    GIT_STRATEGY: clone
+    # for brew runners, we always set GIT_STRATEGY to fetch
+    GIT_STRATEGY: fetch
    SUBMODULES_TO_FETCH: "none"
    PUBLIC_IDF_URL: "https://github.com/espressif/esp-idf.git"
  dependencies: []
  script:
    - git submodule deinit --force .
+    - rm -rf .git/modules  # remove all the cached metadata
    # setting the default remote URL to the public one, to resolve relative location URLs
    - git config remote.origin.url ${PUBLIC_IDF_URL}
    # check if all submodules are correctly synced to public repository
@@ -35,6 +35,12 @@ push_to_github:
    - .rules:push_to_github
  needs:
    - check_submodule_sync
+  tags: [ brew, github_sync ]
+  variables:
+    # for brew runners, we always set GIT_STRATEGY to fetch
+    GIT_STRATEGY: fetch
+    # github also need full record of commits
+    GIT_DEPTH: 0
  script:
    - add_github_ssh_keys
    - git remote remove github &>/dev/null || true
@@ -47,6 +53,9 @@ deploy_update_SHA_in_esp-dockerfiles:
    - .before_script:minimal
    - .rules:protected-no_label-always
  dependencies: []
+  variables:
+    GIT_DEPTH: 2
+  tags: [ shiny, build ]
  script:
    - 'curl --header "PRIVATE-TOKEN: ${ESPCI_SCRIPTS_TOKEN}" -o create_MR_in_esp_dockerfile.sh $GITLAB_HTTP_SERVER/api/v4/projects/1260/repository/files/create_MR_in_esp_dockerfile%2Fcreate_MR_in_esp_dockerfile.sh/raw\?ref\=master'
    - chmod +x create_MR_in_esp_dockerfile.sh
@@ -88,6 +88,7 @@ check_docs_lang_sync:
      artifacts: false
      optional: true
  script:
+    - if [ -n "${BREATHE_ALT_INSTALL_URL}" ]; then pip uninstall -y breathe && pip install -U ${BREATHE_ALT_INSTALL_URL}; fi
    - cd docs
    - build-docs -t $DOCTGT -bs $DOC_BUILDERS -l $DOCLANG build
  parallel:
@@ -147,6 +148,7 @@ build_docs_pdf:
    paths:
      - docs/_build/*/*/latex/*
    expire_in: 4 days
+  allow_failure: true # TODO IDFCI-2216
  variables:
    DOC_BUILDERS: "latex"

@@ -155,11 +157,16 @@ build_docs_pdf:
  variables:
    DOCS_BUILD_DIR: "${IDF_PATH}/docs/_build/"
    PYTHONUNBUFFERED: 1
+    # ensure all tags are fetched, need to know the latest/stable tag for the docs
+    GIT_STRATEGY: clone
+    GIT_DEPTH: 0
  stage: test_deploy
  tags:
    - deploy
    - shiny
  script:
+    # ensure all tags are fetched, need to know the latest/stable tag for the docs
+    - git fetch --tags --prune
    - add_doc_server_ssh_keys $DOCS_DEPLOY_PRIVATEKEY $DOCS_DEPLOY_SERVER $DOCS_DEPLOY_SERVER_USER
    - export GIT_VER=$(git describe --always ${PIPELINE_COMMIT_SHA} --)
    - deploy-docs
@@ -13,8 +13,7 @@
    - job: upload-submodules-cache
      optional: true
      artifacts: false
-    - job: mr_variables
-      optional: true  # only MR pipelines would have this
+    - pipeline_variables

 test_nvs_on_host:
  extends: .host_test_template
@@ -126,7 +125,9 @@ test_idf_tools:
    entrypoint: [""]  # use system python3. no extra pip package installed
  script:
    # Tools must be downloaded for testing
-    - python3 ${IDF_PATH}/tools/idf_tools.py download required qemu-riscv32 qemu-xtensa
+    # We could use "idf_tools.py download all", but we don't want to install clang because of its huge size
+    #                                                                      cmake@version that is supported
+    - python3 ${IDF_PATH}/tools/idf_tools.py download required qemu-riscv32 qemu-xtensa cmake cmake@3.16.3
    - cd ${IDF_PATH}/tools/test_idf_tools
    - python3 -m pip install jsonschema
    - python3 ./test_idf_tools.py -v
@@ -208,14 +209,6 @@ test_mkdfu:
    - cd ${IDF_PATH}/tools/test_mkdfu
    - ./test_mkdfu.py

-test_sbom:
-  extends:
-    - .host_test_template
-    - .rules:patterns:sbom
-  script:
-    - cd ${IDF_PATH}/tools/test_sbom
-    - pytest
-
 test_autocomplete:
  extends:
    - .host_test_template
@@ -300,7 +293,7 @@ test_pytest_qemu:
    when: always
    paths:
      - XUNIT_RESULT.xml
-      - pytest_embedded_log/
+      - pytest-embedded/
    reports:
      junit: XUNIT_RESULT.xml
    expire_in: 1 week
@@ -314,15 +307,15 @@ test_pytest_qemu:
      --pytest-apps
      -m qemu
      --collect-app-info "list_job_${CI_JOB_NAME_SLUG}.txt"
-      --modified-components ${MR_MODIFIED_COMPONENTS}
-      --modified-files ${MR_MODIFIED_FILES}
-    - retry_failed git clone $KNOWN_FAILURE_CASES_REPO known_failure_cases
+      --modified-components ${MODIFIED_COMPONENTS}
+      --modified-files ${MODIFIED_FILES}
+    - python tools/ci/get_known_failure_cases_file.py
    - run_cmd pytest
      --target $IDF_TARGET
      -m qemu
      --embedded-services idf,qemu
      --junitxml=XUNIT_RESULT.xml
-      --ignore-result-files known_failure_cases/known_failure_cases.txt
+      --ignore-result-files ${KNOWN_FAILURE_CASES_FILE_NAME}
      --app-info-filepattern \"list_job_*.txt\"

 test_pytest_linux:
@@ -333,7 +326,8 @@ test_pytest_linux:
    when: always
    paths:
      - XUNIT_RESULT.xml
-      - pytest_embedded_log/
+      - pytest-embedded/
+      - "**/build*/build_log.txt"
    reports:
      junit: XUNIT_RESULT.xml
    expire_in: 1 week
@@ -343,12 +337,12 @@ test_pytest_linux:
      --pytest-apps
      -m host_test
      --collect-app-info "list_job_${CI_JOB_NAME_SLUG}.txt"
-      --modified-components ${MR_MODIFIED_COMPONENTS}
-      --modified-files ${MR_MODIFIED_FILES}
-    - retry_failed git clone $KNOWN_FAILURE_CASES_REPO known_failure_cases
+      --modified-components ${MODIFIED_COMPONENTS}
+      --modified-files ${MODIFIED_FILES}
+    - python tools/ci/get_known_failure_cases_file.py
    - run_cmd pytest
      --target linux
      -m host_test
      --junitxml=XUNIT_RESULT.xml
-      --ignore-result-files known_failure_cases/known_failure_cases.txt
+      --ignore-result-files ${KNOWN_FAILURE_CASES_FILE_NAME}
      --app-info-filepattern \"list_job_*.txt\"
@@ -8,7 +8,7 @@
  - "tools/**/*"
  - ".gitlab-ci.yml"
  - ".gitlab/ci/common.yml"
-  - ".gitlab/ci/integration-test.yml"
+  - ".gitlab/ci/integration_test.yml"
  - ".gitmodules"
  - "CMakeLists.txt"
  - "install.sh"
@@ -22,6 +22,10 @@
    - if: '$CI_PIPELINE_SOURCE != "merge_request_event"'
    - if: '$CI_PIPELINE_SOURCE == "merge_request_event"'
      changes: *patterns-integration_test
+    # support trigger by ci labels
+    - if: '$CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*target_test(?:,[^,\n\r]+)*$/i'
+    - if: '$CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*integration_test(?:,[^,\n\r]+)*$/i'
+    - if: '$CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*build(?:,[^,\n\r]+)*$/i'

 gen_integration_pipeline:
  extends:
@@ -5,27 +5,17 @@
    - host_test
  dependencies: []

-.check_pre_commit_template:
+check_pre_commit:
  extends:
    - .pre_check_template
    - .before_script:minimal
  image: $PRE_COMMIT_IMAGE
-
-check_pre_commit_master_release:
-  extends:
-    - .check_pre_commit_template
-    - .rules:protected
+  needs:
+    - pipeline_variables
  script:
    - fetch_submodules
-    - git diff-tree --no-commit-id --name-only -r $PIPELINE_COMMIT_SHA | xargs pre-commit run --files
-
-check_pre_commit_MR:
-  extends:
-    - .check_pre_commit_template
-    - .rules:mr
-  script:
-    - fetch_submodules
-    - python ${CI_PROJECT_DIR}/tools/ci/ci_get_mr_info.py files ${CI_MERGE_REQUEST_SOURCE_BRANCH_NAME} | xargs pre-commit run --files
+    - pre-commit run --files $MODIFIED_FILES
+    - pre-commit run --hook-stage post-commit validate-sbom-manifest

 check_MR_style_dangerjs:
  extends:
@@ -60,6 +50,13 @@ check_version:
  extends:
    - .pre_check_template
    - .rules:protected
+  tags: [ brew, github_sync ]
+  variables:
+    # need a full clone to get the latest tag
+    # the --shallow-since=$(git log -1 --format=%as $LATEST_GIT_TAG) option is not accurate
+    GIT_STRATEGY: fetch
+    SUBMODULES_TO_FETCH: "none"
+    GIT_DEPTH: 0
  script:
    - export IDF_PATH=$PWD
    - tools/ci/check_idf_version.sh
@@ -148,10 +145,18 @@ check_esp_system:

 # For release tag pipelines only, make sure the tag was created with 'git tag -a' so it will update
 # the version returned by 'git describe'
+# Don't forget to update the env var `LATEST_GIT_TAG` in .gitlab/ci/common.yml
 check_version_tag:
  extends:
    - .pre_check_template
    - .rules:tag:release
+  tags: [ brew, github_sync ]
+  variables:
+    # need a full clone to get the latest tag
+    # the --shallow-since=$(git log -1 --format=%as $LATEST_GIT_TAG) option is not accurate
+    GIT_STRATEGY: fetch
+    SUBMODULES_TO_FETCH: "none"
+    GIT_DEPTH: 0
  script:
    - (git cat-file -t $CI_COMMIT_REF_NAME | grep tag) || (echo "ESP-IDF versions must be annotated tags." && exit 1)

@@ -179,22 +184,25 @@ check_configure_ci_environment_parsing:
    - cd tools/ci
    - python -m unittest ci_build_apps.py

-mr_variables:
+pipeline_variables:
  extends:
    - .pre_check_template
-    - .rules:mr
-    - .before_script:minimal
+    - .before_script:fetch:git_diff
  tags:
    - build
  script:
-    - echo "MR_MODIFIED_FILES=$(python tools/ci/ci_get_mr_info.py files ${CI_MERGE_REQUEST_SOURCE_BRANCH_NAME} | xargs)" >> mr.env
-    - echo "MR_MODIFIED_COMPONENTS=$(python tools/ci/ci_get_mr_info.py components ${CI_MERGE_REQUEST_SOURCE_BRANCH_NAME} | xargs)" >> mr.env
-    - >
+    - MODIFIED_FILES=$(echo "$GIT_DIFF_OUTPUT" | xargs)
+    - echo "MODIFIED_FILES=$MODIFIED_FILES" >> pipeline.env
+    - echo "MODIFIED_COMPONENTS=$(run_cmd python tools/ci/ci_get_mr_info.py components --modified-files $MODIFIED_FILES | xargs)" >> pipeline.env
+    - |
      if echo "$CI_MERGE_REQUEST_LABELS" | egrep "(^|,)BUILD_AND_TEST_ALL_APPS(,|$)"; then
-        echo "BUILD_AND_TEST_ALL_APPS=1" >> mr.env
+        echo "BUILD_AND_TEST_ALL_APPS=1" >> pipeline.env
      fi
-    - cat mr.env
+    - echo "OOCD_DISTRO_URL_ARMHF=$OOCD_DISTRO_URL_ARMHF" >> pipeline.env
+    - echo "OOCD_DISTRO_URL_ARM64=$OOCD_DISTRO_URL_ARM64" >> pipeline.env
+    - cat pipeline.env
+    - python tools/ci/artifacts_handler.py upload --type modified_files_and_components_report
  artifacts:
    reports:
-      dotenv: mr.env
+      dotenv: pipeline.env
    expire_in: 4 days
@@ -67,9 +67,6 @@
  - "tools/ci/ci_build_apps.py"
  - "tools/test_build_system/**/*"

-.patterns-sbom: &patterns-sbom
-  - "tools/test_sbom/*"
-
 .patterns-custom_test: &patterns-custom_test
  - "tools/ci/idf_pytest/**/*"
  - "tools/ci/python_packages/gitlab_api.py"
@@ -112,22 +109,6 @@
 .patterns-component_ut-wifi: &patterns-component_ut-wifi
  - "components/esp_wifi/**/*"

-.patterns-integration_test-ble: &patterns-integration_test-ble
-  - "tools/ci/python_packages/gitlab_api.py"
-  - "tools/ci/integration_test/**/*"
-  - "components/bt/controller/lib_esp32"
-  - "components/bt/controller/lib_esp32c3_family"
-  - "components/bt/controller/lib_esp32h2/esp32h2-bt-lib"
-  - "components/bt/host/nimble/nimble"
-  - "components/esp_phy/lib"
-  - "components/esp_coex/??[!s][!t]*/**/*"
-  - "components/esp_coex/???/**/*"
-  - "components/esp_coex/*"
-
-.patterns-integration_test-wifi: &patterns-integration_test-wifi
-  - "tools/ci/python_packages/gitlab_api.py"
-  - "tools/ci/integration_test/**/*"
-
 .patterns-build_macos: &patterns-build_macos
  - "tools/ci/test_configure_ci_environment.sh"

@@ -187,6 +168,8 @@

  - "tools/split_paths_by_spaces.py"

+  - "tools/check_python_dependencies.py"
+
 .patterns-docker: &patterns-docker
  - "tools/docker/**/*"

@@ -201,7 +184,6 @@
  - "components/esp_phy/lib"
  - "components/esp_wifi/lib"
  - "components/esp_coex/lib"
-  - "components/ieee802154/lib"
  - "components/json/cJSON"
  - "components/lwip/lwip"
  - "components/mbedtls/mbedtls"
@@ -213,6 +195,7 @@
  - "components/unity/unity"
  - "components/heap/tlsf"
  - "components/bt/controller/lib_esp32c6/esp32c6-bt-lib"
+  - "components/bt/esp_ble_mesh/lib/lib"
  - ".gitmodules"

 .patterns-danger-npm: &patterns-danger-npm
@@ -452,23 +435,6 @@
    - <<: *if-dev-push
      changes: *patterns-python-files

-.rules:patterns:static-code-analysis-preview:
-  rules:
-    - <<: *if-dev-push
-      changes: *patterns-c-files
-    - <<: *if-dev-push
-      changes: *patterns-python-files
-    - <<: *if-dev-push
-      changes: *patterns-sonarqube-files
-
-.rules:patterns:sbom:
-  rules:
-    - <<: *if-protected
-    - <<: *if-dev-push
-      changes: *patterns-sbom
-    - <<: *if-dev-push
-      changes: *patterns-submodule
-
 # !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
 # DO NOT place comments or maintain any code from this line
 #
@@ -571,15 +537,6 @@
 .if-label-host_test: &if-label-host_test
  if: '$BOT_LABEL_HOST_TEST || $CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*host_test(?:,[^,\n\r]+)*$/i'

-.if-label-integration_test: &if-label-integration_test
-  if: '$BOT_LABEL_INTEGRATION_TEST || $CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*integration_test(?:,[^,\n\r]+)*$/i'
-
-.if-label-integration_test_ble: &if-label-integration_test_ble
-  if: '$BOT_LABEL_INTEGRATION_TEST_BLE || $CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*integration_test_ble(?:,[^,\n\r]+)*$/i'
-
-.if-label-integration_test_wifi: &if-label-integration_test_wifi
-  if: '$BOT_LABEL_INTEGRATION_TEST_WIFI || $CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*integration_test_wifi(?:,[^,\n\r]+)*$/i'
-
 .if-label-macos: &if-label-macos
  if: '$BOT_LABEL_MACOS || $CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*macos(?:,[^,\n\r]+)*$/i'

@@ -1584,9 +1541,6 @@
    - <<: *if-label-example_test_esp32p4
    - <<: *if-label-example_test_esp32s2
    - <<: *if-label-example_test_esp32s3
-    - <<: *if-label-integration_test
-    - <<: *if-label-integration_test_ble
-    - <<: *if-label-integration_test_wifi
    - <<: *if-label-target_test
    - <<: *if-dev-push
      changes: *patterns-build-example_test
@@ -1634,10 +1588,6 @@
      changes: *patterns-example_test-usb
    - <<: *if-dev-push
      changes: *patterns-example_test-wifi
-    - <<: *if-dev-push
-      changes: *patterns-integration_test-ble
-    - <<: *if-dev-push
-      changes: *patterns-integration_test-wifi
    - <<: *if-dev-push
      changes: *patterns-target_test-adc
    - <<: *if-dev-push
@@ -20,6 +20,8 @@ check_pylint:
  extends:
    - .pre_check_template
    - .rules:patterns:python-files
+  needs:
+    - pipeline_variables
  artifacts:
    when: always
    reports:
@@ -28,88 +30,9 @@ check_pylint:
  script:
    - |
      if [ -n "$CI_MERGE_REQUEST_IID" ]; then
-        export files=$(python ${CI_PROJECT_DIR}/tools/ci/ci_get_mr_info.py files ${CI_MERGE_REQUEST_SOURCE_BRANCH_NAME} | grep ".py$");
+        export files=$(echo "$GIT_DIFF_OUTPUT" | grep ".py$" | xargs);
      else
-        export files=$(find . -iname "*.py" -print);
+        export files=$(git ls-files "*.py" | xargs);
      fi
    - if [ -z "$files" ]; then echo "No python files found"; exit 0; fi
    - run_cmd pylint --exit-zero --load-plugins=pylint_gitlab --output-format=gitlab-codeclimate:pylint.json $files
-
-# build stage
-# Sonarqube related jobs put here for this reason:
-# Here we have two jobs. code_quality_check and code_quality_report.
-#
-# code_quality_check will analyze the code changes between your MR and
-# code repo stored in sonarqube server. The analysis result is only shown in
-# the comments under this MR and won't be transferred to the server.
-#
-# code_quality_report will analyze and transfer both of the newly added code
-# and the analysis result to the server.
-#
-# Put in the front to ensure that the newly merged code can be stored in
-# sonarqube server ASAP, in order to avoid reporting unrelated code issues
-.sonar_scan_template:
-  stage: build
-  extends: .pre_check_template
-  image:
-    name: $SONARQUBE_SCANNER_IMAGE
-  before_script:
-    - source tools/ci/utils.sh
-    - export PYTHONPATH="$CI_PROJECT_DIR/tools:$CI_PROJECT_DIR/tools/ci/python_packages:$PYTHONPATH"
-    - fetch_submodules
-    # Exclude the submodules, all paths ends with /**
-    - submodules=$(get_all_submodules)
-    # get all exclude paths specified in tools/ci/sonar_exclude_list.txt | ignore lines start with # | xargs | replace all <space> to <comma>
-    - custom_excludes=$(cat $CI_PROJECT_DIR/tools/ci/sonar_exclude_list.txt | grep -v '^#' | xargs | sed -e 's/ /,/g')
-    # Exclude the report dir as well
-    - export EXCLUSIONS="$custom_excludes,$submodules"
-    - export SONAR_SCANNER_OPTS="-Xmx2048m"
-  variables:
-    GIT_DEPTH: 0
-    REPORT_PATTERN: clang_tidy_reports/*.txt
-  artifacts:
-    when: always
-    paths:
-      - $REPORT_PATTERN
-    expire_in: 1 week
-  dependencies:  # Here is not a hard dependency relationship, could be skipped when only python files changed. so we do not use "needs" here.
-    - clang_tidy_check
-
-code_quality_check:
-  extends:
-    - .sonar_scan_template
-    - .rules:patterns:static-code-analysis-preview
-  allow_failure: true  # since now it's using exit code to indicate the code analysis result,
-                       # we don't want to block ci when critical issues founded
-  script:
-    - export CI_MERGE_REQUEST_COMMITS=$(python ${CI_PROJECT_DIR}/tools/ci/ci_get_mr_info.py commits ${CI_COMMIT_REF_NAME} | tr '\n' ',')
-    # test if this branch have merge request, if not, exit 0
-    - test -n "$CI_MERGE_REQUEST_IID" || exit 0
-    - test -n "$CI_MERGE_REQUEST_COMMITS" || exit 0
-    - sonar-scanner
-      -Dsonar.analysis.mode=preview
-      -Dsonar.branch.name=$CI_MERGE_REQUEST_SOURCE_BRANCH_NAME
-      -Dsonar.cxx.clangtidy.reportPath=$REPORT_PATTERN
-      -Dsonar.exclusions=$EXCLUSIONS
-      -Dsonar.gitlab.ci_merge_request_iid=$CI_MERGE_REQUEST_IID
-      -Dsonar.gitlab.commit_sha=$CI_MERGE_REQUEST_COMMITS
-      -Dsonar.gitlab.merge_request_discussion=true
-      -Dsonar.gitlab.ref_name=$CI_MERGE_REQUEST_SOURCE_BRANCH_NAME
-      -Dsonar.host.url=$SONAR_HOST_URL
-      -Dsonar.login=$SONAR_LOGIN
-
-code_quality_report:
-  extends:
-    - .sonar_scan_template
-    - .rules:protected
-  allow_failure: true  # since now it's using exit code to indicate the code analysis result,
-                       # we don't want to block ci when critical issues founded
-  script:
-    - sonar-scanner
-      -Dsonar.branch.name=$CI_COMMIT_REF_NAME
-      -Dsonar.cxx.clangtidy.reportPath=$REPORT_PATTERN
-      -Dsonar.exclusions=$EXCLUSIONS
-      -Dsonar.gitlab.commit_sha=$PIPELINE_COMMIT_SHA
-      -Dsonar.gitlab.ref_name=$CI_COMMIT_REF_NAME
-      -Dsonar.host.url=$SONAR_HOST_URL
-      -Dsonar.login=$SONAR_LOGIN
@@ -1,17 +1,19 @@
 .target_test_template:
  image: $TARGET_TEST_ENV_IMAGE
+  extends:
+    - .before_script:fetch:target_test
  stage: target_test
  timeout: 1 hour
-  dependencies: []
-  variables:
-    GIT_DEPTH: 1
-    SUBMODULES_TO_FETCH: "none"
+  needs:
+    - pipeline_variables
  cache:
    # Usually do not need submodule-cache in target_test
    - key: pip-cache
      paths:
        - .cache/pip
      policy: pull
+  after_script:
+    - python tools/ci/artifacts_handler.py upload --type logs junit_reports

 .pytest_template:
  extends:
@@ -20,12 +22,12 @@
    when: always
    paths:
      - XUNIT_RESULT.xml
-      - pytest_embedded_log/
+      - pytest-embedded/
    reports:
      junit: XUNIT_RESULT.xml
    expire_in: 1 week
  script:
-    - retry_failed git clone $KNOWN_FAILURE_CASES_REPO known_failure_cases
+    - python tools/ci/get_known_failure_cases_file.py
    # get runner env config file
    - retry_failed git clone $TEST_ENV_CONFIG_REPO
    - python $CHECKOUT_REF_SCRIPT ci-test-runner-configs ci-test-runner-configs
@@ -45,7 +47,7 @@
    - run_cmd pytest $TEST_DIR
      -m \"${markers}\"
      --junitxml=XUNIT_RESULT.xml
-      --ignore-result-files known_failure_cases/known_failure_cases.txt
+      --ignore-result-files ${KNOWN_FAILURE_CASES_FILE_NAME}
      --parallel-count ${CI_NODE_TOTAL:-1}
      --parallel-index ${CI_NODE_INDEX:-1}
      ${PYTEST_EXTRA_FLAGS}
@@ -153,6 +155,18 @@ pytest_examples_esp32s2_jtag:
    - .rules:test:example_test-esp32s2
  tags: [ esp32s2, jtag ]

+pytest_examples_esp32c6_usb_serial_jtag:
+  extends:
+    - .pytest_examples_dir_jtag_template
+    - .rules:test:example_test-esp32c6
+  tags: [ esp32c6, usb_serial_jtag ]
+
+pytest_examples_esp32h2_usb_serial_jtag:
+  extends:
+    - .pytest_examples_dir_jtag_template
+    - .rules:test:example_test-esp32h2
+  tags: [ esp32h2, usb_serial_jtag ]
+
 pytest_examples_esp32s3_generic:
  extends:
    - .pytest_examples_dir_template
@@ -228,6 +242,15 @@ pytest_examples_esp32c6_generic:
      artifacts: false
  tags: [ esp32c6, generic ]

+pytest_examples_esp32c6_usj_device:
+  extends:
+    - .pytest_examples_dir_template
+    - .rules:test:example_test-esp32c6
+  needs:
+    - job: build_pytest_examples_esp32c6
+      artifacts: false
+  tags: [ esp32c6, usj_device ]
+
 pytest_examples_esp32h2_generic:
  extends:
    - .pytest_examples_dir_template
@@ -318,6 +341,15 @@ pytest_examples_esp32c3_wifi_ap:
      artifacts: false
  tags: [ esp32c3, wifi_ap ]

+pytest_examples_esp32c3eco7_wifi_ap:
+  extends:
+    - .pytest_examples_dir_template
+    - .rules:test:example_test-esp32c3-wifi
+  needs:
+    - job: build_pytest_examples_esp32c3
+      artifacts: false
+  tags: [ wifi_ap_eco ,esp32c3]
+
 pytest_examples_esp32s3_wifi_ap:
  extends:
    - .pytest_examples_dir_template
@@ -354,6 +386,15 @@ pytest_examples_esp32c2_26m_wifi_ap:
      artifacts: false
  tags: [ esp32c2, wifi_ap, xtal_26mhz ]

+pytest_examples_esp32c2eco4_26m_wifi_ap:
+  extends:
+    - .pytest_examples_dir_template
+    - .rules:test:example_test-esp32c2-wifi
+  needs:
+    - job: build_pytest_examples_esp32c2
+      artifacts: false
+  tags: [ wifi_ap_eco, xtal_26mhz , esp32c2]
+
 pytest_examples_esp32c6_wifi_ap:
  extends:
    - .pytest_examples_dir_template
@@ -469,7 +510,7 @@ pytest_examples_esp32_ethernet_ip101:
  needs:
    - job: build_pytest_examples_esp32
      artifacts: false
-  tags: [ esp32, ip101 ]
+  tags: [ esp32, eth_ip101 ]

 pytest_examples_esp32_ethernet_bridge:
  extends:
@@ -509,6 +550,15 @@ pytest_examples_esp32c3_wifi_two_dut:
      artifacts: false
  tags: [ esp32c3, wifi_two_dut ]

+pytest_examples_esp32c3eco7_wifi_two_dut:
+  extends:
+    - .pytest_examples_dir_template
+    - .rules:test:example_test-esp32c3-wifi
+  needs:
+    - job: build_pytest_examples_esp32c3
+      artifacts: false
+  tags: [ wifi_two_dut_eco, esp32c3 ]
+
 pytest_examples_esp32s3_wifi_two_dut:
  extends:
    - .pytest_examples_dir_template
@@ -527,6 +577,15 @@ pytest_examples_esp32c2_wifi_two_dut:
      artifacts: false
  tags: [ esp32c2, wifi_two_dut, xtal_26mhz ]

+pytest_examples_esp32c2eco4_wifi_two_dut:
+  extends:
+    - .pytest_examples_dir_template
+    - .rules:test:example_test-esp32c2-wifi
+  needs:
+    - job: build_pytest_examples_esp32c2
+      artifacts: false
+  tags: [ wifi_two_dut_eco, xtal_26mhz , esp32c2]
+
 pytest_examples_esp32c3_flash_encryption:
  extends:
    - .pytest_examples_dir_template
@@ -730,7 +789,7 @@ pytest_components_esp32_ip101:
  needs:
    - job: build_pytest_components_esp32
      artifacts: false
-  tags: [ esp32, ip101 ]
+  tags: [ esp32, eth_ip101 ]

 pytest_components_esp32_lan8720:
  extends:
@@ -1278,7 +1337,7 @@ pytest_examples_openthread_br:
      artifacts: false
  tags: [ esp32c6, openthread_br ]
  script:
-    - retry_failed git clone $KNOWN_FAILURE_CASES_REPO known_failure_cases
+    - python tools/ci/get_known_failure_cases_file.py
    # get runner env config file
    - retry_failed git clone $TEST_ENV_CONFIG_REPO
    - python $CHECKOUT_REF_SCRIPT ci-test-runner-configs ci-test-runner-configs
@@ -1293,7 +1352,7 @@ pytest_examples_openthread_br:
    - run_cmd pytest $TEST_DIR
      -m \"${markers}\"
      --junitxml=XUNIT_RESULT.xml
-      --ignore-result-files known_failure_cases/known_failure_cases.txt
+      --ignore-result-files ${KNOWN_FAILURE_CASES_FILE_NAME}
      --parallel-count ${CI_NODE_TOTAL:-1}
      --parallel-index ${CI_NODE_INDEX:-1}
      ${PYTEST_EXTRA_FLAGS}
@@ -1312,7 +1371,7 @@ pytest_examples_openthread_bbr:
      artifacts: false
  tags: [ esp32c6, openthread_bbr ]
  script:
-    - retry_failed git clone $KNOWN_FAILURE_CASES_REPO known_failure_cases
+    - python tools/ci/get_known_failure_cases_file.py
    # get runner env config file
    - retry_failed git clone $TEST_ENV_CONFIG_REPO
    - python $CHECKOUT_REF_SCRIPT ci-test-runner-configs ci-test-runner-configs
@@ -1327,7 +1386,7 @@ pytest_examples_openthread_bbr:
    - run_cmd pytest $TEST_DIR
      -m \"${markers}\"
      --junitxml=XUNIT_RESULT.xml
-      --ignore-result-files known_failure_cases/known_failure_cases.txt
+      --ignore-result-files ${KNOWN_FAILURE_CASES_FILE_NAME}
      --parallel-count ${CI_NODE_TOTAL:-1}
      --parallel-index ${CI_NODE_INDEX:-1}
      ${PYTEST_EXTRA_FLAGS}
@@ -1344,7 +1403,7 @@ pytest_examples_openthread_sleep:
      artifacts: false
  tags: [ esp32c6, openthread_sleep ]
  script:
-    - retry_failed git clone $KNOWN_FAILURE_CASES_REPO known_failure_cases
+    - python tools/ci/get_known_failure_cases_file.py
    # get runner env config file
    - retry_failed git clone $TEST_ENV_CONFIG_REPO
    - python $CHECKOUT_REF_SCRIPT ci-test-runner-configs ci-test-runner-configs
@@ -1358,7 +1417,7 @@ pytest_examples_openthread_sleep:
    - run_cmd pytest $TEST_DIR
      -m \"${markers}\"
      --junitxml=XUNIT_RESULT.xml
-      --ignore-result-files known_failure_cases/known_failure_cases.txt
+      --ignore-result-files ${KNOWN_FAILURE_CASES_FILE_NAME}
      --parallel-count ${CI_NODE_TOTAL:-1}
      --parallel-index ${CI_NODE_INDEX:-1}
      ${PYTEST_EXTRA_FLAGS}
@@ -1445,6 +1504,15 @@ pytest_test_apps_esp32c2_generic:
      artifacts: false
  tags: [ esp32c2, generic, xtal_40mhz ]

+pytest_test_apps_esp32c2eco4_generic:
+  extends:
+    - .pytest_test_apps_dir_template
+    - .rules:test:custom_test-esp32c2
+  needs:
+    - job: build_pytest_test_apps_esp32c2
+      artifacts: false
+  tags: [ generic_eco, xtal_26mhz , esp32c2]
+
 pytest_test_apps_esp32c3_generic:
  extends:
    - .pytest_test_apps_dir_template
@@ -1454,6 +1522,15 @@ pytest_test_apps_esp32c3_generic:
      artifacts: false
  tags: [ esp32c3, generic ]

+pytest_test_apps_esp32c3eco7_generic:
+  extends:
+    - .pytest_test_apps_dir_template
+    - .rules:test:custom_test-esp32c3
+  needs:
+    - job: build_pytest_test_apps_esp32c3
+      artifacts: false
+  tags: [ generic_eco , esp32c3]
+
 pytest_test_apps_esp32c6_generic:
  extends:
    - .pytest_test_apps_dir_template
@@ -1534,3 +1611,21 @@ pytest_test_apps_esp32c3_wifi_two_dut:
    - job: build_pytest_test_apps_esp32c3
      artifacts: false
  tags: [ esp32c3, wifi_two_dut]
+
+pytest_test_apps_esp32c2eco4_wifi_two_dut:
+  extends:
+    - .pytest_test_apps_dir_template
+    - .rules:test:custom_test-esp32c2-wifi
+  needs:
+    - job: build_pytest_test_apps_esp32c2
+      artifacts: false
+  tags: [ wifi_two_dut_eco, xtal_26mhz, esp32c2 ]
+
+pytest_test_apps_esp32c3eco7_wifi_two_dut:
+  extends:
+    - .pytest_test_apps_dir_template
+    - .rules:test:custom_test-esp32c3-wifi
+  needs:
+    - job: build_pytest_test_apps_esp32c3
+      artifacts: false
+  tags: [ wifi_two_dut_eco, esp32c3]
@@ -49,12 +49,13 @@
 [submodule "components/json/cJSON"]
 	path = components/json/cJSON
 	url = ../../DaveGamble/cJSON.git
-	sbom-version = 1.7.16
+	sbom-version = 1.7.19
 	sbom-cpe = cpe:2.3:a:cjson_project:cjson:{}:*:*:*:*:*:*:*
+	sbom-cpe = cpe:2.3:a:davegamble:cjson:{}:*:*:*:*:*:*:*
 	sbom-supplier = Person: Dave Gamble
 	sbom-url = https://github.com/DaveGamble/cJSON
 	sbom-description = Ultralightweight JSON parser in ANSI C
-	sbom-hash = cb8693b058ba302f4829ec6d03f609ac6f848546
+	sbom-hash = c859b25da02955fef659d658b8f324b5cde87be3

 [submodule "components/mbedtls/mbedtls"]
 	path = components/mbedtls/mbedtls
@@ -120,10 +121,6 @@
 	path = components/openthread/lib
 	url = ../../espressif/esp-thread-lib.git

-[submodule "components/ieee802154/lib"]
-	path = components/ieee802154/lib
-	url = ../../espressif/esp-ieee802154-lib.git
-
 [submodule "components/bt/controller/lib_esp32h2/esp32h2-bt-lib"]
 	path = components/bt/controller/lib_esp32h2/esp32h2-bt-lib
 	url = ../../espressif/esp32h2-bt-lib.git
@@ -143,3 +140,7 @@
 [submodule "components/esp_coex/lib"]
 	path = components/esp_coex/lib
 	url = ../../espressif/esp-coex-lib.git
+
+[submodule "components/bt/esp_ble_mesh/lib/lib"]
+	path = components/bt/esp_ble_mesh/lib/lib
+	url = ../../espressif/esp-ble-mesh-lib.git
@@ -1,9 +1,11 @@
 # See https://pre-commit.com for more information
 # See https://pre-commit.com/hooks.html for more hooks

+default_stages: [commit]
+
 repos:
  - repo: https://github.com/pre-commit/pre-commit-hooks
-    rev: v4.0.1
+    rev: v4.5.0
    hooks:
      - id: trailing-whitespace
        # note: whitespace exclusions use multiline regex, see https://pre-commit.com/#regular-expressions
@@ -39,11 +41,12 @@ repos:
    hooks:
      - id: flake8
        args: ['--config=.flake8', '--tee', '--benchmark']
-  - repo: https://github.com/pycqa/isort
-    rev: 5.12.0  # python 3.8 compatible
+  - repo: https://github.com/asottile/reorder-python-imports
+    rev: v3.12.0
    hooks:
-      - id: isort
-        name: isort (python)
+      - id: reorder-python-imports
+        name: Reorder Python imports
+        args: [--py38-plus]
        exclude: >
          (?x)^(
              .*_pb2.py
@@ -67,7 +70,7 @@ repos:
        entry: tools/ci/check_kconfigs.py
        language: python
        additional_dependencies:
-          - esp-idf-kconfig
+          - esp-idf-kconfig>=1.5.0,<2.0.0
        files: '^Kconfig$|Kconfig.*$'
      - id: check-deprecated-kconfigs-options
        name: Check if any Kconfig Options Deprecated
@@ -109,10 +112,10 @@ repos:
        name: Check type annotations in python files
        entry: tools/ci/check_type_comments.py
        additional_dependencies:
-          - 'mypy==0.940'
-          - 'mypy-extensions==0.4.3'
-          - 'types-setuptools==57.4.14'
-          - 'types-PyYAML==0.1.9'
+          - 'mypy'
+          - 'mypy-extensions'
+          - 'types-setuptools'
+          - 'types-PyYAML'
        exclude: >
          (?x)^(
              .*_pb2.py
@@ -177,12 +180,6 @@ repos:
        always_run: true
        pass_filenames: false
        require_serial: true
-      - id: submodule-sbom-hash-check
-        name: Check if sbom-hash values for submodules in .gitmodules match submodules checkout hash in git tree
-        entry: python tools/test_sbom/test_submodules.py
-        language: python
-        always_run: true
-        pass_filenames: false
      - id: cleanup-ignore-lists
        name: Remove non-existing patterns from ignore lists
        entry: tools/ci/cleanup_ignore_lists.py
@@ -205,7 +202,7 @@ repos:
      - id: conventional-precommit-linter
        stages: [commit-msg]
  - repo: https://github.com/espressif/astyle_py.git
-    rev: v1.0.2
+    rev: v1.0.5
    hooks:
      - id: astyle_py
        # If you are modifying astyle version, update tools/format.sh as well
@@ -221,3 +218,8 @@ repos:
      name: shellcheck dash (export.sh)
      args: ['--shell', 'dash', '-x']
      files: 'export.sh'
+  - repo: https://github.com/espressif/esp-idf-sbom.git
+    rev: v0.13.0
+    hooks:
+      - id: validate-sbom-manifest
+        stages: [post-commit]
@@ -134,6 +134,10 @@ if(CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_DISABLE)
    list(APPEND compile_definitions "-DNDEBUG")
 endif()

+if(CONFIG_COMPILER_NO_MERGE_CONSTANTS)
+    list(APPEND compile_options "-fno-merge-constants")
+endif()
+
 if(CONFIG_COMPILER_STACK_CHECK_MODE_NORM)
    list(APPEND compile_options "-fstack-protector")
 elseif(CONFIG_COMPILER_STACK_CHECK_MODE_STRONG)
@@ -146,6 +150,10 @@ if(CONFIG_COMPILER_DUMP_RTL_FILES)
    list(APPEND compile_options "-fdump-rtl-expand")
 endif()

+idf_build_set_property(GDBINIT_FILES_PREFIX_MAP "${BUILD_DIR}/gdbinit/prefix_map")
+file(MAKE_DIRECTORY "${BUILD_DIR}/gdbinit")
+file(WRITE "${BUILD_DIR}/gdbinit/prefix_map" "")
+
 if(NOT ${CMAKE_C_COMPILER_VERSION} VERSION_LESS 8.0.0)
    if(CONFIG_COMPILER_HIDE_PATHS_MACROS)
        list(APPEND compile_options "-fmacro-prefix-map=${CMAKE_SOURCE_DIR}=.")
@@ -213,8 +221,35 @@ endif()
 list(APPEND link_options "-fno-lto")

 if(CONFIG_IDF_TARGET_LINUX AND CMAKE_HOST_SYSTEM_NAME STREQUAL "Darwin")
+    # Not all versions of the MacOS linker support the -warn_commons flag.
+    # ld version 1053.12 (and above) have been tested to support it.
+    # Hence, we extract the version string from the linker output
+    # before including the flag.
+
+    # Get the ld version, capturing both stdout and stderr
+    execute_process(
+        COMMAND ${CMAKE_LINKER} -v
+        OUTPUT_VARIABLE LD_VERSION_OUTPUT
+        ERROR_VARIABLE LD_VERSION_ERROR
+        OUTPUT_STRIP_TRAILING_WHITESPACE
+        ERROR_STRIP_TRAILING_WHITESPACE
+    )
+
+    # Combine stdout and stderr
+    set(LD_VERSION_OUTPUT "${LD_VERSION_OUTPUT}\n${LD_VERSION_ERROR}")
+
+    # Extract the version string
+    string(REGEX MATCH "PROJECT:(ld|dyld)-([0-9]+)\\.([0-9]+)" LD_VERSION_MATCH "${LD_VERSION_OUTPUT}")
+    set(LD_VERSION_MAJOR_MINOR "${CMAKE_MATCH_2}.${CMAKE_MATCH_3}")
+
+    message(STATUS "Linker Version: ${LD_VERSION_MAJOR_MINOR}")
+
+    # Compare the version with 1053.12
+    if(LD_VERSION_MAJOR_MINOR VERSION_GREATER_EQUAL "1053.12")
+        list(APPEND link_options "-Wl,-warn_commons")
+    endif()
+
    list(APPEND link_options "-Wl,-dead_strip")
-    list(APPEND link_options "-Wl,-warn_commons")
 else()
    list(APPEND link_options "-Wl,--gc-sections")
    list(APPEND link_options "-Wl,--warn-common")
@@ -236,7 +271,9 @@ if(CMAKE_C_COMPILER_ID MATCHES "GNU")
 endif()

 if(CMAKE_C_COMPILER_ID MATCHES "Clang")
-    list(APPEND compile_options "-fno-use-cxa-atexit")
+    list(APPEND compile_options "-fno-use-cxa-atexit")  # TODO IDF-10934
+else()
+    list(APPEND cxx_compile_options "-fuse-cxa-atexit")
 endif()

 if(COMPILER_RT_LIB_NAME)
@@ -496,6 +496,15 @@ mainmenu "Espressif IoT Development Framework Configuration"
            help
                Stack smashing protection.

+        config COMPILER_NO_MERGE_CONSTANTS
+            bool "Disable merging const sections"
+            depends on IDF_TOOLCHAIN_GCC
+            help
+                Disable merging identical constants (string/floating-point) across compilation units.
+                This helps in better size analysis of the application binary as the rodata section
+                distribution is more uniform across libraries. On downside, it may increase
+                the binary size and hence should be used during development phase only.
+
        config COMPILER_WARN_WRITE_STRINGS
            bool "Enable -Wwrite-strings warning flag"
            default "n"
@@ -570,6 +579,27 @@ mainmenu "Espressif IoT Development Framework Configuration"
            default "gcc" if COMPILER_RT_LIB_GCCLIB
            default "" if COMPILER_RT_LIB_HOST

+        choice COMPILER_ORPHAN_SECTIONS
+            prompt "Orphan sections handling"
+            default COMPILER_ORPHAN_SECTIONS_PLACE
+            depends on !IDF_TARGET_LINUX
+            help
+                If the linker finds orphan sections, it attempts to place orphan sections after sections of the same
+                attribute such as code vs data, loadable vs non-loadable, etc.
+                That means that orphan sections could placed between sections defined in IDF linker scripts.
+                This could lead to corruption of the binary image. Configure the linker action here.
+
+            config COMPILER_ORPHAN_SECTIONS_WARNING
+                bool "Place with warning"
+                help
+                    Places orphan sections with a warning message.
+
+            config COMPILER_ORPHAN_SECTIONS_PLACE
+                bool "Place silently"
+                help
+                    Places orphan sections without a warning/error message.
+        endchoice
+
    endmenu # Compiler Options

    menu "Component config"
@@ -590,4 +620,4 @@ mainmenu "Espressif IoT Development Framework Configuration"
            - CONFIG_ESPTOOLPY_FLASHFREQ_120M && CONFIG_ESPTOOLPY_FLASH_SAMPLE_MODE_DTR
            - CONFIG_SPIRAM_SPEED_120M && CONFIG_SPIRAM_MODE_OCT
            - CONFIG_BOOTLOADER_CACHE_32BIT_ADDR_QUAD_FLASH
-            - CONFIG_MBEDTLS_USE_CRYPTO_ROM_IMPL
+            - CONFIG_USB_HOST_EXT_PORT_RESET_ATTEMPTS
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2021-2025 Espressif Systems (Shanghai) CO LTD
 *
 * SPDX-License-Identifier: Apache-2.0
 */
@@ -92,7 +92,7 @@ static esp_err_t esp_apptrace_membufs_swap(esp_apptrace_membufs_proto_data_t *pr
    // switch to new block
    proto->state.in_block++;

-    proto->hw->swap(new_block_num);
+    proto->hw->swap(new_block_num, proto->state.markers[prev_block_num]);

    // handle data from host
    esp_hostdata_hdr_t *hdr = (esp_hostdata_hdr_t *)proto->blocks[new_block_num].start;
@@ -148,6 +148,18 @@ static esp_err_t esp_apptrace_membufs_swap_waitus(esp_apptrace_membufs_proto_dat
        if (res != ESP_OK) {
            break;
        }
+#if CONFIG_IDF_TARGET_ESP32S3
+        /*
+        * ESP32S3 has a serious data corruption issue with the transferred data to host.
+        * This delay helps reduce the failure rate by temporarily reducing heavy memory writes
+        * from RTOS-level tracing and giving OpenOCD more time to read trace memory before
+        * the current thread continues execution. While this doesn't completely prevent
+        * memory access from other threads/cores/ISRs, it has shown to significantly improve
+        * reliability when combined with CRC checks in OpenOCD. In practice, this reduces the
+        * number of retries needed to read an entire block without corruption.
+        */
+        esp_rom_delay_us(100);
+#endif
    }
    return res;
 }
@@ -339,7 +351,7 @@ uint8_t *esp_apptrace_membufs_up_buffer_get(esp_apptrace_membufs_proto_data_t *p
 esp_err_t esp_apptrace_membufs_up_buffer_put(esp_apptrace_membufs_proto_data_t *proto, uint8_t *ptr, esp_apptrace_tmo_t *tmo)
 {
    esp_apptrace_membufs_pkt_end(ptr);
-    // TODO: mark block as busy in order not to re-use it for other tracing calls until it is completely written
+    // TODO: mark block as busy in order not to reuse it for other tracing calls until it is completely written
    // TODO: avoid potential situation when all memory is consumed by low prio tasks which can not complete writing due to
    // higher prio tasks and the latter can not allocate buffers at all
    // this is abnormal situation can be detected on host which will receive only uncompleted buffers
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2017-2023 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2017-2024 Espressif Systems (Shanghai) CO LTD
 *
 * SPDX-License-Identifier: Apache-2.0
 */
@@ -15,7 +15,8 @@
 #include "esp_app_trace.h"
 #include "esp_freertos_hooks.h"
 #include "esp_private/dbg_stubs.h"
-#include "esp_ipc.h"
+#include "esp_private/esp_ipc.h"
+#include "esp_attr.h"
 #include "hal/wdt_hal.h"
 #if CONFIG_IDF_TARGET_ESP32
 #include "esp32/rom/libc_stubs.h"
@@ -80,11 +81,11 @@ void gcov_create_task(void *arg)
 		(void *)&s_gcov_task_running, configMAX_PRIORITIES - 1, NULL, 0);
 }

+static IRAM_ATTR
 void gcov_create_task_tick_hook(void)
 {
-    extern esp_err_t esp_ipc_start_gcov_from_isr(uint32_t cpu_id, esp_ipc_func_t func, void* arg);
    if (s_create_gcov_task) {
-        if (esp_ipc_start_gcov_from_isr(xPortGetCoreID(), &gcov_create_task, NULL) == ESP_OK) {
+        if (esp_ipc_call_nonblocking(xPortGetCoreID(), &gcov_create_task, NULL) == ESP_OK) {
            s_create_gcov_task = false;
        }
    }
@@ -106,12 +107,16 @@ static int esp_dbg_stub_gcov_entry(void)

 void gcov_rtio_init(void)
 {
-    uint32_t capabilities = 0;
+    uint32_t stub_entry = 0;
    ESP_EARLY_LOGV(TAG, "%s", __FUNCTION__);
-    esp_dbg_stub_entry_set(ESP_DBG_STUB_ENTRY_GCOV, (uint32_t)&esp_dbg_stub_gcov_entry);
-    if (esp_dbg_stub_entry_get(ESP_DBG_STUB_ENTRY_CAPABILITIES, &capabilities) == ESP_OK) {
-        esp_dbg_stub_entry_set(ESP_DBG_STUB_ENTRY_CAPABILITIES, capabilities | ESP_DBG_STUB_CAP_GCOV_TASK);
+    assert(esp_dbg_stub_entry_get(ESP_DBG_STUB_ENTRY_GCOV, &stub_entry) == ESP_OK);
+    if (stub_entry != 0) {
+        /* "__gcov_init()" can be called several times. We must avoid multiple tick hook registration */
+        return;
    }
+    esp_dbg_stub_entry_set(ESP_DBG_STUB_ENTRY_GCOV, (uint32_t)&esp_dbg_stub_gcov_entry);
+    assert(esp_dbg_stub_entry_get(ESP_DBG_STUB_ENTRY_CAPABILITIES, &stub_entry) == ESP_OK);
+    esp_dbg_stub_entry_set(ESP_DBG_STUB_ENTRY_CAPABILITIES, stub_entry | ESP_DBG_STUB_CAP_GCOV_TASK);
    esp_register_freertos_tick_hook(gcov_create_task_tick_hook);
 }

@@ -49,7 +49,7 @@ static uint8_t *esp_apptrace_riscv_down_buffer_get(esp_apptrace_riscv_data_t *hw
 static esp_err_t esp_apptrace_riscv_down_buffer_put(esp_apptrace_riscv_data_t *hw_data, uint8_t *ptr, esp_apptrace_tmo_t *tmo);
 static bool esp_apptrace_riscv_host_is_connected(esp_apptrace_riscv_data_t *hw_data);
 static esp_err_t esp_apptrace_riscv_buffer_swap_start(uint32_t curr_block_id);
-static esp_err_t esp_apptrace_riscv_buffer_swap(uint32_t new_block_id);
+static esp_err_t esp_apptrace_riscv_buffer_swap(uint32_t new_block_id, uint32_t prev_block_len);
 static esp_err_t esp_apptrace_riscv_buffer_swap_end(uint32_t new_block_id, uint32_t prev_block_len);
 static bool esp_apptrace_riscv_host_data_pending(void);

@@ -346,7 +346,7 @@ static esp_err_t esp_apptrace_riscv_buffer_swap_end(uint32_t new_block_id, uint3
    return ESP_OK;
 }

-static esp_err_t esp_apptrace_riscv_buffer_swap(uint32_t new_block_id)
+static esp_err_t esp_apptrace_riscv_buffer_swap(uint32_t new_block_id, uint32_t prev_block_len)
 {
    /* do nothing */
    return ESP_OK;
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
 *
 * SPDX-License-Identifier: Apache-2.0
 */
@@ -12,7 +12,7 @@
 // ======================

 // Xtensa has useful feature: TRAX debug module. It allows recording program execution flow at run-time without disturbing CPU.
-// Exectution flow data are written to configurable Trace RAM block. Besides accessing Trace RAM itself TRAX module also allows to read/write
+// Execution flow data are written to configurable Trace RAM block. Besides accessing Trace RAM itself TRAX module also allows to read/write
 // trace memory via its registers by means of JTAG, APB or ERI transactions.
 // ESP32 has two Xtensa cores with separate TRAX modules on them and provides two special memory regions to be used as trace memory.
 // Chip allows muxing access to those trace memory blocks in such a way that while one block is accessed by CPUs another one can be accessed by host
@@ -47,7 +47,7 @@
 // 2. TRAX Registers layout
 // ========================

-// This module uses two TRAX HW registers to communicate with host SW (OpenOCD).
+// This module uses two TRAX HW registers and one Performance Monitor register to communicate with host SW (OpenOCD).
 //  - Control register uses TRAX_DELAYCNT as storage. Only lower 24 bits of TRAX_DELAYCNT are writable. Control register has the following bitfields:
 //   | 31..XXXXXX..24 | 23 .(host_connect). 23| 22..(block_id)..15 | 14..(block_len)..0 |
 //    14..0  bits - actual length of user data in trace memory block. Target updates it every time it fills memory block and exposes it to host.
@@ -55,9 +55,15 @@
 //    21..15 bits - trace memory block transfer ID. Block counter. It can overflow. Updated by target, host should not modify it. Actually can be 2 bits;
 //    22     bit  - 'host data present' flag. If set to one there is data from host, otherwise - no host data;
 //    23     bit  - 'host connected' flag. If zero then host is not connected and tracing module works in post-mortem mode, otherwise in streaming mode;
-// - Status register uses TRAX_TRIGGERPC as storage. If this register is not zero then current CPU is changing TRAX registers and
-//   this register holds address of the instruction which application will execute when it finishes with those registers modifications.
-//   See 'Targets Connection' setion for details.
+//  - Status register uses TRAX_TRIGGERPC as storage. If this register is not zero then current CPU is changing TRAX registers and
+//    this register holds address of the instruction which application will execute when it finishes with those registers modifications.
+//    See 'Targets Connection' section for details.
+//  - CRC16 register uses ERI_PERFMON_PM1 as storage. This register is used to store CRC16 checksum of the exposed trace memory block.
+//    The register has the following format:
+//    | 31..16 (CRC indicator) | 15..0 (CRC16 value) |
+//    CRC indicator (0xA55A) is used to distinguish valid CRC values from other data that might be in the register.
+//    CRC16 is calculated over the entire exposed block and is updated every time a block is exposed to the host.
+//    This allows the host to verify data integrity of the received trace data.

 // 3. Modes of operation
 // =====================
@@ -127,7 +133,7 @@

 // Access to internal module's data is synchronized with custom mutex. Mutex is a wrapper for portMUX_TYPE and uses almost the same sync mechanism as in
 // vPortCPUAcquireMutex/vPortCPUReleaseMutex. The mechanism uses S32C1I Xtensa instruction to implement exclusive access to module's data from tasks and
-// ISRs running on both cores. Also custom mutex allows specifying timeout for locking operation. Locking routine checks underlaying mutex in cycle until
+// ISRs running on both cores. Also custom mutex allows specifying timeout for locking operation. Locking routine checks underlying mutex in cycle until
 // it gets its ownership or timeout expires. The differences of application tracing module's mutex implementation from vPortCPUAcquireMutex/vPortCPUReleaseMutex are:
 // - Support for timeouts.
 // - Local IRQs for CPU which owns the mutex are disabled till the call to unlocking routine. This is made to avoid possible task's prio inversion.
@@ -142,9 +148,9 @@

 // Timeout mechanism is based on xthal_get_ccount() routine and supports timeout values in microseconds.
 // There are two situations when task/ISR can be delayed by tracing API call. Timeout mechanism takes into account both conditions:
-// - Trace data are locked by another task/ISR. When wating on trace data lock.
+// - Trace data are locked by another task/ISR. When waiting on trace data lock.
 // - Current TRAX memory input block is full when working in streaming mode (host is connected). When waiting for host to complete previous block reading.
-// When wating for any of above conditions xthal_get_ccount() is called periodically to calculate time elapsed from trace API routine entry. When elapsed
+// When waiting for any of above conditions xthal_get_ccount() is called periodically to calculate time elapsed from trace API routine entry. When elapsed
 // time exceeds specified timeout value operation is canceled and ESP_ERR_TIMEOUT code is returned.
 #include "sdkconfig.h"
 #include "soc/soc.h"
@@ -159,11 +165,15 @@
 #include "esp_log.h"
 #include "esp_app_trace_membufs_proto.h"
 #include "esp_app_trace_port.h"
+#include "esp_rom_crc.h"

 // TRAX is disabled, so we use its registers for our own purposes
 // | 31..XXXXXX..24 | 23 .(host_connect). 23 | 22 .(host_data). 22| 21..(block_id)..15 | 14..(block_len)..0 |
 #define ESP_APPTRACE_TRAX_CTRL_REG              ERI_TRAX_DELAYCNT
 #define ESP_APPTRACE_TRAX_STAT_REG              ERI_TRAX_TRIGGERPC
+#define ESP_APPTRACE_TRAX_CRC16_REG             ERI_PERFMON_PM1
+
+#define ESP_APPTRACE_CRC_INDICATOR              (0xA55AU << 16)

 #define ESP_APPTRACE_TRAX_BLOCK_LEN_MSK         0x7FFFUL
 #define ESP_APPTRACE_TRAX_BLOCK_LEN(_l_)        ((_l_) & ESP_APPTRACE_TRAX_BLOCK_LEN_MSK)
@@ -198,7 +208,7 @@ static uint8_t *esp_apptrace_trax_down_buffer_get(esp_apptrace_trax_data_t *hw_d
 static esp_err_t esp_apptrace_trax_down_buffer_put(esp_apptrace_trax_data_t *hw_data, uint8_t *ptr, esp_apptrace_tmo_t *tmo);
 static bool esp_apptrace_trax_host_is_connected(esp_apptrace_trax_data_t *hw_data);
 static esp_err_t esp_apptrace_trax_buffer_swap_start(uint32_t curr_block_id);
-static esp_err_t esp_apptrace_trax_buffer_swap(uint32_t new_block_id);
+static esp_err_t esp_apptrace_trax_buffer_swap(uint32_t new_block_id, uint32_t prev_block_len);
 static esp_err_t esp_apptrace_trax_buffer_swap_end(uint32_t new_block_id, uint32_t prev_block_len);
 static bool esp_apptrace_trax_host_data_pending(void);

@@ -498,7 +508,8 @@ static esp_err_t esp_apptrace_trax_buffer_swap_start(uint32_t curr_block_id)
        uint32_t acked_block = ESP_APPTRACE_TRAX_BLOCK_ID_GET(ctrl_reg);
        uint32_t host_to_read = ESP_APPTRACE_TRAX_BLOCK_LEN_GET(ctrl_reg);
        if (host_to_read != 0 || acked_block != (curr_block_id & ESP_APPTRACE_TRAX_BLOCK_ID_MSK)) {
-            ESP_APPTRACE_LOGD("HC[%d]: Can not switch %x %d %x %x/%lx", esp_cpu_get_core_id(), ctrl_reg, host_to_read, acked_block,
+            ESP_APPTRACE_LOGD("HC[%d]: Can not switch %" PRIx32 " %" PRIu32 " %" PRIx32 " %" PRIx32 "/%" PRIx32,
+                esp_cpu_get_core_id(), ctrl_reg, host_to_read, acked_block,
                curr_block_id & ESP_APPTRACE_TRAX_BLOCK_ID_MSK, curr_block_id);
            res = ESP_ERR_NO_MEM;
            goto _on_err;
@@ -514,14 +525,22 @@ static esp_err_t esp_apptrace_trax_buffer_swap_end(uint32_t new_block_id, uint32
 {
    uint32_t ctrl_reg = eri_read(ESP_APPTRACE_TRAX_CTRL_REG);
    uint32_t host_connected = ESP_APPTRACE_TRAX_HOST_CONNECT & ctrl_reg;
+
    eri_write(ESP_APPTRACE_TRAX_CTRL_REG, ESP_APPTRACE_TRAX_BLOCK_ID(new_block_id) |
              host_connected | ESP_APPTRACE_TRAX_BLOCK_LEN(prev_block_len));
    esp_apptrace_trax_buffer_swap_unlock();
    return ESP_OK;
 }

-static esp_err_t esp_apptrace_trax_buffer_swap(uint32_t new_block_id)
+static esp_err_t esp_apptrace_trax_buffer_swap(uint32_t new_block_id, uint32_t prev_block_len)
 {
+    /* Before switching to the new block, calculate CRC16 of the current block */
+    if (prev_block_len > 0) {
+        const uint8_t *prev_block_start = s_trax_blocks[!((new_block_id % 2))];
+        uint16_t crc16 = esp_rom_crc16_le(0, prev_block_start, prev_block_len);
+        eri_write(ESP_APPTRACE_TRAX_CRC16_REG, crc16 | ESP_APPTRACE_CRC_INDICATOR);
+        ESP_APPTRACE_LOGD("CRC16:%x %d @%x", crc16, prev_block_len, prev_block_start);
+    }
    esp_apptrace_trax_select_memory_block(new_block_id);
    return ESP_OK;
 }
@@ -29,7 +29,7 @@ typedef struct {

 typedef struct {
    esp_err_t (*swap_start)(uint32_t curr_block_id);
-    esp_err_t (*swap)(uint32_t new_block_id);
+    esp_err_t (*swap)(uint32_t new_block_id, uint32_t prev_block_len);
    esp_err_t (*swap_end)(uint32_t new_block_id, uint32_t prev_block_len);
    bool (*host_data_pending)(void);
 } esp_apptrace_membufs_proto_hw_t;
@@ -10,7 +10,7 @@
 *                        The Embedded Experts                        *
 **********************************************************************
 *                                                                    *
-*            (c) 1995 - 2021 SEGGER Microcontroller GmbH             *
+*            (c) 1995 - 2024 SEGGER Microcontroller GmbH             *
 *                                                                    *
 *       www.segger.com     Support: support@segger.com               *
 *                                                                    *
@@ -49,7 +49,7 @@
 *                                                                    *
 **********************************************************************
 *                                                                    *
-*       SystemView version: 3.42                                    *
+*       SystemView version: 3.56                                    *
 *                                                                    *
 **********************************************************************
 ----------------------------------------------------------------------
@@ -8,7 +8,7 @@
 *                        The Embedded Experts                        *
 **********************************************************************
 *                                                                    *
-*            (c) 1995 - 2021 SEGGER Microcontroller GmbH             *
+*            (c) 1995 - 2024 SEGGER Microcontroller GmbH             *
 *                                                                    *
 *       www.segger.com     Support: support@segger.com               *
 *                                                                    *
@@ -47,7 +47,7 @@
 *                                                                    *
 **********************************************************************
 *                                                                    *
-*       SystemView version: 3.42                                    *
+*       SystemView version: 3.56                                    *
 *                                                                    *
 **********************************************************************
 ---------------------------END-OF-HEADER------------------------------
@@ -100,6 +100,10 @@ Revision: $Rev: 25842 $
      #define _CORE_HAS_RTT_ASM_SUPPORT 1
      #define _CORE_NEEDS_DMB           1
      #define RTT__DMB() __asm volatile ("dmb\n" : : :);
+    #elif (defined(__ARM_ARCH_8_1M_MAIN__))       // Cortex-M85
+      #define _CORE_HAS_RTT_ASM_SUPPORT 1
+      #define _CORE_NEEDS_DMB           1
+      #define RTT__DMB() __asm volatile ("dmb\n" : : :);
    #else
      #define _CORE_HAS_RTT_ASM_SUPPORT 0
    #endif
@@ -130,6 +134,10 @@ Revision: $Rev: 25842 $
      #define _CORE_HAS_RTT_ASM_SUPPORT 1
      #define _CORE_NEEDS_DMB           1
      #define RTT__DMB() __asm volatile ("dmb\n" : : :);
+    #elif (defined __ARM_ARCH_8_1M_MAIN__)        // Cortex-M85
+      #define _CORE_HAS_RTT_ASM_SUPPORT 1
+      #define _CORE_NEEDS_DMB           1
+      #define RTT__DMB() __asm volatile ("dmb\n" : : :);
    #elif ((defined __ARM_ARCH_7A__) || (defined __ARM_ARCH_7R__))  // Cortex-A/R 32-bit ARMv7-A/R
      #define _CORE_NEEDS_DMB           1
      #define RTT__DMB() __asm volatile ("dmb\n" : : :);
@@ -156,6 +164,10 @@ Revision: $Rev: 25842 $
      #define _CORE_HAS_RTT_ASM_SUPPORT 1
      #define _CORE_NEEDS_DMB           1
      #define RTT__DMB() __asm volatile ("dmb\n" : : :);
+    #elif (defined __ARM_ARCH_8_1M_MAIN__)        // Cortex-M85
+      #define _CORE_HAS_RTT_ASM_SUPPORT 1
+      #define _CORE_NEEDS_DMB           1
+      #define RTT__DMB() __asm volatile ("dmb\n" : : :);
    #elif ((defined __ARM_ARCH_7A__) || (defined __ARM_ARCH_7R__))  // Cortex-A/R 32-bit ARMv7-A/R
      #define _CORE_NEEDS_DMB           1
      #define RTT__DMB() __asm volatile ("dmb\n" : : :);
@@ -271,6 +283,7 @@ Revision: $Rev: 25842 $
 #ifndef SEGGER_RTT_ASM  // defined when SEGGER_RTT.h is included from assembly file
 #include <stdlib.h>
 #include <stdarg.h>
+#include <stdint.h>

 /*********************************************************************
 *
@@ -412,7 +425,7 @@ unsigned     SEGGER_RTT_ReadUpBufferNoLock      (unsigned BufferIndex, void* pDa
 unsigned     SEGGER_RTT_WriteDownBuffer         (unsigned BufferIndex, const void* pBuffer, unsigned NumBytes);
 unsigned     SEGGER_RTT_WriteDownBufferNoLock   (unsigned BufferIndex, const void* pBuffer, unsigned NumBytes);

-#define      SEGGER_RTT_HASDATA_UP(n)    (((SEGGER_RTT_BUFFER_UP*)((char*)&_SEGGER_RTT.aUp[n] + SEGGER_RTT_UNCACHED_OFF))->WrOff - ((SEGGER_RTT_BUFFER_UP*)((char*)&_SEGGER_RTT.aUp[n] + SEGGER_RTT_UNCACHED_OFF))->RdOff)   // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
+#define      SEGGER_RTT_HASDATA_UP(n)    (((SEGGER_RTT_BUFFER_UP*)((uintptr_t)&_SEGGER_RTT.aUp[n] + SEGGER_RTT_UNCACHED_OFF))->WrOff - ((SEGGER_RTT_BUFFER_UP*)((uintptr_t)&_SEGGER_RTT.aUp[n] + SEGGER_RTT_UNCACHED_OFF))->RdOff)   // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly

 /*********************************************************************
 *
@@ -3,14 +3,14 @@
 *
 * SPDX-License-Identifier: BSD-1-Clause
 *
- * SPDX-FileContributor: 2023 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileContributor: 2023-2025 Espressif Systems (Shanghai) CO LTD
 */
 /*********************************************************************
 *                    SEGGER Microcontroller GmbH                     *
 *                        The Embedded Experts                        *
 **********************************************************************
 *                                                                    *
-*            (c) 1995 - 2021 SEGGER Microcontroller GmbH             *
+*            (c) 1995 - 2024 SEGGER Microcontroller GmbH             *
 *                                                                    *
 *       www.segger.com     Support: support@segger.com               *
 *                                                                    *
@@ -49,14 +49,14 @@
 *                                                                    *
 **********************************************************************
 *                                                                    *
-*       SystemView version: 3.42                                    *
+*       SystemView version: 3.56                                    *
 *                                                                    *
 **********************************************************************
 -------------------------- END-OF-HEADER -----------------------------

 File    : SEGGER_SYSVIEW.c
 Purpose : System visualization API implementation.
-Revision: $Rev: 28341 $
+Revision: $Rev: 29105 $

 Additional information:
  Packet format:
@@ -66,10 +66,10 @@ Additional information:

    Packets with IDs 24..31 are standard packets with extendible
    structure and contain a length field.
-    <ID><Lenght><Data><TimeStampDelta>
+    <ID><Length><Data><TimeStampDelta>

    Packet ID 31 is used for SystemView extended events.
-    <ID><Lenght><ID_EX><Data><TimeStampDelta>
+    <ID><Length><ID_EX><Data><TimeStampDelta>

    Packets with IDs >= 32 always contain a length field.
    <ID><Length><Data><TimeStampDelta>
@@ -150,6 +150,7 @@ Additional information:
 #include <string.h>
 #include <stdlib.h>
 #include <stdarg.h>
+#include <assert.h>
 #include "SEGGER_SYSVIEW_Int.h"
 #include "SEGGER_RTT.h"

@@ -188,7 +189,7 @@ Additional information:
 // Timestamps may be less than full 32-bits, in which case we need to zero
 // the unused bits to properly handle overflows.
 // Note that this is a quite common scenario, as a 32-bit time such as
-// SysTick might be scaled down to reduce bandwith
+// SysTick might be scaled down to reduce bandwidth
 // or a 16-bit hardware time might be used.
 #if SEGGER_SYSVIEW_TIMESTAMP_BITS < 32  // Eliminate unused bits in case hardware timestamps are less than 32 bits
  #define MAKE_DELTA_32BIT(Delta) Delta <<= 32 - SEGGER_SYSVIEW_TIMESTAMP_BITS; \
@@ -388,8 +389,6 @@ static U8                     _NumModules;
                                   pDest = pSysviewPointer;                         \
                                 };

-
-
 #if (SEGGER_SYSVIEW_USE_STATIC_BUFFER == 1)
 static U8 _aPacket[SEGGER_SYSVIEW_MAX_PACKET_SIZE];

@@ -432,6 +431,9 @@ static U8 _aPacket[SEGGER_SYSVIEW_MAX_PACKET_SIZE];
 static U8* _EncodeData(U8* pPayload, const char* pSrc, unsigned int NumBytes) {
  unsigned int  n;
  const U8*     p;
+
+  // Espressif doesn't support larger packages yet. Encode data length must be less than 255.
+  assert(NumBytes < 255);
  //
  n = 0;
  p = (const U8*)pSrc;
@@ -442,8 +444,8 @@ static U8* _EncodeData(U8* pPayload, const char* pSrc, unsigned int NumBytes) {
    *pPayload++ = (U8)NumBytes;
  } else {
    *pPayload++ = 255;
-    *pPayload++ = (NumBytes & 255);
    *pPayload++ = ((NumBytes >> 8) & 255);
+    *pPayload++ = (NumBytes & 255);
  }
  while (n < NumBytes) {
    *pPayload++ = *p++;
@@ -452,6 +454,38 @@ static U8* _EncodeData(U8* pPayload, const char* pSrc, unsigned int NumBytes) {
  return pPayload;
 }

+/*********************************************************************
+*
+*       _EncodeFloat()
+*
+*  Function description
+*    Encode a float value in variable-length format.
+*
+*  Parameters
+*    pPayload - Pointer to where value will be encoded.
+*    Value    - Value to be encoded.
+*
+*  Return value
+*    Pointer to the byte following the value, i.e. the first free
+*    byte in the payload and the next position to store payload
+*    content.
+*/
+static U8* _EncodeFloat(U8* pPayload, float Value) {
+   float Val = Value;
+   U8* pSysviewPointer;
+   U32* SysViewData;
+   pSysviewPointer = pPayload;
+   SysViewData = (U32*)&Val;
+   while((*SysViewData) > 0x7F) {
+     *pSysviewPointer++ = (U8)((*SysViewData) | 0x80);
+     (*SysViewData) >>= 7;
+   };
+   *pSysviewPointer++ = (U8)(*SysViewData);
+   pPayload = pSysviewPointer;
+
+   return pPayload;
+}
+
 /*********************************************************************
 *
 *       _EncodeStr()
@@ -475,38 +509,42 @@ static U8* _EncodeData(U8* pPayload, const char* pSrc, unsigned int NumBytes) {
 *    No more than 1 + Limit bytes will be encoded to the payload.
 */
 static U8 *_EncodeStr(U8 *pPayload, const char *pText, unsigned int Limit) {
-  unsigned int n;
-  unsigned int Len;
-  //
-  // Compute string len
-  //
-  Len = 0;
-  if (pText != NULL) {
-    while(*(pText + Len) != 0) {
-      Len++;
-    }
-    if (Len > Limit) {
-      Len = Limit;
-    }
-  }
-  //
-  // Write Len
-  //
-  if (Len < 255)  {
-    *pPayload++ = (U8)Len;
+  U8* pLen;
+  const char* sStart;
+
+  if (pText == NULL) {
+    *pPayload++ = (U8)0;
  } else {
-    *pPayload++ = 255;
-    *pPayload++ = (Len & 255);
-    *pPayload++ = ((Len >> 8) & 255);
+    sStart = pText; // Remember start of string.
+    //
+    // Save space to store count byte(s).
+    //
+    pLen = pPayload++;
+#if (SEGGER_SYSVIEW_MAX_STRING_LEN >= 255)  // Length always encodes in 3 bytes
+    pPayload += 2;
+#endif
+    //
+    // Limit string to maximum length and copy into payload buffer.
+    //
+    if (Limit > SEGGER_SYSVIEW_MAX_STRING_LEN) {
+      Limit = SEGGER_SYSVIEW_MAX_STRING_LEN;
+    }
+    while ((Limit-- > 0) && (*pText != '\0')) {
+      *pPayload++ = *pText++;
+    }
+    //
+    // Save string length to buffer.
+    //
+#if (SEGGER_SYSVIEW_MAX_STRING_LEN >= 255)  // Length always encodes in 3 bytes
+    Limit = (unsigned int)(pText - sStart);
+    *pLen++ = (U8)255;
+    *pLen++ = (U8)((Limit >> 8) & 255);
+    *pLen++ = (U8)(Limit & 255);
+#else   // Length always encodes in 1 byte
+    *pLen = (U8)(pText - sStart);
+#endif
  }
  //
-  // copy string
-  //
-  n = 0;
-  while (n < Len) {
-    *pPayload++ = *pText++;
-    n++;
-  }
  return pPayload;
 }

@@ -693,7 +731,6 @@ static void _SendSyncInfo(void) {
    for (n = 0; n < _NumModules; n++) {
      SEGGER_SYSVIEW_SendModule(n);
    }
-    SEGGER_SYSVIEW_SendModuleDescription();
  }
 }
 #endif  // (SEGGER_SYSVIEW_POST_MORTEM_MODE == 1)
@@ -1218,6 +1255,7 @@ static void _VPrintTarget(const char* sFormat, U32 Options, va_list* pParamList)
  unsigned int  FormatFlags;
  unsigned int  FieldWidth;
  U8*           pPayloadStart;
+  const char*   s;
 #if SEGGER_SYSVIEW_USE_STATIC_BUFFER == 0
  RECORD_START(SEGGER_SYSVIEW_INFO_SIZE + SEGGER_SYSVIEW_MAX_STRING_LEN + 1 + 2 * SEGGER_SYSVIEW_QUANTA_U32);
  SEGGER_SYSVIEW_LOCK();
@@ -1322,6 +1360,20 @@ static void _VPrintTarget(const char* sFormat, U32 Options, va_list* pParamList)
        v = va_arg(*pParamList, int);
        _PrintUnsigned(&BufferDesc, (unsigned int)v, 16u, NumDigits, FieldWidth, FormatFlags);
        break;
+      case 's':
+        s = va_arg(*pParamList, const char*);
+        if (s == NULL) {
+          s = "(null)";
+        }
+        do {
+          c = *s;
+          s++;
+          if (c == '\0') {
+            break;
+          }
+         _StoreChar(&BufferDesc, c);
+        } while (BufferDesc.Cnt < SEGGER_SYSVIEW_MAX_STRING_LEN);
+        break;
      case 'p':
        v = va_arg(*pParamList, int);
        _PrintUnsigned(&BufferDesc, (unsigned int)v, 16u, 8u, 8u, 0u);
@@ -1954,11 +2006,61 @@ void SEGGER_SYSVIEW_SendTaskInfo(const SEGGER_SYSVIEW_TASKINFO *pInfo) {
  ENCODE_U32(pPayload, SHRINK_ID(pInfo->TaskID));
  ENCODE_U32(pPayload, pInfo->StackBase);
  ENCODE_U32(pPayload, pInfo->StackSize);
-  ENCODE_U32(pPayload, 0); // Stack End, future use
+  ENCODE_U32(pPayload, pInfo->StackUsage);
  _SendPacket(pPayloadStart, pPayload, SYSVIEW_EVTID_STACK_INFO);
  RECORD_END();
 }

+/*********************************************************************
+*
+*       SEGGER_SYSVIEW_SendStackInfo()
+*
+*  Function description
+*    Send a Stack Info Packet, containing TaskId for identification,
+*    stack base, stack size and stack usage.
+*
+*
+*  Parameters
+*    pInfo - Pointer to stack information to send.
+*/
+void SEGGER_SYSVIEW_SendStackInfo(const SEGGER_SYSVIEW_STACKINFO *pInfo) {
+  U8* pPayload;
+  U8* pPayloadStart;
+  RECORD_START(SEGGER_SYSVIEW_INFO_SIZE + 4 * SEGGER_SYSVIEW_QUANTA_U32);
+  //
+  pPayload = pPayloadStart;
+  ENCODE_U32(pPayload, SHRINK_ID(pInfo->TaskID));
+  ENCODE_U32(pPayload, pInfo->StackBase);
+  ENCODE_U32(pPayload, pInfo->StackSize);
+  ENCODE_U32(pPayload, pInfo->StackUsage);
+
+  RECORD_END();
+}
+
+/*********************************************************************
+*
+*        SEGGER_SYSVIEW_SampleData()
+*
+*  Function description
+*    Send a Data Sample Packet, containing the data Id and the value.
+*
+*
+*  Parameters
+*    pInfo - Pointer to data sample struct to send.
+*/
+void SEGGER_SYSVIEW_SampleData(const SEGGER_SYSVIEW_DATA_SAMPLE *pInfo) {
+  U8* pPayload;
+  U8* pPayloadStart;
+  RECORD_START(SEGGER_SYSVIEW_INFO_SIZE + 2 * SEGGER_SYSVIEW_QUANTA_U32);
+  //
+  pPayload = pPayloadStart;
+  ENCODE_U32(pPayload, pInfo->ID);
+  pPayload = _EncodeFloat(pPayload, *(pInfo->pFloat_Value));
+  _SendPacket(pPayloadStart, pPayload, SYSVIEW_EVTID_DATA_SAMPLE);
+
+  RECORD_END();
+}
+
 /*********************************************************************
 *
 *       SEGGER_SYSVIEW_SendTaskList()
@@ -2448,6 +2550,63 @@ void SEGGER_SYSVIEW_NameResource(U32 ResourceId, const char* sName) {
  RECORD_END();
 }

+/*********************************************************************
+*
+*       SEGGER_SYSVIEW_RegisterData()
+*
+*  Function description
+*    Register data to sample the values via SystemView.
+*
+*    Register functions are usually set in the system description
+*    callback, to ensure it is only sent when the SystemView Application
+*    is connected.
+*
+*  Parameters
+*    pInfo - Struct containing all possible properties that can be sent via this registration event.
+*/
+void SEGGER_SYSVIEW_RegisterData(SEGGER_SYSVIEW_DATA_REGISTER* pInfo) {
+  U8* pPayload;
+  U8* pPayloadStart;
+  RECORD_START(SEGGER_SYSVIEW_INFO_SIZE + 8 * SEGGER_SYSVIEW_QUANTA_U32 + 1 + SEGGER_SYSVIEW_MAX_STRING_LEN);
+  //
+  pPayload = pPayloadStart;
+  ENCODE_U32(pPayload, SYSVIEW_EVTID_EX_REGISTER_DATA);
+  ENCODE_U32(pPayload, pInfo->ID);
+  pPayload = _EncodeStr(pPayload, pInfo->sName, SEGGER_SYSVIEW_MAX_STRING_LEN);
+
+  if (pInfo->sName != 0) {
+    ENCODE_U32(pPayload, pInfo->DataType);
+    ENCODE_U32(pPayload, pInfo->Offset);
+    ENCODE_U32(pPayload, pInfo->RangeMin);
+    ENCODE_U32(pPayload, pInfo->RangeMax);
+    pPayload = _EncodeFloat(pPayload, pInfo->ScalingFactor);
+    pPayload = _EncodeStr(pPayload, pInfo->sUnit, SEGGER_SYSVIEW_MAX_STRING_LEN);
+  } else if (pInfo->ScalingFactor != 0) {
+    ENCODE_U32(pPayload, pInfo->DataType);
+    ENCODE_U32(pPayload, pInfo->Offset);
+    ENCODE_U32(pPayload, pInfo->RangeMin);
+    ENCODE_U32(pPayload, pInfo->RangeMax);
+    pPayload = _EncodeFloat(pPayload, pInfo->ScalingFactor);
+  } else if (pInfo->RangeMax != 0) {
+    ENCODE_U32(pPayload, pInfo->DataType);
+    ENCODE_U32(pPayload, pInfo->Offset);
+    ENCODE_U32(pPayload, pInfo->RangeMin);
+    ENCODE_U32(pPayload, pInfo->RangeMax);
+  } else if (pInfo->RangeMin != 0) {
+    ENCODE_U32(pPayload, pInfo->DataType);
+    ENCODE_U32(pPayload, pInfo->Offset);
+    ENCODE_U32(pPayload, pInfo->RangeMin);
+  } else if (pInfo->Offset != 0) {
+    ENCODE_U32(pPayload, pInfo->DataType);
+    ENCODE_U32(pPayload, pInfo->Offset);
+  } else if (pInfo->DataType != 0) {
+    ENCODE_U32(pPayload, pInfo->DataType);
+  }
+
+  _SendPacket(pPayloadStart, pPayload, SYSVIEW_EVTID_EX);
+  RECORD_END();
+}
+
 /*********************************************************************
 *
 *       SEGGER_SYSVIEW_HeapDefine()
@@ -2820,9 +2979,6 @@ void SEGGER_SYSVIEW_RegisterModule(SEGGER_SYSVIEW_MODULE* pModule) {
    _NumModules++;
  }
  SEGGER_SYSVIEW_SendModule(0);
-  if (pModule->pfSendModuleDesc) {
-    pModule->pfSendModuleDesc();
-  }
  SEGGER_SYSVIEW_UNLOCK();
 }

@@ -2906,6 +3062,9 @@ void SEGGER_SYSVIEW_SendModule(U8 ModuleId) {
      _SendPacket(pPayloadStart, pPayload, SYSVIEW_EVTID_MODULEDESC);
      RECORD_END();
    }
+    if (pModule && pModule->pfSendModuleDesc) {
+      pModule->pfSendModuleDesc();
+    }
  }
 }

@@ -2986,6 +3145,39 @@ void SEGGER_SYSVIEW_PrintfHostEx(const char* s, U32 Options, ...) {
 #endif
 }

+/*********************************************************************
+*
+*       SEGGER_SYSVIEW_VPrintfHostEx()
+*
+*  Function description
+*    Print a string which is formatted on the host by the SystemView Application
+*    with Additional information.
+*
+*  Parameters
+*    s          - String to be formatted.
+*    Options    - Options for the string. i.e. Log level.
+*    pParamList - Pointer to the list of arguments for the format string
+*
+*  Additional information
+*    All format arguments are treated as 32-bit scalar values.
+*/
+void SEGGER_SYSVIEW_VPrintfHostEx(const char* s, U32 Options, va_list *pParamList) {
+#if SEGGER_SYSVIEW_PRINTF_IMPLICIT_FORMAT
+  int r;
+  va_list ParamListCopy;
+  va_copy(ParamListCopy, *pParamList);
+
+  r = _VPrintHost(s, Options, pParamList);
+
+  if (r == -1) {
+    _VPrintTarget(s, Options, &ParamListCopy);
+  }
+  va_end(ParamListCopy);
+#else
+  _VPrintHost(s, Options, pParamList);
+#endif
+}
+
 /*********************************************************************
 *
 *       SEGGER_SYSVIEW_PrintfHost()
@@ -3020,6 +3212,37 @@ void SEGGER_SYSVIEW_PrintfHost(const char* s, ...) {
 #endif
 }

+/*********************************************************************
+*
+*       SEGGER_SYSVIEW_VPrintfHost()
+*
+*  Function description
+*    Print a string which is formatted on the host by the SystemView Application.
+*
+*  Parameters
+*    s          - String to be formatted.
+*    pParamList - Pointer to the list of arguments for the format string
+*
+*  Additional information
+*    All format arguments are treated as 32-bit scalar values.
+*/
+void SEGGER_SYSVIEW_VPrintfHost(const char* s, va_list *pParamList) {
+#if SEGGER_SYSVIEW_PRINTF_IMPLICIT_FORMAT
+  int r;
+  va_list ParamListCopy;
+  va_copy(ParamListCopy, *pParamList);
+
+  r = _VPrintHost(s, SEGGER_SYSVIEW_LOG, pParamList);
+
+  if (r == -1) {
+    _VPrintTarget(s, SEGGER_SYSVIEW_LOG, &ParamListCopy);
+  }
+  va_end(ParamListCopy);
+#else
+  _VPrintHost(s, SEGGER_SYSVIEW_LOG, pParamList);
+#endif
+}
+
 /*********************************************************************
 *
 *       SEGGER_SYSVIEW_WarnfHost()
@@ -3055,6 +3278,38 @@ void SEGGER_SYSVIEW_WarnfHost(const char* s, ...) {
 #endif
 }

+/*********************************************************************
+*
+*       SEGGER_SYSVIEW_VWarnfHost()
+*
+*  Function description
+*    Print a warning string which is formatted on the host by
+*    the SystemView Application.
+*
+*  Parameters
+*    s          - String to be formatted.
+*    pParamList - Pointer to the list of arguments for the format string
+*
+*  Additional information
+*    All format arguments are treated as 32-bit scalar values.
+*/
+void SEGGER_SYSVIEW_VWarnfHost(const char* s, va_list *pParamList) {
+#if SEGGER_SYSVIEW_PRINTF_IMPLICIT_FORMAT
+  int r;
+  va_list ParamListCopy;
+  va_copy(ParamListCopy, *pParamList);
+
+  r = _VPrintHost(s, SEGGER_SYSVIEW_WARNING, pParamList);
+
+  if (r == -1) {
+    _VPrintTarget(s, SEGGER_SYSVIEW_WARNING, &ParamListCopy);
+  }
+  va_end(ParamListCopy);
+#else
+  _VPrintHost(s, SEGGER_SYSVIEW_WARNING, pParamList);
+#endif
+}
+
 /*********************************************************************
 *
 *       SEGGER_SYSVIEW_ErrorfHost()
@@ -3090,6 +3345,38 @@ void SEGGER_SYSVIEW_ErrorfHost(const char* s, ...) {
 #endif
 }

+/*********************************************************************
+*
+*       SEGGER_SYSVIEW_VErrorfHost()
+*
+*  Function description
+*    Print a warning string which is formatted on the host by
+*    the SystemView Application.
+*
+*  Parameters
+*    s          - String to be formatted.
+*    pParamList - Pointer to the list of arguments for the format string
+*
+*  Additional information
+*    All format arguments are treated as 32-bit scalar values.
+*/
+void SEGGER_SYSVIEW_VErrorfHost(const char* s, va_list *pParamList) {
+#if SEGGER_SYSVIEW_PRINTF_IMPLICIT_FORMAT
+  int r;
+  va_list ParamListCopy;
+  va_copy(ParamListCopy, *pParamList);
+
+  r = _VPrintHost(s, SEGGER_SYSVIEW_ERROR, pParamList);
+
+  if (r == -1) {
+    _VPrintTarget(s, SEGGER_SYSVIEW_ERROR, &ParamListCopy);
+  }
+  va_end(ParamListCopy);
+#else
+  _VPrintHost(s, SEGGER_SYSVIEW_ERROR, pParamList);
+#endif
+}
+
 /*********************************************************************
 *
 *       SEGGER_SYSVIEW_PrintfTargetEx()
@@ -3110,6 +3397,23 @@ void SEGGER_SYSVIEW_PrintfTargetEx(const char* s, U32 Options, ...) {
  va_end(ParamList);
 }

+/*********************************************************************
+*
+*       SEGGER_SYSVIEW_VPrintfTargetEx()
+*
+*  Function description
+*    Print a string which is formatted on the target before sent to
+*    the host with Additional information.
+*
+*  Parameters
+*    s          - String to be formatted.
+*    Options    - Options for the string. i.e. Log level.
+*    pParamList - Pointer to the list of arguments for the format string
+*/
+void SEGGER_SYSVIEW_VPrintfTargetEx(const char* s, U32 Options, va_list *pParamList) {
+  _VPrintTarget(s, Options, pParamList);
+}
+
 /*********************************************************************
 *
 *       SEGGER_SYSVIEW_PrintfTarget()
@@ -3129,6 +3433,22 @@ void SEGGER_SYSVIEW_PrintfTarget(const char* s, ...) {
  va_end(ParamList);
 }

+/*********************************************************************
+*
+*       SEGGER_SYSVIEW_VPrintfTarget()
+*
+*  Function description
+*    Print a string which is formatted on the target before sent to
+*    the host.
+*
+*  Parameters
+*    s          - String to be formatted.
+*    pParamList - Pointer to the list of arguments for the format string
+*/
+void SEGGER_SYSVIEW_VPrintfTarget(const char* s, va_list* pParamList) {
+  _VPrintTarget(s, SEGGER_SYSVIEW_LOG, pParamList);
+}
+
 /*********************************************************************
 *
 *       SEGGER_SYSVIEW_WarnfTarget()
@@ -3148,6 +3468,22 @@ void SEGGER_SYSVIEW_WarnfTarget(const char* s, ...) {
  va_end(ParamList);
 }

+/*********************************************************************
+*
+*       SEGGER_SYSVIEW_VWarnfTarget()
+*
+*  Function description
+*    Print a warning string which is formatted on the target before
+*    sent to the host.
+*
+*  Parameters
+*    s          - String to be formatted.
+*    pParamList - Pointer to the list of arguments for the format string
+*/
+void SEGGER_SYSVIEW_VWarnfTarget(const char* s, va_list* pParamList) {
+  _VPrintTarget(s, SEGGER_SYSVIEW_WARNING, pParamList);
+}
+
 /*********************************************************************
 *
 *       SEGGER_SYSVIEW_ErrorfTarget()
@@ -3166,6 +3502,22 @@ void SEGGER_SYSVIEW_ErrorfTarget(const char* s, ...) {
  _VPrintTarget(s, SEGGER_SYSVIEW_ERROR, &ParamList);
  va_end(ParamList);
 }
+
+/*********************************************************************
+*
+*       SEGGER_SYSVIEW_VErrorfTarget()
+*
+*  Function description
+*    Print an error string which is formatted on the target before
+*    sent to the host.
+*
+*  Parameters
+*    s          - String to be formatted.
+*    pParamList - Pointer to the list of arguments for the format string
+*/
+void SEGGER_SYSVIEW_VErrorfTarget(const char* s, va_list* pParamList) {
+  _VPrintTarget(s, SEGGER_SYSVIEW_ERROR, pParamList);
+}
 #endif // SEGGER_SYSVIEW_EXCLUDE_PRINTF

 /*********************************************************************
@@ -3,14 +3,14 @@
 *
 * SPDX-License-Identifier: BSD-1-Clause
 *
- * SPDX-FileContributor: 2023 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileContributor: 2023-2025 Espressif Systems (Shanghai) CO LTD
 */
 /*********************************************************************
 *                    SEGGER Microcontroller GmbH                     *
 *                        The Embedded Experts                        *
 **********************************************************************
 *                                                                    *
-*            (c) 1995 - 2021 SEGGER Microcontroller GmbH             *
+*            (c) 1995 - 2024 SEGGER Microcontroller GmbH             *
 *                                                                    *
 *       www.segger.com     Support: support@segger.com               *
 *                                                                    *
@@ -49,13 +49,13 @@
 *                                                                    *
 **********************************************************************
 *                                                                    *
-*       SystemView version: 3.42                                    *
+*       SystemView version: 3.56                                    *
 *                                                                    *
 **********************************************************************
 -------------------------- END-OF-HEADER -----------------------------
 File    : SEGGER_SYSVIEW.h
 Purpose : System visualization API.
-Revision: $Rev: 28237 $
+Revision: $Rev: 28768 $
 */

 #ifndef SEGGER_SYSVIEW_H
@@ -123,7 +123,7 @@ extern "C" {
 #define   SYSVIEW_EVTID_TIMER_EXIT        20
 #define   SYSVIEW_EVTID_STACK_INFO        21
 #define   SYSVIEW_EVTID_MODULEDESC        22
-
+#define   SYSVIEW_EVTID_DATA_SAMPLE       23
 #define   SYSVIEW_EVTID_INIT              24
 #define   SYSVIEW_EVTID_NAME_RESOURCE     25
 #define   SYSVIEW_EVTID_PRINT_FORMATTED   26
@@ -135,12 +135,13 @@ extern "C" {
 //
 // SystemView extended events. Sent with ID 31.
 //
-#define   SYSVIEW_EVTID_EX_MARK            0
-#define   SYSVIEW_EVTID_EX_NAME_MARKER     1
-#define   SYSVIEW_EVTID_EX_HEAP_DEFINE     2
-#define   SYSVIEW_EVTID_EX_HEAP_ALLOC      3
-#define   SYSVIEW_EVTID_EX_HEAP_ALLOC_EX   4
-#define   SYSVIEW_EVTID_EX_HEAP_FREE       5
+#define   SYSVIEW_EVTID_EX_MARK           0
+#define   SYSVIEW_EVTID_EX_NAME_MARKER    1
+#define   SYSVIEW_EVTID_EX_HEAP_DEFINE    2
+#define   SYSVIEW_EVTID_EX_HEAP_ALLOC     3
+#define   SYSVIEW_EVTID_EX_HEAP_ALLOC_EX  4
+#define   SYSVIEW_EVTID_EX_HEAP_FREE      5
+#define   SYSVIEW_EVTID_EX_REGISTER_DATA  6
 //
 // Event masks to disable/enable events
 //
@@ -167,7 +168,7 @@ extern "C" {
 #define   SYSVIEW_EVTMASK_TIMER_EXIT        (1 << SYSVIEW_EVTID_TIMER_EXIT)
 #define   SYSVIEW_EVTMASK_STACK_INFO        (1 << SYSVIEW_EVTID_STACK_INFO)
 #define   SYSVIEW_EVTMASK_MODULEDESC        (1 << SYSVIEW_EVTID_MODULEDESC)
-
+#define   SYSVIEW_EVTMASK_DATA_SAMPLE       (1 << SYSVIEW_EVTID_DATA_SAMPLE)
 #define   SYSVIEW_EVTMASK_INIT              (1 << SYSVIEW_EVTID_INIT)
 #define   SYSVIEW_EVTMASK_NAME_RESOURCE     (1 << SYSVIEW_EVTID_NAME_RESOURCE)
 #define   SYSVIEW_EVTMASK_PRINT_FORMATTED   (1 << SYSVIEW_EVTID_PRINT_FORMATTED)
@@ -202,8 +203,42 @@ typedef struct {
  U32          Prio;
  U32          StackBase;
  U32          StackSize;
+  U32          StackUsage;
 } SEGGER_SYSVIEW_TASKINFO;

+typedef struct {
+  U32          TaskID;
+  U32          StackBase;
+  U32          StackSize;
+  U32          StackUsage;
+} SEGGER_SYSVIEW_STACKINFO;
+
+typedef struct {
+  U32          ID;
+  union {
+    U32*   pU32_Value;
+    I32*   pI32_Value;
+    float* pFloat_Value;
+  };
+} SEGGER_SYSVIEW_DATA_SAMPLE;
+
+typedef enum {
+  SEGGER_SYSVIEW_TYPE_U32   = 0,
+  SEGGER_SYSVIEW_TYPE_I32   = 1,
+  SEGGER_SYSVIEW_TYPE_FLOAT = 2
+} SEGGER_SYSVIEW_DATA_TYPE;
+
+typedef struct {
+  U32                           ID;
+  SEGGER_SYSVIEW_DATA_TYPE      DataType;
+  I32                           Offset;
+  I32                           RangeMin;
+  I32                           RangeMax;
+  float                         ScalingFactor;
+  const char*                   sName;
+  const char*                   sUnit;
+}  SEGGER_SYSVIEW_DATA_REGISTER;
+
 typedef struct SEGGER_SYSVIEW_MODULE_STRUCT SEGGER_SYSVIEW_MODULE;

 struct SEGGER_SYSVIEW_MODULE_STRUCT {
@@ -247,8 +282,8 @@ EXTERN unsigned int SEGGER_SYSVIEW_InterruptId;
 */

 typedef struct {
-  U64  (*pfGetTime)      (void);
-  void (*pfSendTaskList) (void);
+  U64  (*pfGetTime)               (void);
+  void (*pfSendTaskList)          (void);
 } SEGGER_SYSVIEW_OS_API;

 /*********************************************************************
@@ -262,9 +297,13 @@ void SEGGER_SYSVIEW_Stop                          (void);
 void SEGGER_SYSVIEW_GetSysDesc                    (void);
 void SEGGER_SYSVIEW_SendTaskList                  (void);
 void SEGGER_SYSVIEW_SendTaskInfo                  (const SEGGER_SYSVIEW_TASKINFO* pInfo);
+void SEGGER_SYSVIEW_SendStackInfo                 (const SEGGER_SYSVIEW_STACKINFO* pInfo);
 void SEGGER_SYSVIEW_SendSysDesc                   (const char* sSysDesc);
 int  SEGGER_SYSVIEW_IsStarted                     (void);
 int  SEGGER_SYSVIEW_GetChannelID                  (void);
+
+void  SEGGER_SYSVIEW_SampleData                   (const SEGGER_SYSVIEW_DATA_SAMPLE *pInfo);
+
 // Checks whether tracing has been started
 U8 SEGGER_SYSVIEW_Started(void);

@@ -311,6 +350,7 @@ void SEGGER_SYSVIEW_HeapAllocEx                   (void* pHeap, void* pUserData,
 void SEGGER_SYSVIEW_HeapFree                      (void* pHeap, void* pUserData);

 void SEGGER_SYSVIEW_NameResource                  (U32 ResourceId, const char* sName);
+void SEGGER_SYSVIEW_RegisterData                  ( SEGGER_SYSVIEW_DATA_REGISTER* pInfo);

 int  SEGGER_SYSVIEW_SendPacket                    (U8* pPacket, U8* pPayloadEnd, unsigned int EventId);

@@ -341,13 +381,21 @@ void SEGGER_SYSVIEW_SendNumModules                (void);
 */
 #ifndef SEGGER_SYSVIEW_EXCLUDE_PRINTF // Define in project to avoid warnings about variable parameter list
 void SEGGER_SYSVIEW_PrintfHostEx                  (const char* s, U32 Options, ...);
+void SEGGER_SYSVIEW_VPrintfHostEx                 (const char* s, U32 Options, va_list* pParamList);
 void SEGGER_SYSVIEW_PrintfTargetEx                (const char* s, U32 Options, ...);
+void SEGGER_SYSVIEW_VPrintfTargetEx               (const char* s, U32 Options, va_list* pParamList);
 void SEGGER_SYSVIEW_PrintfHost                    (const char* s, ...);
+void SEGGER_SYSVIEW_VPrintfHost                   (const char* s, va_list* pParamList);
 void SEGGER_SYSVIEW_PrintfTarget                  (const char* s, ...);
+void SEGGER_SYSVIEW_VPrintfTarget                 (const char* s, va_list* pParamList);
 void SEGGER_SYSVIEW_WarnfHost                     (const char* s, ...);
+void SEGGER_SYSVIEW_VWarnfHost                    (const char* s, va_list* pParamList);
 void SEGGER_SYSVIEW_WarnfTarget                   (const char* s, ...);
+void SEGGER_SYSVIEW_VWarnfTarget                  (const char* s, va_list* pParamList);
 void SEGGER_SYSVIEW_ErrorfHost                    (const char* s, ...);
+void SEGGER_SYSVIEW_VErrorfHost                   (const char* s, va_list* pParamList);
 void SEGGER_SYSVIEW_ErrorfTarget                  (const char* s, ...);
+void SEGGER_SYSVIEW_VErrorfTarget                 (const char* s, va_list* pParamList);
 #endif

 void SEGGER_SYSVIEW_Print                         (const char* s);
@@ -3,14 +3,14 @@
 *
 * SPDX-License-Identifier: BSD-1-Clause
 *
- * SPDX-FileContributor: 2023 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileContributor: 2023-2025 Espressif Systems (Shanghai) CO LTD
 */
 /*********************************************************************
 *                    SEGGER Microcontroller GmbH                     *
 *                        The Embedded Experts                        *
 **********************************************************************
 *                                                                    *
-*            (c) 1995 - 2021 SEGGER Microcontroller GmbH             *
+*            (c) 1995 - 2024 SEGGER Microcontroller GmbH             *
 *                                                                    *
 *       www.segger.com     Support: support@segger.com               *
 *                                                                    *
@@ -49,7 +49,7 @@
 *                                                                    *
 **********************************************************************
 *                                                                    *
-*       SystemView version: 3.42                                    *
+*       SystemView version: 3.56                                    *
 *                                                                    *
 **********************************************************************
 -------------------------- END-OF-HEADER -----------------------------
@@ -72,6 +72,8 @@ Revision: $Rev: 26230 $
 #include "SEGGER_SYSVIEW_Conf.h"
 #include "SEGGER_RTT_Conf.h"

+#include "esp_assert.h"
+
 #ifdef __cplusplus
 extern "C" {
 #endif
@@ -370,12 +372,14 @@ extern "C" {
  #define SEGGER_SYSVIEW_MAX_STRING_LEN           128
 #endif

+ESP_STATIC_ASSERT(SEGGER_SYSVIEW_MAX_STRING_LEN < 255, "SEGGER Sysview string length must be less than 255.");
+
 /*********************************************************************
 *
 *       Define: SEGGER_SYSVIEW_SUPPORT_LONG_ID
 *
 *  Description
-*    It set, support enconding Evend Ids longer than 14 bit.
+*    It set, support encoding Evend Ids longer than 14 bit.
 *  Default
 *    1
 */
@@ -388,7 +392,7 @@ extern "C" {
 *       Define: SEGGER_SYSVIEW_SUPPORT_LONG_DATA
 *
 *  Description
-*    It set, support enconding event data longer than 14 bit.
+*    It set, support encoding event data longer than 14 bit.
 *  Default
 *    0
 */
@@ -517,7 +521,7 @@ extern "C" {
 *       Define: SEGGER_SYSVIEW_SYNC_PERIOD_SHIFT
 *
 *  Description
-*    Configure how frequently syncronization is sent in post-mortem
+*    Configure how frequently synchronization is sent in post-mortem
 *    mode.
 *  Default
 *    8: (1 << 8) = Every 256 Events.
@@ -8,7 +8,7 @@
 *                        The Embedded Experts                        *
 **********************************************************************
 *                                                                    *
-*            (c) 1995 - 2021 SEGGER Microcontroller GmbH             *
+*            (c) 1995 - 2024 SEGGER Microcontroller GmbH             *
 *                                                                    *
 *       www.segger.com     Support: support@segger.com               *
 *                                                                    *
@@ -47,7 +47,7 @@
 *                                                                    *
 **********************************************************************
 *                                                                    *
-*       SystemView version: 3.42                                    *
+*       SystemView version: 3.56                                    *
 *                                                                    *
 **********************************************************************
 -------------------------- END-OF-HEADER -----------------------------
@@ -3,7 +3,7 @@
 *
 * SPDX-License-Identifier: BSD-1-Clause
 *
- * SPDX-FileContributor: 2017-2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileContributor: 2017-2025 Espressif Systems (Shanghai) CO LTD
 */
 /*********************************************************************
 *                    SEGGER Microcontroller GmbH                     *
@@ -83,11 +83,7 @@ extern const SEGGER_SYSVIEW_OS_API SYSVIEW_X_OS_TraceAPI;
 // The target device name
 #define SYSVIEW_DEVICE_NAME     CONFIG_IDF_TARGET
 // The target core name
-#if CONFIG_IDF_TARGET_ARCH_XTENSA
-#define SYSVIEW_CORE_NAME       "xtensa"
-#elif CONFIG_IDF_TARGET_ARCH_RISCV
-#define SYSVIEW_CORE_NAME       "riscv"
-#endif
+#define SYSVIEW_CORE_NAME       "core0" // In dual core, this will be renamed by OpenOCD as core1

 // Determine which timer to use as timestamp source
 #if CONFIG_APPTRACE_SV_TS_SOURCE_CCOUNT
@@ -108,7 +108,7 @@ static void _cbSendTaskList(void) {
 *    Called from SystemView when asked by the host, returns the
 *    current system time in micro seconds.
 */
-static U64 _cbGetTime(void) {
+__attribute__((unused)) static U64 _cbGetTime(void) {
  U64 Time;

  Time = xTaskGetTickCountFromISR();
@@ -260,7 +260,10 @@ void SYSVIEW_SendTaskInfo(U32 TaskID, const char* sName, unsigned Prio, U32 Stac
 */
 // Callbacks provided to SYSTEMVIEW by FreeRTOS
 const SEGGER_SYSVIEW_OS_API SYSVIEW_X_OS_TraceAPI = {
-  _cbGetTime,
+  /* Callback _cbGetTime locks xKernelLock inside xTaskGetTickCountFromISR, this can cause deadlock on multi-core.
+     To prevent deadlock, always lock xKernelLock before s_sys_view_lock. Omitting the callback here results in sending
+     SYSVIEW_EVTID_SYSTIME_CYCLES events instead of SYSVIEW_EVTID_SYSTIME_US */
+  NULL,
  _cbSendTaskList,
 };

@@ -21,7 +21,7 @@ const static char *TAG = "sysview_heap_trace";
 #endif

 static SEGGER_SYSVIEW_MODULE s_esp_sysview_heap_module = {
-    .sModule = "ESP32 SystemView Heap Tracing Module",
+    .sModule = "M=ESP32 SystemView Heap Tracing Module",
    .NumEvents = 2,
 };

@@ -199,13 +199,18 @@ esp_err_t esp_ota_write(esp_ota_handle_t handle, const void *data, size_t size)
        return ESP_ERR_INVALID_ARG;
    }

+    if (size == 0) {
+        ESP_LOGD(TAG, "write data size is 0");
+        return ESP_OK;
+    }
+
    // find ota handle in linked list
    for (it = LIST_FIRST(&s_ota_ops_entries_head); it != NULL; it = LIST_NEXT(it, entries)) {
        if (it->handle == handle) {
            if (it->need_erase) {
                // must erase the partition before writing to it
-                uint32_t first_sector = it->wrote_size / SPI_FLASH_SEC_SIZE;
-                uint32_t last_sector = (it->wrote_size + size) / SPI_FLASH_SEC_SIZE;
+                uint32_t first_sector = it->wrote_size / SPI_FLASH_SEC_SIZE; // first affected sector
+                uint32_t last_sector = (it->wrote_size + size - 1) / SPI_FLASH_SEC_SIZE; // last affected sector

                ret = ESP_OK;
                if ((it->wrote_size % SPI_FLASH_SEC_SIZE) == 0) {
@@ -960,6 +965,7 @@ esp_err_t esp_ota_revoke_secure_boot_public_key(esp_ota_secure_boot_public_key_i
    }

    const esp_partition_t *running_app_part = esp_ota_get_running_partition();
+    esp_err_t ret = ESP_FAIL;
 #ifdef CONFIG_BOOTLOADER_APP_ROLLBACK_ENABLE
    esp_ota_img_states_t running_app_state;
    ret = esp_ota_get_state_partition(running_app_part, &running_app_state);
@@ -974,7 +980,7 @@ esp_err_t esp_ota_revoke_secure_boot_public_key(esp_ota_secure_boot_public_key_i
 #endif

    esp_secure_boot_key_digests_t trusted_keys;
-    esp_err_t ret = esp_secure_boot_read_key_digests(&trusted_keys);
+    ret = esp_secure_boot_read_key_digests(&trusted_keys);
    if (ret != ESP_OK) {
        ESP_LOGE(TAG, "Could not read the secure boot key digests from efuse. Aborting..");
        return ESP_FAIL;
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
 *
 * SPDX-License-Identifier: Apache-2.0
 */
@@ -111,7 +111,7 @@ esp_err_t esp_ota_begin(const esp_partition_t* partition, size_t image_size, esp
 * @param size    Size of data buffer in bytes.
 *
 * @return
- *    - ESP_OK: Data was written to flash successfully.
+ *    - ESP_OK: Data was written to flash successfully, or size = 0
 *    - ESP_ERR_INVALID_ARG: handle is invalid.
 *    - ESP_ERR_OTA_VALIDATE_FAILED: First byte of image contains invalid app image magic byte.
 *    - ESP_ERR_FLASH_OP_TIMEOUT or ESP_ERR_FLASH_OP_FAIL: Flash write failed.
@@ -1,7 +0,0 @@
-# Documentation: .gitlab/ci/README.md#manifest-file-to-control-the-buildtest-apps
-
-components/app_update/test_apps:
-  disable:
-    - if: IDF_TARGET in ["esp32c6", "esp32h2", "esp32p4"]
-      temporary: true
-      reason: target esp32c6, esp32h2, esp32p4 is not supported yet # TODO: IDF-8068
@@ -1,32 +0,0 @@
-# SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
-# SPDX-License-Identifier: Unlicense OR CC0-1.0
-import re
-
-import pytest
-from pytest_embedded import Dut
-
-DEFAULT_TIMEOUT = 20
-TEST_SUBMENU_PATTERN_PYTEST = re.compile(rb'\s+\((\d+)\)\s+"([^"]+)"\r?\n')
-
-
-def run_multiple_stages(dut: Dut, test_case_num: int, stages: int) -> None:
-    for stage in range(1, stages + 1):
-        dut.write(str(test_case_num))
-        dut.expect(TEST_SUBMENU_PATTERN_PYTEST, timeout=DEFAULT_TIMEOUT)
-        dut.write(str(stage))
-        if stage != stages:
-            dut.expect_exact('Press ENTER to see the list of tests.')
-
-
-@pytest.mark.supported_targets
-@pytest.mark.temp_skip_ci(targets=['esp32c6', 'esp32h2'], reason='c6/h2 support TBD')
-@pytest.mark.generic
-def test_app_update(dut: Dut) -> None:
-    extra_data = dut.parse_test_menu()
-    for test_case in extra_data:
-        if test_case.type != 'multi_stage':
-            dut.write(str(test_case.index))
-        else:
-            run_multiple_stages(dut, test_case.index, len(test_case.subcases))
-        dut.expect_unity_test_output(timeout=90)
-        dut.expect_exact("Enter next test, or 'enter' to see menu")
@@ -0,0 +1,12 @@
+# Documentation: .gitlab/ci/README.md#manifest-file-to-control-the-buildtest-apps
+
+components/app_update/test_apps:
+  enable:
+    - if: CONFIG_NAME == "defaults" and IDF_TARGET != "linux"
+    - if: CONFIG_NAME == "xip_psram" and IDF_TARGET in ["esp32s2", "esp32s3"]
+    # S2 doesn't have ROM for flash
+    - if: CONFIG_NAME == "xip_psram_with_rom_impl" and IDF_TARGET in ["esp32s3"]
+  disable:
+    - if: IDF_TARGET in ["esp32c6", "esp32h2", "esp32p4"]
+      temporary: true
+      reason: target esp32c6, esp32h2 are not supported yet # TODO: IDF-8068
@@ -2,6 +2,7 @@
 cmake_minimum_required(VERSION 3.16)

 set(EXTRA_COMPONENT_DIRS "$ENV{IDF_PATH}/tools/unit-test-app/components")
+set(COMPONENTS main)

 include($ENV{IDF_PATH}/tools/cmake/project.cmake)
 project(app_update_test)
@@ -1,4 +1,4 @@
 idf_component_register(SRC_DIRS "."
                       PRIV_INCLUDE_DIRS "."
-                       PRIV_REQUIRES cmock test_utils app_update bootloader_support nvs_flash driver spi_flash
+                       PRIV_REQUIRES cmock test_utils app_update bootloader_support nvs_flash driver spi_flash esp_psram
                      WHOLE_ARCHIVE)
@@ -6,6 +6,7 @@
 #include <stdio.h>
 #include <stdlib.h>
 #include <string.h>
+#include "esp_log.h"
 #include <freertos/FreeRTOS.h>
 #include <freertos/task.h>
 #include <freertos/semphr.h>
@@ -113,3 +114,11 @@ TEST_CASE("esp_ota_get_partition_description", "[ota]")
    };
    TEST_ESP_ERR(ESP_ERR_NOT_FOUND, bootloader_common_get_partition_description(&not_app_pos, &app_desc1));
 }
+
+TEST_CASE("esp_ota_get_running_partition points to correct address", "[spi_flash]")
+{
+    const esp_partition_t *factory = esp_partition_find_first(ESP_PARTITION_TYPE_APP, ESP_PARTITION_SUBTYPE_ANY, "factory");
+    const esp_partition_t* part = esp_ota_get_running_partition();
+    ESP_LOGI("running bin", "0x%p", (void*)part->address);
+    TEST_ASSERT_EQUAL_HEX32(factory->address, part->address);
+}
@@ -842,7 +842,7 @@ static void test_flow6(void)
 TEST_CASE_MULTIPLE_STAGES("Switching between factory, OTA0 using esp_ota_write_with_offset", "[app_update][timeout=90][reset=DEEPSLEEP_RESET, DEEPSLEEP_RESET]", start_test, test_flow6, test_flow6);

 //IDF-5145
-TEST_CASE("Test bootloader_common_get_sha256_of_partition returns ESP_ERR_IMAGE_INVALID when image is ivalid", "[partitions]")
+TEST_CASE("Test bootloader_common_get_sha256_of_partition returns ESP_ERR_IMAGE_INVALID when image is invalid", "[partitions]")
 {
    const esp_partition_t *cur_app = esp_ota_get_running_partition();
    ESP_LOGI(TAG, "copy current app to next part");
@@ -0,0 +1,51 @@
+# SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
+# SPDX-License-Identifier: Unlicense OR CC0-1.0
+import re
+
+import pytest
+from pytest_embedded import Dut
+
+DEFAULT_TIMEOUT = 20
+TEST_SUBMENU_PATTERN_PYTEST = re.compile(rb'\s+\((\d+)\)\s+"([^"]+)"\r?\n')
+
+
+@pytest.mark.supported_targets
+@pytest.mark.temp_skip_ci(targets=['esp32c6', 'esp32h2'], reason='c6/h2 support TBD')
+@pytest.mark.generic
+@pytest.mark.parametrize(
+    'config',
+    [
+        'defaults',
+    ],
+    indirect=True,
+)
+def test_app_update(dut: Dut) -> None:
+    dut.run_all_single_board_cases(timeout=90)
+
+
+@pytest.mark.supported_targets
+@pytest.mark.temp_skip_ci(targets=['esp32c6', 'esp32h2'], reason='c6/h2 support TBD')
+@pytest.mark.generic
+@pytest.mark.parametrize(
+    'config',
+    [
+        'xip_psram',
+    ],
+    indirect=True,
+)
+def test_app_update_xip_psram(dut: Dut) -> None:
+    dut.run_all_single_board_cases(timeout=90)
+
+
+@pytest.mark.supported_targets
+@pytest.mark.temp_skip_ci(targets=['esp32c6', 'esp32h2'], reason='c6/h2 support TBD')
+@pytest.mark.generic
+@pytest.mark.parametrize(
+    'config',
+    [
+        'xip_psram_with_rom_impl',
+    ],
+    indirect=True,
+)
+def test_app_update_xip_psram_rom_impl(dut: Dut) -> None:
+    dut.run_all_single_board_cases(timeout=90)
@@ -0,0 +1,2 @@
+# don't delete.
+# used for CI to compile a default config when 'sdkconfig.ci.xxxx' is exist
@@ -1,3 +1,3 @@
-CONFIG_IDF_TARGET="esp32s2"
+CONFIG_SPIRAM=y
 CONFIG_SPIRAM_FETCH_INSTRUCTIONS=y
 CONFIG_SPIRAM_RODATA=y
@@ -0,0 +1,4 @@
+CONFIG_SPIRAM=y
+CONFIG_SPIRAM_FETCH_INSTRUCTIONS=y
+CONFIG_SPIRAM_RODATA=y
+CONFIG_SPI_FLASH_ROM_IMPL=y
@@ -0,0 +1,2 @@
+CONFIG_IDF_TARGET="esp32s3"
+CONFIG_BOOTLOADER_NUM_PIN_APP_TEST=18
@@ -23,7 +23,6 @@ menu "Bootloader config"
            - The default "Size" setting will add the -0s flag to CFLAGS.
            - The "Debug" setting will add the -Og flag to CFLAGS.
            - The "Performance" setting will add the -O2 flag to CFLAGS.
-            - The "None" setting will add the -O0 flag to CFLAGS.

            Note that custom optimization levels may be unsupported.

@@ -34,7 +33,9 @@ menu "Bootloader config"
        config BOOTLOADER_COMPILER_OPTIMIZATION_PERF
            bool "Optimize for performance (-O2)"
        config BOOTLOADER_COMPILER_OPTIMIZATION_NONE
-            bool "Debug without optimization (-O0)"
+            bool "Debug without optimization (-O0) (Deprecated, will be removed in IDF v6.0)"
+            depends on IDF_TARGET_ARCH_XTENSA || IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32C2
+
    endchoice

    choice BOOTLOADER_LOG_LEVEL
@@ -139,7 +140,7 @@ menu "Bootloader config"

        config BOOTLOADER_CACHE_32BIT_ADDR_OCTAL_FLASH
            bool
-            default y if ESPTOOLPY_OCT_FLASH && SPI_FLASH_32BIT_ADDRESS
+            default y if ESPTOOLPY_OCT_FLASH && BOOTLOADER_FLASH_32BIT_ADDR
            default n

    endmenu
@@ -458,6 +459,21 @@ menu "Bootloader config"
            (The application and bootoloader must be compiled with the same option).
            The RTC FAST memory has access only through PRO_CPU.

+    config BOOTLOADER_CUSTOM_RESERVE_RTC_IN_CRC
+        bool "Include custom memory in the CRC calculation"
+        depends on BOOTLOADER_CUSTOM_RESERVE_RTC
+        default n
+        help
+            This option allows the customer to use the legacy bootloader behavior when the
+            RTC FAST memory CRC calculation takes place. When this option is enabled, the
+            allocated user custom data will be taken into account in the CRC calculcation.
+            This means that any change to the custom data would need a CRC update to prevent
+            the bootloader from marking this data as corrupted.
+            If this option is disabled, the custom data will not be taken into account when
+            calculating the RTC FAST memory CRC. The user custom data can be changed freely,
+            without the need to update the CRC.
+            THIS OPTION MUST BE THE SAME FOR BOTH THE BOOTLOADER AND THE APPLICATION BUILDS.
+
    config BOOTLOADER_CUSTOM_RESERVE_RTC_SIZE
        hex "Size in bytes for custom purposes"
        default 0
@@ -777,6 +793,33 @@ menu "Security features"
            This can lead to permanent bricking of the device, in case all keys are revoked
            because of signature verification failure.

+    config SECURE_BOOT_V2_ALLOW_EFUSE_RD_DIS
+        bool "Do not disable the ability to further read protect eFuses"
+        depends on SECURE_BOOT_V2_ENABLED
+        default n
+        help
+            If not set (default, recommended), on first boot the bootloader will burn the WR_DIS_RD_DIS
+            efuse when Secure Boot is enabled. This prevents any more efuses from being read protected.
+
+            If this option is set, it will remain possible to write the EFUSE_RD_DIS efuse field after Secure
+            Boot is enabled. This may allow an attacker to read-protect the BLK2 efuse (for ESP32) and
+            BLOCK4-BLOCK10 (i.e. BLOCK_KEY0-BLOCK_KEY5)(for other chips) holding the secure boot public key digest,
+            causing an immediate denial of service and possibly allowing an additional fault injection attack to
+            bypass the signature protection.
+
+            The option must be set when you need to program any read-protected key type into the efuses,
+            e.g., HMAC, ECDSA etc. after secure boot has already been enabled on the device.
+            Please refer to secure boot V2 documentation guide for more details.
+
+            NOTE: Once a BLOCK is read-protected, the application will read all zeros from that block
+
+            NOTE: If "UART ROM download mode (Permanently disabled (recommended))" or
+            "UART ROM download mode (Permanently switch to Secure mode (recommended))" is set,
+            then it is __NOT__ possible to read/write efuses using espefuse.py utility.
+            However, efuse can be read/written from the application
+
+            Please refer to the Secure Boot V2 documentation guide for more information.
+
    config SECURE_BOOT_FLASH_BOOTLOADER_DEFAULT
        bool "Flash bootloader along with other artifacts when using the default flash command"
        depends on SECURE_BOOT_V2_ENABLED && SECURE_BOOT_BUILD_SIGNED_BINARIES
@@ -833,7 +876,6 @@ menu "Security features"
        bool "Enable flash encryption on boot (READ DOCS FIRST)"
        default N
        select SPI_FLASH_ENABLE_ENCRYPTED_READ_WRITE
-        select NVS_ENCRYPTION
        help
            If this option is set, flash contents will be encrypted by the bootloader on first boot.

@@ -958,26 +1000,6 @@ menu "Security features"
                image to this length. It is generally not recommended to set this option, unless you have a legacy
                partitioning scheme which doesn't support 64KB aligned partition lengths.

-        config SECURE_BOOT_V2_ALLOW_EFUSE_RD_DIS
-            bool "Allow additional read protecting of efuses"
-            depends on SECURE_BOOT_INSECURE && SECURE_BOOT_V2_ENABLED
-            help
-                If not set (default, recommended), on first boot the bootloader will burn the WR_DIS_RD_DIS
-                efuse when Secure Boot is enabled. This prevents any more efuses from being read protected.
-
-                If this option is set, it will remain possible to write the EFUSE_RD_DIS efuse field after Secure
-                Boot is enabled. This may allow an attacker to read-protect the BLK2 efuse (for ESP32) and
-                BLOCK4-BLOCK10 (i.e. BLOCK_KEY0-BLOCK_KEY5)(for other chips) holding the public key digest, causing an
-                immediate denial of service and possibly allowing an additional fault injection attack to
-                bypass the signature protection.
-
-                NOTE: Once a BLOCK is read-protected, the application will read all zeros from that block
-
-                NOTE: If "UART ROM download mode (Permanently disabled (recommended))" or
-                "UART ROM download mode (Permanently switch to Secure mode (recommended))" is set,
-                then it is __NOT__ possible to read/write efuses using espefuse.py utility.
-                However, efuse can be read/written from the application
-
        config SECURE_BOOT_ALLOW_UNUSED_DIGEST_SLOTS
            bool "Leave unused digest slots available (not revoke)"
            depends on SECURE_BOOT_INSECURE && SOC_EFUSE_REVOKE_BOOT_KEY_DIGESTS
@@ -1072,6 +1094,22 @@ menu "Security features"
                DIS_DOWNLOAD_MANUAL_ENCRYPT, DIS_USB_JTAG, DIS_USB_SERIAL_JTAG, STRAP_JTAG_SEL, USB_PHY_SEL.
    endmenu  # Potentially Insecure

+    config SECURE_FLASH_ENCRYPT_ONLY_IMAGE_LEN_IN_APP_PART
+        bool "Encrypt only the app image that is present in the partition of type app"
+        depends on SECURE_FLASH_ENC_ENABLED && !SECURE_FLASH_REQUIRE_ALREADY_ENABLED
+        default n
+        help
+            If set, optimise encryption time for the partition of type APP,
+            by only encrypting the app image that is present in the partition,
+            instead of the whole partition.
+            The image length used for encryption is derived from the image metadata, which
+            includes the size of the app image, checksum, hash and also the signature sector
+            when secure boot is enabled.
+
+            If not set (default), the whole partition of type APP would be encrypted,
+            which increases the encryption time but might be useful if there
+            is any custom data appended to the firmware image.
+
    config SECURE_FLASH_CHECK_ENC_EN_IN_APP
        bool "Check Flash Encryption enabled on app startup"
        depends on SECURE_FLASH_ENC_ENABLED
@@ -1084,6 +1122,45 @@ menu "Security features"

            If not set, the app does not care if the flash encryption eFuse bit is set or not.

+    config SECURE_FLASH_PSEUDO_ROUND_FUNC
+        bool "Permanently enable XTS-AES's pseudo rounds function"
+        default y if SECURE_FLASH_ENCRYPTION_MODE_RELEASE
+        default n
+        depends on SECURE_FLASH_ENC_ENABLED && SOC_FLASH_ENCRYPTION_XTS_AES_SUPPORT_PSEUDO_ROUND
+        help
+            If set (default), the bootloader will permanently enable the XTS-AES peripheral's pseudo rounds function.
+            Note: Enabling this config would burn an efuse.
+
+    choice SECURE_FLASH_PSEUDO_ROUND_FUNC_STRENGTH
+        prompt "Strength of the pseudo rounds function"
+        depends on SECURE_FLASH_PSEUDO_ROUND_FUNC
+        default SECURE_FLASH_PSEUDO_ROUND_FUNC_STRENGTH_LOW
+        help
+            The strength of the pseudo rounds functions can be configured to low, medium and high,
+            each denoting the values that would be stored in the efuses field.
+            By default the value to set to low.
+            You can configure the strength of the pseudo rounds functions according to your use cases,
+            for example, increasing the strength would provide higher security but would slow down the
+            flash encryption/decryption operations.
+            For more info regarding the performance impact, please checkout the pseudo round function section of the
+            security guide documentation.
+
+        config SECURE_FLASH_PSEUDO_ROUND_FUNC_STRENGTH_LOW
+            bool "Low"
+
+        config SECURE_FLASH_PSEUDO_ROUND_FUNC_STRENGTH_MEDIUM
+            bool "Medium"
+
+        config SECURE_FLASH_PSEUDO_ROUND_FUNC_STRENGTH_HIGH
+            bool "High"
+    endchoice
+
+    config SECURE_FLASH_PSEUDO_ROUND_FUNC_STRENGTH
+        int
+        default 1 if SECURE_FLASH_PSEUDO_ROUND_FUNC_STRENGTH_LOW
+        default 2 if SECURE_FLASH_PSEUDO_ROUND_FUNC_STRENGTH_MEDIUM
+        default 3 if SECURE_FLASH_PSEUDO_ROUND_FUNC_STRENGTH_HIGH
+
    config SECURE_ROM_DL_MODE_ENABLED
        bool
        default y if SOC_SUPPORTS_SECURE_DL_MODE && !SECURE_FLASH_ENCRYPTION_MODE_DEVELOPMENT
@@ -1135,7 +1212,7 @@ menu "Security features"
                It is also possible to enable secure download mode at runtime by calling
                esp_efuse_enable_rom_secure_download_mode()

-                Note: Secure Download mode is not available for ESP32 (includes revisions till ECO3).
+                Note: Secure Download mode is not available for ESP32.

        config SECURE_INSECURE_ALLOW_DL_MODE
            bool "UART ROM download mode (Enabled (not recommended))"
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD
 *
 * SPDX-License-Identifier: Apache-2.0
 */
@@ -119,6 +119,7 @@ SECTIONS

  .dram0.data : ALIGN(0x10)
  {
+    *(.dram1 .dram1.*) /* catch stray DRAM_ATTR */
    *(.data)
    *(.data.*)
    *(.gnu.linkonce.d.*)
@@ -144,6 +145,7 @@ SECTIONS
    *(.gcc_except_table)
    *(.gnu.linkonce.e.*)
    *(.gnu.version_r)
+    *(.eh_frame_hdr)
    *(.eh_frame)
    . = (. + 3) & ~ 3;
    /*  C++ constructor and destructor tables, properly ordered:  */
@@ -208,12 +210,55 @@ SECTIONS
   */
  .xt.prop 0 :
  {
-    KEEP (*(.xt.prop .gnu.linkonce.prop.*))
+    KEEP (*(.xt.prop .xt.prop.* .gnu.linkonce.prop.*))
  }

  .xt.lit 0 :
  {
-    KEEP (*(.xt.lit .gnu.linkonce.p.*))
+    KEEP (*(.xt.lit .xt.lit.* .gnu.linkonce.p.*))
  }

+  .xtensa.info 0: { *(.xtensa.info) }
+
+  /* DWARF 1 */
+  .debug              0 : { *(.debug) }
+  .line               0 : { *(.line) }
+  /* GNU DWARF 1 extensions */
+  .debug_srcinfo      0 : { *(.debug_srcinfo) }
+  .debug_sfnames      0 : { *(.debug_sfnames) }
+  /* DWARF 1.1 and DWARF 2 */
+  .debug_aranges      0 : { *(.debug_aranges) }
+  .debug_pubnames     0 : { *(.debug_pubnames) }
+  /* DWARF 2 */
+  .debug_info         0 : { *(.debug_info .gnu.linkonce.wi.*) }
+  .debug_abbrev       0 : { *(.debug_abbrev) }
+  .debug_line         0 : { *(.debug_line) }
+  .debug_frame        0 : { *(.debug_frame) }
+  .debug_str          0 : { *(.debug_str) }
+  .debug_loc          0 : { *(.debug_loc) }
+  .debug_macinfo      0 : { *(.debug_macinfo) }
+  .debug_pubtypes     0 : { *(.debug_pubtypes) }
+  /* DWARF 3 */
+  .debug_ranges       0 : { *(.debug_ranges) }
+  /* SGI/MIPS DWARF 2 extensions */
+  .debug_weaknames    0 : { *(.debug_weaknames) }
+  .debug_funcnames    0 : { *(.debug_funcnames) }
+  .debug_typenames    0 : { *(.debug_typenames) }
+  .debug_varnames     0 : { *(.debug_varnames) }
+  /* GNU DWARF 2 extensions */
+  .debug_gnu_pubnames 0 : { *(.debug_gnu_pubnames) }
+  .debug_gnu_pubtypes 0 : { *(.debug_gnu_pubtypes) }
+  /* DWARF 4 */
+  .debug_types        0 : { *(.debug_types) }
+  /* DWARF 5 */
+  .debug_addr         0 : { *(.debug_addr) }
+  .debug_line_str     0 : { *(.debug_line_str) }
+  .debug_loclists     0 : { *(.debug_loclists) }
+  .debug_macro        0 : { *(.debug_macro) }
+  .debug_names        0 : { *(.debug_names) }
+  .debug_rnglists     0 : { *(.debug_rnglists) }
+  .debug_str_offsets  0 : { *(.debug_str_offsets) }
+
+  .comment 0 : { *(.comment) }
+  .note.GNU-stack 0: { *(.note.GNU-stack) }
 }
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD
 *
 * SPDX-License-Identifier: Apache-2.0
 */
@@ -140,6 +140,7 @@ SECTIONS

  .dram0.data :
  {
+    *(.dram1 .dram1.*) /* catch stray DRAM_ATTR */
    *(.data)
    *(.data.*)
    *(.gnu.linkonce.d.*)
@@ -165,6 +166,7 @@ SECTIONS
    *(.gcc_except_table)
    *(.gnu.linkonce.e.*)
    *(.gnu.version_r)
+    *(.eh_frame_hdr)
    *(.eh_frame)
    . = (. + 3) & ~ 3;
    /* C++ constructor and destructor tables, properly ordered: */
@@ -218,6 +220,57 @@ SECTIONS
    _etext = .;
  } > iram_seg

+  .riscv.attributes 0: { *(.riscv.attributes) }
+
+  /* DWARF 1 */
+  .debug              0 : { *(.debug) }
+  .line               0 : { *(.line) }
+  /* GNU DWARF 1 extensions */
+  .debug_srcinfo      0 : { *(.debug_srcinfo) }
+  .debug_sfnames      0 : { *(.debug_sfnames) }
+  /* DWARF 1.1 and DWARF 2 */
+  .debug_aranges      0 : { *(.debug_aranges) }
+  .debug_pubnames     0 : { *(.debug_pubnames) }
+  /* DWARF 2 */
+  .debug_info         0 : { *(.debug_info .gnu.linkonce.wi.*) }
+  .debug_abbrev       0 : { *(.debug_abbrev) }
+  .debug_line         0 : { *(.debug_line) }
+  .debug_frame        0 : { *(.debug_frame) }
+  .debug_str          0 : { *(.debug_str) }
+  .debug_loc          0 : { *(.debug_loc) }
+  .debug_macinfo      0 : { *(.debug_macinfo) }
+  .debug_pubtypes     0 : { *(.debug_pubtypes) }
+  /* DWARF 3 */
+  .debug_ranges       0 : { *(.debug_ranges) }
+  /* SGI/MIPS DWARF 2 extensions */
+  .debug_weaknames    0 : { *(.debug_weaknames) }
+  .debug_funcnames    0 : { *(.debug_funcnames) }
+  .debug_typenames    0 : { *(.debug_typenames) }
+  .debug_varnames     0 : { *(.debug_varnames) }
+  /* GNU DWARF 2 extensions */
+  .debug_gnu_pubnames 0 : { *(.debug_gnu_pubnames) }
+  .debug_gnu_pubtypes 0 : { *(.debug_gnu_pubtypes) }
+  /* DWARF 4 */
+  .debug_types        0 : { *(.debug_types) }
+  /* DWARF 5 */
+  .debug_addr         0 : { *(.debug_addr) }
+  .debug_line_str     0 : { *(.debug_line_str) }
+  .debug_loclists     0 : { *(.debug_loclists) }
+  .debug_macro        0 : { *(.debug_macro) }
+  .debug_names        0 : { *(.debug_names) }
+  .debug_rnglists     0 : { *(.debug_rnglists) }
+  .debug_str_offsets  0 : { *(.debug_str_offsets) }
+
+  .comment 0 : { *(.comment) }
+  .note.GNU-stack 0: { *(.note.GNU-stack) }
+
+  /**
+   * Discarding .rela.* sections results in the following mapping:
+   * .rela.text.* -> .text.*
+   * .rela.data.* -> .data.*
+   * And so forth...
+   */
+  /DISCARD/ : { *(.rela.*) }
 }

 /**
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD
 *
 * SPDX-License-Identifier: Apache-2.0
 */
@@ -140,6 +140,7 @@ SECTIONS

  .dram0.data :
  {
+    *(.dram1 .dram1.*) /* catch stray DRAM_ATTR */
    *(.data)
    *(.data.*)
    *(.gnu.linkonce.d.*)
@@ -165,6 +166,7 @@ SECTIONS
    *(.gcc_except_table)
    *(.gnu.linkonce.e.*)
    *(.gnu.version_r)
+    *(.eh_frame_hdr)
    *(.eh_frame)
    . = (. + 3) & ~ 3;
    /* C++ constructor and destructor tables, properly ordered: */
@@ -218,6 +220,58 @@ SECTIONS
    _etext = .;
  } > iram_seg

+  .riscv.attributes 0: { *(.riscv.attributes) }
+
+  /* DWARF 1 */
+  .debug              0 : { *(.debug) }
+  .line               0 : { *(.line) }
+  /* GNU DWARF 1 extensions */
+  .debug_srcinfo      0 : { *(.debug_srcinfo) }
+  .debug_sfnames      0 : { *(.debug_sfnames) }
+  /* DWARF 1.1 and DWARF 2 */
+  .debug_aranges      0 : { *(.debug_aranges) }
+  .debug_pubnames     0 : { *(.debug_pubnames) }
+  /* DWARF 2 */
+  .debug_info         0 : { *(.debug_info .gnu.linkonce.wi.*) }
+  .debug_abbrev       0 : { *(.debug_abbrev) }
+  .debug_line         0 : { *(.debug_line) }
+  .debug_frame        0 : { *(.debug_frame) }
+  .debug_str          0 : { *(.debug_str) }
+  .debug_loc          0 : { *(.debug_loc) }
+  .debug_macinfo      0 : { *(.debug_macinfo) }
+  .debug_pubtypes     0 : { *(.debug_pubtypes) }
+  /* DWARF 3 */
+  .debug_ranges       0 : { *(.debug_ranges) }
+  /* SGI/MIPS DWARF 2 extensions */
+  .debug_weaknames    0 : { *(.debug_weaknames) }
+  .debug_funcnames    0 : { *(.debug_funcnames) }
+  .debug_typenames    0 : { *(.debug_typenames) }
+  .debug_varnames     0 : { *(.debug_varnames) }
+  /* GNU DWARF 2 extensions */
+  .debug_gnu_pubnames 0 : { *(.debug_gnu_pubnames) }
+  .debug_gnu_pubtypes 0 : { *(.debug_gnu_pubtypes) }
+  /* DWARF 4 */
+  .debug_types        0 : { *(.debug_types) }
+  /* DWARF 5 */
+  .debug_addr         0 : { *(.debug_addr) }
+  .debug_line_str     0 : { *(.debug_line_str) }
+  .debug_loclists     0 : { *(.debug_loclists) }
+  .debug_macro        0 : { *(.debug_macro) }
+  .debug_names        0 : { *(.debug_names) }
+  .debug_rnglists     0 : { *(.debug_rnglists) }
+  .debug_str_offsets  0 : { *(.debug_str_offsets) }
+
+  .comment 0 : { *(.comment) }
+  .note.GNU-stack 0: { *(.note.GNU-stack) }
+
+  /**
+   * Discarding .rela.* sections results in the following mapping:
+   * .rela.text.* -> .text.*
+   * .rela.data.* -> .data.*
+   * And so forth...
+   */
+  /DISCARD/ : { *(.rela.*) }
+
 }


@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD
 *
 * SPDX-License-Identifier: Apache-2.0
 */
@@ -138,6 +138,7 @@ SECTIONS

  .dram0.data :
  {
+    *(.dram1 .dram1.*) /* catch stray DRAM_ATTR */
    *(.data)
    *(.data.*)
    *(.gnu.linkonce.d.*)
@@ -163,6 +164,7 @@ SECTIONS
    *(.gcc_except_table)
    *(.gnu.linkonce.e.*)
    *(.gnu.version_r)
+    *(.eh_frame_hdr)
    *(.eh_frame)
    . = (. + 3) & ~ 3;
    /* C++ constructor and destructor tables, properly ordered: */
@@ -216,6 +218,58 @@ SECTIONS
    _etext = .;
  } > iram_seg

+  .riscv.attributes 0: { *(.riscv.attributes) }
+
+  /* DWARF 1 */
+  .debug              0 : { *(.debug) }
+  .line               0 : { *(.line) }
+  /* GNU DWARF 1 extensions */
+  .debug_srcinfo      0 : { *(.debug_srcinfo) }
+  .debug_sfnames      0 : { *(.debug_sfnames) }
+  /* DWARF 1.1 and DWARF 2 */
+  .debug_aranges      0 : { *(.debug_aranges) }
+  .debug_pubnames     0 : { *(.debug_pubnames) }
+  /* DWARF 2 */
+  .debug_info         0 : { *(.debug_info .gnu.linkonce.wi.*) }
+  .debug_abbrev       0 : { *(.debug_abbrev) }
+  .debug_line         0 : { *(.debug_line) }
+  .debug_frame        0 : { *(.debug_frame) }
+  .debug_str          0 : { *(.debug_str) }
+  .debug_loc          0 : { *(.debug_loc) }
+  .debug_macinfo      0 : { *(.debug_macinfo) }
+  .debug_pubtypes     0 : { *(.debug_pubtypes) }
+  /* DWARF 3 */
+  .debug_ranges       0 : { *(.debug_ranges) }
+  /* SGI/MIPS DWARF 2 extensions */
+  .debug_weaknames    0 : { *(.debug_weaknames) }
+  .debug_funcnames    0 : { *(.debug_funcnames) }
+  .debug_typenames    0 : { *(.debug_typenames) }
+  .debug_varnames     0 : { *(.debug_varnames) }
+  /* GNU DWARF 2 extensions */
+  .debug_gnu_pubnames 0 : { *(.debug_gnu_pubnames) }
+  .debug_gnu_pubtypes 0 : { *(.debug_gnu_pubtypes) }
+  /* DWARF 4 */
+  .debug_types        0 : { *(.debug_types) }
+  /* DWARF 5 */
+  .debug_addr         0 : { *(.debug_addr) }
+  .debug_line_str     0 : { *(.debug_line_str) }
+  .debug_loclists     0 : { *(.debug_loclists) }
+  .debug_macro        0 : { *(.debug_macro) }
+  .debug_names        0 : { *(.debug_names) }
+  .debug_rnglists     0 : { *(.debug_rnglists) }
+  .debug_str_offsets  0 : { *(.debug_str_offsets) }
+
+  .comment 0 : { *(.comment) }
+  .note.GNU-stack 0: { *(.note.GNU-stack) }
+
+  /**
+   * Discarding .rela.* sections results in the following mapping:
+   * .rela.text.* -> .text.*
+   * .rela.data.* -> .data.*
+   * And so forth...
+   */
+  /DISCARD/ : { *(.rela.*) }
+
 }


@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
 *
 * SPDX-License-Identifier: Apache-2.0
 */
@@ -138,7 +138,7 @@ SECTIONS

  .dram0.data :
  {
-    _data_start = ABSOLUTE(.);
+    *(.dram1 .dram1.*) /* catch stray DRAM_ATTR */
    *(.data)
    *(.data.*)
    *(.gnu.linkonce.d.*)
@@ -164,6 +164,7 @@ SECTIONS
    *(.gcc_except_table)
    *(.gnu.linkonce.e.*)
    *(.gnu.version_r)
+    *(.eh_frame_hdr)
    *(.eh_frame)
    . = (. + 3) & ~ 3;
    /* C++ constructor and destructor tables, properly ordered: */
@@ -217,6 +218,58 @@ SECTIONS
    _etext = .;
  } > iram_seg

+  .riscv.attributes 0: { *(.riscv.attributes) }
+
+  /* DWARF 1 */
+  .debug              0 : { *(.debug) }
+  .line               0 : { *(.line) }
+  /* GNU DWARF 1 extensions */
+  .debug_srcinfo      0 : { *(.debug_srcinfo) }
+  .debug_sfnames      0 : { *(.debug_sfnames) }
+  /* DWARF 1.1 and DWARF 2 */
+  .debug_aranges      0 : { *(.debug_aranges) }
+  .debug_pubnames     0 : { *(.debug_pubnames) }
+  /* DWARF 2 */
+  .debug_info         0 : { *(.debug_info .gnu.linkonce.wi.*) }
+  .debug_abbrev       0 : { *(.debug_abbrev) }
+  .debug_line         0 : { *(.debug_line) }
+  .debug_frame        0 : { *(.debug_frame) }
+  .debug_str          0 : { *(.debug_str) }
+  .debug_loc          0 : { *(.debug_loc) }
+  .debug_macinfo      0 : { *(.debug_macinfo) }
+  .debug_pubtypes     0 : { *(.debug_pubtypes) }
+  /* DWARF 3 */
+  .debug_ranges       0 : { *(.debug_ranges) }
+  /* SGI/MIPS DWARF 2 extensions */
+  .debug_weaknames    0 : { *(.debug_weaknames) }
+  .debug_funcnames    0 : { *(.debug_funcnames) }
+  .debug_typenames    0 : { *(.debug_typenames) }
+  .debug_varnames     0 : { *(.debug_varnames) }
+  /* GNU DWARF 2 extensions */
+  .debug_gnu_pubnames 0 : { *(.debug_gnu_pubnames) }
+  .debug_gnu_pubtypes 0 : { *(.debug_gnu_pubtypes) }
+  /* DWARF 4 */
+  .debug_types        0 : { *(.debug_types) }
+  /* DWARF 5 */
+  .debug_addr         0 : { *(.debug_addr) }
+  .debug_line_str     0 : { *(.debug_line_str) }
+  .debug_loclists     0 : { *(.debug_loclists) }
+  .debug_macro        0 : { *(.debug_macro) }
+  .debug_names        0 : { *(.debug_names) }
+  .debug_rnglists     0 : { *(.debug_rnglists) }
+  .debug_str_offsets  0 : { *(.debug_str_offsets) }
+
+  .comment 0 : { *(.comment) }
+  .note.GNU-stack 0: { *(.note.GNU-stack) }
+
+  /**
+   * Discarding .rela.* sections results in the following mapping:
+   * .rela.text.* -> .text.*
+   * .rela.data.* -> .data.*
+   * And so forth...
+   */
+  /DISCARD/ : { *(.rela.*) }
+
 }

 /**
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
 *
 * SPDX-License-Identifier: Apache-2.0
 */
@@ -9,9 +9,9 @@
 *  Make sure the bootloader can load into main memory without overwriting itself.
 *
 *  ESP32-P4 ROM static data usage is as follows:
- *  - 0x4086ad08 - 0x4087c610: Shared buffers, used in UART/USB/SPI download mode only
- *  - 0x4087c610 - 0x4087e610: CPU1 stack, can be reclaimed as heap after RTOS startup
- *  - 0x4087e610 - 0x40880000: ROM .bss and .data (not easily reclaimable)
+ *  - 0x4ff296b8 - 0x4ff3afc0: Shared buffers, used in UART/USB/SPI download mode only
+ *  - 0x4ff3afc0 - 0x4ff3fba4: CPU1 stack, can be reclaimed as heap after RTOS startup
+ *  - 0x4ff3fba4 - 0x4ff40000: ROM .bss and .data (not easily reclaimable)
 *
 *  The 2nd stage bootloader can take space up to the end of ROM shared
 *  buffers area (0x4087c610).
@@ -130,9 +130,15 @@ SECTIONS
    _bss_end = ABSOLUTE(.);
  } > dram_seg

-  .dram0.data :
+  .dram0.bootdesc : ALIGN(0x10)
  {
    _data_start = ABSOLUTE(.);
+    *(.data_bootloader_desc .data_bootloader_desc.*)               /* Should be the first.  Bootloader version info.        DO NOT PUT ANYTHING BEFORE IT! */
+  } > dram_seg
+
+  .dram0.data :
+  {
+    *(.dram1 .dram1.*) /* catch stray DRAM_ATTR */
    *(.data)
    *(.data.*)
    *(.gnu.linkonce.d.*)
@@ -158,6 +164,7 @@ SECTIONS
    *(.gcc_except_table)
    *(.gnu.linkonce.e.*)
    *(.gnu.version_r)
+    *(.eh_frame_hdr)
    *(.eh_frame)
    . = (. + 3) & ~ 3;
    /* C++ constructor and destructor tables, properly ordered: */
@@ -211,40 +218,96 @@ SECTIONS
    _etext = .;
  } > iram_seg

+  .riscv.attributes 0: { *(.riscv.attributes) }
+
+  /* DWARF 1 */
+  .debug              0 : { *(.debug) }
+  .line               0 : { *(.line) }
+  /* GNU DWARF 1 extensions */
+  .debug_srcinfo      0 : { *(.debug_srcinfo) }
+  .debug_sfnames      0 : { *(.debug_sfnames) }
+  /* DWARF 1.1 and DWARF 2 */
+  .debug_aranges      0 : { *(.debug_aranges) }
+  .debug_pubnames     0 : { *(.debug_pubnames) }
+  /* DWARF 2 */
+  .debug_info         0 : { *(.debug_info .gnu.linkonce.wi.*) }
+  .debug_abbrev       0 : { *(.debug_abbrev) }
+  .debug_line         0 : { *(.debug_line) }
+  .debug_frame        0 : { *(.debug_frame) }
+  .debug_str          0 : { *(.debug_str) }
+  .debug_loc          0 : { *(.debug_loc) }
+  .debug_macinfo      0 : { *(.debug_macinfo) }
+  .debug_pubtypes     0 : { *(.debug_pubtypes) }
+  /* DWARF 3 */
+  .debug_ranges       0 : { *(.debug_ranges) }
+  /* SGI/MIPS DWARF 2 extensions */
+  .debug_weaknames    0 : { *(.debug_weaknames) }
+  .debug_funcnames    0 : { *(.debug_funcnames) }
+  .debug_typenames    0 : { *(.debug_typenames) }
+  .debug_varnames     0 : { *(.debug_varnames) }
+  /* GNU DWARF 2 extensions */
+  .debug_gnu_pubnames 0 : { *(.debug_gnu_pubnames) }
+  .debug_gnu_pubtypes 0 : { *(.debug_gnu_pubtypes) }
+  /* DWARF 4 */
+  .debug_types        0 : { *(.debug_types) }
+  /* DWARF 5 */
+  .debug_addr         0 : { *(.debug_addr) }
+  .debug_line_str     0 : { *(.debug_line_str) }
+  .debug_loclists     0 : { *(.debug_loclists) }
+  .debug_macro        0 : { *(.debug_macro) }
+  .debug_names        0 : { *(.debug_names) }
+  .debug_rnglists     0 : { *(.debug_rnglists) }
+  .debug_str_offsets  0 : { *(.debug_str_offsets) }
+
+  .comment 0 : { *(.comment) }
+  .note.GNU-stack 0: { *(.note.GNU-stack) }
+
+  /**
+   * Discarding .rela.* sections results in the following mapping:
+   * .rela.text.* -> .text.*
+   * .rela.data.* -> .data.*
+   * And so forth...
+   */
+  /DISCARD/ : { *(.rela.*) }
+
 }


 /**
 *  Appendix: Memory Usage of ROM bootloader
 *
- * 0x4086ad08 ------------------> _dram0_0_start
+ * 0x4ff296b8 ------------------> _dram0_0_start
 *            |               |
 *            |               |
 *            |               |   1. Large buffers that are only used in certain boot modes, see shared_buffers.h
 *            |               |
 *            |               |
- * 0x4087c610 ------------------> __stack_sentry
+ * 0x4ff3afc0 ------------------> __stack_sentry
 *            |               |
 *            |               |   2. Startup pro cpu stack (freed when IDF app is running)
 *            |               |
- * 0x4087e610 ------------------> __stack (pro cpu)
+ * 0x4ff3cfc0 ------------------> __stack (pro cpu)
+ *            |               |
+ *            |               |      Startup app cpu stack
+ *            |               |
+ * 0x4ff3efc0 ------------------> __stack_app (app cpu)
 *            |               |
 *            |               |
 *            |               |   3. Shared memory only used in startup code or nonos/early boot*
 *            |               |      (can be freed when IDF runs)
 *            |               |
 *            |               |
- * 0x4087f564 ------------------> _dram0_rtos_reserved_start
+ * 0x4ff3fba4 ------------------> _dram0_rtos_reserved_start
 *            |               |
 *            |               |
 *            |               |   4. Shared memory used in startup code and when IDF runs
 *            |               |
 *            |               |
- * 0x4087fab0 ------------------> _dram0_rtos_reserved_end
+ * 0x4ff3ff94 ------------------> _dram0_rtos_reserved_end
 *            |               |
- * 0x4087fce8 ------------------> _data_start_interface
+ * 0x4ff3ffc8 ------------------> _data_start_interface
 *            |               |
 *            |               |   5. End of DRAM is the 'interface' data with constant addresses (ECO compatible)
 *            |               |
- * 0x40880000 ------------------> _data_end_interface
+ * 0x4ff40000 ------------------> _data_end_interface
 */
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD
 *
 * SPDX-License-Identifier: Apache-2.0
 */
@@ -108,6 +108,7 @@ SECTIONS

  .dram0.data :
  {
+    *(.dram1 .dram1.*) /* catch stray DRAM_ATTR */
    *(.data)
    *(.data.*)
    *(.gnu.linkonce.d.*)
@@ -133,6 +134,7 @@ SECTIONS
    *(.gcc_except_table)
    *(.gnu.linkonce.e.*)
    *(.gnu.version_r)
+    *(.eh_frame_hdr)
    *(.eh_frame)
    . = (. + 3) & ~ 3;
    /*  C++ constructor and destructor tables, properly ordered:  */
@@ -205,4 +207,48 @@ SECTIONS
    KEEP (*(.xt.lit .gnu.linkonce.p.*))
  }

+  .xtensa.info 0: { *(.xtensa.info) }
+
+  /* DWARF 1 */
+  .debug              0 : { *(.debug) }
+  .line               0 : { *(.line) }
+  /* GNU DWARF 1 extensions */
+  .debug_srcinfo      0 : { *(.debug_srcinfo) }
+  .debug_sfnames      0 : { *(.debug_sfnames) }
+  /* DWARF 1.1 and DWARF 2 */
+  .debug_aranges      0 : { *(.debug_aranges) }
+  .debug_pubnames     0 : { *(.debug_pubnames) }
+  /* DWARF 2 */
+  .debug_info         0 : { *(.debug_info .gnu.linkonce.wi.*) }
+  .debug_abbrev       0 : { *(.debug_abbrev) }
+  .debug_line         0 : { *(.debug_line) }
+  .debug_frame        0 : { *(.debug_frame) }
+  .debug_str          0 : { *(.debug_str) }
+  .debug_loc          0 : { *(.debug_loc) }
+  .debug_macinfo      0 : { *(.debug_macinfo) }
+  .debug_pubtypes     0 : { *(.debug_pubtypes) }
+  /* DWARF 3 */
+  .debug_ranges       0 : { *(.debug_ranges) }
+  /* SGI/MIPS DWARF 2 extensions */
+  .debug_weaknames    0 : { *(.debug_weaknames) }
+  .debug_funcnames    0 : { *(.debug_funcnames) }
+  .debug_typenames    0 : { *(.debug_typenames) }
+  .debug_varnames     0 : { *(.debug_varnames) }
+  /* GNU DWARF 2 extensions */
+  .debug_gnu_pubnames 0 : { *(.debug_gnu_pubnames) }
+  .debug_gnu_pubtypes 0 : { *(.debug_gnu_pubtypes) }
+  /* DWARF 4 */
+  .debug_types        0 : { *(.debug_types) }
+  /* DWARF 5 */
+  .debug_addr         0 : { *(.debug_addr) }
+  .debug_line_str     0 : { *(.debug_line_str) }
+  .debug_loclists     0 : { *(.debug_loclists) }
+  .debug_macro        0 : { *(.debug_macro) }
+  .debug_names        0 : { *(.debug_names) }
+  .debug_rnglists     0 : { *(.debug_rnglists) }
+  .debug_str_offsets  0 : { *(.debug_str_offsets) }
+
+  .comment 0 : { *(.comment) }
+  .note.GNU-stack 0: { *(.note.GNU-stack) }
+
 }
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD
 *
 * SPDX-License-Identifier: Apache-2.0
 */
@@ -142,6 +142,7 @@ SECTIONS

  .dram0.data :
  {
+    *(.dram1 .dram1.*) /* catch stray DRAM_ATTR */
    *(.data)
    *(.data.*)
    *(.gnu.linkonce.d.*)
@@ -167,6 +168,7 @@ SECTIONS
    *(.gcc_except_table)
    *(.gnu.linkonce.e.*)
    *(.gnu.version_r)
+    *(.eh_frame_hdr)
    *(.eh_frame)
    . = (. + 3) & ~ 3;
    /* C++ constructor and destructor tables, properly ordered: */
@@ -239,6 +241,50 @@ SECTIONS
    KEEP (*(.xt.lit .gnu.linkonce.p.*))
  }

+  .xtensa.info 0: { *(.xtensa.info) }
+
+  /* DWARF 1 */
+  .debug              0 : { *(.debug) }
+  .line               0 : { *(.line) }
+  /* GNU DWARF 1 extensions */
+  .debug_srcinfo      0 : { *(.debug_srcinfo) }
+  .debug_sfnames      0 : { *(.debug_sfnames) }
+  /* DWARF 1.1 and DWARF 2 */
+  .debug_aranges      0 : { *(.debug_aranges) }
+  .debug_pubnames     0 : { *(.debug_pubnames) }
+  /* DWARF 2 */
+  .debug_info         0 : { *(.debug_info .gnu.linkonce.wi.*) }
+  .debug_abbrev       0 : { *(.debug_abbrev) }
+  .debug_line         0 : { *(.debug_line) }
+  .debug_frame        0 : { *(.debug_frame) }
+  .debug_str          0 : { *(.debug_str) }
+  .debug_loc          0 : { *(.debug_loc) }
+  .debug_macinfo      0 : { *(.debug_macinfo) }
+  .debug_pubtypes     0 : { *(.debug_pubtypes) }
+  /* DWARF 3 */
+  .debug_ranges       0 : { *(.debug_ranges) }
+  /* SGI/MIPS DWARF 2 extensions */
+  .debug_weaknames    0 : { *(.debug_weaknames) }
+  .debug_funcnames    0 : { *(.debug_funcnames) }
+  .debug_typenames    0 : { *(.debug_typenames) }
+  .debug_varnames     0 : { *(.debug_varnames) }
+  /* GNU DWARF 2 extensions */
+  .debug_gnu_pubnames 0 : { *(.debug_gnu_pubnames) }
+  .debug_gnu_pubtypes 0 : { *(.debug_gnu_pubtypes) }
+  /* DWARF 4 */
+  .debug_types        0 : { *(.debug_types) }
+  /* DWARF 5 */
+  .debug_addr         0 : { *(.debug_addr) }
+  .debug_line_str     0 : { *(.debug_line_str) }
+  .debug_loclists     0 : { *(.debug_loclists) }
+  .debug_macro        0 : { *(.debug_macro) }
+  .debug_names        0 : { *(.debug_names) }
+  .debug_rnglists     0 : { *(.debug_rnglists) }
+  .debug_str_offsets  0 : { *(.debug_str_offsets) }
+
+  .comment 0 : { *(.comment) }
+  .note.GNU-stack 0: { *(.note.GNU-stack) }
+
 }

 /**
@@ -36,6 +36,10 @@ if(CONFIG_APP_BUILD_TYPE_APP_2NDBOOT)
        )
 endif()

+if(CONFIG_ESP_ROM_REV0_HAS_NO_ECDSA_INTERFACE)
+    list(APPEND srcs "src/${IDF_TARGET}/bootloader_ecdsa.c")
+endif()
+
 if(BOOTLOADER_BUILD OR CONFIG_APP_BUILD_TYPE_RAM)
    set(include_dirs "include" "bootloader_flash/include"
        "private_include")
@@ -50,10 +54,6 @@ if(BOOTLOADER_BUILD OR CONFIG_APP_BUILD_TYPE_RAM)
    "src/${IDF_TARGET}/bootloader_${IDF_TARGET}.c"
    )
    list(APPEND priv_requires hal)
-    if(CONFIG_ESP_ROM_REV0_HAS_NO_ECDSA_INTERFACE)
-        list(APPEND srcs
-            "src/${IDF_TARGET}/bootloader_ecdsa.c")
-    endif()
 else()
    list(APPEND srcs
        "src/idf/bootloader_sha.c")
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
 *
 * SPDX-License-Identifier: Apache-2.0
 */
@@ -685,7 +685,7 @@ void bootloader_spi_flash_reset(void)
 ******************************************************************************/

 #define XMC_SUPPORT CONFIG_BOOTLOADER_FLASH_XMC_SUPPORT
-#define XMC_VENDOR_ID 0x20
+#define XMC_VENDOR_ID_1 0x20

 #if BOOTLOADER_BUILD
 #define BOOTLOADER_FLASH_LOG(level, ...)    ESP_EARLY_LOG##level(TAG, ##__VA_ARGS__)
@@ -702,7 +702,7 @@ static IRAM_ATTR bool is_xmc_chip_strict(uint32_t rdid)
    uint32_t mfid = BYTESHIFT(rdid, 1);
    uint32_t cpid = BYTESHIFT(rdid, 0);

-    if (vendor_id != XMC_VENDOR_ID) {
+    if (vendor_id != XMC_VENDOR_ID_1) {
        return false;
    }

@@ -735,7 +735,7 @@ esp_err_t IRAM_ATTR bootloader_flash_xmc_startup(void)
    // Check the Manufacturer ID in SFDP registers (JEDEC standard). If not XMC chip, no need to run the flow
    const int sfdp_mfid_addr = 0x10;
    uint8_t mf_id = (bootloader_flash_read_sfdp(sfdp_mfid_addr, 1) & 0xff);
-    if (mf_id != XMC_VENDOR_ID) {
+    if (mf_id != XMC_VENDOR_ID_1) {
        BOOTLOADER_FLASH_LOG(D, "non-XMC chip detected by SFDP Read (%02X), skip.", mf_id);
        return ESP_OK;
    }
@@ -767,7 +767,7 @@ esp_err_t IRAM_ATTR bootloader_flash_xmc_startup(void)
 static IRAM_ATTR bool is_xmc_chip(uint32_t rdid)
 {
    uint32_t vendor_id = (rdid >> 16) & 0xFF;
-    return (vendor_id == XMC_VENDOR_ID);
+    return (vendor_id == XMC_VENDOR_ID_1);
 }

 esp_err_t IRAM_ATTR bootloader_flash_xmc_startup(void)
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2018-2023 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2018-2024 Espressif Systems (Shanghai) CO LTD
 *
 * SPDX-License-Identifier: Apache-2.0
 */
@@ -181,6 +181,20 @@ uint32_t bootloader_common_get_chip_ver_pkg(void);
 */
 esp_err_t bootloader_common_check_chip_validity(const esp_image_header_t* img_hdr, esp_image_type type);

+#if !CONFIG_IDF_TARGET_ESP32
+/**
+ * @brief Check the eFuse block revision
+ *
+ * @param[in] min_rev_full The required minimum revision of the eFuse block
+ * @param[in] max_rev_full The required maximum revision of the eFuse block
+ * @return
+ *          - ESP_OK: The eFuse block revision is in the required range.
+ *          - ESP_OK: DISABLE_BLK_VERSION_MAJOR has been set in the eFuse of the SoC. No requirements shall be checked at this time.
+ *          - ESP_FAIL: The eFuse block revision of this chip does not match the requirement of the current image.
+ */
+esp_err_t bootloader_common_check_efuse_blk_validity(uint32_t min_rev_full, uint32_t max_rev_full);
+#endif  // !CONFIG_IDF_TARGET_ESP32
+
 /**
 * @brief Configure VDDSDIO, call this API to rise VDDSDIO to 1.9V when VDDSDIO regulator is enabled as 1.8V mode.
 */
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2010-2023 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2010-2025 Espressif Systems (Shanghai) CO LTD
 *
 * SPDX-License-Identifier: Apache-2.0
 */
@@ -27,7 +27,21 @@ extern "C" {
 */
 __attribute__((always_inline))
 inline static bool esp_dram_match_iram(void) {
-    return (SOC_DRAM_LOW == SOC_IRAM_LOW && SOC_DRAM_HIGH == SOC_IRAM_HIGH);
+    return ((SOC_DRAM_LOW == SOC_IRAM_LOW) && (SOC_DRAM_HIGH == SOC_IRAM_HIGH));
+}
+
+/**
+ * @brief Check if the RTC IRAM and RTC DRAM are separate or using the same memory space
+ *
+ * @return true if the RTC DRAM and RTC IRAM are sharing the same memory space, false otherwise
+ */
+__attribute__((always_inline))
+inline static bool esp_rtc_dram_match_rtc_iram(void) {
+#if SOC_RTC_FAST_MEM_SUPPORTED
+    return ((SOC_RTC_IRAM_LOW == SOC_RTC_DRAM_LOW) && (SOC_RTC_IRAM_HIGH == SOC_RTC_DRAM_HIGH));
+#else
+    return false;
+#endif
 }

 /**
@@ -81,6 +95,7 @@ __attribute__((always_inline))
 inline static bool esp_ptr_in_diram_iram(const void *p) {
 // TODO: IDF-5980 esp32c6 D/I RAM share the same address
 #if SOC_DIRAM_IRAM_LOW == SOC_DIRAM_DRAM_LOW
+    (void)p;
    return false;
 #else
    return ((intptr_t)p >= SOC_DIRAM_IRAM_LOW && (intptr_t)p < SOC_DIRAM_IRAM_HIGH);
@@ -99,6 +114,7 @@ inline static bool esp_ptr_in_rtc_iram_fast(const void *p) {
 #if SOC_RTC_FAST_MEM_SUPPORTED
    return ((intptr_t)p >= SOC_RTC_IRAM_LOW && (intptr_t)p < SOC_RTC_IRAM_HIGH);
 #else
+    (void)p;
    return false;
 #endif
 }
@@ -115,6 +131,7 @@ inline static bool esp_ptr_in_rtc_dram_fast(const void *p) {
 #if SOC_RTC_FAST_MEM_SUPPORTED
    return ((intptr_t)p >= SOC_RTC_DRAM_LOW && (intptr_t)p < SOC_RTC_DRAM_HIGH);
 #else
+    (void)p;
    return false;
 #endif
 }
@@ -150,6 +167,21 @@ inline static void * esp_ptr_diram_dram_to_iram(const void *p) {
 #endif
 }

+/* Convert a RTC DRAM pointer to equivalent word address in RTC IRAM
+
+   - Address must be word aligned
+   - Address must pass esp_ptr_in_rtc_dram_fast() test, or result will be invalid pointer
+*/
+__attribute__((always_inline))
+inline static void * esp_ptr_rtc_dram_to_iram(const void *p) {
+    intptr_t ptr = (intptr_t)p;
+#if SOC_RTC_FAST_MEM_SUPPORTED && (SOC_RTC_IRAM_LOW != SOC_RTC_DRAM_LOW)
+    return (void *) ( SOC_RTC_IRAM_LOW + (ptr - SOC_RTC_DRAM_LOW) );
+#else
+    return (void *) ptr;
+#endif
+}
+
 /* Convert a D/IRAM IRAM pointer to equivalent word address in DRAM

   - Address must be word aligned
@@ -205,6 +205,10 @@ bool esp_flash_encryption_cfg_verify_release_mode(void);
 * It burns:
 *  - "disable encrypt in dl mode"
 *  - set FLASH_CRYPT_CNT efuse to max
+ *
+ * In case of the targets that support the XTS-AES peripheral's pseudo rounds function,
+ * this API would configure the pseudo rounds level efuse bit to level low if the efuse bit
+ * is not set already.
 */
 void esp_flash_encryption_set_release_mode(void);

@@ -33,6 +33,7 @@ typedef struct {
  uint32_t segment_data[ESP_IMAGE_MAX_SEGMENTS]; /* Data offsets for each segment */
  uint32_t image_len; /* Length of image on flash, in bytes */
  uint8_t image_digest[32]; /* appended SHA-256 digest */
+  uint32_t secure_version; /* secure version for anti-rollback, it is covered by sha256 (set if CONFIG_BOOTLOADER_APP_ANTI_ROLLBACK=y) */
 } esp_image_metadata_t;

 typedef enum {
@@ -26,7 +26,7 @@
 #include "bootloader_flash_priv.h"

 #define ESP_PARTITION_HASH_LEN 32 /* SHA-256 digest length */
-#define IS_MAX_REV_SET(max_chip_rev_full) (((max_chip_rev_full) != 65535) && ((max_chip_rev_full) != 0))
+#define IS_FIELD_SET(rev_full) (((rev_full) != 65535) && ((rev_full) != 0))

 static const char* TAG = "boot_comm";

@@ -56,6 +56,31 @@ int bootloader_common_get_active_otadata(esp_ota_select_entry_t *two_otadata)
    return bootloader_common_select_otadata(two_otadata, valid_two_otadata, true);
 }

+#if !CONFIG_IDF_TARGET_ESP32
+esp_err_t bootloader_common_check_efuse_blk_validity(uint32_t min_rev_full, uint32_t max_rev_full)
+{
+    esp_err_t err = ESP_OK;
+#ifndef CONFIG_IDF_ENV_FPGA
+    // Check whether the efuse block version satisfy the requirements of current image.
+    uint32_t revision = efuse_hal_blk_version();
+    uint32_t major_rev = revision / 100;
+    uint32_t minor_rev = revision % 100;
+    if (IS_FIELD_SET(min_rev_full) && !ESP_EFUSE_BLK_REV_ABOVE(revision, min_rev_full)) {
+        ESP_LOGE(TAG, "Image requires efuse blk rev >= v%"PRIu32".%"PRIu32", but chip is v%"PRIu32".%"PRIu32,
+                    min_rev_full / 100, min_rev_full % 100, major_rev, minor_rev);
+        err = ESP_FAIL;
+    }
+    // If burnt `disable_blk_version_major` bit, skip the max version check
+    if ((IS_FIELD_SET(max_rev_full) && (revision > max_rev_full) && !efuse_hal_get_disable_blk_version_major())) {
+        ESP_LOGE(TAG, "Image requires efuse blk rev <= v%"PRIu32".%"PRIu32", but chip is v%"PRIu32".%"PRIu32,
+                    max_rev_full / 100, max_rev_full % 100, major_rev, minor_rev);
+        err = ESP_FAIL;
+    }
+#endif
+    return err;
+}
+#endif  // !CONFIG_IDF_TARGET_ESP32
+
 esp_err_t bootloader_common_check_chip_validity(const esp_image_header_t* img_hdr, esp_image_type type)
 {
    esp_err_t err = ESP_OK;
@@ -79,7 +104,7 @@ esp_err_t bootloader_common_check_chip_validity(const esp_image_header_t* img_hd
        }
        if (type == ESP_IMAGE_APPLICATION) {
            unsigned max_rev = img_hdr->max_chip_rev_full;
-            if ((IS_MAX_REV_SET(max_rev) && (revision > max_rev) && !efuse_hal_get_disable_wafer_version_major())) {
+            if ((IS_FIELD_SET(max_rev) && (revision > max_rev) && !efuse_hal_get_disable_wafer_version_major())) {
                ESP_LOGE(TAG, "Image requires chip rev <= v%d.%d, but chip is v%d.%d",
                         max_rev / 100, max_rev % 100,
                         major_rev, minor_rev);
@@ -121,7 +146,7 @@ int bootloader_common_select_otadata(const esp_ota_select_entry_t *two_otadata,
 #if CONFIG_BOOTLOADER_RESERVE_RTC_MEM

 static uint32_t rtc_retain_mem_size(void) {
-#ifdef CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC
+#if CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC && !CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC_IN_CRC
    /* A custom memory has been reserved by the user, do not consider this memory into CRC calculation as it may change without
     * the have the user updating the CRC. Return the offset of the custom field, which is equivalent to size of the structure
     * minus the size of everything after (including) `custom` */
@@ -1,11 +1,12 @@
 /*
- * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2020-2024 Espressif Systems (Shanghai) CO LTD
 *
 * SPDX-License-Identifier: Apache-2.0
 */

 #include "sdkconfig.h"
 #include "bootloader_console.h"
+#include "soc/soc_caps.h"
 #include "soc/uart_periph.h"
 #include "soc/uart_channel.h"
 #include "soc/io_mux_reg.h"
@@ -18,6 +19,9 @@
 #include "esp32s2/rom/usb/cdc_acm.h"
 #include "esp32s2/rom/usb/usb_common.h"
 #endif
+#if CONFIG_ESP_CONSOLE_USB_CDC
+#include "hal/usb_wrap_ll.h"
+#endif
 #include "esp_rom_gpio.h"
 #include "esp_rom_uart.h"
 #include "esp_rom_sys.h"
@@ -35,6 +39,7 @@ void bootloader_console_init(void)
 void bootloader_console_init(void)
 {
    const int uart_num = CONFIG_ESP_CONSOLE_UART_NUM;
+    int __DECLARE_RCC_ATOMIC_ENV __attribute__ ((unused)); // To avoid build errors/warnings about __DECLARE_RCC_ATOMIC_ENV

    // Install rom uart printf as console.
    esp_rom_install_uart_printf();
@@ -56,8 +61,8 @@ void bootloader_console_init(void)
            uart_tx_gpio != UART_NUM_0_TXD_DIRECT_GPIO_NUM ||
            uart_rx_gpio != UART_NUM_0_RXD_DIRECT_GPIO_NUM) {
        // Change default UART pins back to GPIOs
-        gpio_hal_iomux_func_sel(PERIPHS_IO_MUX_U0RXD_U, PIN_FUNC_GPIO);
-        gpio_hal_iomux_func_sel(PERIPHS_IO_MUX_U0TXD_U, PIN_FUNC_GPIO);
+        gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[UART_NUM_0_RXD_DIRECT_GPIO_NUM], PIN_FUNC_GPIO);
+        gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[UART_NUM_0_TXD_DIRECT_GPIO_NUM], PIN_FUNC_GPIO);
        // Route GPIO signals to/from pins
        const uint32_t tx_idx = UART_PERIPH_SIGNAL(uart_num, SOC_UART_TX_PIN_IDX);
        const uint32_t rx_idx = UART_PERIPH_SIGNAL(uart_num, SOC_UART_RX_PIN_IDX);
@@ -68,7 +73,11 @@ void bootloader_console_init(void)
        esp_rom_gpio_connect_in_signal(uart_rx_gpio, rx_idx, 0);
        gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[uart_tx_gpio], PIN_FUNC_GPIO);
        // Enable the peripheral
-        periph_ll_enable_clk_clear_rst(PERIPH_UART0_MODULE + uart_num);
+        uart_ll_enable_bus_clock(uart_num, true);
+        uart_ll_reset_register(uart_num);
+        // Reset TX and RX FIFOs
+        uart_ll_txfifo_rst(UART_LL_GET_HW(uart_num));
+        uart_ll_rxfifo_rst(UART_LL_GET_HW(uart_num));
    }
 #endif // CONFIG_ESP_CONSOLE_UART_CUSTOM

@@ -77,7 +86,6 @@ void bootloader_console_init(void)
 #if ESP_ROM_UART_CLK_IS_XTAL
    clock_hz = (uint32_t)rtc_clk_xtal_freq_get() * MHZ; // From esp32-s3 on, UART clk source is selected to XTAL in ROM
 #endif
-    int __DECLARE_RCC_ATOMIC_ENV __attribute__ ((unused)); // To avoid build errors/warnings about __DECLARE_RCC_ATOMIC_ENV
    esp_rom_uart_set_clock_baudrate(uart_num, clock_hz, CONFIG_ESP_CONSOLE_UART_BAUDRATE);
 }
 #endif // CONFIG_ESP_CONSOLE_UART
@@ -98,6 +106,9 @@ void bootloader_console_init(void)
    esp_rom_uart_usb_acm_init(s_usb_cdc_buf, sizeof(s_usb_cdc_buf));
    esp_rom_uart_set_as_console(ESP_ROM_USB_OTG_NUM);
    esp_rom_install_channel_putc(1, bootloader_console_write_char_usb);
+    // Ensure that the USB FSLS PHY is mapped to the USB WRAP
+    usb_wrap_ll_phy_enable_pad(&USB_WRAP, true);
+    usb_wrap_ll_phy_enable_external(&USB_WRAP, false);
 }
 #endif //CONFIG_ESP_CONSOLE_USB_CDC

@@ -42,10 +42,17 @@ esp_err_t bootloader_read_bootloader_header(void)

 esp_err_t bootloader_check_bootloader_validity(void)
 {
-    unsigned int revision = efuse_hal_chip_revision();
-    unsigned int major = revision / 100;
-    unsigned int minor = revision % 100;
-    ESP_EARLY_LOGI(TAG, "chip revision: v%d.%d", major, minor);
+    unsigned int chip_revision = efuse_hal_chip_revision();
+    unsigned int chip_major_rev = chip_revision / 100;
+    unsigned int chip_minor_rev = chip_revision % 100;
+    ESP_EARLY_LOGI(TAG, "chip revision: v%d.%d", chip_major_rev, chip_minor_rev);
+/* ESP32 doesn't have more memory and more efuse bits for block major version. */
+#if !CONFIG_IDF_TARGET_ESP32
+    unsigned int efuse_revision = efuse_hal_blk_version();
+    unsigned int efuse_major_rev = efuse_revision / 100;
+    unsigned int efuse_minor_rev = efuse_revision % 100;
+    ESP_EARLY_LOGI(TAG, "efuse block revision: v%d.%d", efuse_major_rev, efuse_minor_rev);
+#endif  // !CONFIG_IDF_TARGET_ESP32
    /* compare with the one set in bootloader image header */
    if (bootloader_common_check_chip_validity(&bootloader_image_hdr, ESP_IMAGE_BOOTLOADER) != ESP_OK) {
        return ESP_FAIL;
@@ -53,7 +53,7 @@ void bootloader_random_enable(void)

    // create patterns and set them in pattern table
    uint32_t pattern_one = (SAR2_CHANNEL << 2) | SAR2_ATTEN; // we want channel 9 with max attenuation
-    uint32_t pattern_two = SAR1_ATTEN; // we want channel 0 with max attenuation, channel doesn't really matter here
+    uint32_t pattern_two = (SAR2_CHANNEL << 2) | SAR1_ATTEN; // we want channel 9 with max attenuation
    uint32_t pattern_table = 0 | (pattern_two << 3 * PATTERN_BIT_WIDTH) | pattern_one << 2 * PATTERN_BIT_WIDTH;
    REG_WRITE(APB_SARADC_SAR_PATT_TAB1_REG, pattern_table);

@@ -88,9 +88,6 @@ void bootloader_random_disable(void)
    REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SARADC1_ENCAL_REF_ADDR, 0);
    REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SARADC2_ENCAL_REF_ADDR, 0);

-    // Revert PMU_RF_PWC_REG to it's initial value
-    CLEAR_PERI_REG_MASK(PMU_RF_PWC_REG, PMU_PERIF_I2C_RSTB);
-
    // disable ADC_CTRL_CLK (SAR ADC function clock)
    REG_WRITE(PCR_SARADC_CLKM_CONF_REG, 0x00404000);

@@ -89,6 +89,8 @@ static inline void bootloader_hardware_init(void)
 {
    /* Enable analog i2c master clock */
    SET_PERI_REG_MASK(MODEM_LPCON_CLK_CONF_REG, MODEM_LPCON_CLK_I2C_MST_EN);
+    REGI2C_WRITE_MASK(I2C_BIAS, I2C_BIAS_DREG_0P8, 8);  // fix low temp issue, need to increase this internal voltage
+
 }

 static inline void bootloader_ana_reset_config(void)
@@ -1,15 +1,18 @@
 /*
- * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
 *
 * SPDX-License-Identifier: Apache-2.0
 */

+#include <stdint.h>
 #include <strings.h>
 #include "esp_flash_encrypt.h"
 #include "esp_secure_boot.h"
 #include "esp_efuse.h"
 #include "esp_efuse_table.h"
 #include "esp_log.h"
+#include "hal/spi_flash_encrypted_ll.h"
+#include "soc/soc_caps.h"
 #include "sdkconfig.h"

 static __attribute__((unused)) const char *TAG = "flash_encrypt";
@@ -33,6 +36,14 @@ esp_err_t esp_flash_encryption_enable_secure_features(void)

    esp_efuse_write_field_bit(ESP_EFUSE_DIS_DIRECT_BOOT);

+#if CONFIG_SECURE_FLASH_PSEUDO_ROUND_FUNC
+    if (spi_flash_encrypt_ll_is_pseudo_rounds_function_supported()) {
+        ESP_LOGI(TAG, "Enable XTS-AES pseudo rounds function...");
+        uint8_t xts_pseudo_level = CONFIG_SECURE_FLASH_PSEUDO_ROUND_FUNC_STRENGTH;
+        esp_efuse_write_field_blob(ESP_EFUSE_XTS_DPA_PSEUDO_LEVEL, &xts_pseudo_level, ESP_EFUSE_XTS_DPA_PSEUDO_LEVEL[0]->bit_count);
+    }
+#endif
+
 #if defined(CONFIG_SECURE_BOOT_V2_ENABLED) && !defined(CONFIG_SECURE_BOOT_V2_ALLOW_EFUSE_RD_DIS)
    // This bit is set when enabling Secure Boot V2, but we can't enable it until this later point in the first boot
    // otherwise the Flash Encryption key cannot be read protected
@@ -1,10 +1,11 @@
 /*
- * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
 *
 * SPDX-License-Identifier: Apache-2.0
 */

 #include <strings.h>
+#include "hal/ecdsa_ll.h"
 #include "esp_flash_encrypt.h"
 #include "esp_secure_boot.h"
 #include "esp_efuse.h"
@@ -36,6 +37,12 @@ esp_err_t esp_secure_boot_enable_secure_features(void)
    ESP_LOGW(TAG, "UART ROM Download mode kept enabled - SECURITY COMPROMISED");
 #endif

+#ifdef SOC_ECDSA_P192_CURVE_DEFAULT_DISABLED
+    if (ecdsa_ll_is_configurable_curve_supported()) {
+        esp_efuse_write_field_bit(ESP_EFUSE_WR_DIS_ECDSA_CURVE_MODE);
+    }
+#endif
+
 #ifndef CONFIG_SECURE_BOOT_ALLOW_JTAG
    ESP_LOGI(TAG, "Disable hardware & software JTAG...");
    esp_efuse_write_field_bit(ESP_EFUSE_DIS_PAD_JTAG);
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
 *
 * SPDX-License-Identifier: Apache-2.0
 */
@@ -19,6 +19,8 @@
 #include "bootloader_util.h"
 #include "bootloader_common.h"
 #include "esp_rom_sys.h"
+#include "esp_efuse.h"
+#include "esp_app_desc.h"
 #include "bootloader_memory_utils.h"
 #include "soc/soc_caps.h"
 #include "hal/cache_ll.h"
@@ -89,10 +91,10 @@ static bool should_map(uint32_t load_addr);

 static esp_err_t process_segments(esp_image_metadata_t *data, bool silent, bool do_load, bootloader_sha256_handle_t sha_handle, uint32_t *checksum);
 /* Load or verify a segment */
-static esp_err_t process_segment(int index, uint32_t flash_addr, esp_image_segment_header_t *header, bool silent, bool do_load, bootloader_sha256_handle_t sha_handle, uint32_t *checksum);
+static esp_err_t process_segment(int index, uint32_t flash_addr, esp_image_segment_header_t *header, bool silent, bool do_load, bootloader_sha256_handle_t sha_handle, uint32_t *checksum, esp_image_metadata_t *metadata);

 /* split segment and verify if data_len is too long */
-static esp_err_t process_segment_data(intptr_t load_addr, uint32_t data_addr, uint32_t data_len, bool do_load, bootloader_sha256_handle_t sha_handle, uint32_t *checksum);
+static esp_err_t process_segment_data(int segment, intptr_t load_addr, uint32_t data_addr, uint32_t data_len, bool do_load, bootloader_sha256_handle_t sha_handle, uint32_t *checksum, esp_image_metadata_t *metadata);

 /* Verify the main image header */
 static esp_err_t verify_image_header(uint32_t src_addr, const esp_image_header_t *image, bool silent);
@@ -240,6 +242,21 @@ static esp_err_t image_load(esp_image_load_mode_t mode, const esp_partition_pos_
        cache_ll_writeback_all(CACHE_LL_LEVEL_INT_MEM, CACHE_TYPE_DATA, CACHE_LL_ID_ALL);
 #endif
    }
+
+#if CONFIG_BOOTLOADER_APP_ANTI_ROLLBACK
+    /* For anti-rollback case, reconfirm security version of the application to prevent FI attacks */
+    bool sec_ver = false;
+    if (do_load) {
+        sec_ver = esp_efuse_check_secure_version(data->secure_version);
+        if (!sec_ver) {
+            err = ESP_FAIL;
+            goto err;
+        }
+    }
+    /* Ensure that the security version check passes for image loading scenario */
+    ESP_FAULT_ASSERT(!do_load || sec_ver == true);
+#endif // CONFIG_BOOTLOADER_APP_ANTI_ROLLBACK
+
 #endif // BOOTLOADER_BUILD

    // Success!
@@ -522,7 +539,7 @@ static esp_err_t process_segments(esp_image_metadata_t *data, bool silent, bool
    for (int i = 0; i < data->image.segment_count; i++) {
        esp_image_segment_header_t *header = &data->segments[i];
        ESP_LOGV(TAG, "loading segment header %d at offset 0x%"PRIx32, i, next_addr);
-        CHECK_ERR(process_segment(i, next_addr, header, silent, do_load, sha_handle, checksum));
+        CHECK_ERR(process_segment(i, next_addr, header, silent, do_load, sha_handle, checksum, data));
        next_addr += sizeof(esp_image_segment_header_t);
        data->segment_data[i] = next_addr;
        next_addr += header->data_len;
@@ -543,7 +560,7 @@ err:
    return err;
 }

-static esp_err_t process_segment(int index, uint32_t flash_addr, esp_image_segment_header_t *header, bool silent, bool do_load, bootloader_sha256_handle_t sha_handle, uint32_t *checksum)
+static esp_err_t process_segment(int index, uint32_t flash_addr, esp_image_segment_header_t *header, bool silent, bool do_load, bootloader_sha256_handle_t sha_handle, uint32_t *checksum, esp_image_metadata_t *metadata)
 {
    esp_err_t err;

@@ -601,7 +618,7 @@ static esp_err_t process_segment(int index, uint32_t flash_addr, esp_image_segme
        uint32_t offset_page = ((data_addr & MMAP_ALIGNED_MASK) != 0) ? 1 : 0;
        /* Data we could map in case we are not aligned to PAGE boundary is one page size lesser. */
        data_len = MIN(data_len_remain, ((free_page_count - offset_page) * SPI_FLASH_MMU_PAGE_SIZE));
-        CHECK_ERR(process_segment_data(load_addr, data_addr, data_len, do_load, sha_handle, checksum));
+        CHECK_ERR(process_segment_data(index, load_addr, data_addr, data_len, do_load, sha_handle, checksum, metadata));
        data_addr += data_len;
        data_len_remain -= data_len;
    }
@@ -616,7 +633,42 @@ err:
    return err;
 }

-static esp_err_t process_segment_data(intptr_t load_addr, uint32_t data_addr, uint32_t data_len, bool do_load, bootloader_sha256_handle_t sha_handle, uint32_t *checksum)
+#if CONFIG_BOOTLOADER_APP_ANTI_ROLLBACK
+/* The __attribute__((optimize("O0"))) is used to disable optimizations for this function,
+ * preventing the compiler from potentially optimizing data_buffer and reading data directly from src.
+ * This is crucial as we want to read from Flash only once, ensuring the integrity of the data.
+ */
+__attribute__((optimize("O0")))
+static size_t process_esp_app_desc_data(const uint32_t *src, bootloader_sha256_handle_t sha_handle, uint32_t *checksum, esp_image_metadata_t *metadata)
+{
+    /* Using data_buffer here helps to securely read secure_version
+     * (for anti-rollback) from esp_app_desc_t, preventing FI attack.
+     * We read data from Flash into this buffer, which is covered by sha256.
+     * Therefore, if the flash is under attackers control and contents are modified
+     * the sha256 comparison will fail.
+     *
+     * The esp_app_desc_t structure is located in DROM and is always in segment #0.
+     *
+     * esp_app_desc_t is always at #0 segment (index==0).
+     * secure_version field of esp_app_desc_t is located at #2 word (w_i==1).
+     */
+    uint32_t data_buffer[2];
+    memcpy(data_buffer, src, sizeof(data_buffer));
+    assert(data_buffer[0] == ESP_APP_DESC_MAGIC_WORD);
+    metadata->secure_version = data_buffer[1];
+    if (checksum != NULL) {
+        *checksum ^= data_buffer[0] ^ data_buffer[1];
+    }
+    if (sha_handle != NULL) {
+        bootloader_sha256_data(sha_handle, data_buffer, sizeof(data_buffer));
+    }
+    ESP_FAULT_ASSERT(memcmp(data_buffer, src, sizeof(data_buffer)) == 0);
+    ESP_FAULT_ASSERT(memcmp(&metadata->secure_version, &src[1], sizeof(uint32_t)) == 0);
+    return sizeof(data_buffer);
+}
+#endif // CONFIG_BOOTLOADER_APP_ANTI_ROLLBACK
+
+static esp_err_t process_segment_data(int segment, intptr_t load_addr, uint32_t data_addr, uint32_t data_len, bool do_load, bootloader_sha256_handle_t sha_handle, uint32_t *checksum, esp_image_metadata_t *metadata)
 {
    // If we are not loading, and the checksum is empty, skip processing this
    // segment for data
@@ -649,10 +701,33 @@ static esp_err_t process_segment_data(intptr_t load_addr, uint32_t data_addr, ui
 #endif
    }
    uint32_t *dest = (uint32_t *)load_addr;
-#endif
+#endif // BOOTLOADER_BUILD

    const uint32_t *src = data;

+    // Case I: Bootloader verifying application
+    // Case II: Bootloader verifying bootloader
+    // The esp_app_desc_t structure is located in DROM and is always in segment #0.
+    // Anti-rollback check and efuse block version check should handle only Case I from above.
+    if (segment == 0 && metadata->start_addr != ESP_BOOTLOADER_OFFSET) {
+/* ESP32 doesn't have more memory and more efuse bits for block major version. */
+#if !CONFIG_IDF_TARGET_ESP32
+        const esp_app_desc_t *app_desc = (const esp_app_desc_t *)src;
+        esp_err_t ret = bootloader_common_check_efuse_blk_validity(app_desc->min_efuse_blk_rev_full, app_desc->max_efuse_blk_rev_full);
+        if (ret != ESP_OK) {
+            bootloader_munmap(data);
+            return ret;
+        }
+#endif  // !CONFIG_IDF_TARGET_ESP32
+#if CONFIG_BOOTLOADER_APP_ANTI_ROLLBACK
+        ESP_LOGD(TAG, "additional anti-rollback check 0x%"PRIx32, data_addr);
+        size_t len = process_esp_app_desc_data(src, sha_handle, checksum, metadata);
+        data_len -= len;
+        src += len / 4;
+        // In BOOTLOADER_BUILD, for DROM (segment #0) we do not load it into dest (only map it), do_load = false.
+#endif // CONFIG_BOOTLOADER_APP_ANTI_ROLLBACK
+    }
+
    for (size_t i = 0; i < data_len; i += 4) {
        int w_i = i / 4; // Word index
        uint32_t w = src[w_i];
@@ -932,9 +1007,13 @@ static esp_err_t verify_secure_boot_signature(bootloader_sha256_handle_t sha_han
        return ESP_ERR_IMAGE_INVALID;
    }

-#if CONFIG_SECURE_SIGNED_APPS_RSA_SCHEME || CONFIG_SECURE_SIGNED_APPS_ECDSA_V2_SCHEME
    // Adjust image length result to include the appended signature
+#if CONFIG_SECURE_SIGNED_APPS_RSA_SCHEME || CONFIG_SECURE_SIGNED_APPS_ECDSA_V2_SCHEME
    data->image_len = end - data->start_addr + sizeof(ets_secure_boot_signature_t);
+#elif defined(CONFIG_SECURE_SIGNED_APPS_ECDSA_SCHEME)
+    if (data->start_addr != ESP_BOOTLOADER_OFFSET) {
+        data->image_len = end - data->start_addr + sizeof(esp_secure_boot_sig_block_t);
+    }
 #endif

 #endif // SECURE_BOOT_CHECK_SIGNATURE
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
 *
 * SPDX-License-Identifier: Apache-2.0
 */
@@ -12,6 +12,9 @@
 #include "esp_flash_encrypt.h"
 #include "esp_secure_boot.h"
 #include "hal/efuse_hal.h"
+#include "hal/spi_flash_encrypted_ll.h"
+#include "hal/spi_flash_encrypt_hal.h"
+#include "soc/soc_caps.h"

 #if CONFIG_IDF_TARGET_ESP32
 #define CRYPT_CNT ESP_EFUSE_FLASH_CRYPT_CNT
@@ -211,6 +214,18 @@ void esp_flash_encryption_set_release_mode(void)
 #endif // CONFIG_SOC_FLASH_ENCRYPTION_XTS_AES_128_DERIVED
 #endif // !CONFIG_IDF_TARGET_ESP32

+#ifdef SOC_FLASH_ENCRYPTION_XTS_AES_SUPPORT_PSEUDO_ROUND
+    if (spi_flash_encrypt_ll_is_pseudo_rounds_function_supported()) {
+        uint8_t xts_pseudo_level = 0;
+        esp_efuse_read_field_blob(ESP_EFUSE_XTS_DPA_PSEUDO_LEVEL, &xts_pseudo_level, ESP_EFUSE_XTS_DPA_PSEUDO_LEVEL[0]->bit_count);
+
+        if (xts_pseudo_level == ESP_XTS_AES_PSEUDO_ROUNDS_DISABLE) {
+            xts_pseudo_level = ESP_XTS_AES_PSEUDO_ROUNDS_LOW;
+            esp_efuse_write_field_blob(ESP_EFUSE_XTS_DPA_PSEUDO_LEVEL, &xts_pseudo_level, ESP_EFUSE_XTS_DPA_PSEUDO_LEVEL[0]->bit_count);
+        }
+    }
+#endif
+
 #ifdef CONFIG_IDF_TARGET_ESP32
    esp_efuse_write_field_bit(ESP_EFUSE_WR_DIS_DIS_CACHE);
 #else
@@ -457,6 +472,17 @@ bool esp_flash_encryption_cfg_verify_release_mode(void)
    }
    result &= secure;

+#if SOC_FLASH_ENCRYPTION_XTS_AES_SUPPORT_PSEUDO_ROUND
+    if (spi_flash_encrypt_ll_is_pseudo_rounds_function_supported()) {
+        uint8_t xts_pseudo_level = 0;
+        esp_efuse_read_field_blob(ESP_EFUSE_XTS_DPA_PSEUDO_LEVEL, &xts_pseudo_level, ESP_EFUSE_XTS_DPA_PSEUDO_LEVEL[0]->bit_count);
+        if (!xts_pseudo_level) {
+            result &= false;
+            ESP_LOGW(TAG, "Not enabled XTS-AES pseudo rounds function (set XTS_DPA_PSEUDO_LEVEL->1 or more)");
+        }
+    }
+#endif
+
    return result;
 }
 #endif // not CONFIG_IDF_TARGET_ESP32
@@ -393,14 +393,21 @@ static esp_err_t encrypt_partition(int index, const esp_partition_info_t *partit
 {
    esp_err_t err;
    bool should_encrypt = (partition->flags & PART_FLAG_ENCRYPTED);
+    uint32_t size = partition->pos.size;

    if (partition->type == PART_TYPE_APP) {
        /* check if the partition holds a valid unencrypted app */
-        esp_image_metadata_t data_ignored;
+        esp_image_metadata_t image_data = {};
        err = esp_image_verify(ESP_IMAGE_VERIFY,
                               &partition->pos,
-                               &data_ignored);
+                               &image_data);
        should_encrypt = (err == ESP_OK);
+#ifdef CONFIG_SECURE_FLASH_ENCRYPT_ONLY_IMAGE_LEN_IN_APP_PART
+        if (should_encrypt) {
+            // Encrypt only the app image instead of encrypting the whole partition
+            size = image_data.image_len;
+        }
+#endif
    } else if ((partition->type == PART_TYPE_DATA && partition->subtype == PART_SUBTYPE_DATA_OTA)
                || (partition->type == PART_TYPE_DATA && partition->subtype == PART_SUBTYPE_DATA_NVS_KEYS)) {
        /* check if we have ota data partition and the partition should be encrypted unconditionally */
@@ -411,9 +418,9 @@ static esp_err_t encrypt_partition(int index, const esp_partition_info_t *partit
        return ESP_OK;
    } else {
        /* should_encrypt */
-        ESP_LOGI(TAG, "Encrypting partition %d at offset 0x%x (length 0x%x)...", index, partition->pos.offset, partition->pos.size);
+        ESP_LOGI(TAG, "Encrypting partition %d at offset 0x%x (length 0x%x)...", index, partition->pos.offset, size);

-        err = esp_flash_encrypt_region(partition->pos.offset, partition->pos.size);
+        err = esp_flash_encrypt_region(partition->pos.offset, size);
        ESP_LOGI(TAG, "Done encrypting");
        if (err != ESP_OK) {
            ESP_LOGE(TAG, "Failed to encrypt partition %d", index);
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
 *
 * SPDX-License-Identifier: Apache-2.0
 */
@@ -12,6 +12,10 @@
 #include "esp_secure_boot.h"
 #include "hal/efuse_hal.h"

+#ifdef SOC_ECDSA_SUPPORTED
+#include "hal/ecdsa_ll.h"
+#endif
+
 #ifndef BOOTLOADER_BUILD
 static __attribute__((unused)) const char *TAG = "secure_boot";

@@ -331,6 +335,23 @@ bool esp_secure_boot_cfg_verify_release_mode(void)
    }
 #endif

+#ifdef SOC_ECDSA_P192_CURVE_DEFAULT_DISABLED
+    if (ecdsa_ll_is_configurable_curve_supported()) {
+        secure = esp_efuse_read_field_bit(ESP_EFUSE_WR_DIS_ECDSA_CURVE_MODE);
+        if (!secure) {
+            uint8_t current_curve;
+            esp_err_t err = esp_efuse_read_field_blob(ESP_EFUSE_ECDSA_CURVE_MODE, &current_curve, ESP_EFUSE_ECDSA_CURVE_MODE[0]->bit_count);
+            if (err == ESP_OK) {
+                if (current_curve != ESP_EFUSE_ECDSA_CURVE_MODE_ALLOW_ONLY_P256_BIT_LOCKED) {
+                    // If not P256 mode
+                    result &= secure;
+                    ESP_LOGW(TAG, "Not write disabled ECDSA curve mode (set WR_DIS_ECDSA_CURVE_MODE->1)");
+                }
+            }
+        }
+    }
+#endif
+
 #ifdef CONFIG_SECURE_BOOT_ENABLE_AGGRESSIVE_KEY_REVOKE
    secure = esp_efuse_read_field_bit(ESP_EFUSE_SECURE_BOOT_AGGRESSIVE_REVOKE);
    result &= secure;
@@ -4,7 +4,3 @@ components/bootloader_support/test_apps/rtc_custom_section:
  enable:
    - if: SOC_RTC_MEM_SUPPORTED == 1
      reason: this feature is supported on chips that have RTC memory
-  disable:
-    - if: IDF_TARGET == "esp32p4"
-      temporary: true
-      reason: this feature on esp32p4 isn't supported yet # TODO: IDF-8069
@@ -1,2 +1,2 @@
-| Supported Targets | ESP32 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-S2 | ESP32-S3 |
-| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- |
+| Supported Targets | ESP32 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
+| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- |
@@ -30,6 +30,8 @@ set(common_include_dirs
    common/api/include/api
    common/btc/profile/esp/blufi/include
    common/btc/profile/esp/include
+    common/hci_log/include
+    common/ble_log/include
 )

 set(ble_mesh_include_dirs
@@ -45,15 +47,25 @@ set(ble_mesh_include_dirs
    "esp_ble_mesh/api/core/include"
    "esp_ble_mesh/api/models/include"
    "esp_ble_mesh/api"
+)
+
+set(ble_mesh_v11_include_dirs
+    "esp_ble_mesh/lib/include"
    "esp_ble_mesh/v1.1/api/core/include"
    "esp_ble_mesh/v1.1/api/models/include"
    "esp_ble_mesh/v1.1/btc/include"
-    "esp_ble_mesh/v1.1/include"
 )

+if(CONFIG_IDF_DOC_BUILD)
+    list(APPEND ble_mesh_include_dirs
+                ${ble_mesh_v11_include_dirs})
+endif()
+
 set(bluedroid_include_dirs host/bluedroid/api/include/api)

+if(CONFIG_BT_CONTROLLER_ENABLED OR CONFIG_IDF_DOC_BUILD)
 set(nimble_hci_include_dirs host/nimble/esp-hci/include)
+endif()

 if(CONFIG_IDF_DOC_BUILD)
    list(APPEND include_dirs
@@ -64,37 +76,48 @@ if(CONFIG_IDF_DOC_BUILD)
         ${nimble_hci_include_dirs})
 endif()

-
 if(CONFIG_BT_ENABLED)

    set(srcs "")
    set(include_dirs "")
-    set(ldfragments "linker.lf")
+    set(ldscripts "linker_common.lf")
+    if(CONFIG_BT_CONTROLLER_ENABLED)
+        if(CONFIG_IDF_TARGET_ESP32)
+            list(APPEND srcs "controller/esp32/bt.c"
+                             "controller/esp32/hli_api.c"
+                             "controller/esp32/hli_vectors.S")
+            list(APPEND ldscripts "linker_rw_bt_controller.lf")

-    if(CONFIG_IDF_TARGET_ESP32)
-        list(APPEND srcs "controller/esp32/bt.c"
-                         "controller/esp32/hli_api.c"
-                         "controller/esp32/hli_vectors.S")
+        elseif(CONFIG_IDF_TARGET_ESP32C3)
+            list(APPEND srcs "controller/esp32c3/bt.c")
+            list(APPEND ldscripts "linker_rw_bt_controller.lf")

-    elseif(CONFIG_IDF_TARGET_ESP32C3)
-        list(APPEND srcs "controller/esp32c3/bt.c")
+        elseif(CONFIG_IDF_TARGET_ESP32S3)
+            list(APPEND srcs "controller/esp32c3/bt.c")
+            list(APPEND ldscripts "linker_rw_bt_controller.lf")

-    elseif(CONFIG_IDF_TARGET_ESP32S3)
-        list(APPEND srcs "controller/esp32c3/bt.c")
+        elseif(CONFIG_IDF_TARGET_ESP32C2)
+            list(APPEND srcs "controller/esp32c2/bt.c"
+                             "controller/esp32c2/ble.c")
+            if(CONFIG_BT_CTRL_RUN_IN_FLASH_ONLY)
+                list(APPEND srcs "controller/esp32c2/dummy.c")
+            endif()
+            set(ldscripts "linker_esp32c2.lf")

-    elseif(CONFIG_IDF_TARGET_ESP32C2)
-        set(ldfragments "linker.lf.esp32c2")
-        list(APPEND srcs "controller/esp32c2/bt.c")
+        elseif(CONFIG_IDF_TARGET_ESP32C6)
+            list(APPEND srcs "controller/esp32c6/ble.c")
+            list(APPEND srcs "controller/esp32c6/bt.c")
+            list(APPEND ldscripts "linker_esp_ble_controller.lf")

-    elseif(CONFIG_IDF_TARGET_ESP32C6)
-        list(APPEND srcs "controller/esp32c6/bt.c")
+        elseif(CONFIG_IDF_TARGET_ESP32H2)
+            list(APPEND srcs "controller/esp32h2/ble.c")
+            list(APPEND srcs "controller/esp32h2/bt.c")
+            list(APPEND ldscripts "linker_esp_ble_controller.lf")
+        endif()

-    elseif(CONFIG_IDF_TARGET_ESP32H2)
-        list(APPEND srcs "controller/esp32h2/bt.c")
+        list(APPEND include_dirs ${target_specific_include_dirs})
    endif()

-    list(APPEND include_dirs ${target_specific_include_dirs})
-
    # Common
    list(APPEND include_dirs common/osi/include)

@@ -102,11 +125,13 @@ if(CONFIG_BT_ENABLED)
            common/btc/include
            common/include
            porting/mem/
+            porting/include
        )
    list(APPEND include_dirs ${common_include_dirs})

    list(APPEND srcs "common/btc/core/btc_alarm.c"
         "common/api/esp_blufi_api.c"
+         "common/hci_log/bt_hci_log.c"
         "common/btc/core/btc_manage.c"
         "common/btc/core/btc_task.c"
         "common/btc/profile/esp/blufi/blufi_prf.c"
@@ -127,8 +152,46 @@ if(CONFIG_BT_ENABLED)
         "common/osi/osi.c"
         "common/osi/semaphore.c"
         "porting/mem/bt_osi_mem.c"
+         "common/ble_log/ble_log_spi_out.c"
+         "common/ble_log/ble_log_uhci_out.c"
         )

+    # BLE Log Module
+    if(CONFIG_BLE_LOG_ENABLED)
+        # Core source files
+        list(APPEND srcs
+             common/ble_log/src/ble_log.c
+             common/ble_log/src/ble_log_lbm.c
+             common/ble_log/src/ble_log_rt.c
+             common/ble_log/src/ble_log_util.c
+        )
+
+        # Includes
+        list(APPEND include_dirs
+             common/ble_log/include
+        )
+
+        # Private includes
+        list(APPEND priv_include_dirs
+             common/ble_log/src/internal_include
+             common/ble_log/src/internal_include/prph
+        )
+
+        # Timestamp synchronization extension
+        if(CONFIG_BLE_LOG_TS_ENABLED)
+            list(APPEND srcs common/ble_log/src/ble_log_ts.c)
+        endif()
+
+        # Peripheral interface implementation
+        if(CONFIG_BLE_LOG_PRPH_DUMMY)
+            list(APPEND srcs common/ble_log/src/prph/ble_log_prph_dummy.c)
+        elseif(CONFIG_BLE_LOG_PRPH_SPI_MASTER_DMA)
+            list(APPEND srcs common/ble_log/src/prph/ble_log_prph_spi_master_dma.c)
+        elseif(CONFIG_BLE_LOG_PRPH_UART_DMA)
+            list(APPEND srcs common/ble_log/src/prph/ble_log_prph_uart_dma.c)
+        endif()
+    endif()
+
    # Host Bluedroid
    if(CONFIG_BT_BLUEDROID_ENABLED)

@@ -174,6 +237,7 @@ if(CONFIG_BT_ENABLED)

        list(APPEND srcs "host/bluedroid/api/esp_a2dp_api.c"
                   "host/bluedroid/api/esp_avrc_api.c"
+                   "host/bluedroid/api/esp_bluedroid_hci.c"
                   "host/bluedroid/api/esp_bt_device.c"
                   "host/bluedroid/api/esp_bt_main.c"
                   "host/bluedroid/api/esp_gap_ble_api.c"
@@ -434,6 +498,19 @@ if(CONFIG_BT_ENABLED)
            list(APPEND srcs "esp_ble_mesh/core/bluedroid_host/adapter.c")
        endif()

+        if(CONFIG_BT_BLE_FEAT_ISO_EN)
+            list(APPEND srcs "host/bluedroid/stack/btm/btm_ble_iso.c"
+                            "host/bluedroid/btc/profile/std/iso/btc_iso_ble.c"
+                            "host/bluedroid/api/esp_ble_iso_api.c"
+                            "host/bluedroid/hci/ble_hci_iso.c")
+        endif()
+
+        if(CONFIG_BT_BLE_FEAT_CTE_EN)
+            list(APPEND srcs "host/bluedroid/stack/btm/btm_ble_cte.c"
+                            "host/bluedroid/btc/profile/std/cte/btc_ble_cte.c"
+                            "host/bluedroid/api/esp_ble_cte_api.c")
+        endif()
+
    endif()

    if(CONFIG_BLE_MESH)
@@ -509,7 +586,6 @@ if(CONFIG_BT_ENABLED)
                    "esp_ble_mesh/core/rpl.c"
                    "esp_ble_mesh/core/scan.c"
                    "esp_ble_mesh/core/test.c"
-                    "esp_ble_mesh/core/transport.c"
                    "esp_ble_mesh/models/common/device_property.c"
                    "esp_ble_mesh/models/common/model_common.c"
                    "esp_ble_mesh/models/client/client_common.c"
@@ -523,80 +599,121 @@ if(CONFIG_BT_ENABLED)
                    "esp_ble_mesh/models/server/server_common.c"
                    "esp_ble_mesh/models/server/state_binding.c"
                    "esp_ble_mesh/models/server/state_transition.c"
-                    "esp_ble_mesh/models/server/time_scene_server.c"
-                    "esp_ble_mesh/v1.1/api/core/esp_ble_mesh_agg_model_api.c"
-                    "esp_ble_mesh/v1.1/api/core/esp_ble_mesh_brc_model_api.c"
-                    "esp_ble_mesh/v1.1/api/core/esp_ble_mesh_cm_data_api.c"
-                    "esp_ble_mesh/v1.1/api/core/esp_ble_mesh_df_model_api.c"
-                    "esp_ble_mesh/v1.1/api/core/esp_ble_mesh_lcd_model_api.c"
-                    "esp_ble_mesh/v1.1/api/core/esp_ble_mesh_odp_model_api.c"
-                    "esp_ble_mesh/v1.1/api/core/esp_ble_mesh_prb_model_api.c"
-                    "esp_ble_mesh/v1.1/api/core/esp_ble_mesh_rpr_model_api.c"
-                    "esp_ble_mesh/v1.1/api/core/esp_ble_mesh_sar_model_api.c"
-                    "esp_ble_mesh/v1.1/api/core/esp_ble_mesh_srpl_model_api.c"
-                    "esp_ble_mesh/v1.1/api/models/esp_ble_mesh_mbt_model_api.c"
-                    "esp_ble_mesh/v1.1/btc/btc_ble_mesh_agg_model.c"
-                    "esp_ble_mesh/v1.1/btc/btc_ble_mesh_brc_model.c"
-                    "esp_ble_mesh/v1.1/btc/btc_ble_mesh_df_model.c"
-                    "esp_ble_mesh/v1.1/btc/btc_ble_mesh_lcd_model.c"
-                    "esp_ble_mesh/v1.1/btc/btc_ble_mesh_mbt_model.c"
-                    "esp_ble_mesh/v1.1/btc/btc_ble_mesh_odp_model.c"
-                    "esp_ble_mesh/v1.1/btc/btc_ble_mesh_prb_model.c"
-                    "esp_ble_mesh/v1.1/btc/btc_ble_mesh_rpr_model.c"
-                    "esp_ble_mesh/v1.1/btc/btc_ble_mesh_sar_model.c"
-                    "esp_ble_mesh/v1.1/btc/btc_ble_mesh_srpl_model.c"
-                    "esp_ble_mesh/v1.1/ext.c")
+                    "esp_ble_mesh/models/server/time_scene_server.c")
+        if(CONFIG_BLE_MESH_V11_SUPPORT)
+            list(APPEND include_dirs ${ble_mesh_v11_include_dirs})
+
+            list(APPEND srcs
+                        "esp_ble_mesh/v1.1/api/core/esp_ble_mesh_agg_model_api.c"
+                        "esp_ble_mesh/v1.1/api/core/esp_ble_mesh_brc_model_api.c"
+                        "esp_ble_mesh/v1.1/api/core/esp_ble_mesh_cm_data_api.c"
+                        "esp_ble_mesh/v1.1/api/core/esp_ble_mesh_df_model_api.c"
+                        "esp_ble_mesh/v1.1/api/core/esp_ble_mesh_lcd_model_api.c"
+                        "esp_ble_mesh/v1.1/api/core/esp_ble_mesh_odp_model_api.c"
+                        "esp_ble_mesh/v1.1/api/core/esp_ble_mesh_prb_model_api.c"
+                        "esp_ble_mesh/v1.1/api/core/esp_ble_mesh_rpr_model_api.c"
+                        "esp_ble_mesh/v1.1/api/core/esp_ble_mesh_sar_model_api.c"
+                        "esp_ble_mesh/v1.1/api/core/esp_ble_mesh_srpl_model_api.c"
+                        "esp_ble_mesh/v1.1/api/models/esp_ble_mesh_mbt_model_api.c"
+                        "esp_ble_mesh/v1.1/btc/btc_ble_mesh_agg_model.c"
+                        "esp_ble_mesh/v1.1/btc/btc_ble_mesh_brc_model.c"
+                        "esp_ble_mesh/v1.1/btc/btc_ble_mesh_df_model.c"
+                        "esp_ble_mesh/v1.1/btc/btc_ble_mesh_lcd_model.c"
+                        "esp_ble_mesh/v1.1/btc/btc_ble_mesh_mbt_model.c"
+                        "esp_ble_mesh/v1.1/btc/btc_ble_mesh_odp_model.c"
+                        "esp_ble_mesh/v1.1/btc/btc_ble_mesh_prb_model.c"
+                        "esp_ble_mesh/v1.1/btc/btc_ble_mesh_rpr_model.c"
+                        "esp_ble_mesh/v1.1/btc/btc_ble_mesh_sar_model.c"
+                        "esp_ble_mesh/v1.1/btc/btc_ble_mesh_srpl_model.c"
+                        "esp_ble_mesh/lib/ext.c")
+            if(CONFIG_BLE_MESH_SAR_ENHANCEMENT)
+                list(APPEND srcs "esp_ble_mesh/core/transport.enh.c")
+            else()
+                list(APPEND srcs "esp_ble_mesh/core/transport.c")
+            endif()
+        else()
+            list(APPEND srcs
+                        "esp_ble_mesh/core/transport.c")
+        endif()
    endif()



    if(CONFIG_BT_LE_CONTROLLER_NPL_OS_PORTING_SUPPORT)
+        list(APPEND srcs
+                "porting/npl/freertos/src/npl_os_freertos.c"
+                "porting/mem/os_msys_init.c"
+                "porting/transport/src/hci_transport.c"
+        )
+
+        if(CONFIG_BT_CONTROLLER_DISABLED)
            list(APPEND srcs
-                    "porting/npl/freertos/src/npl_os_freertos.c"
-                    "porting/nimble/src/os_msys_init.c"
+                "host/nimble/nimble/porting/nimble/src/hal_uart.c"
            )
-
-            list(APPEND include_dirs
-                    porting/include
-                    porting/nimble/include
-                    porting/npl/freertos/include
-                    porting/transport/include
-            )
-
-            if(CONFIG_BT_LE_HCI_INTERFACE_USE_UART)
+        elseif(CONFIG_BT_LE_HCI_INTERFACE_USE_RAM)
+            if(CONFIG_BT_NIMBLE_ENABLED)
                list(APPEND srcs
-                        "porting/transport/uart/hci_uart.c"
-                    )
+                    "porting/transport/driver/vhci/hci_driver_nimble.c"
+                    "host/nimble/nimble/nimble/transport/esp_ipc/src/hci_esp_ipc.c"
+                )
+            else()
+                list(APPEND srcs
+                    "porting/transport/driver/vhci/hci_driver_standard.c"
+                )
            endif()
-    endif()
+        elseif(CONFIG_BT_LE_HCI_INTERFACE_USE_UART)
+                list(APPEND srcs
+                    "porting/transport/driver/common/hci_driver_util.c"
+                    "porting/transport/driver/common/hci_driver_h4.c"
+                    "porting/transport/driver/common/hci_driver_mem.c"
+                    "porting/transport/driver/uart/hci_driver_uart_config.c"
+                )
+            if(CONFIG_BT_LE_UART_HCI_DMA_MODE)
+                list(APPEND srcs
+                    "porting/transport/driver/uart/hci_driver_uart_dma.c"
+                )
+            else()
+                list(APPEND srcs
+                    "porting/transport/driver/uart/hci_driver_uart.c"
+                )
+            endif()
+        endif()

+        list(APPEND include_dirs
+                porting/include
+                porting/npl/freertos/include
+                porting/transport/include
+        )
+    endif()

    if(NOT (CONFIG_BT_LE_CRYPTO_STACK_MBEDTLS OR CONFIG_BT_NIMBLE_CRYPTO_STACK_MBEDTLS))
        list(APPEND include_dirs
-                porting/ext/tinycrypt/include
+                common/tinycrypt/include
+                common/tinycrypt/port
            )
-        list(APPEND srcs "porting/ext/tinycrypt/src/utils.c"
-                "porting/ext/tinycrypt/src/sha256.c"
-                "porting/ext/tinycrypt/src/ecc.c"
-                "porting/ext/tinycrypt/src/ctr_prng.c"
-                "porting/ext/tinycrypt/src/ctr_mode.c"
-                "porting/ext/tinycrypt/src/aes_decrypt.c"
-                "porting/ext/tinycrypt/src/aes_encrypt.c"
-                "porting/ext/tinycrypt/src/ccm_mode.c"
-                "porting/ext/tinycrypt/src/ecc_dsa.c"
-                "porting/ext/tinycrypt/src/cmac_mode.c"
-                "porting/ext/tinycrypt/src/ecc_dh.c"
-                "porting/ext/tinycrypt/src/hmac_prng.c"
-                "porting/ext/tinycrypt/src/ecc_platform_specific.c"
-                "porting/ext/tinycrypt/src/hmac.c"
-                "porting/ext/tinycrypt/src/cbc_mode.c")
+        list(APPEND srcs "common/tinycrypt/src/utils.c"
+                "common/tinycrypt/src/sha256.c"
+                "common/tinycrypt/src/ecc.c"
+                "common/tinycrypt/src/ctr_prng.c"
+                "common/tinycrypt/src/ctr_mode.c"
+                "common/tinycrypt/src/aes_decrypt.c"
+                "common/tinycrypt/src/aes_encrypt.c"
+                "common/tinycrypt/src/ccm_mode.c"
+                "common/tinycrypt/src/ecc_dsa.c"
+                "common/tinycrypt/src/cmac_mode.c"
+                "common/tinycrypt/src/ecc_dh.c"
+                "common/tinycrypt/src/hmac_prng.c"
+                "common/tinycrypt/src/ecc_platform_specific.c"
+                "common/tinycrypt/src/hmac.c"
+                "common/tinycrypt/src/cbc_mode.c"
+                "common/tinycrypt/port/esp_tinycrypt_port.c")
    endif()

    if(CONFIG_BT_NIMBLE_ENABLED)

        list(APPEND include_dirs
-
                    host/nimble/nimble/nimble/host/include
+                    host/nimble/nimble/nimble/include
                    host/nimble/nimble/nimble/host/services/ans/include
                    host/nimble/nimble/nimble/host/services/bas/include
                    host/nimble/nimble/nimble/host/services/dis/include
@@ -608,10 +725,15 @@ if(CONFIG_BT_ENABLED)
                    host/nimble/nimble/nimble/host/services/ipss/include
                    host/nimble/nimble/nimble/host/services/lls/include
                    host/nimble/nimble/nimble/host/services/prox/include
+                    host/nimble/nimble/nimble/host/services/cts/include
                    host/nimble/nimble/nimble/host/services/tps/include
+                    host/nimble/nimble/nimble/host/services/hid/include
+                    host/nimble/nimble/nimble/host/services/sps/include
+                    host/nimble/nimble/nimble/host/services/cte/include
                    host/nimble/nimble/nimble/host/util/include
                    host/nimble/nimble/nimble/host/store/ram/include
                    host/nimble/nimble/nimble/host/store/config/include
+                    host/nimble/nimble/nimble/host/services/ras/include
                    )

        list(APPEND srcs "host/nimble/nimble/nimble/transport/src/transport.c"
@@ -628,6 +750,12 @@ if(CONFIG_BT_ENABLED)
                    "host/nimble/nimble/nimble/host/services/dis/src/ble_svc_dis.c"
                    "host/nimble/nimble/nimble/host/services/lls/src/ble_svc_lls.c"
                    "host/nimble/nimble/nimble/host/services/prox/src/ble_svc_prox.c"
+                    "host/nimble/nimble/nimble/host/services/cts/src/ble_svc_cts.c"
+                    "host/nimble/nimble/nimble/host/services/hid/src/ble_svc_hid.c"
+                    "host/nimble/nimble/nimble/host/services/sps/src/ble_svc_sps.c"
+                    "host/nimble/nimble/nimble/host/services/cte/src/ble_svc_cte.c"
+                    "host/nimble/nimble/nimble/host/services/ras/src/ble_svc_ras.c"
+                    "host/nimble/nimble/nimble/host/src/ble_cs.c"
                    "host/nimble/nimble/nimble/host/src/ble_hs_conn.c"
                    "host/nimble/nimble/nimble/host/src/ble_store_util.c"
                    "host/nimble/nimble/nimble/host/src/ble_sm.c"
@@ -676,19 +804,37 @@ if(CONFIG_BT_ENABLED)
                    "host/nimble/nimble/nimble/host/store/ram/src/ble_store_ram.c"
                    "host/nimble/nimble/nimble/host/store/config/src/ble_store_config.c"
                    "host/nimble/nimble/nimble/host/store/config/src/ble_store_nvs.c"
+                    "host/nimble/nimble/nimble/host/src/ble_gattc_cache.c"
+                    "host/nimble/nimble/nimble/host/src/ble_gattc_cache_conn.c"
+                    "host/nimble/nimble/nimble/host/src/ble_eatt.c"
                )

+            if(CONFIG_BT_CONTROLLER_DISABLED AND CONFIG_BT_NIMBLE_TRANSPORT_UART)
+                list(APPEND srcs
+                        "host/nimble/nimble/nimble/transport/uart_ll/src/hci_uart.c"
+                        "host/nimble/nimble/nimble/transport/common/hci_h4/src/hci_h4.c"
+                )
+            endif()
+
            list(APPEND srcs
                "host/nimble/nimble/porting/nimble/src/nimble_port.c"
                "host/nimble/nimble/porting/npl/freertos/src/nimble_port_freertos.c"
+                "host/nimble/port/src/nvs_port.c"
            )
+
            list(APPEND include_dirs
-                porting/include
                host/nimble/nimble/porting/nimble/include
                host/nimble/port/include
                host/nimble/nimble/nimble/transport/include
+                host/nimble/nimble/nimble/include
            )

+            if(CONFIG_BT_CONTROLLER_DISABLED)
+                list(APPEND include_dirs
+                    host/nimble/nimble/nimble/transport/common/hci_h4/include
+                )
+            endif()
+
        if(NOT CONFIG_BT_LE_CONTROLLER_NPL_OS_PORTING_SUPPORT)
            list(APPEND srcs
                    "host/nimble/nimble/porting/nimble/src/endian.c"
@@ -698,16 +844,23 @@ if(CONFIG_BT_ENABLED)
                    "host/nimble/nimble/porting/nimble/src/os_msys_init.c"
                    "host/nimble/nimble/porting/npl/freertos/src/npl_os_freertos.c"
                    )
+
+            if(CONFIG_BT_CONTROLLER_DISABLED AND CONFIG_BT_NIMBLE_TRANSPORT_UART)
+                list(APPEND srcs
+                    "host/nimble/nimble/porting/nimble/src/hal_uart.c"
+                )
+            endif()
+
            list(APPEND include_dirs
+                    porting/include
                    host/nimble/nimble/porting/npl/freertos/include
-                    host/nimble/nimble/porting/nimble/include
-                    host/nimble/nimble/nimble/include
            )
        endif()

-        if(CONFIG_BT_NIMBLE_LEGACY_VHCI_ENABLE)
+        if(CONFIG_BT_NIMBLE_LEGACY_VHCI_ENABLE AND CONFIG_BT_CONTROLLER_ENABLED)
            list(APPEND srcs
                "host/nimble/esp-hci/src/esp_nimble_hci.c"
+                "host/nimble/nimble/nimble/transport/esp_ipc_legacy/src/hci_esp_ipc_legacy.c"
            )
            list(APPEND include_dirs ${nimble_hci_include_dirs})
        endif()
@@ -768,12 +921,25 @@ if(CONFIG_BT_ENABLED)

 endif()

+
+set(bt_priv_requires
+    nvs_flash
+    soc
+    esp_pm
+    esp_phy
+    esp_coex
+    mbedtls
+    driver
+    vfs
+    esp_gdbstub
+)
+
 idf_component_register(SRCS "${srcs}"
                       INCLUDE_DIRS "${include_dirs}"
                       PRIV_INCLUDE_DIRS "${priv_include_dirs}"
                       REQUIRES esp_timer esp_wifi
-                       PRIV_REQUIRES nvs_flash soc esp_pm esp_phy esp_coex mbedtls driver vfs
-                       LDFRAGMENTS "${ldfragments}")
+                       PRIV_REQUIRES "${bt_priv_requires}"
+                       LDFRAGMENTS "${ldscripts}")

 if(CONFIG_BT_ENABLED)
    target_compile_options(${COMPONENT_LIB} PRIVATE -Wno-implicit-fallthrough -Wno-unused-const-variable)
@@ -785,19 +951,47 @@ if(CONFIG_BT_ENABLED)
    elseif(CONFIG_IDF_TARGET_ESP32C3)
        target_link_directories(${COMPONENT_LIB} INTERFACE
                "${CMAKE_CURRENT_LIST_DIR}/controller/lib_esp32c3_family/esp32c3")
-        target_link_libraries(${COMPONENT_LIB} PUBLIC btdm_app)
+        if(CONFIG_BT_CTRL_RUN_IN_FLASH_ONLY)
+            target_link_libraries(${COMPONENT_LIB} PUBLIC btdm_app_flash)
+        else()
+            target_link_libraries(${COMPONENT_LIB} PUBLIC btdm_app)
+        endif()
    elseif(CONFIG_IDF_TARGET_ESP32S3)
        target_link_directories(${COMPONENT_LIB} INTERFACE
                "${CMAKE_CURRENT_LIST_DIR}/controller/lib_esp32c3_family/esp32s3")
-        target_link_libraries(${COMPONENT_LIB} PUBLIC btdm_app)
-    elseif(CONFIG_IDF_TARGET_ESP32C2)
-        add_prebuilt_library(libble_app "controller/lib_esp32c2/esp32c2-bt-lib/libble_app.a")
-        target_link_libraries(${COMPONENT_LIB} PRIVATE libble_app)
-    elseif(CONFIG_IDF_TARGET_ESP32C6)
-        add_prebuilt_library(libble_app "controller/lib_esp32c6/esp32c6-bt-lib/libble_app.a")
-        target_link_libraries(${COMPONENT_LIB} PRIVATE libble_app)
-    elseif(CONFIG_IDF_TARGET_ESP32H2)
-        add_prebuilt_library(libble_app "controller/lib_esp32h2/esp32h2-bt-lib/libble_app.a")
+        if(CONFIG_BT_CTRL_RUN_IN_FLASH_ONLY)
+            target_link_libraries(${COMPONENT_LIB} PUBLIC btdm_app_flash)
+        else()
+            target_link_libraries(${COMPONENT_LIB} PUBLIC btdm_app)
+        endif()
+    elseif(CONFIG_BT_CONTROLLER_ENABLED)
+        if(CONFIG_BT_LE_CONTROLLER_LOG_WRAP_PANIC_HANDLER_ENABLE)
+            target_link_libraries(${COMPONENT_LIB} INTERFACE "-Wl,--wrap=esp_panic_handler")
+        endif()
+        if(DEFINED CONFIG_BLE_LOG_PRPH_UART_DMA_PORT)
+            if(CONFIG_BLE_LOG_PRPH_UART_DMA_PORT EQUAL 0)
+                target_link_libraries(${COMPONENT_LIB} INTERFACE "-Wl,--wrap=uart_tx_chars")
+                target_link_libraries(${COMPONENT_LIB} INTERFACE "-Wl,--wrap=uart_write_bytes")
+                target_link_libraries(${COMPONENT_LIB} INTERFACE "-Wl,--wrap=uart_write_bytes_with_break")
+            endif()
+        endif()
+        if(CONFIG_BT_BLE_LOG_UHCI_OUT_ENABLED)
+            target_link_libraries(${COMPONENT_LIB} INTERFACE "-Wl,--wrap=uart_tx_chars")
+            target_link_libraries(${COMPONENT_LIB} INTERFACE "-Wl,--wrap=uart_write_bytes")
+            target_link_libraries(${COMPONENT_LIB} INTERFACE "-Wl,--wrap=uart_write_bytes_with_break")
+        endif()
+        if(CONFIG_IDF_TARGET_ESP32C6)
+            add_prebuilt_library(libble_app "controller/lib_${target}/${target}-bt-lib/esp32c6/libble_app.a"
+                                 REQUIRES esp_phy)
+        else()
+            if(CONFIG_BT_CTRL_RUN_IN_FLASH_ONLY AND CONFIG_IDF_TARGET_ESP32C2)
+                add_prebuilt_library(libble_app "controller/lib_${target}/${target}-bt-lib/libble_app_flash.a"
+                                     REQUIRES esp_phy)
+            else()
+                add_prebuilt_library(libble_app "controller/lib_${target}/${target}-bt-lib/libble_app.a"
+                                     REQUIRES esp_phy)
+            endif()
+        endif()
        target_link_libraries(${COMPONENT_LIB} PRIVATE libble_app)
    endif()

@@ -811,22 +1005,22 @@ if(CONFIG_BT_ENABLED)
    target_compile_options(${COMPONENT_LIB} PRIVATE "-Wno-format")
 endif()

-if(CONFIG_BLE_MESH)
+if(CONFIG_BLE_MESH_V11_SUPPORT)
    if(CONFIG_IDF_TARGET_ESP32)
-        add_prebuilt_library(mesh_v11 "esp_ble_mesh/v1.1/lib/esp32/libmesh_v1.1.a")
-        target_link_libraries(${COMPONENT_LIB} PRIVATE mesh_v11)
+        add_prebuilt_library(ble_mesh "esp_ble_mesh/lib/lib/esp32/libble_mesh.a")
+        target_link_libraries(${COMPONENT_LIB} PRIVATE ble_mesh)
    elseif(CONFIG_IDF_TARGET_ESP32S3)
-        add_prebuilt_library(mesh_v11 "esp_ble_mesh/v1.1/lib/esp32s3/libmesh_v1.1.a")
-        target_link_libraries(${COMPONENT_LIB} PRIVATE mesh_v11)
+        add_prebuilt_library(ble_mesh "esp_ble_mesh/lib/lib/esp32s3/libble_mesh.a")
+        target_link_libraries(${COMPONENT_LIB} PRIVATE ble_mesh)
    elseif(CONFIG_IDF_TARGET_ESP32C3)
-        add_prebuilt_library(mesh_v11 "esp_ble_mesh/v1.1/lib/esp32c3/libmesh_v1.1.a")
-        target_link_libraries(${COMPONENT_LIB} PRIVATE mesh_v11)
+        add_prebuilt_library(ble_mesh "esp_ble_mesh/lib/lib/esp32c3/libble_mesh.a")
+        target_link_libraries(${COMPONENT_LIB} PRIVATE ble_mesh)
    elseif(CONFIG_IDF_TARGET_ESP32C6)
-        add_prebuilt_library(mesh_v11 "esp_ble_mesh/v1.1/lib/esp32c6/libmesh_v1.1.a")
-        target_link_libraries(${COMPONENT_LIB} PRIVATE mesh_v11)
+        add_prebuilt_library(ble_mesh "esp_ble_mesh/lib/lib/esp32c6/libble_mesh.a")
+        target_link_libraries(${COMPONENT_LIB} PRIVATE ble_mesh)
    elseif(CONFIG_IDF_TARGET_ESP32H2)
-        add_prebuilt_library(mesh_v11 "esp_ble_mesh/v1.1/lib/esp32h2/libmesh_v1.1.a")
-        target_link_libraries(${COMPONENT_LIB} PRIVATE mesh_v11)
+        add_prebuilt_library(ble_mesh "esp_ble_mesh/lib/lib/esp32h2/libble_mesh.a")
+        target_link_libraries(${COMPONENT_LIB} PRIVATE ble_mesh)
    endif()
 endif()

@@ -1,9 +1,8 @@
 menu "Bluetooth"
-    visible if SOC_BT_SUPPORTED

    config BT_ENABLED
        bool "Bluetooth"
-        depends on SOC_BT_SUPPORTED && !APP_NO_BLOBS
+        depends on !APP_NO_BLOBS
        help
            Select this option to enable Bluetooth and show the submenu with Bluetooth configuration choices.

@@ -26,6 +25,7 @@ menu "Bluetooth"
                This option is recommended for BLE only usecases to save on memory

        config BT_CONTROLLER_ONLY
+            depends on SOC_BT_SUPPORTED
            bool "Disabled"
            help
                This option is recommended when you want to communicate directly with the
@@ -42,6 +42,7 @@ menu "Bluetooth"
            This helps to choose Bluetooth controller stack

        config BT_CONTROLLER_ENABLED
+            depends on SOC_BT_SUPPORTED
            bool "Enabled"
            help
                This option is recommended for Bluetooth controller usecases
@@ -79,6 +80,35 @@ menu "Bluetooth"
            We cannot split the memory into 3 different regions (IRAM, BLE-IRAM, DRAM).
            So this option will disable the PMP (ESP_SYSTEM_PMP_IDRAM_SPLIT)

+    menu "Common Options"
+        source "$IDF_PATH/components/bt/common/Kconfig.in"
+    endmenu
+
+    config BT_HCI_LOG_DEBUG_EN
+        depends on BT_BLUEDROID_ENABLED || BT_NIMBLE_ENABLED
+        bool "Enable Bluetooth HCI debug mode"
+        default n
+        help
+            This option is used to enable bluetooth debug mode, which saves the hci layer data stream.
+
+    config BT_HCI_LOG_DATA_BUFFER_SIZE
+        depends on BT_HCI_LOG_DEBUG_EN
+        int "Size of the cache used for HCI data in Bluetooth HCI debug mode (N*1024 bytes)"
+        range 1 100
+        default 5
+        help
+            This option is to configure the buffer size of the hci data steam cache in hci debug mode.
+            This is a ring buffer, the new data will overwrite the oldest data if the buffer is full.
+
+    config BT_HCI_LOG_ADV_BUFFER_SIZE
+        depends on BT_HCI_LOG_DEBUG_EN
+        int "Size of the cache used for adv report in Bluetooth HCI debug mode (N*1024 bytes)"
+        range 1 100
+        default 8
+        help
+            This option is to configure the buffer size of the hci adv report cache in hci debug mode.
+            This is a ring buffer, the new data will overwrite the oldest data if the buffer is full.
+
 endmenu

 menuconfig BLE_MESH
@@ -0,0 +1,257 @@
+config BT_ALARM_MAX_NUM
+    int "Maximum number of Bluetooth alarms"
+    default 50
+    depends on (BT_BLUEDROID_ENABLED || BT_NIMBLE_ENABLED)
+    help
+        This option decides the maximum number of alarms which
+        could be used by Bluetooth host.
+
+menu "BLE Log"
+    source "$IDF_PATH/components/bt/common/ble_log/Kconfig.in"
+endmenu
+
+config BT_BLE_LOG_SPI_OUT_ENABLED
+    bool "Output ble logs to SPI bus (Experimental)"
+    default n
+    help
+        Output ble logs to SPI bus
+
+config BT_BLE_LOG_SPI_OUT_UL_TASK_BUF_SIZE
+    int "SPI transaction buffer size for upper layer task logs"
+    depends on BT_BLE_LOG_SPI_OUT_ENABLED
+    default 512
+    help
+        SPI transaction buffer size for upper layer task logs.
+        There will be 2 SPI DMA buffers with the same size.
+
+config BT_BLE_LOG_SPI_OUT_HCI_ENABLED
+    bool "Enable HCI log output to SPI"
+    depends on BT_BLE_LOG_SPI_OUT_ENABLED
+    default n
+    help
+        Enable logging of HCI packets to the SPI bus when BLE SPI log output is enabled.
+
+config BT_BLE_LOG_SPI_OUT_HCI_BUF_SIZE
+    int "SPI transaction buffer size for HCI logs"
+    depends on BT_BLE_LOG_SPI_OUT_HCI_ENABLED
+    default 1024
+    help
+        SPI transaction buffer size for HCI logs.
+        There will be 2 SPI DMA buffers with the same size.
+
+config BT_BLE_LOG_SPI_OUT_HCI_TASK_CNT
+    int "HCI task count"
+    depends on BT_BLE_LOG_SPI_OUT_HCI_ENABLED
+    default 1
+    help
+        HCI task count
+
+config BT_BLE_LOG_SPI_OUT_HOST_ENABLED
+    bool "Enable Host log output to SPI"
+    depends on BT_BLE_LOG_SPI_OUT_ENABLED
+    default n
+    help
+        This configuration applies to the logs of both Bluedroid Host and NimBLE Host.
+        When BLE SPI log output is enabled, this option allows host logs to be transmitted via SPI.
+
+config BT_BLE_LOG_SPI_OUT_HOST_BUF_SIZE
+    int "SPI transaction buffer size for host logs"
+    depends on BT_BLE_LOG_SPI_OUT_HOST_ENABLED
+    default 1024
+    help
+        SPI transaction buffer size for host logs.
+        There will be 2 SPI DMA buffers with the same size.
+
+config BT_BLE_LOG_SPI_OUT_HOST_TASK_CNT
+    int "Host task count"
+    depends on BT_BLE_LOG_SPI_OUT_HOST_ENABLED
+    default 2
+    help
+        Host task count.
+
+config BT_BLE_LOG_SPI_OUT_LL_ENABLED
+    bool "Enable Controller log output to SPI"
+    depends on BT_BLE_LOG_SPI_OUT_ENABLED
+    depends on BT_LE_CONTROLLER_LOG_SPI_OUT_ENABLED
+    default n
+    help
+        Enable controller log output to SPI bus.
+
+config BT_BLE_LOG_SPI_OUT_LL_TASK_BUF_SIZE
+    int "SPI transaction buffer size for lower layer task logs"
+    depends on BT_BLE_LOG_SPI_OUT_LL_ENABLED
+    default 1024
+    help
+        SPI transaction buffer size for lower layer task logs.
+        There will be 2 SPI DMA buffers with the same size.
+
+config BT_BLE_LOG_SPI_OUT_LL_ISR_BUF_SIZE
+    int "SPI transaction buffer size for lower layer ISR logs"
+    depends on BT_BLE_LOG_SPI_OUT_LL_ENABLED
+    default 512
+    help
+        SPI transaction buffer size for lower layer ISR logs.
+        There will be 2 SPI DMA buffers with the same size.
+
+config BT_BLE_LOG_SPI_OUT_LL_HCI_BUF_SIZE
+    int "SPI transaction buffer size for lower layer HCI logs"
+    depends on BT_BLE_LOG_SPI_OUT_LL_ENABLED
+    default 512
+    help
+        SPI transaction buffer size for upper layer HCI logs.
+        There will be 2 SPI DMA buffers with the same size
+
+config BT_BLE_LOG_SPI_OUT_MOSI_IO_NUM
+    int "GPIO number of SPI MOSI"
+    depends on BT_BLE_LOG_SPI_OUT_ENABLED
+    default 0
+    help
+        GPIO number of SPI MOSI
+
+config BT_BLE_LOG_SPI_OUT_SCLK_IO_NUM
+    int "GPIO number of SPI SCLK"
+    depends on BT_BLE_LOG_SPI_OUT_ENABLED
+    default 1
+    help
+        GPIO number of SPI SCLK
+
+config BT_BLE_LOG_SPI_OUT_CS_IO_NUM
+    int "GPIO number of SPI CS"
+    depends on BT_BLE_LOG_SPI_OUT_ENABLED
+    default 2
+    help
+        GPIO number of SPI CS
+
+config BT_BLE_LOG_SPI_OUT_TS_SYNC_ENABLED
+    bool "Enable ble log & logic analyzer log time sync"
+    depends on BT_BLE_LOG_SPI_OUT_ENABLED
+    default y
+    help
+        Enable ble log & logic analyzer log time sync
+
+config BT_BLE_LOG_SPI_OUT_SYNC_IO_NUM
+    int "GPIO number of SYNC IO"
+    depends on BT_BLE_LOG_SPI_OUT_TS_SYNC_ENABLED
+    default 3
+    help
+        GPIO number of SYNC IO
+
+config BT_BLE_LOG_SPI_OUT_FLUSH_TIMER_ENABLED
+    bool "Enable periodic buffer flush out"
+    depends on BT_BLE_LOG_SPI_OUT_ENABLED
+    default n
+    help
+        Enable periodic buffer flush out
+        Not recommended when SPI receiver is unavailable
+
+config BT_BLE_LOG_SPI_OUT_FLUSH_TIMEOUT
+    int "Buffer flush out period in unit of ms"
+    depends on BT_BLE_LOG_SPI_OUT_FLUSH_TIMER_ENABLED
+    default 1000
+    help
+        Buffer flush out period in unit of ms
+
+config BT_BLE_LOG_SPI_OUT_LE_AUDIO_ENABLED
+    bool "Enable LE Audio log output to SPI"
+    depends on BT_BLE_LOG_SPI_OUT_ENABLED
+    default n
+    help
+        Enable LE Audio log output to SPI
+
+config BT_BLE_LOG_SPI_OUT_LE_AUDIO_BUF_SIZE
+    int "SPI transaction buffer size for LE Audio logs"
+    depends on BT_BLE_LOG_SPI_OUT_LE_AUDIO_ENABLED
+    default 1024
+    help
+        SPI transaction buffer size for LE Audio logs.
+        There will be 2 SPI DMA buffers with the same size.
+
+config BT_BLE_LOG_SPI_OUT_LE_AUDIO_TASK_CNT
+    int "LE audio task count"
+    depends on BT_BLE_LOG_SPI_OUT_LE_AUDIO_ENABLED
+    default 1
+    help
+        LE audio task count
+
+config BT_BLE_LOG_SPI_OUT_MESH_ENABLED
+    bool "Enable BLE mesh log output to SPI"
+    depends on BT_BLE_LOG_SPI_OUT_ENABLED
+    default n
+    help
+        Enable BLE mesh log output to SPI
+
+config BT_BLE_LOG_SPI_OUT_MESH_BUF_SIZE
+    int "SPI transaction buffer size for BLE mesh logs"
+    depends on BT_BLE_LOG_SPI_OUT_MESH_ENABLED
+    default 1024
+    help
+        SPI transaction buffer size for BLE mesh logs.
+        There will be 2 SPI DMA buffers with the same size.
+
+config BT_BLE_LOG_SPI_OUT_MESH_TASK_CNT
+    int "Mesh task count"
+    depends on BT_BLE_LOG_SPI_OUT_MESH_ENABLED
+    default 3
+    help
+        Mesh task count
+
+config BT_BLE_LOG_UHCI_OUT_ENABLED
+    bool "Output ble logs via UHCI (UART DMA) driver (Experimental)"
+    default n
+    help
+        Output ble logs via UHCI (UART DMA) driver
+        On enable, BT_BLE_LOG_UHCI_OUT_UART_PORT would be reinited with
+        BT_BLE_LOG_UHCI_OUT_UART_BAUD_RATE as new baud rate and
+        BT_BLE_LOG_UHCI_OUT_UART_IO_NUM_TX as new UART Tx IO
+
+config BT_BLE_LOG_UHCI_OUT_UART_PORT
+    int "UART port connected to UHCI controller"
+    depends on BT_BLE_LOG_UHCI_OUT_ENABLED
+    default 0
+    help
+        UART port connected to UHCI controller
+        If UART port 0 is selected, UART VFS Driver, UART ROM Driver
+        and UART Driver output would be redirected to BLE Log UHCI Out
+        to solve UART Tx FIFO multi-task access issue
+
+config BT_BLE_LOG_UHCI_OUT_LL_TASK_BUF_SIZE
+    int "UHCI transaction buffer size for lower layer task logs"
+    depends on BT_BLE_LOG_UHCI_OUT_ENABLED
+    default 1024
+    help
+        UHCI transaction buffer size for lower layer task logs
+
+config BT_BLE_LOG_UHCI_OUT_LL_ISR_BUF_SIZE
+    int "UHCI transaction buffer size for lower layer ISR logs"
+    depends on BT_BLE_LOG_UHCI_OUT_ENABLED
+    default 1024
+    help
+        UHCI transaction buffer size for lower layer ISR logs
+
+config BT_BLE_LOG_UHCI_OUT_LL_HCI_BUF_SIZE
+    int "UHCI transaction buffer size for lower layer HCI logs"
+    depends on BT_BLE_LOG_UHCI_OUT_ENABLED
+    default 1024
+    help
+        UHCI transaction buffer size for lower layer HCI logs
+
+config BT_BLE_LOG_UHCI_OUT_UART_NEED_INIT
+    bool "Enable to init UART port"
+    depends on BT_BLE_LOG_UHCI_OUT_ENABLED
+    default y
+    help
+        Enable to init UART port
+
+config BT_BLE_LOG_UHCI_OUT_UART_BAUD_RATE
+    int "Baud rate for BT_BLE_LOG_UHCI_OUT_UART_PORT"
+    depends on BT_BLE_LOG_UHCI_OUT_UART_NEED_INIT
+    default 3000000
+    help
+        Baud rate for BT_BLE_LOG_UHCI_OUT_UART_PORT
+
+config BT_BLE_LOG_UHCI_OUT_UART_IO_NUM_TX
+    int "IO number for UART TX port"
+    depends on BT_BLE_LOG_UHCI_OUT_UART_NEED_INIT
+    default 0
+    help
+        IO number for UART TX port
@@ -0,0 +1,169 @@
+config BLE_LOG_ENABLED
+    bool "Enable BLE Log Module (Experimental)"
+    default n
+    help
+        Enable BLE Log Module
+
+if BLE_LOG_ENABLED
+    config BLE_LOG_LBM_TRANS_SIZE
+        int "Buffer size for each peripheral transport"
+        default 512
+        help
+            There're 2 log buffer managers (LBMs) with compare-and-swap
+            (CAS) protection, 1 LBM with FreeRTOS mutex protection, 1 LBM
+            without protection for critical section. Each LBM is managing
+            2 ping-pong buffers, which means there will be 4 * 2 *
+            BLE_LOG_LBM_TRANS_SIZE bytes buffer allocated
+
+    config BLE_LOG_LBM_ATOMIC_LOCK_TASK_CNT
+        int "Count of log buffer managers with atomic lock protection for task context"
+        default 2
+        help
+            BLE Log module will search for an LBM with atomic lock protection first; if
+            all LBMs with atomic lock protection are unavailable, BLE Log module will
+            try to use the LBM with spin lock protection. So the more LBMs with atomic
+            lock protection are created, the better the logging performance will be.
+
+    config BLE_LOG_LBM_ATOMIC_LOCK_ISR_CNT
+        int "Count of log buffer managers with atomic lock protection for ISR context"
+        default 1
+        help
+            BLE Log module will search for an LBM with atomic lock protection first; if
+            all LBMs with atomic lock protection are unavailable, BLE Log module will
+            try to use the LBM with spin lock protection. So the more LBMs with atomic
+            lock protection are created, the more ISRs can nest.
+
+    config BLE_LOG_IS_ESP_CONTROLLER
+        bool "Current BLE Controller is ESP BLE Controller"
+        depends on BT_CONTROLLER_ENABLED
+        depends on SOC_ESP_NIMBLE_CONTROLLER
+        default y
+        select BT_LE_CONTROLLER_LOG_ENABLED
+        select BT_LE_CONTROLLER_LOG_MODE_BLE_LOG_V2
+        select BLE_LOG_LL_ENABLED
+        help
+            Current BLE Controller is ESP BLE Controller
+
+    config BLE_LOG_IS_ESP_LEGACY_CONTROLLER
+        bool "Current BLE Controller is ESP BLE Legacy Controller"
+        depends on BT_CONTROLLER_ENABLED
+        depends on !SOC_ESP_NIMBLE_CONTROLLER
+        depends on BT_CTRL_RUN_IN_FLASH_ONLY
+        default y
+        select BT_CTRL_LE_LOG_EN
+        select BLE_LOG_LL_ENABLED
+        help
+            Current BLE Controller is ESP BLE Legacy Controller
+
+    config BLE_LOG_LL_ENABLED
+        bool "Enable BLE Log for Link Layer"
+        depends on BT_CONTROLLER_ENABLED
+        default n
+        help
+            Enable BLE Log for Link Layer
+
+    config BLE_LOG_LBM_LL_TRANS_SIZE
+        int "Buffer size for each peripheral transport of Link Layer LBM"
+        depends on BLE_LOG_LL_ENABLED
+        default 1024
+        help
+            There're 2 Link Layer dedicated log buffer managers (LBMs) with
+            compare-and-swap (CAS) protection. Each LBM is managing 2 ping-
+            pong buffers, which means there will be additional 2 * 2 *
+            BLE_LOG_LBM_LL_TRANS_SIZE bytes buffer allocated
+
+    config BLE_LOG_PAYLOAD_CHECKSUM_ENABLED
+        bool "Enable payload checksum for BLE Log data integrity check"
+        default y
+        help
+            Checksum is the default method for BLE Log data integrity check,
+            but for targets with slow CPU speed, it may cause significant system
+            performance decrease; a compromise could be made to balance the
+            realtime performance and log data integrity, which is calculating the
+            checksum of frame head and payload all together by default, or only
+            calculate the checksum of frame head to minimize performance decrease
+
+    config BLE_LOG_ENH_STAT_ENABLED
+        bool "Enable enhanced statistics for BLE Log"
+        default n
+        help
+            Enable enhanced statistics for written/lost frame/bytes count, which may
+            cost additional ~100kB memory
+
+    config BLE_LOG_TS_ENABLED
+        bool "Enable BLE Log Timestamp Synchronization (TS)"
+        default n
+        help
+            Enable BLE Log TS with external logging module
+
+    config BLE_LOG_SYNC_IO_NUM
+        int "GPIO number for Timestamp Synchronization (TS) toggle output"
+        depends on BLE_LOG_TS_ENABLED
+        default 0
+        help
+            GPIO number for TS toggle output
+
+    choice BLE_LOG_PRPH_CHOICE
+        prompt "BLE Log peripheral choice"
+        default BLE_LOG_PRPH_DUMMY
+        help
+            Choose BLE Log peripheral
+
+        config BLE_LOG_PRPH_DUMMY
+            bool "Dummy transport"
+            help
+                Dummy transport (dump only)
+
+        config BLE_LOG_PRPH_SPI_MASTER_DMA
+            bool "Utilize SPI master DMA driver as transport"
+            depends on SOC_GPSPI_SUPPORTED
+            help
+                Utilize SPI master DMA driver as transport
+
+        config BLE_LOG_PRPH_UART_DMA
+            bool "Utilize UART DMA driver as transport"
+            depends on SOC_UHCI_SUPPORTED
+            help
+                Utilize UART DMA driver as transport
+    endchoice
+
+    if BLE_LOG_PRPH_SPI_MASTER_DMA
+        config BLE_LOG_PRPH_SPI_MASTER_DMA_MOSI_IO_NUM
+            int "GPIO number of MOSI port for SPI master DMA transport"
+            default 0
+            help
+                GPIO number of MOSI port for SPI master DMA transport
+
+        config BLE_LOG_PRPH_SPI_MASTER_DMA_SCLK_IO_NUM
+            int "GPIO number of SCLK port for SPI master DMA transport"
+            default 0
+            help
+                GPIO number of SCLK port for SPI master DMA transport
+
+        config BLE_LOG_PRPH_SPI_MASTER_DMA_CS_IO_NUM
+            int "GPIO number of CS port for SPI master DMA transport"
+            default 0
+            help
+                GPIO number of CS port for SPI master DMA transport
+    endif
+
+    if BLE_LOG_PRPH_UART_DMA
+        config BLE_LOG_PRPH_UART_DMA_PORT
+            int "UART port number for UART DMA transport"
+            default 0
+            help
+                UART port number for UART DMA
+
+        config BLE_LOG_PRPH_UART_DMA_BAUD_RATE
+            int "Baud rate of UART port for UART DMA transport"
+            default 921600
+            help
+                Determine the baud rate of UART port
+
+        config BLE_LOG_PRPH_UART_DMA_TX_IO_NUM
+            int "GPIO number for UART TX"
+            default 0
+            help
+                GPIO number for UART TX
+    endif
+endif
@@ -0,0 +1,450 @@
+# BLE Log Module
+
+A high-performance, modular Bluetooth logging system that provides real-time log capture and transmission capabilities for the ESP-IDF Bluetooth stack.
+
+## Table of Contents
+
+- [Overview](#overview)
+- [Architecture Design](#architecture-design)
+- [Features](#features)
+- [Quick Start](#quick-start)
+- [Configuration Options](#configuration-options)
+- [API Reference](#api-reference)
+- [Usage Examples](#usage-examples)
+- [Performance & Memory Optimization](#performance--memory-optimization)
+- [Troubleshooting](#troubleshooting)
+- [Important Notes](#important-notes)
+
+## Overview
+
+The BLE Log module is an efficient logging system specifically designed for the ESP-IDF Bluetooth stack, supporting real-time log capture, multi-source log collection, and various transmission methods. This module has been refactored with a modular design, featuring high-concurrency processing capabilities and low-latency characteristics.
+
+### Main Components
+
+- **BLE Log Core** (`ble_log.c`): Module core responsible for initialization and coordination of sub-modules
+- **Runtime Manager** (`ble_log_rt.c`): Runtime task management for log transmission scheduling
+- **Log Buffer Manager** (`ble_log_lbm.c`): Log buffer management supporting multiple locking mechanisms
+- **Peripheral Interface** (`ble_log_prph_*.c`): Peripheral interface abstraction layer supporting various transmission methods
+- **Timestamp Sync** (`ble_log_ts.c`): Timestamp synchronization module
+- **Utility** (`ble_log_util.c`): Common utility functions
+
+## Features
+
+### Core Functionality
+
+- **Multi-source Log Collection**: Supports multiple log sources including Link Layer, Host, HCI, etc.
+- **High Concurrency Processing**: Uses atomic and spin lock mechanisms for multi-task concurrent writing
+- **Real-time Transmission**: Asynchronous transmission mechanism based on FreeRTOS tasks
+- **Data Integrity**: Configurable checksum mechanism ensures data integrity
+- **Memory Optimization**: Ping-pong buffer design minimizes memory usage
+
+### Advanced Features
+
+- **Timestamp Synchronization**: Supports timestamp synchronization with external devices (optional)
+- **Enhanced Statistics**: Detailed logging statistics including loss rate analysis (optional)
+- **Link Layer Integration**: Deep integration with ESP-IDF Bluetooth Link Layer
+- **Multiple Transmission Methods**: Supports SPI DMA, UART DMA, and Dummy transmission
+
+### Performance Features
+
+- **IRAM Optimization**: Critical path code runs in IRAM ensuring low latency
+- **Lock-free Design**: Most operations use atomic operations reducing lock contention
+- **Buffer Reuse**: Intelligent buffer management reduces memory allocation overhead
+
+## Quick Start
+
+### 1. Enable Module
+
+Enable the BLE Log module in `menuconfig`:
+
+```
+Component config → Bluetooth → Enable BLE Log Module (Experimental)
+```
+
+### 2. Basic Configuration
+
+```c
+#include "ble_log.h"
+
+void app_main() {
+    // Initialize BLE Log module
+    if (!ble_log_init()) {
+        ESP_LOGE(TAG, "Failed to initialize BLE Log");
+        return;
+    }
+    
+    // Write log data
+    uint8_t data[] = {0x01, 0x02, 0x03, 0x04};
+    ble_log_write_hex(BLE_LOG_SRC_CUSTOM, data, sizeof(data));
+    
+    // Force flush buffers
+    ble_log_flush();
+    
+    // Cleanup resources
+    ble_log_deinit();
+}
+```
+
+### 3. Link Layer Integration
+
+When `CONFIG_BLE_LOG_LL_ENABLED` is enabled, Link Layer logs are automatically integrated:
+
+```c
+// Link Layer logs will automatically call this function
+void ble_log_write_hex_ll(uint32_t len, const uint8_t *addr,
+                          uint32_t len_append, const uint8_t *addr_append, 
+                          uint32_t flag);
+```
+
+## Configuration Options
+
+### Basic Configuration
+
+| Configuration | Default | Description |
+|---------------|---------|-------------|
+| `CONFIG_BLE_LOG_ENABLED` | n | Enable BLE Log module |
+| `CONFIG_BLE_LOG_LBM_TRANS_SIZE` | 512 | Size of each transport buffer |
+| `CONFIG_BLE_LOG_LBM_ATOMIC_LOCK_TASK_CNT` | 2 | Number of atomic lock LBMs for task context |
+| `CONFIG_BLE_LOG_LBM_ATOMIC_LOCK_ISR_CNT` | 1 | Number of atomic lock LBMs for ISR context |
+
+### Link Layer Configuration
+
+| Configuration | Default | Description |
+|---------------|---------|-------------|
+| `CONFIG_BLE_LOG_LL_ENABLED` | y | Enable Link Layer logging |
+| `CONFIG_BLE_LOG_LBM_LL_TRANS_SIZE` | 1024 | Link Layer transport buffer size |
+
+### Advanced Features
+
+| Configuration | Default | Description |
+|---------------|---------|-------------|
+| `CONFIG_BLE_LOG_PAYLOAD_CHECKSUM_ENABLED` | y | Enable payload checksum |
+| `CONFIG_BLE_LOG_ENH_STAT_ENABLED` | n | Enable enhanced statistics |
+| `CONFIG_BLE_LOG_TS_ENABLED` | n | Enable timestamp synchronization |
+
+### Transport Method Configuration
+
+| Transport | Configuration | Description |
+|-----------|---------------|-------------|
+| Dummy | `CONFIG_BLE_LOG_PRPH_DUMMY` | Debug dummy transport |
+| SPI Master DMA | `CONFIG_BLE_LOG_PRPH_SPI_MASTER_DMA` | SPI DMA transport |
+| UART DMA | `CONFIG_BLE_LOG_PRPH_UART_DMA` | UART DMA transport |
+
+## API Reference
+
+### Core API
+
+#### `bool ble_log_init(void)`
+
+Initialize the BLE Log module.
+
+**Return Value**: 
+- `true`: Initialization successful
+- `false`: Initialization failed
+
+**Note**: Must be called before using any other APIs.
+
+#### `void ble_log_deinit(void)`
+
+Cleanup the BLE Log module and release all resources.
+
+**Note**: 
+- All pending logs will be lost after calling this function
+- Peripheral interface will be cleaned up first to avoid DMA transmission issues during memory release
+
+#### `bool ble_log_write_hex(ble_log_src_t src_code, const uint8_t *addr, size_t len)`
+
+Write hexadecimal log data.
+
+**Parameters**:
+- `src_code`: Log source code
+- `addr`: Data pointer
+- `len`: Data length
+
+**Return Value**:
+- `true`: Write successful
+- `false`: Write failed (module not initialized or insufficient buffer)
+
+#### `void ble_log_flush(void)`
+
+Force flush all buffers and send pending logs immediately.
+
+**Note**: This operation is blocking and will pause module operation until all buffers are cleared.
+
+#### `void ble_log_dump_to_console(void)`
+
+Output all buffer contents to console in hexadecimal format for debugging.
+
+### Log Source Types
+
+```c
+typedef enum {
+    BLE_LOG_SRC_INTERNAL = 0,    // Internal system logs
+    BLE_LOG_SRC_CUSTOM,          // User-defined logs
+    BLE_LOG_SRC_LL_TASK,         // Link Layer task logs
+    BLE_LOG_SRC_LL_HCI,          // Link Layer HCI logs
+    BLE_LOG_SRC_LL_ISR,          // Link Layer interrupt logs
+    BLE_LOG_SRC_HOST,            // Host layer logs
+    BLE_LOG_SRC_HCI,             // HCI layer logs
+    BLE_LOG_SRC_ENCODE,          // Encoding layer logs
+    BLE_LOG_SRC_MAX,
+} ble_log_src_t;
+```
+
+### Link Layer API (Conditional Compilation)
+
+#### `void ble_log_write_hex_ll(uint32_t len, const uint8_t *addr, uint32_t len_append, const uint8_t *addr_append, uint32_t flag)`
+
+Link Layer dedicated log writing interface.
+
+**Parameters**:
+- `len`: Main data length
+- `addr`: Main data pointer
+- `len_append`: Append data length  
+- `addr_append`: Append data pointer
+- `flag`: Log flag bits
+
+**Flag Definitions**:
+```c
+enum {
+    BLE_LOG_LL_FLAG_CONTINUE = 0,
+    BLE_LOG_LL_FLAG_END,
+    BLE_LOG_LL_FLAG_TASK,
+    BLE_LOG_LL_FLAG_ISR,
+    BLE_LOG_LL_FLAG_HCI,
+    BLE_LOG_LL_FLAG_RAW,
+    BLE_LOG_LL_FLAG_HCI_UPSTREAM,
+};
+```
+
+### Timestamp Synchronization API (Conditional Compilation)
+
+#### `bool ble_log_sync_enable(bool enable)`
+
+Enable or disable timestamp synchronization functionality.
+
+**Parameters**:
+- `enable`: true to enable, false to disable
+
+**Return Value**:
+- `true`: Operation successful
+- `false`: Operation failed (module not initialized)
+
+## Usage Examples
+
+### Example 1: Basic Logging
+
+```c
+#include "ble_log.h"
+
+void example_basic_logging() {
+    // Initialize
+    if (!ble_log_init()) {
+        printf("BLE Log init failed\n");
+        return;
+    }
+    
+    // Log some example data
+    uint8_t hci_cmd[] = {0x01, 0x03, 0x0C, 0x00};  // HCI Reset Command
+    ble_log_write_hex(BLE_LOG_SRC_HCI, hci_cmd, sizeof(hci_cmd));
+    
+    uint8_t host_data[] = {0x02, 0x00, 0x20, 0x0B, 0x00, 0x07, 0x00, 0x04, 0x00, 0x10, 0x01, 0x00, 0xFF, 0xFF, 0x00, 0x28};
+    ble_log_write_hex(BLE_LOG_SRC_HOST, host_data, sizeof(host_data));
+    
+    // Force send
+    ble_log_flush();
+    
+    // Cleanup
+    ble_log_deinit();
+}
+```
+
+### Example 2: ISR Context Logging
+
+```c
+void IRAM_ATTR some_isr_handler() {
+    uint8_t isr_data[] = {0xDE, 0xAD, 0xBE, 0xEF};
+    
+    // Safe to write logs in ISR context
+    ble_log_write_hex(BLE_LOG_SRC_LL_ISR, isr_data, sizeof(isr_data));
+}
+```
+
+### Example 3: Logging with Timestamp Synchronization
+
+```c
+void example_with_timestamp_sync() {
+    if (!ble_log_init()) {
+        return;
+    }
+    
+    #if CONFIG_BLE_LOG_TS_ENABLED
+    // Enable timestamp synchronization
+    ble_log_sync_enable(true);
+    #endif
+    
+    // Log data...
+    uint8_t data[] = {0x01, 0x02, 0x03};
+    ble_log_write_hex(BLE_LOG_SRC_CUSTOM, data, sizeof(data));
+    
+    // Timestamp information will be automatically included in logs
+    
+    ble_log_deinit();
+}
+```
+
+### Example 4: Performance Testing
+
+```c
+void example_performance_test() {
+    if (!ble_log_init()) {
+        return;
+    }
+    
+    uint8_t test_data[100];
+    for (int i = 0; i < 100; i++) {
+        test_data[i] = i;
+    }
+    
+    uint32_t start_time = esp_timer_get_time();
+    
+    // Send 1000 logs
+    for (int i = 0; i < 1000; i++) {
+        ble_log_write_hex(BLE_LOG_SRC_CUSTOM, test_data, sizeof(test_data));
+    }
+    
+    ble_log_flush();
+    uint32_t end_time = esp_timer_get_time();
+    
+    printf("Time to write 1000 logs: %lu us\n", end_time - start_time);
+    
+    ble_log_deinit();
+}
+```
+
+## Performance & Memory Optimization
+
+### Memory Usage Estimation
+
+Memory usage under default configuration:
+
+```
+Total Buffers = (Atomic Task LBMs + Atomic ISR LBMs + Spin LBMs) × 2 × Transport Buffer Size
+Default Config = (2 + 1 + 2) × 2 × 512 = 5120 bytes
+
+Additional when Link Layer enabled:
+LL Buffers = 2 × 2 × 1024 = 4096 bytes
+
+Additional when Enhanced Statistics enabled:
+Statistics Data = Log Source Count × sizeof(ble_log_stat_mgr_t) = 8 × 40 = 320 bytes
+```
+
+### Performance Optimization Recommendations
+
+1. **Adjust LBM Count**: Adjust atomic lock LBM count based on concurrency requirements
+2. **Buffer Size**: Adjust transport buffer size based on log volume
+3. **Transport Method**: Choose optimal transport method based on hardware (SPI DMA typically has best performance)
+4. **Checksum**: Consider disabling payload checksum when performance requirements are extremely high
+
+### Real-time Considerations
+
+- Critical code paths are marked with `BLE_LOG_IRAM_ATTR` and run in IRAM
+- Atomic operations avoid lock contention
+- Ping-pong buffers ensure continuous writing
+
+## Troubleshooting
+
+### Common Issues
+
+#### 1. Initialization Failure
+
+**Symptoms**: `ble_log_init()` returns `false`
+
+**Possible Causes**:
+- Insufficient memory
+- Peripheral configuration error
+- Duplicate initialization
+
+**Solutions**:
+```c
+// Check available memory
+printf("Free heap: %d bytes\n", esp_get_free_heap_size());
+
+// Ensure initialization only happens once
+static bool initialized = false;
+if (!initialized) {
+    initialized = ble_log_init();
+}
+```
+
+#### 2. Log Loss
+
+**Symptoms**: Some logs don't appear in output
+
+**Possible Causes**:
+- Buffer overflow
+- Transmission speed can't keep up with write speed
+- Module not properly initialized
+
+**Solutions**:
+```c
+// Enable enhanced statistics to check loss rate
+#if CONFIG_BLE_LOG_ENH_STAT_ENABLED
+// Statistics will be automatically included in logs
+#endif
+
+// Adjust buffer size
+// CONFIG_BLE_LOG_LBM_TRANS_SIZE=1024
+
+// Increase atomic lock LBM count
+// CONFIG_BLE_LOG_LBM_ATOMIC_LOCK_TASK_CNT=4
+```
+
+#### 3. Performance Issues
+
+**Symptoms**: System response becomes slow
+
+**Possible Causes**:
+- Checksum calculation overhead
+- Transmission bottleneck
+- Lock contention
+
+**Solutions**:
+```c
+// Disable payload checksum
+// CONFIG_BLE_LOG_PAYLOAD_CHECKSUM_ENABLED=n
+
+// Use faster transmission method
+// CONFIG_BLE_LOG_PRPH_SPI_MASTER_DMA=y
+
+// Adjust task priority
+#define BLE_LOG_TASK_PRIO configMAX_PRIORITIES-3
+```
+
+### Debugging Techniques
+
+#### 1. Use Dummy Transport for Debugging
+
+```c
+// Select Dummy transport in menuconfig
+// Then use dump function to view buffer contents
+ble_log_dump_to_console();
+```
+
+#### 2. Enable Enhanced Statistics
+
+```c
+// Enable in menuconfig
+// CONFIG_BLE_LOG_ENH_STAT_ENABLED=y
+// Statistics will be automatically output to logs
+```
+
+#### 3. Monitor Memory Usage
+
+```c
+void monitor_memory() {
+    printf("Free heap before init: %d\n", esp_get_free_heap_size());
+    ble_log_init();
+    printf("Free heap after init: %d\n", esp_get_free_heap_size());
+}
+```
@@ -0,0 +1,795 @@
+/*
+ * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#include "ble_log/ble_log_uhci_out.h"
+
+
+#if CONFIG_BT_BLE_LOG_UHCI_OUT_ENABLED
+
+// Private includes
+#include "esp_bt.h"
+
+// sdkconfig defines
+#define UHCI_OUT_LL_TASK_BUF_SIZE               CONFIG_BT_BLE_LOG_UHCI_OUT_LL_TASK_BUF_SIZE
+#define UHCI_OUT_LL_ISR_BUF_SIZE                CONFIG_BT_BLE_LOG_UHCI_OUT_LL_ISR_BUF_SIZE
+#define UHCI_OUT_LL_HCI_BUF_SIZE                CONFIG_BT_BLE_LOG_UHCI_OUT_LL_HCI_BUF_SIZE
+#define UHCI_OUT_UART_PORT                      CONFIG_BT_BLE_LOG_UHCI_OUT_UART_PORT
+#define UHCI_OUT_UART_NEED_INIT                 CONFIG_BT_BLE_LOG_UHCI_OUT_UART_NEED_INIT
+
+#if UHCI_OUT_UART_NEED_INIT
+#define UHCI_OUT_UART_BAUD_RATE                 CONFIG_BT_BLE_LOG_UHCI_OUT_UART_BAUD_RATE
+#define UHCI_OUT_UART_IO_NUM_TX                 CONFIG_BT_BLE_LOG_UHCI_OUT_UART_IO_NUM_TX
+#endif // UHCI_OUT_UART_NEED_INIT
+
+// Private defines
+#define UHCI_OUT_MAX_TRANSFER_SIZE              (10240)
+#define UHCI_OUT_MALLOC(size)                   heap_caps_malloc(size, MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT)
+#define UHCI_OUT_FLUSH_TIMEOUT_MS               (100)
+#define UHCI_OUT_FLUSH_TIMEOUT_US               (UHCI_OUT_FLUSH_TIMEOUT_MS * 1000)
+#define UHCI_OUT_USER_BUF_SIZE                  (512)
+#define UHCI_OUT_UART_PORT0                     (0)
+#define UHCI_OUT_UART_PORT1                     (1)
+#define UHCI_OUT_UART_DRIVER_RX_BUF_SIZE        (32)
+
+// Queue size defines
+#define UHCI_OUT_PING_PONG_BUF_CNT              (2)
+#define UHCI_OUT_USER_QUEUE_SIZE                (UHCI_OUT_PING_PONG_BUF_CNT)
+#define UHCI_OUT_LL_QUEUE_SIZE                  (3 * UHCI_OUT_PING_PONG_BUF_CNT)
+#define UHCI_OUT_QUEUE_SIZE                     (UHCI_OUT_USER_QUEUE_SIZE + UHCI_OUT_LL_QUEUE_SIZE)
+
+#if CONFIG_SOC_ESP_NIMBLE_CONTROLLER
+#include "os/os_mbuf.h"
+#endif /* CONFIG_SOC_ESP_NIMBLE_CONTROLLER */
+
+// Private typedefs
+typedef struct {
+    // This flag is for multithreading, must be a word, do not modify
+    volatile uint32_t flag;
+    uint16_t buf_size;
+    uint16_t length;
+    uint8_t buffer[0];
+} uhci_out_trans_cb_t;
+
+typedef struct {
+    uhci_out_trans_cb_t *trans_cb[2];
+    uint8_t trans_cb_idx;
+    uint8_t type;
+    uint16_t lost_frame_cnt;
+    uint32_t lost_bytes_cnt;
+    uint32_t frame_sn;
+} uhci_out_log_cb_t;
+
+typedef struct {
+    uint16_t length;
+    uint8_t source;
+    uint8_t type;
+    uint16_t frame_sn;
+} __attribute__((packed)) frame_head_t;
+
+typedef struct {
+    uint8_t type;
+    uint16_t lost_frame_cnt;
+    uint32_t lost_bytes_cnt;
+} __attribute__((packed)) loss_payload_t;
+
+// Private enums
+enum {
+    TRANS_CB_FLAG_AVAILABLE = 0,
+    TRANS_CB_FLAG_NEED_QUEUE,
+    TRANS_CB_FLAG_IN_QUEUE,
+};
+
+enum {
+    LOG_CB_TYPE_USER = 0,
+    LOG_CB_TYPE_LL,
+};
+
+enum {
+    LOG_CB_LL_SUBTYPE_TASK = 0,
+    LOG_CB_LL_SUBTYPE_ISR,
+    LOG_CB_LL_SUBTYPE_HCI
+};
+
+enum {
+    LL_LOG_FLAG_CONTINUE = 0,
+    LL_LOG_FLAG_END,
+    LL_LOG_FLAG_TASK,
+    LL_LOG_FLAG_ISR,
+    LL_LOG_FLAG_HCI,
+    LL_LOG_FLAG_RAW,
+    LL_LOG_FLAG_OMDATA,
+    LL_LOG_FLAG_HCI_UPSTREAM,
+};
+
+enum {
+    LL_EV_FLAG_ISR_APPEND = 0,
+    LL_EV_FLAG_FLUSH_LOG,
+};
+
+// Private variables
+static bool uhci_out_inited = false;
+static uhci_controller_handle_t uhci_handle = NULL;
+
+static bool user_log_inited = false;
+static SemaphoreHandle_t user_log_mutex = NULL;
+static uhci_out_log_cb_t *user_log_cb = NULL;
+static uint32_t user_last_write_ts = 0;
+
+static bool ll_log_inited = false;
+static uhci_out_log_cb_t *ll_task_log_cb = NULL;
+static uhci_out_log_cb_t *ll_isr_log_cb = NULL;
+static uhci_out_log_cb_t *ll_hci_log_cb = NULL;
+static uint32_t ll_ev_flags = 0;
+static uint32_t ll_last_write_ts = 0;
+
+static esp_timer_handle_t flush_timer = NULL;
+
+// Private function declarations
+extern void esp_panic_handler_feed_wdts(void);
+
+static int uhci_out_init_trans(uhci_out_trans_cb_t **trans_cb, uint16_t buf_size);
+static void uhci_out_deinit_trans(uhci_out_trans_cb_t **trans_cb);
+static bool uhci_out_tx_done_cb(uhci_controller_handle_t uhci_ctrl,
+                                const uhci_tx_done_event_data_t *edata, void *user_ctx);
+static inline void uhci_out_append_trans(uhci_out_trans_cb_t *trans_cb);
+
+static int uhci_out_log_cb_init(uhci_out_log_cb_t **log_cb, uint16_t buf_size, uint8_t type, uint8_t idx);
+static void uhci_out_log_cb_deinit(uhci_out_log_cb_t **log_cb);
+static inline bool uhci_out_log_cb_check_trans(uhci_out_log_cb_t *log_cb, uint16_t len, bool *need_append);
+static inline void uhci_out_log_cb_append_trans(uhci_out_log_cb_t *log_cb);
+static inline void uhci_out_log_cb_flush_trans(uhci_out_log_cb_t *log_cb);
+static bool uhci_out_log_cb_write(uhci_out_log_cb_t *log_cb, const uint8_t *addr, uint16_t len,
+                                 const uint8_t *addr_append, uint16_t len_append, uint8_t source, bool omdata);
+static void uhci_out_log_cb_write_loss(uhci_out_log_cb_t *log_cb);
+static void uhci_out_log_cb_dump(uhci_out_log_cb_t *log_cb);
+
+static void esp_timer_cb_log_flush(void);
+static void uhci_out_user_write_str(const uint8_t *src, uint16_t len);
+
+#if UHCI_OUT_UART_PORT == UHCI_OUT_UART_PORT0
+static void uhci_out_user_write_char(char c);
+#endif // UHCI_OUT_UART_PORT == UHCI_OUT_UART_PORT0
+
+static int uhci_out_user_log_init(void);
+static void uhci_out_user_log_deinit(void);
+
+static int uhci_out_ll_log_init(void);
+static void uhci_out_ll_log_deinit(void);
+static void uhci_out_ll_log_flush(void);
+
+#if defined(CONFIG_IDF_TARGET_ESP32H2) || defined(CONFIG_IDF_TARGET_ESP32C6) || defined(CONFIG_IDF_TARGET_ESP32C5) ||\
+    defined(CONFIG_IDF_TARGET_ESP32C61) || defined(CONFIG_IDF_TARGET_ESP32H21)
+extern void r_ble_log_simple_put_ev(void);
+#define UHCI_OUT_LL_PUT_EV r_ble_log_simple_put_ev()
+#elif defined(CONFIG_IDF_TARGET_ESP32C2)
+extern void ble_log_simple_put_ev(void);
+#define UHCI_OUT_LL_PUT_EV ble_log_simple_put_ev()
+#else
+#define UHCI_OUT_LL_PUT_EV
+#endif
+
+// Private macros
+#define UHCI_OUT_FRAME_HEAD_LEN     (sizeof(frame_head_t))
+#define UHCI_OUT_FRAME_TAIL_LEN     (sizeof(uint32_t))
+#define UHCI_OUT_FRAME_OVERHEAD     (UHCI_OUT_FRAME_HEAD_LEN + UHCI_OUT_FRAME_TAIL_LEN)
+#define UHCI_OUT_GET_FRAME_SN(VAR)  __atomic_fetch_add(VAR, 1, __ATOMIC_RELAXED)
+
+// Private functions
+static int uhci_out_init_trans(uhci_out_trans_cb_t **trans_cb, uint16_t buf_size)
+{
+    // Memory allocations
+    size_t cb_size = sizeof(uhci_out_trans_cb_t) + buf_size;
+    *trans_cb = (uhci_out_trans_cb_t *)UHCI_OUT_MALLOC(cb_size);
+    if (!(*trans_cb)) {
+        return -1;
+    }
+    memset(*trans_cb, 0, sizeof(uhci_out_trans_cb_t));
+
+    // Initialization
+    (*trans_cb)->buf_size = buf_size;
+    return 0;
+}
+
+static void uhci_out_deinit_trans(uhci_out_trans_cb_t **trans_cb)
+{
+    if (!(*trans_cb)) {
+        return;
+    }
+
+    free(*trans_cb);
+    *trans_cb = NULL;
+    return;
+}
+
+IRAM_ATTR static bool uhci_out_tx_done_cb(uhci_controller_handle_t uhci_ctrl,
+                                          const uhci_tx_done_event_data_t *edata, void *user_ctx)
+{
+    uhci_out_trans_cb_t *trans_cb = (uhci_out_trans_cb_t *)((uint8_t *)edata->buffer - sizeof(uhci_out_trans_cb_t));
+    trans_cb->length = 0;
+    trans_cb->flag = TRANS_CB_FLAG_AVAILABLE;
+    return true;
+}
+
+IRAM_ATTR static inline void uhci_out_append_trans(uhci_out_trans_cb_t *trans_cb)
+{
+    if ((trans_cb->flag != TRANS_CB_FLAG_NEED_QUEUE) || !trans_cb->length) {
+        return;
+    }
+
+    // Note: If task yield after transmission but before flag set
+    //       flag might be reset in tx done ISR before flag set, leading to buffer access failure
+    trans_cb->flag = TRANS_CB_FLAG_IN_QUEUE;
+    if (uhci_transmit(uhci_handle, trans_cb->buffer, trans_cb->length) != ESP_OK) {
+        goto recycle;
+    }
+    return;
+
+recycle:
+    trans_cb->length = 0;
+    trans_cb->flag = TRANS_CB_FLAG_AVAILABLE;
+    return;
+}
+
+static int uhci_out_log_cb_init(uhci_out_log_cb_t **log_cb, uint16_t buf_size, uint8_t type, uint8_t idx)
+{
+    // Initialize log control block
+    *log_cb = (uhci_out_log_cb_t *)UHCI_OUT_MALLOC(sizeof(uhci_out_log_cb_t));
+    if (!(*log_cb)) {
+        return -1;
+    }
+    memset(*log_cb, 0, sizeof(uhci_out_log_cb_t));
+
+    // Initialize transactions
+    int ret = 0;
+    for (uint8_t i = 0; i < 2; i++) {
+        ret |= uhci_out_init_trans(&((*log_cb)->trans_cb[i]), buf_size);
+    }
+    if (ret != 0) {
+        uhci_out_log_cb_deinit(log_cb);
+        return -1;
+    }
+
+    (*log_cb)->type = (type << 4) | (idx);
+    return 0;
+}
+
+static void uhci_out_log_cb_deinit(uhci_out_log_cb_t **log_cb)
+{
+    if (!(*log_cb)) {
+        return;
+    }
+
+    for (uint8_t i = 0; i < 2; i++) {
+        if ((*log_cb)->trans_cb[i]) {
+            uhci_out_deinit_trans(&((*log_cb)->trans_cb[i]));
+        }
+    }
+    free(*log_cb);
+    *log_cb = NULL;
+    return;
+}
+
+IRAM_ATTR static inline bool uhci_out_log_cb_check_trans(uhci_out_log_cb_t *log_cb, uint16_t len, bool *need_append)
+{
+    uhci_out_trans_cb_t *trans_cb;
+    *need_append = false;
+    for (uint8_t i = 0; i < 2; i++) {
+        trans_cb = log_cb->trans_cb[log_cb->trans_cb_idx];
+        if (len > trans_cb->buf_size) {
+            goto failed;
+        }
+        if (trans_cb->flag == TRANS_CB_FLAG_AVAILABLE) {
+            if ((trans_cb->buf_size - trans_cb->length) >= len) {
+                return true;
+            } else {
+                trans_cb->flag = TRANS_CB_FLAG_NEED_QUEUE;
+                *need_append = true;
+            }
+        }
+        log_cb->trans_cb_idx = !(log_cb->trans_cb_idx);
+    }
+failed:
+    log_cb->lost_bytes_cnt += len;
+    log_cb->lost_frame_cnt++;
+    return false;
+}
+
+// CRITICAL: Shall not be called from ISR!
+IRAM_ATTR static inline void uhci_out_log_cb_append_trans(uhci_out_log_cb_t *log_cb)
+{
+    uhci_out_trans_cb_t *trans_cb;
+    uint8_t idx = !log_cb->trans_cb_idx;
+    for (uint8_t i = 0; i < 2; i++) {
+        trans_cb = log_cb->trans_cb[idx];
+        if (trans_cb->flag == TRANS_CB_FLAG_NEED_QUEUE) {
+            uhci_out_append_trans(trans_cb);
+        }
+        idx = !idx;
+    }
+}
+
+IRAM_ATTR static inline void uhci_out_log_cb_flush_trans(uhci_out_log_cb_t *log_cb)
+{
+    uhci_out_trans_cb_t *trans_cb;
+    for (uint8_t i = 0; i < 2; i++) {
+        trans_cb = log_cb->trans_cb[i];
+        if (trans_cb->length && (trans_cb->flag == TRANS_CB_FLAG_AVAILABLE)) {
+            trans_cb->flag = TRANS_CB_FLAG_NEED_QUEUE;
+        }
+    }
+}
+
+// Return value: Need append
+IRAM_ATTR static bool uhci_out_log_cb_write(uhci_out_log_cb_t *log_cb, const uint8_t *addr, uint16_t len,
+                                           const uint8_t *addr_append, uint16_t len_append, uint8_t source, bool omdata)
+{
+    uhci_out_trans_cb_t *trans_cb = log_cb->trans_cb[log_cb->trans_cb_idx];
+
+    uint8_t *buf = trans_cb->buffer + trans_cb->length;
+    uint16_t total_length = len + len_append;
+    frame_head_t head = {
+        .length = total_length,
+        .source = source,
+        .type = log_cb->type,
+        .frame_sn = UHCI_OUT_GET_FRAME_SN(&(log_cb->frame_sn)) & 0xFFFF,
+    };
+
+    memcpy(buf, (const uint8_t *)&head, UHCI_OUT_FRAME_HEAD_LEN);
+    memcpy(buf + UHCI_OUT_FRAME_HEAD_LEN, addr, len);
+    if (len_append && addr_append) {
+#if CONFIG_SOC_ESP_NIMBLE_CONTROLLER
+        if (omdata) {
+            os_mbuf_copydata((struct os_mbuf *)addr_append, 0,
+                             len_append, buf + UHCI_OUT_FRAME_HEAD_LEN + len);
+        }
+        else
+#endif /* CONFIG_SOC_ESP_NIMBLE_CONTROLLER */
+        {
+            memcpy(buf + UHCI_OUT_FRAME_HEAD_LEN + len, addr_append, len_append);
+        }
+    }
+
+    uint32_t checksum = 0;
+    for (int i = 0; i < UHCI_OUT_FRAME_HEAD_LEN + total_length; i++) {
+        checksum += buf[i];
+    }
+    memcpy(buf + UHCI_OUT_FRAME_HEAD_LEN + total_length, &checksum, UHCI_OUT_FRAME_TAIL_LEN);
+
+    trans_cb->length += total_length + UHCI_OUT_FRAME_OVERHEAD;
+    if ((trans_cb->buf_size - trans_cb->length) <= UHCI_OUT_FRAME_OVERHEAD) {
+        trans_cb->flag = TRANS_CB_FLAG_NEED_QUEUE;
+        return true;
+    }
+    return false;
+}
+
+IRAM_ATTR static void uhci_out_log_cb_write_loss(uhci_out_log_cb_t *log_cb)
+{
+    if (!log_cb->lost_bytes_cnt || !log_cb->lost_frame_cnt) {
+        return;
+    }
+    bool need_append;
+    uint16_t frame_len = sizeof(loss_payload_t) + UHCI_OUT_FRAME_OVERHEAD;
+    if (uhci_out_log_cb_check_trans(log_cb, frame_len, &need_append)) {
+        loss_payload_t payload = {
+            .type = log_cb->type,
+            .lost_frame_cnt = log_cb->lost_frame_cnt,
+            .lost_bytes_cnt = log_cb->lost_bytes_cnt,
+        };
+        uhci_out_log_cb_write(log_cb, (const uint8_t *)&payload, sizeof(loss_payload_t),
+                             NULL, 0, BLE_LOG_UHCI_OUT_SOURCE_LOSS, false);
+
+        log_cb->lost_frame_cnt = 0;
+        log_cb->lost_bytes_cnt = 0;
+    }
+}
+
+static void uhci_out_log_cb_dump(uhci_out_log_cb_t *log_cb)
+{
+    uhci_out_trans_cb_t *trans_cb;
+    uint8_t *buf;
+    for (uint8_t i = 0; i < 2; i++) {
+        // Dump the last transaction before dumping the current transaction
+        log_cb->trans_cb_idx = !(log_cb->trans_cb_idx);
+        trans_cb = log_cb->trans_cb[log_cb->trans_cb_idx];
+        buf = (uint8_t *)trans_cb->buffer;
+        for (uint16_t j = 0; j < trans_cb->buf_size; j++) {
+            esp_rom_printf("%02x ", buf[j]);
+
+            // Feed watchdogs periodically to avoid wdts timeout
+            if ((j % 100) == 0) {
+                esp_panic_handler_feed_wdts();
+            }
+        }
+    }
+}
+
+static void esp_timer_cb_log_flush(void)
+{
+    uint32_t os_ts = pdTICKS_TO_MS(xTaskGetTickCount());
+
+    if ((os_ts - user_last_write_ts) > UHCI_OUT_FLUSH_TIMEOUT_MS) {
+        xSemaphoreTake(user_log_mutex, portMAX_DELAY);
+        uhci_out_log_cb_flush_trans(user_log_cb);
+        uhci_out_log_cb_append_trans(user_log_cb);
+        xSemaphoreGive(user_log_mutex);
+    }
+
+    if ((esp_bt_controller_get_status() >= ESP_BT_CONTROLLER_STATUS_INITED) &&
+        ((os_ts - ll_last_write_ts) > UHCI_OUT_FLUSH_TIMEOUT_MS)) {
+        ll_ev_flags |= BIT(LL_EV_FLAG_FLUSH_LOG);
+        UHCI_OUT_LL_PUT_EV;
+    }
+
+    esp_timer_start_once(flush_timer, UHCI_OUT_FLUSH_TIMEOUT_US);
+}
+
+static void uhci_out_user_write_str(const uint8_t *src, uint16_t len)
+{
+    if (!user_log_inited || !src || !len) {
+        return;
+    }
+
+    xSemaphoreTake(user_log_mutex, portMAX_DELAY);
+
+    bool need_append;
+    if (uhci_out_log_cb_check_trans(user_log_cb, len, &need_append)) {
+        uhci_out_trans_cb_t *trans_cb = user_log_cb->trans_cb[user_log_cb->trans_cb_idx];
+        uint8_t *buf = trans_cb->buffer + trans_cb->length;
+
+        memcpy(buf, (const uint8_t *)src, len);
+        trans_cb->length += len;
+    }
+
+    if (need_append) {
+        uhci_out_log_cb_append_trans(user_log_cb);
+    }
+
+    user_last_write_ts = pdTICKS_TO_MS(xTaskGetTickCount());
+
+    xSemaphoreGive(user_log_mutex);
+}
+
+#if UHCI_OUT_UART_PORT == UHCI_OUT_UART_PORT0
+static void uhci_out_user_write_char(char c)
+{
+    uhci_out_user_write_str((const uint8_t *)&c, 1);
+}
+#endif // UHCI_OUT_UART_PORT == UHCI_OUT_UART_PORT0
+
+static int uhci_out_user_log_init(void)
+{
+    if (user_log_inited) {
+        return 0;
+    }
+
+    // Initialize mutex
+    user_log_mutex = xSemaphoreCreateMutex();
+    if (!user_log_mutex) {
+        goto failed;
+    }
+
+    // Initialize log control block
+    if (uhci_out_log_cb_init(&user_log_cb, UHCI_OUT_USER_BUF_SIZE, LOG_CB_TYPE_USER, 0) != 0) {
+        goto failed;
+    }
+
+    // Initialization done
+    user_log_inited = true;
+    return 0;
+
+failed:
+    uhci_out_user_log_deinit();
+    return -1;
+}
+
+static void uhci_out_user_log_deinit(void)
+{
+    user_log_inited = false;
+
+    if (!user_log_mutex) {
+        return;
+    }
+    xSemaphoreTake(user_log_mutex, portMAX_DELAY);
+
+    uhci_out_log_cb_deinit(&user_log_cb);
+
+    xSemaphoreGive(user_log_mutex);
+    vSemaphoreDelete(user_log_mutex);
+    user_log_mutex = NULL;
+}
+
+static int uhci_out_ll_log_init(void)
+{
+    if (ll_log_inited) {
+        return 0;
+    }
+
+    if (uhci_out_log_cb_init(&ll_task_log_cb, UHCI_OUT_LL_TASK_BUF_SIZE,
+                             LOG_CB_TYPE_LL, LOG_CB_LL_SUBTYPE_TASK) != 0) {
+        goto failed;
+    }
+    if (uhci_out_log_cb_init(&ll_isr_log_cb, UHCI_OUT_LL_ISR_BUF_SIZE,
+                             LOG_CB_TYPE_LL, LOG_CB_LL_SUBTYPE_ISR) != 0) {
+        goto failed;
+    }
+    if (uhci_out_log_cb_init(&ll_hci_log_cb, UHCI_OUT_LL_HCI_BUF_SIZE,
+                             LOG_CB_TYPE_LL, LOG_CB_LL_SUBTYPE_HCI) != 0) {
+        goto failed;
+    }
+
+    ll_log_inited = true;
+    return 0;
+
+failed:
+    uhci_out_ll_log_deinit();
+    return -1;
+}
+
+static void uhci_out_ll_log_deinit(void)
+{
+    ll_log_inited = false;
+
+    uhci_out_log_cb_deinit(&ll_hci_log_cb);
+    uhci_out_log_cb_deinit(&ll_isr_log_cb);
+    uhci_out_log_cb_deinit(&ll_task_log_cb);
+}
+
+static void uhci_out_ll_log_flush(void)
+{
+    if (!ll_log_inited) {
+        return;
+    }
+
+    uhci_out_log_cb_write_loss(ll_task_log_cb);
+    uhci_out_log_cb_write_loss(ll_hci_log_cb);
+
+    uhci_out_log_cb_flush_trans(ll_task_log_cb);
+    uhci_out_log_cb_flush_trans(ll_hci_log_cb);
+
+    portMUX_TYPE spinlock = portMUX_INITIALIZER_UNLOCKED;
+    portENTER_CRITICAL_SAFE(&spinlock);
+    uhci_out_log_cb_write_loss(ll_isr_log_cb);
+    uhci_out_log_cb_flush_trans(ll_isr_log_cb);
+    portEXIT_CRITICAL_SAFE(&spinlock);
+
+    uhci_out_log_cb_append_trans(ll_task_log_cb);
+    uhci_out_log_cb_append_trans(ll_hci_log_cb);
+    uhci_out_log_cb_append_trans(ll_isr_log_cb);
+}
+
+// Public functions
+int ble_log_uhci_out_init(void)
+{
+    // Avoid double init
+    if (uhci_out_inited) {
+        return 0;
+    }
+
+#if UHCI_OUT_UART_NEED_INIT
+    uart_config_t uart_config = {
+        .baud_rate = UHCI_OUT_UART_BAUD_RATE,
+        .data_bits = UART_DATA_8_BITS,
+        .parity = UART_PARITY_DISABLE,
+        .stop_bits = UART_STOP_BITS_1,
+        .flow_ctrl = UART_HW_FLOWCTRL_CTS_RTS,
+        .rx_flow_ctrl_thresh = 122,
+    };
+    // Configure UART parameters
+    uart_param_config(UHCI_OUT_UART_PORT, &uart_config);
+    uart_set_pin(UHCI_OUT_UART_PORT, UHCI_OUT_UART_IO_NUM_TX, -1, -1, -1);
+#endif // UHCI_OUT_UART_NEED_INIT
+
+    uhci_controller_config_t uhci_config = {
+        .uart_port = UHCI_OUT_UART_PORT,
+        .tx_trans_queue_depth = UHCI_OUT_QUEUE_SIZE,
+        .max_receive_internal_mem = 1024,
+        .max_transmit_size = UHCI_OUT_MAX_TRANSFER_SIZE,
+        .dma_burst_size = 32,
+        .rx_eof_flags.idle_eof = 1,
+    };
+    if (uhci_new_controller(&uhci_config, &uhci_handle) != ESP_OK) {
+        goto failed;
+    }
+
+    uhci_event_callbacks_t uhci_cbs = {
+        .on_tx_trans_done = uhci_out_tx_done_cb,
+    };
+    uhci_register_event_callbacks(uhci_handle, &uhci_cbs, NULL);
+
+    if (uhci_out_user_log_init() != 0) {
+        goto failed;
+    }
+
+    if (uhci_out_ll_log_init() != 0) {
+        goto failed;
+    }
+
+    esp_timer_create_args_t timer_args = {
+        .callback = (esp_timer_cb_t)esp_timer_cb_log_flush,
+        .dispatch_method = ESP_TIMER_TASK
+    };
+    if (esp_timer_create(&timer_args, &flush_timer) != ESP_OK) {
+        goto failed;
+    }
+
+#if UHCI_OUT_UART_PORT == UHCI_OUT_UART_PORT0
+    // Install UART Driver if not installed
+    if (!uart_is_driver_installed(UHCI_OUT_UART_PORT0)) {
+        uart_driver_install(UHCI_OUT_UART_PORT0, UHCI_OUT_UART_DRIVER_RX_BUF_SIZE, 0, 0, NULL, 0);
+    }
+
+    // Redirect UART VFS Driver to UART Driver
+    esp_vfs_dev_uart_use_driver(UHCI_OUT_UART_PORT0);
+
+    // Redirect esp_rom_printf to BLE Log UHCI Out
+    esp_rom_install_channel_putc(1, uhci_out_user_write_char);
+    esp_rom_install_channel_putc(2, NULL);
+#endif // UHCI_OUT_UART_PORT == UHCI_OUT_UART_PORT0
+
+    uhci_out_inited = true;
+    esp_timer_start_once(flush_timer, UHCI_OUT_FLUSH_TIMEOUT_US);
+    return 0;
+
+failed:
+    ble_log_uhci_out_deinit();
+    return -1;
+}
+
+void ble_log_uhci_out_deinit(void)
+{
+    uhci_out_inited = false;
+
+    if (flush_timer) {
+        esp_timer_stop(flush_timer);
+        esp_timer_delete(flush_timer);
+        flush_timer = NULL;
+    }
+
+    if (uhci_handle) {
+        uhci_wait_all_tx_transaction_done(uhci_handle, portMAX_DELAY);
+        uhci_del_controller(uhci_handle);
+        uhci_handle = NULL;
+    }
+
+    uhci_out_ll_log_deinit();
+    uhci_out_user_log_deinit();
+}
+
+IRAM_ATTR void ble_log_uhci_out_ll_write(uint32_t len, const uint8_t *addr, uint32_t len_append,
+                                        const uint8_t *addr_append, uint32_t flag)
+{
+    // Raw logs will come in case of assert, shall be printed to console directly
+    if (flag & BIT(LL_LOG_FLAG_RAW)) {
+        if (len && addr) {
+            for (uint32_t i = 0; i < len; i++) { esp_rom_printf("%02x ", addr[i]); }
+        }
+        if (len_append && addr_append) {
+            for (uint32_t i = 0; i < len_append; i++) { esp_rom_printf("%02x ", addr_append[i]); }
+        }
+        if (flag & BIT(LL_LOG_FLAG_END)) { esp_rom_printf("\n"); }
+    }
+
+    if (!ll_log_inited) {
+        return;
+    }
+
+    bool in_isr = false;
+    uint8_t source;
+    uhci_out_log_cb_t *log_cb;
+    if (flag & BIT(LL_LOG_FLAG_ISR)) {
+        log_cb = ll_isr_log_cb;
+        source = BLE_LOG_UHCI_OUT_SOURCE_ESP_ISR;
+        in_isr = true;
+    } else if (flag & BIT(LL_LOG_FLAG_HCI)) {
+        log_cb = ll_hci_log_cb;
+        source = BLE_LOG_UHCI_OUT_SOURCE_LL_HCI;
+    } else {
+        log_cb = ll_task_log_cb;
+        source = BLE_LOG_UHCI_OUT_SOURCE_ESP;
+    }
+    bool omdata = flag & BIT(LL_LOG_FLAG_OMDATA);
+
+    bool need_append;
+    uint16_t frame_len = len + len_append + UHCI_OUT_FRAME_OVERHEAD;
+    if (uhci_out_log_cb_check_trans(log_cb, frame_len, &need_append)) {
+        need_append |= uhci_out_log_cb_write(log_cb, addr, len, addr_append,
+                                            len_append, source, omdata);
+    }
+
+    ll_last_write_ts = in_isr?\
+                       pdTICKS_TO_MS(xTaskGetTickCountFromISR()):\
+                       pdTICKS_TO_MS(xTaskGetTickCount());
+
+    if (need_append) {
+        if (in_isr) {
+            ll_ev_flags |= BIT(LL_EV_FLAG_ISR_APPEND);
+            UHCI_OUT_LL_PUT_EV;
+        } else {
+            uhci_out_log_cb_append_trans(log_cb);
+        }
+    }
+}
+
+IRAM_ATTR void ble_log_uhci_out_ll_log_ev_proc(void)
+{
+    if (!ll_log_inited) {
+        return;
+    }
+
+    if (ll_ev_flags & BIT(LL_EV_FLAG_ISR_APPEND)) {
+        uhci_out_log_cb_append_trans(ll_isr_log_cb);
+        ll_ev_flags &= ~BIT(LL_EV_FLAG_ISR_APPEND);
+    }
+
+    if (ll_ev_flags & BIT(LL_EV_FLAG_FLUSH_LOG)) {
+        uhci_out_ll_log_flush();
+        ll_ev_flags &= ~BIT(LL_EV_FLAG_FLUSH_LOG);
+    }
+
+    ll_ev_flags = 0;
+}
+
+// Redirect UART Driver to BLE Log UHCI Out
+int __real_uart_tx_chars(uart_port_t uart_num, const char *buffer, uint32_t len);
+int __wrap_uart_tx_chars(uart_port_t uart_num, const char *buffer, uint32_t len)
+{
+#if UHCI_OUT_UART_PORT == UHCI_OUT_UART_PORT0
+    uhci_out_user_write_str((const uint8_t *)buffer, len);
+    return 0;
+#else
+    return __real_uart_tx_chars(uart_num, buffer, len);
+#endif // UHCI_OUT_UART_PORT == UHCI_OUT_UART_PORT0
+}
+
+int __real_uart_write_bytes(uart_port_t uart_num, const void *src, size_t size);
+int __wrap_uart_write_bytes(uart_port_t uart_num, const void *src, size_t size)
+{
+#if UHCI_OUT_UART_PORT == UHCI_OUT_UART_PORT0
+    uhci_out_user_write_str((const uint8_t *)src, size);
+    return 0;
+#else
+    return __real_uart_write_bytes(uart_num, src, size);
+#endif // UHCI_OUT_UART_PORT == UHCI_OUT_UART_PORT0
+}
+
+int __real_uart_write_bytes_with_break(uart_port_t uart_num, const void *src, size_t size, int brk_len);
+int __wrap_uart_write_bytes_with_break(uart_port_t uart_num, const void *src, size_t size, int brk_len)
+{
+#if UHCI_OUT_UART_PORT == UHCI_OUT_UART_PORT0
+    return __wrap_uart_write_bytes(uart_num, src, size);
+#else
+    return __real_uart_write_bytes_with_break(uart_num, src, size, brk_len);
+#endif // UHCI_OUT_UART_PORT == UHCI_OUT_UART_PORT0
+}
+
+void ble_log_uhci_out_dump_all(void)
+{
+    if (!uhci_out_inited) {
+        return;
+    }
+
+#if UHCI_OUT_UART_PORT == UHCI_OUT_UART_PORT0
+    esp_rom_uart_tx_wait_idle(UHCI_OUT_UART_PORT0);
+    esp_rom_install_uart_printf();
+#endif // UHCI_OUT_UART_PORT == UHCI_OUT_UART_PORT0
+
+    portMUX_TYPE spinlock = portMUX_INITIALIZER_UNLOCKED;
+    portENTER_CRITICAL_SAFE(&spinlock);
+
+    if (ll_log_inited) {
+        esp_rom_printf("[DUMP_START:\n");
+        uhci_out_log_cb_dump(ll_isr_log_cb);
+        uhci_out_log_cb_dump(ll_task_log_cb);
+        uhci_out_log_cb_dump(ll_hci_log_cb);
+        esp_rom_printf("\n:DUMP_END]\n\n");
+    }
+    portEXIT_CRITICAL_SAFE(&spinlock);
+
+#if UHCI_OUT_UART_PORT == UHCI_OUT_UART_PORT0
+    esp_rom_install_channel_putc(1, uhci_out_user_write_char);
+#endif // UHCI_OUT_UART_PORT == UHCI_OUT_UART_PORT0
+}
+#endif // CONFIG_BT_BLE_LOG_UHCI_OUT_ENABLED
@@ -0,0 +1,56 @@
+/*
+ * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#ifndef __BLE_LOG_H__
+#define __BLE_LOG_H__
+
+/* ------- */
+/* BLE Log */
+/* ------- */
+
+/* INCLUDE */
+#include <stdbool.h>
+#include <stdint.h>
+#include <stddef.h>
+
+/* TYPEDEF */
+/* CRITICAL:
+ * The number of BLE Log source code will directly determine the number of statistic manager
+ * memory requirements, keep it as less as possible; it's recommended to use subcode for more
+ * log data structure decoding */
+typedef enum {
+    /* Internal */
+    BLE_LOG_SRC_INTERNAL = 0,
+
+    /* Custom */
+    BLE_LOG_SRC_CUSTOM,
+
+    /* BLE Stack */
+    BLE_LOG_SRC_LL_TASK,
+    BLE_LOG_SRC_LL_HCI,
+    BLE_LOG_SRC_LL_ISR,
+    BLE_LOG_SRC_HOST,
+    BLE_LOG_SRC_HCI,
+    BLE_LOG_SRC_ENCODE,
+
+    BLE_LOG_SRC_MAX,
+} ble_log_src_t;
+
+/* INTERFACE */
+bool ble_log_init(void);
+void ble_log_deinit(void);
+bool ble_log_enable(bool enable);
+void ble_log_flush(void);
+bool ble_log_write_hex(ble_log_src_t src_code, const uint8_t *addr, size_t len);
+void ble_log_dump_to_console(void);
+#if CONFIG_BLE_LOG_LL_ENABLED
+void ble_log_write_hex_ll(uint32_t len, const uint8_t *addr,
+                          uint32_t len_append, const uint8_t *addr_append, uint32_t flag);
+#endif /* CONFIG_BLE_LOG_LL_ENABLED */
+#if CONFIG_BLE_LOG_TS_ENABLED
+bool ble_log_sync_enable(bool enable);
+#endif /* CONFIG_BLE_LOG_TS_ENABLED */
+
+#endif /* __BLE_LOG_H__ */
@@ -0,0 +1,65 @@
+/*
+ * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#ifndef __BT_SPI_OUT_H__
+#define __BT_SPI_OUT_H__
+
+#include <stdarg.h>
+#include <string.h>
+#include "driver/spi_master.h"
+#include "driver/gpio.h"
+#include "esp_timer.h"
+#include "freertos/semphr.h"
+#include "esp_heap_caps.h"
+#include "esp_task.h"
+
+// Public enums
+enum {
+    BLE_LOG_SPI_OUT_SOURCE_ESP = 0,
+    BLE_LOG_SPI_OUT_SOURCE_ESP_LEGACY,
+    BLE_LOG_SPI_OUT_SOURCE_BLUEDROID,
+    BLE_LOG_SPI_OUT_SOURCE_NIMBLE,
+    BLE_LOG_SPI_OUT_SOURCE_HCI_UPSTREAM,
+    BLE_LOG_SPI_OUT_SOURCE_HCI_DOWNSTREAM,
+    BLE_LOG_SPI_OUT_SOURCE_ESP_ISR,
+    BLE_LOG_SPI_OUT_SOURCE_ESP_LEGACY_ISR,
+    BLE_LOG_SPI_OUT_SOURCE_LL_HCI,
+    BLE_LOG_SPI_OUT_SOURCE_LE_AUDIO,
+    BLE_LOG_SPI_OUT_SOURCE_MESH,
+    BLE_LOG_SPI_OUT_SOURCE_USER = 0x10,
+    BLE_LOG_SPI_OUT_SOURCE_SSC = 0xFD,
+    BLE_LOG_SPI_OUT_SOURCE_SYNC,
+    BLE_LOG_SPI_OUT_SOURCE_LOSS,
+};
+
+#define BLE_LOG_SPI_OUT_LEVEL_NONE                  0
+#define BLE_LOG_SPI_OUT_LEVEL_ERROR                 1
+#define BLE_LOG_SPI_OUT_LEVEL_WARN                  2
+#define BLE_LOG_SPI_OUT_LEVEL_INFO                  3
+#define BLE_LOG_SPI_OUT_LEVEL_DEBUG                 4
+#define BLE_LOG_SPI_OUT_LEVEL_VERBOSE               5
+#define BLE_LOG_SPI_OUT_STR(x)                      #x
+#define BLE_LOG_SPI_OUT_XSTR(x)                     BLE_LOG_SPI_OUT_STR(x)
+#define BLE_LOG_SPI_OUT_BUILD_PREFIX(LEVEL, TAG)    "[" BLE_LOG_SPI_OUT_XSTR(LEVEL) "][" TAG "]"
+
+// Public functions
+int ble_log_spi_out_init(void);
+void ble_log_spi_out_deinit(void);
+void ble_log_spi_out_timer_control(bool enable);
+int ble_log_spi_out_write(uint8_t source, const uint8_t *addr, uint16_t len);
+void ble_log_spi_out_ll_write(uint32_t len, const uint8_t *addr, uint32_t len_append,\
+                              const uint8_t *addr_append, uint32_t flag);
+void ble_log_spi_out_ll_log_ev_proc(void);
+void ble_log_spi_out_ts_sync_start(void);
+void ble_log_spi_out_ts_sync_stop(void);
+void ble_log_spi_out_dump_all(void);
+void ble_log_spi_out_enable(bool enable);
+void ble_log_spi_out_flush(void);
+void ble_log_spi_out_le_audio_write(const uint8_t *addr, uint16_t len);
+int ble_log_spi_out_host_write(uint8_t source, const char *prefix, const char *format, ...);
+int ble_log_spi_out_hci_write(uint8_t source, const uint8_t *addr, uint16_t len);
+int ble_log_spi_out_mesh_write(const char *prefix, const char *format, ...);
+
+#endif // __BT_SPI_OUT_H__
@@ -0,0 +1,35 @@
+/*
+ * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#ifndef __BT_SPI_OUT_H__
+#define __BT_SPI_OUT_H__
+
+#include <stdarg.h>
+#include <string.h>
+#include "esp_private/uhci.h"
+#include "driver/uart.h"
+#include "esp_vfs_dev.h"
+#include "esp_rom_uart.h"
+#include "esp_timer.h"
+#include "freertos/semphr.h"
+
+// Public enums
+enum {
+    BLE_LOG_UHCI_OUT_SOURCE_ESP = 0,
+    BLE_LOG_UHCI_OUT_SOURCE_ESP_ISR = 6,
+    BLE_LOG_UHCI_OUT_SOURCE_LL_HCI = 8,
+    BLE_LOG_UHCI_OUT_SOURCE_USER = 0x10,
+    BLE_LOG_UHCI_OUT_SOURCE_LOSS = 0xFF,
+};
+
+// Public functions
+int ble_log_uhci_out_init(void);
+void ble_log_uhci_out_deinit(void);
+void ble_log_uhci_out_ll_write(uint32_t len, const uint8_t *addr, uint32_t len_append,
+                               const uint8_t *addr_append, uint32_t flag);
+void ble_log_uhci_out_ll_log_ev_proc(void);
+void ble_log_uhci_out_dump_all(void);
+
+#endif // __BT_SPI_OUT_H__
@@ -0,0 +1,94 @@
+/*
+ * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+/* ------- */
+/* BLE Log */
+/* ------- */
+
+/* INCLUDE */
+#include "ble_log.h"
+#include "ble_log_rt.h"
+#include "ble_log_lbm.h"
+#include "ble_log_prph.h"
+#include "ble_log_util.h"
+#if CONFIG_BLE_LOG_TS_ENABLED
+#include "ble_log_ts.h"
+#endif /* CONFIG_BLE_LOG_TS_ENABLED */
+
+/* VARIABLE */
+BLE_LOG_STATIC bool ble_log_inited = false;
+
+/* INTERFACE */
+bool ble_log_init(void)
+{
+    /* Avoid double init */
+    if (ble_log_inited) {
+        return true;
+    }
+
+#if CONFIG_BLE_LOG_TS_ENABLED
+    /* Initialize BLE Log TS */
+    if (!ble_log_ts_init()) {
+        goto exit;
+    }
+#endif /* CONFIG_BLE_LOG_TS_ENABLED */
+
+    /* Initialize BLE Log Runtime */
+    if (!ble_log_rt_init()) {
+        goto exit;
+    }
+
+    /* Initialize BLE Log LBM */
+    if (!ble_log_lbm_init()) {
+        goto exit;
+    }
+
+    /* Initialize BLE Log peripheral interface */
+    if (!ble_log_prph_init(BLE_LOG_LBM_CNT)) {
+        goto exit;
+    }
+
+    /* Initialization done */
+    ble_log_inited = true;
+    ble_log_enable(true);
+
+    /* Write initialization done log */
+    ble_log_info_t ble_log_info = {
+        .int_src_code = BLE_LOG_INT_SRC_INIT_DONE,
+        .version = BLE_LOG_VERSION,
+    };
+    ble_log_write_hex(BLE_LOG_SRC_INTERNAL, (const uint8_t *)&ble_log_info, sizeof(ble_log_info_t));
+    return true;
+
+exit:
+    ble_log_deinit();
+    return false;
+}
+
+void ble_log_deinit(void)
+{
+    ble_log_enable(false);
+    ble_log_inited = false;
+
+    /* CRITICAL:
+     * BLE Log peripheral interface must be deinitialized at first,
+     * because there's a risky scenario that may cause severe peripheral
+     * driver fault - if a log buffer is sent to peripheral driver, and
+     * ble_log_deinit is called; in this case, if LBM is deinitialized
+     * before peripheral interface, the log buffer may be freed before
+     * peripheral driver completing tx, and the result would be faulty */
+    ble_log_prph_deinit();
+
+    /* Deinitialize BLE Log LBM */
+    ble_log_lbm_deinit();
+
+    /* Deinitialize BLE Log Runtime */
+    ble_log_rt_deinit();
+
+#if CONFIG_BLE_LOG_TS_ENABLED
+    /* Deinitialize BLE Log TS */
+    ble_log_ts_deinit();
+#endif /* CONFIG_BLE_LOG_TS_ENABLED */
+}
@@ -0,0 +1,557 @@
+/*
+ * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+/* ------------------------------- */
+/* BLE Log - Log Buffer Management */
+/* ------------------------------- */
+
+/* INCLUDE */
+#include "ble_log.h"
+#include "ble_log_lbm.h"
+#include "ble_log_rt.h"
+
+#if CONFIG_SOC_ESP_NIMBLE_CONTROLLER
+#include "os/os_mbuf.h"
+#endif /* CONFIG_SOC_ESP_NIMBLE_CONTROLLER */
+
+/* VARIABLE */
+BLE_LOG_STATIC volatile uint32_t lbm_ref_count = 0;
+BLE_LOG_STATIC bool lbm_inited = false;
+BLE_LOG_STATIC bool lbm_enabled = false;
+BLE_LOG_STATIC ble_log_lbm_ctx_t *lbm_ctx = NULL;
+BLE_LOG_STATIC ble_log_stat_mgr_t *stat_mgr_ctx[BLE_LOG_SRC_MAX] = {0};
+
+/* PRIVATE FUNCTION DECLARATION */
+BLE_LOG_STATIC ble_log_lbm_t *ble_log_lbm_acquire(void);
+BLE_LOG_STATIC void ble_log_lbm_release(ble_log_lbm_t *lbm);
+BLE_LOG_STATIC
+void ble_log_lbm_write_trans(ble_log_prph_trans_t **trans, ble_log_src_t src_code,
+                             const uint8_t *addr, uint16_t len,
+                             const uint8_t *addr_append, uint16_t len_append, bool omdata);
+#if CONFIG_BLE_LOG_ENH_STAT_ENABLED
+BLE_LOG_STATIC void ble_log_stat_mgr_update(ble_log_src_t src_code, uint32_t len, bool lost);
+#endif /* CONFIG_BLE_LOG_ENH_STAT_ENABLED */
+
+/* ------------------------- */
+/*     PRIVATE INTERFACE     */
+/* ------------------------- */
+BLE_LOG_IRAM_ATTR BLE_LOG_STATIC
+ble_log_lbm_t *ble_log_lbm_acquire(void)
+{
+    ble_log_lbm_t *lbm = NULL;
+    ble_log_lbm_t *atomic_pool;
+    ble_log_lbm_t *spin_lbm;
+    int atomic_pool_size;
+
+    if (BLE_LOG_IN_ISR()) {
+        atomic_pool = lbm_ctx->atomic_pool_isr;
+        spin_lbm = &(lbm_ctx->spin_isr);
+        atomic_pool_size = BLE_LOG_LBM_ATOMIC_ISR_CNT;
+    } else {
+        atomic_pool = lbm_ctx->atomic_pool_task;
+        spin_lbm = &(lbm_ctx->spin_task);
+        atomic_pool_size = BLE_LOG_LBM_ATOMIC_TASK_CNT;
+    }
+
+    /* Try to acquire atomic LBM first */
+    for (int i = 0; i < atomic_pool_size; i++) {
+        lbm = &atomic_pool[i];
+        if (ble_log_cas_acquire(&(lbm->atomic_lock))) {
+            return lbm;
+        }
+    }
+
+    /* Fallback to spinlock LBM */
+    lbm = spin_lbm;
+    BLE_LOG_ACQUIRE_SPIN_LOCK(&(lbm->spin_lock));
+    return lbm;
+}
+
+BLE_LOG_IRAM_ATTR BLE_LOG_STATIC
+void ble_log_lbm_release(ble_log_lbm_t *lbm)
+{
+    switch (lbm->lock_type) {
+    case BLE_LOG_LBM_LOCK_ATOMIC:
+        ble_log_cas_release(&(lbm->atomic_lock));
+        break;
+    case BLE_LOG_LBM_LOCK_SPIN:
+        BLE_LOG_RELEASE_SPIN_LOCK(&lbm->spin_lock);
+        break;
+    case BLE_LOG_LBM_LOCK_NONE:
+    default:
+        break;
+    }
+}
+
+BLE_LOG_IRAM_ATTR BLE_LOG_STATIC
+void ble_log_lbm_write_trans(ble_log_prph_trans_t **trans, ble_log_src_t src_code,
+                             const uint8_t *addr, uint16_t len,
+                             const uint8_t *addr_append, uint16_t len_append, bool omdata)
+{
+    /* Preparation before writing */
+    uint8_t *buf = (*trans)->buf + (*trans)->pos;
+    uint16_t payload_len = len + len_append;
+    ble_log_stat_mgr_t *stat_mgr = stat_mgr_ctx[src_code];
+    uint32_t frame_sn = BLE_LOG_GET_FRAME_SN(&(stat_mgr->frame_sn));
+    ble_log_frame_head_t frame_head = {
+        .length = payload_len,
+        .frame_meta = BLE_LOG_MAKE_FRAME_META(src_code, frame_sn),
+    };
+
+    /* Memory operation */
+    BLE_LOG_MEMCPY(buf, &frame_head, BLE_LOG_FRAME_HEAD_LEN);
+    if (len) {
+        BLE_LOG_MEMCPY(buf + BLE_LOG_FRAME_HEAD_LEN, addr, len);
+    }
+    if (len_append) {
+#if CONFIG_SOC_ESP_NIMBLE_CONTROLLER
+        if (omdata) {
+            os_mbuf_copydata((struct os_mbuf *)addr_append, 0,
+                             len_append, buf + BLE_LOG_FRAME_HEAD_LEN + len);
+        }
+        else
+#endif /* CONFIG_SOC_ESP_NIMBLE_CONTROLLER */
+        {
+            BLE_LOG_MEMCPY(buf + BLE_LOG_FRAME_HEAD_LEN + len, addr_append, len_append);
+        }
+    }
+
+    /* Data integrity check */
+#if CONFIG_BLE_LOG_PAYLOAD_CHECKSUM_ENABLED
+    uint32_t checksum = ble_log_fast_checksum((const uint8_t *)buf, BLE_LOG_FRAME_HEAD_LEN + payload_len);
+#else /* !CONFIG_BLE_LOG_PAYLOAD_CHECKSUM_ENABLED */
+    /* Note:
+     * Minimum data integrity check is still required for log parsing reliability,
+     * which can be achieved by validating the checksum of frame head only */
+    uint32_t checksum = ble_log_fast_checksum((const uint8_t *)buf, BLE_LOG_FRAME_HEAD_LEN);
+#endif /* CONFIG_BLE_LOG_PAYLOAD_CHECKSUM_ENABLED */
+    BLE_LOG_MEMCPY(buf + BLE_LOG_FRAME_HEAD_LEN + payload_len, &checksum, BLE_LOG_FRAME_TAIL_LEN);
+
+    /* Update peripheral transport */
+    (*trans)->pos += payload_len + BLE_LOG_FRAME_OVERHEAD;
+
+#if CONFIG_BLE_LOG_ENH_STAT_ENABLED
+    ble_log_stat_mgr_update(src_code, payload_len, false);
+#endif /* CONFIG_BLE_LOG_ENH_STAT_ENABLED */
+
+    /* Queue trans if full */
+    if (BLE_LOG_TRANS_FREE_SPACE((*trans)) <= BLE_LOG_FRAME_OVERHEAD) {
+        ble_log_rt_queue_trans(trans);
+    }
+}
+
+#if CONFIG_BLE_LOG_ENH_STAT_ENABLED
+BLE_LOG_IRAM_ATTR BLE_LOG_STATIC
+void ble_log_stat_mgr_update(ble_log_src_t src_code, uint32_t len, bool lost)
+{
+    /* Get statistic manager by source code */
+    ble_log_stat_mgr_t *stat_mgr = stat_mgr_ctx[src_code];
+
+    /* Update statistics */
+    uint32_t bytes_cnt = len + BLE_LOG_FRAME_OVERHEAD;
+    if (lost) {
+        stat_mgr->enh_stat.lost_frame_cnt++;
+        stat_mgr->enh_stat.lost_bytes_cnt += bytes_cnt;
+    } else {
+        stat_mgr->enh_stat.written_frame_cnt++;
+        stat_mgr->enh_stat.written_bytes_cnt += bytes_cnt;
+    }
+}
+#endif /* CONFIG_BLE_LOG_ENH_STAT_ENABLED */
+
+/* -------------------------- */
+/*     INTERNAL INTERFACE     */
+/* -------------------------- */
+bool ble_log_lbm_init(void)
+{
+    /* Avoid double init */
+    if (lbm_inited) {
+        return true;
+    }
+
+    /* Initialize LBM context */
+    lbm_ctx = (ble_log_lbm_ctx_t *)BLE_LOG_MALLOC(sizeof(ble_log_lbm_ctx_t));
+    if (!lbm_ctx) {
+        goto exit;
+    }
+    BLE_LOG_MEMSET(lbm_ctx, 0, sizeof(ble_log_lbm_ctx_t));
+
+    /* Initialize peripheral transport for common LBMs */
+    ble_log_lbm_t *lbm;
+    for (int i = 0; i < BLE_LOG_LBM_COMMON_CNT; i++) {
+        lbm = &(lbm_ctx->lbm_common_pool[i]);
+        for (int j = 0; j < BLE_LOG_TRANS_PING_PONG_BUF_CNT; j++) {
+            if (!ble_log_prph_trans_init(&(lbm->trans[j]),
+                                         CONFIG_BLE_LOG_LBM_TRANS_SIZE)) {
+                goto exit;
+            }
+        }
+    }
+
+    /* Initialize lock types for atomic pool */
+    for (int i = 0; i < BLE_LOG_LBM_ATOMIC_CNT; i++) {
+        lbm_ctx->atomic_pool[i].lock_type = BLE_LOG_LBM_LOCK_ATOMIC;
+    }
+
+    /* Initialize lock types for spin pool */
+    for (int i = 0; i < BLE_LOG_LBM_SPIN_MAX; i++) {
+        lbm_ctx->spin_pool[i].lock_type = BLE_LOG_LBM_LOCK_SPIN;
+    }
+
+#if CONFIG_BLE_LOG_LL_ENABLED
+    for (int i = 0; i < BLE_LOG_LBM_LL_MAX; i++) {
+        lbm = &(lbm_ctx->lbm_ll_pool[i]);
+        for (int j = 0; j < BLE_LOG_TRANS_PING_PONG_BUF_CNT; j++) {
+            if (!ble_log_prph_trans_init(&(lbm->trans[j]),
+                                         CONFIG_BLE_LOG_LBM_LL_TRANS_SIZE)) {
+                goto exit;
+            }
+        }
+    }
+
+    /* Initialize lock types for LL pool */
+    for (int i = 0; i < BLE_LOG_LBM_LL_MAX; i++) {
+        lbm_ctx->lbm_ll_pool[i].lock_type = BLE_LOG_LBM_LOCK_NONE;
+    }
+#endif /* CONFIG_BLE_LOG_LL_ENABLED */
+
+    /* Initialize statistic manager context */
+    for (int i = 0; i < BLE_LOG_SRC_MAX; i++) {
+        stat_mgr_ctx[i] = (ble_log_stat_mgr_t *)BLE_LOG_MALLOC(sizeof(ble_log_stat_mgr_t));
+        if (!stat_mgr_ctx[i]) {
+            goto exit;
+        }
+        BLE_LOG_MEMSET(stat_mgr_ctx[i], 0, sizeof(ble_log_stat_mgr_t));
+
+#if CONFIG_BLE_LOG_ENH_STAT_ENABLED
+        stat_mgr_ctx[i]->enh_stat.int_src_code = BLE_LOG_INT_SRC_ENH_STAT;
+        stat_mgr_ctx[i]->enh_stat.src_code = i;
+#endif /* CONFIG_BLE_LOG_ENH_STAT_ENABLED */
+    }
+
+    /* Initialization done */
+    lbm_ref_count = 0;
+    lbm_inited = true;
+    lbm_enabled = false;
+    return true;
+
+exit:
+    ble_log_lbm_deinit();
+    return false;
+}
+
+void ble_log_lbm_deinit(void)
+{
+    /* Set inited flag to false to prevent new references */
+    lbm_inited = false;
+    lbm_enabled = false;
+
+    /* Disable module and wait for all references to be released */
+    uint32_t time_waited = 0;
+    while (lbm_ref_count > 0) {
+        vTaskDelay(pdMS_TO_TICKS(1));
+        BLE_LOG_ASSERT(time_waited++ < 1000);
+    }
+
+    /* Release statistic manager context */
+    for (int i = 0; i < BLE_LOG_SRC_MAX; i++) {
+        if (stat_mgr_ctx[i]) {
+            BLE_LOG_FREE(stat_mgr_ctx[i]);
+            stat_mgr_ctx[i] = NULL;
+        }
+    }
+
+    /* Release LBM */
+    if (lbm_ctx) {
+        /* Release peripheral transport for common pools */
+        ble_log_lbm_t *lbm;
+        for (int i = 0; i < BLE_LOG_LBM_CNT; i++) {
+            lbm = &(lbm_ctx->lbm_pool[i]);
+            for (int j = 0; j < BLE_LOG_TRANS_PING_PONG_BUF_CNT; j++) {
+                ble_log_prph_trans_deinit(&(lbm->trans[j]));
+            }
+        }
+
+        /* Release LBM context */
+        BLE_LOG_FREE(lbm_ctx);
+        lbm_ctx = NULL;
+    }
+}
+
+/* Note:
+ * The function below should be private, but when UART redirection is required,
+ * it would be a waste to implement get transport function again, thus
+ * make it available internally */
+BLE_LOG_IRAM_ATTR
+ble_log_prph_trans_t **ble_log_lbm_get_trans(ble_log_lbm_t *lbm, size_t log_len)
+{
+    /* Check if available buffer can contain incoming log */
+    ble_log_prph_trans_t **trans;
+    for (int i = 0; i < BLE_LOG_TRANS_PING_PONG_BUF_CNT; i++) {
+        trans = &(lbm->trans[lbm->trans_idx]);
+        if (!(*trans)->prph_owned) {
+            /* Return if there's enough free space in current transport */
+            if (BLE_LOG_TRANS_FREE_SPACE((*trans)) >= (log_len + BLE_LOG_FRAME_OVERHEAD)) {
+                return trans;
+            }
+
+            /* Queue transport if there's insufficient free space */
+            if ((*trans)->pos) {
+                ble_log_rt_queue_trans(trans);
+            }
+        }
+
+        /* Current transport unavailable, switch to the other */
+        lbm->trans_idx = !lbm->trans_idx;
+    }
+
+    /* Both ping-pong buffers are unavailable */
+    return NULL;
+}
+
+#if CONFIG_BLE_LOG_ENH_STAT_ENABLED
+void ble_log_write_enh_stat(void)
+{
+    BLE_LOG_REF_COUNT_ACQUIRE(&lbm_ref_count);
+    if (!lbm_enabled) {
+        goto deref;
+    }
+
+    for (int i = 0; i < BLE_LOG_SRC_MAX; i++) {
+        ble_log_enh_stat_t *enh_stat = &(stat_mgr_ctx[i]->enh_stat);
+        ble_log_write_hex(BLE_LOG_SRC_INTERNAL, (const uint8_t *)enh_stat, sizeof(ble_log_enh_stat_t));
+    }
+
+deref:
+    BLE_LOG_REF_COUNT_RELEASE(&lbm_ref_count);
+}
+#endif /* CONFIG_BLE_LOG_ENH_STAT_ENABLED */
+
+/* ------------------------ */
+/*     PUBLIC INTERFACE     */
+/* ------------------------ */
+bool ble_log_enable(bool enable)
+{
+    if (!lbm_inited) {
+        return false;
+    }
+    lbm_enabled = enable;
+    return true;
+}
+
+void ble_log_flush(void)
+{
+    BLE_LOG_REF_COUNT_ACQUIRE(&lbm_ref_count);
+    if (!lbm_inited) {
+        goto deref;
+    }
+
+#if CONFIG_BLE_LOG_ENH_STAT_ENABLED
+    /* Write enhanced statistics before module disable */
+    ble_log_write_enh_stat();
+#endif /* CONFIG_BLE_LOG_ENH_STAT_ENABLED */
+
+    /* Write BLE Log flush log */
+    ble_log_info_t ble_log_info = {
+        .int_src_code = BLE_LOG_INT_SRC_FLUSH,
+        .version = BLE_LOG_VERSION,
+    };
+    ble_log_write_hex(BLE_LOG_SRC_INTERNAL, (const uint8_t *)&ble_log_info, sizeof(ble_log_info_t));
+
+    /* Disable module and wait for all other references to release */
+    bool lbm_enabled_copy = lbm_enabled;
+    lbm_enabled = false;
+    uint32_t time_waited = 0;
+    while (lbm_ref_count > 1) {
+        vTaskDelay(pdMS_TO_TICKS(1));
+        BLE_LOG_ASSERT(time_waited++ < 1000);
+    }
+
+    /* Queue transports with logs */
+    ble_log_lbm_t *lbm;
+    ble_log_prph_trans_t **trans;
+
+    /* Flush pools */
+    for (int i = 0; i < BLE_LOG_LBM_CNT; i++) {
+        lbm = &(lbm_ctx->lbm_pool[i]);
+        int trans_idx = lbm->trans_idx;
+        for (int j = 0; j < BLE_LOG_TRANS_PING_PONG_BUF_CNT; j++) {
+            trans = &(lbm->trans[trans_idx]);
+            if (!(*trans)->prph_owned && (*trans)->pos) {
+                ble_log_rt_queue_trans(trans);
+            }
+            trans_idx = !trans_idx;
+        }
+    }
+
+    /* Wait for transportation to finish */
+    time_waited = 0;
+    bool in_progress;
+    do {
+        in_progress = false;
+        for (int i = 0; i < BLE_LOG_LBM_CNT; i++) {
+            lbm = &(lbm_ctx->lbm_pool[i]);
+            for (int j = 0; j < BLE_LOG_TRANS_PING_PONG_BUF_CNT; j++) {
+                trans = &(lbm->trans[j]);
+                in_progress |= (*trans)->prph_owned;
+            }
+        }
+        if (in_progress) {
+            vTaskDelay(pdMS_TO_TICKS(1));
+            BLE_LOG_ASSERT(time_waited++ < 1000);
+        }
+    } while (in_progress);
+
+    /* Reset statistics manager after all operations complete */
+    for (int i = 0; i < BLE_LOG_SRC_MAX; i++) {
+        BLE_LOG_MEMSET(stat_mgr_ctx[i], 0, sizeof(ble_log_stat_mgr_t));
+#if CONFIG_BLE_LOG_ENH_STAT_ENABLED
+        /* Reinitialize enhanced statistics fields */
+        stat_mgr_ctx[i]->enh_stat.int_src_code = BLE_LOG_INT_SRC_ENH_STAT;
+        stat_mgr_ctx[i]->enh_stat.src_code = i;
+#endif /* CONFIG_BLE_LOG_ENH_STAT_ENABLED */
+    }
+
+    /* Resume enable status */
+    lbm_enabled = lbm_enabled_copy;
+
+deref:
+    BLE_LOG_REF_COUNT_RELEASE(&lbm_ref_count);
+}
+
+bool ble_log_write_hex(ble_log_src_t src_code, const uint8_t *addr, size_t len)
+{
+    BLE_LOG_REF_COUNT_ACQUIRE(&lbm_ref_count);
+    size_t payload_len = len + sizeof(uint32_t);
+    if (!lbm_enabled) {
+        goto exit;
+    }
+
+    /* Get transport */
+    ble_log_lbm_t *lbm = ble_log_lbm_acquire();
+    ble_log_prph_trans_t **trans = ble_log_lbm_get_trans(lbm, payload_len);
+    if (!trans) {
+        ble_log_lbm_release(lbm);
+        goto exit;
+    }
+
+    /* Write transport */
+    uint32_t os_ts = pdTICKS_TO_MS(BLE_LOG_IN_ISR()?
+                                   xTaskGetTickCountFromISR():
+                                   xTaskGetTickCount());
+    ble_log_lbm_write_trans(trans, src_code, (const uint8_t *)&os_ts,
+                            sizeof(uint32_t), addr, len, false);
+
+    /* Release */
+    ble_log_lbm_release(lbm);
+    BLE_LOG_REF_COUNT_RELEASE(&lbm_ref_count);
+    return true;
+
+exit:
+#if CONFIG_BLE_LOG_ENH_STAT_ENABLED
+    if (lbm_inited) {
+        ble_log_stat_mgr_update(src_code, payload_len, true);
+    }
+#endif /* CONFIG_BLE_LOG_ENH_STAT_ENABLED */
+    BLE_LOG_REF_COUNT_RELEASE(&lbm_ref_count);
+    return false;
+}
+
+#if CONFIG_BLE_LOG_LL_ENABLED
+BLE_LOG_IRAM_ATTR
+void ble_log_write_hex_ll(uint32_t len, const uint8_t *addr,
+                          uint32_t len_append, const uint8_t *addr_append, uint32_t flag)
+{
+    BLE_LOG_REF_COUNT_ACQUIRE(&lbm_ref_count);
+    size_t payload_len = len + len_append;
+
+    /* Source code shall be determined before LBM enable status check */
+    ble_log_src_t src_code;
+    bool use_ll_task = false;
+    if (flag & BIT(BLE_LOG_LL_FLAG_ISR)) {
+        src_code = BLE_LOG_SRC_LL_ISR;
+    } else if (flag & BIT(BLE_LOG_LL_FLAG_HCI)) {
+        src_code = BLE_LOG_SRC_LL_HCI;
+    } else if (flag & BIT(BLE_LOG_LL_FLAG_HCI_UPSTREAM)) {
+        src_code = BLE_LOG_SRC_HCI;
+    } else {
+        src_code = BLE_LOG_SRC_LL_TASK;
+        use_ll_task = true;
+    }
+    bool omdata = flag & BIT(BLE_LOG_LL_FLAG_OMDATA);
+
+    if (!lbm_enabled) {
+        goto exit;
+    }
+
+    /* Determine LBM by flag */
+    ble_log_lbm_t *lbm;
+    if (BLE_LOG_IN_ISR()) {
+        /* Reuse common LBM acquire logic */
+        lbm = ble_log_lbm_acquire();
+    } else {
+        lbm = (use_ll_task)? &(lbm_ctx->lbm_ll_task): &(lbm_ctx->lbm_ll_hci);
+    }
+
+    /* Get transport */
+    ble_log_prph_trans_t **trans = ble_log_lbm_get_trans(lbm, payload_len);
+    if (!trans) {
+        ble_log_lbm_release(lbm);
+        goto exit;
+    }
+
+    /* Write transport */
+    ble_log_lbm_write_trans(trans, src_code, addr, len, addr_append, len_append, omdata);
+
+    ble_log_lbm_release(lbm);
+    BLE_LOG_REF_COUNT_RELEASE(&lbm_ref_count);
+    return;
+
+exit:
+#if CONFIG_BLE_LOG_ENH_STAT_ENABLED
+    if (lbm_inited) {
+        ble_log_stat_mgr_update(src_code, payload_len, true);
+    }
+#endif /* CONFIG_BLE_LOG_ENH_STAT_ENABLED */
+    BLE_LOG_REF_COUNT_RELEASE(&lbm_ref_count);
+    return;
+}
+#endif /* CONFIG_BLE_LOG_LL_ENABLED */
+
+void ble_log_dump_to_console(void)
+{
+    BLE_LOG_REF_COUNT_ACQUIRE(&lbm_ref_count);
+    if (!lbm_inited) {
+        goto deref;
+    }
+
+    int trans_idx;
+    ble_log_lbm_t *lbm;
+    ble_log_prph_trans_t *trans;
+    BLE_LOG_ENTER_CRITICAL();
+    BLE_LOG_CONSOLE("[BLE_LOG_DUMP_START:\n");
+    for (int i = 0; i < BLE_LOG_LBM_CNT; i++) {
+        lbm = &(lbm_ctx->lbm_pool[i]);
+        trans_idx = lbm->trans_idx;
+        for (int j = 0; j < BLE_LOG_TRANS_PING_PONG_BUF_CNT; j++) {
+            trans = lbm->trans[trans_idx];
+            BLE_LOG_FEED_WDT();
+
+            for (int k = 0; k < trans->size; k++) {
+                BLE_LOG_CONSOLE("%02x ", trans->buf[k]);
+                if (!(k & 0xFF)) {
+                    BLE_LOG_FEED_WDT();
+                }
+            }
+            trans_idx = !trans_idx;
+        }
+    }
+    BLE_LOG_CONSOLE("\n:BLE_LOG_DUMP_END]\n\n");
+    BLE_LOG_EXIT_CRITICAL();
+
+deref:
+    BLE_LOG_REF_COUNT_RELEASE(&lbm_ref_count);
+    return;
+}
@@ -0,0 +1,144 @@
+/*
+ * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/* ----------------- */
+/* BLE Log - Runtime */
+/* ----------------- */
+
+/* INCLUDE */
+#include "ble_log.h"
+#include "ble_log_rt.h"
+#include "ble_log_lbm.h"
+
+/* VARIABLE */
+BLE_LOG_STATIC bool rt_inited = false;
+BLE_LOG_STATIC TaskHandle_t rt_task_handle = NULL;
+BLE_LOG_STATIC QueueHandle_t rt_queue_handle = NULL;
+#if CONFIG_BLE_LOG_TS_ENABLED
+BLE_LOG_STATIC bool rt_ts_enabled = false;
+#endif /* CONFIG_BLE_LOG_TS_ENABLED */
+
+/* PRIVATE FUNCTION */
+BLE_LOG_IRAM_ATTR BLE_LOG_STATIC void ble_log_rt_task(void *pvParameters)
+{
+    (void)pvParameters;
+    ble_log_prph_trans_t *trans = NULL;
+    uint32_t curr_os_ts = 0;
+    uint32_t last_hook_os_ts = 0;
+#ifndef UNIT_TEST
+    while (1)
+#endif /* !UNIT_TEST */
+    {
+        /* CRITICAL:
+         * Blocking queue receive is mandatory for light sleep support */
+        if (xQueueReceive(rt_queue_handle, &trans, portMAX_DELAY) == pdTRUE) {
+            ble_log_prph_send_trans(trans);
+        }
+
+        /* Task hook */
+        curr_os_ts = pdTICKS_TO_MS(xTaskGetTickCount());
+        if ((curr_os_ts - last_hook_os_ts) < BLE_LOG_TASK_HOOK_TIMEOUT_MS) {
+#ifndef UNIT_TEST
+            continue;
+#else /* UNIT_TEST */
+            return;
+#endif /* !UNIT_TEST */
+        }
+        last_hook_os_ts = curr_os_ts;
+
+        /* Write BLE Log info log */
+        ble_log_info_t ble_log_info = {
+            .int_src_code = BLE_LOG_INT_SRC_INFO,
+            .version = BLE_LOG_VERSION,
+        };
+        ble_log_write_hex(BLE_LOG_SRC_INTERNAL, (const uint8_t *)&ble_log_info, sizeof(ble_log_info_t));
+
+#if CONFIG_BLE_LOG_TS_ENABLED
+        if (rt_ts_enabled) {
+            ble_log_ts_info_t *ts_info = NULL;
+            ble_log_ts_info_update(&ts_info);
+            ble_log_write_hex(BLE_LOG_SRC_INTERNAL, (const uint8_t *)ts_info, sizeof(ble_log_ts_info_t));
+        }
+#endif /* CONFIG_BLE_LOG_TS_ENABLED */
+
+#if CONFIG_BLE_LOG_ENH_STAT_ENABLED
+        ble_log_write_enh_stat();
+#endif /* CONFIG_BLE_LOG_ENH_STAT_ENABLED */
+    }
+}
+
+/* INTERFACE */
+bool ble_log_rt_init(void)
+{
+    if (rt_inited) {
+        return true;
+    }
+
+    /* CRITICAL:
+     * Queue must be initialized before creating task */
+    rt_queue_handle = xQueueCreate(BLE_LOG_LBM_CNT, sizeof(ble_log_prph_trans_t *));
+    if (!rt_queue_handle) {
+        goto exit;
+    }
+
+    /* Initialize task */
+    if (xTaskCreate(ble_log_rt_task, "ble_log", BLE_LOG_TASK_STACK_SIZE, NULL,
+        BLE_LOG_TASK_PRIO, &rt_task_handle) != pdTRUE) {
+        goto exit;
+    }
+
+    rt_inited = true;
+#if CONFIG_BLE_LOG_TS_ENABLED
+    rt_ts_enabled = false;
+#endif /* CONFIG_BLE_LOG_TS_ENABLED */
+    return true;
+
+exit:
+    ble_log_rt_deinit();
+    return false;
+}
+
+void ble_log_rt_deinit(void)
+{
+    rt_inited = false;
+#if CONFIG_BLE_LOG_TS_ENABLED
+    rt_ts_enabled = false;
+#endif /* CONFIG_BLE_LOG_TS_ENABLED */
+
+    /* CRITICAL:
+     * Task must be deinitialized before deinitializing queue */
+    if (rt_task_handle) {
+        vTaskDelete(rt_task_handle);
+        rt_task_handle = NULL;
+    }
+
+    /* Release task queue */
+    if (rt_queue_handle) {
+        vQueueDelete(rt_queue_handle);
+        rt_queue_handle = NULL;
+    }
+}
+
+BLE_LOG_IRAM_ATTR void ble_log_rt_queue_trans(ble_log_prph_trans_t **trans)
+{
+    (*trans)->prph_owned = true;
+    if (BLE_LOG_IN_ISR()) {
+        xQueueSendFromISR(rt_queue_handle, trans, NULL);
+    } else {
+        xQueueSend(rt_queue_handle, trans, portMAX_DELAY);
+    }
+}
+
+#if CONFIG_BLE_LOG_TS_ENABLED
+bool ble_log_sync_enable(bool enable)
+{
+    if (!rt_inited) {
+        return false;
+    }
+    rt_ts_enabled = enable;
+    return true;
+}
+#endif /* CONFIG_BLE_LOG_TS_ENABLED */
@@ -0,0 +1,75 @@
+/*
+ * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+/* ----------------------------------- */
+/* BLE Log - Timestamp Synchronization */
+/* ----------------------------------- */
+
+/* INCLUDE */
+#include "ble_log_ts.h"
+
+/* VARIABLE */
+BLE_LOG_STATIC bool ts_inited = false;
+BLE_LOG_STATIC ble_log_ts_info_t *ts_info = NULL;
+
+/* INTERFACE */
+bool ble_log_ts_init(void)
+{
+    if (ts_inited) {
+        return true;
+    }
+
+    /* Initialize toggle IO */
+    gpio_config_t sync_io_conf = {
+        .intr_type = GPIO_INTR_DISABLE,
+        .mode = GPIO_MODE_OUTPUT,
+        .pin_bit_mask = BIT(CONFIG_BLE_LOG_SYNC_IO_NUM),
+    };
+    if (gpio_config(&sync_io_conf) != ESP_OK) {
+        goto exit;
+    }
+
+    /* Initialize sync data */
+    ts_info = (ble_log_ts_info_t *)BLE_LOG_MALLOC(sizeof(ble_log_ts_info_t));
+    if (!ts_info) {
+        goto exit;
+    }
+    BLE_LOG_MEMSET(ts_info, 0, sizeof(ble_log_ts_info_t));
+    ts_info->int_src_code = BLE_LOG_INT_SRC_TS;
+
+    ts_inited = true;
+    return true;
+
+exit:
+    ble_log_ts_deinit();
+    return false;
+}
+
+void ble_log_ts_deinit(void)
+{
+    ts_inited = false;
+
+    /* Release sync data */
+    if (ts_info) {
+        BLE_LOG_FREE(ts_info);
+        ts_info = NULL;
+    }
+
+    /* Release toggle IO */
+    gpio_reset_pin(CONFIG_BLE_LOG_SYNC_IO_NUM);
+}
+
+void ble_log_ts_info_update(ble_log_ts_info_t **info)
+{
+    BLE_LOG_ENTER_CRITICAL();
+    ts_info->io_level = !ts_info->io_level;
+    gpio_set_level(CONFIG_BLE_LOG_SYNC_IO_NUM, ts_info->io_level);
+    ts_info->lc_ts = BLE_LOG_GET_LC_TS;
+    ts_info->esp_ts = esp_timer_get_time();
+    ts_info->os_ts = pdTICKS_TO_MS(xTaskGetTickCountFromISR());
+    BLE_LOG_EXIT_CRITICAL();
+
+    *info = ts_info;
+}
--- a/Show More
+++ b/Show More